G3 Upgrade Questions....

G3 Upgrade Questions....

[ian geiser]

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Hello,
    I just installed a G3 upgrade card into my powercenter132
    It is a 400Mhz with 1Meg at 200Mhz....
    It registers under MacOS perfectly but i get the following under
    proc/cpuinfo:
    processor       : 0
    cpu             : 750
    temperature     : 0 C            <--Is this correct?!
    clock           : 195MHz        <-- Is this correct?!
    revision        : 130.1
    bogomips        : 399.77
    zero pages      : total 0 (0Kb) current: 0 (0Kb) hits: 0/1084 (0%)
    machine         : Power Macintosh
    motherboard     : AAPL,7300 MacRISC
    memory          : 112MB

    it only registers 195 Mhz and 0C for the temp... is the correct?
    i am running Kernel 2.2.10

    -ian reinhart geiser

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Re: G3 Upgrade Questions....

[Paul Mackerras]

ian geiser <geiseri@msoe.edu> wrote:

>     I just installed a G3 upgrade card into my powercenter132
>     It is a 400Mhz with 1Meg at 200Mhz....
>     It registers under MacOS perfectly but i get the following under
>     proc/cpuinfo:
>     processor       : 0
>     cpu             : 750
>     temperature     : 0 C            <--Is this correct?!

Yeah, reading the temperature isn't actually implemented yet.

>     clock           : 195MHz        <-- Is this correct?!

That is probably the value from Open Firmware.  I would guess that OF
on your motherboard doesn't know how to work out the clock frequency
correctly for the G3.  It doesn't matter, though.

Paul.

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Re: G3 Upgrade Questions....

[Jeremy Fitzhardinge]

On 28-Jul-99 Paul Mackerras wrote:
> Yeah, reading the temperature isn't actually implemented yet.

I've got a patch.  I polish it up and send it out soon.

        J

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I still cannot get L2cr to activate!

[ian reinhart geiser (ADMIN)]

i ran the get G3 settings from the BootX dist.  it said that i was all
good to go with my l2cr but when i did a:
[19:51:07}{2}{geiseri@sleepchamber:~ (363.537 Mb)>$ cat /proc/sys/kernel/l2cr 

i get:

b9000000:  enabled,no parity,1M,+2 clock,pipelined burst SRAM,ZZ enabled,write-through,1.0ns hold 

as a response...

is this incorrect?

also the l2 cache will not show up in my /proc/cpuinfo

any ideas?

	TIA
	-ian reinhart geiser


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Re: G3 Upgrade Questions....

[Takayuki Yamaizumi]

  Hi, Jeremy & Paul,

jeremy> On 28-Jul-99 Paul Mackerras wrote:
>> Yeah, reading the temperature isn't actually implemented yet.

jeremy> I've got a patch.  I polish it up and send it out soon.

  I have also created another patch, but not polished :-) This patch 
is relative to the latest 2.2.10 vger kernel.

  It works like the following on my PowerBook G3 (266MHz/14.1inch
screen), but I can't check CPU's "real" tempetature, I am not sure
this value is correct. 

ty@asama{pts/4}(~)[14:06]: cat /proc/cpuinfo 
processor       : 0
cpu             : 750
temperature     : 47 C
clock           : 264MHz
revision        : 2.2
bogomips        : 532.48
zero pages      : total 0 (0Kb) current: 0 (0Kb) hits: 0/190 (0%)
machine         : PowerBook
motherboard     : AAPL,PowerBook1998 MacRISC
L2 cache        : 1024K unified pipelined-syncro-burst
memory          : 128MB

  Hope this works & helps,

--
Takayuki Yamaizumi
Software Development Lab. IBM Japan.
E-mail: ty@kamoi.imasy.or.jp, ty@tokusen.org (Home)
        zumi@yamato.ibm.co.jp (Office)

--- linux/arch/ppc/kernel/setup.c.ORG	Wed Jul 28 19:35:25 1999
+++ linux/arch/ppc/kernel/setup.c	Wed Jul 28 19:37:21 1999
@@ -167,33 +167,117 @@
 }
 #endif
 
+/* This is a temporary definition which should be configurable  *
+ * from "make config" and some. - Takayuki Yamaizumi            *
+ * <ty@kamoi.imasy.or.jp>                                       */
+
+#define CONFIG_PPC750_CPUTEMP
+
+#ifdef CONFIG_PPC750_CPUTEMP
+/* From drivers/ap1000/apfddi.c */
+u_char cpu_temp_bitrev[256] = {
+    0x00, 0x80, 0x40, 0xc0, 0x20, 0xa0, 0x60, 0xe0,
+    0x10, 0x90, 0x50, 0xd0, 0x30, 0xb0, 0x70, 0xf0,
+    0x08, 0x88, 0x48, 0xc8, 0x28, 0xa8, 0x68, 0xe8,
+    0x18, 0x98, 0x58, 0xd8, 0x38, 0xb8, 0x78, 0xf8,
+    0x04, 0x84, 0x44, 0xc4, 0x24, 0xa4, 0x64, 0xe4,
+    0x14, 0x94, 0x54, 0xd4, 0x34, 0xb4, 0x74, 0xf4,
+    0x0c, 0x8c, 0x4c, 0xcc, 0x2c, 0xac, 0x6c, 0xec,
+    0x1c, 0x9c, 0x5c, 0xdc, 0x3c, 0xbc, 0x7c, 0xfc,
+    0x02, 0x82, 0x42, 0xc2, 0x22, 0xa2, 0x62, 0xe2,
+    0x12, 0x92, 0x52, 0xd2, 0x32, 0xb2, 0x72, 0xf2,
+    0x0a, 0x8a, 0x4a, 0xca, 0x2a, 0xaa, 0x6a, 0xea,
+    0x1a, 0x9a, 0x5a, 0xda, 0x3a, 0xba, 0x7a, 0xfa,
+    0x06, 0x86, 0x46, 0xc6, 0x26, 0xa6, 0x66, 0xe6,
+    0x16, 0x96, 0x56, 0xd6, 0x36, 0xb6, 0x76, 0xf6,
+    0x0e, 0x8e, 0x4e, 0xce, 0x2e, 0xae, 0x6e, 0xee,
+    0x1e, 0x9e, 0x5e, 0xde, 0x3e, 0xbe, 0x7e, 0xfe,
+    0x01, 0x81, 0x41, 0xc1, 0x21, 0xa1, 0x61, 0xe1,
+    0x11, 0x91, 0x51, 0xd1, 0x31, 0xb1, 0x71, 0xf1,
+    0x09, 0x89, 0x49, 0xc9, 0x29, 0xa9, 0x69, 0xe9,
+    0x19, 0x99, 0x59, 0xd9, 0x39, 0xb9, 0x79, 0xf9,
+    0x05, 0x85, 0x45, 0xc5, 0x25, 0xa5, 0x65, 0xe5,
+    0x15, 0x95, 0x55, 0xd5, 0x35, 0xb5, 0x75, 0xf5,
+    0x0d, 0x8d, 0x4d, 0xcd, 0x2d, 0xad, 0x6d, 0xed,
+    0x1d, 0x9d, 0x5d, 0xdd, 0x3d, 0xbd, 0x7d, 0xfd,
+    0x03, 0x83, 0x43, 0xc3, 0x23, 0xa3, 0x63, 0xe3,
+    0x13, 0x93, 0x53, 0xd3, 0x33, 0xb3, 0x73, 0xf3,
+    0x0b, 0x8b, 0x4b, 0xcb, 0x2b, 0xab, 0x6b, 0xeb,
+    0x1b, 0x9b, 0x5b, 0xdb, 0x3b, 0xbb, 0x7b, 0xfb,
+    0x07, 0x87, 0x47, 0xc7, 0x27, 0xa7, 0x67, 0xe7,
+    0x17, 0x97, 0x57, 0xd7, 0x37, 0xb7, 0x77, 0xf7,
+    0x0f, 0x8f, 0x4f, 0xcf, 0x2f, 0xaf, 0x6f, 0xef,
+    0x1f, 0x9f, 0x5f, 0xdf, 0x3f, 0xbf, 0x7f, 0xff,
+};
+
+#define bit_reverse32(x) \
+  (((__u32) cpu_temp_bitrev[((x) & 0xff000000UL) >> 24]) | \
+   ((__u32) cpu_temp_bitrev[((x) & 0x00ff0000UL) >> 16] << 8) | \
+   ((__u32) cpu_temp_bitrev[((x) & 0x0000ff00UL) >> 8] << 16) | \
+   ((__u32) cpu_temp_bitrev[((x) & 0x000000ffUL)] << 24))
+
+#endif /* CONFIG_PPC750_CPUTEMP */
+
 unsigned long cpu_temp(void)
 {
-	unsigned char thres = 0;
+#ifdef CONFIG_PPC750_CPUTEMP
+
+	int thres = 0;
+	unsigned char flg = 0;
+	unsigned long othrm1, thrm3, thrm1, in_thrm1;
+	int sanity;
+
+	extern void _set_THRM1(unsigned long);
+	extern void _set_THRM2(unsigned long);
+	extern void _set_THRM3(unsigned long);
+	extern unsigned long _get_THRM1(void);
+	extern unsigned long _get_THRM2(void);
+	extern unsigned long _get_THRM3(void);
 	
-#if 0
 	/* disable thrm2 */
 	_set_THRM2( 0 );
 	/* threshold 0 C, tid: exceeding threshold, tie: don't generate interrupt */
-	_set_THRM1( THRM1_V );
-
 	/* we need 20us to do the compare - assume 300MHz processor clock */
 	_set_THRM3(0);
-	_set_THRM3(THRM3_E | (300*30)<<18 );
 
-	udelay(100);
+	thrm3 = bit_reverse32(THRM3_E | ((300*21)<<18));
+	_set_THRM3(thrm3);
+
+	for (thres = 127, flg = 0; thres >= 0 && flg == 0; thres--) {
+	  in_thrm1 = (bit_reverse32(THRM1_V | THRM1_TID) | (thres<<23));
+	  _set_THRM1(in_thrm1);
+ 
 	/* wait for the compare to complete */
-	/*while ( !(_get_THRM1() & THRM1_TIV) ) ;*/
-	if ( !(_get_THRM1() & THRM1_TIV) )
-		printk("no tiv\n");
-	if ( _get_THRM1() & THRM1_TIN )
-		printk("crossed\n");
+	  sanity = 30000;
+	  othrm1 = _get_THRM1();
+	  thrm1 = bit_reverse32(othrm1);
+
+	  while ( (!(thrm1 & THRM1_TIV)) && (sanity-- >= 0) ) {
+	    udelay(1);
+	    othrm1 = _get_THRM1();
+	    thrm1 = bit_reverse32(othrm1);
+	  }
+	  if (sanity < 0) printk("no sanity\n");
+
+	  if ( !(thrm1 & THRM1_TIN) ) {
+	    printk(KERN_DEBUG "not crossed temp = %d C: This may be a current temperature.\n", thres);
+	    flg++;
+	  }
+#if 0
+	  else
+	    printk("crossed temp = %d C\n", thres);
+#endif
+
+	}
 	/* turn everything off */
 	_set_THRM3(0);
 	_set_THRM1(0);
+	
+	return ++thres;
+#else
+
+	return 0;
 #endif
-		
-	return thres;
 }
 
 int get_cpuinfo(char *buffer)



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Re: G3 Upgrade Questions....

[Adrian Cox]

Takayuki Yamaizumi wrote:
>   I have also created another patch, but not polished :-) This patch
> is relative to the latest 2.2.10 vger kernel.
> 
>   It works like the following on my PowerBook G3 (266MHz/14.1inch
> screen), but I can't check CPU's "real" tempetature, I am not sure
> this value is correct.

I'm a little confused by this patch, because it is very different from
Motorola's application note AN1800/D (Programming the Thermal Assist
Unit in the MPC750 Microprocessor). 

http://www.mot.com/SPS/PowerPC/teksupport/teklibrary/appnotes/an1800.pdf

1) No calibration. The board vendor is supposed to calibrate the TAU
before shipping the board, then supply the calibration value. I'm not
sure whether Apple do this.
2) Why all the time spent doing bit reversals? Why not just fix the
broken values in processor.h and test the correct bits to start with?

- Adrian Cox, AG Electronics

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Re: G3 Upgrade Questions....

[Takayuki Yamaizumi]

  Hi, Adrian,

  Thanks for your advice,

adrian> I'm a little confused by this patch, because it is very different from
adrian> Motorola's application note AN1800/D (Programming the Thermal Assist
adrian> Unit in the MPC750 Microprocessor). 

adrian> http://www.mot.com/SPS/PowerPC/teksupport/teklibrary/appnotes/an1800.pdf

  I've never checked that document, so I download it (but, today I
have no spare time for reading, sorry). That patch is based on
cpu_temp in the older vger kernel which was commented out in 2.1.119
(or around this version, I remember. And still being commented out in
the latest kernel.) and have been created only using Motorola's
"PowerPC 750 User's Manual"
 
http://www.mot.com/SPS/PowerPC/library/750_um.pdf

as reference. 

adrian> 1) No calibration. The board vendor is supposed to calibrate the TAU
adrian> before shipping the board, then supply the calibration value. I'm not
adrian> sure whether Apple do this.
adrian> 2) Why all the time spent doing bit reversals? Why not just fix the
adrian> broken values in processor.h and test the correct bits to start with?

  Currently, I don't care about the definition in
include/asm-ppc/processor.h, but should be fixed if broken. I also
have been confusing why bit reversal is needed for reading
"reasonable" value of tempearture.

--
Takayuki Yamaizumi
Software Development Lab, IBM Japan.
E-mail: ty@tokusen.org, ty@kamoi.imasy.or.jp (Home)
        zumi@yamato.ibm.co.jp (Office)


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Re: G3 Upgrade Questions....

[Charles Lepple]

Takayuki Yamaizumi wrote:
[...]
>   I've never checked that document, so I download it (but, today I

The code listed in that app note does not seem to include any bit
reversals (did I miss something?) and it works fine (the temperatures
are linear, just 20 degrees too high) on a 740 card here.

I used the code for a different reason (it seems that the board fails
right when the TAU reads between 66 and 70 degrees C) but I held off on
turning it into a kernel patch because I can see it now -- as soon as a
patch gets into the 2.2 kernel tree, people are going to start hitting
the list with questions like "why does my computer think that it's 70 C
in here?". At the very least, whoever puts the code in the kernel should
take a hint from Motorola's code and also spit out whether the value has
been calibrated or not (compile-time option? or an OF variable?
thoughts?)

--Charles Lepple
clepple@mitre.org


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Re: I still cannot get L2cr to activate!

[Jerry Quinn]

ian geiser <geiseri@msoe.edu> wrote:
> "Timothy A. Seufert" wrote:
> > At 7:47 PM -0500 7/28/99, ian reinhart geiser (ADMIN) wrote:
> > >
> > >b9000000:  enabled,no parity,1M,+2 clock,pipelined burst SRAM,ZZ

> what confused me was the enabled,no.

I think this should be parsed as 1) enabled, 2) no parity, 3) 1M, etc.



-- 
Jerry Quinn                             Tel: (514) 761-8737
jquinn@nortelnetworks.com               Fax: (514) 761-8505
Speech Recognition Research


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Re: I still cannot get L2cr to activate!

[ian reinhart geiser (ADMIN)]

On Thu, 29 Jul 1999, Jerry Quinn wrote:

> 
> 
> ian geiser <geiseri@msoe.edu> wrote:
> > "Timothy A. Seufert" wrote:
> > > At 7:47 PM -0500 7/28/99, ian reinhart geiser (ADMIN) wrote:
> > > >
> > > >b9000000:  enabled,no parity,1M,+2 clock,pipelined burst SRAM,ZZ
> 
> > what confused me was the enabled,no.
> 
> I think this should be parsed as 1) enabled, 2) no parity, 3) 1M, etc.
> 

	ahhhhh.....
	i see...
	thankyou for that little tidbit...
	now where is this documented so i can read up on it some more?

	thanks

	-ian reinhart geiser

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|                          |                                |
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|   Apt #5                 | email:   geiseri@msoe.edu      |
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Re: G3 Upgrade Questions....

[Neil Jolly]

ian geiser wrote:

> Hello,
>     I just installed a G3 upgrade card into my powercenter132
>     It is a 400Mhz with 1Meg at 200Mhz....
>     It registers under MacOS perfectly but i get the following under
>     proc/cpuinfo:
>     processor       : 0
>     cpu             : 750
>     temperature     : 0 C            <--Is this correct?!
>     clock           : 195MHz        <-- Is this correct?!
>     revision        : 130.1
>     bogomips        : 399.77
>     zero pages      : total 0 (0Kb) current: 0 (0Kb) hits: 0/1084 (0%)
>     machine         : Power Macintosh
>     motherboard     : AAPL,7300 MacRISC
>     memory          : 112MB
>
>     it only registers 195 Mhz and 0C for the temp... is the correct?
>     i am running Kernel 2.2.10

Here's a peek at my cpu info. A 233 G3 clocked to 292 with 83mhz bus, and
runs around 106 degrees F. Obviously the temp is not accurate, but clock
seems to be pretty close.

processor       : 0
cpu             : 750
temperature     : 0 C
clock           : 290MHz
revision        : 2.2
bogomips        : 581.63
zero pages      : total 0 (0Kb) current: 0 (0Kb) hits: 0/558 (0%)
machine         : Power Macintosh
motherboard     : AAPL,Gossamer MacRISC
L2 cache        : 512K unified pipelined-syncro-burst
memory          : 96MB


Neil


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Re: G3 Upgrade Questions....

[ian reinhart geiser (ADMIN)]

On Tue, 27 Jul 1999, Neil Jolly wrote:

> 
> ian geiser wrote:
> 
> > Hello,
> >     I just installed a G3 upgrade card into my powercenter132
> >     It is a 400Mhz with 1Meg at 200Mhz....
> >     It registers under MacOS perfectly but i get the following under
> >     proc/cpuinfo:
> >     processor       : 0
> >     cpu             : 750
> >     temperature     : 0 C            <--Is this correct?!
> >     clock           : 195MHz        <-- Is this correct?!
> >     revision        : 130.1
> >     bogomips        : 399.77
> >     zero pages      : total 0 (0Kb) current: 0 (0Kb) hits: 0/1084 (0%)
> >     machine         : Power Macintosh
> >     motherboard     : AAPL,7300 MacRISC
> >     memory          : 112MB
> >
> >     it only registers 195 Mhz and 0C for the temp... is the correct?
> >     i am running Kernel 2.2.10
> 
> Here's a peek at my cpu info. A 233 G3 clocked to 292 with 83mhz bus, and
> runs around 106 degrees F. Obviously the temp is not accurate, but clock
> seems to be pretty close.
> 
> processor       : 0
> cpu             : 750
> temperature     : 0 C
> clock           : 290MHz
> revision        : 2.2
> bogomips        : 581.63
> zero pages      : total 0 (0Kb) current: 0 (0Kb) hits: 0/558 (0%)
> machine         : Power Macintosh
> motherboard     : AAPL,Gossamer MacRISC
> L2 cache        : 512K unified pipelined-syncro-burst
> memory          : 96MB
> 
	i have a powercenter 132, is it feasable that the 
	motherboard can only run a 200MHz CPU or is the
	card being set to half speed some how?

	under MacOS it says it is at 400 and when i run
	MacBench i get the numbers a little lower than
	what the box says ( like 25 points low ).

	under LinuxPPC my setiat home client takes almost
	24h to process a block while my P][ 400 takes
	only 10 hours....

	is this the client?
	am i really running half as fast?

	should i send this bugger back and just get
	a 200Mhz one because that is all my board can	
	do?

	thanks for the input all.

	-ian reinhart geiser
	

.-----------------------------------------------------------.
|[]                   NeXT Generation                    [X]|
|--------------------------,--------------------------------.
|  UNIX GEEK,              | Office:    I have none...      |
|  Macintosh Specialist @  | Phone:     414.277.7288        |
|  Milwaukee School of     |                                |
|        Engineering       |--------------------------------|
|                          |                                |
|   ian reinhart geiser    | phone:   414.220.9683          |
|   Apt #5                 | email:   geiseri@msoe.edu      |
|   828 N Milwaukee St     | web:     www.msoe.edu/~geiseri |
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Re: G3 Upgrade Questions....

[Geert Uytterhoeven]

On 29 Jul 1999, Stefan Berndtsson wrote:
> "Timothy A. Seufert" <tas@mindspring.com> writes:
> > As a general rule the 750 scores about 2 bogomips per MHz, so this is
> > suspicious too.
> 
> On my Lombard/333 I get:
> 
> # cat /proc/cpuinfo
> processor       : 0
> cpu             : 750
> temperature     : 0 C
> clock           : 333MHz
> revision        : 130.2
> bogomips        : 333.41
> zero pages      : total 0 (0Kb) current: 0 (0Kb) hits: 0/256 (0%)
> machine         : PowerBook1,1
> motherboard     : PowerBook1,1 MacRISC Power Macintosh
> L2 cache        : 512K unified
> memory          : 64MB
> 
> so either it's reporting things wrong for me, or 750 doesn't always score 2/MHz.

Since the 750 is derived from the 603e, it scores 1 bogomips per MHz. The 604e
does 2 bogomips per MHz.

Greetings,

						Geert

--
Geert Uytterhoeven                     Geert.Uytterhoeven@cs.kuleuven.ac.be
Wavelets, Linux/{m68k~Amiga,PPC~CHRP}  http://www.cs.kuleuven.ac.be/~geert/
Department of Computer Science -- Katholieke Universiteit Leuven -- Belgium


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Re: G3 Upgrade Questions....

[Stefan Berndtsson]

Geert Uytterhoeven <Geert.Uytterhoeven@cs.kuleuven.ac.be> writes:

> On 29 Jul 1999, Stefan Berndtsson wrote:
> > "Timothy A. Seufert" <tas@mindspring.com> writes:
> > > As a general rule the 750 scores about 2 bogomips per MHz, so this is
> > > suspicious too.
> > 
> > On my Lombard/333 I get:
> > 
> > # cat /proc/cpuinfo
> > processor       : 0
> > cpu             : 750
> > temperature     : 0 C
> > clock           : 333MHz
> > revision        : 130.2
> > bogomips        : 333.41
> > zero pages      : total 0 (0Kb) current: 0 (0Kb) hits: 0/256 (0%)
> > machine         : PowerBook1,1
> > motherboard     : PowerBook1,1 MacRISC Power Macintosh
> > L2 cache        : 512K unified
> > memory          : 64MB
> > 
> > so either it's reporting things wrong for me, or 750 doesn't always score 2/MHz.
> 
> Since the 750 is derived from the 603e, it scores 1 bogomips per MHz. The 604e
> does 2 bogomips per MHz.

That's not true either.. a friends G3/300 (some stationary thing), reports 601.xx
bogomips.. unless something's screwed with _that_ setup.


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Re: G3 Upgrade Questions....

[Chris Ridd]

On 29 Jul 1999 14:12:30 +0200, Stefan Berndtsson wrote:
> That's not true either.. a friends G3/300 (some stationary thing), reports 601.xx
> bogomips.. unless something's screwed with _that_ setup.

Well they *are* *BOGO*mips after all ;-)

Chris


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Re: G3 Upgrade Questions....

[Gabriel Paubert]

On 29 Jul 1999, Stefan Berndtsson wrote:

> 
> Geert Uytterhoeven <Geert.Uytterhoeven@cs.kuleuven.ac.be> writes:
> 
> > On 29 Jul 1999, Stefan Berndtsson wrote:
> > > "Timothy A. Seufert" <tas@mindspring.com> writes:
> > > > As a general rule the 750 scores about 2 bogomips per MHz, so this is
> > > > suspicious too.
> > > 
> > > On my Lombard/333 I get:
> > > 
> > > # cat /proc/cpuinfo
> > > processor       : 0
> > > cpu             : 750
> > > temperature     : 0 C
> > > clock           : 333MHz
> > > revision        : 130.2
> > > bogomips        : 333.41
> > > zero pages      : total 0 (0Kb) current: 0 (0Kb) hits: 0/256 (0%)
> > > machine         : PowerBook1,1
> > > motherboard     : PowerBook1,1 MacRISC Power Macintosh
> > > L2 cache        : 512K unified
> > > memory          : 64MB
> > > 
> > > so either it's reporting things wrong for me, or 750 doesn't always score 2/MHz.
> > 
> > Since the 750 is derived from the 603e, it scores 1 bogomips per MHz. The 604e
> > does 2 bogomips per MHz.
> 
> That's not true either.. a friends G3/300 (some stationary thing), reports 601.xx
> bogomips.. unless something's screwed with _that_ setup.

Can't alignment of the BogoMips loop affect this timing loop ? It does
on 603e AFAICT. 

OTOH, the 750 is only loosely based on the 603e. It's much faster on tight
loops because it has dynamic branch prediction (which does not help much
in this case) and an associated branch target cache which holds the first
2 instructions at the target of a branch (which is very important in this
case). However my 200MHz 603e report 133 BogoMIPS (2/3 of clock
frequency).  
	
	Gabriel.


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Re: G3 Upgrade Questions....

[Andreas Bogk]

Geert Uytterhoeven <Geert.Uytterhoeven@cs.kuleuven.ac.be> writes:

> Since the 750 is derived from the 603e, it scores 1 bogomips per MHz. The 604e
> does 2 bogomips per MHz.

This contradicts my readings:

processor       : 0
cpu             : 750
temperature     : 67 C
clock           : 297MHz
revision        : 2.2
bogomips        : 599.65
zero pages      : total 0 (0Kb) current: 0 (0Kb) hits: 0/688 (0%)
machine         : PowerBook
motherboard     : AAPL,PowerBook1998 MacRISC
L2 cache        : 1024K unified pipelined-syncro-burst
memory          : 192MB

But I wouldn't be surprised if the second level cache would influence
the BogoMIPS value by a factor of two.

Andreas

-- 
"We show that all proposed quantum bit commitment schemes are insecure because
the sender, Alice, can almost always cheat successfully by using an
Einstein-Podolsky-Rosen type of attack and delaying her measurement until she
opens her commitment." ( http://xxx.lanl.gov/abs/quant-ph/9603004 )

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Re: G3 Upgrade Questions....

[David DeHaven]

>	i have a powercenter 132, is it feasable that the 
>	motherboard can only run a 200MHz CPU or is the
>	card being set to half speed some how?
>
>	under MacOS it says it is at 400 and when i run
>	MacBench i get the numbers a little lower than
>	what the box says ( like 25 points low ).
>
>	under LinuxPPC my setiat home client takes almost
>	24h to process a block while my P][ 400 takes
>	only 10 hours....
>
>	is this the client?
>	am i really running half as fast?
>
>	should i send this bugger back and just get
>	a 200Mhz one because that is all my board can	
>	do?
>
>	thanks for the input all.

ian,

Go to http://www.newertech.com, click on the "Downloads" button on the 
left side, click on "Guage Utilities" and download "Clockometer". This 
will give you an accurate measurement of your CPU's clock. You can also 
try "Cache-22" to see if your L2 cache is really being enabled. If it 
shows up at 400MHz, then it's working properly.

-DrD-

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Re: G3 Upgrade Questions....

[Ron Chmara]

Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit

On Thu, 29 Jul 1999, Chris Ridd wrote:
> On 29 Jul 1999 14:12:30 +0200, Stefan Berndtsson wrote:
> > That's not true either.. a friends G3/300 (some stationary thing), reports $> > bogomips.. unless something's screwed with _that_ setup.
> Well they *are* *BOGO*mips after all ;-) 

http://linux.com/howto/mini/BogoMips.html#toc1     
http://linux.com/howto/mini/BogoMips-2.html
http://linux.com/howto/mini/BogoMips-9.html

There aren't many entries for the 750 series (okay, there's one), so
maybe
we need to send some info off to baron@clifton.hobby.nl, so he can
update
the howto's.

-Bop

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