From mboxrd@z Thu Jan 1 00:00:00 1970 To: linuxppc-dev@lists.linuxppc.org Subject: MPC860 IDMA latency question Mime-Version: 1.0 (generated by tm-edit 7.108) Content-Type: text/plain; charset=US-ASCII From: Roger Williams Date: 12 Aug 1999 03:04:11 -0400 In-Reply-To: Benjamin Herrenschmidt's message of "Thu, 5 Aug 1999 13:56:11 +0200" Message-ID: Sender: owner-linuxppc-dev@lists.linuxppc.org List-Id: [I apologise for asking this here, but Motorola doesn't seem to host a PPC mailing list like their other MCU lists.] I'm having trouble getting the throughput estimated by Motorola for peripheral -> memory IDMA transfers on the MPC860. In particular, they seem to claim 10 MBytes/s for single-address (`fly-by') transfers (level-sensitive DREQ on a 50 MHz part), but as I only get a new SDACK every 30 clock cycles, I'm lucky to get 1.25 MWords/s, even with memory set up for zero wait states. Any ideas of what am I missing here? (Unfortunately, I can't try the special single-buffer mode until I receive some rev C devices...) -- Roger Williams finger me for my PGP public key Coelacanth Engineering Inc consulting & turnkey product development Middleborough, Massachusetts wireless * datacomm * DSP * ATE tel +1 508 947-5585 * fax +1 508 861-0278 * http://www.coelacanth.com/ [[ This message was sent via the linuxppc-dev mailing list. Replies are ]] [[ not forced back to the list, so be sure to Cc linuxppc-dev if your ]] [[ reply is of general interest. Please check http://lists.linuxppc.org/ ]] [[ and http://www.linuxppc.org/ for useful information before posting. ]]