* RE: custom board MPC8266
From: srinivas.surabhi @ 2005-04-01 6:56 UTC (permalink / raw)
To: manisha.vj; +Cc: linuxppc-embedded
As per my experience if we set CONIG_SCC_CONSOLE =3Dy the SCC1 will be
used as serial console. Since we have connected serial console to SCC1,
it started working with the above option set.
Rgds
SS
-----Original Message-----
From: linuxppc-embedded-bounces@ozlabs.org
[mailto:linuxppc-embedded-bounces@ozlabs.org] On Behalf Of Manisha
Jagadhane
Sent: Friday, April 01, 2005 11:31 AM
To: Rune Torgersen; linuxppc-embedded@ozlabs.org
Subject: Re: custom board MPC8266
Thanks for the reply.=0D
I have seen the file arch/ppc/8260_io/commproc.c, but there is nowhere
given where to configure the SMC1/SMC2/SCC1/SCC2 as serial console. In
the .config file, whether we have to set CONFIG_SCC_CONSOLE=3Dy option
and in this .config file, is it required to do any configuration to
set SMC1 as serial console?
Please clarify.
Thanking you in advance.
Regards,
Manisha
On Mar 30, 2005 7:57 PM, Rune Torgersen <runet@innovsys.com> wrote:
> If I remember correctly: You have to edit the
> arch/ppc/82xx_io/commproc.c file (I think) to set up which serial port
> is used for console port.
>=0D
> > -----Original Message-----
> > From: linuxppc-embedded-bounces@ozlabs.org
> > [mailto:linuxppc-embedded-bounces@ozlabs.org] On Behalf Of
> > Manisha Jagadhane
> > Sent: Wednesday, March 30, 2005 05:32
> > To: linuxppc-embedded@ozlabs.org
> > Subject: custom board MPC8266
> >
> > Hi,
> >
> > I am using custom board based on MPC8266 processor. I have
> > successfully ported U-Boot 1.1.1 on it. I have used SMC1 as serial
> > port in the board. Does the 2.4.24 kernel version for ppc supports
> > SMC1 as serial console? Which configuration I have to give in the
> > .config file to configure SMC1 as serial console? Which board's
> > defconfig file shall I take as a reference and which kernel version
> > shall I use?
> >
> > Please help me in this regard.
> >
> > Thanking you in advance.
> >
> > Regards,
> >
> > Manisha.
> > _______________________________________________
> > Linuxppc-embedded mailing list
> > Linuxppc-embedded@ozlabs.org
> > https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >
> >
>
_______________________________________________
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Confidentiality Notice=0D
The information contained in this electronic message and any attachments to=
this message are intended
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you are not the intended recipient, please notify the sender at Wipro or=
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and destroy all copies of this message and any attachments.
^ permalink raw reply
* RE : How to read/write in flash memories (MTD)?
From: Garcia Jérémie @ 2005-04-01 8:40 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
Josh,
Your reply confirmed my feeling. So I've decided to use the MTD but with =
my own driver as I found in a tutorial. So I made the file (module) =
/drivers/mtd/maps/myBoardFlash.c in order to support my 2 flash =
memories. You can see the code below, but once again (sorry...) I have =
some questions and doubts on it.=20
1- Is that driver correct for my case?=20
2- Are those R/W routines are usable?
3- In our application we want to download source code and achievable =
code using Ethernet (so R/W operations). Do I need a filesystem for that =
as JFFS 2 ?=20
4- Giving this driver, what is the process to use my R/W routines (if =
they are correct...) from the user space?
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <linux/config.h>
#include <linux/version.h>
#include <asm/io.h>
static struct mtd_info *boot_flash;
static struct mtd_info *oper_flash;
/*************************************************/
/* Mapping infos */
/*************************************************/
/* Map infos for the boot flash */
static struct map_info myboard_flash_boot_map =3D {
.name =3D "MYBOARD boot flash",
.size =3D BOARD_BOOT_FLASH_SIZE,
.buswidth =3D 1,
.read8 =3D myboard_flash_read8,
.read16 =3D myboard_flash_read16,
.read32 =3D myboard_flash_read32,
.copy_from =3D myboard_flash_copy_from,
.write8 =3D myboard_flash_write8,
.write16 =3D myboard_flash_write16,
.write32 =3D myboard_flash_write32,
.copy_to =3D myboard_flash_copy_to
};
/* Map infos for the operationnal flash */
static struct map_info myboard_flash_oper_map =3D {
.name =3D "MYBOARD oper flash",
.size =3D BOARD_OPER_FLASH_SIZE,
.buswidth =3D 2,
.read8 =3D myboard_flash_read8,
.read16 =3D myboard_flash_read16,
.read32 =3D myboard_flash_read32,
.copy_from =3D myboard_flash_copy_from,
.write8 =3D myboard_flash_write8,
.write16 =3D myboard_flash_write16,
.write32 =3D myboard_flash_write32,
.copy_to =3D myboard_flash_copy_to =20
};
=20
/*************************************************/
/* Partitionning infos */
/*************************************************/
/* Boot flash partionning infos */
static struct mtd_partition myboard_flash_boot_partitions[] =3D {
{
.name =3D "Boot flash partition",
.offset =3D 0x0,
.size =3D BOARD_BOOT_FLASH_SIZE,
}
};
/* Oper flash partionning infos */
static struct mtd_partition myboard_flash_oper_partitions[] =3D {
{
.name =3D "Oper flash partition", =20
.offset =3D 0x0,
.size =3D BOARD_OPER_FLASH_SIZE, =20
}
};
/**************************************************/
/* Read/Write routines */
/**************************************************/
__u8 myboard_flash_read8(struct map_info *map, unsigned long ofs)
{
return __raw_readb(map->map_priv_1 + ofs);
}
__u16 myboard_flash_read16(struct map_info *map, unsigned long ofs)
{
return __raw_readw(map->map_priv_1 + ofs);
}
__u32 myboard_flash_read32(struct map_info *map, unsigned long ofs)
{
return __raw_readl(map->map_priv_1 + ofs);
}
void myboard_flash_copy_from(struct map_info *map, void *to, unsigned =
long from, ssize_t len)
{
memcpy_fromio(to, map->map_priv_1 + from, len);
}
void myboard_flash_write8(struct map_info *map, __u8 d, unsigned long =
adr)
{
__raw_writeb(d, map->map_priv_1 + adr);
mb();
}
void myboard_flash_write16(struct map_info *map, __u16 d, unsigned long =
adr)
{
__raw_writew(d, map->map_priv_1 + adr);
mb();
}
void myboard_flash_write32(struct map_info *map, __u32 d, unsigned long =
adr)
{
__raw_writel(d, map->map_priv_1 + adr);
mb();
}
/**********************************************/
/* Module Init */
/**********************************************/
int __init init_myboard_flash(void) map_info
{
/*
* Boot flash init
*/
=20
printk(KERN_NOTICE "myboard boot flash: %x at %x\n", =
BOARD_BOOT_FLASH_SIZE, MYBOARD_FLASH_BOOT_BASE);
/* Obtain a virtual address for the physic one given ibn order to =
perform R/W operations */
myboard_flash_boot_map.map_priv_1 =3D (unsigned =
long)ioremap(MYBOARD_FLASH_BOOT_BASE, BOARD_BOOT_FLASH_SIZE);
if (!myboard_flash_boot_map.map_priv_1)
{
printk("Failed to ioremap for boot flash!!\n");
return -EIO;
}
=20
boot_flash =3D do_map_probe("cfi_probe", &myboard_flash_boot_map);
if (boot_flash)
{
boot_flash->module =3D THIS_MODULE;
boot_flash->erasesize =3D 0x10000;
}
else
{
printk("map probe failed for boot flash!!\n");
return -ENXIO;
}
=20
/*
* Oper flash init
*/
printk(KERN_NOTICE "myboard oper flash: %x at %x\n", =
BOARD_OPER_FLASH_SIZE, MYBOARD_FLASH_OPER_BASE);
/* Obtain a virtual address for the physic one given ibn order to =
perform R/W operations */
myboard_flash_boot_map.map_priv_1 =3D (unsigned =
long)ioremap(MYBOARD_FLASH_OPER_BASE, BOARD_OPER_FLASH_SIZE);
if (!myboard_flash_oper_map.map_priv_1)
{
printk("Failed to ioremap for oper flash!!\n");
return -EIO;
}
oper_flash =3D do_map_probe("cfi_probe", &myboard_flash_oper_map);
if (oper_flash)
{
oper_flash->module =3D THIS_MODULE;
oper_flash->erasesize =3D 0x10000;
}
else
{
printk("map probe failed for oper flash!!\n"); =20
return -ENXIO;
}
/*
* Create partitions
*/
=20
if(boot_flash && oper_flash)
{
=
add_mtd_partitions(boot_flash,myboard_flash_boot_partitions,sizeof(myboar=
d_flash_boot_partitions)/sizeof(struct mtd_partition));
=
add_mtd_partitions(oper_flash,myboard_flash_oper_partitions,sizeof(myboar=
d_flash_oper_partitions)/sizeof(struct mtd_partition));
return 0;=20
}
else
{
/* Free the obtained virtual addresses */
iounmap((void *)myboard_flash_boot_map.map_priv_1);
iounmap((void *)myboard_flash_oper_map.map_priv_1);
return -ENXIO;
}
}
/**********************************************/
/* Module Cleanup */
/**********************************************/
static void __exit cleanup_myboard_flash(void)
{
/*
* Delete partitions
*/
=20
if (boot_flash)
{
del_mtd_partitions(boot_flash);
map_destroy(boot_flash);
}
if (oper_flash)
{
del_mtd_partitions(oper_flash);
map_destroy(oper_flash);
}
=20
/*
* Free Free the obtained virtual addresses=20
*/
=20
if (myboard_flash_boot_map.map_priv_1)
{
iounmap((void *)myboard_flash_boot_map.map_priv_1);
myboard_flash_boot_map.map_priv_1 =3D 0;
}
if (myboard_flash_oper_map.map_priv_1)
{
iounmap((void *)myboard_flash_oper_map.map_priv_1);
myboard_flash_oper_map.map_priv_1 =3D 0;
}
}
=20
module_init(init_myboard_flash);
module_exit(cleanup_myboard_flash);
-------- Message d'origine--------
De: Josh Boyer [mailto:jwboyer@jdub.homelinux.org]
Date: ven. 01/04/2005 01:34
=C0: Garcia J=E9r=E9mie
Cc: linuxppc-dev@ozlabs.org
Objet : Re: How to read/write in flash memories (MTD)?
=20
On Thu, 2005-03-31 at 11:59 +0200, Garcia J=E9r=E9mie wrote:
> L&G,
> Although I'm a newbie in linux kernel development, I'm in charge of =
adapting a Montavista LSP to fit our hardware. In our platform, we use 2 =
AMD flash memories (AM29LV) in which one we would like to process =
read/write operations. So I'm looking for a way to do that. I saw that =
at compilation time, there is MTD item which seems to be created for =
that. But I guess activate that will not be enough to reach my =
objective.
You need to enable MTD with the appropriate chip drivers and either the
MTD character device or the MTD block device (or both). These will
create /dev/mtdX and /dev/mtdblockX respectively. If you are using
devfs or sysfs + udev, they should show up in /dev. Otherwise, you'll
need to use mknod to create them.
> Indeed, we are developping an application (in the user-space) which =
will initiate operation on the 2 flash memories. So, how can I access =
them from my application?
> Please help me cause I'm getting lost in the linux sources....
I'm not sure what kind of operations you mean, but the block and char
devices allow read/write operation. If you are looking for a filesystem
to run on these devices, take a look at JFFS2. Cramfs or squashfs can
also be used, but they are read-only.
josh
^ permalink raw reply
* Re: Overcommit (OOM) problem on embedded device (PPChameleon)
From: Martin Egholm Nielsen @ 2005-04-01 9:58 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <ORION1DXU7J3Ty2cTBM000000a9@orion1.ariodata.com>
Helloooo David!
>>>Look in mm/mmap.c and search for overcommit_memory, then do same
>>>in the sources for your redhat kernels.
>>I'll look into RH kernel to see if it isn't like you say :-)
>>>Perhaps there's a patch for it floating around somewhere? ;-)
>>Now, that would be really nice.
>>Though I have no idea of where to look!?
> Here is what I do. Patch is against BK linuxppc-2.4 version 1.1285
> (2.4.28-pre3) but might work.
Uhhuuuuuuu!! It works!!!
With my simple exhaust_mem example it works with a value of 98 (that is
5% of waste).
However, I need setting it to 95 (so ~8% waste) in order to make it work
entirely with my other application... But that's better than letting the
OOM take over control.
> Burns 5% of the RAM but alternatives all seem worse and I never
> have much luck trying to convince my colleagues that
> dynamic allocation has no place in an embedded system.
>
> If you find out why RH works it would be interesting ... perhaps
> there is a better way.
I'll let you know if I find the triggering patch in RH's kernels :-)
THANKS,
Martin Egholm
>
> David
>
>
> #
> # mm/mmap.c
> # Add pessimistic overcommit mode similar to 2.6 mode 2.
> # This allows malloc aka sbrk() to actually fail before
> # process is killed.
> # Overloaded sysctl_overcommit_memory to be both enable
> # and ratio to avoid making a new sysctl.
> #
> diff -Nru a/mm/mmap.c b/mm/mmap.c
> --- a/mm/mmap.c 2005-03-30 07:15:13 -08:00
> +++ b/mm/mmap.c 2005-03-30 07:15:13 -08:00
> @@ -45,9 +45,13 @@
> __S000, __S001, __S010, __S011, __S100, __S101, __S110, __S111
> };
>
> -int sysctl_overcommit_memory;
> +int sysctl_overcommit_memory = 98;
> +
> int max_map_count = DEFAULT_MAX_MAP_COUNT;
>
> +extern unsigned long totalram_pages;
> +extern unsigned long totalhigh_pages;
> +
> /* Check that a process has enough memory to allocate a
> * new virtual mapping.
> */
> @@ -66,7 +70,7 @@
> unsigned long free;
>
> /* Sometimes we want to use more memory than we have. */
> - if (sysctl_overcommit_memory)
> + if (sysctl_overcommit_memory == 1)
> return 1;
>
> /* The page cache contains buffer pages these days.. */
> @@ -91,7 +95,20 @@
> free += (dentry_stat.nr_unused * sizeof(struct dentry)) >>
> PAGE_SHIFT;
> free += (inodes_stat.nr_unused * sizeof(struct inode)) >>
> PAGE_SHIFT;
>
> + /*
> + * Leave the last 3% for root
> + */
> + if (current->euid)
> + free -= free / 32;
> +
> + /* Strict mode do not allocate last bit of memory */
> + if (sysctl_overcommit_memory) {
> + pages += (totalram_pages - totalhigh_pages)
> + * (100 - sysctl_overcommit_memory) / 100;
> + }
> +
> return free > pages;
> +
> }
>
> /* Remove one vm structure from the inode's i_mapping address space. */
>
>
>
^ permalink raw reply
* Re: [PATCH] invalid instructions in kernel mode
From: Kumar Gala @ 2005-04-01 10:04 UTC (permalink / raw)
To: Fillod Stephane; +Cc: linuxppc-dev
In-Reply-To: <1CFEB358338412458B21FAA0D78FE86D4F0D23@rennsmail02.eu.thmulti.com>
What is the crash01 test doing that causes this code to get invoked? =20
is the kernel you are using using build with math emulation on or off?
- kumar
On Mar 31, 2005, at 11:47 AM, Fillod Stephane wrote:
> Hi,
>
> When CPU has no (classic) FPU, and math emulation is disabled,
> fp instructions are not allowed in kernel mode.
> This bug has been found with crashme (crash01) of LTP, on a e500=20
> system.
>
> The patch was made against linux 2.6.11.6.
> A trivial typo fix has been appended.
>
> Rem: a CONFIG_PPCFPU define could make life easier.
>
>
>
> Signed-off-by: Stephane Fillod <fillods@gmail.com>
>
> --- linux/arch/ppc/kernel/align.c=A0=A0=A0=A0=A0=A0 6 Dec 2004 =
16:18:11 -0000
> 1.1.1.1
> +++ linux/arch/ppc/kernel/align.c=A0=A0=A0=A0=A0=A0 31 Mar 2005 =
16:33:25 -0000
> @@ -333,10 +333,14 @@
> =A0=A0=A0=A0=A0=A0=A0 }
> =A0
> =A0=A0=A0=A0=A0=A0=A0 if (flags & F) {
> +#if !(defined(CONFIG_4xx) || defined(CONFIG_8xx) ||
> defined(CONFIG_E500)) || defined(CONFIG_MATH_EMULATION)
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 preempt_disable();
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 if (regs->msr & MSR_FP)
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
giveup_fpu(current);
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 preempt_enable();
> +#else
> +=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 return 0;
> +#endif
> =A0=A0=A0=A0=A0=A0=A0 }
> =A0
> =A0=A0=A0=A0=A0=A0=A0 /* If we read the operand, copy it in, else get =
register=20
> values
> */
> @@ -366,6 +370,8 @@
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 }
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 break;
> =A0
> +#if !(defined(CONFIG_4xx) || defined(CONFIG_8xx) ||
> defined(CONFIG_E500)) || defined(CONFIG_MATH_EMULATION)
> +
> =A0=A0=A0=A0=A0=A0=A0 /* Single-precision FP load and store require =
conversions...=20
> */
> =A0=A0=A0=A0=A0=A0=A0 case LD+F+S:
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 preempt_disable();
> @@ -379,6 +385,7 @@
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 cvt_df(&data.d, &data.f, =
¤t->thread.fpscr);
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 preempt_enable();
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 break;
> +#endif
> =A0=A0=A0=A0=A0=A0=A0 }
> =A0
> =A0=A0=A0=A0=A0=A0=A0 if (flags & ST) {
> --- linux/arch/ppc/kernel/misc.S=A0=A0=A0=A0=A0=A0=A0 26 Mar 2005 =
03:28:36 -0000
> 1.1.1.2
> +++ linux/arch/ppc/kernel/misc.S=A0=A0=A0=A0=A0=A0=A0 31 Mar 2005 =
16:33:25 -0000
> @@ -1096,7 +1096,8 @@
> =A0 * and exceptions as if the cpu had performed the load or store.
> =A0 */
> =A0
> -#if defined(CONFIG_4xx) || defined(CONFIG_E500)
> +#if !(defined(CONFIG_4xx) || defined(CONFIG_E500) ||
> defined(CONFIG_8xx)) ||=A0 defined(CONFIG_MATH_EMULATION)
> +#if defined(CONFIG_4xx) || defined(CONFIG_E500)
> =A0_GLOBAL(cvt_fd)
> =A0=A0=A0=A0=A0=A0=A0 lfs=A0=A0=A0=A0 0,0(r3)
> =A0=A0=A0=A0=A0=A0=A0 stfd=A0=A0=A0 0,0(r4)
> @@ -1125,6 +1126,7 @@
> =A0=A0=A0=A0=A0=A0=A0 stfd=A0=A0=A0 0,-4(r5)
> =A0=A0=A0=A0=A0=A0=A0 blr
> =A0#endif
> +#endif
> =A0
> =A0/*
> =A0 * Create a kernel thread
> --- linux/arch/ppc/kernel/process.c=A0=A0=A0=A0 26 Mar 2005 03:28:20 =
-0000
> 1.1.1.2
> +++ linux/arch/ppc/kernel/process.c=A0=A0=A0=A0 31 Mar 2005 16:33:25 =
-0000
> @@ -342,7 +342,7 @@
> =A0=A0=A0=A0=A0=A0=A0 printk("\n");
> =A0#ifdef CONFIG_KALLSYMS
> =A0=A0=A0=A0=A0=A0=A0 /*
> -=A0=A0=A0=A0=A0=A0=A0 * Lookup NIP late so we have the best change =
of getting the
> +=A0=A0=A0=A0=A0=A0=A0 * Lookup NIP late so we have the best chance =
of getting the
> =A0=A0=A0=A0=A0=A0=A0=A0 * above info out without failing
> =A0=A0=A0=A0=A0=A0=A0=A0 */
> =A0=A0=A0=A0=A0=A0=A0 printk("NIP [%08lx] ", regs->nip);
>
>
>
> Best Regards,
>
> --=20
> Stephane
^ permalink raw reply
* Re: Embedded linux on powerpc
From: Vijay Padiyar @ 2005-04-01 10:36 UTC (permalink / raw)
To: dmarty; +Cc: LinuxPPC Support
In-Reply-To: <20050401100354.70hbtqjfs33cos04@imp.enib.fr>
Hi David
If your file was compiled statically (i.e. you gave the -static flag while
compiling & linking the file) then it will execute the application without
any problems.
If you have not used that flag (i.e. you're compiling your application using
dynamic library linking, which is preferrable) then you need to have the GNU
library and loader files (libc-2.3.3.so and ld-2.3.3.so and their symbolic
links, libc.so.6 and ld.so.6) in your target's /lib directory. You'll find
these in your toolchain's lib folder
(/home/yourname/tools/powerpc-603e-linux-gnu/lib). Copy these to your root
filesystem's lib directory.
Here is a snapshot of my root filesystem's /lib directory:
[chandrashekharp@linux lib]$ ls
ld-2.3.3.so libm-2.3.3.so libnss_files.so.2
libstdc++.so.6
ld.so.1 libm.so.6 libpthread-0.10.so
libstdc++.so.6.0.1
libc-2.3.3.so libnsl-2.3.3.so libpthread.so.0
libthread_db-1.0.so
libcrypt-2.3.3.so libnsl.so libresolv-2.3.3.so
libthread_db.so
libcrypt.so.1 libnsl.so.1 libresolv.so.2
libthread_db.so.1
libc.so.6 libnss_compat-2.3.3.so librt-2.3.3.so
libutil-2.3.3.so
libdl-2.3.3.so libnss_compat.so librt.so libutil.so.1
libdl.so.2 libnss_compat.so.2 librt.so.1 modules
libgcc_s.so libnss_files-2.3.3.so libstdc++.la
libgcc_s.so.1 libnss_files.so libstdc++.so
Similarly, you can copy whatever library files you require from your
toolchain's lib folder to your root filesystem's lib folder.
To find out which library files your executable needs, you need to do a
readelf on the executable and search for shared library dependencies:
~ $ powerpc-603e-linux-gnu-readelf -a hello | grep "Shared"
Executing this command will give you an output like this:
0x00000001 (NEEDED) Shared library: [libc.so.6]
This means hello needs libc.so.6 (libc-2.3.3.so) to execute properly. Next,
using the same command on libc.so.6 gives:
~ $ powerpc-603e-linux-gnu-readelf -a libc-2.3.3.so | grep "Shared"
0x00000001 (NEEDED) Shared library: [ld.so.1]
So libc-2.3.3.so needs ld.so.1 (ld-2.3.3.so) to work. I think you can copy
these two files to your root filesystem's /lib directory and your app should
execute fine.
Regards
Vijay Padiyar
http://www.vijaypadiyar.eu.tf
----- Original Message -----
From: <dmarty@enib.fr>
To: <vijay_padiyar@hotmail.com>
Sent: Friday, April 01, 2005 1:33 PM
Subject: Embedded linux on powerpc
> Hello,
>
> You wrote:
>
> >When I try to execute the resulting file on my target from the Linux
kernel
> >prompt, I get a message saying:
> >
> >/home # ./hello
> >/bin/sh: hello: File not found (or something like that)
>
> I have the same problem did you find a solution,
> thank you in advance for your response
>
> David
>
>
> ----------------------------------------------------------------
> The content of this message is only under the responsibility
> of its sender. Moreover, the internet can not guarantee the
> integrity of this message. The ENIB shall (will) not
> therefore be liable for the message if modified.
> ----------------------------------------------------------------
> Le contenu de ce message est de la seule responsabilite
> de son expediteur. De plus, l'internet ne permettant pas
> d'assurer l'integrite de ce message, l'ENIB decline toute
> responsabilite au titre de ce message, dans l'hypothese
> ou il aurait ete modifie.
>
>
^ permalink raw reply
* Re: [PATCH 2.6.11.6] CPM2 Timers API
From: Jason McMullan @ 2005-04-01 13:50 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <1112301225.3337.19.camel@ad.doubleclick.net>
[-- Attachment #1.1: Type: text/plain, Size: 123 bytes --]
And here's the test-case kernel module....
--
Jason McMullan <jason.mcmullan@timesys.com>
TimeSys Corporation
[-- Attachment #1.2: cpm_timer_test.c --]
[-- Type: text/x-csrc, Size: 3852 bytes --]
/*
* CPM Timers test
*
* Copyright 2004, Timesys Corp.
* Jason McMullan <jason.mcmullan@timesys.com>
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/wait.h>
#include <asm/cpm_timer.h>
static int failed = 0;
static volatile int once, every;
static wait_queue_head_t queue;
#define FAILED(x, args...) do { failed++; printk(KERN_INFO "cpm_timer_test: " x , ## args ); if (tm != NULL) { cpm_timer_stop(tm); cpm_timer_free(tm); } return -EINVAL; } while (0)
static void cpm_timer_test_callback(cpm_timer_t tm, void *data)
{
if (data == &once) {
unsigned long val = cpm_timer_get_ticks(tm);
printk(KERN_INFO "cpm_timer_test: Called once at tick %ld.\n",
val);
once++;
wmb();
}
if (data == &every) {
unsigned long val = cpm_timer_get_ticks(tm);
printk(KERN_INFO
"cpm_timer_test: Called every(%d), tick %ld.\n", every,
val);
every++;
if (every > 5)
cpm_timer_call_none(tm);
wmb();
}
wake_up_interruptible(&queue);
}
static int test_timer(int timer_id)
{
cpm_timer_t tm = NULL;
int err;
unsigned long res, val;
printk(KERN_INFO "cpm_timer_test: Test timer ID 0x%.2x\n", timer_id);
err = cpm_timer_alloc(timer_id, &tm);
if (err < 0)
FAILED("Can't allocate timer 0x%.2x\n", timer_id);
res = cpm_timer_get_resolution(tm);
printk(KERN_INFO "cpm_timer_test: nanoseconds/tick = %ld\n", res);
val = cpm_timer_get_ticks(tm);
printk(KERN_INFO "cpm_timer_test: current value = %ld\n", val);
cpm_timer_stop(tm);
cpm_timer_reset(tm);
val = cpm_timer_get_ticks(tm);
printk(KERN_INFO "cpm_timer_test: value after stop/reset= %ld\n", val);
if (val != 0)
FAILED("Timer 0x%.2x didn't stop!\n", timer_id);
cpm_timer_start(tm);
udelay(5);
val = cpm_timer_get_ticks(tm);
udelay(5);
res = cpm_timer_get_ticks(tm);
printk(KERN_INFO "cpm_timer_test: value after 5 us= %ld\n", val);
printk(KERN_INFO "cpm_timer_test: value after 10 us= %ld\n", res);
if (val == 0 || res == 0)
FAILED("Timer 0x%.2x didn't increment!\n", timer_id);
init_waitqueue_head(&queue);
once = 0;
err =
cpm_timer_call_once(tm, 50000, cpm_timer_test_callback,
(void *)&once);
if (err < 0)
FAILED("Can't call cpm_timer_call_once for 0x%.2x\n", timer_id);
printk(KERN_INFO "cpm_timer_test: Waiting for one-shot...\n");
cpm_timer_start(tm);
err = wait_event_interruptible(queue, once != 0);
if (err < 0)
FAILED("Interrupted sleep for 0x%.2x\n", timer_id);
every = 0;
err =
cpm_timer_call_every(tm, 50000, cpm_timer_test_callback,
(void *)&every);
if (err < 0)
FAILED("Can't call cpm_timer_call_every for 0x%.2x\n",
timer_id);
printk(KERN_INFO "cpm_timer_test: Waiting for multi-shot x5...\n");
cpm_timer_start(tm);
err = wait_event_interruptible(queue, every > 5);
if (err < 0)
FAILED("Interrupted sleep for 0x%.2x\n", timer_id);
cpm_timer_call_none(tm);
printk(KERN_INFO "cpm_timer_test: Counted up to %d.\n", every);
cpm_timer_stop(tm);
cpm_timer_free(tm);
return 0;
}
static int cpm_timer_test_init(void)
{
int err;
printk(KERN_INFO "CPM2 Timer Test Module.\n");
#define TEST(x) do { err=test_timer(x); if (err != 0) goto bad; } while (0)
TEST(CPM2_TIMER16_1);
TEST(CPM2_TIMER16_2);
TEST(CPM2_TIMER16_3);
TEST(CPM2_TIMER16_4);
TEST(CPM2_TIMER32_1);
TEST(CPM2_TIMER32_2);
bad:
if (failed) {
printk(KERN_INFO "cpm_timer_test: FAILED %d tests\n", failed);
} else {
printk(KERN_INFO "cpm_timer_test: PASSED\n");
}
return 0;
}
static void cpm_timer_test_exit(void)
{
printk(KERN_INFO "CPM2 Timer Test Module unloaded.\n");
return;
}
MODULE_LICENSE("GPL");
module_init(cpm_timer_test_init);
module_exit(cpm_timer_test_exit);
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* Which kernel to use?
From: Buday Gergely István @ 2005-04-01 13:34 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 257 bytes --]
Hi,
I have a gadget built around a ppc xpc850xxztb processor with 2M flash and
8M ram. The opsys is Hard Hat, but I'd like to change it to an
openembedded-based solution. Where can I get sources for a proper kernel
that works with this system?
- Gergely
[-- Attachment #2: Type: text/html, Size: 641 bytes --]
^ permalink raw reply
* RE: custom board MPC8266
From: Rune Torgersen @ 2005-04-01 14:56 UTC (permalink / raw)
To: Manisha Jagadhane, linuxppc-embedded
I remebereed the wrong file.=20
Take a look in arch/ppc/8260_io/uart.c
> -----Original Message-----
> From: Manisha Jagadhane [mailto:manisha.vj@gmail.com]=20
> Sent: Friday, April 01, 2005 00:01
> To: Rune Torgersen; linuxppc-embedded@ozlabs.org
> Subject: Re: custom board MPC8266
>=20
> Thanks for the reply.=20
> I have seen the file arch/ppc/8260_io/commproc.c, but there is nowhere
> given where to configure the SMC1/SMC2/SCC1/SCC2 as serial console. In
> the .config file, whether we have to set CONFIG_SCC_CONSOLE=3Dy option
> and in this .config file, is it required to do any configuration to
> set SMC1 as serial console?
>=20
> Please clarify.
>=20
> Thanking you in advance.
>=20
> Regards,
> Manisha
>=20
>=20
> On Mar 30, 2005 7:57 PM, Rune Torgersen <runet@innovsys.com> wrote:
> > If I remember correctly: You have to edit the
> > arch/ppc/82xx_io/commproc.c file (I think) to set up which=20
> serial port
> > is used for console port.
> >=20
> > > -----Original Message-----
> > > From: linuxppc-embedded-bounces@ozlabs.org
> > > [mailto:linuxppc-embedded-bounces@ozlabs.org] On Behalf Of
> > > Manisha Jagadhane
> > > Sent: Wednesday, March 30, 2005 05:32
> > > To: linuxppc-embedded@ozlabs.org
> > > Subject: custom board MPC8266
> > >
> > > Hi,
> > >
> > > I am using custom board based on MPC8266 processor. I have
> > > successfully ported U-Boot 1.1.1 on it. I have used SMC1 as serial
> > > port in the board. Does the 2.4.24 kernel version for ppc supports
> > > SMC1 as serial console? Which configuration I have to give in the
> > > .config file to configure SMC1 as serial console? Which board's
> > > defconfig file shall I take as a reference and which=20
> kernel version
> > > shall I use?
> > >
> > > Please help me in this regard.
> > >
> > > Thanking you in advance.
> > >
> > > Regards,
> > >
> > > Manisha.
> > > _______________________________________________
> > > Linuxppc-embedded mailing list
> > > Linuxppc-embedded@ozlabs.org
> > > https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> > >
> > >
> >
>=20
>=20
^ permalink raw reply
* Mem location of TODC NVRAM on 8265 board (sbc82xx.h)
From: Paul Gortmaker @ 2005-04-01 16:21 UTC (permalink / raw)
To: linuxppc-embedded
Hi folks,
I was wondering if anyone can explain to me why the location of the TODC
for this platform (sbc82xx.[ch]) was changed from 0x80000000 to
0xd0000000. It was originally 0x800... when it was merged in at 2.6.7 and
then it was changed to 0xd00... in 2.6.8 I believe. The manual for this
board (Wind River) states that it is at the former 0x800...
I used the kernel's BR11 and OR11 values (in sbc82xx.c) and fed them to
U-Boot (since it doesn't seem to set these) and I could display the clock
with U-Boot (BR11 is f0010158, OR11 is f001015c)
Here is an example of using U-boot to load BR11/OR11 with the values in
the kernel and displaying the RTC clock values.
------------------
=> md f0010158 2
f0010158: 00000000 fb9fe7dd ........
=> mm f0010158
f0010158: 00000000 ? 80000801
f001015c: fb9fe7dd ? ffff0836
f0010160: ffff0836 ? => <INTERRUPT>
=> md.b 80001ff0 10
80001ff0: 00 00 00 00 00 00 00 00 00 18 27 20 85 07 03 56
=> md.b 80001ff0 10
80001ff0: 00 00 00 00 00 00 00 00 00 26 27 20 85 07 03 56
=> md.b 80001ff0 10
80001ff0: 00 00 00 00 00 00 00 00 00 33 27 20 85 07 03 56
=>
------------------
The seconds have gone from 18 to 26 and to 33. But it seems that with
2.6.10, the values in /proc/driver/rtc are changing (even though it is a
bit kooky and displaying signed values), so I'm assuming that 0xd0000000
is somehow working. I'm pretty new to PPC, so I don't know the
intricacies of tweaking BR11/OR11 and how that changes things.
Paul.
__________________________________
Do you Yahoo!?
Yahoo! Personals - Better first dates. More second dates.
http://personals.yahoo.com
^ permalink raw reply
* [PATCH 1/1] Change MPC52xx-fec platform bus / ppc_sys model
From: Andrey Volkov @ 2005-04-01 20:02 UTC (permalink / raw)
To: Sylvain Munaut; +Cc: ML linuxppc-embedded
In-Reply-To: <4246B8E6.4060401@varma-el.com>
[-- Attachment #1: Type: text/plain, Size: 83 bytes --]
Hi Sylvain
Comments/Commit?
Signed-off-by: Andrey Volkov <avolkov@varma-el.com>
[-- Attachment #2: fec.diff --]
[-- Type: text/plain, Size: 10134 bytes --]
===================================================================
ChangeSet@1.2297, 2005-04-01 23:50:51+04:00, avolkov@varma-el.com
Converted from OCP to Platform usage
fec.c | 162 +++++++++++++++++++++++++++++++++---------------------------------
fec.h | 2
2 files changed, 84 insertions(+), 80 deletions(-)
diff -Nru a/drivers/net/fec_mpc52xx/fec.c b/drivers/net/fec_mpc52xx/fec.c
--- a/drivers/net/fec_mpc52xx/fec.c 2005-04-01 23:53:43 +04:00
+++ b/drivers/net/fec_mpc52xx/fec.c 2005-04-01 23:53:43 +04:00
@@ -29,7 +29,6 @@
#include <asm/delay.h>
#include <asm/ppcboot.h>
#include <asm/mpc52xx.h>
-#include <asm/ocp.h>
#include <syslib/bestcomm/bestcomm.h>
#include <syslib/bestcomm/fec.h>
@@ -37,6 +36,8 @@
#include "fec_phy.h"
#include "fec.h"
+#define DRIVER_NAME "mpc52xx-fec"
+
static irqreturn_t fec_interrupt(int, void *, struct pt_regs *);
static irqreturn_t fec_rx_interrupt(int, void *, struct pt_regs *);
static irqreturn_t fec_tx_interrupt(int, void *, struct pt_regs *);
@@ -109,7 +110,7 @@
udelay(1);
}
if (i == FEC_RESET_DELAY)
- printk (KERN_ERR "FEC Reset timeout!\n");
+ printk (KERN_ERR DRIVER_NAME ": FEC Reset timeout!\n");
/* Set station address. */
fec_set_paddr(dev, dev->dev_addr);
@@ -488,7 +489,7 @@
return 0;
}
-__setup("mpc52xx_mac=", mpc52xx_fec_mac_setup);
+__setup("mpc52xx-mac=", mpc52xx_fec_mac_setup);
static void fec_hw_init(struct net_device *dev)
{
@@ -547,52 +548,62 @@
/* ======================================================================== */
-/* OCP Driver */
+/* Platform Driver */
/* ======================================================================== */
static int __devinit
-mpc52xx_fec_probe(struct ocp_device *ocp)
+mpc52xx_fec_probe(struct device *dev)
{
int ret;
- struct net_device *dev;
+ struct platform_device *pdev = to_platform_device(dev);
+ struct net_device *ndev;
struct fec_priv *priv = NULL;
+ struct resource *mem;
/* Reserve FEC control zone */
- if (!request_mem_region(ocp->def->paddr, sizeof(struct mpc52xx_fec),
- "mpc52xx_fec"))
+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if ((mem->end - mem->start + 1) != sizeof(struct mpc52xx_fec)) {
+ printk(KERN_ERR DRIVER_NAME
+ " - invalid resource size (%lx != %x), check mpc52xx_devices.c\n",
+ mem->end - mem->start + 1, sizeof(struct mpc52xx_fec));
+ return -EINVAL;
+ }
+
+ if (!request_mem_region(mem->start, sizeof(struct mpc52xx_fec),
+ DRIVER_NAME))
return -EBUSY;
- /* Get the ether dev & it's private zone */
- dev = alloc_etherdev(sizeof(struct fec_priv));
- if (!dev) {
+ /* Get the ether ndev & it's private zone */
+ ndev = alloc_etherdev(sizeof(struct fec_priv));
+ if (!ndev) {
ret = -ENOMEM;
goto probe_error;
}
- priv = (struct fec_priv *)dev->priv;
+ priv = (struct fec_priv *)ndev->priv;
- /* Init ether dev with what we have */
- dev->open = fec_open;
- dev->stop = fec_close;
- dev->hard_start_xmit = fec_hard_start_xmit;
- dev->do_ioctl = fec_ioctl;
- dev->get_stats = fec_get_stats;
- dev->set_mac_address = fec_set_mac_address;
- dev->set_multicast_list = fec_set_multicast_list;
- dev->tx_timeout = fec_tx_timeout;
- dev->watchdog_timeo = FEC_WATCHDOG_TIMEOUT;
- dev->flags &= ~IFF_RUNNING;
- dev->base_addr = ocp->def->paddr;
-
- priv->rx_fifo = dev->base_addr + FIELD_OFFSET(mpc52xx_fec,rfifo_data);
- priv->tx_fifo = dev->base_addr + FIELD_OFFSET(mpc52xx_fec,tfifo_data);
- priv->t_irq = priv->r_irq = dev->irq = -1; /* IRQ are free for now */
+ /* Init ether ndev with what we have */
+ ndev->open = fec_open;
+ ndev->stop = fec_close;
+ ndev->hard_start_xmit = fec_hard_start_xmit;
+ ndev->do_ioctl = fec_ioctl;
+ ndev->get_stats = fec_get_stats;
+ ndev->set_mac_address = fec_set_mac_address;
+ ndev->set_multicast_list = fec_set_multicast_list;
+ ndev->tx_timeout = fec_tx_timeout;
+ ndev->watchdog_timeo = FEC_WATCHDOG_TIMEOUT;
+ ndev->flags &= ~IFF_RUNNING;
+ ndev->base_addr = mem->start;
+
+ priv->rx_fifo = ndev->base_addr + FIELD_OFFSET(mpc52xx_fec,rfifo_data);
+ priv->tx_fifo = ndev->base_addr + FIELD_OFFSET(mpc52xx_fec,tfifo_data);
+ priv->t_irq = priv->r_irq = ndev->irq = -1; /* IRQ are free for now */
spin_lock_init(&priv->lock);
/* ioremap the zones */
priv->fec = (struct mpc52xx_fec *)
- ioremap(ocp->def->paddr, sizeof(struct mpc52xx_fec));
+ ioremap(mem->start, sizeof(struct mpc52xx_fec));
if (!priv->fec) {
ret = -ENOMEM;
@@ -618,20 +629,20 @@
/* Get the IRQ we need one by one */
/* Control */
- dev->irq = ocp->def->irq;
- if (request_irq(dev->irq, &fec_interrupt, SA_INTERRUPT,
- "mpc52xx_fec_ctrl", dev)) {
- printk(KERN_ERR "mpc52xx_fec: ctrl interrupt request failed\n");
+ ndev->irq = platform_get_irq(pdev, 0);
+ if (request_irq(ndev->irq, &fec_interrupt, SA_INTERRUPT,
+ DRIVER_NAME "_ctrl", ndev)) {
+ printk(KERN_ERR DRIVER_NAME ": ctrl interrupt request failed\n");
ret = -EBUSY;
- dev->irq = -1; /* Don't try to free it */
+ ndev->irq = -1; /* Don't try to free it */
goto probe_error;
}
/* RX */
priv->r_irq = sdma_irq(priv->rx_sdma);
if (request_irq(priv->r_irq, &fec_rx_interrupt, SA_INTERRUPT,
- "mpc52xx_fec_rx", dev)) {
- printk(KERN_ERR "mpc52xx_fec: rx interrupt request failed\n");
+ DRIVER_NAME "_rx", ndev)) {
+ printk(KERN_ERR DRIVER_NAME ": rx interrupt request failed\n");
ret = -EBUSY;
priv->r_irq = -1; /* Don't try to free it */
goto probe_error;
@@ -640,8 +651,8 @@
/* TX */
priv->t_irq = sdma_irq(priv->tx_sdma);
if (request_irq(priv->t_irq, &fec_tx_interrupt, SA_INTERRUPT,
- "mpc52xx_fec_tx", dev)) {
- printk(KERN_ERR "mpc52xx_fec: tx interrupt request failed\n");
+ DRIVER_NAME "_tx", ndev)) {
+ printk(KERN_ERR DRIVER_NAME ": tx interrupt request failed\n");
ret = -EBUSY;
priv->t_irq = -1; /* Don't try to free it */
goto probe_error;
@@ -649,23 +660,23 @@
/* MAC address init */
if (memcmp(mpc52xx_fec_mac_addr, null_mac, 6) != 0)
- memcpy(dev->dev_addr, mpc52xx_fec_mac_addr, 6);
+ memcpy(ndev->dev_addr, mpc52xx_fec_mac_addr, 6);
else
- fec_get_paddr(dev, dev->dev_addr);
+ fec_get_paddr(ndev, ndev->dev_addr);
/* Hardware init */
- fec_hw_init(dev);
+ fec_hw_init(ndev);
/* Register the new network device */
- ret = register_netdev(dev);
+ ret = register_netdev(ndev);
if(ret < 0)
goto probe_error;
/* MII init : After register ???? */
- fec_mii_init(dev);
+ fec_mii_init(ndev);
/* We're done ! */
- ocp_set_drvdata(ocp, dev);
+ dev_set_drvdata(dev, ndev);
return 0;
@@ -673,60 +684,54 @@
/* Error handling - free everything that might be allocated */
probe_error:
- if (dev) {
+ if (ndev) {
if (priv->rx_sdma) sdma_free(priv->rx_sdma);
if (priv->tx_sdma) sdma_free(priv->tx_sdma);
- if (dev->irq >= 0) free_irq(dev->irq, dev);
- if (priv->r_irq >= 0) free_irq(priv->r_irq, dev);
- if (priv->t_irq >= 0) free_irq(priv->t_irq, dev);
+ if (ndev->irq >= 0) free_irq(ndev->irq, ndev);
+ if (priv->r_irq >= 0) free_irq(priv->r_irq, ndev);
+ if (priv->t_irq >= 0) free_irq(priv->t_irq, ndev);
if (priv->fec) iounmap(priv->fec);
- free_netdev(dev);
+ free_netdev(ndev);
}
- release_mem_region(ocp->def->paddr, sizeof(struct mpc52xx_fec));
+ release_mem_region(mem->start, sizeof(struct mpc52xx_fec));
return ret;
}
-static void
-mpc52xx_fec_remove(struct ocp_device *ocp)
+static int
+mpc52xx_fec_remove(struct device *dev)
{
- struct net_device *dev;
+ struct net_device *ndev;
struct fec_priv *priv;
- dev = (struct net_device *) ocp_get_drvdata(ocp);
- if (!dev)
- return;
- priv = (struct fec_priv *) dev->priv;
-
- unregister_netdev(dev);
-
- free_irq(dev->irq, dev);
- free_irq(priv->r_irq, dev);
- free_irq(priv->t_irq, dev);
+ ndev = (struct net_device *) dev_get_drvdata(dev);
+ if (!ndev)
+ return 0;
+ priv = (struct fec_priv *) ndev->priv;
+
+ unregister_netdev(ndev);
+
+ free_irq(ndev->irq, ndev);
+ free_irq(priv->r_irq, ndev);
+ free_irq(priv->t_irq, ndev);
iounmap(priv->fec);
- release_mem_region(dev->base_addr, sizeof(struct mpc52xx_fec));
+ release_mem_region(ndev->base_addr, sizeof(struct mpc52xx_fec));
- free_netdev(dev);
+ free_netdev(ndev);
- ocp_set_drvdata(ocp, NULL);
+ dev_set_drvdata(dev, NULL);
+ return 0;
}
-static struct ocp_device_id mpc52xx_fec_ids[] __devinitdata = {
- { .vendor = OCP_VENDOR_FREESCALE, .function = OCP_FUNC_FEC_MPC52xx },
- { .vendor = OCP_VENDOR_INVALID /* Terminating entry */ }
-};
-
-MODULE_DEVICE_TABLE(ocp, mpc52xx_fec_ids);
-
-static struct ocp_driver mpc52xx_fec_ocp_driver = {
- .name = "mpc52xx_fec",
- .id_table = mpc52xx_fec_ids,
+static struct device_driver mpc52xx_fec_driver = {
+ .name = DRIVER_NAME,
+ .bus = &platform_bus_type,
.probe = mpc52xx_fec_probe,
.remove = mpc52xx_fec_remove,
#ifdef CONFIG_PM
@@ -735,7 +740,6 @@
#endif
};
-
/* ======================================================================== */
/* Module */
/* ======================================================================== */
@@ -743,13 +747,13 @@
static int __init
mpc52xx_fec_init(void)
{
- return ocp_register_driver(&mpc52xx_fec_ocp_driver);
+ return driver_register(&mpc52xx_fec_driver);
}
static void __exit
mpc52xx_fec_exit(void)
{
- ocp_unregister_driver(&mpc52xx_fec_ocp_driver);
+ driver_unregister(&mpc52xx_fec_driver);
}
diff -Nru a/drivers/net/fec_mpc52xx/fec.h b/drivers/net/fec_mpc52xx/fec.h
--- a/drivers/net/fec_mpc52xx/fec.h 2005-04-01 23:53:43 +04:00
+++ b/drivers/net/fec_mpc52xx/fec.h 2005-04-01 23:53:43 +04:00
@@ -229,7 +229,7 @@
u32 r_fdxfc; /* FEC + 0x2DC */
u32 ieee_r_octets_ok; /* FEC + 0x2E0 */
- u32 reserved10[6]; /* FEC + 0x2E4-2FC */
+ u32 reserved10[7]; /* FEC + 0x2E4-2FC */
u32 reserved11[64]; /* FEC + 0x300-3FF */
};
^ permalink raw reply
* [PATCH] ppc32: rename head_e500.S to head_fsl_booke.S
From: Kumar Gala @ 2005-04-01 18:06 UTC (permalink / raw)
To: Andrew Morton; +Cc: linux-kernel, linuxppc-embedded
Andrew,
Renamed head_e500.S to head_fsl_booke.S since the file is applicable to
other PowerPC Book-E implementations from Freescale, not just the e500.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
---
diff -Nru a/arch/ppc/Makefile b/arch/ppc/Makefile
--- a/arch/ppc/Makefile 2005-04-01 12:01:01 -06:00
+++ b/arch/ppc/Makefile 2005-04-01 12:01:01 -06:00
@@ -49,7 +49,7 @@
head-$(CONFIG_8xx) := arch/ppc/kernel/head_8xx.o
head-$(CONFIG_4xx) := arch/ppc/kernel/head_4xx.o
head-$(CONFIG_44x) := arch/ppc/kernel/head_44x.o
-head-$(CONFIG_E500) := arch/ppc/kernel/head_e500.o
+head-$(CONFIG_FSL_BOOKE) := arch/ppc/kernel/head_fsl_booke.o
head-$(CONFIG_6xx) += arch/ppc/kernel/idle_6xx.o
head-$(CONFIG_POWER4) += arch/ppc/kernel/idle_power4.o
diff -Nru a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
--- a/arch/ppc/kernel/Makefile 2005-04-01 12:01:01 -06:00
+++ b/arch/ppc/kernel/Makefile 2005-04-01 12:01:01 -06:00
@@ -5,7 +5,7 @@
extra-$(CONFIG_PPC_STD_MMU) := head.o
extra-$(CONFIG_40x) := head_4xx.o
extra-$(CONFIG_44x) := head_44x.o
-extra-$(CONFIG_E500) := head_e500.o
+extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o
extra-$(CONFIG_8xx) := head_8xx.o
extra-$(CONFIG_6xx) += idle_6xx.o
extra-$(CONFIG_POWER4) += idle_power4.o
diff -Nru a/arch/ppc/kernel/head_e500.S b/arch/ppc/kernel/head_e500.S
--- a/arch/ppc/kernel/head_e500.S 2005-04-01 12:01:01 -06:00
+++ /dev/null Wed Dec 31 16:00:00 196900
@@ -1,952 +0,0 @@
-/*
- * arch/ppc/kernel/head_e500.S
- *
- * Kernel execution entry point code.
- *
- * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
- * Initial PowerPC version.
- * Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu>
- * Rewritten for PReP
- * Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
- * Low-level exception handers, MMU support, and rewrite.
- * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
- * PowerPC 8xx modifications.
- * Copyright (c) 1998-1999 TiVo, Inc.
- * PowerPC 403GCX modifications.
- * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
- * PowerPC 403GCX/405GP modifications.
- * Copyright 2000 MontaVista Software Inc.
- * PPC405 modifications
- * PowerPC 403GCX/405GP modifications.
- * Author: MontaVista Software, Inc.
- * frank_rowand@mvista.com or source@mvista.com
- * debbie_chu@mvista.com
- * Copyright 2002-2004 MontaVista Software, Inc.
- * PowerPC 44x support, Matt Porter <mporter@kernel.crashing.org>
- * Copyright 2004 Freescale Semiconductor, Inc
- * PowerPC e500 modifications, Kumar Gala <kumar.gala@freescale.com>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/config.h>
-#include <linux/threads.h>
-#include <asm/processor.h>
-#include <asm/page.h>
-#include <asm/mmu.h>
-#include <asm/pgtable.h>
-#include <asm/cputable.h>
-#include <asm/thread_info.h>
-#include <asm/ppc_asm.h>
-#include <asm/offsets.h>
-#include "head_booke.h"
-
-/* As with the other PowerPC ports, it is expected that when code
- * execution begins here, the following registers contain valid, yet
- * optional, information:
- *
- * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
- * r4 - Starting address of the init RAM disk
- * r5 - Ending address of the init RAM disk
- * r6 - Start of kernel command line string (e.g. "mem=128")
- * r7 - End of kernel command line string
- *
- */
- .text
-_GLOBAL(_stext)
-_GLOBAL(_start)
- /*
- * Reserve a word at a fixed location to store the address
- * of abatron_pteptrs
- */
- nop
-/*
- * Save parameters we are passed
- */
- mr r31,r3
- mr r30,r4
- mr r29,r5
- mr r28,r6
- mr r27,r7
- li r24,0 /* CPU number */
-
-/* We try to not make any assumptions about how the boot loader
- * setup or used the TLBs. We invalidate all mappings from the
- * boot loader and load a single entry in TLB1[0] to map the
- * first 16M of kernel memory. Any boot info passed from the
- * bootloader needs to live in this first 16M.
- *
- * Requirement on bootloader:
- * - The page we're executing in needs to reside in TLB1 and
- * have IPROT=1. If not an invalidate broadcast could
- * evict the entry we're currently executing in.
- *
- * r3 = Index of TLB1 were executing in
- * r4 = Current MSR[IS]
- * r5 = Index of TLB1 temp mapping
- *
- * Later in mapin_ram we will correctly map lowmem, and resize TLB1[0]
- * if needed
- */
-
-/* 1. Find the index of the entry we're executing in */
- bl invstr /* Find our address */
-invstr: mflr r6 /* Make it accessible */
- mfmsr r7
- rlwinm r4,r7,27,31,31 /* extract MSR[IS] */
- mfspr r7, SPRN_PID0
- slwi r7,r7,16
- or r7,r7,r4
- mtspr SPRN_MAS6,r7
- tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */
- mfspr r7,SPRN_MAS1
- andis. r7,r7,MAS1_VALID@h
- bne match_TLB
- mfspr r7,SPRN_PID1
- slwi r7,r7,16
- or r7,r7,r4
- mtspr SPRN_MAS6,r7
- tlbsx 0,r6 /* search MSR[IS], SPID=PID1 */
- mfspr r7,SPRN_MAS1
- andis. r7,r7,MAS1_VALID@h
- bne match_TLB
- mfspr r7, SPRN_PID2
- slwi r7,r7,16
- or r7,r7,r4
- mtspr SPRN_MAS6,r7
- tlbsx 0,r6 /* Fall through, we had to match */
-match_TLB:
- mfspr r7,SPRN_MAS0
- rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */
-
- mfspr r7,SPRN_MAS1 /* Insure IPROT set */
- oris r7,r7,MAS1_IPROT@h
- mtspr SPRN_MAS1,r7
- tlbwe
-
-/* 2. Invalidate all entries except the entry we're executing in */
- mfspr r9,SPRN_TLB1CFG
- andi. r9,r9,0xfff
- li r6,0 /* Set Entry counter to 0 */
-1: lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
- rlwimi r7,r6,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r6) */
- mtspr SPRN_MAS0,r7
- tlbre
- mfspr r7,SPRN_MAS1
- rlwinm r7,r7,0,2,31 /* Clear MAS1 Valid and IPROT */
- cmpw r3,r6
- beq skpinv /* Dont update the current execution TLB */
- mtspr SPRN_MAS1,r7
- tlbwe
- isync
-skpinv: addi r6,r6,1 /* Increment */
- cmpw r6,r9 /* Are we done? */
- bne 1b /* If not, repeat */
-
- /* Invalidate TLB0 */
- li r6,0x04
- tlbivax 0,r6
-#ifdef CONFIG_SMP
- tlbsync
-#endif
- /* Invalidate TLB1 */
- li r6,0x0c
- tlbivax 0,r6
-#ifdef CONFIG_SMP
- tlbsync
-#endif
- msync
-
-/* 3. Setup a temp mapping and jump to it */
- andi. r5, r3, 0x1 /* Find an entry not used and is non-zero */
- addi r5, r5, 0x1
- lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
- rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */
- mtspr SPRN_MAS0,r7
- tlbre
-
- /* Just modify the entry ID and EPN for the temp mapping */
- lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
- rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
- mtspr SPRN_MAS0,r7
- xori r6,r4,1 /* Setup TMP mapping in the other Address space */
- slwi r6,r6,12
- oris r6,r6,(MAS1_VALID|MAS1_IPROT)@h
- ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l
- mtspr SPRN_MAS1,r6
- mfspr r6,SPRN_MAS2
- li r7,0 /* temp EPN = 0 */
- rlwimi r7,r6,0,20,31
- mtspr SPRN_MAS2,r7
- tlbwe
-
- xori r6,r4,1
- slwi r6,r6,5 /* setup new context with other address space */
- bl 1f /* Find our address */
-1: mflr r9
- rlwimi r7,r9,0,20,31
- addi r7,r7,24
- mtspr SPRN_SRR0,r7
- mtspr SPRN_SRR1,r6
- rfi
-
-/* 4. Clear out PIDs & Search info */
- li r6,0
- mtspr SPRN_PID0,r6
- mtspr SPRN_PID1,r6
- mtspr SPRN_PID2,r6
- mtspr SPRN_MAS6,r6
-
-/* 5. Invalidate mapping we started in */
- lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
- rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */
- mtspr SPRN_MAS0,r7
- tlbre
- li r6,0
- mtspr SPRN_MAS1,r6
- tlbwe
- /* Invalidate TLB1 */
- li r9,0x0c
- tlbivax 0,r9
-#ifdef CONFIG_SMP
- tlbsync
-#endif
- msync
-
-/* 6. Setup KERNELBASE mapping in TLB1[0] */
- lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
- mtspr SPRN_MAS0,r6
- lis r6,(MAS1_VALID|MAS1_IPROT)@h
- ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_16M))@l
- mtspr SPRN_MAS1,r6
- li r7,0
- lis r6,KERNELBASE@h
- ori r6,r6,KERNELBASE@l
- rlwimi r6,r7,0,20,31
- mtspr SPRN_MAS2,r6
- li r7,(MAS3_SX|MAS3_SW|MAS3_SR)
- mtspr SPRN_MAS3,r7
- tlbwe
-
-/* 7. Jump to KERNELBASE mapping */
- li r7,0
- bl 1f /* Find our address */
-1: mflr r9
- rlwimi r6,r9,0,20,31
- addi r6,r6,24
- mtspr SPRN_SRR0,r6
- mtspr SPRN_SRR1,r7
- rfi /* start execution out of TLB1[0] entry */
-
-/* 8. Clear out the temp mapping */
- lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
- rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
- mtspr SPRN_MAS0,r7
- tlbre
- mtspr SPRN_MAS1,r8
- tlbwe
- /* Invalidate TLB1 */
- li r9,0x0c
- tlbivax 0,r9
-#ifdef CONFIG_SMP
- tlbsync
-#endif
- msync
-
- /* Establish the interrupt vector offsets */
- SET_IVOR(0, CriticalInput);
- SET_IVOR(1, MachineCheck);
- SET_IVOR(2, DataStorage);
- SET_IVOR(3, InstructionStorage);
- SET_IVOR(4, ExternalInput);
- SET_IVOR(5, Alignment);
- SET_IVOR(6, Program);
- SET_IVOR(7, FloatingPointUnavailable);
- SET_IVOR(8, SystemCall);
- SET_IVOR(9, AuxillaryProcessorUnavailable);
- SET_IVOR(10, Decrementer);
- SET_IVOR(11, FixedIntervalTimer);
- SET_IVOR(12, WatchdogTimer);
- SET_IVOR(13, DataTLBError);
- SET_IVOR(14, InstructionTLBError);
- SET_IVOR(15, Debug);
- SET_IVOR(32, SPEUnavailable);
- SET_IVOR(33, SPEFloatingPointData);
- SET_IVOR(34, SPEFloatingPointRound);
- SET_IVOR(35, PerformanceMonitor);
-
- /* Establish the interrupt vector base */
- lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
- mtspr SPRN_IVPR,r4
-
- /* Setup the defaults for TLB entries */
- li r2,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l
- mtspr SPRN_MAS4, r2
-
-#if 0
- /* Enable DOZE */
- mfspr r2,SPRN_HID0
- oris r2,r2,HID0_DOZE@h
- mtspr SPRN_HID0, r2
-#endif
-
- /*
- * This is where the main kernel code starts.
- */
-
- /* ptr to current */
- lis r2,init_task@h
- ori r2,r2,init_task@l
-
- /* ptr to current thread */
- addi r4,r2,THREAD /* init task's THREAD */
- mtspr SPRN_SPRG3,r4
-
- /* stack */
- lis r1,init_thread_union@h
- ori r1,r1,init_thread_union@l
- li r0,0
- stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
-
- bl early_init
-
- mfspr r3,SPRN_TLB1CFG
- andi. r3,r3,0xfff
- lis r4,num_tlbcam_entries@ha
- stw r3,num_tlbcam_entries@l(r4)
-/*
- * Decide what sort of machine this is and initialize the MMU.
- */
- mr r3,r31
- mr r4,r30
- mr r5,r29
- mr r6,r28
- mr r7,r27
- bl machine_init
- bl MMU_init
-
- /* Setup PTE pointers for the Abatron bdiGDB */
- lis r6, swapper_pg_dir@h
- ori r6, r6, swapper_pg_dir@l
- lis r5, abatron_pteptrs@h
- ori r5, r5, abatron_pteptrs@l
- lis r4, KERNELBASE@h
- ori r4, r4, KERNELBASE@l
- stw r5, 0(r4) /* Save abatron_pteptrs at a fixed location */
- stw r6, 0(r5)
-
- /* Let's move on */
- lis r4,start_kernel@h
- ori r4,r4,start_kernel@l
- lis r3,MSR_KERNEL@h
- ori r3,r3,MSR_KERNEL@l
- mtspr SPRN_SRR0,r4
- mtspr SPRN_SRR1,r3
- rfi /* change context and jump to start_kernel */
-
-/*
- * Interrupt vector entry code
- *
- * The Book E MMUs are always on so we don't need to handle
- * interrupts in real mode as with previous PPC processors. In
- * this case we handle interrupts in the kernel virtual address
- * space.
- *
- * Interrupt vectors are dynamically placed relative to the
- * interrupt prefix as determined by the address of interrupt_base.
- * The interrupt vectors offsets are programmed using the labels
- * for each interrupt vector entry.
- *
- * Interrupt vectors must be aligned on a 16 byte boundary.
- * We align on a 32 byte cache line boundary for good measure.
- */
-
-interrupt_base:
- /* Critical Input Interrupt */
- CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException)
-
- /* Machine Check Interrupt */
- MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
-
- /* Data Storage Interrupt */
- START_EXCEPTION(DataStorage)
- mtspr SPRN_SPRG0, r10 /* Save some working registers */
- mtspr SPRN_SPRG1, r11
- mtspr SPRN_SPRG4W, r12
- mtspr SPRN_SPRG5W, r13
- mfcr r11
- mtspr SPRN_SPRG7W, r11
-
- /*
- * Check if it was a store fault, if not then bail
- * because a user tried to access a kernel or
- * read-protected page. Otherwise, get the
- * offending address and handle it.
- */
- mfspr r10, SPRN_ESR
- andis. r10, r10, ESR_ST@h
- beq 2f
-
- mfspr r10, SPRN_DEAR /* Get faulting address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- lis r11, TASK_SIZE@h
- ori r11, r11, TASK_SIZE@l
- cmplw 0, r10, r11
- bge 2f
-
- /* Get the PGD for the current thread */
-3:
- mfspr r11,SPRN_SPRG3
- lwz r11,PGDIR(r11)
-4:
- rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */
- lwz r11, 0(r11) /* Get L1 entry */
- rlwinm. r12, r11, 0, 0, 19 /* Extract L2 (pte) base address */
- beq 2f /* Bail if no table */
-
- rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */
- lwz r11, 0(r12) /* Get Linux PTE */
-
- /* Are _PAGE_USER & _PAGE_RW set & _PAGE_HWWRITE not? */
- andi. r13, r11, _PAGE_RW|_PAGE_USER|_PAGE_HWWRITE
- cmpwi 0, r13, _PAGE_RW|_PAGE_USER
- bne 2f /* Bail if not */
-
- /* Update 'changed'. */
- ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
- stw r11, 0(r12) /* Update Linux page table */
-
- /* MAS2 not updated as the entry does exist in the tlb, this
- fault taken to detect state transition (eg: COW -> DIRTY)
- */
- lis r12, MAS3_RPN@h
- ori r12, r12, _PAGE_HWEXEC | MAS3_RPN@l
- and r11, r11, r12
- rlwimi r11, r11, 31, 27, 27 /* SX <- _PAGE_HWEXEC */
- ori r11, r11, (MAS3_UW|MAS3_SW|MAS3_UR|MAS3_SR)@l /* set static perms */
-
- /* update search PID in MAS6, AS = 0 */
- mfspr r12, SPRN_PID0
- slwi r12, r12, 16
- mtspr SPRN_MAS6, r12
-
- /* find the TLB index that caused the fault. It has to be here. */
- tlbsx 0, r10
-
- mtspr SPRN_MAS3,r11
- tlbwe
-
- /* Done...restore registers and get out of here. */
- mfspr r11, SPRN_SPRG7R
- mtcr r11
- mfspr r13, SPRN_SPRG5R
- mfspr r12, SPRN_SPRG4R
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- rfi /* Force context change */
-
-2:
- /*
- * The bailout. Restore registers to pre-exception conditions
- * and call the heavyweights to help us out.
- */
- mfspr r11, SPRN_SPRG7R
- mtcr r11
- mfspr r13, SPRN_SPRG5R
- mfspr r12, SPRN_SPRG4R
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- b data_access
-
- /* Instruction Storage Interrupt */
- INSTRUCTION_STORAGE_EXCEPTION
-
- /* External Input Interrupt */
- EXCEPTION(0x0500, ExternalInput, do_IRQ, EXC_XFER_LITE)
-
- /* Alignment Interrupt */
- ALIGNMENT_EXCEPTION
-
- /* Program Interrupt */
- PROGRAM_EXCEPTION
-
- /* Floating Point Unavailable Interrupt */
- EXCEPTION(0x0800, FloatingPointUnavailable, UnknownException, EXC_XFER_EE)
-
- /* System Call Interrupt */
- START_EXCEPTION(SystemCall)
- NORMAL_EXCEPTION_PROLOG
- EXC_XFER_EE_LITE(0x0c00, DoSyscall)
-
- /* Auxillary Processor Unavailable Interrupt */
- EXCEPTION(0x2900, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE)
-
- /* Decrementer Interrupt */
- DECREMENTER_EXCEPTION
-
- /* Fixed Internal Timer Interrupt */
- /* TODO: Add FIT support */
- EXCEPTION(0x3100, FixedIntervalTimer, UnknownException, EXC_XFER_EE)
-
- /* Watchdog Timer Interrupt */
- /* TODO: Add watchdog support */
- CRITICAL_EXCEPTION(0x3200, WatchdogTimer, UnknownException)
-
- /* Data TLB Error Interrupt */
- START_EXCEPTION(DataTLBError)
- mtspr SPRN_SPRG0, r10 /* Save some working registers */
- mtspr SPRN_SPRG1, r11
- mtspr SPRN_SPRG4W, r12
- mtspr SPRN_SPRG5W, r13
- mfcr r11
- mtspr SPRN_SPRG7W, r11
- mfspr r10, SPRN_DEAR /* Get faulting address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- lis r11, TASK_SIZE@h
- ori r11, r11, TASK_SIZE@l
- cmplw 5, r10, r11
- blt 5, 3f
- lis r11, swapper_pg_dir@h
- ori r11, r11, swapper_pg_dir@l
-
- mfspr r12,SPRN_MAS1 /* Set TID to 0 */
- rlwinm r12,r12,0,16,1
- mtspr SPRN_MAS1,r12
-
- b 4f
-
- /* Get the PGD for the current thread */
-3:
- mfspr r11,SPRN_SPRG3
- lwz r11,PGDIR(r11)
-
-4:
- rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */
- lwz r11, 0(r11) /* Get L1 entry */
- rlwinm. r12, r11, 0, 0, 19 /* Extract L2 (pte) base address */
- beq 2f /* Bail if no table */
-
- rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */
- lwz r11, 0(r12) /* Get Linux PTE */
- andi. r13, r11, _PAGE_PRESENT
- beq 2f
-
- ori r11, r11, _PAGE_ACCESSED
- stw r11, 0(r12)
-
- /* Jump to common tlb load */
- b finish_tlb_load
-2:
- /* The bailout. Restore registers to pre-exception conditions
- * and call the heavyweights to help us out.
- */
- mfspr r11, SPRN_SPRG7R
- mtcr r11
- mfspr r13, SPRN_SPRG5R
- mfspr r12, SPRN_SPRG4R
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- b data_access
-
- /* Instruction TLB Error Interrupt */
- /*
- * Nearly the same as above, except we get our
- * information from different registers and bailout
- * to a different point.
- */
- START_EXCEPTION(InstructionTLBError)
- mtspr SPRN_SPRG0, r10 /* Save some working registers */
- mtspr SPRN_SPRG1, r11
- mtspr SPRN_SPRG4W, r12
- mtspr SPRN_SPRG5W, r13
- mfcr r11
- mtspr SPRN_SPRG7W, r11
- mfspr r10, SPRN_SRR0 /* Get faulting address */
-
- /* If we are faulting a kernel address, we have to use the
- * kernel page tables.
- */
- lis r11, TASK_SIZE@h
- ori r11, r11, TASK_SIZE@l
- cmplw 5, r10, r11
- blt 5, 3f
- lis r11, swapper_pg_dir@h
- ori r11, r11, swapper_pg_dir@l
-
- mfspr r12,SPRN_MAS1 /* Set TID to 0 */
- rlwinm r12,r12,0,16,1
- mtspr SPRN_MAS1,r12
-
- b 4f
-
- /* Get the PGD for the current thread */
-3:
- mfspr r11,SPRN_SPRG3
- lwz r11,PGDIR(r11)
-
-4:
- rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */
- lwz r11, 0(r11) /* Get L1 entry */
- rlwinm. r12, r11, 0, 0, 19 /* Extract L2 (pte) base address */
- beq 2f /* Bail if no table */
-
- rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */
- lwz r11, 0(r12) /* Get Linux PTE */
- andi. r13, r11, _PAGE_PRESENT
- beq 2f
-
- ori r11, r11, _PAGE_ACCESSED
- stw r11, 0(r12)
-
- /* Jump to common TLB load point */
- b finish_tlb_load
-
-2:
- /* The bailout. Restore registers to pre-exception conditions
- * and call the heavyweights to help us out.
- */
- mfspr r11, SPRN_SPRG7R
- mtcr r11
- mfspr r13, SPRN_SPRG5R
- mfspr r12, SPRN_SPRG4R
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- b InstructionStorage
-
-#ifdef CONFIG_SPE
- /* SPE Unavailable */
- START_EXCEPTION(SPEUnavailable)
- NORMAL_EXCEPTION_PROLOG
- bne load_up_spe
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_EE_LITE(0x2010, KernelSPE)
-#else
- EXCEPTION(0x2020, SPEUnavailable, UnknownException, EXC_XFER_EE)
-#endif /* CONFIG_SPE */
-
- /* SPE Floating Point Data */
-#ifdef CONFIG_SPE
- EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE);
-#else
- EXCEPTION(0x2040, SPEFloatingPointData, UnknownException, EXC_XFER_EE)
-#endif /* CONFIG_SPE */
-
- /* SPE Floating Point Round */
- EXCEPTION(0x2050, SPEFloatingPointRound, UnknownException, EXC_XFER_EE)
-
- /* Performance Monitor */
- EXCEPTION(0x2060, PerformanceMonitor, PerformanceMonitorException, EXC_XFER_STD)
-
-
- /* Debug Interrupt */
- DEBUG_EXCEPTION
-
-/*
- * Local functions
- */
- /*
- * Data TLB exceptions will bail out to this point
- * if they can't resolve the lightweight TLB fault.
- */
-data_access:
- NORMAL_EXCEPTION_PROLOG
- mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */
- stw r5,_ESR(r11)
- mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */
- andis. r10,r5,(ESR_ILK|ESR_DLK)@h
- bne 1f
- EXC_XFER_EE_LITE(0x0300, handle_page_fault)
-1:
- addi r3,r1,STACK_FRAME_OVERHEAD
- EXC_XFER_EE_LITE(0x0300, CacheLockingException)
-
-/*
-
- * Both the instruction and data TLB miss get to this
- * point to load the TLB.
- * r10 - EA of fault
- * r11 - TLB (info from Linux PTE)
- * r12, r13 - available to use
- * CR5 - results of addr < TASK_SIZE
- * MAS0, MAS1 - loaded with proper value when we get here
- * MAS2, MAS3 - will need additional info from Linux PTE
- * Upon exit, we reload everything and RFI.
- */
-finish_tlb_load:
- /*
- * We set execute, because we don't have the granularity to
- * properly set this at the page level (Linux problem).
- * Many of these bits are software only. Bits we don't set
- * here we (properly should) assume have the appropriate value.
- */
-
- mfspr r12, SPRN_MAS2
- rlwimi r12, r11, 26, 27, 31 /* extract WIMGE from pte */
- mtspr SPRN_MAS2, r12
-
- bge 5, 1f
-
- /* addr > TASK_SIZE */
- li r10, (MAS3_UX | MAS3_UW | MAS3_UR)
- andi. r13, r11, (_PAGE_USER | _PAGE_HWWRITE | _PAGE_HWEXEC)
- andi. r12, r11, _PAGE_USER /* Test for _PAGE_USER */
- iseleq r12, 0, r10
- and r10, r12, r13
- srwi r12, r10, 1
- or r12, r12, r10 /* Copy user perms into supervisor */
- b 2f
-
- /* addr <= TASK_SIZE */
-1: rlwinm r12, r11, 31, 29, 29 /* Extract _PAGE_HWWRITE into SW */
- ori r12, r12, (MAS3_SX | MAS3_SR)
-
-2: rlwimi r11, r12, 0, 20, 31 /* Extract RPN from PTE and merge with perms */
- mtspr SPRN_MAS3, r11
- tlbwe
-
- /* Done...restore registers and get out of here. */
- mfspr r11, SPRN_SPRG7R
- mtcr r11
- mfspr r13, SPRN_SPRG5R
- mfspr r12, SPRN_SPRG4R
- mfspr r11, SPRN_SPRG1
- mfspr r10, SPRN_SPRG0
- rfi /* Force context change */
-
-#ifdef CONFIG_SPE
-/* Note that the SPE support is closely modeled after the AltiVec
- * support. Changes to one are likely to be applicable to the
- * other! */
-load_up_spe:
-/*
- * Disable SPE for the task which had SPE previously,
- * and save its SPE registers in its thread_struct.
- * Enables SPE for use in the kernel on return.
- * On SMP we know the SPE units are free, since we give it up every
- * switch. -- Kumar
- */
- mfmsr r5
- oris r5,r5,MSR_SPE@h
- mtmsr r5 /* enable use of SPE now */
- isync
-/*
- * For SMP, we don't do lazy SPE switching because it just gets too
- * horrendously complex, especially when a task switches from one CPU
- * to another. Instead we call giveup_spe in switch_to.
- */
-#ifndef CONFIG_SMP
- lis r3,last_task_used_spe@ha
- lwz r4,last_task_used_spe@l(r3)
- cmpi 0,r4,0
- beq 1f
- addi r4,r4,THREAD /* want THREAD of last_task_used_spe */
- SAVE_32EVR(0,r10,r4)
- evxor evr10, evr10, evr10 /* clear out evr10 */
- evmwumiaa evr10, evr10, evr10 /* evr10 <- ACC = 0 * 0 + ACC */
- li r5,THREAD_ACC
- evstddx evr10, r4, r5 /* save off accumulator */
- lwz r5,PT_REGS(r4)
- lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
- lis r10,MSR_SPE@h
- andc r4,r4,r10 /* disable SPE for previous task */
- stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
-1:
-#endif /* CONFIG_SMP */
- /* enable use of SPE after return */
- oris r9,r9,MSR_SPE@h
- mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */
- li r4,1
- li r10,THREAD_ACC
- stw r4,THREAD_USED_SPE(r5)
- evlddx evr4,r10,r5
- evmra evr4,evr4
- REST_32EVR(0,r10,r5)
-#ifndef CONFIG_SMP
- subi r4,r5,THREAD
- stw r4,last_task_used_spe@l(r3)
-#endif /* CONFIG_SMP */
- /* restore registers and return */
-2: REST_4GPRS(3, r11)
- lwz r10,_CCR(r11)
- REST_GPR(1, r11)
- mtcr r10
- lwz r10,_LINK(r11)
- mtlr r10
- REST_GPR(10, r11)
- mtspr SPRN_SRR1,r9
- mtspr SPRN_SRR0,r12
- REST_GPR(9, r11)
- REST_GPR(12, r11)
- lwz r11,GPR11(r11)
- SYNC
- rfi
-
-/*
- * SPE unavailable trap from kernel - print a message, but let
- * the task use SPE in the kernel until it returns to user mode.
- */
-KernelSPE:
- lwz r3,_MSR(r1)
- oris r3,r3,MSR_SPE@h
- stw r3,_MSR(r1) /* enable use of SPE after return */
- lis r3,87f@h
- ori r3,r3,87f@l
- mr r4,r2 /* current */
- lwz r5,_NIP(r1)
- bl printk
- b ret_from_except
-87: .string "SPE used in kernel (task=%p, pc=%x) \n"
- .align 4,0
-
-#endif /* CONFIG_SPE */
-
-/*
- * Global functions
- */
-
-/*
- * extern void loadcam_entry(unsigned int index)
- *
- * Load TLBCAM[index] entry in to the L2 CAM MMU
- */
-_GLOBAL(loadcam_entry)
- lis r4,TLBCAM@ha
- addi r4,r4,TLBCAM@l
- mulli r5,r3,20
- add r3,r5,r4
- lwz r4,0(r3)
- mtspr SPRN_MAS0,r4
- lwz r4,4(r3)
- mtspr SPRN_MAS1,r4
- lwz r4,8(r3)
- mtspr SPRN_MAS2,r4
- lwz r4,12(r3)
- mtspr SPRN_MAS3,r4
- tlbwe
- isync
- blr
-
-/*
- * extern void giveup_altivec(struct task_struct *prev)
- *
- * The e500 core does not have an AltiVec unit.
- */
-_GLOBAL(giveup_altivec)
- blr
-
-#ifdef CONFIG_SPE
-/*
- * extern void giveup_spe(struct task_struct *prev)
- *
- */
-_GLOBAL(giveup_spe)
- mfmsr r5
- oris r5,r5,MSR_SPE@h
- SYNC
- mtmsr r5 /* enable use of SPE now */
- isync
- cmpi 0,r3,0
- beqlr- /* if no previous owner, done */
- addi r3,r3,THREAD /* want THREAD of task */
- lwz r5,PT_REGS(r3)
- cmpi 0,r5,0
- SAVE_32EVR(0, r4, r3)
- evxor evr6, evr6, evr6 /* clear out evr6 */
- evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */
- li r4,THREAD_ACC
- evstddx evr6, r4, r3 /* save off accumulator */
- mfspr r6,SPRN_SPEFSCR
- stw r6,THREAD_SPEFSCR(r3) /* save spefscr register value */
- beq 1f
- lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
- lis r3,MSR_SPE@h
- andc r4,r4,r3 /* disable SPE for previous task */
- stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
-1:
-#ifndef CONFIG_SMP
- li r5,0
- lis r4,last_task_used_spe@ha
- stw r5,last_task_used_spe@l(r4)
-#endif /* CONFIG_SMP */
- blr
-#endif /* CONFIG_SPE */
-
-/*
- * extern void giveup_fpu(struct task_struct *prev)
- *
- * The e500 core does not have an FPU.
- */
-_GLOBAL(giveup_fpu)
- blr
-
-/*
- * extern void abort(void)
- *
- * At present, this routine just applies a system reset.
- */
-_GLOBAL(abort)
- li r13,0
- mtspr SPRN_DBCR0,r13 /* disable all debug events */
- mfmsr r13
- ori r13,r13,MSR_DE@l /* Enable Debug Events */
- mtmsr r13
- mfspr r13,SPRN_DBCR0
- lis r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h
- mtspr SPRN_DBCR0,r13
-
-_GLOBAL(set_context)
-
-#ifdef CONFIG_BDI_SWITCH
- /* Context switch the PTE pointer for the Abatron BDI2000.
- * The PGDIR is the second parameter.
- */
- lis r5, abatron_pteptrs@h
- ori r5, r5, abatron_pteptrs@l
- stw r4, 0x4(r5)
-#endif
- mtspr SPRN_PID,r3
- isync /* Force context change */
- blr
-
-/*
- * We put a few things here that have to be page-aligned. This stuff
- * goes at the beginning of the data segment, which is page-aligned.
- */
- .data
-_GLOBAL(sdata)
-_GLOBAL(empty_zero_page)
- .space 4096
-_GLOBAL(swapper_pg_dir)
- .space 4096
-
-/* Reserved 4k for the critical exception stack & 4k for the machine
- * check stack per CPU for kernel mode exceptions */
- .section .bss
- .align 12
-exception_stack_bottom:
- .space BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS
-_GLOBAL(exception_stack_top)
-
-/*
- * This space gets a copy of optional info passed to us by the bootstrap
- * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
- */
-_GLOBAL(cmd_line)
- .space 512
-
-/*
- * Room for two PTE pointers, usually the kernel and current user pointers
- * to their respective root page table.
- */
-abatron_pteptrs:
- .space 8
-
diff -Nru a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/kernel/head_fsl_booke.S 2005-04-01 12:01:01 -06:00
@@ -0,0 +1,952 @@
+/*
+ * arch/ppc/kernel/head_fsl_booke.S
+ *
+ * Kernel execution entry point code.
+ *
+ * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
+ * Initial PowerPC version.
+ * Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu>
+ * Rewritten for PReP
+ * Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
+ * Low-level exception handers, MMU support, and rewrite.
+ * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
+ * PowerPC 8xx modifications.
+ * Copyright (c) 1998-1999 TiVo, Inc.
+ * PowerPC 403GCX modifications.
+ * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
+ * PowerPC 403GCX/405GP modifications.
+ * Copyright 2000 MontaVista Software Inc.
+ * PPC405 modifications
+ * PowerPC 403GCX/405GP modifications.
+ * Author: MontaVista Software, Inc.
+ * frank_rowand@mvista.com or source@mvista.com
+ * debbie_chu@mvista.com
+ * Copyright 2002-2004 MontaVista Software, Inc.
+ * PowerPC 44x support, Matt Porter <mporter@kernel.crashing.org>
+ * Copyright 2004 Freescale Semiconductor, Inc
+ * PowerPC e500 modifications, Kumar Gala <kumar.gala@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/threads.h>
+#include <asm/processor.h>
+#include <asm/page.h>
+#include <asm/mmu.h>
+#include <asm/pgtable.h>
+#include <asm/cputable.h>
+#include <asm/thread_info.h>
+#include <asm/ppc_asm.h>
+#include <asm/offsets.h>
+#include "head_booke.h"
+
+/* As with the other PowerPC ports, it is expected that when code
+ * execution begins here, the following registers contain valid, yet
+ * optional, information:
+ *
+ * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
+ * r4 - Starting address of the init RAM disk
+ * r5 - Ending address of the init RAM disk
+ * r6 - Start of kernel command line string (e.g. "mem=128")
+ * r7 - End of kernel command line string
+ *
+ */
+ .text
+_GLOBAL(_stext)
+_GLOBAL(_start)
+ /*
+ * Reserve a word at a fixed location to store the address
+ * of abatron_pteptrs
+ */
+ nop
+/*
+ * Save parameters we are passed
+ */
+ mr r31,r3
+ mr r30,r4
+ mr r29,r5
+ mr r28,r6
+ mr r27,r7
+ li r24,0 /* CPU number */
+
+/* We try to not make any assumptions about how the boot loader
+ * setup or used the TLBs. We invalidate all mappings from the
+ * boot loader and load a single entry in TLB1[0] to map the
+ * first 16M of kernel memory. Any boot info passed from the
+ * bootloader needs to live in this first 16M.
+ *
+ * Requirement on bootloader:
+ * - The page we're executing in needs to reside in TLB1 and
+ * have IPROT=1. If not an invalidate broadcast could
+ * evict the entry we're currently executing in.
+ *
+ * r3 = Index of TLB1 were executing in
+ * r4 = Current MSR[IS]
+ * r5 = Index of TLB1 temp mapping
+ *
+ * Later in mapin_ram we will correctly map lowmem, and resize TLB1[0]
+ * if needed
+ */
+
+/* 1. Find the index of the entry we're executing in */
+ bl invstr /* Find our address */
+invstr: mflr r6 /* Make it accessible */
+ mfmsr r7
+ rlwinm r4,r7,27,31,31 /* extract MSR[IS] */
+ mfspr r7, SPRN_PID0
+ slwi r7,r7,16
+ or r7,r7,r4
+ mtspr SPRN_MAS6,r7
+ tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */
+ mfspr r7,SPRN_MAS1
+ andis. r7,r7,MAS1_VALID@h
+ bne match_TLB
+ mfspr r7,SPRN_PID1
+ slwi r7,r7,16
+ or r7,r7,r4
+ mtspr SPRN_MAS6,r7
+ tlbsx 0,r6 /* search MSR[IS], SPID=PID1 */
+ mfspr r7,SPRN_MAS1
+ andis. r7,r7,MAS1_VALID@h
+ bne match_TLB
+ mfspr r7, SPRN_PID2
+ slwi r7,r7,16
+ or r7,r7,r4
+ mtspr SPRN_MAS6,r7
+ tlbsx 0,r6 /* Fall through, we had to match */
+match_TLB:
+ mfspr r7,SPRN_MAS0
+ rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */
+
+ mfspr r7,SPRN_MAS1 /* Insure IPROT set */
+ oris r7,r7,MAS1_IPROT@h
+ mtspr SPRN_MAS1,r7
+ tlbwe
+
+/* 2. Invalidate all entries except the entry we're executing in */
+ mfspr r9,SPRN_TLB1CFG
+ andi. r9,r9,0xfff
+ li r6,0 /* Set Entry counter to 0 */
+1: lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
+ rlwimi r7,r6,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r6) */
+ mtspr SPRN_MAS0,r7
+ tlbre
+ mfspr r7,SPRN_MAS1
+ rlwinm r7,r7,0,2,31 /* Clear MAS1 Valid and IPROT */
+ cmpw r3,r6
+ beq skpinv /* Dont update the current execution TLB */
+ mtspr SPRN_MAS1,r7
+ tlbwe
+ isync
+skpinv: addi r6,r6,1 /* Increment */
+ cmpw r6,r9 /* Are we done? */
+ bne 1b /* If not, repeat */
+
+ /* Invalidate TLB0 */
+ li r6,0x04
+ tlbivax 0,r6
+#ifdef CONFIG_SMP
+ tlbsync
+#endif
+ /* Invalidate TLB1 */
+ li r6,0x0c
+ tlbivax 0,r6
+#ifdef CONFIG_SMP
+ tlbsync
+#endif
+ msync
+
+/* 3. Setup a temp mapping and jump to it */
+ andi. r5, r3, 0x1 /* Find an entry not used and is non-zero */
+ addi r5, r5, 0x1
+ lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
+ rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */
+ mtspr SPRN_MAS0,r7
+ tlbre
+
+ /* Just modify the entry ID and EPN for the temp mapping */
+ lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
+ rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
+ mtspr SPRN_MAS0,r7
+ xori r6,r4,1 /* Setup TMP mapping in the other Address space */
+ slwi r6,r6,12
+ oris r6,r6,(MAS1_VALID|MAS1_IPROT)@h
+ ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l
+ mtspr SPRN_MAS1,r6
+ mfspr r6,SPRN_MAS2
+ li r7,0 /* temp EPN = 0 */
+ rlwimi r7,r6,0,20,31
+ mtspr SPRN_MAS2,r7
+ tlbwe
+
+ xori r6,r4,1
+ slwi r6,r6,5 /* setup new context with other address space */
+ bl 1f /* Find our address */
+1: mflr r9
+ rlwimi r7,r9,0,20,31
+ addi r7,r7,24
+ mtspr SPRN_SRR0,r7
+ mtspr SPRN_SRR1,r6
+ rfi
+
+/* 4. Clear out PIDs & Search info */
+ li r6,0
+ mtspr SPRN_PID0,r6
+ mtspr SPRN_PID1,r6
+ mtspr SPRN_PID2,r6
+ mtspr SPRN_MAS6,r6
+
+/* 5. Invalidate mapping we started in */
+ lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
+ rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */
+ mtspr SPRN_MAS0,r7
+ tlbre
+ li r6,0
+ mtspr SPRN_MAS1,r6
+ tlbwe
+ /* Invalidate TLB1 */
+ li r9,0x0c
+ tlbivax 0,r9
+#ifdef CONFIG_SMP
+ tlbsync
+#endif
+ msync
+
+/* 6. Setup KERNELBASE mapping in TLB1[0] */
+ lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
+ mtspr SPRN_MAS0,r6
+ lis r6,(MAS1_VALID|MAS1_IPROT)@h
+ ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_16M))@l
+ mtspr SPRN_MAS1,r6
+ li r7,0
+ lis r6,KERNELBASE@h
+ ori r6,r6,KERNELBASE@l
+ rlwimi r6,r7,0,20,31
+ mtspr SPRN_MAS2,r6
+ li r7,(MAS3_SX|MAS3_SW|MAS3_SR)
+ mtspr SPRN_MAS3,r7
+ tlbwe
+
+/* 7. Jump to KERNELBASE mapping */
+ li r7,0
+ bl 1f /* Find our address */
+1: mflr r9
+ rlwimi r6,r9,0,20,31
+ addi r6,r6,24
+ mtspr SPRN_SRR0,r6
+ mtspr SPRN_SRR1,r7
+ rfi /* start execution out of TLB1[0] entry */
+
+/* 8. Clear out the temp mapping */
+ lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
+ rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
+ mtspr SPRN_MAS0,r7
+ tlbre
+ mtspr SPRN_MAS1,r8
+ tlbwe
+ /* Invalidate TLB1 */
+ li r9,0x0c
+ tlbivax 0,r9
+#ifdef CONFIG_SMP
+ tlbsync
+#endif
+ msync
+
+ /* Establish the interrupt vector offsets */
+ SET_IVOR(0, CriticalInput);
+ SET_IVOR(1, MachineCheck);
+ SET_IVOR(2, DataStorage);
+ SET_IVOR(3, InstructionStorage);
+ SET_IVOR(4, ExternalInput);
+ SET_IVOR(5, Alignment);
+ SET_IVOR(6, Program);
+ SET_IVOR(7, FloatingPointUnavailable);
+ SET_IVOR(8, SystemCall);
+ SET_IVOR(9, AuxillaryProcessorUnavailable);
+ SET_IVOR(10, Decrementer);
+ SET_IVOR(11, FixedIntervalTimer);
+ SET_IVOR(12, WatchdogTimer);
+ SET_IVOR(13, DataTLBError);
+ SET_IVOR(14, InstructionTLBError);
+ SET_IVOR(15, Debug);
+ SET_IVOR(32, SPEUnavailable);
+ SET_IVOR(33, SPEFloatingPointData);
+ SET_IVOR(34, SPEFloatingPointRound);
+ SET_IVOR(35, PerformanceMonitor);
+
+ /* Establish the interrupt vector base */
+ lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
+ mtspr SPRN_IVPR,r4
+
+ /* Setup the defaults for TLB entries */
+ li r2,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l
+ mtspr SPRN_MAS4, r2
+
+#if 0
+ /* Enable DOZE */
+ mfspr r2,SPRN_HID0
+ oris r2,r2,HID0_DOZE@h
+ mtspr SPRN_HID0, r2
+#endif
+
+ /*
+ * This is where the main kernel code starts.
+ */
+
+ /* ptr to current */
+ lis r2,init_task@h
+ ori r2,r2,init_task@l
+
+ /* ptr to current thread */
+ addi r4,r2,THREAD /* init task's THREAD */
+ mtspr SPRN_SPRG3,r4
+
+ /* stack */
+ lis r1,init_thread_union@h
+ ori r1,r1,init_thread_union@l
+ li r0,0
+ stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
+
+ bl early_init
+
+ mfspr r3,SPRN_TLB1CFG
+ andi. r3,r3,0xfff
+ lis r4,num_tlbcam_entries@ha
+ stw r3,num_tlbcam_entries@l(r4)
+/*
+ * Decide what sort of machine this is and initialize the MMU.
+ */
+ mr r3,r31
+ mr r4,r30
+ mr r5,r29
+ mr r6,r28
+ mr r7,r27
+ bl machine_init
+ bl MMU_init
+
+ /* Setup PTE pointers for the Abatron bdiGDB */
+ lis r6, swapper_pg_dir@h
+ ori r6, r6, swapper_pg_dir@l
+ lis r5, abatron_pteptrs@h
+ ori r5, r5, abatron_pteptrs@l
+ lis r4, KERNELBASE@h
+ ori r4, r4, KERNELBASE@l
+ stw r5, 0(r4) /* Save abatron_pteptrs at a fixed location */
+ stw r6, 0(r5)
+
+ /* Let's move on */
+ lis r4,start_kernel@h
+ ori r4,r4,start_kernel@l
+ lis r3,MSR_KERNEL@h
+ ori r3,r3,MSR_KERNEL@l
+ mtspr SPRN_SRR0,r4
+ mtspr SPRN_SRR1,r3
+ rfi /* change context and jump to start_kernel */
+
+/*
+ * Interrupt vector entry code
+ *
+ * The Book E MMUs are always on so we don't need to handle
+ * interrupts in real mode as with previous PPC processors. In
+ * this case we handle interrupts in the kernel virtual address
+ * space.
+ *
+ * Interrupt vectors are dynamically placed relative to the
+ * interrupt prefix as determined by the address of interrupt_base.
+ * The interrupt vectors offsets are programmed using the labels
+ * for each interrupt vector entry.
+ *
+ * Interrupt vectors must be aligned on a 16 byte boundary.
+ * We align on a 32 byte cache line boundary for good measure.
+ */
+
+interrupt_base:
+ /* Critical Input Interrupt */
+ CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException)
+
+ /* Machine Check Interrupt */
+ MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
+
+ /* Data Storage Interrupt */
+ START_EXCEPTION(DataStorage)
+ mtspr SPRN_SPRG0, r10 /* Save some working registers */
+ mtspr SPRN_SPRG1, r11
+ mtspr SPRN_SPRG4W, r12
+ mtspr SPRN_SPRG5W, r13
+ mfcr r11
+ mtspr SPRN_SPRG7W, r11
+
+ /*
+ * Check if it was a store fault, if not then bail
+ * because a user tried to access a kernel or
+ * read-protected page. Otherwise, get the
+ * offending address and handle it.
+ */
+ mfspr r10, SPRN_ESR
+ andis. r10, r10, ESR_ST@h
+ beq 2f
+
+ mfspr r10, SPRN_DEAR /* Get faulting address */
+
+ /* If we are faulting a kernel address, we have to use the
+ * kernel page tables.
+ */
+ lis r11, TASK_SIZE@h
+ ori r11, r11, TASK_SIZE@l
+ cmplw 0, r10, r11
+ bge 2f
+
+ /* Get the PGD for the current thread */
+3:
+ mfspr r11,SPRN_SPRG3
+ lwz r11,PGDIR(r11)
+4:
+ rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */
+ lwz r11, 0(r11) /* Get L1 entry */
+ rlwinm. r12, r11, 0, 0, 19 /* Extract L2 (pte) base address */
+ beq 2f /* Bail if no table */
+
+ rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */
+ lwz r11, 0(r12) /* Get Linux PTE */
+
+ /* Are _PAGE_USER & _PAGE_RW set & _PAGE_HWWRITE not? */
+ andi. r13, r11, _PAGE_RW|_PAGE_USER|_PAGE_HWWRITE
+ cmpwi 0, r13, _PAGE_RW|_PAGE_USER
+ bne 2f /* Bail if not */
+
+ /* Update 'changed'. */
+ ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
+ stw r11, 0(r12) /* Update Linux page table */
+
+ /* MAS2 not updated as the entry does exist in the tlb, this
+ fault taken to detect state transition (eg: COW -> DIRTY)
+ */
+ lis r12, MAS3_RPN@h
+ ori r12, r12, _PAGE_HWEXEC | MAS3_RPN@l
+ and r11, r11, r12
+ rlwimi r11, r11, 31, 27, 27 /* SX <- _PAGE_HWEXEC */
+ ori r11, r11, (MAS3_UW|MAS3_SW|MAS3_UR|MAS3_SR)@l /* set static perms */
+
+ /* update search PID in MAS6, AS = 0 */
+ mfspr r12, SPRN_PID0
+ slwi r12, r12, 16
+ mtspr SPRN_MAS6, r12
+
+ /* find the TLB index that caused the fault. It has to be here. */
+ tlbsx 0, r10
+
+ mtspr SPRN_MAS3,r11
+ tlbwe
+
+ /* Done...restore registers and get out of here. */
+ mfspr r11, SPRN_SPRG7R
+ mtcr r11
+ mfspr r13, SPRN_SPRG5R
+ mfspr r12, SPRN_SPRG4R
+ mfspr r11, SPRN_SPRG1
+ mfspr r10, SPRN_SPRG0
+ rfi /* Force context change */
+
+2:
+ /*
+ * The bailout. Restore registers to pre-exception conditions
+ * and call the heavyweights to help us out.
+ */
+ mfspr r11, SPRN_SPRG7R
+ mtcr r11
+ mfspr r13, SPRN_SPRG5R
+ mfspr r12, SPRN_SPRG4R
+ mfspr r11, SPRN_SPRG1
+ mfspr r10, SPRN_SPRG0
+ b data_access
+
+ /* Instruction Storage Interrupt */
+ INSTRUCTION_STORAGE_EXCEPTION
+
+ /* External Input Interrupt */
+ EXCEPTION(0x0500, ExternalInput, do_IRQ, EXC_XFER_LITE)
+
+ /* Alignment Interrupt */
+ ALIGNMENT_EXCEPTION
+
+ /* Program Interrupt */
+ PROGRAM_EXCEPTION
+
+ /* Floating Point Unavailable Interrupt */
+ EXCEPTION(0x0800, FloatingPointUnavailable, UnknownException, EXC_XFER_EE)
+
+ /* System Call Interrupt */
+ START_EXCEPTION(SystemCall)
+ NORMAL_EXCEPTION_PROLOG
+ EXC_XFER_EE_LITE(0x0c00, DoSyscall)
+
+ /* Auxillary Processor Unavailable Interrupt */
+ EXCEPTION(0x2900, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE)
+
+ /* Decrementer Interrupt */
+ DECREMENTER_EXCEPTION
+
+ /* Fixed Internal Timer Interrupt */
+ /* TODO: Add FIT support */
+ EXCEPTION(0x3100, FixedIntervalTimer, UnknownException, EXC_XFER_EE)
+
+ /* Watchdog Timer Interrupt */
+ /* TODO: Add watchdog support */
+ CRITICAL_EXCEPTION(0x3200, WatchdogTimer, UnknownException)
+
+ /* Data TLB Error Interrupt */
+ START_EXCEPTION(DataTLBError)
+ mtspr SPRN_SPRG0, r10 /* Save some working registers */
+ mtspr SPRN_SPRG1, r11
+ mtspr SPRN_SPRG4W, r12
+ mtspr SPRN_SPRG5W, r13
+ mfcr r11
+ mtspr SPRN_SPRG7W, r11
+ mfspr r10, SPRN_DEAR /* Get faulting address */
+
+ /* If we are faulting a kernel address, we have to use the
+ * kernel page tables.
+ */
+ lis r11, TASK_SIZE@h
+ ori r11, r11, TASK_SIZE@l
+ cmplw 5, r10, r11
+ blt 5, 3f
+ lis r11, swapper_pg_dir@h
+ ori r11, r11, swapper_pg_dir@l
+
+ mfspr r12,SPRN_MAS1 /* Set TID to 0 */
+ rlwinm r12,r12,0,16,1
+ mtspr SPRN_MAS1,r12
+
+ b 4f
+
+ /* Get the PGD for the current thread */
+3:
+ mfspr r11,SPRN_SPRG3
+ lwz r11,PGDIR(r11)
+
+4:
+ rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */
+ lwz r11, 0(r11) /* Get L1 entry */
+ rlwinm. r12, r11, 0, 0, 19 /* Extract L2 (pte) base address */
+ beq 2f /* Bail if no table */
+
+ rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */
+ lwz r11, 0(r12) /* Get Linux PTE */
+ andi. r13, r11, _PAGE_PRESENT
+ beq 2f
+
+ ori r11, r11, _PAGE_ACCESSED
+ stw r11, 0(r12)
+
+ /* Jump to common tlb load */
+ b finish_tlb_load
+2:
+ /* The bailout. Restore registers to pre-exception conditions
+ * and call the heavyweights to help us out.
+ */
+ mfspr r11, SPRN_SPRG7R
+ mtcr r11
+ mfspr r13, SPRN_SPRG5R
+ mfspr r12, SPRN_SPRG4R
+ mfspr r11, SPRN_SPRG1
+ mfspr r10, SPRN_SPRG0
+ b data_access
+
+ /* Instruction TLB Error Interrupt */
+ /*
+ * Nearly the same as above, except we get our
+ * information from different registers and bailout
+ * to a different point.
+ */
+ START_EXCEPTION(InstructionTLBError)
+ mtspr SPRN_SPRG0, r10 /* Save some working registers */
+ mtspr SPRN_SPRG1, r11
+ mtspr SPRN_SPRG4W, r12
+ mtspr SPRN_SPRG5W, r13
+ mfcr r11
+ mtspr SPRN_SPRG7W, r11
+ mfspr r10, SPRN_SRR0 /* Get faulting address */
+
+ /* If we are faulting a kernel address, we have to use the
+ * kernel page tables.
+ */
+ lis r11, TASK_SIZE@h
+ ori r11, r11, TASK_SIZE@l
+ cmplw 5, r10, r11
+ blt 5, 3f
+ lis r11, swapper_pg_dir@h
+ ori r11, r11, swapper_pg_dir@l
+
+ mfspr r12,SPRN_MAS1 /* Set TID to 0 */
+ rlwinm r12,r12,0,16,1
+ mtspr SPRN_MAS1,r12
+
+ b 4f
+
+ /* Get the PGD for the current thread */
+3:
+ mfspr r11,SPRN_SPRG3
+ lwz r11,PGDIR(r11)
+
+4:
+ rlwimi r11, r10, 12, 20, 29 /* Create L1 (pgdir/pmd) address */
+ lwz r11, 0(r11) /* Get L1 entry */
+ rlwinm. r12, r11, 0, 0, 19 /* Extract L2 (pte) base address */
+ beq 2f /* Bail if no table */
+
+ rlwimi r12, r10, 22, 20, 29 /* Compute PTE address */
+ lwz r11, 0(r12) /* Get Linux PTE */
+ andi. r13, r11, _PAGE_PRESENT
+ beq 2f
+
+ ori r11, r11, _PAGE_ACCESSED
+ stw r11, 0(r12)
+
+ /* Jump to common TLB load point */
+ b finish_tlb_load
+
+2:
+ /* The bailout. Restore registers to pre-exception conditions
+ * and call the heavyweights to help us out.
+ */
+ mfspr r11, SPRN_SPRG7R
+ mtcr r11
+ mfspr r13, SPRN_SPRG5R
+ mfspr r12, SPRN_SPRG4R
+ mfspr r11, SPRN_SPRG1
+ mfspr r10, SPRN_SPRG0
+ b InstructionStorage
+
+#ifdef CONFIG_SPE
+ /* SPE Unavailable */
+ START_EXCEPTION(SPEUnavailable)
+ NORMAL_EXCEPTION_PROLOG
+ bne load_up_spe
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ EXC_XFER_EE_LITE(0x2010, KernelSPE)
+#else
+ EXCEPTION(0x2020, SPEUnavailable, UnknownException, EXC_XFER_EE)
+#endif /* CONFIG_SPE */
+
+ /* SPE Floating Point Data */
+#ifdef CONFIG_SPE
+ EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE);
+#else
+ EXCEPTION(0x2040, SPEFloatingPointData, UnknownException, EXC_XFER_EE)
+#endif /* CONFIG_SPE */
+
+ /* SPE Floating Point Round */
+ EXCEPTION(0x2050, SPEFloatingPointRound, UnknownException, EXC_XFER_EE)
+
+ /* Performance Monitor */
+ EXCEPTION(0x2060, PerformanceMonitor, PerformanceMonitorException, EXC_XFER_STD)
+
+
+ /* Debug Interrupt */
+ DEBUG_EXCEPTION
+
+/*
+ * Local functions
+ */
+ /*
+ * Data TLB exceptions will bail out to this point
+ * if they can't resolve the lightweight TLB fault.
+ */
+data_access:
+ NORMAL_EXCEPTION_PROLOG
+ mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */
+ stw r5,_ESR(r11)
+ mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */
+ andis. r10,r5,(ESR_ILK|ESR_DLK)@h
+ bne 1f
+ EXC_XFER_EE_LITE(0x0300, handle_page_fault)
+1:
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ EXC_XFER_EE_LITE(0x0300, CacheLockingException)
+
+/*
+
+ * Both the instruction and data TLB miss get to this
+ * point to load the TLB.
+ * r10 - EA of fault
+ * r11 - TLB (info from Linux PTE)
+ * r12, r13 - available to use
+ * CR5 - results of addr < TASK_SIZE
+ * MAS0, MAS1 - loaded with proper value when we get here
+ * MAS2, MAS3 - will need additional info from Linux PTE
+ * Upon exit, we reload everything and RFI.
+ */
+finish_tlb_load:
+ /*
+ * We set execute, because we don't have the granularity to
+ * properly set this at the page level (Linux problem).
+ * Many of these bits are software only. Bits we don't set
+ * here we (properly should) assume have the appropriate value.
+ */
+
+ mfspr r12, SPRN_MAS2
+ rlwimi r12, r11, 26, 27, 31 /* extract WIMGE from pte */
+ mtspr SPRN_MAS2, r12
+
+ bge 5, 1f
+
+ /* addr > TASK_SIZE */
+ li r10, (MAS3_UX | MAS3_UW | MAS3_UR)
+ andi. r13, r11, (_PAGE_USER | _PAGE_HWWRITE | _PAGE_HWEXEC)
+ andi. r12, r11, _PAGE_USER /* Test for _PAGE_USER */
+ iseleq r12, 0, r10
+ and r10, r12, r13
+ srwi r12, r10, 1
+ or r12, r12, r10 /* Copy user perms into supervisor */
+ b 2f
+
+ /* addr <= TASK_SIZE */
+1: rlwinm r12, r11, 31, 29, 29 /* Extract _PAGE_HWWRITE into SW */
+ ori r12, r12, (MAS3_SX | MAS3_SR)
+
+2: rlwimi r11, r12, 0, 20, 31 /* Extract RPN from PTE and merge with perms */
+ mtspr SPRN_MAS3, r11
+ tlbwe
+
+ /* Done...restore registers and get out of here. */
+ mfspr r11, SPRN_SPRG7R
+ mtcr r11
+ mfspr r13, SPRN_SPRG5R
+ mfspr r12, SPRN_SPRG4R
+ mfspr r11, SPRN_SPRG1
+ mfspr r10, SPRN_SPRG0
+ rfi /* Force context change */
+
+#ifdef CONFIG_SPE
+/* Note that the SPE support is closely modeled after the AltiVec
+ * support. Changes to one are likely to be applicable to the
+ * other! */
+load_up_spe:
+/*
+ * Disable SPE for the task which had SPE previously,
+ * and save its SPE registers in its thread_struct.
+ * Enables SPE for use in the kernel on return.
+ * On SMP we know the SPE units are free, since we give it up every
+ * switch. -- Kumar
+ */
+ mfmsr r5
+ oris r5,r5,MSR_SPE@h
+ mtmsr r5 /* enable use of SPE now */
+ isync
+/*
+ * For SMP, we don't do lazy SPE switching because it just gets too
+ * horrendously complex, especially when a task switches from one CPU
+ * to another. Instead we call giveup_spe in switch_to.
+ */
+#ifndef CONFIG_SMP
+ lis r3,last_task_used_spe@ha
+ lwz r4,last_task_used_spe@l(r3)
+ cmpi 0,r4,0
+ beq 1f
+ addi r4,r4,THREAD /* want THREAD of last_task_used_spe */
+ SAVE_32EVR(0,r10,r4)
+ evxor evr10, evr10, evr10 /* clear out evr10 */
+ evmwumiaa evr10, evr10, evr10 /* evr10 <- ACC = 0 * 0 + ACC */
+ li r5,THREAD_ACC
+ evstddx evr10, r4, r5 /* save off accumulator */
+ lwz r5,PT_REGS(r4)
+ lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+ lis r10,MSR_SPE@h
+ andc r4,r4,r10 /* disable SPE for previous task */
+ stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+1:
+#endif /* CONFIG_SMP */
+ /* enable use of SPE after return */
+ oris r9,r9,MSR_SPE@h
+ mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */
+ li r4,1
+ li r10,THREAD_ACC
+ stw r4,THREAD_USED_SPE(r5)
+ evlddx evr4,r10,r5
+ evmra evr4,evr4
+ REST_32EVR(0,r10,r5)
+#ifndef CONFIG_SMP
+ subi r4,r5,THREAD
+ stw r4,last_task_used_spe@l(r3)
+#endif /* CONFIG_SMP */
+ /* restore registers and return */
+2: REST_4GPRS(3, r11)
+ lwz r10,_CCR(r11)
+ REST_GPR(1, r11)
+ mtcr r10
+ lwz r10,_LINK(r11)
+ mtlr r10
+ REST_GPR(10, r11)
+ mtspr SPRN_SRR1,r9
+ mtspr SPRN_SRR0,r12
+ REST_GPR(9, r11)
+ REST_GPR(12, r11)
+ lwz r11,GPR11(r11)
+ SYNC
+ rfi
+
+/*
+ * SPE unavailable trap from kernel - print a message, but let
+ * the task use SPE in the kernel until it returns to user mode.
+ */
+KernelSPE:
+ lwz r3,_MSR(r1)
+ oris r3,r3,MSR_SPE@h
+ stw r3,_MSR(r1) /* enable use of SPE after return */
+ lis r3,87f@h
+ ori r3,r3,87f@l
+ mr r4,r2 /* current */
+ lwz r5,_NIP(r1)
+ bl printk
+ b ret_from_except
+87: .string "SPE used in kernel (task=%p, pc=%x) \n"
+ .align 4,0
+
+#endif /* CONFIG_SPE */
+
+/*
+ * Global functions
+ */
+
+/*
+ * extern void loadcam_entry(unsigned int index)
+ *
+ * Load TLBCAM[index] entry in to the L2 CAM MMU
+ */
+_GLOBAL(loadcam_entry)
+ lis r4,TLBCAM@ha
+ addi r4,r4,TLBCAM@l
+ mulli r5,r3,20
+ add r3,r5,r4
+ lwz r4,0(r3)
+ mtspr SPRN_MAS0,r4
+ lwz r4,4(r3)
+ mtspr SPRN_MAS1,r4
+ lwz r4,8(r3)
+ mtspr SPRN_MAS2,r4
+ lwz r4,12(r3)
+ mtspr SPRN_MAS3,r4
+ tlbwe
+ isync
+ blr
+
+/*
+ * extern void giveup_altivec(struct task_struct *prev)
+ *
+ * The e500 core does not have an AltiVec unit.
+ */
+_GLOBAL(giveup_altivec)
+ blr
+
+#ifdef CONFIG_SPE
+/*
+ * extern void giveup_spe(struct task_struct *prev)
+ *
+ */
+_GLOBAL(giveup_spe)
+ mfmsr r5
+ oris r5,r5,MSR_SPE@h
+ SYNC
+ mtmsr r5 /* enable use of SPE now */
+ isync
+ cmpi 0,r3,0
+ beqlr- /* if no previous owner, done */
+ addi r3,r3,THREAD /* want THREAD of task */
+ lwz r5,PT_REGS(r3)
+ cmpi 0,r5,0
+ SAVE_32EVR(0, r4, r3)
+ evxor evr6, evr6, evr6 /* clear out evr6 */
+ evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */
+ li r4,THREAD_ACC
+ evstddx evr6, r4, r3 /* save off accumulator */
+ mfspr r6,SPRN_SPEFSCR
+ stw r6,THREAD_SPEFSCR(r3) /* save spefscr register value */
+ beq 1f
+ lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+ lis r3,MSR_SPE@h
+ andc r4,r4,r3 /* disable SPE for previous task */
+ stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
+1:
+#ifndef CONFIG_SMP
+ li r5,0
+ lis r4,last_task_used_spe@ha
+ stw r5,last_task_used_spe@l(r4)
+#endif /* CONFIG_SMP */
+ blr
+#endif /* CONFIG_SPE */
+
+/*
+ * extern void giveup_fpu(struct task_struct *prev)
+ *
+ * The e500 core does not have an FPU.
+ */
+_GLOBAL(giveup_fpu)
+ blr
+
+/*
+ * extern void abort(void)
+ *
+ * At present, this routine just applies a system reset.
+ */
+_GLOBAL(abort)
+ li r13,0
+ mtspr SPRN_DBCR0,r13 /* disable all debug events */
+ mfmsr r13
+ ori r13,r13,MSR_DE@l /* Enable Debug Events */
+ mtmsr r13
+ mfspr r13,SPRN_DBCR0
+ lis r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h
+ mtspr SPRN_DBCR0,r13
+
+_GLOBAL(set_context)
+
+#ifdef CONFIG_BDI_SWITCH
+ /* Context switch the PTE pointer for the Abatron BDI2000.
+ * The PGDIR is the second parameter.
+ */
+ lis r5, abatron_pteptrs@h
+ ori r5, r5, abatron_pteptrs@l
+ stw r4, 0x4(r5)
+#endif
+ mtspr SPRN_PID,r3
+ isync /* Force context change */
+ blr
+
+/*
+ * We put a few things here that have to be page-aligned. This stuff
+ * goes at the beginning of the data segment, which is page-aligned.
+ */
+ .data
+_GLOBAL(sdata)
+_GLOBAL(empty_zero_page)
+ .space 4096
+_GLOBAL(swapper_pg_dir)
+ .space 4096
+
+/* Reserved 4k for the critical exception stack & 4k for the machine
+ * check stack per CPU for kernel mode exceptions */
+ .section .bss
+ .align 12
+exception_stack_bottom:
+ .space BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS
+_GLOBAL(exception_stack_top)
+
+/*
+ * This space gets a copy of optional info passed to us by the bootstrap
+ * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
+ */
+_GLOBAL(cmd_line)
+ .space 512
+
+/*
+ * Room for two PTE pointers, usually the kernel and current user pointers
+ * to their respective root page table.
+ */
+abatron_pteptrs:
+ .space 8
+
^ permalink raw reply
* Re: gcc4 compile fixes
From: Christian @ 2005-04-04 1:51 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Dan Kegel
In-Reply-To: <423B788F.7040705@kegel.com>
[-- Attachment #1: Type: text/plain, Size: 1503 bytes --]
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
Dan Kegel wrote:
> Howdy all. I'm trying to bring up gcc-4.0 toolchains
> using the headers from linux-2.6.11.3, and as a sanity
> check, I'm trying to build ppc750 and ppc970 kernels, too.
i have tried with vanilla 2.6.11.6 now and compiling for ppc604 still
fails with the errors you described. they go away with your suggested
fixes (only had to modify the linenumbers, diff attached, apply with -p0)
oh, not that the kernel compiles now - it seems it just overcame a build
error out of many :->
now it [1] fails with:
In file included from arch/ppc/kernel/time.c:68:
include/asm/time.h:61: warning: type qualifiers ignored on function return
type
arch/ppc/kernel/time.c:92: error: static declaration of 'time_offset'
follows non-static declaration
include/linux/timex.h:236: error: previous declaration of 'time_offset'
was here
make[1]: *** [arch/ppc/kernel/time.o] Error 1
make: *** [arch/ppc/kernel] Error 2
thank you,
Christian.
[1] building a ppc604(PReP) kernel on i386:
powerpc-604-linux-gnu-gcc (GCC) 4.0.0 20050305 (prerelease)
GNU ld version 2.15
Supported emulations:
elf32ppclinux
elf32ppc
elf32ppcsim
- --
BOFH excuse #345:
Having to manually track the satellite.
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[-- Attachment #2: 2.6.11.6.gcc4_compile_fixes.diff --]
[-- Type: text/plain, Size: 1092 bytes --]
--- include/asm-ppc64/paca.h.orig 2005-04-04 03:39:48.576951465 +0200
+++ include/asm-ppc64/paca.h 2005-04-04 03:42:17.970090549 +0200
@@ -22,7 +22,6 @@
#include <asm/iSeries/ItLpRegSave.h>
#include <asm/mmu.h>
-extern struct paca_struct paca[];
register struct paca_struct *local_paca asm("r13");
#define get_paca() local_paca
@@ -115,4 +114,6 @@
#endif
};
+extern struct paca_struct paca[];
+
#endif /* _PPC64_PACA_H */
--- include/asm-m68k/setup.h.orig 2005-04-04 03:38:34.249350160 +0200
+++ include/asm-m68k/setup.h 2005-04-04 03:39:33.945211078 +0200
@@ -362,12 +362,13 @@
#ifndef __ASSEMBLY__
extern int m68k_num_memory; /* # of memory blocks found (and used) */
extern int m68k_realnum_memory; /* real # of memory blocks found */
-extern struct mem_info m68k_memory[NUM_MEMINFO];/* memory description */
struct mem_info {
unsigned long addr; /* physical address of memory chunk */
unsigned long size; /* length of memory chunk (in bytes) */
};
+
+extern struct mem_info m68k_memory[NUM_MEMINFO]; /* memory description */
#endif
#endif /* __KERNEL__ */
^ permalink raw reply
* [PATCH] ppc32: ppc4xx_pic - add acknowledge when enabling level-sensitive IRQ
From: Eugene Surovegin @ 2005-04-04 4:17 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 701 bytes --]
Andrew,
this patch adds interrupt acknowledge to the PPC4xx PIC enable_irq
implementation for level-sensitive IRQ sources. This helps in cases
when enable/disable_irq is used in interrupt handlers for hardware,
which requires IRQ acknowledge to be issued from non-interrupt context
(e.g. when actual ACK in device needs an I2C transaction). For such
strange hardware, interrupt handler disables IRQ and defers actual ACK
to some other context. When this happens, IRQ is enabled again. For
level-sensitive sources we get spurious triggering right after IRQ
is enabled. This patch fixes this.
Suggested by Tolunay Orkun <listmember@orkun.us>.
Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
[-- Attachment #2: ppc4xx_pic_ack_on_enable.diff --]
[-- Type: text/plain, Size: 613 bytes --]
===== arch/ppc/syslib/ppc4xx_pic.c 1.15 vs edited =====
--- 1.15/arch/ppc/syslib/ppc4xx_pic.c 2005-03-04 22:41:17 -08:00
+++ edited/arch/ppc/syslib/ppc4xx_pic.c 2005-04-03 12:00:55 -07:00
@@ -41,7 +41,10 @@
#define UIC_HANDLERS(n) \
static void ppc4xx_uic##n##_enable(unsigned int irq) \
{ \
- ppc_cached_irq_mask[n] |= IRQ_MASK_UIC##n(irq); \
+ u32 mask = IRQ_MASK_UIC##n(irq); \
+ if (irq_desc[irq].status & IRQ_LEVEL) \
+ mtdcr(DCRN_UIC_SR(UIC##n), mask); \
+ ppc_cached_irq_mask[n] |= mask; \
mtdcr(DCRN_UIC_ER(UIC##n), ppc_cached_irq_mask[n]); \
} \
\
^ permalink raw reply
* iBook G3 owners
From: Benjamin Herrenschmidt @ 2005-04-04 6:06 UTC (permalink / raw)
To: debian-powerpc@lists.debian.org, linuxppc-dev list
Hi !
There have been various reports of issues with sleep among others on
iBook G3 equiped with the 750FX processor. Also, the cpufreq code on
these so far didn't change the CPU voltage, which limited the actual
power saving at low frequency.
I have uploaded various patches that should help fix these issues. Those
patches are all against current linus bk and they should be all applied
in the order below.
I would really appreciate some tests as I don't have access to any of
these machines. I need to know if cpufreq works reliably with those
patches and if the new voltage control makes any differnece on battery
life (check power consumption in /proc/pmu/battery_*/current when
running on battery) and I need to know if the patches are improving
reliability of sleep/wakeup.
The 4 patches can be found at these URLs. If you had earlier versions of
some of these, those patches replace them:
http://gate.crahsing.org/~benh/ppc32-750-errata-fix.diff
http://gate.crahsing.org/~benh/ppc32-pmac-sleep-fix.diff
http://gate.crahsing.org/~benh/cpufreq-add-suspend.diff
http://gate.crahsing.org/~benh/ppc32-cpufreq-gpio-off.diff
Please, let me know asap,
Ben.
^ permalink raw reply
* Re: ASM formatting rules?
From: Paul Mackerras @ 2005-04-04 6:33 UTC (permalink / raw)
To: Kumar Gala; +Cc: Tom Rini, linuxppc-dev list, ML linuxppc-embedded
In-Reply-To: <b469d10736cc1d208a87b000ad67f550@freescale.com>
Kumar Gala writes:
> Great, if my counting is correct (which may not be, since I grow up in
> Florida)
>
> 2 - for no space (Paul, BenH)
> 2 - for spaces (Tom, Dan)
> 2 - dont cares (Kumar, Matt)
>
> Well, does Paul have authoritative rule here as ppc maintainer? :)
I would take a similar attitude to Linus and say that if there is
someone who has taken on the role of maintaining a file or subsystem,
they get a fair bit of latitude in saying what the style should be
there. So if Dan and Tom want to do "insn<TAB>op, op, op" in
head_8xx.S, I'm not going to go in and remove all the excess spaces.
However, apart from that - i.e. for code that is used on all PPC
platforms, or if people are asking what the style should be - then the
style is no spaces between the operands.
Paul.
^ permalink raw reply
* Re: Which kernel to use?
From: David Jander @ 2005-04-04 7:13 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <F2BED41F1171FF449F88D60191848A84023CB06D@budg132a.sysdata.siemens.hu>
On Friday 01 April 2005 15:34, Buday Gergely Istv=C3=A1n wrote:
> I have a gadget built around a ppc xpc850xxztb processor with 2M flash a=
nd
> 8M ram. The opsys is Hard Hat, but I'd like to change it to an
> openembedded-based solution. Where can I get sources for a proper kernel
> that works with this system?
Have a look at www.denx.de
Take the development branch of 2.4 from that site.... and stop sticking the=
=20
finger in that wound ;-)
Greetings,
=2D-=20
David Jander
^ permalink raw reply
* Re: Flat OF Device Tree for ppc32 [was: Platform bus/ppc sys model...]
From: Jakob Viketoft @ 2005-04-04 7:20 UTC (permalink / raw)
To: Jon Loeliger
Cc: Jon Masters, Sylvain Munaut, Andrei Konovalov,
Linux PPC Embedded list
In-Reply-To: <1112284541.23088.77.camel@cashmere.sps.mot.com>
Hi!
You don't happen to have a patch of your current work against one of the
trees (83xx and 85xx)? It would be much easier to do work in parallell,
and I'd be happy to do it on the "Xilinx" tree (and help out where I
can, of course).
Jon Masters and Andrei: Does Jon Loeliger's implementation plan sound
alright to you? Since you seem quite full-handed on your end anyway,
Jon, I'll be happy to do the work needed unless anyone has any objections...
Cheers!
/Jakob
Jon Loeliger wrote:
> On Thu, 2005-03-31 at 06:33, Jon Masters wrote:
>
>>Kumar Gala wrote:
>>
>>|> My intention was to give a device tree structure to the kernel at boot
>>|> time via a (pseudo?) pointer in bd_info or similar.
>
>
>>This got resurrected recently.
>
>
> Hi!
>
>
>>| I think this is reasonable. The best device tree would be a flattened
>>| OF tree since we are trying to move the world in that direction. Jon
>>| Masters around?
>>
>>Yes, but I've been tied up with worky and magazine stuff again. If
>>someone wants to work with me then this might actually happen.
>
>
> Hi Jon,
>
> I'm here and actively(!) working on it now. Here is the very
> rough plan as Kumar and I have discussed it. Please feel free
> to comment on it or offer suggestions. Ben has suggested that
> I start with the "second step" below. I'd like to do a round
> of cleanup first.
>
> So far, I have taken the first step of isolating the references
> to the global __res[] variable into one file and replacing all
> references to the data in the bd_t structure with a thin, shim
> layer of function calls that are nominally into an OF-like
> interface. I have done this for all the 85xx and 83xx boards
> in my development tree, and am working on the others now.
> This step effectively isolates the __res[] references to one
> file where a well defined interface can be created to pose as
> an OF Device Tree layer (briefly).
>
> As a follow-up second step, I plan on introducing essentially
> the same code currently in ppc64 to handle the flat device tree
> and provide an interface to that data in exactly the same manner
> as the ppc64 currently has. I understand the desire to have the
> flat-tree handling be "outside the kernel".
>
> As a third step, the shim layer will be rewritten/augmented to
> use the actual OF device tree data where it currently fronts
> for the bd_t data.
>
> Finally, as time permits and maintainers allow (read: prod),
> the other (not 85xx, not 83xx) boards can have their setup code
> converted to use the "real" OF device tree function calls.
>
> When all of that is done, the shim layer can be removed, as needed.
>
>
> Oh, yeah. Um, also on my plate will be to construct the
> original flat-tree blob in U-Boot to be handed to the kernel.
> (I'll start with 85xx and 83xx, naturlich.)
>
> We have not yet decided on the layout of that tree to determine
> where all the attributes and devices really belong. I will
> also discuss with Wolfgang and crew how to generate that tree
> over in U-Boot land.
>
> Right?
>
> Thanks,
> jdl
>
^ permalink raw reply
* Re: Flat OF Device Tree for ppc32 [was: Platform bus/ppc sys model...]
From: Jon Masters @ 2005-04-04 7:31 UTC (permalink / raw)
To: Jakob Viketoft; +Cc: Andrei Konovalov, Sylvain Munaut, Linux PPC Embedded list
In-Reply-To: <4250EACF.1040403@bitsim.se>
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
Jakob Viketoft wrote:
| Jon Masters and Andrei: Does Jon Loeliger's implementation plan sound
| alright to you? Since you seem quite full-handed on your end anyway,
| Jon, I'll be happy to do the work needed unless anyone has any
| objections...
It sounds good. I'm planning to followup on that later - yes I'm pretty
tied up but I can vaguely get away with hacking on the Memec v2p board
on work time and briefly have an ML300 at home here for something else,
so I can probably test both.
Jon.
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^ permalink raw reply
* [Fwd: Re: Platform bus/ppc sys model - [Fwd: bi_recs and u-boot ppcboot.h]]
From: Jon Masters @ 2005-04-04 7:32 UTC (permalink / raw)
To: linuxppc-embedded
-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1
- -------- Original Message --------
Subject: Re: Platform bus/ppc sys model - [Fwd: bi_recs and u-boot
ppcboot.h]
Date: Mon, 04 Apr 2005 08:28:39 +0100
From: Jon Masters <jonathan@jonmasters.org>
Organization: World Organi[sz]ation Of Broken Dreams
To: Stefan Roese <sr@denx.de>
CC: Linuxppc-Embedded <linuxppc-embedded@lists.linuxppc.org>
References: <424BEECD.8020303@jonmasters.org>
<200504040844.34428.sr@denx.de>
Hi Stefan, other folks,
Sorry I've not replied to some of the other threads - suffice it to say
I've had a busy weekend hacking on an ecos HAL. Anyway, I'll get synced
up again today or tomorrow, just in time to jump on a plane to USENIX :-)
Stefan Roese wrote:
| The CPCI405 supports switching the boot-cs between its 2 flash chips
with the
| DIP-switch 4. You could copy the current ppcboot version into the 2nd
flash
| chip as a fallback (please test it once).
Oooh. I didn't know that (don't have the schematics here :P) - cheers.
I'll try doing that before I go away :-) If I can do this then I'll have
at least something vaguely sacrificial to work with here, I think the
current plan as discussed is vaguely worth persuing, even though it
might not be the optimal eventual solution. Will followup shortly.
What should happen is that OF trees get written like they do for mol and
then automagically converted in to a BLOB for use with u-boot - no, I
don't think this is the grand unified solution to everything, but I do
think it will persuade someone to find a cross platform solution.
FWIW Stefan, I am just setting up a similar power cycler setup to what
you guys have there - found a cheap supplier of wireless 13A mains
socket automation kits (<15EUR) in the local electronics store,
butchered remote control unit, sufficient for a cheapo cycler.
Jon.
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^ permalink raw reply
* Re: Linux for the Xilinx Memec V2P20-1152
From: Jakob Viketoft @ 2005-04-04 7:41 UTC (permalink / raw)
To: Tracey Bernath; +Cc: Linux PPC Embedded list
In-Reply-To: <424CB314.3030305@bernath.com>
[-- Attachment #1: Type: text/plain, Size: 1162 bytes --]
Hi!
Short checklist to get you going:
1. Make sure you have a cross-compile toolchain. Get/build one from the
script at http://kegel.com/crosstool/ (demo-405.sh for this board).
2. Download a kernel from kernel.org, latest now is 2.6.11.6.
3. Change in the kernel Makefile to set CROSS_COMPILE to the toolchain
and ARCH to ppc. (Can be given as command-line parameters with make as
well.)
4. Change the arch/ppc/platforms/4xx/xparameters/xparameters_ml300.h to
use your addresses, frequencies etc.
5. Make a minimal config or use the one I've submitted (beware of the
ramdisk size however).
This is very basic support, no eth for example and printouts on serial
port. Good luck!
/Jakob
Tracey Bernath wrote:
> Has anyone built an image for the Memec 1152 V2P board? I downloaded
> the linuxppc bitkeeper, but it seems to want to build an i386 version.
> Havent figured out a config that gets me a useableimage.Can anyone send
> me a config file that compiles?
>
> Thanks
> Tracey
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
[-- Attachment #2: .config --]
[-- Type: text/plain, Size: 11591 bytes --]
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.11
# Wed Mar 23 13:18:24 2005
#
CONFIG_MMU=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_HAVE_DEC_LOCK=y
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_GENERIC_NVRAM=y
#
# Code maturity level options
#
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_LOCK_KERNEL=y
#
# General setup
#
CONFIG_LOCALVERSION="-bitsim"
# CONFIG_SWAP is not set
# CONFIG_SYSVIPC is not set
# CONFIG_POSIX_MQUEUE is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_SYSCTL is not set
# CONFIG_AUDIT is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_HOTPLUG is not set
# CONFIG_KOBJECT_UEVENT is not set
# CONFIG_IKCONFIG is not set
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
# CONFIG_KALLSYMS_EXTRA_PASS is not set
CONFIG_FUTEX=y
CONFIG_EPOLL=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
# CONFIG_SHMEM is not set
CONFIG_CC_ALIGN_FUNCTIONS=0
CONFIG_CC_ALIGN_LABELS=0
CONFIG_CC_ALIGN_LOOPS=0
CONFIG_CC_ALIGN_JUMPS=0
CONFIG_TINY_SHMEM=y
#
# Loadable module support
#
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_OBSOLETE_MODPARM=y
CONFIG_MODVERSIONS=y
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_KMOD=y
#
# Processor
#
# CONFIG_6xx is not set
CONFIG_40x=y
# CONFIG_44x is not set
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
# CONFIG_E500 is not set
# CONFIG_MATH_EMULATION is not set
# CONFIG_CPU_FREQ is not set
CONFIG_4xx=y
#
# IBM 4xx options
#
# CONFIG_ASH is not set
# CONFIG_BUBINGA is not set
# CONFIG_CPCI405 is not set
# CONFIG_EP405 is not set
# CONFIG_OAK is not set
# CONFIG_REDWOOD_5 is not set
# CONFIG_REDWOOD_6 is not set
# CONFIG_SYCAMORE is not set
# CONFIG_WALNUT is not set
CONFIG_XILINX_ML300=y
CONFIG_IBM405_ERR77=y
CONFIG_IBM405_ERR51=y
CONFIG_XILINX_OCP=y
CONFIG_VIRTEX_II_PRO=y
CONFIG_EMBEDDEDBOOT=y
# CONFIG_PPC4xx_DMA is not set
CONFIG_PPC_GEN550=y
# CONFIG_PM is not set
CONFIG_UART0_TTYS0=y
# CONFIG_UART0_TTYS1 is not set
CONFIG_NOT_COHERENT_CACHE=y
#
# Platform options
#
# CONFIG_PC_KEYBOARD is not set
# CONFIG_SMP is not set
CONFIG_PREEMPT=y
# CONFIG_HIGHMEM is not set
CONFIG_BINFMT_ELF=y
# CONFIG_BINFMT_MISC is not set
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="console=ttyS0,115200 root=/dev/ram0 rw"
#
# Bus options
#
# CONFIG_PCI is not set
# CONFIG_PCI_DOMAINS is not set
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
#
# PC-card bridges
#
#
# Advanced setup
#
CONFIG_ADVANCED_OPTIONS=y
CONFIG_HIGHMEM_START=0xfe000000
# CONFIG_LOWMEM_SIZE_BOOL is not set
CONFIG_LOWMEM_SIZE=0x30000000
# CONFIG_KERNEL_START_BOOL is not set
CONFIG_KERNEL_START=0xc0000000
# CONFIG_TASK_SIZE_BOOL is not set
CONFIG_TASK_SIZE=0x80000000
# CONFIG_CONSISTENT_START_BOOL is not set
CONFIG_CONSISTENT_START=0xff100000
# CONFIG_CONSISTENT_SIZE_BOOL is not set
CONFIG_CONSISTENT_SIZE=0x00200000
# CONFIG_BOOT_LOAD_BOOL is not set
CONFIG_BOOT_LOAD=0x00400000
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
CONFIG_DEBUG_DRIVER=y
#
# Memory Technology Devices (MTD)
#
# CONFIG_MTD is not set
#
# Parallel port support
#
# CONFIG_PARPORT is not set
#
# Plug and Play support
#
#
# Block devices
#
# CONFIG_BLK_DEV_FD is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=1
CONFIG_BLK_DEV_RAM_SIZE=2048
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_LBD is not set
# CONFIG_CDROM_PKTCDVD is not set
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_AS is not set
CONFIG_IOSCHED_DEADLINE=y
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_ATA_OVER_ETH is not set
#
# ATA/ATAPI/MFM/RLL support
#
# CONFIG_IDE is not set
#
# SCSI device support
#
# CONFIG_SCSI is not set
#
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
#
# Fusion MPT device support
#
#
# IEEE 1394 (FireWire) support
#
#
# I2O device support
#
#
# Macintosh device drivers
#
#
# Networking support
#
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_MMAP=y
CONFIG_NETLINK_DEV=y
CONFIG_UNIX=y
# CONFIG_NET_KEY is not set
CONFIG_INET=y
CONFIG_IP_MULTICAST=y
CONFIG_IP_ADVANCED_ROUTER=y
CONFIG_IP_MULTIPLE_TABLES=y
CONFIG_IP_ROUTE_MULTIPATH=y
CONFIG_IP_ROUTE_VERBOSE=y
# CONFIG_IP_PNP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE is not set
# CONFIG_IP_MROUTE is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
CONFIG_INET_TUNNEL=y
CONFIG_IP_TCPDIAG=y
# CONFIG_IP_TCPDIAG_IPV6 is not set
# CONFIG_IPV6 is not set
# CONFIG_NETFILTER is not set
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
#
# SCTP Configuration (EXPERIMENTAL)
#
# CONFIG_IP_SCTP is not set
# CONFIG_ATM is not set
# CONFIG_BRIDGE is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_NET_DIVERT is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
#
# QoS and/or fair queueing
#
# CONFIG_NET_SCHED is not set
# CONFIG_NET_CLS_ROUTE is not set
#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_HAMRADIO is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_ETHERTAP is not set
#
# Ethernet (10 or 100Mbit)
#
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_IBM_EMAC is not set
#
# Ethernet (1000 Mbit)
#
#
# Ethernet (10000 Mbit)
#
#
# Token Ring devices
#
#
# Wireless LAN (non-hamradio)
#
# CONFIG_NET_RADIO is not set
#
# Wan interfaces
#
# CONFIG_WAN is not set
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
#
# ISDN subsystem
#
# CONFIG_ISDN is not set
#
# Telephony Support
#
# CONFIG_PHONE is not set
#
# Input device support
#
# CONFIG_INPUT is not set
#
# Userland interfaces
#
#
# Input I/O drivers
#
# CONFIG_GAMEPORT is not set
CONFIG_SOUND_GAMEPORT=y
# CONFIG_SERIO is not set
# CONFIG_SERIO_I8042 is not set
#
# Input Device Drivers
#
#
# Character devices
#
# CONFIG_VT is not set
# CONFIG_SERIAL_NONSTANDARD is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set
#
# Non-8250 serial port support
#
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_UNIX98_PTYS is not set
# CONFIG_LEGACY_PTYS is not set
#
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
#
# Watchdog Cards
#
# CONFIG_WATCHDOG is not set
# CONFIG_NVRAM is not set
# CONFIG_GEN_RTC is not set
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
#
# Ftape, the floppy tape device driver
#
# CONFIG_AGP is not set
# CONFIG_DRM is not set
# CONFIG_RAW_DRIVER is not set
#
# I2C support
#
# CONFIG_I2C is not set
#
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
#
# Misc devices
#
#
# Multimedia devices
#
# CONFIG_VIDEO_DEV is not set
#
# Digital Video Broadcasting Devices
#
# CONFIG_DVB is not set
#
# Graphics support
#
# CONFIG_FB is not set
#
# Sound
#
# CONFIG_SOUND is not set
#
# USB support
#
# CONFIG_USB_ARCH_HAS_HCD is not set
# CONFIG_USB_ARCH_HAS_OHCI is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
#
#
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
#
# MMC/SD Card support
#
# CONFIG_MMC is not set
#
# InfiniBand support
#
# CONFIG_INFINIBAND is not set
#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
#
# XFS support
#
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_QUOTA is not set
# CONFIG_DNOTIFY is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
# CONFIG_MSDOS_FS is not set
# CONFIG_VFAT_FS is not set
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_SYSFS=y
# CONFIG_DEVFS_FS is not set
# CONFIG_TMPFS is not set
# CONFIG_HUGETLB_PAGE is not set
CONFIG_RAMFS=y
#
# Miscellaneous filesystems
#
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
#
# Network File Systems
#
# CONFIG_NFS_FS is not set
# CONFIG_NFSD is not set
# CONFIG_SMB_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_MSDOS_PARTITION=y
#
# Native Language Support
#
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_CODEPAGE_437 is not set
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set
#
# IBM 40x options
#
#
# Library routines
#
# CONFIG_CRC_CCITT is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
#
# Profiling support
#
# CONFIG_PROFILING is not set
#
# Kernel hacking
#
CONFIG_DEBUG_KERNEL=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_SCHEDSTATS is not set
# CONFIG_DEBUG_SLAB is not set
CONFIG_DEBUG_PREEMPT=y
# CONFIG_DEBUG_SPINLOCK is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
CONFIG_DEBUG_KOBJECT=y
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_KGDB is not set
# CONFIG_XMON is not set
# CONFIG_BDI_SWITCH is not set
# CONFIG_SERIAL_TEXT_DEBUG is not set
CONFIG_PPC_OCP=y
#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
#
# Cryptographic options
#
# CONFIG_CRYPTO is not set
#
# Hardware crypto devices
#
^ permalink raw reply
* Re: Platform bus/ppc sys model - [Fwd: bi_recs and u-boot ppcboot.h]
From: Stefan Roese @ 2005-04-04 7:42 UTC (permalink / raw)
To: ML linuxppc-embedded
Hi Jon,
On Thursday 31 March 2005 14:36, Jon Masters wrote:
> ( basically, I've got ppcboot on an old CPCI405 here but it's not
> trivial to fix if I break it
The CPCI405 supports switching the boot-cs between its 2 flash chips with the
DIP-switch 4. You could copy the current ppcboot version into the 2nd flash
chip as a fallback (please test it once).
Please make sure to use the "CPCI405" U-Boot make-target and _not_ CPCI4052
for a revision 1.x board. To be sure what version of the board you have,
please take a look at the FPGA. If it's a Spartan 05 then it's a revision 1.x
board, if it's a Spartan 2 15 it's a revision 2.x board.
> and I don't know much about whether u-boot
> supports chaining in to a new u-boot loaded from within itself...but it
> probably does, I guess. Bah, it's late, I'm rambling...).
I am pretty sure that the current versions of U-Boot work without problems on
the CPCI405 boards (even revision 1.x).
Best regards,
Stefan
^ permalink raw reply
* Re: [Fwd: Re: Platform bus/ppc sys model - [Fwd: bi_recs and u-boot ppcboot.h]]
From: Wolfgang Denk @ 2005-04-04 8:19 UTC (permalink / raw)
To: Jon Masters; +Cc: linuxppc-embedded
In-Reply-To: <4250ED79.6010304@jonmasters.org>
In message <4250ED79.6010304@jonmasters.org> you wrote:
>
> | The CPCI405 supports switching the boot-cs between its 2 flash chips with the
> | DIP-switch 4. You could copy the current ppcboot version into the 2nd flash
> | chip as a fallback (please test it once).
>
> Oooh. I didn't know that (don't have the schematics here :P) - cheers.
BTW: I will attach the BDI2000 to the CPCI405 tomorrow or so, so you
can continue debugging in our virtual lab, too.
> FWIW Stefan, I am just setting up a similar power cycler setup to what
> you guys have there - found a cheap supplier of wireless 13A mains
> socket automation kits (<15EUR) in the local electronics store,
> butchered remote control unit, sufficient for a cheapo cycler.
Can you please send me some more details?
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
There are certain things men must do to remain men.
-- Kirk, "The Ultimate Computer", stardate 4929.4
^ permalink raw reply
* linux 2.6.12-rc1-bk5 compilation error
From: Jerome Glisse @ 2005-04-04 10:32 UTC (permalink / raw)
To: linuxppc-dev
Hi,
Once again i face an error that i got with a previous
2.6 kernel (i already posted about this in january
i think).
My config G5 bi 2Ghz and you can grab my kernel
config here : http://dj.planet-d.net/config
When compiling 2.6.12-rc1-bk5 i first get unknown
symbol _flush_disable_L1. This is in arch/ppc/kernel/l2cr.S
I changed the makefile in arch/ppc/kernel to have this :
obj-$(CONFIG_POWER4) += cpu_setup_power4.o
into :
obj-$(CONFIG_POWER4) += l2cr.o cpu_setup_power4.o
I am not sure this is good but with this i can go on.
And finaly i face back the same unknown function
than in my previous mail :
disable_6xx_mmu
used in :
arch/ppc/boot/simple/misc-prep.c
At that time i done some test defining CONFIG_6xx
which give others erros or undefining PPC_PREP
which give some others errors.
I finaly used a stupid patch to make it works (below)
Signed-off-by: Jerome Glisse <j.glisse@gmail.com>
But it seems that at some stage it gots forgotten.
Anyway what puzzle me is that it seems i am the
only one to face this ? Am i alone :) ?
diff -Naur a/arch/ppc/boot/simple/misc-prep.c
b/arch/ppc/boot/simple/misc-prep.c
--- a/arch/ppc/boot/simple/misc-prep.c 2004-12-24 22:33:51.000000000 +0100
+++ b/arch/ppc/boot/simple/misc-prep.c 2005-01-21
12:09:50.976426672 +0100
@@ -34,7 +34,11 @@
extern void serial_fixups(void);
extern struct bi_record *decompress_kernel(unsigned long load_addr,
int num_words, unsigned long cksum);
+#ifdef CONFIG_6XX
extern void disable_6xx_mmu(void);
+#elif
+static inline void disable_6xx_mmu(void) {}
+#endif
extern unsigned long mpc10x_get_mem_size(void);
static void
^ permalink raw reply
* using drivers/serial/8250.c with platform bus (Virtex 2 Pro and 85xx/83xx)
From: Andrei Konovalov @ 2005-04-04 10:53 UTC (permalink / raw)
To: linuxppc-embedded
Hi,
Inspired by 85xx, 83xx, and 52xx ports, I've tried to make Xilinx ML300 board to initialize
the 16x50 UART as a platfrom device.
This happened to work after quite a lot of code relying on hard #defines was thrown away
(e.g. arch/ppc/boot/common/ns16550.c needs SERIAL_PORT_DFNS).
Another problem was that serial8250_probe(struct device *dev) from 8250.c walks through the
dev->platform_data[] until the flags field is zero. So I've had to replace
static struct plat_serial8250_port serial_platform_data = {
.mapbase = XPAR_UARTNS550_0_BASEADDR + 3,
.irq = XPAR_INTC_0_UARTNS550_0_VEC_ID,
.uartclk = XPAR_UARTNS550_0_CLOCK_FREQ_HZ,
.regshift = 2,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF,
};
struct platform_device v2pro_platform_devices[] = {
#ifdef CONFIG_SERIAL_8250
{
.name = "serial8250",
.id = 0,
.dev.platform_data = &serial_platform_data,
}
#endif /* CONFIG_SERIAL_8250 */
};
used originally with
static struct plat_serial8250_port serial_platform_data[] = {
{
.mapbase = XPAR_UARTNS550_0_BASEADDR + 3,
.irq = XPAR_INTC_0_UARTNS550_0_VEC_ID,
.uartclk = XPAR_UARTNS550_0_CLOCK_FREQ_HZ,
.regshift = 2,
.iotype = UPIO_MEM,
.flags = UPF_BOOT_AUTOCONF,
},
{
.flags = 0
}
};
struct platform_device v2pro_platform_devices[] = {
#ifdef CONFIG_SERIAL_8250
{
.name = "serial8250",
.id = 0,
.dev.platform_data = serial_platform_data,
}
#endif /* CONFIG_SERIAL_8250 */
};
That { .flags = 0 }
is missing from 85xx / 83xx code, and my guess is that in that case
the data following serial_platform_data[2] array look like something
with .flags = 0 to the 8250.c.
But wouldn't it be safer to add the { .flags = 0 } terminator
to serial_platform_data[] for 85xx/83xx as well?
Thanks,
Andrei
P.S.
All these XPAR_*'s will be removed when the OF device tree come into play.
^ permalink raw reply
* Re: Flat OF Device Tree for ppc32 [was: Platform bus/ppc sys model...]
From: Andrei Konovalov @ 2005-04-04 10:56 UTC (permalink / raw)
To: Jakob Viketoft; +Cc: Jon Masters, Sylvain Munaut, Linux PPC Embedded list
In-Reply-To: <4250EACF.1040403@bitsim.se>
Hi Jakob!
Yes, Jon Loeliger's implementation plan looks OK for me
(as far as I understood Jon's posting; having look at
the current patch would be great). And I could participate
in the implementation for Xilinx if needed too, but don't
object if you do it by yourself (at the moment, I know
little about the OF device tree, so just testing the patch
on ML300 would be fine for me as well).
Should we rely on U-Boot to give that device tree structure to
the kernel? If I got it correct this is how the Freescale team
plans to proceed. Jon (Masters), are you going the same way?
Anyone using arch/ppc/boot/simple bootwrapper with his Virtex 2 Pro
board? If we drop Virtex 2 Pro support in arch/ppc/boot and move to
U-Boot would it hurt anyone?
Thanks,
Andrei
Jakob Viketoft wrote:
> Hi!
>
> You don't happen to have a patch of your current work against one of the
> trees (83xx and 85xx)? It would be much easier to do work in parallell,
> and I'd be happy to do it on the "Xilinx" tree (and help out where I
> can, of course).
>
> Jon Masters and Andrei: Does Jon Loeliger's implementation plan sound
> alright to you? Since you seem quite full-handed on your end anyway,
> Jon, I'll be happy to do the work needed unless anyone has any
> objections...
>
> Cheers!
>
> /Jakob
>
> Jon Loeliger wrote:
>
>> On Thu, 2005-03-31 at 06:33, Jon Masters wrote:
>>
>>> Kumar Gala wrote:
>>>
>>> |> My intention was to give a device tree structure to the kernel at
>>> boot
>>> |> time via a (pseudo?) pointer in bd_info or similar.
>>
>>
>>
>>> This got resurrected recently.
>>
>>
>>
>> Hi!
>>
>>
>>> | I think this is reasonable. The best device tree would be a flattened
>>> | OF tree since we are trying to move the world in that direction. Jon
>>> | Masters around?
>>>
>>> Yes, but I've been tied up with worky and magazine stuff again. If
>>> someone wants to work with me then this might actually happen.
>>
>>
>>
>> Hi Jon,
>>
>> I'm here and actively(!) working on it now. Here is the very
>> rough plan as Kumar and I have discussed it. Please feel free
>> to comment on it or offer suggestions. Ben has suggested that
>> I start with the "second step" below. I'd like to do a round
>> of cleanup first.
>>
>> So far, I have taken the first step of isolating the references
>> to the global __res[] variable into one file and replacing all
>> references to the data in the bd_t structure with a thin, shim
>> layer of function calls that are nominally into an OF-like
>> interface. I have done this for all the 85xx and 83xx boards
>> in my development tree, and am working on the others now.
>> This step effectively isolates the __res[] references to one
>> file where a well defined interface can be created to pose as
>> an OF Device Tree layer (briefly).
>>
>> As a follow-up second step, I plan on introducing essentially
>> the same code currently in ppc64 to handle the flat device tree
>> and provide an interface to that data in exactly the same manner
>> as the ppc64 currently has. I understand the desire to have the
>> flat-tree handling be "outside the kernel".
>>
>> As a third step, the shim layer will be rewritten/augmented to
>> use the actual OF device tree data where it currently fronts
>> for the bd_t data.
>>
>> Finally, as time permits and maintainers allow (read: prod),
>> the other (not 85xx, not 83xx) boards can have their setup code
>> converted to use the "real" OF device tree function calls.
>>
>> When all of that is done, the shim layer can be removed, as needed.
>>
>>
>> Oh, yeah. Um, also on my plate will be to construct the
>> original flat-tree blob in U-Boot to be handed to the kernel.
>> (I'll start with 85xx and 83xx, naturlich.)
>>
>> We have not yet decided on the layout of that tree to determine
>> where all the attributes and devices really belong. I will
>> also discuss with Wolfgang and crew how to generate that tree
>> over in U-Boot land.
>>
>> Right?
>>
>> Thanks,
>> jdl
>>
>
>
^ permalink raw reply
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