* Re: Flat OF Device Tree for ppc32 [was: Platform bus/ppc sys model...]
From: Tom Rini @ 2005-04-07 17:20 UTC (permalink / raw)
To: Andrei Konovalov
Cc: Jon Masters, Sylvain Munaut, Linux PPC Embedded list,
Jakob Viketoft
In-Reply-To: <42511D55.4040507@ru.mvista.com>
On Mon, Apr 04, 2005 at 02:56:21PM +0400, Andrei Konovalov wrote:
> Should we rely on U-Boot to give that device tree structure to
> the kernel? If I got it correct this is how the Freescale team
It shouldn't matter who passes the flattened tree really, so long as the
information is correct. arch/ppc/boot/simple/ should translate
older-non-uboot-bd_t, or PReP residual, or statically construct, or
some combination, into the tree and pass it in. U-Boot (or yaboot or
grub or whatever) can just pass it right to the kernel.
Part of the point of this is to move to a defined interface :)
--
Tom Rini
http://gate.crashing.org/~trini/
^ permalink raw reply
* Re: linux 2.6.12-rc1-bk5 compilation error
From: Tom Rini @ 2005-04-07 17:10 UTC (permalink / raw)
To: Jerome Glisse; +Cc: linuxppc-dev
In-Reply-To: <4240b916050404033230db0551@mail.gmail.com>
On Mon, Apr 04, 2005 at 11:32:39AM +0100, Jerome Glisse wrote:
> Once again i face an error that i got with a previous
> 2.6 kernel (i already posted about this in january
> i think).
[snip]
> Anyway what puzzle me is that it seems i am the
> only one to face this ? Am i alone :) ?
I think you're the only person building a zImage for a 32bit kernel with
a 64bit toolchain for MULTIPLATFORM, yes. :)
This is a valid problem, however. Does the following also work for you?
Signed-off-by: Tom Rini <trini@kernel.crashing.org>
Index: linux-2.6.10/arch/ppc/boot/simple/Makefile
===================================================================
--- linux-2.6.10.orig/arch/ppc/boot/simple/Makefile
+++ linux-2.6.10/arch/ppc/boot/simple/Makefile
@@ -118,10 +118,13 @@ zimageinitrd-$(pcore) := zImage.initrd
end-$(pcore) := pcore
cacheflag-$(pcore) := -include $(clear_L2_L3)
+# Really only valid if CONFIG_6xx=y
zimage-$(CONFIG_PPC_PREP) := zImage-PPLUS
zimageinitrd-$(CONFIG_PPC_PREP) := zImage.initrd-PPLUS
+ifeq ($(CONFIG_6xx),y)
extra.o-$(CONFIG_PPC_PREP) := prepmap.o
misc-$(CONFIG_PPC_PREP) += misc-prep.o mpc10x_memory.o
+endif
end-$(CONFIG_PPC_PREP) := prep
end-$(CONFIG_SANDPOINT) := sandpoint
--
Tom Rini
http://gate.crashing.org/~trini/
^ permalink raw reply
* Re: FCC Ethernet startup crash
From: Tom Rini @ 2005-04-07 16:36 UTC (permalink / raw)
To: Rune Torgersen; +Cc: linuxppc-embedded
In-Reply-To: <DCEAAC0833DD314AB0B58112AD99B93B85933A@ismail.innsys.innovsys.com>
On Tue, Apr 05, 2005 at 01:53:36PM -0500, Rune Torgersen wrote:
> > From: Dan Malek [mailto:dan@embeddededge.com]
> > On Apr 5, 2005, at 12:41 PM, Rune Torgersen wrote:
> >
> > > Without calling fcc_restart in the start, I get lots of
> > "eth0: tx queue
> > > full!." messages.
> >
> > Do you tftp boot your kernel using the boot rom? Does the
> > boot rom disable the Ethernet before calling the kernel?
>
> Yes, I tftp the kernel, using U-Boot (1.1.2 CVS Head as of 11-20-04).
> Haven't looked at the code, but I think it disablesd the FCC Ethernets
> (Have seen discussions about htat on u-boot mailing list before)
>
> The patch Stefan Nickl gave to me works perfectly, and all it does is
> basically move the fcc_restart.
> The kernel was still calling fcc_restart twiche per FCC at startup (one
> time on init_fcc_startup, and then again in fcc_open), now it just calls
> it twice in fcc_open. Seems to work.
Would someone please post what's needed vs current'ish 2.6 so we can get
the proper fix up & in? :) With the Signed-off-by & all that.. Thanks.
--
Tom Rini
http://gate.crashing.org/~trini/
^ permalink raw reply
* Re: [PATCH] [RFC] workaround buggy dcbX instructions in 8xx
From: Tom Rini @ 2005-04-07 16:19 UTC (permalink / raw)
To: Joakim Tjernlund; +Cc: Linuxppc-Embedded@Ozlabs. Org
In-Reply-To: <JPEALJAFNGDDLOPNDIEEGEGJDCAA.joakim.tjernlund@lumentis.se>
On Wed, Apr 06, 2005 at 05:22:57PM +0200, Joakim Tjernlund wrote:
> All cache instructions in 8xx are somewhat buggy as they
> do not update the DAR register when causing a DTLB Miss/Error
[snip]
> ===== head_8xx.S 1.21 vs edited =====
[snip]
> +#define CONFIG_8xx_DCBxFIXED
If this is configurable, it needs to be done in the Kconfig like, well a
real config option. The arguement for doing it as a config option is
that it is possible to avoid these instructions in userland (I _think_
with a properly configured gcc, all you need to do is remove the
memset.S file from glibc), and avoid the (theoretical) slow-down.
That said, it should also probably be an 'advanced' option that defaults
to the fixup.
[snip]
> +#ifdef CONFIG_8xx_DCBxFIXED
> +/* These macros are used to tag DAR with a known value so that the
> + * DataTLBError can recognize a buggy dcbx instruction and workaround
> + * the problem.
> + */
> +#define TAG_VAL 0x00f0 /* -1 may also be used */
Is there an advantage of using -1? If it just "or we could use",
perhaps we should just comment about it, and always define TAG_VAL to
0x00f0 (which will make the rest of the patch a bit cleaner).
[snip]
> +#ifdef CONFIG_8xx_DCBxFIXED
> +/* This is the workaround procedure to calculate the data EA for buggy dcbx,dcbi instructions
> + * by decoding the registers used by the dcbx instruction and adding them.
> + * DAR is set to the calculated address and r10 also holds the EA on exit.
> + */
> +//#define INSTR_CHECK /* define to verify if it is a dcbx instr. Should not be needed. */
> +//#define NO_SELF_MODIFYING_CODE /* define if you don't want to use self modifying code */
> +//#define DEBUG_DCBX_INSTRUCTIONS /* for debugging only. Needs INSTR_CHECK defined as well. */
> +//#define KERNEL_SPACE_ONLY /* define if user space do NOT contain dcbx instructions. */
Aside from preferring #undef FOO to /* #define FOO *//* Comment */ and
detesting // comments:
- Perhaps just one debug symbol (combine INSTR_CHECK and
DEBUG_DCBX_INSTRUCTIONS).
- Is there (aside from "eww, self modifying code") a good reason to have
NO_SELF_MODIFYING_CODE ?
- Since today, IIRC, we avoid these instructions in the kernel anyhow,
is there a reason for KERNEL_SPACE_ONLY ? In my mind at least, I
could see a why for userspace-only, but would think an all/nothing
approach is probably most sane (if you can avoid in space A why not
B?).
--
Tom Rini
http://gate.crashing.org/~trini/
^ permalink raw reply
* Re: [PATCH 3/3] PPC440EP: MTD support for the Bamboo Board
From: Wade Farnsworth @ 2005-04-07 16:05 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-embedded
In-Reply-To: <1112835532.6160.37.camel@jdub.homelinux.org>
On Wed, 2005-04-06 at 17:58, Josh Boyer wrote:
> On Wed, 2005-04-06 at 10:33 -0700, Wade Farnsworth wrote:
>
> Cool beans. Can't wait to test this out tomorrow. Just a couple comments.
>
> <snip>
>
> > +struct ppc440ep_ndfc_regs {
> > + uint cmd;
> > + uint addr;
> > + uint data;
> > + uint reserved1;
> > + uint ecc0;
> > + uint ecc1;
> > + uint ecc2;
> > + uint ecc3;
> > + uint ecc4;
> > + uint ecc5;
> > + uint ecc6;
> > + uint ecc7;
> > + uint b0cr;
> > + uint b1cr;
> > + uint b2cr;
> > + uint b3cr;
> > + uint cr;
> > + uint sr;
> > + uint hwctl;
> > + uint reserved2;
> > + uint revid;
> > +};
>
> These ecc registers actually have a use...
>
> <snip>
>
> > +
> > + /* Set address of NAND IO lines (Using Linear Data Access Region) */
> > + this->IO_ADDR_R = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
> > + this->IO_ADDR_W = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
> > + /* Reference hardware control function */
> > + this->hwcontrol = bamboo_nand0_hwcontrol;
> > + /* Set command delay time */
> > + this->chip_delay = 12;
> > + this->eccmode = NAND_ECC_SOFT;
> > + this->write_byte = bamboo_nand0_write_byte;
> > + this->read_byte = bamboo_nand0_read_byte;
> > + this->write_buf = bamboo_nand0_write_buf;
> > + this->read_buf = bamboo_nand0_read_buf;
> > + this->verify_buf = bamboo_nand0_verify_buf;
> > + this->dev_ready = bamboo_dev_ready;
>
> <snip>
>
> > + /* Link the private data with the MTD structure */
> > + bamboo_nand1_mtd->priv = this;
> > +
> > + /* Set address of NAND IO lines (Using Linear Data Access Region) */
> > + this->IO_ADDR_R = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
> > + this->IO_ADDR_W = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
> > + /* Reference hardware control function */
> > + this->hwcontrol = bamboo_nand1_hwcontrol;
> > + /* Set command delay time */
> > + this->chip_delay = 25;
> > + this->eccmode = NAND_ECC_SOFT;
> > + this->write_byte = bamboo_nand1_write_byte;
> > + this->read_byte = bamboo_nand1_read_byte;
> > + this->write_buf = bamboo_nand1_write_buf;
> > + this->read_buf = bamboo_nand1_read_buf;
> > + this->verify_buf = bamboo_nand1_verify_buf;
> > + this->dev_ready = NULL;
>
> ... so any reason why NAND_ECC_SOFT is used instead of making use of the
> ECC registers that come with the NDFC?
Mainly because I haven't looked at what it would take to get HW ECC
working yet. I'll look at this when I have time, but until then at
least the NAND flashes are functional.
>
> Overall, I think the patch looks good. Care to send it to the MTD
> maintainers so it gets in their CVS tree?
Will do.
-Wade
^ permalink raw reply
* Re: Unhandled relocation of type 11
From: Joshua Lamorie @ 2005-04-07 14:20 UTC (permalink / raw)
To: Wolfgang Grandegger; +Cc: rtai, linuxppc-embedded
In-Reply-To: <4254FB38.9040202@bluewin.ch>
Gidday there,
Thanks for the hint. However I can't see any reference to -fPIC in the
makefiles for ppcperflib. One thing I have discovered though is that
type 11 is defined in /usr/include/elf.h as R_PPC_ELF14. This error
happens twice, for __fixdfsi, and when I look for references to
__fixdfsi, I find that there are two calls to...
blt __fixdfsi
inside ppc_dtoui.S. Looking at the PPC Ref Guide, I see that blt is a
mnemonic for bc (branch conditional) and uses a relative offset of 14
bits. In the same function there is also a use of 'bl' (branch, long I
think) calling the same __fixdfsi. So I'm going to add a stupid line of
assembly to conditionally jump over the branch to __fixdfsi... I hope
that will work, but I haven't touched assembly since an 80286.
Joshua
Wolfgang Grandegger wrote:
>Hello,
>
>I'm not a linker expert but some time ago I got the gcc soft floating
>library working for 8xx and 4xx in kernel space. The problem was with
>PIC. Maybe your library is built with PIC and it's required without. You
>may want to have a look to:
>
> ftp://ftp.denx.de/pub/RTAI/contrib/fp_ppc_8xx.tar.bz2
>
>Wolfgang.
>
>
>On 04/06/2005 11:18 PM Joshua Lamorie wrote:
>
>
>>Please excuse this cross-post, but I think it is of interest to both
>>RTAI and Linux PPC folks.
>>
>>I am making a kernel module (an RTAI task) that needs floating point
>>support so I'm using IBMs perflib floating-point libraries (on a
>>Virtex-II Pro, aka ppc405).
>>
>>This is actually built from Matlab/simulink real-time workshop output (I
>>can't use rtai-lab because I don't think lxrt is available for ppc)...
>>so there end up being many object files to link.
>>
>>So, in the end I have a linker command as follows.
>>
>>powerpc-405-linux-gnu-ld -r -m elf32ppclinux -L/some/directories
>>matlab_root/rtw/c/libsrc/rt_zcfcn.o other.o inputs.o -o module_output.o
>>perflibs/fpopt/libppcfp.a
>>
>>Then I go to insert the module and....
>>/var/shm # insmod test001_build_rtmodule.o
>>Warning: loading test001_build_rtmodule.o will taint the kernel: non-GPL
>>license - Proprietary
>> See http://www.tux.org/lkml/#export-tainted for information about
>>tainted modules
>>test001_build_rtmodule.o: Unhandled relocation of type 11 for __fixdfsi
>>test001_build_rtmodule.o: Unhandled relocation of type 11 for __fixdfsi
>>
>>Hrmm... so any ideas on what type 11 is? I can see from the code in
>>modutils that this value is inside rel->r_info, such as R_PPC_ADDR32 or
>>R_PPC_ADDR16_HA.
>>
>>But where do I get more info about where r_info gets assigned? Do I
>>need to link libppcfp.a in a particular way?
>>
>>Any hints would be appreciated.
>>
>>Thanks in advance.
>>
>>Joshua
>>
>>
>>
--
Xiphos Technologies
(514) 848-9640 x227
(514) 848-9644 fax
www.xiplink.com
_______________________________________________
The information transmitted is intended only for the
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confidential and/or privileged material. If you have
received this in error, please contact the sender and delete
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^ permalink raw reply
* Re: pte_update and 64-bit PTEs on PPC32?
From: Benjamin Herrenschmidt @ 2005-04-07 11:15 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev list, Paul Mackerras, linux-ppc-embedded list
In-Reply-To: <c689550a30a3129f8576f78eaa6f7af4@freescale.com>
> Ben, I agree with you about having the flags in a single word so we can
> lock them properly. In the short term it appears that the issue I'm
> running into is explicit with ptep_get_and_clear():
>
> static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned
> long addr,
> pte_t *ptep)
> {
> return __pte(pte_update(ptep, ~_PAGE_HASHPTE, 0));
> }
>
> It appears that we should be returning the pte that was passed in,
> before its modified? (seems a little silly to me, why bother, the
> caller could do this
No, we should return the PTE that was there before the change
atomically. It can't be done by the caller as if the caller was just
reading the PTE, there would be a race where the PTE could still change
between what you read and what you update. It has to be an atomic
operation.
> -- i've posted to lkml on the issue?). Anyways,
> since pte_update only returns the lower 32-bits the wrong thing
> happens. The following seems to be a better implementation of
> ptep_get_and_clear() for ppc32 which resolves my issue:
>
> static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned
> long addr,
> pte_t *ptep)
> {
> pte_t tmp = *ptep;
> pte_update(ptep, ~_PAGE_HASHPTE, 0);
> return tmp;
> }
>
> If we are ok with this I'll send a patch upstream for it. I'd like to
> still discuss how to make this all proper long term. Currently,
> ptep_get_and_clear was the only user of pte_update that used the return
> value for anything but flags. One change would be for it to return
> just the flags portion of the pte it was given. Another would be for
> us to implement a proper 64-bit pte version of pte_update.
>
> - kumar
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
--
Benjamin Herrenschmidt <benh@kernel.crashing.org>
^ permalink raw reply
* Re: Interrupt disabling design
From: Pantelis Antoniou @ 2005-04-07 10:19 UTC (permalink / raw)
To: Garcia Jérémie; +Cc: linuxppc-dev
In-Reply-To: <D4FDDD1349B5AC46B68FC26AD8AF42D6226B1B@exnet.3il.fr>
Garcia Jérémie wrote:
> Hi everybody,
> I'm trying to emulate a VxWorks-designed application under a linux montavista environment.
> In this application I have critical portion of code which need the interrupts disabled as below:
[snip]
>
> Is it possible to do that? Cause If I do a "cli()" call, I disable interrupts --> so, will the "sti()" call work?
> If yes, it allows me to make my own system call to use them from the user space but I'm not really sure...
>
> Tks a lot for your help
> _______________________________________________
Although it might be possible to something like that with root permissions,
I'd recommend against it.
If you want to run code with disabled interrupts, move that code in a kernel
module and disable/enable interrupts in the kernel
(still bad but acceptable).
IMHO of course.
Regards
Pantelis
^ permalink raw reply
* Interrupt disabling design
From: Garcia Jérémie @ 2005-04-07 10:23 UTC (permalink / raw)
To: linuxppc-dev
Hi everybody,=20
I'm trying to emulate a VxWorks-designed application under a linux =
montavista environment.
In this application I have critical portion of code which need the =
interrupts disabled as below:
-------------------------------------
lockKey =3D OSIntrLock();some=20
.
. // my critical code =20
.
bsos1IntrUnlock(lockKey);
-------------------------------------
As you can see we use an OS encapsulation layer which is used to call =
the OS routines:
----------------------------
int OSIntrLock(void)
{
return (intLock()); // vxWorks routine
}
void OSIntrUnlock(int lockKey)
{
intUnlock(lockKey); // vxWorks routine
}
----------------------------
Furthermore, I'm running my "VxWorks emulator" in the user-space and I'm =
not allowed to modify files others than the OS encapsulation layer ones.
So, how can I use the "cli() / sti()" functions from the user space as =
below:
| USER-SPACE | --> | KERNEL-SPACE | --> | USER-SPACE | --> | =
KERNEL-SPACE | --> | USER-SPACE |
| | | | | | | =
| | | =20
| OSIntrLock() | | cli() | | my critical code | | =
sti() | | ..... |
| OSIntrUnlock() | =20
Is it possible to do that? Cause If I do a "cli()" call, I disable =
interrupts --> so, will the "sti()" call work?
If yes, it allows me to make my own system call to use them from the =
user space but I'm not really sure...
Tks a lot for your help=20
^ permalink raw reply
* Re: Unhandled relocation of type 11
From: Wolfgang Grandegger @ 2005-04-07 9:19 UTC (permalink / raw)
To: Joshua Lamorie; +Cc: rtai, linuxppc-embedded
In-Reply-To: <42545228.9060003@xiphos.ca>
Hello,
I'm not a linker expert but some time ago I got the gcc soft floating
library working for 8xx and 4xx in kernel space. The problem was with
PIC. Maybe your library is built with PIC and it's required without. You
may want to have a look to:
ftp://ftp.denx.de/pub/RTAI/contrib/fp_ppc_8xx.tar.bz2
Wolfgang.
On 04/06/2005 11:18 PM Joshua Lamorie wrote:
> Please excuse this cross-post, but I think it is of interest to both
> RTAI and Linux PPC folks.
>
> I am making a kernel module (an RTAI task) that needs floating point
> support so I'm using IBMs perflib floating-point libraries (on a
> Virtex-II Pro, aka ppc405).
>
> This is actually built from Matlab/simulink real-time workshop output (I
> can't use rtai-lab because I don't think lxrt is available for ppc)...
> so there end up being many object files to link.
>
> So, in the end I have a linker command as follows.
>
> powerpc-405-linux-gnu-ld -r -m elf32ppclinux -L/some/directories
> matlab_root/rtw/c/libsrc/rt_zcfcn.o other.o inputs.o -o module_output.o
> perflibs/fpopt/libppcfp.a
>
> Then I go to insert the module and....
> /var/shm # insmod test001_build_rtmodule.o
> Warning: loading test001_build_rtmodule.o will taint the kernel: non-GPL
> license - Proprietary
> See http://www.tux.org/lkml/#export-tainted for information about
> tainted modules
> test001_build_rtmodule.o: Unhandled relocation of type 11 for __fixdfsi
> test001_build_rtmodule.o: Unhandled relocation of type 11 for __fixdfsi
>
> Hrmm... so any ideas on what type 11 is? I can see from the code in
> modutils that this value is inside rel->r_info, such as R_PPC_ADDR32 or
> R_PPC_ADDR16_HA.
>
> But where do I get more info about where r_info gets assigned? Do I
> need to link libppcfp.a in a particular way?
>
> Any hints would be appreciated.
>
> Thanks in advance.
>
> Joshua
>
^ permalink raw reply
* Re: mpc8260 Multi channel controller howto and kernel driver code
From: Jaap-Jan Boor @ 2005-04-07 8:06 UTC (permalink / raw)
To: Mike Ford; +Cc: 'linuxppc-embedded@ozlabs.org'
In-Reply-To: <D57126AC5DCCD411B90800508BE3A7CA15417CF8@zrtpd0jk.us.nortel.com>
we have a built a driver and use it on a 8270, I can
sent you the code.
Jaap-Jan
On 6-apr-05, at 19:11, Mike Ford wrote:
>
>
>
> Hello Om,
>
> Did you ever publish your MPC8260 MCC driver code??
>
> Thanks,
>
> Mike Ford
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
___
J.G.J. Boor Anton Philipsweg 1
Software Engineer 1223 KZ Hilversum
AimSys bv tel. +31 35 689 1941
Postbus 2194, 1200 CD Hilversum jjboor at aimsys dot nl
^ permalink raw reply
* Re: USB on 8250 PCI
From: Wojciech Kromer @ 2005-04-07 7:51 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <b401be5cfa8b051577b461a9ece7950d@aimsys.nl>
Dnia 2005-04-07 09:31, Użytkownik Jaap-Jan Boor napisał:
> What kernel version do you use?
> In a 2.4 series kernel, you might check m8260_pcibios_fixup()
> and probably set dev->irq ?
>
> I don't know yet if this is the same in 2.6. I recently saw a lot of
> pci setup related changes in this mailing list.
>
> Jaap-Jan
>
i'm using 2.4.19 and 2.4.25 usb code
irqs, and io maps are set correctly
when trying to use ohci code there is one interrupt at startup:
<3>usb-ohci.c: OHCI Unrecoverable Error, controller usb-00:1e.0
anyone knows, what does it mean?
i've modified code to ignore it...
^ permalink raw reply
* Re: USB on 8250 PCI
From: Jaap-Jan Boor @ 2005-04-07 7:31 UTC (permalink / raw)
To: Wojciech Kromer; +Cc: linuxppc-embedded
In-Reply-To: <4254D1D1.8090000@dgt.com.pl>
What kernel version do you use?
In a 2.4 series kernel, you might check m8260_pcibios_fixup()
and probably set dev->irq ?
I don't know yet if this is the same in 2.6. I recently saw a lot of
pci setup related changes in this mailing list.
Jaap-Jan
On 7-apr-05, at 8:23, Wojciech Kromer wrote:
> i still can't figure out is it a hardware or configuration problem,
> i can see all registers, drivers seems to work,
> it can detect device insert
> but there is no data transmision
>
> there are also no interrupts,
> i'm not sure what to write in interrupt_line in PCI config space
>
> any hints?
>
> =============================================================
> here is my dmesg part:
>
> ehci_hcd 00:1e.2: PCI device 1033:00e0
> ehci_hcd 00:1e.2: irq -20, pci mem c924b000
> usb.c: new USB bus registered, assigned bus number 1
> ehci_hcd 00:1e.2: ehci_start hcs_params 0x2385 dbg=0 cc=2 pcc=3 !ppc
> ports=5
> ehci_hcd 00:1e.2: ehci_start portroute 1 0 1 0 0
> ehci_hcd 00:1e.2: ehci_start hcc_params e806 thresh 0 uframes
> 256/512/1024 park
> ehci_hcd 00:1e.2: capability 0001 at e8
> ehci_hcd 00:1e.2: reset command 080b02 park=3 ithresh=8 period=1024
> Reset HALT
> PCI: 00:1e.2 PCI cache line size set incorrectly (0 bytes) by BIOS/FW,
> correcting to 32
> ehci_hcd 00:1e.2: init command 010b09 park=3 ithresh=1 period=256 RUN
> ehci_hcd 00:1e.2: USB 2.0 enabled, EHCI 1.00, driver 2003-Dec-29/2.4
> hcd.c: 00:1e.2 root hub device address 1
> usb.c: kmalloc IF c727f340, numif 1
> usb.c: new device strings: Mfr=3, Product=2, SerialNumber=1
> usb.c: USB device number 1 default language ID 0x0
> Manufacturer: Linux 2.4.19-dgt ehci_hcd
> Product: PCI device 1033:00e0
> SerialNumber: 00:1e.2
> hub.c: USB hub found
> hub.c: 5 ports detected
> hub.c: standalone hub
> hub.c: ganged power switching
> hub.c: individual port over-current protection
> hub.c: Single TT
> hub.c: TT requires at most 8 FS bit times
> hub.c: Port indicators are not supported
> hub.c: power on to power good time: 0ms
> hub.c: hub controller current requirement: 0mA
> hub.c: port removable status: RRRRR
> hub.c: local power source is good
> hub.c: no over-current condition exists
> hub.c: enabling power on all ports
> usb.c: hub driver claimed interface c727f340
> ehci_hcd 00:1e.2: GetStatus port 1 status 001803 POWER sig=j CSC
> CONNECT
> hub.c: port 1, portstatus 501, change 1, 480 Mb/s
> hub.c: port 1 connection change
> hub.c: port 1, portstatus 501, change 1, 480 Mb/s
> hub.c: port 1, portstatus 501, change 0, 480 Mb/s
> hub.c: port 1, portstatus 501, change 0, 480 Mb/s
> hub.c: port 1, portstatus 501, change 0, 480 Mb/s
> hub.c: port 1, portstatus 501, change 0, 480 Mb/s
> hub.c: port 1, portstatus 511, change 0, 480 Mb/s
> hub.c: port 1 of hub 1 not reset yet, waiting 10ms
> hub.c: port 1, portstatus 511, change 0, 480 Mb/s
> hub.c: port 1 of hub 1 not reset yet, waiting 10ms
> ehci_hcd 00:1e.2: port 1 full speed --> companion
> ehci_hcd 00:1e.2: GetStatus port 1 status 003801 POWER OWNER sig=j
> CONNECT
> hub.c: port 1, portstatus 0, change 10, 12 Mb/s
> ehci_hcd 00:1e.2: free_config devnum 0
> hub.c: port 2, portstatus 100, change 0, 12 Mb/s
> hub.c: port 3, portstatus 100, change 0, 12 Mb/s
> hub.c: port 4, portstatus 100, change 0, 12 Mb/s
> hub.c: port 5, portstatus 100, change 0, 12 Mb/s
>
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
^ permalink raw reply
* [PATCH] Intracom platform patch
From: Pantelis Antoniou @ 2005-04-07 7:14 UTC (permalink / raw)
To: ppc embedded list, Tom Rini, Dan Malek, Jeff Garzik
[-- Attachment #1: Type: text/plain, Size: 290 bytes --]
Hi all
The following patch adds platform support for the netta2 board.
It's main attraction however is as an example on how to do
the fec_8xx platform driver initialization.
Regards
Pantelis
P.S. This and the previous patches are
Signed-off-by: Pantelis Antoniou <panto@intracom.gr>
[-- Attachment #2: intracom-platforms.patch --]
[-- Type: text/x-patch, Size: 29452 bytes --]
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/arch/ppc/platforms/Makefile linux-2.5-intracom/arch/ppc/platforms/Makefile
--- linux-2.5/arch/ppc/platforms/Makefile 2005-04-01 13:33:07 +03:00
+++ linux-2.5-intracom/arch/ppc/platforms/Makefile 2005-04-01 13:54:32 +03:00
@@ -46,6 +46,7 @@
obj-$(CONFIG_SBC82xx) += sbc82xx.o
obj-$(CONFIG_SPRUCE) += spruce.o
obj-$(CONFIG_LITE5200) += lite5200.o
+obj-$(CONFIG_NETTA2) += netta2_setup.o
ifeq ($(CONFIG_SMP),y)
obj-$(CONFIG_PPC_PMAC) += pmac_smp.o
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/arch/ppc/platforms/intracom_common.h linux-2.5-intracom/arch/ppc/platforms/intracom_common.h
--- linux-2.5/arch/ppc/platforms/intracom_common.h 1970-01-01 02:00:00 +02:00
+++ linux-2.5-intracom/arch/ppc/platforms/intracom_common.h 2005-03-28 13:11:37 +03:00
@@ -0,0 +1,92 @@
+#ifndef INTRACOM_COMMON_H
+#define INTRACOM_COMMON_H
+
+#ifndef __ASSEMBLY__
+
+/**********************************************/
+
+extern spinlock_t i_port_spinlock;
+
+static inline unsigned long i_pin_lock(void)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&i_port_spinlock, flags);
+ return flags;
+}
+
+static inline void i_pin_unlock(unsigned long flags)
+{
+ spin_unlock_irqrestore(&i_port_spinlock, flags);
+}
+
+/**********************************************/
+
+#ifdef CONFIG_8xx
+#include <platforms/intracom_common_8xx.h>
+#endif
+
+#ifdef CONFIG_8260
+#include <platforms/intracom_common_82xx.h>
+#endif
+
+#include <syslib/fw_env.h>
+
+/**********************************************/
+
+enum intracom_board {
+ ib_netta,
+ ib_netta2,
+ ib_netphone,
+ ib_iad,
+ ib_netroute,
+};
+
+struct intracom_config {
+ enum intracom_board board;
+ int version;
+
+ /* generic enable options */
+ int fec_no;
+ struct {
+ int phy_addr;
+ int fec_irq;
+ int phy_irq;
+ __u8 mac_addr[6];
+ } fec[2];
+
+ int fxs_no;
+ int fxo_no;
+ int bri_no;
+ int pri_no;
+ int dsl_no;
+ int pcmcia_no;
+
+ union {
+ struct {
+ /* various */
+ unsigned int has_alt_nand_wiring : 1;
+ unsigned int has_io_reset : 1;
+ unsigned int has_64Mb_sdram : 1;
+ unsigned int has_swapped_hook : 1;
+ unsigned int has_isdn : 1;
+ } netta;
+
+ struct {
+ } netta2;
+
+ struct {
+ } netphone;
+
+ struct {
+ } iad;
+ } u;
+};
+
+extern struct intracom_config i_cfg;
+
+/**********************************************/
+
+#endif
+
+#endif
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/arch/ppc/platforms/intracom_common_82xx.h linux-2.5-intracom/arch/ppc/platforms/intracom_common_82xx.h
--- linux-2.5/arch/ppc/platforms/intracom_common_82xx.h 1970-01-01 02:00:00 +02:00
+++ linux-2.5-intracom/arch/ppc/platforms/intracom_common_82xx.h 2005-03-28 13:11:37 +03:00
@@ -0,0 +1,4 @@
+#ifndef INTRACOM_COMMON_82XX_H
+#define INTRACOM_COMMON_82XX_H
+
+#endif
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/arch/ppc/platforms/intracom_common_8xx.h linux-2.5-intracom/arch/ppc/platforms/intracom_common_8xx.h
--- linux-2.5/arch/ppc/platforms/intracom_common_8xx.h 1970-01-01 02:00:00 +02:00
+++ linux-2.5-intracom/arch/ppc/platforms/intracom_common_8xx.h 2005-03-28 13:11:37 +03:00
@@ -0,0 +1,224 @@
+#ifndef INTRACOM_COMMON_8XX_H
+#define INTRACOM_COMMON_8XX_H
+
+/**********************************************/
+
+/* shorthand for the ports data registers */
+#define PORTA (((volatile immap_t *)IMAP_ADDR)->im_ioport.iop_padat)
+#define PORTB (((volatile immap_t *)IMAP_ADDR)->im_cpm.cp_pbdat)
+#define PORTC (((volatile immap_t *)IMAP_ADDR)->im_ioport.iop_pcdat)
+#define PORTD (((volatile immap_t *)IMAP_ADDR)->im_ioport.iop_pddat)
+#define PORTE (((volatile immap_t *)IMAP_ADDR)->im_cpm.cp_pedat)
+
+/********************************************************************************/
+
+/* external write only register */
+#define PORTXWO (*(volatile uint *)ERWO_BASE)
+extern volatile uint *PORTXWO_map;
+extern uint PORTXWO_last;
+
+/* external read only register */
+#define PORTXRO (*(volatile uint *)ERRO_BASE)
+extern volatile uint *PORTXRO_map;
+
+/********************************************************************************/
+
+#define PIN_PORT_EQ(p, x) ((void *) & x ## _PORT == (void *) & p)
+#define PIN_PORT_NE(p, x) ((void *) & x ## _PORT != (void *) & p)
+
+#define PIN_PORT_RW(x) (PIN_PORT_NE(PORTXWO, x) && PIN_PORT_NE(PORTXRO, x))
+#define PIN_PORT_RO(x) PIN_PORT_EQ(PORTXRO, x)
+#define PIN_PORT_WO(x) PIN_PORT_EQ(PORTXWO, x)
+
+/********************************************************************************/
+
+#define PIN_SFT(x) ((sizeof(x ## _PORT) * 8 - 1) - x ## _BIT)
+#define PIN_MSK(x) (1U << PIN_SFT(x))
+
+/********************************************************************************/
+
+/* normal m8xx pins */
+#define _PIN_HI(x) \
+ do { \
+ x ## _PORT |= PIN_MSK(x); \
+ } while(0)
+
+#define _PIN_LO(x) \
+ do { \
+ x ## _PORT &= ~PIN_MSK(x); \
+ } while(0)
+
+#define _PIN_TGL(x) \
+ do { \
+ x ## _PORT ^= PIN_MSK(x); \
+ } while(0)
+
+#define _PIN_GET(x) \
+ (!!(x ## _PORT & PIN_MSK(x)))
+
+#define _PIN_SET(x, v) \
+ do { \
+ if (__builtin_constant_p(v)) { \
+ if ((v) != 0) \
+ _PIN_HI(x); \
+ else \
+ _PIN_LO(x); \
+ } else \
+ x ## _PORT = ( x ## _PORT & ~PIN_MSK(x)) | (!!(v) << PIN_SFT(x)); \
+ } while(0)
+
+#define _PIN_CFG_IN(x) \
+ do { \
+ if (PIN_PORT_EQ(PORTA, x)) \
+ PORTA_config(PIN_MSK(x), 0, 0); \
+ if (PIN_PORT_EQ(PORTB, x)) \
+ PORTB_config(PIN_MSK(x), 0, 0); \
+ if (PIN_PORT_EQ(PORTC, x)) \
+ PORTC_config(PIN_MSK(x), 0, 0); \
+ if (PIN_PORT_EQ(PORTD, x)) \
+ PORTD_config(PIN_MSK(x), 0, 0); \
+ if (PIN_PORT_EQ(PORTE, x)) \
+ PORTE_config(PIN_MSK(x), 0, 0); \
+ } while(0)
+
+#define _PIN_CFG_INT_ANY(x) \
+ do { \
+ if (PIN_PORT_EQ(PORTC, x)) \
+ PORTC_config(PIN_MSK(x), 0, 0); \
+ } while(0)
+
+#define _PIN_CFG_INT_FALL(x) \
+ do { \
+ if (PIN_PORT_EQ(PORTC, x)) \
+ PORTC_config(PIN_MSK(x), 0, 0); \
+ } while(0)
+
+#define _PIN_CFG_OUT(x, v) \
+ do { \
+ _PIN_SET(x, v); \
+ if (PIN_PORT_EQ(PORTA, x)) \
+ PORTA_config(0, PIN_MSK(x), 0); \
+ if (PIN_PORT_EQ(PORTB, x)) \
+ PORTB_config(0, PIN_MSK(x), 0); \
+ if (PIN_PORT_EQ(PORTC, x)) \
+ PORTC_config(0, PIN_MSK(x), 0); \
+ if (PIN_PORT_EQ(PORTD, x)) \
+ PORTD_config(0, PIN_MSK(x), 0); \
+ if (PIN_PORT_EQ(PORTE, x)) \
+ PORTE_config(0, PIN_MSK(x), 0); \
+ } while(0)
+
+#define _PIN_CFG_OUT_HI(x) _PIN_CFG_OUT(x, 1)
+#define _PIN_CFG_OUT_LO(x) _PIN_CFG_OUT(x, 0)
+
+/***********************************************************************/
+
+#define PIN_HI(x) \
+ do { \
+ if (PIN_PORT_EQ(PORTXWO, x)) { \
+ PORTXWO_last |= PIN_MSK(x); \
+ *PORTXWO_map = PORTXWO_last; \
+ } else \
+ _PIN_HI(x); \
+ } while(0)
+
+#define PIN_LO(x) \
+ do { \
+ if (PIN_PORT_EQ(PORTXWO, x)) { \
+ PORTXWO_last &= ~PIN_MSK(x); \
+ *PORTXWO_map = PORTXWO_last; \
+ } else \
+ _PIN_LO(x); \
+ } while(0)
+
+#define PIN_TGL(x) \
+ do { \
+ if (PIN_PORT_EQ(PORTXWO, x)) { \
+ PORTXWO_last ^= PIN_MSK(x); \
+ *PORTXWO_map = PORTXWO_last; \
+ } else \
+ _PIN_TGL(x); \
+ } while(0)
+
+#define PIN_SET(x, v) \
+ do { \
+ if (PIN_PORT_EQ(PORTXWO, x)) { \
+ if (v) \
+ PORTXWO_last |= PIN_MSK(x); \
+ else \
+ PORTXWO_last &= ~PIN_MSK(x); \
+ *PORTXWO_map = PORTXWO_last; \
+ } else \
+ _PIN_SET(x, v); \
+ } while(0)
+
+#define PIN_GET(x) \
+ (PIN_PORT_EQ(PORTXRO, x) ? \
+ !!(*PORTXRO_map & PIN_MSK(x)) : \
+ (PIN_PORT_EQ(PORTXWO, x) ? \
+ !!(PORTXWO_last & PIN_MSK(x)) : \
+ _PIN_GET(x)))
+
+/********************************************************************************/
+
+static inline void PORTA_config(uint inmsk, uint outmsk, uint dummy)
+{
+ volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
+ ushort msk = (ushort)inmsk | (ushort)outmsk;
+
+ imap->im_ioport.iop_padir = (imap->im_ioport.iop_padir & ~(ushort)inmsk) | (ushort)outmsk;
+ imap->im_ioport.iop_paodr &= ~msk;
+ imap->im_ioport.iop_papar &= ~msk;
+}
+
+static inline void PORTB_config(uint inmsk, uint outmsk, uint dummy)
+{
+ volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
+ uint msk = inmsk | outmsk;
+
+ imap->im_cpm.cp_pbdir = (imap->im_cpm.cp_pbdir & ~inmsk) | outmsk;
+ imap->im_cpm.cp_pbodr &= ~msk;
+ imap->im_cpm.cp_pbpar &= ~msk;
+}
+
+static inline void PORTC_config(uint inmsk, uint outmsk, uint fallmsk)
+{
+ volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
+ ushort msk = (ushort)inmsk | (ushort)outmsk;
+
+ imap->im_ioport.iop_pcdir = (imap->im_ioport.iop_pcdir & ~(ushort)inmsk) | (ushort)outmsk;
+ imap->im_ioport.iop_pcso &= ~msk;
+ imap->im_ioport.iop_pcint = (imap->im_ioport.iop_pcint & ~(ushort)inmsk) | ((ushort)fallmsk & (ushort)inmsk);
+ imap->im_ioport.iop_pcpar &= ~msk;
+}
+
+static inline void PORTD_config(uint inmsk, uint outmsk, uint dummy)
+{
+ volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
+ ushort msk = (ushort)inmsk | (ushort)outmsk;
+
+ imap->im_ioport.iop_pddir = (imap->im_ioport.iop_pddir & ~(ushort)inmsk) | (ushort)outmsk;
+ imap->im_ioport.iop_pdpar &= ~msk;
+}
+
+static inline void PORTE_config(uint inmsk, uint outmsk, uint dummy)
+{
+ volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
+ uint msk = inmsk | outmsk;
+
+ imap->im_cpm.cp_pedir = (imap->im_cpm.cp_pedir & ~inmsk) | outmsk;
+ imap->im_cpm.cp_peodr &= ~msk;
+ imap->im_cpm.cp_pepar &= ~msk;
+}
+
+static inline void PORTXWO_config(uint dummy1, uint dummy2, uint dummy3)
+{
+ /* nothing */
+}
+
+static inline void PORTXRO_config(uint dummy1, uint dummy2, uint dummy3)
+{
+ /* nothing */
+}
+
+#endif
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/arch/ppc/platforms/intracom_swspi.h linux-2.5-intracom/arch/ppc/platforms/intracom_swspi.h
--- linux-2.5/arch/ppc/platforms/intracom_swspi.h 1970-01-01 02:00:00 +02:00
+++ linux-2.5-intracom/arch/ppc/platforms/intracom_swspi.h 2005-03-28 13:11:37 +03:00
@@ -0,0 +1,35 @@
+#ifndef INTRACOM_SWSPI_H
+#define INTRACOM_SWSPI_H
+
+#ifndef __ASSEMBLY__
+
+#include "intracom_common.h"
+
+#ifdef CONFIG_NETTA
+#include "netta.h"
+#endif
+
+static inline unsigned int spi_transfer(unsigned int tx)
+{
+ unsigned int rx;
+ int b;
+
+ rx = 0; b = 8;
+ while (--b >= 0) {
+ PIN_SET(SPI_TXD, tx & 0x80);
+ tx <<= 1;
+ PIN_TGL(SPI_CLK);
+ SPI_DELAY();
+ rx <<= 1;
+ rx |= PIN_GET(SPI_RXD);
+ PIN_TGL(SPI_CLK);
+ SPI_DELAY();
+ }
+
+ return rx;
+}
+
+#endif
+
+#endif
+
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/arch/ppc/platforms/netta2.h linux-2.5-intracom/arch/ppc/platforms/netta2.h
--- linux-2.5/arch/ppc/platforms/netta2.h 1970-01-01 02:00:00 +02:00
+++ linux-2.5-intracom/arch/ppc/platforms/netta2.h 2005-03-28 13:11:37 +03:00
@@ -0,0 +1,279 @@
+/*
+ * A collection of structures, addresses, and values associated with
+ * the NetTA2 systems.
+ *
+ * Copyright (c) 2002-2004 * Intracom S.A. Greece
+ *
+ * Pantelis Antoniou
+ * panto@intracom.gr
+ *
+ */
+#ifndef __MACH_NETTA2_DEFS
+#define __MACH_NETTA2_DEFS
+
+#include <linux/config.h>
+
+#ifndef __ASSEMBLY__
+
+#include <asm/atomic.h>
+#include <asm/ppcboot.h>
+
+#include <asm/8xx_immap.h>
+#include <asm/commproc.h>
+
+#endif
+
+/***********************************************************************************************************
+
+ Pin definitions:
+
+ (Default settings for V3)
+
+ +------+----------------+--------+---+------------------------------------------------------------
+ | # | Name | Type | R | Comment
+ +------+----------------+--------+---+------------------------------------------------------------
+ | PA3 | IO_RESET | Output | H | General I/O reset
+ | PA6 | N.C. | Output | L |
+ | PA7 | N.C. | Output | L |
+ | PA10 | DSP_RESET | Output | H | DSP reset
+ | PA14 | N.C. | Output | L |
+ | PA15 | N.C. | Output | L |
+ | PB19 | N.C. | Output | L |
+ | PB23 | N.C. | Output | L |
+ | PB26 | SPIEN_SEP | Output | H | Serial EEPROM chip select
+ | PB27 | N.C. | Output | L |
+ | PB28 | SPI_RXD_3V | Input | | SPI Data Rx
+ | PB29 | SPI_TXD | Output | H | SPI Data Tx
+ | PB30 | SPI_CLK | Output | H | SPI Clock
+ | PC10 | N.C. | Output | L |
+ | PC11 | N.C. | Output | L |
+ | PC12 | F_RY_BY | Input | | NAND F_RY_BY
+ | PC13 | HOOK | Input | | Hook input interrupt
+ | PC15 | N.C. | Output | L |
+ | PE17 | F_ALE | Output | L | NAND F_ALE
+ | PE18 | F_CLE | Output | L | NAND F_CLE
+ | PE20 | F_CE | Output | H | NAND F_CE
+ | PE24 | USB_RESET | Output | H | USB_RESET
+ | PE27 | SPICS_DUSLIC | Output | H | Duslic chip select
+ | PE28 | N.C. | Output | L |
+ | PE29 | N.C. | Output | L |
+ | PE30 | N.C. | Output | L |
+ | PE31 | N.C. | Output | L |
+ +------+----------------+--------+---+---------------------------------------------------
+
+ ----------------------------------------------------------------------------------------------
+
+ Serial register input:
+
+ +------+----------------+------------------------------------------------------------
+ | # | Name | Comment
+ +------+----------------+------------------------------------------------------------
+ | 4 | HOOK | Hook switch
+ | 5 | BT_LINK | Bluetooth link status
+ | 6 | HOST_WAKE | Bluetooth host wake up
+ | 7 | OK_ETH | Cisco inline power OK status
+ +------+----------------+------------------------------------------------------------
+
+ ----------------------------------------------------------------------------------------------
+
+ Chip selects:
+
+ +------+----------------+------------------------------------------------------------
+ | # | Name | Comment
+ +------+----------------+------------------------------------------------------------
+ | CS0 | CS0 | Boot flash
+ | CS1 | CS_FLASH | NAND flash
+ | CS2 | CS_DSP | DSP
+ | CS3 | DCS_DRAM | DRAM
+ | CS4 | CS_FLASH2 | (V2) 2nd flash
+ +------+----------------+------------------------------------------------------------
+
+ ----------------------------------------------------------------------------------------------
+
+ Interrupts:
+
+ +------+----------------+------------------------------------------------------------
+ | # | Name | Comment
+ +------+----------------+------------------------------------------------------------
+ | IRQ1 | IRQ_DSP | DSP interrupt
+ | IRQ3 | S_INTER | DUSLIC ???
+ | IRQ4 | F_RY_BY | NAND
+ | IRQ7 | IRQ_MAX | MAX 3100 interrupt
+ +------+----------------+------------------------------------------------------------
+
+ ----------------------------------------------------------------------------------------------
+
+ Interrupts on PCMCIA pins:
+
+ +------+----------------+------------------------------------------------------------
+ | # | Name | Comment
+ +------+----------------+------------------------------------------------------------
+ | IP_A0| PHY1_LINK | Link status changed for #1 Ethernet interface
+ | IP_A1| PHY2_LINK | Link status changed for #2 Ethernet interface
+ | IP_A2| RMII1_MDINT | PHY interrupt for #1
+ | IP_A3| RMII2_MDINT | PHY interrupt for #2
+ | IP_A5| HOST_WAKE | (V2) Bluetooth host wake
+ | IP_A6| OK_ETH | (V2) Cisco inline power OK
+ +------+----------------+------------------------------------------------------------
+
+*************************************************************************************************/
+
+#define IMAP_ADDR 0xFF000000 /* physical base address of IMMR area */
+#define IMAP_SIZE (64 * 1024) /* mapped size of IMMR area */
+
+/* We don't use the 8259.
+*/
+#define NR_8259_INTS 0
+
+#define DSP_SIZE 0x00010000 /* 64K */
+#define NAND_SIZE 0x00010000
+#define USB_SIZE 0x00010000
+#define DUMMY_SIZE 0x00010000
+
+#define DSP_BASE 0xF1000000
+#define NAND_BASE 0xF1010000
+#define USB_BASE 0xF1020000
+#define DUMMY_BASE 0xF1030000
+
+/***********************************************************************/
+
+/* SPI pin definitions */
+
+#define SPI_RXD_PORT PORTB
+#define SPI_RXD_BIT 28
+
+#define SPI_TXD_PORT PORTB
+#define SPI_TXD_BIT 29
+
+#define SPI_CLK_PORT PORTB
+#define SPI_CLK_BIT 30
+
+#define SPI_DELAY() /* nothing */
+
+/**********************************************/
+
+/* output */
+#define UART_RTS_PORT PORTB
+#define UART_RTS_BIT 19
+
+/* input */
+#define UART_CTS_PORT PORTB
+#define UART_CTS_BIT 23
+
+/**********************************************/
+
+/* NAND flash pins */
+
+#define F_ALE_PORT PORTE
+#define F_ALE_BIT 17
+
+#define F_CLE_PORT PORTE
+#define F_CLE_BIT 18
+
+#define F_CE_PORT PORTE
+#define F_CE_BIT 20
+
+#define F_RY_BY_PORT PORTC
+#define F_RY_BY_BIT 12
+
+/**********************************************/
+
+/* CODEC */
+#define SPIEN_C_PORT PORTE
+#define SPIEN_C_BIT 27
+
+#define COM_HOOK_PORT PORTC
+#define COM_HOOK_BIT 13
+
+/**********************************************/
+/* FXO */
+
+#define SPIEN_FXO_PORT PORTE
+#define SPIEN_FXO_BIT 28
+
+#define IRQ_FXO_PORT PORTE
+#define IRQ_FXO_BIT 29
+
+#define SPIEN_FXO_V4_PORT PORTE
+#define SPIEN_FXO_V4_BIT 30
+
+/**********************************************/
+
+/* DSP */
+#define DSP_RESET_PORT PORTA
+#define DSP_RESET_BIT 10
+
+/**********************************************/
+
+/* USB */
+#define USB_RESET_PORT PORTE
+#define USB_RESET_BIT 24
+
+/* FXO/DuSLIC reset */
+#define PCM_DEV_RESET_PORT PORTB
+#define PCM_DEV_RESET_BIT 27
+
+/**********************************************/
+/* ADSL Reset */
+#define ADSL_RESET_V4_PORT PORTE
+#define ADSL_RESET_V4_BIT 29
+
+/**********************************************/
+
+#define P_SHDN_PORT PORTE
+#define P_SHDN_BIT 23
+
+#define P_OC_PORT PORTB
+#define P_OC_BIT 26
+
+/**********************************************/
+
+/*-----------------------------------------------------------------------
+ * PCMCIA stuff
+ *-----------------------------------------------------------------------
+ *
+ */
+#define PCMCIA_MEM_SIZE ( 64 << 20 )
+
+#define MAX_HWIFS 1 /* overwrite default in include/asm-ppc/ide.h */
+
+/*
+ * Definitions for IDE0 Interface
+ */
+#define IDE0_BASE_OFFSET 0
+#define IDE0_DATA_REG_OFFSET (PCMCIA_MEM_SIZE + 0x320)
+#define IDE0_ERROR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 1)
+#define IDE0_NSECTOR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 2)
+#define IDE0_SECTOR_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 3)
+#define IDE0_LCYL_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 4)
+#define IDE0_HCYL_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 5)
+#define IDE0_SELECT_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 6)
+#define IDE0_STATUS_REG_OFFSET (2 * PCMCIA_MEM_SIZE + 0x320 + 7)
+#define IDE0_CONTROL_REG_OFFSET 0x0106
+#define IDE0_IRQ_REG_OFFSET 0x000A /* not used */
+
+#define IDE0_INTERRUPT 13
+
+/* XXX FUCK!, for IDE disk set to 0, for normal PCMCIA set to 1 */
+/* XXX don't ask me why.. */
+#if 1
+/* define IO_BASE for PCMCIA */
+#define _IO_BASE 0x80000000
+#define _IO_BASE_SIZE (64<<10)
+#endif
+
+/***********************************************************************/
+
+#ifndef __ASSEMBLY__
+
+extern int netta2_version;
+extern int netta2_is_iad;
+extern int netta2_dsp_ti;
+extern int netta2_dsp_clk;
+extern int netta2_has_fxo;
+extern int netta2_has_pcmcia;
+
+#endif
+
+#endif /* __MACH_NETVIA_DEFS */
+
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/arch/ppc/platforms/netta2_setup.c linux-2.5-intracom/arch/ppc/platforms/netta2_setup.c
--- linux-2.5/arch/ppc/platforms/netta2_setup.c 1970-01-01 02:00:00 +02:00
+++ linux-2.5-intracom/arch/ppc/platforms/netta2_setup.c 2005-04-07 09:39:22 +03:00
@@ -0,0 +1,359 @@
+/*
+ * arch/ppc/platforms/netta2.c Platform setup for the Intracom NetTA board
+ *
+ * Copyright (C) 2003-2005, Intracom S.A. Greece
+ * All Rights Reserved.
+ *
+ * Pantelis Antoniou
+ * panto@intracom.gr
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/param.h>
+#include <linux/string.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+#include <linux/fec_8xx_pd.h>
+
+#include <asm/delay.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/page.h>
+#include <asm/processor.h>
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/ppcboot.h>
+
+#include "intracom_common.h"
+
+#define UPMA 0x00000000
+#define UPMB 0x00800000
+
+/***********************************************************************/
+
+spinlock_t i_port_spinlock;
+
+/***********************************************************************/
+
+EXPORT_SYMBOL(i_port_spinlock);
+
+/***********************************************************************/
+
+int netta2_version;
+int netta2_is_iad;
+int netta2_dsp_ti;
+int netta2_dsp_clk;
+int netta2_has_fxo;
+int netta2_has_pcmcia;
+
+EXPORT_SYMBOL(netta2_version);
+EXPORT_SYMBOL(netta2_is_iad);
+EXPORT_SYMBOL(netta2_dsp_ti);
+EXPORT_SYMBOL(netta2_dsp_clk);
+EXPORT_SYMBOL(netta2_has_fxo);
+EXPORT_SYMBOL(netta2_has_pcmcia);
+
+static int has_token(const char *board, const char *token)
+{
+ const char *s;
+ int len = strlen(token);
+
+ s = strstr(board, token);
+ return s != NULL && (s == board || s[-1] == ' ') && (s[len] == '\0' || s[len] == ' ');
+}
+
+static void __init detect_board_features(void)
+{
+ const char *board = __fw_getenv("board");
+
+ netta2_version = 3;
+ netta2_is_iad = 1;
+ netta2_dsp_ti = 54;
+ netta2_dsp_clk = 15360;
+ netta2_has_fxo = 0;
+ netta2_has_pcmcia = 0;
+
+ /* no board? just set defaults */
+ if (board != NULL) {
+ /* detect version */
+ if (has_token(board, "V1"))
+ netta2_version = 1;
+ else if (has_token(board, "V2"))
+ netta2_version = 2;
+ else if (has_token(board, "V3"))
+ netta2_version = 3;
+ else if (has_token(board, "V4"))
+ netta2_version = 4;
+
+ netta2_is_iad = has_token(board, "IAD");
+
+ if (has_token(board, "54XX"))
+ netta2_dsp_ti = 54;
+ else if (has_token(board, "55XX"))
+ netta2_dsp_ti = 55;
+
+ if (has_token(board, "DSPC15360"))
+ netta2_dsp_clk = 15360;
+ else if (has_token(board, "DSPC18432"))
+ netta2_dsp_clk = 18432;
+ else if (has_token(board, "DSPC19546"))
+ netta2_dsp_clk = 19546;
+
+ netta2_has_fxo = has_token(board, "FXO");
+ netta2_has_pcmcia = has_token(board, "PCMCIA");
+ }
+
+ printk(KERN_INFO "netta2: version=%d, is_iad=%d, dsp_ti=%d, dsp_clk=%d, has_fxo=%d, has_pcmcia=%d\n",
+ netta2_version, netta2_is_iad, netta2_dsp_ti, netta2_dsp_clk, netta2_has_fxo, netta2_has_pcmcia);
+}
+
+static const char *ro_vars[] = {
+ "ethaddr", "eth1addr", "adsladdr", "serial#", "usbaddr", "usb1addr", "ver", "board",
+ NULL
+};
+
+/***********************************************************************/
+
+static struct fec_platform_info fec1_info;
+static struct fec_platform_info fec2_info;
+
+static struct platform_device mpc8xx_fec1_device = {
+ .name = MPC8XX_FEC_NAME,
+ .id = 0,
+ .dev = {
+ .platform_data = &fec1_info,
+ },
+};
+
+static struct platform_device mpc8xx_fec2_device = {
+ .name = MPC8XX_FEC_NAME,
+ .id = 1,
+ .dev = {
+ .platform_data = &fec2_info,
+ },
+};
+
+/***********************************************************************/
+
+/* access ports */
+#define setbits32(_addr, _v) out_be32(&(_addr), in_be32(&(_addr)) | (_v))
+#define clrbits32(_addr, _v) out_be32(&(_addr), in_be32(&(_addr)) & ~(_v))
+
+#define setbits16(_addr, _v) out_be16(&(_addr), in_be16(&(_addr)) | (_v))
+#define clrbits16(_addr, _v) out_be16(&(_addr), in_be16(&(_addr)) & ~(_v))
+
+static void __init netta2_fixup_fec_pdata(struct platform_device *pd, int idx)
+{
+ struct fec_platform_info *fpi = pd->dev.platform_data;
+ immap_t *immap = (immap_t *)IMAP_ADDR;
+ bd_t *bd = (bd_t *) __res;
+ const char *s;
+ char *e;
+ int i;
+ static int fixed_once = 0;
+ const char *macvar;
+
+ /* guard */
+ if ((unsigned int)idx >= 2)
+ return;
+
+ if (idx == 0)
+ macvar = "ethaddr";
+ else
+ macvar = "eth1addr";
+
+ /* if no mac don't bother */
+ if ((s = __fw_getenv(macvar)) == NULL)
+ return;
+
+ /* common settings */
+ fpi->fec_no = idx;
+ fpi->use_mdio = 1;
+ fpi->rx_ring = 128;
+ fpi->tx_ring = 16;
+ fpi->rx_copybreak = 240;
+ fpi->use_napi = 1;
+ fpi->napi_weight = 17;
+ for (i = 0; i < 6; i++) {
+ fpi->macaddr[i] = simple_strtoul(s, &e, 16);
+ if (*e)
+ s = e + 1;
+ }
+ fpi->sys_clk = bd->bi_intfreq;
+
+ if (fixed_once == 0) {
+ /* use MDC for MII (common) */
+ setbits16(immap->im_ioport.iop_pdpar, 0x0080);
+ clrbits16(immap->im_ioport.iop_pddir, 0x0080);
+ fixed_once = 1;
+ }
+
+ if (idx == 0) {
+
+ /* configure FEC1 pins */
+ setbits16(immap->im_ioport.iop_papar, 0xe810);
+ setbits16(immap->im_ioport.iop_padir, 0x0810);
+ clrbits16(immap->im_ioport.iop_padir, 0xe000);
+
+ setbits32(immap->im_cpm.cp_pbpar, 0x00000001);
+ clrbits32(immap->im_cpm.cp_pbdir, 0x00000001);
+
+ setbits32(immap->im_cpm.cp_cptr, 0x00000100);
+ clrbits32(immap->im_cpm.cp_cptr, 0x00000050);
+
+ clrbits16(immap->im_ioport.iop_pcpar, 0x0200);
+ clrbits16(immap->im_ioport.iop_pcdir, 0x0200);
+ clrbits16(immap->im_ioport.iop_pcso, 0x0200);
+ setbits16(immap->im_ioport.iop_pcint, 0x0200);
+
+ /* setup specific */
+ fpi->phy_addr = 0x09;
+ fpi->fec_irq = SIU_LEVEL1;
+ fpi->phy_irq = CPM_IRQ_OFFSET + CPMVEC_PIO_PC6;
+
+ } else {
+
+ /* configure FEC2 pins */
+ setbits32(immap->im_cpm.cp_pepar, 0x00039620);
+ setbits32(immap->im_cpm.cp_pedir, 0x00039620);
+ setbits32(immap->im_cpm.cp_peso, 0x00031000);
+ clrbits32(immap->im_cpm.cp_peso, 0x00008620);
+
+ setbits32(immap->im_cpm.cp_cptr, 0x00000080);
+ clrbits32(immap->im_cpm.cp_cptr, 0x00000028);
+
+ clrbits16(immap->im_ioport.iop_pcpar, 0x0200);
+ clrbits16(immap->im_ioport.iop_pcdir, 0x0200);
+ clrbits16(immap->im_ioport.iop_pcso, 0x0200);
+ setbits16(immap->im_ioport.iop_pcint, 0x0200);
+
+ /* setup specific */
+ fpi->phy_addr = 0x0B;
+ fpi->fec_irq = SIU_LEVEL3;
+ fpi->phy_irq = CPM_IRQ_OFFSET + CPMVEC_PIO_PC7;
+ }
+}
+
+static int __init netta2_platform_notify(struct device *dev)
+{
+ static struct {
+ const char *bus_id;
+ void (*rtn)(struct platform_device * pdev, int idx);
+ } dev_map[] = {
+ { MPC8XX_FEC_NAME, netta2_fixup_fec_pdata },
+ };
+ struct platform_device *pdev;
+ int i, j, idx;
+ const char *s;
+
+ if (dev && dev->bus_id)
+ for (i = 0; i < ARRAY_SIZE(dev_map); i++) {
+ idx = -1;
+ if ((s = strrchr(dev->bus_id, '.')) != NULL)
+ idx = (int)simple_strtol(s + 1, NULL, 10);
+ else
+ s = dev->bus_id + strlen(s);
+
+ j = s - dev->bus_id;
+
+ if (!strncmp(dev->bus_id, dev_map[i].bus_id, j)) {
+ pdev = container_of(dev, struct platform_device, dev);
+ dev_map[i].rtn(pdev, idx);
+ }
+ }
+
+ return 0;
+}
+
+int __init
+netta2_init(void)
+{
+ volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
+ volatile memctl8xx_t *memctl;
+
+ printk(KERN_NOTICE "netta2: Init\n");
+
+ platform_notify = netta2_platform_notify;
+
+ __fw_envinit(16 * 1024, ro_vars); /* we know the max env size is 16K for this */
+
+ detect_board_features();
+
+ memctl = &imap->im_memctl;
+
+ /* CS0: boot flash */
+ /* XXX leave boot settings */
+
+ /* CS2: DSP */
+ memctl->memc_or2 = ((0xFFFFFFFFLU & ~(DSP_SIZE - 1)) | OR_CSNT_SAM | OR_BI | OR_SCY_15_CLK | OR_ACS_DIV2 | OR_EHTR | OR_TRLX);
+ memctl->memc_br2 = ((DSP_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
+
+ /* CS3: DRAM */
+
+#if defined(CONFIG_USB_D12)
+ /* USB chip select */
+ memctl->memc_or6 = ((0xFFFFFFFFLU & ~(USB_SIZE - 1)) | OR_G5LS | OR_BI | OR_SCY_2_CLK);
+ memctl->memc_br6 = ((USB_BASE & BR_BA_MSK) | BR_PS_8 | BR_V | BR_MS_UPMA);
+ /* dummy cs for usb delay */
+ memctl->memc_or7 = ((0xFFFFFFFFLU & ~(DUMMY_SIZE - 1)) | OR_TRLX | OR_BI | OR_SCY_12_CLK);
+ memctl->memc_br7 = ((DUMMY_BASE & BR_BA_MSK) | BR_PS_8 | BR_V);
+
+#else
+ memctl->memc_br6 &= ~BR_V; /* invalid */
+ memctl->memc_br7 &= ~BR_V; /* invalid */
+#endif
+
+ imap->im_siu_conf.sc_sypcr |= 0x0000FF00;
+
+ spin_lock_init(&i_port_spinlock);
+
+ /* configure SPI pins */
+ _PIN_CFG_OUT_HI(SPI_TXD);
+ _PIN_CFG_OUT_HI(SPI_CLK);
+ _PIN_CFG_IN(SPI_RXD);
+
+ /* configure NAND pins */
+ _PIN_CFG_OUT_LO(F_ALE);
+ _PIN_CFG_OUT_LO(F_CLE);
+ _PIN_CFG_OUT_HI(F_CE);
+ _PIN_CFG_IN(F_RY_BY);
+
+ /* configure DSP pins */
+ _PIN_CFG_OUT_HI(DSP_RESET);
+
+#if defined(CONFIG_USB_D12)
+ /* configure USB pins */
+ _PIN_CFG_OUT_LO(USB_RESET);
+ udelay(1000);
+ _PIN_CFG_OUT_HI(USB_RESET);
+#endif
+
+ /* configure DSP pins */
+ _PIN_CFG_OUT_HI(DSP_RESET);
+
+ /* configure FXO/DuSLIC reset */
+ _PIN_CFG_OUT_HI(PCM_DEV_RESET);
+
+ /* configure UART pins */
+ _PIN_CFG_OUT_HI(UART_RTS);
+ _PIN_CFG_IN(UART_CTS);
+
+ /* USB CLK now from processor */
+ if (netta2_version == 4) {
+ /* PA3 = BRGO3 */
+ imap->im_ioport.iop_padir |= 0x1000;
+ imap->im_ioport.iop_papar |= 0x1000;
+ /* Set BRG3O = CLK2/6 */
+ imap->im_cpm.cp_brgc3 = 0x0001400e;
+ }
+
+ platform_device_register(&mpc8xx_fec1_device);
+ platform_device_register(&mpc8xx_fec2_device);
+
+ return 0;
+}
+
+arch_initcall(netta2_init);
+
^ permalink raw reply
* [PATCH] Update fec_8xx to new platform device model
From: Pantelis Antoniou @ 2005-04-07 7:11 UTC (permalink / raw)
To: linuxppc-embedded, Tom Rini, Dan Malek, Jeff Garzik,
'kumar.gala@freescale.com'
[-- Attachment #1: Type: text/plain, Size: 121 bytes --]
Hi all
The following patch updates the in-tree fec_8xx driver
to use the new platform device model.
Regards
Pantelis
[-- Attachment #2: fec_8xx-platform.patch --]
[-- Type: text/x-patch, Size: 16005 bytes --]
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/drivers/net/Makefile linux-2.5-intracom/drivers/net/Makefile
--- linux-2.5/drivers/net/Makefile 2005-03-28 10:27:10 +03:00
+++ linux-2.5-intracom/drivers/net/Makefile 2005-03-28 13:16:55 +03:00
@@ -194,3 +194,6 @@
obj-$(CONFIG_ETRAX_ETHERNET) += cris/
obj-$(CONFIG_NETCONSOLE) += netconsole.o
+
+obj-$(CONFIG_FEC_8XX) += fec_8xx/ mii.o
+
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/drivers/net/fec_8xx/Kconfig linux-2.5-intracom/drivers/net/fec_8xx/Kconfig
--- linux-2.5/drivers/net/fec_8xx/Kconfig 2004-07-08 09:54:06 +03:00
+++ linux-2.5-intracom/drivers/net/fec_8xx/Kconfig 2005-04-07 09:40:15 +03:00
@@ -1,6 +1,6 @@
config FEC_8XX
tristate "Motorola 8xx FEC driver"
- depends on NET_ETHERNET && 8xx && (NETTA || NETPHONE)
+ depends on NET_ETHERNET && 8xx
select MII
config FEC_8XX_GENERIC_PHY
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/drivers/net/fec_8xx/Makefile linux-2.5-intracom/drivers/net/fec_8xx/Makefile
--- linux-2.5/drivers/net/fec_8xx/Makefile 2004-07-08 09:54:06 +03:00
+++ linux-2.5-intracom/drivers/net/fec_8xx/Makefile 2005-04-07 09:40:15 +03:00
@@ -5,8 +5,3 @@
obj-$(CONFIG_FEC_8XX) += fec_8xx.o
fec_8xx-objs := fec_main.o fec_mii.o
-
-# the platform instantatiation objects
-ifeq ($(CONFIG_NETTA),y)
-fec_8xx-objs += fec_8xx-netta.o
-endif
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/drivers/net/fec_8xx/fec_8xx-netta.c linux-2.5-intracom/drivers/net/fec_8xx/fec_8xx-netta.c
--- linux-2.5/drivers/net/fec_8xx/fec_8xx-netta.c 2004-10-25 09:50:47 +03:00
+++ linux-2.5-intracom/drivers/net/fec_8xx/fec_8xx-netta.c 1970-01-01 02:00:00 +02:00
@@ -1,153 +0,0 @@
-/*
- * FEC instantatiation file for NETTA
- */
-
-#include <linux/config.h>
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/sched.h>
-#include <linux/string.h>
-#include <linux/ptrace.h>
-#include <linux/errno.h>
-#include <linux/ioport.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/mii.h>
-#include <linux/ethtool.h>
-#include <linux/bitops.h>
-
-#include <asm/8xx_immap.h>
-#include <asm/pgtable.h>
-#include <asm/mpc8xx.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include <asm/commproc.h>
-
-#include "fec_8xx.h"
-
-/*************************************************/
-
-static struct fec_platform_info fec1_info = {
- .fec_no = 0,
- .use_mdio = 1,
- .phy_addr = 8,
- .fec_irq = SIU_LEVEL1,
- .phy_irq = CPM_IRQ_OFFSET + CPMVEC_PIO_PC6,
- .rx_ring = 128,
- .tx_ring = 16,
- .rx_copybreak = 240,
- .use_napi = 1,
- .napi_weight = 17,
-};
-
-static struct fec_platform_info fec2_info = {
- .fec_no = 1,
- .use_mdio = 1,
- .phy_addr = 2,
- .fec_irq = SIU_LEVEL3,
- .phy_irq = CPM_IRQ_OFFSET + CPMVEC_PIO_PC7,
- .rx_ring = 128,
- .tx_ring = 16,
- .rx_copybreak = 240,
- .use_napi = 1,
- .napi_weight = 17,
-};
-
-static struct net_device *fec1_dev;
-static struct net_device *fec2_dev;
-
-/* XXX custom u-boot & Linux startup needed */
-extern const char *__fw_getenv(const char *var);
-
-/* access ports */
-#define setbits32(_addr, _v) __fec_out32(&(_addr), __fec_in32(&(_addr)) | (_v))
-#define clrbits32(_addr, _v) __fec_out32(&(_addr), __fec_in32(&(_addr)) & ~(_v))
-
-#define setbits16(_addr, _v) __fec_out16(&(_addr), __fec_in16(&(_addr)) | (_v))
-#define clrbits16(_addr, _v) __fec_out16(&(_addr), __fec_in16(&(_addr)) & ~(_v))
-
-int fec_8xx_platform_init(void)
-{
- immap_t *immap = (immap_t *)IMAP_ADDR;
- bd_t *bd = (bd_t *) __res;
- const char *s;
- char *e;
- int i;
-
- /* use MDC for MII */
- setbits16(immap->im_ioport.iop_pdpar, 0x0080);
- clrbits16(immap->im_ioport.iop_pddir, 0x0080);
-
- /* configure FEC1 pins */
- setbits16(immap->im_ioport.iop_papar, 0xe810);
- setbits16(immap->im_ioport.iop_padir, 0x0810);
- clrbits16(immap->im_ioport.iop_padir, 0xe000);
-
- setbits32(immap->im_cpm.cp_pbpar, 0x00000001);
- clrbits32(immap->im_cpm.cp_pbdir, 0x00000001);
-
- setbits32(immap->im_cpm.cp_cptr, 0x00000100);
- clrbits32(immap->im_cpm.cp_cptr, 0x00000050);
-
- clrbits16(immap->im_ioport.iop_pcpar, 0x0200);
- clrbits16(immap->im_ioport.iop_pcdir, 0x0200);
- clrbits16(immap->im_ioport.iop_pcso, 0x0200);
- setbits16(immap->im_ioport.iop_pcint, 0x0200);
-
- /* configure FEC2 pins */
- setbits32(immap->im_cpm.cp_pepar, 0x00039620);
- setbits32(immap->im_cpm.cp_pedir, 0x00039620);
- setbits32(immap->im_cpm.cp_peso, 0x00031000);
- clrbits32(immap->im_cpm.cp_peso, 0x00008620);
-
- setbits32(immap->im_cpm.cp_cptr, 0x00000080);
- clrbits32(immap->im_cpm.cp_cptr, 0x00000028);
-
- clrbits16(immap->im_ioport.iop_pcpar, 0x0200);
- clrbits16(immap->im_ioport.iop_pcdir, 0x0200);
- clrbits16(immap->im_ioport.iop_pcso, 0x0200);
- setbits16(immap->im_ioport.iop_pcint, 0x0200);
-
- /* fill up */
- fec1_info.sys_clk = bd->bi_intfreq;
- fec2_info.sys_clk = bd->bi_intfreq;
-
- s = __fw_getenv("ethaddr");
- if (s != NULL) {
- for (i = 0; i < 6; i++) {
- fec1_info.macaddr[i] = simple_strtoul(s, &e, 16);
- if (*e)
- s = e + 1;
- }
- }
-
- s = __fw_getenv("eth1addr");
- if (s != NULL) {
- for (i = 0; i < 6; i++) {
- fec2_info.macaddr[i] = simple_strtoul(s, &e, 16);
- if (*e)
- s = e + 1;
- }
- }
-
- fec_8xx_init_one(&fec1_info, &fec1_dev);
- fec_8xx_init_one(&fec2_info, &fec2_dev);
-
- return fec1_dev != NULL && fec2_dev != NULL ? 0 : -1;
-}
-
-void fec_8xx_platform_cleanup(void)
-{
- if (fec2_dev != NULL)
- fec_8xx_cleanup_one(fec2_dev);
-
- if (fec1_dev != NULL)
- fec_8xx_cleanup_one(fec1_dev);
-}
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/drivers/net/fec_8xx/fec_8xx.h linux-2.5-intracom/drivers/net/fec_8xx/fec_8xx.h
--- linux-2.5/drivers/net/fec_8xx/fec_8xx.h 2004-07-08 09:54:06 +03:00
+++ linux-2.5-intracom/drivers/net/fec_8xx/fec_8xx.h 2005-04-07 09:40:15 +03:00
@@ -3,8 +3,8 @@
#include <linux/mii.h>
#include <linux/netdevice.h>
-
#include <linux/types.h>
+#include <linux/fec_8xx_pd.h>
/* HW info */
@@ -83,21 +83,6 @@
#define PKT_MAXBLR_SIZE ((PKT_MAXBUF_SIZE+3) & ~3)
/* This is needed so that invalidate_xxx wont invalidate too much */
#define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE)
-
-/* platform interface */
-
-struct fec_platform_info {
- int fec_no; /* FEC index */
- int use_mdio; /* use external MII */
- int phy_addr; /* the phy address */
- int fec_irq, phy_irq; /* the irq for the controller */
- int rx_ring, tx_ring; /* number of buffers on rx */
- int sys_clk; /* system clock */
- __u8 macaddr[6]; /* mac address */
- int rx_copybreak; /* limit we copy small frames */
- int use_napi; /* use NAPI */
- int napi_weight; /* NAPI weight */
-};
/* forward declaration */
struct fec;
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/drivers/net/fec_8xx/fec_main.c linux-2.5-intracom/drivers/net/fec_8xx/fec_main.c
--- linux-2.5/drivers/net/fec_8xx/fec_main.c 2004-10-25 09:50:47 +03:00
+++ linux-2.5-intracom/drivers/net/fec_8xx/fec_main.c 2005-04-07 09:40:15 +03:00
@@ -70,7 +70,7 @@
/*****************************************************************************************/
-static void fec_whack_reset(fec_t * fecp)
+static int fec_whack_reset(fec_t * fecp)
{
int i;
@@ -78,14 +78,13 @@
* Whack a reset. We should wait for this.
*/
FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
- for (i = 0;
- (FR(fecp, ecntrl) & FEC_ECNTRL_RESET) != 0 && i < FEC_RESET_DELAY;
- i++)
+ for (i = 0; i < FEC_RESET_DELAY; i++) {
+ if ((FR(fecp, ecntrl) & FEC_ECNTRL_RESET) == 0)
+ return 0; /* OK */
udelay(1);
+ }
- if (i == FEC_RESET_DELAY)
- printk(KERN_WARNING "FEC Reset timeout!\n");
-
+ return -1;
}
/****************************************************************************/
@@ -246,10 +245,13 @@
const struct fec_platform_info *fpi = fep->fpi;
cbd_t *bdp;
struct sk_buff *skb;
- int i;
+ int i, r;
__u32 addrhi, addrlo;
- fec_whack_reset(fep->fecp);
+ r = fec_whack_reset(fep->fecp);
+ if (r != 0)
+ printk(KERN_ERR DRV_MODULE_NAME
+ ": %s FEC Reset FAILED!\n", dev->name);
/*
* Set station address.
@@ -478,7 +480,7 @@
int received = 0;
__u16 pkt_len, sc;
int curidx;
- int rx_work_limit;
+ int rx_work_limit = 0; /* pacify gcc */
if (fpi->use_napi) {
rx_work_limit = min(dev->quota, *budget);
@@ -1067,20 +1069,19 @@
return rc;
}
-int fec_8xx_init_one(const struct fec_platform_info *fpi,
- struct net_device **devp)
+int fec_8xx_init_instance(const struct fec_platform_info *fpi, struct net_device **ndevp)
{
immap_t *immap = (immap_t *) IMAP_ADDR;
static int fec_8xx_version_printed = 0;
- struct net_device *dev = NULL;
+ struct net_device *ndev = NULL;
struct fec_enet_private *fep = NULL;
fec_t *fecp = NULL;
- int i;
+ int i, r;
int err = 0;
int registered = 0;
__u32 siel;
- *devp = NULL;
+ *ndevp = NULL;
switch (fpi->fec_no) {
case 0:
@@ -1096,22 +1097,26 @@
}
if (fec_8xx_version_printed++ == 0)
- printk(KERN_INFO "%s", version);
+ printk(KERN_INFO DRV_MODULE_NAME
+ "%s", version);
i = sizeof(*fep) + (sizeof(struct sk_buff **) *
(fpi->rx_ring + fpi->tx_ring));
- dev = alloc_etherdev(i);
- if (!dev) {
+ ndev = alloc_etherdev(i);
+ if (!ndev) {
err = -ENOMEM;
goto err;
}
- SET_MODULE_OWNER(dev);
+ SET_MODULE_OWNER(ndev);
- fep = netdev_priv(dev);
+ fep = netdev_priv(ndev);
/* partial reset of FEC */
- fec_whack_reset(fecp);
+ r = fec_whack_reset(fecp);
+ if (r != 0)
+ printk(KERN_ERR DRV_MODULE_NAME
+ ": %s FEC Reset FAILED!\n", ndev->name);
/* point rx_skbuff, tx_skbuff */
fep->rx_skbuff = (struct sk_buff **)&fep[1];
@@ -1128,7 +1133,7 @@
* Set the Ethernet address.
*/
for (i = 0; i < 6; i++)
- dev->dev_addr[i] = fpi->macaddr[i];
+ ndev->dev_addr[i] = fpi->macaddr[i];
fep->ring_base = dma_alloc_coherent(NULL,
(fpi->tx_ring + fpi->rx_ring) *
@@ -1136,7 +1141,7 @@
GFP_KERNEL);
if (fep->ring_base == NULL) {
printk(KERN_ERR DRV_MODULE_NAME
- ": %s dma alloc failed.\n", dev->name);
+ ": %s dma alloc failed.\n", ndev->name);
err = -ENOMEM;
goto err;
}
@@ -1166,20 +1171,20 @@
/*
* The FEC Ethernet specific entries in the device structure.
*/
- dev->open = fec_enet_open;
- dev->hard_start_xmit = fec_enet_start_xmit;
- dev->tx_timeout = fec_timeout;
- dev->watchdog_timeo = TX_TIMEOUT;
- dev->stop = fec_enet_close;
- dev->get_stats = fec_enet_get_stats;
- dev->set_multicast_list = fec_set_multicast_list;
- dev->set_mac_address = fec_set_mac_address;
+ ndev->open = fec_enet_open;
+ ndev->hard_start_xmit = fec_enet_start_xmit;
+ ndev->tx_timeout = fec_timeout;
+ ndev->watchdog_timeo = TX_TIMEOUT;
+ ndev->stop = fec_enet_close;
+ ndev->get_stats = fec_enet_get_stats;
+ ndev->set_multicast_list = fec_set_multicast_list;
+ ndev->set_mac_address = fec_set_mac_address;
if (fpi->use_napi) {
- dev->poll = fec_enet_poll;
- dev->weight = fpi->napi_weight;
+ ndev->poll = fec_enet_poll;
+ ndev->weight = fpi->napi_weight;
}
- dev->ethtool_ops = &fec_ethtool_ops;
- dev->do_ioctl = fec_ioctl;
+ ndev->ethtool_ops = &fec_ethtool_ops;
+ ndev->do_ioctl = fec_ioctl;
fep->fec_phy_speed =
((((fpi->sys_clk + 4999999) / 2500000) / 2) & 0x3F) << 1;
@@ -1194,33 +1199,41 @@
FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
- netif_carrier_off(dev);
+ netif_carrier_off(ndev);
- err = register_netdev(dev);
+ err = register_netdev(ndev);
if (err != 0)
goto err;
registered = 1;
if (fpi->use_mdio) {
- fep->mii_if.dev = dev;
+ fep->mii_if.dev = ndev;
fep->mii_if.mdio_read = fec_mii_read;
fep->mii_if.mdio_write = fec_mii_write;
fep->mii_if.phy_id_mask = 0x1f;
fep->mii_if.reg_num_mask = 0x1f;
- fep->mii_if.phy_id = fec_mii_phy_id_detect(dev);
+ fep->mii_if.phy_id = fec_mii_phy_id_detect(ndev);
+ } else {
+ spin_lock_irq(&fep->lock);
+ fec_restart(ndev, 1, 100); /* XXX this sucks */
+ spin_unlock_irq(&fep->lock);
+
+ netif_carrier_on(ndev);
+
+ netif_start_queue(ndev);
}
- *devp = dev;
+ *ndevp = ndev;
return 0;
err:
- if (dev != NULL) {
+ if (ndev != NULL) {
if (fecp != NULL)
fec_whack_reset(fecp);
if (registered)
- unregister_netdev(dev);
+ unregister_netdev(ndev);
if (fep != NULL) {
if (fep->ring_base)
@@ -1230,25 +1243,29 @@
sizeof(cbd_t), fep->ring_base,
fep->ring_mem_addr);
}
- free_netdev(dev);
+ free_netdev(ndev);
}
return err;
}
-int fec_8xx_cleanup_one(struct net_device *dev)
+int fec_8xx_cleanup_instance(struct net_device *ndev)
{
- struct fec_enet_private *fep = netdev_priv(dev);
+ struct fec_enet_private *fep = netdev_priv(ndev);
fec_t *fecp = fep->fecp;
const struct fec_platform_info *fpi = fep->fpi;
+ int r;
- fec_whack_reset(fecp);
+ r = fec_whack_reset(fecp);
+ if (r != 0)
+ printk(KERN_ERR DRV_MODULE_NAME
+ ": %s FEC Reset FAILED!\n", ndev->name);
- unregister_netdev(dev);
+ unregister_netdev(ndev);
dma_free_coherent(NULL, (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t),
fep->ring_base, fep->ring_mem_addr);
- free_netdev(dev);
+ free_netdev(ndev);
return 0;
}
@@ -1257,14 +1274,51 @@
/**************************************************************************************/
/**************************************************************************************/
+static int __devinit
+mpc8xx_fec_probe(struct device *dev)
+{
+ struct net_device *ndev;
+ int r;
+
+ r = fec_8xx_init_instance(dev->platform_data, &ndev);
+ if (r != 0)
+ return r;
+
+ dev_set_drvdata(dev, ndev);
+ return 0;
+}
+
+static int
+mpc8xx_fec_remove(struct device *dev)
+{
+ struct net_device *ndev = dev_get_drvdata(dev);
+
+ fec_8xx_cleanup_instance(ndev);
+
+ dev_set_drvdata(dev, NULL);
+
+ return 0;
+}
+
+static struct device_driver mpc8xx_fec_driver = {
+ .name = MPC8XX_FEC_NAME,
+ .bus = &platform_bus_type,
+ .probe = mpc8xx_fec_probe,
+ .remove = mpc8xx_fec_remove,
+#ifdef CONFIG_PM
+/* .suspend = mpc8xx_fec_suspend, TODO */
+/* .resume = mpc8xx_fec_resume, TODO */
+#endif
+};
+
static int __init fec_8xx_init(void)
{
- return fec_8xx_platform_init();
+ return driver_register(&mpc8xx_fec_driver);
}
static void __exit fec_8xx_cleanup(void)
{
- fec_8xx_platform_cleanup();
+ driver_unregister(&mpc8xx_fec_driver);
}
/**************************************************************************************/
diff -Nur --exclude=RCS --exclude=CVS --exclude=SCCS --exclude=BitKeeper --exclude=ChangeSet linux-2.5/include/linux/fec_8xx_pd.h linux-2.5-intracom/include/linux/fec_8xx_pd.h
--- linux-2.5/include/linux/fec_8xx_pd.h 1970-01-01 02:00:00 +02:00
+++ linux-2.5-intracom/include/linux/fec_8xx_pd.h 2005-04-07 09:41:53 +03:00
@@ -0,0 +1,22 @@
+#ifndef FEC_8XX_PD_H
+#define FEC_8XX_PD_H
+
+#include <asm/types.h>
+
+#define MPC8XX_FEC_NAME "FEC"
+
+/* XXX */
+struct fec_platform_info {
+ int fec_no; /* FEC index */
+ int use_mdio; /* use external MII */
+ int phy_addr; /* the phy address */
+ int fec_irq, phy_irq; /* the irq for the controller */
+ int rx_ring, tx_ring; /* number of buffers on rx */
+ int sys_clk; /* system clock */
+ __u8 macaddr[6]; /* mac address */
+ int rx_copybreak; /* limit we copy small frames */
+ int use_napi; /* use NAPI */
+ int napi_weight; /* NAPI weight */
+};
+
+#endif
^ permalink raw reply
* Re: USB on 8250 PCI
From: Wojciech Kromer @ 2005-04-07 6:23 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <977733d4c9325dbf4052cea66b10824c@aimsys.nl>
i still can't figure out is it a hardware or configuration problem,
i can see all registers, drivers seems to work,
it can detect device insert
but there is no data transmision
there are also no interrupts,
i'm not sure what to write in interrupt_line in PCI config space
any hints?
=============================================================
here is my dmesg part:
ehci_hcd 00:1e.2: PCI device 1033:00e0
ehci_hcd 00:1e.2: irq -20, pci mem c924b000
usb.c: new USB bus registered, assigned bus number 1
ehci_hcd 00:1e.2: ehci_start hcs_params 0x2385 dbg=0 cc=2 pcc=3 !ppc
ports=5
ehci_hcd 00:1e.2: ehci_start portroute 1 0 1 0 0
ehci_hcd 00:1e.2: ehci_start hcc_params e806 thresh 0 uframes
256/512/1024 park
ehci_hcd 00:1e.2: capability 0001 at e8
ehci_hcd 00:1e.2: reset command 080b02 park=3 ithresh=8 period=1024
Reset HALT
PCI: 00:1e.2 PCI cache line size set incorrectly (0 bytes) by BIOS/FW,
correcting to 32
ehci_hcd 00:1e.2: init command 010b09 park=3 ithresh=1 period=256 RUN
ehci_hcd 00:1e.2: USB 2.0 enabled, EHCI 1.00, driver 2003-Dec-29/2.4
hcd.c: 00:1e.2 root hub device address 1
usb.c: kmalloc IF c727f340, numif 1
usb.c: new device strings: Mfr=3, Product=2, SerialNumber=1
usb.c: USB device number 1 default language ID 0x0
Manufacturer: Linux 2.4.19-dgt ehci_hcd
Product: PCI device 1033:00e0
SerialNumber: 00:1e.2
hub.c: USB hub found
hub.c: 5 ports detected
hub.c: standalone hub
hub.c: ganged power switching
hub.c: individual port over-current protection
hub.c: Single TT
hub.c: TT requires at most 8 FS bit times
hub.c: Port indicators are not supported
hub.c: power on to power good time: 0ms
hub.c: hub controller current requirement: 0mA
hub.c: port removable status: RRRRR
hub.c: local power source is good
hub.c: no over-current condition exists
hub.c: enabling power on all ports
usb.c: hub driver claimed interface c727f340
ehci_hcd 00:1e.2: GetStatus port 1 status 001803 POWER sig=j CSC CONNECT
hub.c: port 1, portstatus 501, change 1, 480 Mb/s
hub.c: port 1 connection change
hub.c: port 1, portstatus 501, change 1, 480 Mb/s
hub.c: port 1, portstatus 501, change 0, 480 Mb/s
hub.c: port 1, portstatus 501, change 0, 480 Mb/s
hub.c: port 1, portstatus 501, change 0, 480 Mb/s
hub.c: port 1, portstatus 501, change 0, 480 Mb/s
hub.c: port 1, portstatus 511, change 0, 480 Mb/s
hub.c: port 1 of hub 1 not reset yet, waiting 10ms
hub.c: port 1, portstatus 511, change 0, 480 Mb/s
hub.c: port 1 of hub 1 not reset yet, waiting 10ms
ehci_hcd 00:1e.2: port 1 full speed --> companion
ehci_hcd 00:1e.2: GetStatus port 1 status 003801 POWER OWNER sig=j CONNECT
hub.c: port 1, portstatus 0, change 10, 12 Mb/s
ehci_hcd 00:1e.2: free_config devnum 0
hub.c: port 2, portstatus 100, change 0, 12 Mb/s
hub.c: port 3, portstatus 100, change 0, 12 Mb/s
hub.c: port 4, portstatus 100, change 0, 12 Mb/s
hub.c: port 5, portstatus 100, change 0, 12 Mb/s
^ permalink raw reply
* Re: [PATCH 3/3] PPC440EP: MTD support for the Bamboo Board
From: Josh Boyer @ 2005-04-07 0:58 UTC (permalink / raw)
To: Wade Farnsworth; +Cc: linuxppc-embedded
In-Reply-To: <1112808814.24527.307.camel@rhino.az.mvista.com>
On Wed, 2005-04-06 at 10:33 -0700, Wade Farnsworth wrote:
Cool beans. Can't wait to test this out tomorrow. Just a couple comments.
<snip>
> +struct ppc440ep_ndfc_regs {
> + uint cmd;
> + uint addr;
> + uint data;
> + uint reserved1;
> + uint ecc0;
> + uint ecc1;
> + uint ecc2;
> + uint ecc3;
> + uint ecc4;
> + uint ecc5;
> + uint ecc6;
> + uint ecc7;
> + uint b0cr;
> + uint b1cr;
> + uint b2cr;
> + uint b3cr;
> + uint cr;
> + uint sr;
> + uint hwctl;
> + uint reserved2;
> + uint revid;
> +};
These ecc registers actually have a use...
<snip>
> +
> + /* Set address of NAND IO lines (Using Linear Data Access Region) */
> + this->IO_ADDR_R = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
> + this->IO_ADDR_W = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
> + /* Reference hardware control function */
> + this->hwcontrol = bamboo_nand0_hwcontrol;
> + /* Set command delay time */
> + this->chip_delay = 12;
> + this->eccmode = NAND_ECC_SOFT;
> + this->write_byte = bamboo_nand0_write_byte;
> + this->read_byte = bamboo_nand0_read_byte;
> + this->write_buf = bamboo_nand0_write_buf;
> + this->read_buf = bamboo_nand0_read_buf;
> + this->verify_buf = bamboo_nand0_verify_buf;
> + this->dev_ready = bamboo_dev_ready;
<snip>
> + /* Link the private data with the MTD structure */
> + bamboo_nand1_mtd->priv = this;
> +
> + /* Set address of NAND IO lines (Using Linear Data Access Region) */
> + this->IO_ADDR_R = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
> + this->IO_ADDR_W = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
> + /* Reference hardware control function */
> + this->hwcontrol = bamboo_nand1_hwcontrol;
> + /* Set command delay time */
> + this->chip_delay = 25;
> + this->eccmode = NAND_ECC_SOFT;
> + this->write_byte = bamboo_nand1_write_byte;
> + this->read_byte = bamboo_nand1_read_byte;
> + this->write_buf = bamboo_nand1_write_buf;
> + this->read_buf = bamboo_nand1_read_buf;
> + this->verify_buf = bamboo_nand1_verify_buf;
> + this->dev_ready = NULL;
... so any reason why NAND_ECC_SOFT is used instead of making use of the
ECC registers that come with the NDFC?
Overall, I think the patch looks good. Care to send it to the MTD
maintainers so it gets in their CVS tree?
thx,
josh
^ permalink raw reply
* Re: Kernel SCM saga..
From: Benjamin Herrenschmidt @ 2005-04-07 0:13 UTC (permalink / raw)
To: Dan Malek; +Cc: linuxppc-dev list, linuxppc-embedded
In-Reply-To: <e27030866ac1c1efda319294eba6b626@embeddededge.com>
On Wed, 2005-04-06 at 19:33 -0400, Dan Malek wrote:
> On Apr 6, 2005, at 6:37 PM, Wolfgang Denk wrote:
>
> > are there any plans yet how to continue PPC kernel development now
> > that Linus (and probably others, too) stopped using BitKeeper?
>
> For all practical purposes, we have stopped using it as intended long
> ago. When we first started, those of us responsible for maintaining
> part
> of the sources simply continuously pushed updates. Very efficient,
> everyone
> saw what was up to date. Since 2.4, we have all been passing patches
> around, pushing things into BK didn't seem to matter, and usually
> were ignored or lost. People responsible for certain areas of
> maintenance
> are now just bypassed with sometimes bad patches just given to Andrew
> directly. We may as well go back to using CVS and passing patches
> around, since it easier to do that than the way we have been using BK.
The problem is that we used to have our "own" tree which ended up beeing
a grab bag for all the crap on earth and would drift from upstream in
unmanageable ways.
We are now working much more directly with upstream, and it's not about
random people sending random patches to akpm, for most arch patches,
andrew is actually asking us (or rather paulus) whether to accept or not
the patch. It does sometimes slip through but that's minimal.
If you feel that your stuff isn't properly going upstream in time, then
maybe that is because you aren't sending the patch to the right person
or putting it in the right place ?
All patches posted to linuxppc-dev and linuxppc64-dev are tracked by an
automatic system. They may take some time to go upstream, but they are
never lost.
Ben.
^ permalink raw reply
* Re: question on inline assembly and long long values
From: Chris Friesen @ 2005-04-07 0:09 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev list
In-Reply-To: <1112831823.9568.219.camel@gaston>
Benjamin Herrenschmidt wrote:
> On Wed, 2005-04-06 at 17:56 -0600, Chris Friesen wrote:
>>Benjamin Herrenschmidt wrote:
>>>But the kernel code always runs in 64 bits mode...
>>
>>The ppc kernel (not ppc64) runs in 64-bit mode? An unsigned long long
>>fits in a single register in C code?
>
> Ah no, it doesn't, but then, be careful to have interrupts off when you
> do that are the interrupt handler won't save the high half of the
> registers between the mtmsrd and your "splitting" of it.
Right. All this stuff is running with interrupts off.
Chris
^ permalink raw reply
* Re: question on inline assembly and long long values
From: Benjamin Herrenschmidt @ 2005-04-06 23:57 UTC (permalink / raw)
To: Chris Friesen; +Cc: linuxppc-dev list
In-Reply-To: <4254771B.2070802@nortel.com>
On Wed, 2005-04-06 at 17:56 -0600, Chris Friesen wrote:
> Benjamin Herrenschmidt wrote:
>
> > But the kernel code always runs in 64 bits mode...
>
> The ppc kernel (not ppc64) runs in 64-bit mode? An unsigned long long
> fits in a single register in C code?
Ah no, it doesn't, but then, be careful to have interrupts off when you
do that are the interrupt handler won't save the high half of the
registers between the mtmsrd and your "splitting" of it.
> Yeah, the optimisations really don't matter much...the ugly resulting
> code just bothered me.
>
> Chris
--
Benjamin Herrenschmidt <benh@kernel.crashing.org>
^ permalink raw reply
* Re: question on inline assembly and long long values
From: Chris Friesen @ 2005-04-06 23:56 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev list
In-Reply-To: <1112831363.9518.215.camel@gaston>
Benjamin Herrenschmidt wrote:
> But the kernel code always runs in 64 bits mode...
The ppc kernel (not ppc64) runs in 64-bit mode? An unsigned long long
fits in a single register in C code?
Yeah, the optimisations really don't matter much...the ugly resulting
code just bothered me.
Chris
^ permalink raw reply
* Re: question on inline assembly and long long values
From: Benjamin Herrenschmidt @ 2005-04-06 23:49 UTC (permalink / raw)
To: Chris Friesen; +Cc: linuxppc-dev list
In-Reply-To: <42547112.9000302@nortel.com>
On Wed, 2005-04-06 at 17:30 -0600, Chris Friesen wrote:
> Benjamin Herrenschmidt wrote:
> > On Wed, 2005-04-06 at 12:26 -0600, Chris Friesen wrote:
> >
> >>I want to retrieve the msr (which is 64-bits) on a 970 when running in
> >>32-bit mode.
>
> > Is this in kernel mode ? Why are you doing that ?
>
> Yes it is.
>
> We wanted to manipulate the high word of the msr on the 970, from C
> code, while running in 32-bit mode. I'll be doing something similar to
> get at the high word of HID1 (to enable the en_icbi bit).
>
> Is there some other way to do this?
But the kernel code always runs in 64 bits mode... or are you trying to
pass that down to userland ? In the later case, your optimisations are
pretty much nothing compared to the cost of a syscall
Ben.
^ permalink raw reply
* Re: [PATCH] Update ppc32-fix-errata-for-some-g3-cpus.patch
From: Andreas Schwab @ 2005-04-06 23:38 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Andrew Morton, linuxppc-dev list
In-Reply-To: <1112829020.9518.202.camel@gaston>
Benjamin Herrenschmidt <benh@kernel.crashing.org> writes:
> On Thu, 2005-04-07 at 01:02 +0200, Andreas Schwab wrote:
>> Benjamin Herrenschmidt <benh@kernel.crashing.org> writes:
>>
>> > The previous version of ppc32-fix-errata-for-some-g3-cpus.patch had an
>> > issue that would crash some G4 CPUs on boot. This is fixed in this new
>> > version, please replace the old one and send to linus asap (it's now
>> > been tested on enough CPUs).
>>
>> Apparently not. I'm getting "floating point used in kernel" crashes
>> during wakeup on my iBook G3 (750FX).
>
> And does removing that patch fixes it ?
Sorry, I have to take that back. It doesn't actually cause my wakeup
problems (alone?). I will try to dig further into that tomorrow.
Andreas.
--
Andreas Schwab, SuSE Labs, schwab@suse.de
SuSE Linux Products GmbH, Maxfeldstraße 5, 90409 Nürnberg, Germany
Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for something completely different."
^ permalink raw reply
* Re: Kernel SCM saga..
From: Dan Malek @ 2005-04-06 23:33 UTC (permalink / raw)
To: Wolfgang Denk; +Cc: linuxppc-dev, linuxppc-embedded
In-Reply-To: <20050406223751.E4297C108D@atlas.denx.de>
On Apr 6, 2005, at 6:37 PM, Wolfgang Denk wrote:
> are there any plans yet how to continue PPC kernel development now
> that Linus (and probably others, too) stopped using BitKeeper?
For all practical purposes, we have stopped using it as intended long
ago. When we first started, those of us responsible for maintaining
part
of the sources simply continuously pushed updates. Very efficient,
everyone
saw what was up to date. Since 2.4, we have all been passing patches
around, pushing things into BK didn't seem to matter, and usually
were ignored or lost. People responsible for certain areas of
maintenance
are now just bypassed with sometimes bad patches just given to Andrew
directly. We may as well go back to using CVS and passing patches
around, since it easier to do that than the way we have been using BK.
Thanks.
-- Dan
^ permalink raw reply
* Re: question on inline assembly and long long values
From: Chris Friesen @ 2005-04-06 23:30 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev list
In-Reply-To: <1112829596.9518.210.camel@gaston>
Benjamin Herrenschmidt wrote:
> On Wed, 2005-04-06 at 12:26 -0600, Chris Friesen wrote:
>
>>I want to retrieve the msr (which is 64-bits) on a 970 when running in
>>32-bit mode.
> Is this in kernel mode ? Why are you doing that ?
Yes it is.
We wanted to manipulate the high word of the msr on the 970, from C
code, while running in 32-bit mode. I'll be doing something similar to
get at the high word of HID1 (to enable the en_icbi bit).
Is there some other way to do this?
Chris
^ permalink raw reply
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