* Re: [PATCH] Set cpu explicitly in kernel compiles
From: Kumar Gala @ 2005-05-06 15:47 UTC (permalink / raw)
To: Tom Rini; +Cc: linuxppc-dev
In-Reply-To: <20050506145313.GE1221@smtp.west.cox.net>
On May 6, 2005, at 9:53 AM, Tom Rini wrote:
> On Fri, May 06, 2005 at 04:44:33PM +0200, Segher Boessenkool wrote:
> > >Well, say you are compiling for 405.=A0 You either need to have a =
gcc
> > >that was configured with --with-cpu=3D405, or you need to have =
hacked
> > >arch/ppc/Makefile to add -mcpu=3D405.=A0 In both cases the problem=20=
> doesn't
> > >arise.=A0 It only arises if you have a biarch gcc4 that was=20
> configured
> > >without any --with-cpu=3Dxxx option and is run without any =
-mcpu=3Dxxx
> > >option.
> >
> > It happens for any installation where the default chosen by the GCC
> > used is not the -mcpu=3DXXX flag you need used for your kernel.=A0 =
Which
> > is a much more general statement than the biarch one.=A0 Most =
people=20
> just
> > get lucky, because they compile code with a compiler that is=20
> defaulted
> > for their target, and userland and kernel use (about) the same=20
> options
> > on most targets.=A0 Not so in biarch land (bleeech).
>
> Note that up until very recently (and just a bit before conflicting
> opcodes were added), no -mcpu=3DXXX was required.=A0 For example, I=20=
> compiled
> a 44x kernel with a -mcpu=3D750 toolchain no problems shortly after =
Paul
> posted this.=A0 The only exception to this rule I can possibly think =
of=20
> is
> 85xx.=A0 But even that would be the "very recently" thing I mentioned =
as
> I know you can use an 82xx-set toolchain to build for 85xx.
>
> Having said that..
I do the same thing as well and the only issue I have is that 85xx=20
doesn't support strings thus the conditional we currently have for=20
-mstring.
- kumar=
^ permalink raw reply
* Re: [PATCH] Set cpu explicitly in kernel compiles
From: Segher Boessenkool @ 2005-05-06 14:44 UTC (permalink / raw)
To: Paul Mackerras; +Cc: Tom Rini, linuxppc-dev
In-Reply-To: <17017.44421.790813.918463@cargo.ozlabs.ibm.com>
> Well, say you are compiling for 405. You either need to have a gcc
> that was configured with --with-cpu=405, or you need to have hacked
> arch/ppc/Makefile to add -mcpu=405. In both cases the problem doesn't
> arise. It only arises if you have a biarch gcc4 that was configured
> without any --with-cpu=xxx option and is run without any -mcpu=xxx
> option.
It happens for any installation where the default chosen by the GCC
used is not the -mcpu=XXX flag you need used for your kernel. Which
is a much more general statement than the biarch one. Most people just
get lucky, because they compile code with a compiler that is defaulted
for their target, and userland and kernel use (about) the same options
on most targets. Not so in biarch land (bleeech).
> If you think we should have -mcpu=xxx on the command line for 4xx,
> 44x, 8xx, etc., then that's fine, but that is a separate problem from
> what my patch was addressing (one which my patch might make it easier
> to fix, though).
Please always use -mcpu=XXX (and perhaps -mtune=XXX), that's the only
"correct" way to fix this. Or _never_ do any -mcpu=, and let users
override it in the CC setting in the Makefile. But I like the first
option better.
Segher
^ permalink raw reply
* Re: [PATCH] Set cpu explicitly in kernel compiles
From: Tom Rini @ 2005-05-06 15:34 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: linuxppc-dev
In-Reply-To: <037495ad1309ee55e6028a63fd279440@kernel.crashing.org>
On Fri, May 06, 2005 at 05:28:57PM +0200, Segher Boessenkool wrote:
> >Note that up until very recently (and just a bit before conflicting
> >opcodes were added), no -mcpu=XXX was required.
>
> True, but it's just lucky that it worked...
It used to be design that it worked. But now I'm sounding like Dan,
which I find only slightly disconcerting :)
--
Tom Rini
http://gate.crashing.org/~trini/
^ permalink raw reply
* Re: Network Setup - HOW TO
From: Grant Likely @ 2005-05-06 15:29 UTC (permalink / raw)
To: Atit_Shah; +Cc: linuxppc-embedded
In-Reply-To: <D8595042F3765A4285B848A78A2C2ED102778C@bsdmsg002.corp.satyam.ad>
On 5/5/05, Atit_Shah <Atit_Shah@satyam.com> wrote:
> Hi all,
>=20
> I have a custom board designed to function as a router. It has 2
> Ethernet ports. Eth1 is a WAN port and Eth0 is a LAN port. This is what
> I wish to do:
> 1. connect the board/router to my company network
> 2. connect a normal system running windows or linux to the router
> 3. I should be able to ping or browse the net using the normal system
> via the router through the company network.
>=20
> I have connect the normal network cable (not a cross wire cable) between
> the router and the company network. The router does not seem to get a
> dynamic IP. Why and What should I do for it to get one?
Are you running a dhcp client? Let's see the log output
>=20
> I connect a system to eth0 again with a normal network cable (not a
> cross wire cable) but the system does not seem to get an IP assigned
> even when I run the dhcp server on my router....used udhcpd command. Why
> and how can I get it up?
What do you see on the wire? Bring up Ethereal to capture traffic.
>=20
> Appreciate a response on this....
Not enough information. Include output logs please.
^ permalink raw reply
* Re: [PATCH] Set cpu explicitly in kernel compiles
From: Segher Boessenkool @ 2005-05-06 15:28 UTC (permalink / raw)
To: Tom Rini; +Cc: linuxppc-dev
In-Reply-To: <20050506145313.GE1221@smtp.west.cox.net>
> Note that up until very recently (and just a bit before conflicting
> opcodes were added), no -mcpu=XXX was required.
True, but it's just lucky that it worked...
Segher
^ permalink raw reply
* PPC uImage build not reporting correctly
From: Kumar Gala @ 2005-05-06 15:23 UTC (permalink / raw)
To: Sam Ravnborg; +Cc: Tom Rini, Linux Kernel list, linuxppc-embedded list
Sam,
Tom pointed me at you to look at a makefile issue with
arch/ppc/boot/images/Makefile. When I do the following:
$ make uImage
CHK include/linux/version.h
make[1]: `arch/ppc/kernel/asm-offsets.s' is up to date.
CHK include/linux/compile.h
CHK usr/initramfs_list
UIMAGE arch/ppc/boot/images/uImage
Image Name: Linux-2.6.12-rc3
Created: Fri May 6 10:19:28 2005
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 993322 Bytes = 970.04 kB = 0.95 MB
Load Address: 0x00000000
Entry Point: 0x00000000
Image: arch/ppc/boot/images/uImage not made
The issue is that the file arch/ppc/boot/images/uImage does exit (the
'not made' is not correct).
$(obj)/uImage: $(obj)/vmlinux.gz
$(Q)rm -f $@
$(call if_changed,uimage)
@echo ' Image: $@' $(if $(wildcard $@),'is ready','not made')
It seems the $(wildcard $@) expands at the start of the rule. Any
ideas?
- kumar
^ permalink raw reply
* Re: [PATCH] Set cpu explicitly in kernel compiles
From: Tom Rini @ 2005-05-06 14:53 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: linuxppc-dev
In-Reply-To: <205f4a46b0d9eddd5c46ff1678c9e4ca@kernel.crashing.org>
On Fri, May 06, 2005 at 04:44:33PM +0200, Segher Boessenkool wrote:
> >Well, say you are compiling for 405. You either need to have a gcc
> >that was configured with --with-cpu=405, or you need to have hacked
> >arch/ppc/Makefile to add -mcpu=405. In both cases the problem doesn't
> >arise. It only arises if you have a biarch gcc4 that was configured
> >without any --with-cpu=xxx option and is run without any -mcpu=xxx
> >option.
>
> It happens for any installation where the default chosen by the GCC
> used is not the -mcpu=XXX flag you need used for your kernel. Which
> is a much more general statement than the biarch one. Most people just
> get lucky, because they compile code with a compiler that is defaulted
> for their target, and userland and kernel use (about) the same options
> on most targets. Not so in biarch land (bleeech).
Note that up until very recently (and just a bit before conflicting
opcodes were added), no -mcpu=XXX was required. For example, I compiled
a 44x kernel with a -mcpu=750 toolchain no problems shortly after Paul
posted this. The only exception to this rule I can possibly think of is
85xx. But even that would be the "very recently" thing I mentioned as
I know you can use an 82xx-set toolchain to build for 85xx.
Having said that..
> >If you think we should have -mcpu=xxx on the command line for 4xx,
> >44x, 8xx, etc., then that's fine, but that is a separate problem from
> >what my patch was addressing (one which my patch might make it easier
> >to fix, though).
>
> Please always use -mcpu=XXX (and perhaps -mtune=XXX), that's the only
> "correct" way to fix this. Or _never_ do any -mcpu=, and let users
> override it in the CC setting in the Makefile. But I like the first
> option better.
We should setup cpu-opt-$(CONFIG_every choice) to fix new gcc breakage
(and I guess we shouldn't have removed the do-nothing ones we had a few
years ago).
--
Tom Rini
http://gate.crashing.org/~trini/
^ permalink raw reply
* PCI mapping problems? (440EP/Bamboo)
From: Andriy Korud @ 2005-05-06 13:18 UTC (permalink / raw)
To: linuxppc-embedded
Hi, I'm trying to make PCI on Bamboo usable at 33MHz and have the =
following problem:
Kernel 2.6.11 with Bamboo patches (either from the list or my own) =
boots, PCI is scanned fine:
PCI: Probing PCI hardware
Scanning bus 00
Found 00:20 [1260/3890] 000280 00
Fixups for bus 00
Bus scan for 00 returning with max=3D00
PCI fixup irq: (0000:00:04.0) got 25
PCI: bridge rsrc 0..ffff (100), parent c01b0f80
PCI: bridge rsrc a0000000..afffffff (200), parent c01b0f64
PCI:0000:00:04.0: Resource 0: afffe000-afffffff (f=3D200)
lspci is also working fine, but when trying to load any driver, kernel =
crashes on first actual device access, i.e. on writew() operation.
When tried to look which address it's trying to access - 0xd1058000 in =
my case - seems confusing for me - should not this address be withing =
PCI address range - 0xa... and withing this device address range - =
0xafffe000-afffffff?
Tracking deeper I've found that this address is taken from calling =
pci_resource_start(pdev, 0) whithing probe function in driver.=20
This problem is generic - at least 3 different pci drivers crash when =
trying to writew() to bad address.
Can anybody give some advice in which direction should I continue my =
debugging?
Thanks in advance,
--
Andriy Korud
^ permalink raw reply
* Re: [PATCH] 8xx: fix usage of pinned 8Mbyte TLB entries
From: Jason McMullan @ 2005-05-06 13:04 UTC (permalink / raw)
To: Marcelo Tosatti; +Cc: linux-ppc-embedded
In-Reply-To: <20050505172035.GB3339@logos.cnet>
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On Thu, 2005-05-05 at 14:20 -0300, Marcelo Tosatti wrote:
> [snip snip]
>
> Allocateing from the coherent memory DMA region. Which sits at, I suppose,
> after initial 8Megs in all configurations (should be always).
>
What if your board (ie the MPC885ADS) only has 8Mb? Soldered on.
--
Jason McMullan <jason.mcmullan@timesys.com>
TimeSys Corporation
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^ permalink raw reply
* Re: [RFC][PATCH 2.6.12-rc2] Updated platform additions for 82xx
From: Vitaly Bordug @ 2005-05-06 9:09 UTC (permalink / raw)
To: Eugene Surovegin; +Cc: linuxppc-embedded list
In-Reply-To: <20050506081805.GA19401@gate.ebshome.net>
[-- Attachment #1.1: Type: text/plain, Size: 1395 bytes --]
Eugene Surovegin wrote:
>On Fri, May 06, 2005 at 11:54:08AM +0400, Vitaly Bordug wrote:
>
>[snip]
>
>
>
>>+static struct cpm2_fec_platform_data mpc82xx_fcc1_pdata = {
>>+ .cp_page = CPM_CR_FCC1_PAGE,
>>+ .cp_block = CPM_CR_FCC1_SBLOCK,
>>+ .clk_trx = (PC_F1RXCLK | PC_F1TXCLK),
>>+ .clk_route = CMX1_CLK_ROUTE,
>>+ .clk_mask = CMX1_CLK_MASK,
>>+ .mdio = PC_MDIO,
>>+ .mdck = PC_MDCK,
>>+
>>+ .device_flags = FSL_CPM2_FEC_BRD_HAS_PHY_INTR,
>>+ .phyid = 0,
>>+ .interruptPHY = SIU_INT_IRQ5,
>>+};
>>
>>
>
>Hmm, interruptPHY here still looks somewhat odd. Why not use the same
>approach as for the rest of the fields - "default" if corresponding
>define wasn't defined by the board port?
>
>Not that I like this approach, IMHO there should be _NO_ defines at
>all here and board setup code must fill them, but I guess it's OK
>for now, mostly because there is no board specific files for 82xx
>boards yet and this makes the patch quite small.
>
>
>
Eugene,
Probably this is a better way?
PHY_INTERRUPT is defined in the board-specific platforms/pq2ads.h
(likewise approach was used in 2.4). Others from this define crowd
should reside as they are IMHO, until we have some common board-specific
header for 82xx (or all these will be scattered along different 82xx
platform defines such as tqm8260.h etc. which is even worse). What do
you think?
--
Sincerely,
Vitaly
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[-- Attachment #2: basic_platform_st1.patch --]
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diff -Nru a/arch/ppc/syslib/mpc82xx_devices.c b/arch/ppc/syslib/mpc82xx_devices.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/syslib/mpc82xx_devices.c 2005-05-06 12:59:22 +04:00
@@ -0,0 +1,213 @@
+/*
+ * arch/ppc/syslib/mpc82xx_devices.c
+ *
+ * MPC82xx Device descriptions
+ *
+ * Maintainer: Kumar Gala <kumar.gala@freescale.com>
+ *
+ * 2005 (c) MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/ioport.h>
+#include <linux/fsl_devices.h>
+#include <asm/mpc8260.h>
+#include <asm/cpm2.h>
+#include <asm/immap_cpm2.h>
+#include <asm/irq.h>
+#include <asm/ppc_sys.h>
+#include <asm/ppcboot.h>
+
+
+/* FCC1 Clock Source Configuration. These can be redefined in the board specific file.
+ Can only choose from CLK9-12 */
+#ifndef F1_RXCLK
+#define F1_RXCLK 12
+#endif
+
+#ifndef F1_TXCLK
+#define F1_TXCLK 11
+#endif
+
+/* FCC2 Clock Source Configuration. These can be redefined in the board specific file.
+ Can only choose from CLK13-16 */
+#ifndef F2_RXCLK
+#define F2_RXCLK 13
+#endif
+
+#ifndef F2_TXCLK
+#define F2_TXCLK 14
+#endif
+
+/* FCC3 Clock Source Configuration. These can be redefined in the board specific file.
+ Can only choose from CLK13-16 */
+#ifndef F3_RXCLK
+#define F3_RXCLK 15
+#endif
+
+#ifndef F3_TXCLK
+#define F3_TXCLK 16
+#endif
+
+/* MDIO and MDCK settings. These can be redefined in the board specific file.*/
+#ifndef PC_MDIO
+#define PC_MDIO 0x00000004U
+#endif
+
+#ifndef PC_MDCK
+#define PC_MDCK 0x00000020U
+#endif
+
+/* Automatically generates register configurations */
+#define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */
+
+#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */
+#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */
+#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */
+#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */
+#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */
+#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */
+
+#define PC_F1RXCLK PC_CLK(F1_RXCLK)
+#define PC_F1TXCLK PC_CLK(F1_TXCLK)
+#define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK))
+#define CMX1_CLK_MASK ((uint)0xff000000)
+
+#define PC_F2RXCLK PC_CLK(F2_RXCLK)
+#define PC_F2TXCLK PC_CLK(F2_TXCLK)
+#define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK))
+#define CMX2_CLK_MASK ((uint)0x00ff0000)
+
+#define PC_F3RXCLK PC_CLK(F3_RXCLK)
+#define PC_F3TXCLK PC_CLK(F3_TXCLK)
+#define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK))
+#define CMX3_CLK_MASK ((uint)0x0000ff00)
+
+/* We use offsets for IORESOURCE_MEM since we do not know at compile time
+ * what IMMRBAR is, will get fixed up by mach_mpc82xx_fixup
+ */
+
+static struct cpm2_fec_platform_data mpc82xx_fcc1_pdata = {
+ .cp_page = CPM_CR_FCC1_PAGE,
+ .cp_block = CPM_CR_FCC1_SBLOCK,
+ .clk_trx = (PC_F1RXCLK | PC_F1TXCLK),
+ .clk_route = CMX1_CLK_ROUTE,
+ .clk_mask = CMX1_CLK_MASK,
+ .mdio = PC_MDIO,
+ .mdck = PC_MDCK,
+
+ .phyid = 0,
+#ifdef PHY_INTERRUPT
+ .device_flags = FSL_CPM2_FEC_BRD_HAS_PHY_INTR,
+ .interruptPHY = PHY_INTERRUPT,
+#endif
+};
+
+static struct cpm2_fec_platform_data mpc82xx_fcc2_pdata = {
+ .cp_page = CPM_CR_FCC2_PAGE,
+ .cp_block = CPM_CR_FCC2_SBLOCK,
+ .clk_trx = (PC_F2RXCLK | PC_F2TXCLK),
+ .clk_route = CMX2_CLK_ROUTE,
+ .clk_mask = CMX2_CLK_MASK,
+ .mdio = PC_MDIO,
+ .mdck = PC_MDCK,
+
+ .phyid = 3,
+#ifdef PHY_INTERRUPT
+ .device_flags = FSL_CPM2_FEC_BRD_HAS_PHY_INTR,
+ .interruptPHY = PHY_INTERRUPT,
+#endif
+};
+
+
+
+struct platform_device ppc_sys_platform_devices[] = {
+ [MPC82xx_FCC1] = {
+ .name = "cpm2_fcc",
+ .id = 1,
+ .dev.platform_data = &mpc82xx_fcc1_pdata,
+ .num_resources = 4,
+ .resource = (struct resource[]) {
+ {
+ .name = "fcc_regs",
+ .start = 0x11300,
+ .end = 0x1131f,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "fcc_pram",
+ .start = 0x8400,
+ .end = 0x84ff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "fcc_mem",
+ .start = 0x9000,
+ .end = 0x907f,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "interrupt",
+ .start = SIU_INT_FCC1,
+ .end = SIU_INT_FCC1,
+ .flags = IORESOURCE_IRQ,
+ },
+ },
+ },
+ [MPC82xx_FCC2] = {
+ .name = "cpm2_fcc",
+ .id = 2,
+ .dev.platform_data = &mpc82xx_fcc2_pdata,
+ .num_resources = 4,
+ .resource = (struct resource[]) {
+ {
+ .name = "fcc_regs",
+ .start = 0x11320,
+ .end = 0x1133f,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "fcc_pram",
+ .start = 0x8500,
+ .end = 0x85ff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "fcc_mem",
+ .start = 0x9080,
+ .end = 0x90ff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "interrupt",
+ .start = SIU_INT_FCC2,
+ .end = SIU_INT_FCC2,
+ .flags = IORESOURCE_IRQ,
+ },
+ },
+ }
+};
+
+static int __init mach_mpc82xx_fixup(struct platform_device *pdev)
+{
+ ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
+ return 0;
+}
+
+static int __init mach_mpc82xx_init(void)
+{
+ if (ppc_md.progress)
+ ppc_md.progress("mach_mpc82xx_init:enter", 0);
+ ppc_sys_device_fixup = mach_mpc82xx_fixup;
+ return 0;
+}
+
+postcore_initcall(mach_mpc82xx_init);
diff -Nru a/arch/ppc/syslib/mpc82xx_sys.c b/arch/ppc/syslib/mpc82xx_sys.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/syslib/mpc82xx_sys.c 2005-05-06 12:59:22 +04:00
@@ -0,0 +1,42 @@
+/*
+ * arch/ppc/syslib/mpc82xx_devices.c
+ *
+ * MPC82xx System descriptions
+ *
+ * Maintainer: Kumar Gala <kumar.gala@freescale.com>
+ *
+ * 2005 (c) MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+
+#include <asm/ppc_sys.h>
+
+
+struct ppc_sys_spec *cur_ppc_sys_spec;
+struct ppc_sys_spec ppc_sys_specs[] = {
+
+ {
+ .ppc_sys_name = "MPC8272ads",
+ .mask = 0xFFFF0000,
+ .value = 0x0c100000,
+ .num_devices = 2,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ MPC82xx_FCC1,
+ MPC82xx_FCC2,
+ },
+ },
+ { /* default match */
+ .ppc_sys_name = "",
+ .mask = 0x00000000,
+ .value = 0x00000000,
+ },
+};
diff -Nru a/include/asm-ppc/mpc8260.h b/include/asm-ppc/mpc8260.h
--- a/include/asm-ppc/mpc8260.h 2005-05-06 12:59:22 +04:00
+++ b/include/asm-ppc/mpc8260.h 2005-05-06 12:59:22 +04:00
@@ -74,6 +74,11 @@
extern unsigned char __res[];
#endif
+enum ppc_sys_devices {
+ MPC82xx_FCC1,
+ MPC82xx_FCC2,
+};
+
#endif /* CONFIG_8260 */
#endif /* !__ASM_PPC_MPC8260_H__ */
#endif /* __KERNEL__ */
diff -Nru a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
--- a/include/asm-ppc/ppc_sys.h 2005-05-06 12:59:22 +04:00
+++ b/include/asm-ppc/ppc_sys.h 2005-05-06 12:59:22 +04:00
@@ -27,6 +27,8 @@
#include <asm/mpc85xx.h>
#elif defined(CONFIG_PPC_MPC52xx)
#include <asm/mpc52xx.h>
+#elif defined(CONFIG_8260)
+#include <asm/mpc8260.h>
#else
#error "need definition of ppc_sys_devices"
#endif
^ permalink raw reply
* Re: [RFC][PATCH 2.6.12-rc2] Updated platform additions for 82xx
From: Eugene Surovegin @ 2005-05-06 8:18 UTC (permalink / raw)
To: Vitaly Bordug; +Cc: linuxppc-embedded list
In-Reply-To: <427B22A0.8010704@ru.mvista.com>
On Fri, May 06, 2005 at 11:54:08AM +0400, Vitaly Bordug wrote:
[snip]
> +static struct cpm2_fec_platform_data mpc82xx_fcc1_pdata = {
> + .cp_page = CPM_CR_FCC1_PAGE,
> + .cp_block = CPM_CR_FCC1_SBLOCK,
> + .clk_trx = (PC_F1RXCLK | PC_F1TXCLK),
> + .clk_route = CMX1_CLK_ROUTE,
> + .clk_mask = CMX1_CLK_MASK,
> + .mdio = PC_MDIO,
> + .mdck = PC_MDCK,
> +
> + .device_flags = FSL_CPM2_FEC_BRD_HAS_PHY_INTR,
> + .phyid = 0,
> + .interruptPHY = SIU_INT_IRQ5,
> +};
Hmm, interruptPHY here still looks somewhat odd. Why not use the same
approach as for the rest of the fields - "default" if corresponding
define wasn't defined by the board port?
Not that I like this approach, IMHO there should be _NO_ defines at
all here and board setup code must fill them, but I guess it's OK
for now, mostly because there is no board specific files for 82xx
boards yet and this makes the patch quite small.
--
Eugene
^ permalink raw reply
* [RFC][PATCH 2.6.12-rc2] Updated platform additions for 82xx
From: Vitaly Bordug @ 2005-05-06 7:54 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-embedded list
[-- Attachment #1: Type: text/plain, Size: 311 bytes --]
Kumar,
This is just the base platform additions as you asked. I only included
changes to mentioned files. All board-specific stuff should be redefined
in the relative board-specific header if it does not suit the default
values.
Signed-off-by: Vitaly Bordug<vbordug@ru.mvista.com>
--
Sincerely,
Vitaly
[-- Attachment #2: basic_platform_st.patch --]
[-- Type: text/x-patch, Size: 7450 bytes --]
diff -Nru a/arch/ppc/syslib/mpc82xx_devices.c b/arch/ppc/syslib/mpc82xx_devices.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/syslib/mpc82xx_devices.c 2005-05-06 11:50:41 +04:00
@@ -0,0 +1,209 @@
+/*
+ * arch/ppc/syslib/mpc82xx_devices.c
+ *
+ * MPC82xx Device descriptions
+ *
+ * Maintainer: Kumar Gala <kumar.gala@freescale.com>
+ *
+ * 2005 (c) MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+#include <linux/ioport.h>
+#include <linux/fsl_devices.h>
+#include <asm/mpc8260.h>
+#include <asm/cpm2.h>
+#include <asm/immap_cpm2.h>
+#include <asm/irq.h>
+#include <asm/ppc_sys.h>
+#include <asm/ppcboot.h>
+
+
+/* FCC1 Clock Source Configuration. These can be redefined in the board specific file.
+ Can only choose from CLK9-12 */
+#ifndef F1_RXCLK
+#define F1_RXCLK 12
+#endif
+
+#ifndef F1_TXCLK
+#define F1_TXCLK 11
+#endif
+
+/* FCC2 Clock Source Configuration. These can be redefined in the board specific file.
+ Can only choose from CLK13-16 */
+#ifndef F2_RXCLK
+#define F2_RXCLK 13
+#endif
+
+#ifndef F2_TXCLK
+#define F2_TXCLK 14
+#endif
+
+/* FCC3 Clock Source Configuration. These can be redefined in the board specific file.
+ Can only choose from CLK13-16 */
+#ifndef F3_RXCLK
+#define F3_RXCLK 15
+#endif
+
+#ifndef F3_TXCLK
+#define F3_TXCLK 16
+#endif
+
+/* MDIO and MDCK settings. These can be redefined in the board specific file.*/
+#ifndef PC_MDIO
+#define PC_MDIO 0x00000004U
+#endif
+
+#ifndef PC_MDCK
+#define PC_MDCK 0x00000020U
+#endif
+
+/* Automatically generates register configurations */
+#define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */
+
+#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive Clock Source */
+#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit Clock Source */
+#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive Clock Source */
+#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock Source */
+#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive Clock Source */
+#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock Source */
+
+#define PC_F1RXCLK PC_CLK(F1_RXCLK)
+#define PC_F1TXCLK PC_CLK(F1_TXCLK)
+#define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) | CMXFCR_TF1CS(F1_TXCLK))
+#define CMX1_CLK_MASK ((uint)0xff000000)
+
+#define PC_F2RXCLK PC_CLK(F2_RXCLK)
+#define PC_F2TXCLK PC_CLK(F2_TXCLK)
+#define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) | CMXFCR_TF2CS(F2_TXCLK))
+#define CMX2_CLK_MASK ((uint)0x00ff0000)
+
+#define PC_F3RXCLK PC_CLK(F3_RXCLK)
+#define PC_F3TXCLK PC_CLK(F3_TXCLK)
+#define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) | CMXFCR_TF3CS(F3_TXCLK))
+#define CMX3_CLK_MASK ((uint)0x0000ff00)
+
+/* We use offsets for IORESOURCE_MEM since we do not know at compile time
+ * what IMMRBAR is, will get fixed up by mach_mpc82xx_fixup
+ */
+
+static struct cpm2_fec_platform_data mpc82xx_fcc1_pdata = {
+ .cp_page = CPM_CR_FCC1_PAGE,
+ .cp_block = CPM_CR_FCC1_SBLOCK,
+ .clk_trx = (PC_F1RXCLK | PC_F1TXCLK),
+ .clk_route = CMX1_CLK_ROUTE,
+ .clk_mask = CMX1_CLK_MASK,
+ .mdio = PC_MDIO,
+ .mdck = PC_MDCK,
+
+ .device_flags = FSL_CPM2_FEC_BRD_HAS_PHY_INTR,
+ .phyid = 0,
+ .interruptPHY = SIU_INT_IRQ5,
+};
+
+static struct cpm2_fec_platform_data mpc82xx_fcc2_pdata = {
+ .cp_page = CPM_CR_FCC2_PAGE,
+ .cp_block = CPM_CR_FCC2_SBLOCK,
+ .clk_trx = (PC_F2RXCLK | PC_F2TXCLK),
+ .clk_route = CMX2_CLK_ROUTE,
+ .clk_mask = CMX2_CLK_MASK,
+ .mdio = PC_MDIO,
+ .mdck = PC_MDCK,
+
+ .device_flags = FSL_CPM2_FEC_BRD_HAS_PHY_INTR,
+ .phyid = 3,
+ .interruptPHY = SIU_INT_IRQ5,
+};
+
+
+
+struct platform_device ppc_sys_platform_devices[] = {
+ [MPC82xx_FCC1] = {
+ .name = "cpm2_fcc",
+ .id = 1,
+ .dev.platform_data = &mpc82xx_fcc1_pdata,
+ .num_resources = 4,
+ .resource = (struct resource[]) {
+ {
+ .name = "fcc_regs",
+ .start = 0x11300,
+ .end = 0x1131f,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "fcc_pram",
+ .start = 0x8400,
+ .end = 0x84ff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "fcc_mem",
+ .start = 0x9000,
+ .end = 0x907f,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "interrupt",
+ .start = SIU_INT_FCC1,
+ .end = SIU_INT_FCC1,
+ .flags = IORESOURCE_IRQ,
+ },
+ },
+ },
+ [MPC82xx_FCC2] = {
+ .name = "cpm2_fcc",
+ .id = 2,
+ .dev.platform_data = &mpc82xx_fcc2_pdata,
+ .num_resources = 4,
+ .resource = (struct resource[]) {
+ {
+ .name = "fcc_regs",
+ .start = 0x11320,
+ .end = 0x1133f,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "fcc_pram",
+ .start = 0x8500,
+ .end = 0x85ff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "fcc_mem",
+ .start = 0x9080,
+ .end = 0x90ff,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "interrupt",
+ .start = SIU_INT_FCC2,
+ .end = SIU_INT_FCC2,
+ .flags = IORESOURCE_IRQ,
+ },
+ },
+ }
+};
+
+static int __init mach_mpc82xx_fixup(struct platform_device *pdev)
+{
+ ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
+ return 0;
+}
+
+static int __init mach_mpc82xx_init(void)
+{
+ if (ppc_md.progress)
+ ppc_md.progress("mach_mpc82xx_init:enter", 0);
+ ppc_sys_device_fixup = mach_mpc82xx_fixup;
+ return 0;
+}
+
+postcore_initcall(mach_mpc82xx_init);
diff -Nru a/arch/ppc/syslib/mpc82xx_sys.c b/arch/ppc/syslib/mpc82xx_sys.c
--- /dev/null Wed Dec 31 16:00:00 196900
+++ b/arch/ppc/syslib/mpc82xx_sys.c 2005-05-06 11:50:41 +04:00
@@ -0,0 +1,42 @@
+/*
+ * arch/ppc/syslib/mpc82xx_devices.c
+ *
+ * MPC82xx System descriptions
+ *
+ * Maintainer: Kumar Gala <kumar.gala@freescale.com>
+ *
+ * 2005 (c) MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/device.h>
+
+#include <asm/ppc_sys.h>
+
+
+struct ppc_sys_spec *cur_ppc_sys_spec;
+struct ppc_sys_spec ppc_sys_specs[] = {
+
+ {
+ .ppc_sys_name = "MPC8272ads",
+ .mask = 0xFFFF0000,
+ .value = 0x0c100000,
+ .num_devices = 2,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ MPC82xx_FCC1,
+ MPC82xx_FCC2,
+ },
+ },
+ { /* default match */
+ .ppc_sys_name = "",
+ .mask = 0x00000000,
+ .value = 0x00000000,
+ },
+};
diff -Nru a/include/asm-ppc/mpc8260.h b/include/asm-ppc/mpc8260.h
--- a/include/asm-ppc/mpc8260.h 2005-05-06 11:50:41 +04:00
+++ b/include/asm-ppc/mpc8260.h 2005-05-06 11:50:41 +04:00
@@ -74,6 +74,11 @@
extern unsigned char __res[];
#endif
+enum ppc_sys_devices {
+ MPC82xx_FCC1,
+ MPC82xx_FCC2,
+};
+
#endif /* CONFIG_8260 */
#endif /* !__ASM_PPC_MPC8260_H__ */
#endif /* __KERNEL__ */
diff -Nru a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
--- a/include/asm-ppc/ppc_sys.h 2005-05-06 11:50:41 +04:00
+++ b/include/asm-ppc/ppc_sys.h 2005-05-06 11:50:41 +04:00
@@ -27,6 +27,8 @@
#include <asm/mpc85xx.h>
#elif defined(CONFIG_PPC_MPC52xx)
#include <asm/mpc52xx.h>
+#elif defined(CONFIG_8260)
+#include <asm/mpc8260.h>
#else
#error "need definition of ppc_sys_devices"
#endif
^ permalink raw reply
* Re: Oops in snd-powermac on powerbook 3400
From: Benjamin Herrenschmidt @ 2005-05-06 5:15 UTC (permalink / raw)
To: Keenan Pepper; +Cc: linuxppc-dev list, debian-powerpc@lists.debian.org
In-Reply-To: <427AE616.1030908@gmail.com>
On Thu, 2005-05-05 at 23:35 -0400, Keenan Pepper wrote:
> I fixed it!
>
> I changed it to use the same device node for sound as for chip->node,
> and it started beeping at me! Apparently sometime between 2.6.8 and
> 2.6.12-rc3 the KIOCSOUND ioctl was implemented, because it sure didn't
> beep before.
>
> BTW, this is the first time I've ever fixed a kernel bug.
Ok, I think your patch was whitespace damaged, so I re-did it by hand ;)
Here's the result. Please test. Also, other people around, please test
if with this patch, snd-powermac works, especially on oldworld machines!
I'll submit upstream tomorrow hopefully.
Ben.
Index: linux-work/sound/ppc/pmac.c
===================================================================
--- linux-work.orig/sound/ppc/pmac.c 2005-05-02 10:51:00.000000000 +1000
+++ linux-work/sound/ppc/pmac.c 2005-05-06 15:13:22.000000000 +1000
@@ -876,7 +876,7 @@
*/
static int __init snd_pmac_detect(pmac_t *chip)
{
- struct device_node *sound;
+ struct device_node *sound = NULL;
unsigned int *prop, l;
struct macio_chip* macio;
@@ -906,20 +906,22 @@
chip->is_pbook_G3 = 1;
chip->node = find_devices("awacs");
if (chip->node)
- return 0; /* ok */
+ sound = chip->node;
/*
* powermac G3 models have a node called "davbus"
* with a child called "sound".
*/
- chip->node = find_devices("davbus");
+ if (!chip->node)
+ chip->node = find_devices("davbus");
/*
* if we didn't find a davbus device, try 'i2s-a' since
* this seems to be what iBooks have
*/
if (! chip->node) {
chip->node = find_devices("i2s-a");
- if (chip->node && chip->node->parent && chip->node->parent->parent) {
+ if (chip->node && chip->node->parent &&
+ chip->node->parent->parent) {
if (device_is_compatible(chip->node->parent->parent,
"K2-Keylargo"))
chip->is_k2 = 1;
@@ -928,9 +930,11 @@
if (! chip->node)
return -ENODEV;
- sound = find_devices("sound");
- while (sound && sound->parent != chip->node)
- sound = sound->next;
+ if (!sound) {
+ sound = find_devices("sound");
+ while (sound && sound->parent != chip->node)
+ sound = sound->next;
+ }
if (! sound)
return -ENODEV;
prop = (unsigned int *) get_property(sound, "sub-frame", NULL);
@@ -1019,7 +1023,8 @@
}
}
if (chip->pdev == NULL)
- printk(KERN_WARNING "snd-powermac: can't locate macio PCI device !\n");
+ printk(KERN_WARNING "snd-powermac: can't locate macio PCI"
+ " device !\n");
detect_byte_swap(chip);
@@ -1027,7 +1032,8 @@
are available */
prop = (unsigned int *) get_property(sound, "sample-rates", &l);
if (! prop)
- prop = (unsigned int *) get_property(sound, "output-frame-rates", &l);
+ prop = (unsigned int *) get_property(sound,
+ "output-frame-rates", &l);
if (prop) {
int i;
chip->freqs_ok = 0;
@@ -1054,7 +1060,8 @@
/*
* exported - boolean info callbacks for ease of programming
*/
-int snd_pmac_boolean_stereo_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
+int snd_pmac_boolean_stereo_info(snd_kcontrol_t *kcontrol,
+ snd_ctl_elem_info_t *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
uinfo->count = 2;
@@ -1063,7 +1070,8 @@
return 0;
}
-int snd_pmac_boolean_mono_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t *uinfo)
+int snd_pmac_boolean_mono_info(snd_kcontrol_t *kcontrol,
+ snd_ctl_elem_info_t *uinfo)
{
uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
uinfo->count = 1;
^ permalink raw reply
* [PATCH] ppc32: Kill embedded system.map, use kallsyms
From: Benjamin Herrenschmidt @ 2005-05-06 5:04 UTC (permalink / raw)
To: linuxppc-dev list; +Cc: Andrew Morton
Hi !
This patch kills the whole embedded System.map mecanism and the
bootloader-passed System.map that was used to provide symbol resolution
in xmon. Instead, xmon now uses kallsyms like ppc64 does.
Andrew: No hurry getting that in Linus tree, let it be tested in -mm for
a while first and make sure it doesn't break various embedded configs.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Index: linux-work/arch/ppc64/xmon/xmon.c
===================================================================
--- linux-work.orig/arch/ppc64/xmon/xmon.c 2005-05-06 12:52:10.000000000 +1000
+++ linux-work/arch/ppc64/xmon/xmon.c 2005-05-06 12:55:17.000000000 +1000
@@ -2247,7 +2247,14 @@
tmpstr[i] = c;
}
tmpstr[i++] = 0;
- *vp = kallsyms_lookup_name(tmpstr);
+ *vp = 0;
+ if (setjmp(bus_error_jmp) == 0) {
+ catch_memory_errors = 1;
+ sync();
+ *vp = kallsyms_lookup_name(tmpstr);
+ sync();
+ }
+ catch_memory_errors = 0;
if (!(*vp)) {
printf("unknown symbol '%s'\n", tmpstr);
return 0;
Index: linux-work/arch/ppc/xmon/xmon.c
===================================================================
--- linux-work.orig/arch/ppc/xmon/xmon.c 2005-05-06 12:52:10.000000000 +1000
+++ linux-work/arch/ppc/xmon/xmon.c 2005-05-06 12:55:18.000000000 +1000
@@ -9,6 +9,7 @@
#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/bitops.h>
+#include <linux/kallsyms.h>
#include <asm/ptrace.h>
#include <asm/string.h>
#include <asm/prom.h>
@@ -93,8 +94,7 @@
static unsigned read_spr(int);
static void write_spr(int, unsigned);
static void super_regs(void);
-static void print_sysmap(void);
-static void sysmap_lookup(void);
+static void symbol_lookup(void);
static void remove_bpts(void);
static void insert_bpts(void);
static struct bpt *at_breakpoint(unsigned pc);
@@ -103,7 +103,6 @@
#ifdef CONFIG_SMP
static void cpu_cmd(void);
#endif /* CONFIG_SMP */
-static int pretty_print_addr(unsigned long addr);
static void csum(void);
#ifdef CONFIG_BOOTX_TEXT
static void vidcmds(void);
@@ -120,8 +119,6 @@
extern void xmon_enter(void);
extern void xmon_leave(void);
-extern char* xmon_find_symbol(unsigned long addr, unsigned long* saddr);
-extern unsigned long xmon_symbol_to_addr(char* symbol);
static unsigned start_tb[NR_CPUS][2];
static unsigned stop_tb[NR_CPUS][2];
@@ -148,7 +145,6 @@
mm move a block of memory\n\
ms set a block of memory\n\
md compare two blocks of memory\n\
- M print System.map\n\
r print registers\n\
S print special registers\n\
t print backtrace\n\
@@ -175,6 +171,35 @@
"r" (loops) : "ctr");
}
+/* Print an address in numeric and symbolic form (if possible) */
+static void xmon_print_symbol(unsigned long address, const char *mid,
+ const char *after)
+{
+ char *modname;
+ const char *name = NULL;
+ unsigned long offset, size;
+ static char tmpstr[128];
+
+ printf("%.8lx", address);
+ if (setjmp(bus_error_jmp) == 0) {
+ debugger_fault_handler = handle_fault;
+ sync();
+ name = kallsyms_lookup(address, &size, &offset, &modname,
+ tmpstr);
+ sync();
+ /* wait a little while to see if we get a machine check */
+ __delay(200);
+ }
+ debugger_fault_handler = NULL;
+
+ if (name) {
+ printf("%s%s+%#lx/%#lx", mid, name, offset, size);
+ if (modname)
+ printf(" [%s]", modname);
+ }
+ printf("%s", after);
+}
+
static void get_tb(unsigned *p)
{
unsigned hi, lo, hiagain;
@@ -454,7 +479,7 @@
dump();
break;
case 'l':
- sysmap_lookup();
+ symbol_lookup();
break;
case 'r':
if (excp != NULL)
@@ -466,9 +491,6 @@
else
excprint(excp);
break;
- case 'M':
- print_sysmap();
- break;
case 'S':
super_regs();
break;
@@ -825,20 +847,19 @@
for (; sp != 0; sp = stack[0]) {
if (mread(sp, stack, sizeof(stack)) != sizeof(stack))
break;
- pretty_print_addr(stack[1]);
- printf(" ");
+ printf("[%.8lx] ", stack);
+ xmon_print_symbol(stack[1], " ", "\n");
if (stack[1] == (unsigned) &ret_from_except
|| stack[1] == (unsigned) &ret_from_except_full
|| stack[1] == (unsigned) &ret_from_syscall) {
if (mread(sp+16, ®s, sizeof(regs)) != sizeof(regs))
break;
- printf("\nexception:%x [%x] %x ", regs.trap, sp+16,
+ printf("exception:%x [%x] %x\n", regs.trap, sp+16,
regs.nip);
sp = regs.gpr[1];
if (mread(sp, stack, sizeof(stack)) != sizeof(stack))
break;
}
- printf("\n");
}
}
@@ -859,11 +880,10 @@
#ifdef CONFIG_SMP
printf("cpu %d: ", smp_processor_id());
#endif /* CONFIG_SMP */
- printf("vector: %x at pc = ", fp->trap);
- pretty_print_addr(fp->nip);
- printf(", lr = ");
- pretty_print_addr(fp->link);
- printf("\nmsr = %x, sp = %x [%x]\n", fp->msr, fp->gpr[1], fp);
+ printf("vector: %x at pc=", fp->trap);
+ xmon_print_symbol(fp->nip, ": ", ", lr=");
+ xmon_print_symbol(fp->link, ": ", "\n");
+ printf("msr = %x, sp = %x [%x]\n", fp->msr, fp->gpr[1], fp);
trap = TRAP(fp);
if (trap == 0x300 || trap == 0x600)
printf("dar = %x, dsisr = %x\n", fp->dar, fp->dsisr);
@@ -951,24 +971,6 @@
extern char dec_exc;
void
-print_sysmap(void)
-{
- extern char *sysmap;
- if ( sysmap ) {
- printf("System.map: \n");
- if( setjmp(bus_error_jmp) == 0 ) {
- debugger_fault_handler = handle_fault;
- sync();
- xmon_puts(sysmap);
- sync();
- }
- debugger_fault_handler = NULL;
- }
- else
- printf("No System.map\n");
-}
-
-void
super_regs(void)
{
int i, cmd;
@@ -1738,7 +1740,7 @@
printf("invalid register name '%%%s'\n", regname);
return 0;
} else if (c == '$') {
- static char symname[64];
+ static char symname[128];
int i;
for (i=0; i<63; i++) {
c = inchar();
@@ -1749,7 +1751,14 @@
symname[i] = c;
}
symname[i++] = 0;
- *vp = xmon_symbol_to_addr(symname);
+ *vp = 0;
+ if (setjmp(bus_error_jmp) == 0) {
+ debugger_fault_handler = handle_fault;
+ sync();
+ *vp = kallsyms_lookup_name(symname);
+ sync();
+ }
+ debugger_fault_handler = NULL;
if (!(*vp)) {
printf("unknown symbol\n");
return 0;
@@ -1840,169 +1849,34 @@
lineptr = str;
}
-void
-sysmap_lookup(void)
+static void
+symbol_lookup(void)
{
int type = inchar();
unsigned addr;
- static char tmp[64];
- char* cur;
-
- extern char *sysmap;
- extern unsigned long sysmap_size;
- if ( !sysmap || !sysmap_size )
- return;
-
- switch(type) {
- case 'a':
- if (scanhex(&addr)) {
- pretty_print_addr(addr);
- printf("\n");
- }
- termch = 0;
- break;
- case 's':
- getstring(tmp, 64);
- if( setjmp(bus_error_jmp) == 0 ) {
- debugger_fault_handler = handle_fault;
- sync();
- cur = sysmap;
- do {
- cur = strstr(cur, tmp);
- if (cur) {
- static char res[64];
- char *p, *d;
- p = cur;
- while(p > sysmap && *p != 10)
- p--;
- if (*p == 10) p++;
- d = res;
- while(*p && p < (sysmap + sysmap_size) && *p != 10)
- *(d++) = *(p++);
- *(d++) = 0;
- printf("%s\n", res);
- cur++;
- }
- } while (cur);
- sync();
- }
- debugger_fault_handler = NULL;
- termch = 0;
- break;
- }
-}
+ static char tmp[128];
-static int
-pretty_print_addr(unsigned long addr)
-{
- char *sym;
- unsigned long saddr;
-
- printf("%08x", addr);
- sym = xmon_find_symbol(addr, &saddr);
- if (sym)
- printf(" (%s+0x%x)", sym, addr-saddr);
- return (sym != 0);
-}
-
-char*
-xmon_find_symbol(unsigned long addr, unsigned long* saddr)
-{
- static char rbuffer[64];
- char *p, *ep, *limit;
- unsigned long prev, next;
- char* psym;
-
- extern char *sysmap;
- extern unsigned long sysmap_size;
- if ( !sysmap || !sysmap_size )
- return NULL;
-
- prev = 0;
- psym = NULL;
- p = sysmap;
- limit = p + sysmap_size;
- if( setjmp(bus_error_jmp) == 0 ) {
- debugger_fault_handler = handle_fault;
- sync();
- do {
- next = simple_strtoul(p, &p, 16);
- if (next > addr && prev <= addr) {
- if (!psym)
- goto bail;
- ep = rbuffer;
- p = psym;
- while(*p && p < limit && *p == 32)
- p++;
- while(*p && p < limit && *p != 10 && (ep - rbuffer) < 63)
- *(ep++) = *(p++);
- *(ep++) = 0;
- if (saddr)
- *saddr = prev;
- debugger_fault_handler = NULL;
- return rbuffer;
- }
- prev = next;
- psym = p;
- while(*p && p < limit && *p != 10)
- p++;
- if (*p) p++;
- } while(*p && p < limit && next);
-bail:
- sync();
+ switch (type) {
+ case 'a':
+ if (scanhex(&addr))
+ xmon_print_symbol(addr, ": ", "\n");
+ termch = 0;
+ break;
+ case 's':
+ getstring(tmp, 64);
+ if (setjmp(bus_error_jmp) == 0) {
+ debugger_fault_handler = handle_fault;
+ sync();
+ addr = kallsyms_lookup_name(tmp);
+ if (addr)
+ printf("%s: %lx\n", tmp, addr);
+ else
+ printf("Symbol '%s' not found.\n", tmp);
+ sync();
+ }
+ debugger_fault_handler = NULL;
+ termch = 0;
+ break;
}
- debugger_fault_handler = NULL;
- return NULL;
}
-unsigned long
-xmon_symbol_to_addr(char* symbol)
-{
- char *p, *cur;
- char *match = NULL;
- int goodness = 0;
- int result = 0;
-
- extern char *sysmap;
- extern unsigned long sysmap_size;
- if ( !sysmap || !sysmap_size )
- return 0;
-
- if( setjmp(bus_error_jmp) == 0 ) {
- debugger_fault_handler = handle_fault;
- sync();
- cur = sysmap;
- while(cur) {
- cur = strstr(cur, symbol);
- if (cur) {
- int gd = 1;
-
- /* best match if equal, better match if
- * begins with
- */
- if (cur == sysmap || *(cur-1) == ' ') {
- gd++;
- if (cur[strlen(symbol)] == 10)
- gd++;
- }
- if (gd > goodness) {
- match = cur;
- goodness = gd;
- if (gd == 3)
- break;
- }
- cur++;
- }
- }
- if (goodness) {
- p = match;
- while(p > sysmap && *p != 10)
- p--;
- if (*p == 10) p++;
- result = simple_strtoul(p, &p, 16);
- }
- sync();
- }
- debugger_fault_handler = NULL;
- return result;
-}
Index: linux-work/arch/ppc/boot/ld.script
===================================================================
--- linux-work.orig/arch/ppc/boot/ld.script 2005-05-02 10:48:08.000000000 +1000
+++ linux-work/arch/ppc/boot/ld.script 2005-05-06 13:17:21.000000000 +1000
@@ -58,9 +58,6 @@
*(.ramdisk)
__ramdisk_end = .;
. = ALIGN(4096);
- __sysmap_begin = .;
- *(.sysmap)
- __sysmap_end = .;
CONSTRUCTORS
}
_edata = .;
Index: linux-work/arch/ppc/boot/utils/addSystemMap.c
===================================================================
--- linux-work.orig/arch/ppc/boot/utils/addSystemMap.c 2005-05-02 10:48:08.000000000 +1000
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,186 +0,0 @@
-#include <stdio.h>
-#include <stdlib.h>
-#include <byteswap.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-
-void xlate( char * inb, char * trb, unsigned len )
-{
- unsigned i;
- for ( i=0; i<len; ++i ) {
- char c = *inb++;
- char c1 = c >> 4;
- char c2 = c & 0xf;
- if ( c1 > 9 )
- c1 = c1 + 'A' - 10;
- else
- c1 = c1 + '0';
- if ( c2 > 9 )
- c2 = c2 + 'A' - 10;
- else
- c2 = c2 + '0';
- *trb++ = c1;
- *trb++ = c2;
- }
- *trb = 0;
-}
-
-#define ElfHeaderSize (64 * 1024)
-#define ElfPages (ElfHeaderSize / 4096)
-#define KERNELBASE (0xc0000000)
-
-void get4k( /*istream *inf*/FILE *file, char *buf )
-{
- unsigned j;
- unsigned num = fread(buf, 1, 4096, file);
- for ( j=num; j<4096; ++j )
- buf[j] = 0;
-}
-
-void put4k( /*ostream *outf*/FILE *file, char *buf )
-{
- fwrite(buf, 1, 4096, file);
-}
-
-int main(int argc, char **argv)
-{
- char inbuf[4096];
- FILE *ramDisk = NULL;
- FILE *inputVmlinux = NULL;
- FILE *outputVmlinux = NULL;
- unsigned i = 0;
- unsigned long ramFileLen = 0;
- unsigned long ramLen = 0;
- unsigned long roundR = 0;
- unsigned long kernelLen = 0;
- unsigned long actualKernelLen = 0;
- unsigned long round = 0;
- unsigned long roundedKernelLen = 0;
- unsigned long ramStartOffs = 0;
- unsigned long ramPages = 0;
- unsigned long roundedKernelPages = 0;
- if ( argc < 2 ) {
- printf("Name of System Map file missing.\n");
- exit(1);
- }
-
- if ( argc < 3 ) {
- printf("Name of vmlinux file missing.\n");
- exit(1);
- }
-
- if ( argc < 4 ) {
- printf("Name of vmlinux output file missing.\n");
- exit(1);
- }
-
- ramDisk = fopen(argv[1], "r");
- if ( ! ramDisk ) {
- printf("System Map file \"%s\" failed to open.\n", argv[1]);
- exit(1);
- }
- inputVmlinux = fopen(argv[2], "r");
- if ( ! inputVmlinux ) {
- printf("vmlinux file \"%s\" failed to open.\n", argv[2]);
- exit(1);
- }
- outputVmlinux = fopen(argv[3], "w");
- if ( ! outputVmlinux ) {
- printf("output vmlinux file \"%s\" failed to open.\n", argv[3]);
- exit(1);
- }
- fseek(ramDisk, 0, SEEK_END);
- ramFileLen = ftell(ramDisk);
- fseek(ramDisk, 0, SEEK_SET);
- printf("%s file size = %ld\n", argv[1], ramFileLen);
-
- ramLen = ramFileLen;
-
- roundR = 4096 - (ramLen % 4096);
- if ( roundR ) {
- printf("Rounding System Map file up to a multiple of 4096, adding %ld\n", roundR);
- ramLen += roundR;
- }
-
- printf("Rounded System Map size is %ld\n", ramLen);
- fseek(inputVmlinux, 0, SEEK_END);
- kernelLen = ftell(inputVmlinux);
- fseek(inputVmlinux, 0, SEEK_SET);
- printf("kernel file size = %ld\n", kernelLen);
- if ( kernelLen == 0 ) {
- printf("You must have a linux kernel specified as argv[2]\n");
- exit(1);
- }
-
- actualKernelLen = kernelLen - ElfHeaderSize;
-
- printf("actual kernel length (minus ELF header) = %ld\n", actualKernelLen);
-
- round = actualKernelLen % 4096;
- roundedKernelLen = actualKernelLen;
- if ( round )
- roundedKernelLen += (4096 - round);
-
- printf("actual kernel length rounded up to a 4k multiple = %ld\n", roundedKernelLen);
-
- ramStartOffs = roundedKernelLen;
- ramPages = ramLen / 4096;
-
- printf("System map pages to copy = %ld\n", ramPages);
-
- // Copy 64K ELF header
- for (i=0; i<(ElfPages); ++i) {
- get4k( inputVmlinux, inbuf );
- put4k( outputVmlinux, inbuf );
- }
-
-
-
- roundedKernelPages = roundedKernelLen / 4096;
-
- fseek(inputVmlinux, ElfHeaderSize, SEEK_SET);
-
- {
- for ( i=0; i<roundedKernelPages; ++i ) {
- get4k( inputVmlinux, inbuf );
- if ( i == 0 ) {
- unsigned long * p;
- printf("Storing embedded_sysmap_start at 0x3c\n");
- p = (unsigned long *)(inbuf + 0x3c);
-
-#if (BYTE_ORDER == __BIG_ENDIAN)
- *p = ramStartOffs;
-#else
- *p = bswap_32(ramStartOffs);
-#endif
-
- printf("Storing embedded_sysmap_end at 0x44\n");
- p = (unsigned long *)(inbuf + 0x44);
-#if (BYTE_ORDER == __BIG_ENDIAN)
- *p = ramStartOffs + ramFileLen;
-#else
- *p = bswap_32(ramStartOffs + ramFileLen);
-#endif
- }
- put4k( outputVmlinux, inbuf );
- }
- }
-
- {
- for ( i=0; i<ramPages; ++i ) {
- get4k( ramDisk, inbuf );
- put4k( outputVmlinux, inbuf );
- }
- }
-
-
- fclose(ramDisk);
- fclose(inputVmlinux);
- fclose(outputVmlinux);
- /* Set permission to executable */
- chmod(argv[3], S_IRUSR|S_IWUSR|S_IXUSR|S_IRGRP|S_IXGRP|S_IROTH|S_IXOTH);
-
- return 0;
-
-}
-
Index: linux-work/arch/ppc/kernel/setup.c
===================================================================
--- linux-work.orig/arch/ppc/kernel/setup.c 2005-05-03 14:57:45.000000000 +1000
+++ linux-work/arch/ppc/kernel/setup.c 2005-05-06 13:16:49.000000000 +1000
@@ -61,8 +61,6 @@
extern boot_infos_t *boot_infos;
struct ide_machdep_calls ppc_ide_md;
-char *sysmap;
-unsigned long sysmap_size;
/* Used with the BI_MEMSIZE bootinfo parameter to store the memory
size value reported by the boot loader. */
@@ -579,11 +577,6 @@
case BI_CMD_LINE:
strlcpy(cmd_line, (void *)data, sizeof(cmd_line));
break;
- case BI_SYSMAP:
- sysmap = (char *)((data[0] >= (KERNELBASE)) ? data[0] :
- (data[0]+KERNELBASE));
- sysmap_size = data[1];
- break;
#ifdef CONFIG_BLK_DEV_INITRD
case BI_INITRD:
initrd_start = data[0] + KERNELBASE;
Index: linux-work/arch/ppc/boot/simple/Makefile
===================================================================
--- linux-work.orig/arch/ppc/boot/simple/Makefile 2005-05-02 10:48:08.000000000 +1000
+++ linux-work/arch/ppc/boot/simple/Makefile 2005-05-06 13:18:48.000000000 +1000
@@ -203,7 +203,7 @@
$(obj)/dummy.o $(obj)/image.o
$(LD) $(LD_ARGS) -o $@ $(OBJS) $(obj)/image.o $(LIBS)
$(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R .comment -R .stab \
- -R .stabstr -R .ramdisk -R .sysmap
+ -R .stabstr -R .ramdisk
$(obj)/zvmlinux.initrd: $(OBJS) $(LIBS) $(srctree)/$(boot)/ld.script \
$(images)/vmlinux.gz $(obj)/dummy.o
@@ -215,7 +215,7 @@
$(obj)/dummy.o $(obj)/image.o
$(LD) $(LD_ARGS) -o $@ $(OBJS) $(obj)/image.o $(LIBS)
$(OBJCOPY) $(OBJCOPY_ARGS) $@ $@ -R .comment -R .stab \
- -R .stabstr -R .sysmap
+ -R .stabstr
# Sort-of dummy rules, that let us format the image we want.
zImage: $(images)/$(zimage-y) $(obj)/zvmlinux
Index: linux-work/arch/ppc/boot/openfirmware/Makefile
===================================================================
--- linux-work.orig/arch/ppc/boot/openfirmware/Makefile 2005-05-02 10:48:08.000000000 +1000
+++ linux-work/arch/ppc/boot/openfirmware/Makefile 2005-05-06 13:20:29.000000000 +1000
@@ -54,13 +54,10 @@
@echo ' RAM disk image must be provided separately'
@/bin/false
-objcpxmon-$(CONFIG_XMON) := --add-section=.sysmap=System.map \
- --set-section-flags=.sysmap=contents,alloc,load,readonly,data
quiet_cmd_genimage = GEN $@
cmd_genimage = $(OBJCOPY) -R .comment \
--add-section=.image=$(images)/vmlinux.gz \
- --set-section-flags=.image=contents,alloc,load,readonly,data \
- $(objcpxmon-y) $< $@
+ --set-section-flags=.image=contents,alloc,load,readonly,data $< $@
targets += image.o
$(obj)/image.o: $(obj)/dummy.o $(images)/vmlinux.gz FORCE
Index: linux-work/arch/ppc/boot/openfirmware/common.c
===================================================================
--- linux-work.orig/arch/ppc/boot/openfirmware/common.c 2005-05-02 10:48:08.000000000 +1000
+++ linux-work/arch/ppc/boot/openfirmware/common.c 2005-05-06 13:19:22.000000000 +1000
@@ -15,7 +15,6 @@
#include <asm/page.h>
/* Information from the linker */
-extern char __sysmap_begin, __sysmap_end;
extern int strcmp(const char *s1, const char *s2);
extern char *avail_ram, *avail_high;
@@ -116,14 +115,8 @@
void make_bi_recs(unsigned long addr, char *name, unsigned int mach,
unsigned long progend)
{
- unsigned long sysmap_size;
struct bi_record *rec;
- /* Figure out the size of a possible System.map we're going to
- * pass along.
- * */
- sysmap_size = (unsigned long)(&__sysmap_end) -
- (unsigned long)(&__sysmap_begin);
/* leave a 1MB gap then align to the next 1MB boundary */
addr = _ALIGN(addr+ (1<<20) - 1, (1<<20));
@@ -147,15 +140,6 @@
rec->size = sizeof(struct bi_record) + 2 * sizeof(unsigned long);
rec = (struct bi_record *)((unsigned long)rec + rec->size);
- if (sysmap_size) {
- rec->tag = BI_SYSMAP;
- rec->data[0] = (unsigned long)(&__sysmap_begin);
- rec->data[1] = sysmap_size;
- rec->size = sizeof(struct bi_record) + 2 *
- sizeof(unsigned long);
- rec = (struct bi_record *)((unsigned long)rec + rec->size);
- }
-
rec->tag = BI_LAST;
rec->size = sizeof(struct bi_record);
rec = (struct bi_record *)((unsigned long)rec + rec->size);
Index: linux-work/arch/ppc/mm/init.c
===================================================================
--- linux-work.orig/arch/ppc/mm/init.c 2005-05-02 10:48:08.000000000 +1000
+++ linux-work/arch/ppc/mm/init.c 2005-05-06 13:16:18.000000000 +1000
@@ -96,9 +96,6 @@
char *klimit = _end;
struct mem_pieces phys_avail;
-extern char *sysmap;
-extern unsigned long sysmap_size;
-
/*
* this tells the system to map all of ram with the segregs
* (i.e. page tables) instead of the bats.
@@ -441,12 +438,6 @@
if (agp_special_page)
SetPageReserved(virt_to_page(agp_special_page));
#endif
- if ( sysmap )
- for (addr = (unsigned long)sysmap;
- addr < PAGE_ALIGN((unsigned long)sysmap+sysmap_size) ;
- addr += PAGE_SIZE)
- SetPageReserved(virt_to_page(addr));
-
for (addr = PAGE_OFFSET; addr < (unsigned long)high_memory;
addr += PAGE_SIZE) {
if (!PageReserved(virt_to_page(addr)))
@@ -482,9 +473,7 @@
codepages<< (PAGE_SHIFT-10), datapages<< (PAGE_SHIFT-10),
initpages<< (PAGE_SHIFT-10),
(unsigned long) (totalhigh_pages << (PAGE_SHIFT-10)));
- if (sysmap)
- printk("System.map loaded at 0x%08x for debugger, size: %ld bytes\n",
- (unsigned int)sysmap, sysmap_size);
+
#ifdef CONFIG_PPC_PMAC
if (agp_special_page)
printk(KERN_INFO "AGP special page: 0x%08lx\n", agp_special_page);
@@ -534,9 +523,6 @@
if (rtas_data)
mem_pieces_remove(&phys_avail, rtas_data, rtas_size, 1);
#endif
- /* remove the sysmap pages from the available memory */
- if (sysmap)
- mem_pieces_remove(&phys_avail, __pa(sysmap), sysmap_size, 1);
#ifdef CONFIG_PPC_PMAC
/* Because of some uninorth weirdness, we need a page of
* memory as high as possible (it must be outside of the
^ permalink raw reply
* [PATCH] 8xx: fix usage of pinned 8Mbyte TLB entries
From: Marcelo Tosatti @ 2005-05-05 17:20 UTC (permalink / raw)
To: Dan Malek, linux-ppc-embedded
Hi,
As can be seen by BDI output from previous messages, the 8Mbyte TLB
pinned entry is not being actually used.
The manual says, in section "9.3.2 Translation Enabled" (MMU section):
"A TLB hit in multiple entries is avoided when a TLB is being reloaded.
When TLB logic detects that a new effective page number (EPN) overlaps
one in the TLB (when taking into account pages sizes, subpage validity,
user/supervisor state, address space ID,and the SH values of the TLB
entries), the new EPN is written and the old one is invalidated."
The following patch changes "mmu_mapin_ram" (hook used by mapin_ram), to
begin creation of pagetables after the first 8Megs, preserving the
8Mbyte TLB entry.
This changes the assumption that DMA allocations can start at the first
kernel address, given that those need to be marked uncached due to DMA
cache coherency issues.
The bootmem allocator, used to allocate DMA regions at bootup,uses
MAX_DMA_ADDRESS as its goal parameter. The algorithm searches for
pages above 'goal' first, for then to search lower pages.
So change MAX_DMA_ADDRESS to avoid bootmem collisions with lower 8Megs.
Drivers which allocate directly from __get_free_pages() and tweak the
pte's directly also need to be fixed. For example
Panto: FEC currently does
mem_addr = __get_free_page(GFP_KERNEL);
cbd_base = (cbd_t *)mem_addr;
/* XXX: missing check for allocation failure */
fec_uncache(mem_addr);
That needs to be changed to avoid the lower 8Megs.
We are still using v2.4 FEC driver, so this fixed it:
// mem_addr = __get_free_page(GFP_KERNEL);
mem_addr = dma_alloc_coherent(NULL, PAGE_SIZE, &physaddr,
GFP_KERNEL);
cbd_base = (cbd_t *)mem_addr;
Allocateing from the coherent memory DMA region. Which sits at, I suppose,
after initial 8Megs in all configurations (should be always).
TLB miss stat output now looks like this on 2.6.11:
[root@CAS root]# time dd if=/dev/zero of=file bs=4k count=3840
3840+0 records in
3840+0 records out
real 0m3.723s
user 0m0.150s
sys 0m3.560s
I-TLB userspace misses: 1904
I-TLB kernel misses: 0
D-TLB userspace misses: 160272
D-TLB kernel misses: 135098
instead of
[root@CAS root]# time dd if=/dev/zero of=file bs=4k count=3840
3840+0 records in
3840+0 records out
real 0m4.328s
user 0m0.128s
sys 0m4.170s
I-TLB userspace misses: 162651
I-TLB kernel misses: 138100
D-TLB userspace misses: 255294
D-TLB kernel misses: 238129
Dan: Maybe the pinning should be mandatory, getting rid of CONFIG_PIN_TLB?
diff -Nur --show-c-function linux-2.6.12-rc3.orig/arch/ppc/mm/mmu_decl.h linux-2.6.12-rc3/arch/ppc/mm/mmu_decl.h
--- linux-2.6.12-rc3.orig/arch/ppc/mm/mmu_decl.h 2005-05-05 17:21:55.000000000 -0300
+++ linux-2.6.12-rc3/arch/ppc/mm/mmu_decl.h 2005-05-05 17:31:20.000000000 -0300
@@ -49,7 +49,8 @@ extern unsigned long Hash_size, Hash_mas
#if defined(CONFIG_8xx)
#define flush_HPTE(X, va, pg) _tlbie(va)
#define MMU_init_hw() do { } while(0)
-#define mmu_mapin_ram() (0UL)
+/* There is a 8Mbyte pinned TLB entry covering the first 8Megs, so skip it */
+#define mmu_mapin_ram() (0x00800000)
#elif defined(CONFIG_4xx)
#define flush_HPTE(X, va, pg) _tlbie(va)
diff -Nur --show-c-function linux-2.6.12-rc3.orig/include/asm-ppc/dma.h linux-2.6.12-rc3/include/asm-ppc/dma.h
--- linux-2.6.12-rc3.orig/include/asm-ppc/dma.h 2005-05-05 17:21:59.000000000 -0300
+++ linux-2.6.12-rc3/include/asm-ppc/dma.h 2005-05-05 17:53:07.000000000 -0300
@@ -32,9 +32,16 @@
#define MAX_DMA_CHANNELS 8
#endif
+#ifdef CONFIG_8xx
+/* DMA pages are uncached on 8xx due to cache coherency issues.
+* Avoid bootmem from trying to allocate pages from first 8Megs.
+*/
+#define MAX_DMA_ADDRESS (KERNELBASE + 0x01000000)
+#else
/* The maximum address that we can perform a DMA transfer to on this platform */
/* Doesn't really apply... */
#define MAX_DMA_ADDRESS 0xFFFFFFFF
+#endif
/* in arch/ppc/kernel/setup.c -- Cort */
extern unsigned long DMA_MODE_WRITE, DMA_MODE_READ;
^ permalink raw reply
* Re: CONFIG_PIN_TLB experiments
From: Marcelo Tosatti @ 2005-05-05 14:11 UTC (permalink / raw)
To: Conn Clark; +Cc: linuxppc-embedded
In-Reply-To: <427A52A5.8020203@esteem.com>
> >>When you load the Mx_EPN of the pinned area is the EV bit being set?
> >
> >
> >Yep.
> >
> >
> >"MD_RAM1" (SPR 826) is set:
> >
> >SPR 826 : 0x00007fff 32767 <- "0x00007fff" was 0x00007f00"
> >
> >Bits 17 and 18 are set. Their meaning is: "Change bit for DTLB entry" and
> >"Entry valid flag" respectively.
> >Bits 19...23 are also set, they represent supervisor access. Note that
> >bit 23 "supervisor access type" is set: 0 is read-only, 1 is read-write.
> >
> >so everything looks OK here.
> >
> >"MD_RAM0":
> >
> >SPR 825 : 0x00000fe0 4064
> >
> >Bits 20...26 are set.
> >
> >20-22: 8Mbyte page set.
> >23-26: APGI (access protection group in 1's complement) set. It is
> >zero (1111 in 1's complement).
> >27: guarded memory not set.
> >
> >"MD_CAM":
> >
> >SPR 824 : 0xc00000f0 -1073741584
> >
> >Bits 24-27 are set.
> >
> >24-26 is "page size" (111 = 8Mb) and 27 indicates "shared page"
> >(ASID comparisong disabled).
> >
> >The 8Mbyte page is used at boot, from "start_here" until "MMU_init()"
> >gets called...
> >
> >The manual says, section "9.3 Address Translation"
> >
> >"When TLB logic detects that a new effective page number (EPN) overlaps
> >one in the TLB (when taking into account page sizes, subpage validity
> >flags,
> >user/supervisor state, etc. the new EPN is written and the old one is
> >invalidated."
> >
> >I'm trying to boot a kernel which does not create kernel pte's
> >from 0xc000000 till 0xc080000.
> >
>
> Well, looking at the sources I currently have, 2.6.8 and 2.4.27, I
> noticed that InstructionTLBMiss in 2.6 is missing some ifdefs that the
> 2.4 has that pertain to TLB pinning. Otherwise the code appears
> basically the same.
Hi Conn,
Those changes shouldnt be pertinent... I believeCONFIG_PIN_TLB never worked
on 2.4 either.
^ permalink raw reply
* Re: PPC 44x Watchdog timer
From: Takeharu KATO @ 2005-05-05 21:43 UTC (permalink / raw)
To: Kumar Gala; +Cc: Glenn Burkhardt, Gala Kumar K.-galak, linuxppc-embedded
In-Reply-To: <905bacf60cf1e3167d4f42dba31c9d4f@freescale.com>
Hi Kumar:
>
>
> Sorry, I think Matt and I have been busy with normal "work". I'll take
> a look at this in the next week. If you can update the patches to
> something current that would help (but is not critical).
>
Thank you for your response.
OK,I'll tweaks minor changes for current kernel in linus's git kernel.
^ permalink raw reply
* Re: CONFIG_PIN_TLB experiments
From: Conn Clark @ 2005-05-05 17:06 UTC (permalink / raw)
To: Marcelo Tosatti; +Cc: linuxppc-embedded
In-Reply-To: <20050504192238.GA3461@logos.cnet>
Marcelo Tosatti wrote:
> Hi,
>
> On Tue, May 03, 2005 at 11:14:39AM -0700, Conn Clark wrote:
>
>>Marcelo Tosatti wrote:
>>
>>>Hi 8xx folks,
>>
>><SNIP>
>>
>>>Actually, CONFIG_PIN_TLB slowdowns the system, as expected (there are only
>>>28 usable TLB's instead of 32).
>>>
>>>
>>>v2.6 CONFIG_PIN_TLB:
>>>I-TLB userspace misses: 162113
>>>I-TLB kernel misses: 135911
>>>D-TLB userspace misses: 289452
>>>D-TLB kernel misses: 257039
>>>
>>>v2.6 without CONFIG_PIN_TLB:
>>>I-TLB userspace misses: 160828
>>>I-TLB kernel misses: 134746
>>>D-TLB userspace misses: 253557
>>>D-TLB kernel misses: 227383
>>>
>>>
>>
>>Considering that the TLB kernel misses are higher with tlb pinning it
>>appears as though the pinned TLBs are not marked as valid.
>
>
> Yep
>
>
>>>The following BDI output shows the pinned, 8MByte data page mapping
>>>present,
>>>at 0xc0000000.
>>>
>>>BDI>rds 826
>>>SPR 826 : 0x00007f00 32512
>>>BDI>rms 792 0x0c001C00
>>>BDI>rms 824 1
>>>BDI>rds 824
>>>SPR 824 : 0xc00000f0 -1073741584
>>>BDI>rds 825
>>>SPR 825 : 0x00000fe0 4064
>>>BDI>rds 826
>>>SPR 826 : 0x00007fff 32767 <- "0x00007fff" was 0x00007f00"
>>>initially. I tried enabling
>>> usermode access without
>>> success.
>>>
>>>There are several 4Kb mappings inside the range covered by this 8Mb TLB
>>>entry, for example:
>>>
>>>BDI>rms 792 0x0c000200
>>>BDI>rms 824 1
>>>BDI>rds 824
>>>SPR 824 : 0xc0224f17 -1071493353
>>>BDI>rds 825
>>>SPR 825 : 0x002241e0 2245088
>>>BDI>rds 826
>>>SPR 826 : 0x00007f00 32512
>>>
>>>And more, without so much detail:
>>>SPR 824 : 0xc0224f17 -1071493353
>>>SPR 824 : 0xc01fbf17 -1071661289
>>>SPR 824 : 0xc0246f17 -1071354089
>>>SPR 824 : 0xc023ff17 -1071382761
>>>SPR 824 : 0xc7e35f17 - 941400297
>>>SPR 824 : 0xc0244f17 -1071362281
>>>SPR 824 : 0xc023ef17 -1071386857
>>>
>>>Note that protection (SPR 826) is exactly the same as the 8Mbyte page
>>>protection.
>>>Why is the translation mechanism rejection the pinned mappings?
>>>
>>>Dan, have you ever seen this work? Am I misunderstanding how the pinned
>>>entries are supposed to work?
>>
>>When you load the Mx_EPN of the pinned area is the EV bit being set?
>
>
> Yep.
>
>
> "MD_RAM1" (SPR 826) is set:
>
> SPR 826 : 0x00007fff 32767 <- "0x00007fff" was 0x00007f00"
>
> Bits 17 and 18 are set. Their meaning is: "Change bit for DTLB entry" and
> "Entry valid flag" respectively.
> Bits 19...23 are also set, they represent supervisor access. Note that
> bit 23 "supervisor access type" is set: 0 is read-only, 1 is read-write.
>
> so everything looks OK here.
>
> "MD_RAM0":
>
> SPR 825 : 0x00000fe0 4064
>
> Bits 20...26 are set.
>
> 20-22: 8Mbyte page set.
> 23-26: APGI (access protection group in 1's complement) set. It is
> zero (1111 in 1's complement).
> 27: guarded memory not set.
>
> "MD_CAM":
>
> SPR 824 : 0xc00000f0 -1073741584
>
> Bits 24-27 are set.
>
> 24-26 is "page size" (111 = 8Mb) and 27 indicates "shared page"
> (ASID comparisong disabled).
>
> The 8Mbyte page is used at boot, from "start_here" until "MMU_init()"
> gets called...
>
> The manual says, section "9.3 Address Translation"
>
> "When TLB logic detects that a new effective page number (EPN) overlaps
> one in the TLB (when taking into account page sizes, subpage validity flags,
> user/supervisor state, etc. the new EPN is written and the old one is
> invalidated."
>
> I'm trying to boot a kernel which does not create kernel pte's
> from 0xc000000 till 0xc080000.
>
Well, looking at the sources I currently have, 2.6.8 and 2.4.27, I
noticed that InstructionTLBMiss in 2.6 is missing some ifdefs that the
2.4 has that pertain to TLB pinning. Otherwise the code appears
basically the same.
**** begin 2.6.8 code ****
InstructionTLBMiss:
#ifdef CONFIG_8xx_CPU6
stw r3, 8(r0)
li r3, 0x3f80
stw r3, 12(r0)
lwz r3, 12(r0)
#endif
mtspr M_TW, r20 /* Save a couple of working registers */
mfcr r20
stw r20, 0(r0)
stw r21, 4(r0)
mfspr r20, SRR0 /* Get effective address of fault */
#ifdef CONFIG_8xx_CPU6
li r3, 0x3780
stw r3, 12(r0)
lwz r3, 12(r0)
#endif
mtspr MD_EPN, r20 /* Have to use MD_EPN for walk, MI_EPN can't */
mfspr r20, M_TWB /* Get level 1 table entry address */
/* If we are faulting a kernel address, we have to use the
* kernel page tables.
*/
andi. r21, r20, 0x0800 /* Address >= 0x80000000 */
beq 3f
lis r21, swapper_pg_dir@h
ori r21, r21, swapper_pg_dir@l
rlwimi r20, r21, 0, 2, 19
3:
lwz r21, 0(r20) /* Get the level 1 entry */
rlwinm. r20, r21,0,0,19 /* Extract page descriptor page address */
beq 2f /* If zero, don't try to find a pte */
/* We have a pte table, so load the MI_TWC with the attributes
* for this "segment."
*/
tophys(r21,r21)
ori r21,r21,1 /* Set valid bit */
#ifdef CONFIG_8xx_CPU6
li r3, 0x2b80
stw r3, 12(r0)
lwz r3, 12(r0)
#endif
mtspr MI_TWC, r21 /* Set segment attributes */
#ifdef CONFIG_8xx_CPU6
li r3, 0x3b80
stw r3, 12(r0)
lwz r3, 12(r0)
#endif
mtspr MD_TWC, r21 /* Load pte table base address */
mfspr r21, MD_TWC /* ....and get the pte address */
lwz r20, 0(r21) /* Get the pte */
ori r20, r20, _PAGE_ACCESSED
stw r20, 0(r21)
/* The Linux PTE won't go exactly into the MMU TLB.
* Software indicator bits 21, 22 and 28 must be clear.
* Software indicator bits 24, 25, 26, and 27 must be
* set. All other Linux PTE bits control the behavior
* of the MMU.
*/
li r21, 0x00f0
rlwimi r20, r21, 0, 24, 28 /* Set 24-27, clear 28 */
#ifdef CONFIG_8xx_CPU6
li r3, 0x2d80
stw r3, 12(r0)
lwz r3, 12(r0)
#endif
mtspr MI_RPN, r20 /* Update TLB entry */
mfspr r20, M_TW /* Restore registers */
lwz r21, 0(r0)
mtcr r21
lwz r21, 4(r0)
#ifdef CONFIG_8xx_CPU6
lwz r3, 8(r0)
#endif
rfi
2: mfspr r20, M_TW /* Restore registers */
lwz r21, 0(r0)
mtcr r21
lwz r21, 4(r0)
#ifdef CONFIG_8xx_CPU6
lwz r3, 8(r0)
#endif
b InstructionAccess
**** end 2.6.8 code ****
**** begin 2.4.27 code ****
InstructionTLBMiss:
#ifdef CONFIG_8xx_CPU6
stw r3, 8(r0)
li r3, 0x3f80
stw r3, 12(r0)
lwz r3, 12(r0)
#endif
mtspr M_TW, r20 /* Save a couple of working registers */
#if !defined(CONFIG_PIN_TLB) || defined(CONFIG_MODULES)
mfcr r20
stw r20, 0(r0)
#endif
stw r21, 4(r0)
mfspr r20, SRR0 /* Get effective address of fault */
#ifdef CONFIG_8xx_CPU6
li r3, 0x3780
stw r3, 12(r0)
lwz r3, 12(r0)
#endif
mtspr MD_EPN, r20 /* Have to use MD_EPN for walk, MI_EPN can't */
mfspr r20, M_TWB /* Get level 1 table entry address */
#if !defined(CONFIG_PIN_TLB) || defined(CONFIG_MODULES)
/* If we are faulting a kernel address, we have to use the
* kernel page tables.
*/
andi. r21, r20, 0x0800 /* Address >= 0x80000000 */
beq 3f
lis r21, swapper_pg_dir@h
ori r21, r21, swapper_pg_dir@l
rlwimi r20, r21, 0, 2, 19
3:
lwz r21, 0(r20) /* Get the level 1 entry */
rlwinm. r20, r21,0,0,19 /* Extract page descriptor page address */
beq 2f /* If zero, don't try to find a pte */
#else
lwz r21, 0(r20) /* Get the level 1 entry */
mfcr r20
cmplwi cr0, r21, 0x0fff /* Test page descriptor page address */
bng- 2f /* If zero, don't try to find a pte */
mtcr r20
#endif
/* We have a pte table, so load the MI_TWC with the attributes
* for this "segment."
*/
tophys(r21,r21)
ori r21,r21,1 /* Set valid bit */
#ifdef CONFIG_8xx_CPU6
li r3, 0x2b80
stw r3, 12(r0)
lwz r3, 12(r0)
#endif
mtspr MI_TWC, r21 /* Set segment attributes */
#ifdef CONFIG_8xx_CPU6
li r3, 0x3b80
stw r3, 12(r0)
lwz r3, 12(r0)
#endif
mtspr MD_TWC, r21 /* Load pte table base address */
mfspr r21, MD_TWC /* ....and get the pte address */
lwz r20, 0(r21) /* Get the pte */
ori r20, r20, _PAGE_ACCESSED
stw r20, 0(r21)
/* The Linux PTE won't go exactly into the MMU TLB.
* Software indicator bits 21, 22 and 28 must be clear.
* Software indicator bits 24, 25, 26, and 27 must be
* set. All other Linux PTE bits control the behavior
* of the MMU.
*/
li r21, 0x00f0
rlwimi r20, r21, 0, 24, 28 /* Set 24-27, clear 28 */
#ifdef CONFIG_8xx_CPU6
li r3, 0x2d80
stw r3, 12(r0)
lwz r3, 12(r0)
#endif
mtspr MI_RPN, r20 /* Update TLB entry */
mfspr r20, M_TW /* Restore registers */
#if !defined(CONFIG_PIN_TLB) || defined(CONFIG_MODULES)
lwz r21, 0(r0)
mtcr r21
#endif
lwz r21, 4(r0)
#ifdef CONFIG_8xx_CPU6
lwz r3, 8(r0)
#endif
rfi
2: /* Restore registers
*/
#if !defined(CONFIG_PIN_TLB) || defined(CONFIG_MODULES)
lwz r21, 0(r0)
mtcr r21
#else
mtcr r20
#endif
mfspr r20, M_TW
lwz r21, 4(r0)
#ifdef CONFIG_8xx_CPU6
lwz r3, 8(r0)
#endif
b InstructionAccess
**** end 2.4.27 code ****
Does the current 2.6 kernel have these ifdefs in them?
-- Conn
*****************************************************************
Blessed be the heretic, for he causes some to think and unites
the rest against him.
*****************************************************************
Conn Clark
Engineering Assistant clark@esteem.com
Electronic Systems Technology Inc. www.esteem.com
Stock Ticker Symbol ELST
^ permalink raw reply
* Re: [PATCH] Set cpu explicitly in kernel compiles
From: Tom Rini @ 2005-05-05 16:29 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <bc56e4a30aef8a46e88cee672a315fdc@freescale.com>
On Thu, May 05, 2005 at 11:22:38AM -0500, Kumar Gala wrote:
>
> On May 5, 2005, at 10:27 AM, Tom Rini wrote:
>
> >On Thu, May 05, 2005 at 10:12:42AM -0500, Kumar Gala wrote:
> > >
> >> On May 5, 2005, at 9:23 AM, Tom Rini wrote:
> > >
> >> >On Thu, May 05, 2005 at 09:00:50AM -0500, Kumar Gala wrote:
> > > > >
> > > >> On May 5, 2005, at 7:24 AM, Dan Malek wrote:
> > > > >
> > > >> >
> > > > > >
> > > > > >On May 5, 2005, at 1:22 AM, Paul Mackerras wrote:
> > > > > > > If you think we should have -mcpu=xxx on the command line
> >for
> >> >4xx,
> > > > > > > 44x, 8xx, etc., then that's fine, but that is a separate
> >problem
> > > >> >from
> > > > > > > what my patch was addressing (one which my patch might make
> >it
> > > >> >easier
> > > > > > > to fix, though).
> > > > > >
> > > > > >I think that is exactly what we want, although I don't know how
> >> >that is
> > > > > > separate from the patch you sent.? My original comment was the
> >> >patch
> > > > > > fixes the problem for only one of the cpu cores, not all of
> >them.?
> > > >> >Which
> > > > > > then led into the subsequent suggestion of making the biarch
> >work
> > > > > > like the past compilers, and we must specific the flags for
> >POWER4
> > > > > > instead of the other way around.? Without explicit -mcpu
> >flags,
> >> >the
> > > > > > existing compiler behavior is just fine .....? but, I guess
> >I'd be
> > > > > >standing
> > > > > > in the way of progress to want this :-)
> > > > >
> > > >> I agree with Dan here.? I think we should go ahead and extend the
> >> >patch
> > > >> to set -mcpu and -mtune flags for the list of processors we have
> >in
> > > >> "Processor Type".? If I'm building a kernel for e500 or 4xx I
> >might
> >> >as
> > > >> well get a kernel that is tuned a bit more for the subarch.?
> > > >
> > > > This is fine.
> >> >
> > > >> Additionally, there should be some expert override ability, so
> >if I
> > > >> really want to do -mcpu=7455 -mtune=7455 I can.
> > > >
> > > >Gack, no!? It's quite a pain to go from CONFIG_FOO="string" into
> >> >useable
> > > > Makefile bits that the one we did have back in 2.4 is gone.? That
> >also
> > > > implies gcc finally knows something about these cores that might
> >be
> > > > useful, which I don't think is the case, nor is it likely to be.?
> >But
> >> >if
> > > > we did want it, we'd probably go the route x86 has.
> > >
> >> I'm not saying it has to be done via a CONFIG option, all I'm saying
> >is
> >> if I want to explicitly use GCC then I would hope we could somehow
> >> disable it being override.
> >
> >If you're not doing it via CONFIG, that leaves manual (which is always
> > an option) or seeing if passing CFLAGS on the cmdline overrides
> >things,
> > or adds to them.
>
> Thats all I really want. Just for us to make sure if I want to do
> -mcpu=7455 -mtune=7455 I'm able to and it actually does what I told it
> to do. I'm not sure if GCC is consistent on how it handles args that
> are duplicated. For example what will happen with the following:
>
> gcc -mcpu=750 -mtune=7450 -mcpu=603 -mtune=603
>
> Is this -mcpu=750 -mtune=7450 or -mcpu=603 -mtune=603
Last one wins, modulo gcc bugs, is the rule I believe.
--
Tom Rini
http://gate.crashing.org/~trini/
^ permalink raw reply
* Re: [PATCH] Set cpu explicitly in kernel compiles
From: Kumar Gala @ 2005-05-05 16:22 UTC (permalink / raw)
To: Tom Rini; +Cc: linuxppc-dev
In-Reply-To: <20050505152709.GA1221@smtp.west.cox.net>
On May 5, 2005, at 10:27 AM, Tom Rini wrote:
> On Thu, May 05, 2005 at 10:12:42AM -0500, Kumar Gala wrote:
> >
> > On May 5, 2005, at 9:23 AM, Tom Rini wrote:
> >
> > >On Thu, May 05, 2005 at 09:00:50AM -0500, Kumar Gala wrote:
> > > >
> > >> On May 5, 2005, at 7:24 AM, Dan Malek wrote:
> > > >
> > >> >
> > > > >
> > > > >On May 5, 2005, at 1:22 AM, Paul Mackerras wrote:
> > > > > > If you think we should have -mcpu=xxx on the command line
> for
> > >4xx,
> > > > > > 44x, 8xx, etc., then that's fine, but that is a separate
> problem
> > >> >from
> > > > > > what my patch was addressing (one which my patch might make
> it
> > >> >easier
> > > > > > to fix, though).
> > > > >
> > > > >I think that is exactly what we want, although I don't know how
> > >that is
> > > > > separate from the patch you sent.? My original comment was the
> > >patch
> > > > > fixes the problem for only one of the cpu cores, not all of
> them.?
> > >> >Which
> > > > > then led into the subsequent suggestion of making the biarch
> work
> > > > > like the past compilers, and we must specific the flags for
> POWER4
> > > > > instead of the other way around.? Without explicit -mcpu
> flags,
> > >the
> > > > > existing compiler behavior is just fine .....? but, I guess
> I'd be
> > > > >standing
> > > > > in the way of progress to want this :-)
> > > >
> > >> I agree with Dan here.? I think we should go ahead and extend the
> > >patch
> > >> to set -mcpu and -mtune flags for the list of processors we have
> in
> > >> "Processor Type".? If I'm building a kernel for e500 or 4xx I
> might
> > >as
> > >> well get a kernel that is tuned a bit more for the subarch.?
> > >
> > > This is fine.
> > >
> > >> Additionally, there should be some expert override ability, so
> if I
> > >> really want to do -mcpu=7455 -mtune=7455 I can.
> > >
> > >Gack, no!? It's quite a pain to go from CONFIG_FOO="string" into
> > >useable
> > > Makefile bits that the one we did have back in 2.4 is gone.? That
> also
> > > implies gcc finally knows something about these cores that might
> be
> > > useful, which I don't think is the case, nor is it likely to be.?
> But
> > >if
> > > we did want it, we'd probably go the route x86 has.
> >
> > I'm not saying it has to be done via a CONFIG option, all I'm saying
> is
> > if I want to explicitly use GCC then I would hope we could somehow
> > disable it being override.
>
> If you're not doing it via CONFIG, that leaves manual (which is always
> an option) or seeing if passing CFLAGS on the cmdline overrides
> things,
> or adds to them.
Thats all I really want. Just for us to make sure if I want to do
-mcpu=7455 -mtune=7455 I'm able to and it actually does what I told it
to do. I'm not sure if GCC is consistent on how it handles args that
are duplicated. For example what will happen with the following:
gcc -mcpu=750 -mtune=7450 -mcpu=603 -mtune=603
Is this -mcpu=750 -mtune=7450 or -mcpu=603 -mtune=603
- kumar
^ permalink raw reply
* Re: CONFIG_PIN_TLB experiments
From: Dan Malek @ 2005-05-05 16:10 UTC (permalink / raw)
To: Marcelo Tosatti; +Cc: linuxppc-embedded
In-Reply-To: <20050504192238.GA3461@logos.cnet>
On May 4, 2005, at 3:22 PM, Marcelo Tosatti wrote:
> I'm trying to boot a kernel which does not create kernel pte's
> from 0xc000000 till 0xc080000.
The kernel will always (and must) create PTEs for all VM
spaces, It's our choice to not use them. In the case of Pinned
entries, what is supposed to happen is we load an entry that
covers a large space. Since we never get a miss fault, we
never look at the PTE tables to load something different.
Thanks.
-- Dan
^ permalink raw reply
* Port to port switching on the MPC8260 ATM SAR
From: Alex Zeffertt @ 2005-05-05 16:02 UTC (permalink / raw)
To: linuxppc-embedded, linux-atm-general@lists.sourceforge.net
Hi all,
Aparently the MPC8260 CPM can do port to port switching (PTP). Has
anybody got this working?
I've looked at atm8260.sourceforge.net and there's a userspace program
mpc8260_user.c which appears to allow creation of PTP connections, but
the support in the device driver appears to be missing.
I would be very gratefull for any help,
Alex Zeffertt
^ permalink raw reply
* Re: ATM driver for 8260 (linux 2.4.x) working!
From: Alex Zeffertt @ 2005-05-05 15:55 UTC (permalink / raw)
To: Theo Gjaltema; +Cc: linuxppc-embedded
In-Reply-To: <4279E534.2070208@chello.nl>
Hi,
I would be interested in any patch you may have. Please could you let
me know which release the patch is against.
Thanks
On Thu, 05 May 2005 11:19:48 +0200
Theo Gjaltema <gjalt007@chello.nl> wrote:
>
>
> We once did a port of a ATM driver on the 8260 for a linux 2.2.20
> kernel. For this, we patched a pre-release of the driver build by ?
> If interested, I could send you our results.
>
> Greetings,
> Theo.
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
^ permalink raw reply
* Re: [PATCH] Set cpu explicitly in kernel compiles
From: Tom Rini @ 2005-05-05 15:27 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <a5cd7b845e0ede0ec78656a07f0c15a6@freescale.com>
On Thu, May 05, 2005 at 10:12:42AM -0500, Kumar Gala wrote:
>
> On May 5, 2005, at 9:23 AM, Tom Rini wrote:
>
> >On Thu, May 05, 2005 at 09:00:50AM -0500, Kumar Gala wrote:
> > >
> >> On May 5, 2005, at 7:24 AM, Dan Malek wrote:
> > >
> >> >
> > > >
> > > >On May 5, 2005, at 1:22 AM, Paul Mackerras wrote:
> > > > > If you think we should have -mcpu=xxx on the command line for
> >4xx,
> > > > > 44x, 8xx, etc., then that's fine, but that is a separate problem
> >> >from
> > > > > what my patch was addressing (one which my patch might make it
> >> >easier
> > > > > to fix, though).
> > > >
> > > >I think that is exactly what we want, although I don't know how
> >that is
> > > > separate from the patch you sent.? My original comment was the
> >patch
> > > > fixes the problem for only one of the cpu cores, not all of them.?
> >> >Which
> > > > then led into the subsequent suggestion of making the biarch work
> > > > like the past compilers, and we must specific the flags for POWER4
> > > > instead of the other way around.? Without explicit -mcpu flags,
> >the
> > > > existing compiler behavior is just fine .....? but, I guess I'd be
> > > >standing
> > > > in the way of progress to want this :-)
> > >
> >> I agree with Dan here.? I think we should go ahead and extend the
> >patch
> >> to set -mcpu and -mtune flags for the list of processors we have in
> >> "Processor Type".? If I'm building a kernel for e500 or 4xx I might
> >as
> >> well get a kernel that is tuned a bit more for the subarch.?
> >
> > This is fine.
> >
> >> Additionally, there should be some expert override ability, so if I
> >> really want to do -mcpu=7455 -mtune=7455 I can.
> >
> >Gack, no!? It's quite a pain to go from CONFIG_FOO="string" into
> >useable
> > Makefile bits that the one we did have back in 2.4 is gone.? That also
> > implies gcc finally knows something about these cores that might be
> > useful, which I don't think is the case, nor is it likely to be.? But
> >if
> > we did want it, we'd probably go the route x86 has.
>
> I'm not saying it has to be done via a CONFIG option, all I'm saying is
> if I want to explicitly use GCC then I would hope we could somehow
> disable it being override.
If you're not doing it via CONFIG, that leaves manual (which is always
an option) or seeing if passing CFLAGS on the cmdline overrides things,
or adds to them.
--
Tom Rini
http://gate.crashing.org/~trini/
^ permalink raw reply
* Re: CONFIG_PIN_TLB experiments
From: Marcelo Tosatti @ 2005-05-04 19:22 UTC (permalink / raw)
To: Conn Clark; +Cc: linuxppc-embedded
In-Reply-To: <4277BF8F.8040206@esteem.com>
Hi,
On Tue, May 03, 2005 at 11:14:39AM -0700, Conn Clark wrote:
> Marcelo Tosatti wrote:
> >Hi 8xx folks,
>
> <SNIP>
>
> >
> >Actually, CONFIG_PIN_TLB slowdowns the system, as expected (there are only
> >28 usable TLB's instead of 32).
> >
> >
> >v2.6 CONFIG_PIN_TLB:
> >I-TLB userspace misses: 162113
> >I-TLB kernel misses: 135911
> >D-TLB userspace misses: 289452
> >D-TLB kernel misses: 257039
> >
> >v2.6 without CONFIG_PIN_TLB:
> >I-TLB userspace misses: 160828
> >I-TLB kernel misses: 134746
> >D-TLB userspace misses: 253557
> >D-TLB kernel misses: 227383
> >
> >
>
> Considering that the TLB kernel misses are higher with tlb pinning it
> appears as though the pinned TLBs are not marked as valid.
Yep
>
> >The following BDI output shows the pinned, 8MByte data page mapping
> >present,
> >at 0xc0000000.
> >
> >BDI>rds 826
> >SPR 826 : 0x00007f00 32512
> >BDI>rms 792 0x0c001C00
> >BDI>rms 824 1
> >BDI>rds 824
> >SPR 824 : 0xc00000f0 -1073741584
> >BDI>rds 825
> >SPR 825 : 0x00000fe0 4064
> >BDI>rds 826
> >SPR 826 : 0x00007fff 32767 <- "0x00007fff" was 0x00007f00"
> >initially. I tried enabling
> > usermode access without
> > success.
> >
> >There are several 4Kb mappings inside the range covered by this 8Mb TLB
> >entry, for example:
> >
> >BDI>rms 792 0x0c000200
> >BDI>rms 824 1
> >BDI>rds 824
> >SPR 824 : 0xc0224f17 -1071493353
> >BDI>rds 825
> >SPR 825 : 0x002241e0 2245088
> >BDI>rds 826
> >SPR 826 : 0x00007f00 32512
> >
> >And more, without so much detail:
> >SPR 824 : 0xc0224f17 -1071493353
> >SPR 824 : 0xc01fbf17 -1071661289
> >SPR 824 : 0xc0246f17 -1071354089
> >SPR 824 : 0xc023ff17 -1071382761
> >SPR 824 : 0xc7e35f17 - 941400297
> >SPR 824 : 0xc0244f17 -1071362281
> >SPR 824 : 0xc023ef17 -1071386857
> >
> >Note that protection (SPR 826) is exactly the same as the 8Mbyte page
> >protection.
> >Why is the translation mechanism rejection the pinned mappings?
> >
> >Dan, have you ever seen this work? Am I misunderstanding how the pinned
> >entries are supposed to work?
>
> When you load the Mx_EPN of the pinned area is the EV bit being set?
Yep.
"MD_RAM1" (SPR 826) is set:
SPR 826 : 0x00007fff 32767 <- "0x00007fff" was 0x00007f00"
Bits 17 and 18 are set. Their meaning is: "Change bit for DTLB entry" and
"Entry valid flag" respectively.
Bits 19...23 are also set, they represent supervisor access. Note that
bit 23 "supervisor access type" is set: 0 is read-only, 1 is read-write.
so everything looks OK here.
"MD_RAM0":
SPR 825 : 0x00000fe0 4064
Bits 20...26 are set.
20-22: 8Mbyte page set.
23-26: APGI (access protection group in 1's complement) set. It is
zero (1111 in 1's complement).
27: guarded memory not set.
"MD_CAM":
SPR 824 : 0xc00000f0 -1073741584
Bits 24-27 are set.
24-26 is "page size" (111 = 8Mb) and 27 indicates "shared page"
(ASID comparisong disabled).
The 8Mbyte page is used at boot, from "start_here" until "MMU_init()"
gets called...
The manual says, section "9.3 Address Translation"
"When TLB logic detects that a new effective page number (EPN) overlaps
one in the TLB (when taking into account page sizes, subpage validity flags,
user/supervisor state, etc. the new EPN is written and the old one is
invalidated."
I'm trying to boot a kernel which does not create kernel pte's
from 0xc000000 till 0xc080000.
^ permalink raw reply
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