* Re: [PATCH] [2/2] PM support for emac driver
From: Eugene Surovegin @ 2005-06-04 0:53 UTC (permalink / raw)
To: Geoff Levand; +Cc: linuxppc-embedded
In-Reply-To: <42A0E647.80604@am.sony.com>
On Fri, Jun 03, 2005 at 04:22:47PM -0700, Geoff Levand wrote:
> This is a first attempt to add PM support to the PPC 440 emac
> driver. Still needed are code to take care of the PHY chip,
> and to support wake-on-lan. Any comments on how to do
> those would be most welcome.
Just FYI, there are plans to get rid of the current buggy EMAC driver
and replace it with the new NAPI one (http://kernel.ebshome.net).
--
Eugene
^ permalink raw reply
* Re: kernel ported from ELDK 3.0 hangs (loops in idled()) on my custom MPC870 Board
From: Wolfgang Denk @ 2005-06-04 1:17 UTC (permalink / raw)
To: Edward Hong; +Cc: linuxppc-embedded
In-Reply-To: <21fb73bc05060316102325f94d@mail.gmail.com>
In message <21fb73bc05060316102325f94d@mail.gmail.com> you wrote:
> I am trying to bring up Linux on a custom MPC870 Board using ELDK 3.0.
Why are you using old (not to say ancient) tools?
> The ported kernel from ELDK 3.0 hangs (loops in idled()) and the kernel_thread
> init never gets started!???
How do you know that init didn't run? Runningthe idle loop is a
perfectly normal situation.
> Linux version 2.4.24-pre2 (ehong@chico) (gcc version 3.2.2 20030217 (Yellow
> Dog Linux 3.0 3.2.2-2a_1)) #8 Fri Jun 3 10:13:10 MDT 2005 On node 0
> totalpages: 16384
> zone(0): 16384 pages.
> zone(1): 0 pages.
> zone(2): 0 pages.
> Kernel command line: root=/dev/nfs rw nfsroot=10.15.10.170:/opt/eldk/pp
> c_8xx
> ip=10.15.2.101:10.15.10.170::::eth0:off panic=1
> Decrementer Frequency = 495000000/60
> Calibrating delay loop... 131.48 BogoMIPS
> Memory: 63132k available (1204k kernel code, 360k data, 60k init, 0k highme
> m)
> Dentry cache hash table entries: 8192 (order: 4, 65536 bytes)
> Inode cache hash table entries: 4096 (order: 3, 32768 bytes)
> Mount cache hash table entries: 512 (order: 0, 4096 bytes)
> Buffer cache hash table entries: 4096 (order: 2, 16384 bytes)
> Page-cache hash table entries: 16384 (order: 4, 65536 bytes)
> POSIX conformance testing by UNIFIX
>
>
> (kernel loops in idled() after kernel_thread(init, ...) in rest_init().)
Are you sure that your kernel configuration is sensible? For example,
did you configure a console port that matches your hardware? Did you
configure the serial ports (SMC / SCC) at all?
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
I read part of it all the way through.
^ permalink raw reply
* cpm_uart initializes scm/scc for console only?
From: Ken MacLeod @ 2005-06-04 3:14 UTC (permalink / raw)
To: linuxppc-embedded
We're tracking down an issue trying to use both SMC1 and SMC2 as
ttyCPM devices. SMC1 as console (and ttyCPM/0) is working fine,
but it appears that SMC2 is not being completely initialized.
It looks as though the cause is that cpm_uart_init_smc (or
cpm_uart_init_scc) is only called from cpm_uart_console_setup[1],
ie. only when CONFIG_SERIAL_CPM_CONSOLE is set, and then only for the
one port that is defined as the console.
It looks like cpu_uart_init_smc/scc should be called at some point for
all ports that are defined for use, but there's no other place it's
called from.
Before we try fixing the wrong thing, is this (using multiple SMC/SCC
ports "out of the box") known to work? Is there a reason why calling
cpu_uart_init_smc/scc wouldn't have been implemented?
This was found with Linux 2.6.10 and I've reviewed the updates through
2.6.12-rc5 and the patch tracking system.
Sanity check much appreciated,
-- Ken
[1] http://lxr.linux.no/source/drivers/serial/cpm_uart/cpm_uart_core.c#L1079
^ permalink raw reply
* Re: [PATCH] Fix PPC440 pagetable attributes
From: Geoff Levand @ 2005-06-03 22:32 UTC (permalink / raw)
To: Kumar Gala; +Cc: Levand, Geoffrey, linuxppc-embedded
In-Reply-To: <b69ad095ef9d42a1e25079a3dcf28be8@freescale.com>
[-- Attachment #1: Type: text/plain, Size: 636 bytes --]
Kumar Gala wrote:
> On Jun 3, 2005, at 11:30 AM, Geoff Levand wrote:
>>* With the PPC Book-E Linux implementation, 0-11th LSB of PTE stand
>>for memory
>>* protection-related function. (See PTE structure in
>>include/asm-ppc/mmu.h)
>>* Definition of _PAGE_XXX here stands for above bits. Note that those
>>bits
>>* values are CPU dependent, not architecture.
>
>
> That's more reasonable, however I would make it say PPC 44x ... instead
> of Book-E, the e500 is also a Book-E processor and if you notice if we
> use a 64-bit PTE we end up using more than the 12 LSBs for PTE flags.
>
OK, attached is an updated patch.
-Geoff
[-- Attachment #2: ppc440-page-attrib-fix.patch --]
[-- Type: text/x-patch, Size: 3655 bytes --]
This patch fixes a bug in the PPC440 pagetable attributes that breaks
swap support. It also adds some notes on the PPC440 attribute fields.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> for CELF
--
Index: linux-2.6.12-bhpm/include/asm-ppc/pgtable.h
===================================================================
--- linux-2.6.12-bhpm.orig/include/asm-ppc/pgtable.h 2005-06-03 13:25:11.000000000 -0700
+++ linux-2.6.12-bhpm/include/asm-ppc/pgtable.h 2005-06-03 15:27:12.000000000 -0700
@@ -202,20 +202,65 @@
*
* Note that these bits preclude future use of a page size
* less than 4KB.
+ *
+ *
+ * PPC 440 core has following TLB attribute fields;
+ *
+ * TLB1:
+ * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
+ * RPN................................. - - - - - - ERPN.......
+ *
+ * TLB2:
+ * 0 1 2 3 4 ... 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
+ * - - - - - - U0 U1 U2 U3 W I M G E - UX UW UR SX SW SR
+ *
+ * There are some constrains and options, to decide mapping software bits
+ * into TLB entry.
+ *
+ * - PRESENT *must* be in the bottom three bits because swap cache
+ * entries use the top 29 bits for TLB2.
+ *
+ * - FILE *must* be in the bottom three bits because swap cache
+ * entries use the top 29 bits for TLB2.
+ *
+ * - CACHE COHERENT bit (M) has no effect on PPC440 core, because it
+ * doesn't support SMP. So we can use this as software bit, like
+ * DIRTY.
+ *
+ * With the PPC 44x Linux implementation the 0-11th LSBs of the PTE are used
+ * for memory protection related functions (see PTE structure in
+ * include/asm-ppc/mmu.h). The _PAGE_XXX definitions in this file map to the
+ * above bits. Note that the bit values are CPU specific, not architecture
+ * specific.
+ *
+ * The kernel PTE entry holds arch-dependent swp_entry structure under certain
+ * situation. In other words, in such situation, some portion of the PTE bits
+ * are used as swp_entry. In PPC implementation, 3-24th LSBs are shared with
+ * swp_entry, however 0-2nd LSBs still hold protection values.
+ * That means three protection bits are reserved for both PTE and SWAP
+ * entry at the most three LSBs.
+ *
+ * There are three protection bits available for SWAP entry;
+ * _PAGE_PRESENT
+ * _PAGE_FILE
+ * _PAGE_HASHPTE (if HW has)
+ *
+ * So those three bits have to be inside of 0-2nd LSB of PTE.
+ *
*/
+
#define _PAGE_PRESENT 0x00000001 /* S: PTE valid */
-#define _PAGE_RW 0x00000002 /* S: Write permission */
-#define _PAGE_DIRTY 0x00000004 /* S: Page dirty */
+#define _PAGE_RW 0x00000002 /* S: Write permission */
+#define _PAGE_FILE 0x00000004 /* S: nonlinear file mapping */
#define _PAGE_ACCESSED 0x00000008 /* S: Page referenced */
#define _PAGE_HWWRITE 0x00000010 /* H: Dirty & RW */
#define _PAGE_HWEXEC 0x00000020 /* H: Execute permission */
-#define _PAGE_USER 0x00000040 /* S: User page */
-#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
-#define _PAGE_GUARDED 0x00000100 /* H: G bit */
-#define _PAGE_COHERENT 0x00000200 /* H: M bit */
-#define _PAGE_FILE 0x00000400 /* S: nonlinear file mapping */
-#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
-#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
+#define _PAGE_USER 0x00000040 /* S: User page */
+#define _PAGE_ENDIAN 0x00000080 /* H: E bit */
+#define _PAGE_GUARDED 0x00000100 /* H: G bit */
+#define _PAGE_DIRTY 0x00000200 /* S: Page dirty */
+#define _PAGE_NO_CACHE 0x00000400 /* H: I bit */
+#define _PAGE_WRITETHRU 0x00000800 /* H: W bit */
/* TODO: Add large page lowmem mapping support */
#define _PMD_PRESENT 0
^ permalink raw reply
* Re: bd_t Cleaning: Interface Part
From: Sylvain Munaut @ 2005-06-04 18:13 UTC (permalink / raw)
To: Jon Loeliger; +Cc: linuxppc-embedded@ozlabs.org
In-Reply-To: <1117221259.26114.91.camel@cashmere.sps.mot.com>
Jon Loeliger wrote:
> On Thu, 2005-05-26 at 18:08, Kumar Gala wrote:
>
>>Jon,
>>
>>Can you break the patch up into a few pieces, it will be easier to
>>review that way. Here are the following pieces that make sense to me:
>>
>>0. New firmware interface (fw_bdt*, Kconfig, ...)
>>1. board code changes (everything in arch/ppc/platforms/*)
>>2. driver changes (things in *_io, ide, net, serial dirs -- try to give
>>a better list below)
>>3. System changes (files in arch/ppc/syslib and include/asm-ppc)
FWIW, tested on 5200 and works fine. Looks good to me.
Just a remark : I see a CONFIG_FW_OF option that activates
fw_of.o but there is no fw_of.c and I don't see what the flattened
OF tree does in this set of patch ?
Sylvain
^ permalink raw reply
* Re: kernel ported from ELDK 3.0 hangs (loops in idled()) on my custom MPC870 Board
From: Edward Hong @ 2005-06-04 23:40 UTC (permalink / raw)
To: Wolfgang Denk; +Cc: linuxppc-embedded
In-Reply-To: <20050604011736.B199EC1512@atlas.denx.de>
On 6/3/05, Wolfgang Denk <wd@denx.de> wrote:
> In message <21fb73bc05060316102325f94d@mail.gmail.com> you wrote:
> > I am trying to bring up Linux on a custom MPC870 Board using ELDK 3.0.
>=20
> Why are you using old (not to say ancient) tools?
>=20
I had the tool ready for a while. After porting u-boot, I realized
that there had been several new tool releases.
> > The ported kernel from ELDK 3.0 hangs (loops in idled()) and the kernel=
_thread
> > init never gets started!???
>=20
> How do you know that init didn't run? Runningthe idle loop is a
> perfectly normal situation.
>=20
My debug lines at the beginning of init never get printed on the
console or in the log_buf.
>=20
> Are you sure that your kernel configuration is sensible? For example,
> did you configure a console port that matches your hardware? Did you
> configure the serial ports (SMC / SCC) at all?
>=20
I am positive about the kernel configuration. SMC1 was configured as my=20
console.
Any suggestions for debugging?
> Best regards,
>=20
> Wolfgang Denk
>=20
> --
> Software Engineering: Embedded and Realtime Systems, Embedded Linux
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
> I read part of it all the way through.
>=20
Thank you!
Edward
^ permalink raw reply
* Re: kernel ported from ELDK 3.0 hangs (loops in idled()) on my custom MPC870 Board
From: Wolfgang Denk @ 2005-06-05 0:28 UTC (permalink / raw)
To: Edward Hong; +Cc: linuxppc-embedded
In-Reply-To: <21fb73bc0506041640736e3020@mail.gmail.com>
In message <21fb73bc0506041640736e3020@mail.gmail.com> you wrote:
>
> My debug lines at the beginning of init never get printed on the
> console or in the log_buf.
With "beginning of init" you mean init() in "init/main.c", right?
So gets rest_init() called?
Did you add a few printk's to start_kernel()?
How far does it get?
> Any suggestions for debugging?
Attach a BDI2000 and start GDB...
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
If something is different, it's either better or worse, and usually
both. - Larry Wall
^ permalink raw reply
* Help on the data rate on MPC5200 ethernet
From: xuetao @ 2005-06-05 14:09 UTC (permalink / raw)
To: linuxppc-embedded
Dear All:
I am testing the tcp/ip data communication data rate on MPC5200. The UDP data
rate is up to 80Mbps and TCP data rate is only 10Mbps? I test the TCP data rate
with FTP file traslation. Any body know the problem on this?
So thanks.
Best Regards,
Tom
^ permalink raw reply
* Re: Help on the data rate on MPC5200 ethernet
From: Jarno Manninen @ 2005-06-05 19:29 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <20050605141556.7B9CA679E6@ozlabs.org>
On Sunday 05 June 2005 17:09, xuetao wrote:
> I am testing the tcp/ip data communication data rate on MPC5200. The UDP
> data rate is up to 80Mbps and TCP data rate is only 10Mbps? I test the TCP
> data rate with FTP file traslation. Any body know the problem on this?
The mass storage may be the limiting factor here, ofcourse depending on your
configuration. Anyhow I've found NTTCP test utility usefull for simple
testing purposes. There's propably some other test suites floating around
too.
- Jarno
^ permalink raw reply
* Re: kernel ported from ELDK 3.0 hangs (loops in idled()) on my custom MPC870 Board
From: Edward Hong @ 2005-06-06 5:33 UTC (permalink / raw)
To: Wolfgang Denk; +Cc: linuxppc-embedded
In-Reply-To: <20050605002832.6311AC1512@atlas.denx.de>
On 6/4/05, Wolfgang Denk <wd@denx.de> wrote:
>=20
> With "beginning of init" you mean init() in "init/main.c", right?
> So gets rest_init() called?
> Did you add a few printk's to start_kernel()?
> How far does it get?
>=20
Yes. rest_init() got called and executed kernel_thread(init,...) ...
and got into cpu_idle().
> > Any suggestions for debugging?
>=20
> Attach a BDI2000 and start GDB...
>=20
I have a BDI2000. But I am not sure how to further debug in my
situation since I know the kernel execution was looping inside
idled().
Thank you!
Edward
^ permalink raw reply
* STP implementation on Linux
From: Vijay Padiyar @ 2005-06-06 5:40 UTC (permalink / raw)
To: LinuxPPC Support
Hi
I wanted to know whether the Linux 2.6 kernel has an implementation of the
STP protocol, and if so, where can I find the relevant code.
Regards
Vijay Padiyar
http://www.vijaypadiyar.eu.tf
^ permalink raw reply
* [Fwd: Re: Getting ownership for various boards/platforms configs]
From: Wojciech Kromer @ 2005-06-06 6:09 UTC (permalink / raw)
[-- Attachment #1: Type: text/plain, Size: 1 bytes --]
[-- Attachment #2: Re: Getting ownership for various boards/platforms configs --]
[-- Type: message/rfc822, Size: 2896 bytes --]
From: Allen Curtis <acurtis@onz.com>
To: Wojciech Kromer <wojciech.kromer@dgt.com.pl>
Subject: Re: Getting ownership for various boards/platforms configs
Date: Fri, 3 Jun 2005 07:27:41 -0700
Message-ID: <efe74c750b938026bd9564214c19a598@onz.com>
If you are looking for maintainers, I will work on the PPC stuff. The
#ifdef situation has been out of control for quite some time. I did
attempt to consolidate the platform stuff. Some of this work did make
it into the kernel. Are you talking about 2.6? I was about to work on
the sysfs stuff which will go a long way to cleaning up the device
drivers.
BTW: the linuxppc-embedded list did not show in the reply list. Forward
this if you want.
>> One issue that comes up from time to time is knowing who to contact
>> about some of the various boards that are supported for PPC. I've
>> suggested in the past that we create a MAINTAINERS file in
>> arch/ppc/platforms. I've started with a list of all the _defconfigs
>> that we have and would like to see if we can get contacts for the
>> boards. All this list is meant to be is a contact point.
>>
>>
> There is another issue..
>
> May I suggest to add one full-custom board?
> There are a lot of changes to do inside uart,fec,fcc drivers with a lot
> of #ifdefs,
> just because different use of mpc resources on different boards.
> Why it's not configured via menuconfig?
> Another nice example is inside status_led.h...
^ permalink raw reply
* Reseting bootcount from linux
From: Tore Martin Hagen @ 2005-06-06 6:41 UTC (permalink / raw)
To: LinuxPPC Support
In-Reply-To: <BAY1-DAV469FED545DEDB9CFE00498BFB0@phx.gbl>
Hi,
I am using a MPC8266ADS-PCI board and u-boot with the
CONFIG_BOOTCOUNT_LIMIT. If i stop u-boot before it starts Linux I can
see that the bootcount variable increments nicely. But if i dump the
content from flash (dd if=/dev/mtd/1 of=a1out bs=1k) and check the
content it is always
bootcount=1
So how can I reset the bootcount if it is always 1, or rather where is
the real bootcount stored?
/Tore
**
^ permalink raw reply
* Re: STP implementation on Linux
From: Stefan Nickl @ 2005-06-06 8:00 UTC (permalink / raw)
To: Vijay Padiyar; +Cc: LinuxPPC Support
In-Reply-To: <BAY1-DAV469FED545DEDB9CFE00498BFB0@phx.gbl>
On Mon, 2005-06-06 at 11:10 +0530, Vijay Padiyar wrote:
> Hi
>
> I wanted to know whether the Linux 2.6 kernel has an implementation of the
> STP protocol, and if so, where can I find the relevant code.
>
> Regards
>
> Vijay Padiyar
Spanning tree protocol:
/usr/src/linux/net/bridge/br_stp*
--
Stefan Nickl
Kontron Modular Computers
^ permalink raw reply
* Re: kernel ported from ELDK 3.0 hangs (loops in idled()) on my custom MPC870 Board
From: Wolfgang Denk @ 2005-06-06 8:03 UTC (permalink / raw)
To: Edward Hong; +Cc: linuxppc-embedded
In-Reply-To: <21fb73bc050605223311af6408@mail.gmail.com>
In message <21fb73bc050605223311af6408@mail.gmail.com> you wrote:
>
> I have a BDI2000. But I am not sure how to further debug in my
> situation since I know the kernel execution was looping inside
> idled().
Set a breakpoint earlier in the code and single step?
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
The C-shell doesn't parse. It adhoculates.
- Casper.Dik@Holland.Sun.COM in <3ol96k$b2j@engnews2.Eng.Sun.COM>
^ permalink raw reply
* Re: Reseting bootcount from linux
From: Wolfgang Denk @ 2005-06-06 8:27 UTC (permalink / raw)
To: Tore Martin Hagen; +Cc: LinuxPPC Support
[-- Attachment #1: Type: text/plain, Size: 1350 bytes --]
Dear Tore,
in message <42A3F015.5020203@oslo.westerngeco.slb.com> you wrote:
>
> I am using a MPC8266ADS-PCI board and u-boot with the
> CONFIG_BOOTCOUNT_LIMIT. If i stop u-boot before it starts Linux I can
> see that the bootcount variable increments nicely. But if i dump the
> content from flash (dd if=/dev/mtd/1 of=a1out bs=1k) and check the
> content it is always
> bootcount=1
The environment copy in flash gets stored only when you run the
"saveenv" command, but "bootcount" gets updated automagically upon
each boot, so even if you would change the flash contents this does
ot matter.
> So how can I reset the bootcount if it is always 1, or rather where is
> the real bootcount stored?
See function bootcount_store() in "cpu/mpc8260/commproc.c"; see also
include/common.h for the definition of BOOTCOUNT_MAGIC and
include/asm-ppc/cpm_8260.h for CPM_BOOTCOUNT_ADDR.
Please find attached some code (courtesy of Steffen Rumler) that can
be used to reset the boot counter under Linux using the /proc
interface.
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
"If that makes any sense to you, you have a big problem."
-- C. Durance, Computer Science 234
[-- Attachment #2: ubootBootcountAccess.c --]
[-- Type: application/octet-stream , Size: 3970 bytes --]
/*
* SOURCE: ubootBootcounterAccess.c
* FIRST EDITION: 02.12.03
* LAST UPDATE: 02.12.03
* AUTHOR(S): Steffen Rumler (Steffen.Rumler@siemens.com)
*
* PURPOSE: Provide read/write access to the U-Boot bootcounter
* via PROC FS
*/
#include <linux/module.h>
#include <linux/version.h>
#include <linux/fs.h>
#include <linux/proc_fs.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/proc_fs.h>
#include <asm/io.h>
#ifndef CONFIG_PROC_FS
#error "PROC FS support must be switched-on"
#endif
#ifdef CONFIG_8260
#define UBOOT_BOOTCOUNT_OFFSET 0x80f4 /* offset of bootcounter from IMMR */
#define UBOOT_BOOTCOUNT_MAGIC_OFFSET 0x80f8 /* offset of magic number from IMMR */
#define UBOOT_BOOTCOUNT_MAGIC 0xb001c041 /* magic number value */
#else
/* add other platforms here
*/
#error "platform not yet supported"
#endif
#define UBOOT_BOOTCOUNT_PROC_ENTRY "driver/bootcount" /* PROC FS entry under '/proc' */
/* This macro frees the machine specific function from bounds checking and
* this like that...
*/
#define PRINT_PROC(fmt,args...) \
do { \
*len += sprintf( buffer+*len, fmt, ##args ); \
if (*begin + *len > offset + size) \
return( 0 ); \
if (*begin + *len < offset) { \
*begin += *len; \
*len = 0; \
} \
} while(0)
/* read U-Boot bootcounter
*/
static int
read_bootcounter_info (char *buffer, int *len, off_t * begin, off_t offset,
int size)
{
unsigned char *immr = (unsigned char *) IMAP_ADDR;
unsigned long magic;
unsigned long counter;
magic = *((unsigned long *) (immr + UBOOT_BOOTCOUNT_MAGIC_OFFSET));
counter = *((unsigned long *) (immr + UBOOT_BOOTCOUNT_OFFSET));
if (magic == UBOOT_BOOTCOUNT_MAGIC) {
PRINT_PROC ("%lu\n", counter);
} else {
PRINT_PROC ("bad magic: 0x%lx != 0x%lx\n", magic,
UBOOT_BOOTCOUNT_MAGIC);
}
return 1;
}
/* read U-Boot bootcounter (wrapper)
*/
static int
read_bootcounter (char *buffer, char **start, off_t offset, int size,
int *eof, void *arg)
{
int len = 0;
off_t begin = 0;
*eof = read_bootcounter_info (buffer, &len, &begin, offset, size);
if (offset >= begin + len)
return 0;
*start = buffer + (offset - begin);
return size < begin + len - offset ? size : begin + len - offset;
}
/* write new value to U-Boot bootcounter
*/
static int
write_bootcounter (struct file *file, const char *buffer, unsigned long count,
void *data)
{
unsigned char *immr = (unsigned char *) IMAP_ADDR;
unsigned long magic;
unsigned long *counter_ptr;
magic = *((unsigned long *) (immr + UBOOT_BOOTCOUNT_MAGIC_OFFSET));
counter_ptr = (unsigned long *) (immr + UBOOT_BOOTCOUNT_OFFSET);
if (magic == UBOOT_BOOTCOUNT_MAGIC)
*counter_ptr = simple_strtol (buffer, NULL, 10);
else
return -EINVAL;
return count;
}
/* init entry point
*/
static int __init uboot_bootcount_init (void)
{
struct proc_dir_entry *bootcount;
printk ("%s (%d) %s: ", __FILE__, __LINE__, __FUNCTION__);
if ((bootcount =
create_proc_entry (UBOOT_BOOTCOUNT_PROC_ENTRY, 0600,
NULL)) == NULL) {
printk (KERN_ERR "\n%s (%d): cannot create /proc/%s\n",
__FILE__, __LINE__, UBOOT_BOOTCOUNT_PROC_ENTRY);
} else {
bootcount->read_proc = read_bootcounter;
bootcount->write_proc = write_bootcounter;
printk ("created \"/proc/%s\"\n", UBOOT_BOOTCOUNT_PROC_ENTRY);
}
return 0; /* success */
}
static void __exit uboot_bootcount_cleanup (void)
{
remove_proc_entry (UBOOT_BOOTCOUNT_PROC_ENTRY, NULL);
}
/* for loading the module dynamically
*/
module_init (uboot_bootcount_init);
module_exit (uboot_bootcount_cleanup);
MODULE_LICENSE ("GPL");
MODULE_AUTHOR ("Steffen Rumler <steffen.rumler@siemens.com>");
MODULE_DESCRIPTION ("Provide (read/write) access to the U-Boot bootcounter via PROC FS");
^ permalink raw reply
* Re: ppc32: Rework power management take #3
From: Wolfram Quester @ 2005-06-06 9:34 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev list, debian-powerpc@lists.debian.org
In-Reply-To: <1117838638.31082.173.camel@gaston>
[-- Attachment #1: Type: text/plain, Size: 1589 bytes --]
Hi Ben,
On Sat, Jun 04, 2005 at 08:43:57AM +1000, Benjamin Herrenschmidt wrote:
>
> > Normally I use rivafb, but I tried video=ofonly and did not get a
> > freeze. I tried it three times and I hope that this is good statistics.
> > With 2.6.12-rc2 and riva fb I got the freeze in about 80% of all initial
> > suspends, with rc{4,5-git6} and riva fb I had it everytime. But it may
> > still well be that there is a random component since I learned to
> > workaround the problem by switching to tty1 and thus don't trigger the
> > freeze condition that often.
>
> Ok, what happens if you run rivafb, ssh into the box, and open a new tty
> (that is leave the box on X, but do something like echo "toto"
> >/dev/tty8) to create a new tty in the background.
>
> Does that trigger the freeze ?
>
> Ben.
OK, I tried that in some variations. If I do as you suggest, nothing
happens, I can login and use X as normal. But as soon as I try to switch
to tty1, the machine freezes. Without this ssh-stuff I can switch to
tty1 and back and be happy.
Then I rebooted, ssh'd into the box and added the line
8:23:respawn:/sbin/getty 38400 tty8
to open getty on tty8. I did telinit q to reload the init config and got
the same thing as described above. After a reboot and leaving the line
intact I could switch to tty8 and be happy.
Again, I ssh'd into the box and opened tty9 via echo... which lead to
the behaviour already described.
This looks to me as if it fails to switch to a tty which was not
allocated before.
Thanks for looking into this,
Wolfi
[-- Attachment #2: Digital signature --]
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^ permalink raw reply
* Re: ppc32: Rework power management take #3
From: Benjamin Herrenschmidt @ 2005-06-06 11:38 UTC (permalink / raw)
To: Wolfram Quester; +Cc: linuxppc-dev list, debian-powerpc@lists.debian.org
In-Reply-To: <20050606093411.GB3478@halley.zuhause>
> This looks to me as if it fails to switch to a tty which was not
> allocated before.
There is a known issue with "creating" a new tty vs. X that I though was
fixed, but may be still lurking around with nvidia stuff, I'll be
looking at it. Thanks.
Ben.
^ permalink raw reply
* Re: Help on the data rate on MPC5200 ethernet
From: Minh Nguyen @ 2005-06-06 12:57 UTC (permalink / raw)
To: Jarno Manninen; +Cc: linuxppc-embedded
In-Reply-To: <200506052229.44170.jarno.manninen@tut.fi>
Use iperf. You can find the source code at http://dast.nlanr.net/Projects/I=
perf/
mkt
On 6/5/05, Jarno Manninen <jarno.manninen@tut.fi> wrote:
> On Sunday 05 June 2005 17:09, xuetao wrote:
>=20
> > I am testing the tcp/ip data communication data rate on MPC5200. The UD=
P
> > data rate is up to 80Mbps and TCP data rate is only 10Mbps? I test the =
TCP
> > data rate with FTP file traslation. Any body know the problem on this?
>=20
> The mass storage may be the limiting factor here, ofcourse depending on y=
our
> configuration. Anyhow I've found NTTCP test utility usefull for simple
> testing purposes. There's propably some other test suites floating around
> too.
>=20
> - Jarno
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
^ permalink raw reply
* Subject: PPC8272 - FCC2 transmitter underrun
From: Udi Rasiuk @ 2005-06-06 14:17 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 885 bytes --]
Subject: PPC8272 - FCC2 transmitter underrun
Description: On a board with PPC8272 we get "transmitter underrun" interrupt from the FCC2.
The BD and Buffers are on an external RAM on the 60x.
It looks like getting the READY bit in the current BD with a perfectly good Buffer immidiatly brings up the interrupt.
there are two underrun reasons :
1.
If TxBD[L] (last buffer in the frame) is cleared when the end of the BD is reached and the
transmitter moves immediately to the next buffer to begin transmission. Failure to provide the
next buffer in time causes a transmit underrun.
2.
If the CPM is heavy loaded and (because of bus latency) the SDMA cannot fill the FIFO
from external memory, a transmit underrun occurs.
But i've stepped with an ice and checked both -looked at the L bit and halted the cpu right after the setting of the Ready bit.
[-- Attachment #2: Type: text/html, Size: 1557 bytes --]
^ permalink raw reply
* Re: Subject: PPC8272 - FCC2 transmitter underrun
From: Roberto.Waltman @ 2005-06-06 13:33 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: Udi Rasiuk
Udi,
You need to switch your Hebrew email program to Left-to-Right mode if you
expect anyone other than Leonardo DaVinci to read your post. ;-)
Roberto Waltman
RFL Electronics Inc.
^ permalink raw reply
* help with ML300
From: colui77 @ 2005-06-06 14:15 UTC (permalink / raw)
To: linuxppc-embedded
hi,
I'm working with the xilinxs ML300,. My board runs the montavista linux
2.4.21 shipped with the board. Here the xilinx_gpio.o moeule maps only th=
e
GPIO 1. I have downloaded the montavista linux 2.4.30 and I'd like rebuil=
ding
the xilinx_gpio module cause I need the GPIO2. I have substituted the xil=
inx_gpio.o
module on the board with the builded one...but when insmod-ing it I have
the following errors:
unresolved symbol misc_register_R30927432
unresolved symbol misc_deregister_Re3fc4e19
I have no idea about what to do ....
please help me :-(
Luigi
^ permalink raw reply
* Re: [PATCH] [1/2] PM support for Ebony
From: Geoff Levand @ 2005-06-06 13:50 UTC (permalink / raw)
To: Eugene Surovegin; +Cc: Levand, Geoffrey, linuxppc-embedded
In-Reply-To: <20050604005106.GB12513@gate.ebshome.net>
Eugene Surovegin wrote:
> On Fri, Jun 03, 2005 at 04:22:40PM -0700, Geoff Levand wrote:
>
> [snip]
>
>
>>+ /* save current CPM */
>>+ cpm_save_er = mfdcr(DCRN_CPC0_ER);
>>+
>>+ /* save UIC0 enable registers */
>>+ uic_save_er = mfdcr(DCRN_UIC_ER(UIC0));
>>+
>>+#ifdef USE_ETHER_TO_RESUME
>>+ mtdcr(DCRN_UIC_ER(UIC0), UIC0_EIR5_BIT|UIC0_UIC1NC_BIT);
>>+#else
>>+ /* mask UIC0 interrupts, except External Intr #5 */
>>+ mtdcr(DCRN_UIC_ER(UIC0), UIC0_EIR5_BIT);
>>+#endif
>
>
> Why UIC PM code is here and not in ppc4xx_pic.c? I don't think this is
> the right place to mess with UIC registers.
>
Yes, that is resonable. Maybe something like ppc4xx_pic_suspend()
and ppc4xx_pic_resume().
>
>
>>===================================================================
>>--- linux-2.6.12-bhpm.orig/arch/ppc/platforms/4xx/ibm440gp_sleep.S
>
> 2005-06-01 08:52:49.947684744 -0700
>
>>+++ linux-2.6.12-bhpm/arch/ppc/platforms/4xx/ibm440gp_sleep.S
>
> 2005-06-03 16:15:07.000000000 -0700
>
> I think it should be in arch/ppc/syslib not in arch/ppc/platforms/4xx.
>
I was thinking the same...
I want to do some cleanup of the debugging code and reformat the text,
then I'll post a new version with these changes.
-Geoff
^ permalink raw reply
* Re: [UPDATE] Getting ownership for various boards/platforms configs
From: Kumar Gala @ 2005-06-06 15:11 UTC (permalink / raw)
To: Tom Rini, Dan Malek, Linux PPC Embedded list, linuxppc-dev list
In-Reply-To: <1117843012.31082.201.camel@gaston>
The following list of boards/platforms still need some ownership. The
full list is at http://gate.crashing.org/~galak/platform-owners for
review.
adir
bseip
cpci405
ep405
est8260
FADS
hdpu
mbx
mvme5100
pcore
radstone_ppc7d
rpx8260
rpxcllf
rpxlite
- kumar
^ permalink raw reply
* Re: [PATCH] [1/2] PM support for Ebony
From: Geoff Levand @ 2005-06-06 18:05 UTC (permalink / raw)
To: Eugene Surovegin; +Cc: linuxppc-embedded
In-Reply-To: <20050604005106.GB12513@gate.ebshome.net>
Eugene Surovegin wrote:
> On Fri, Jun 03, 2005 at 04:22:40PM -0700, Geoff Levand wrote:
>
> [snip]
>
>
>>+ /* save current CPM */
>>+ cpm_save_er = mfdcr(DCRN_CPC0_ER);
>>+
>>+ /* save UIC0 enable registers */
>>+ uic_save_er = mfdcr(DCRN_UIC_ER(UIC0));
>>+
>>+#ifdef USE_ETHER_TO_RESUME
>>+ mtdcr(DCRN_UIC_ER(UIC0), UIC0_EIR5_BIT|UIC0_UIC1NC_BIT);
>>+#else
>>+ /* mask UIC0 interrupts, except External Intr #5 */
>>+ mtdcr(DCRN_UIC_ER(UIC0), UIC0_EIR5_BIT);
>>+#endif
>
>
> Why UIC PM code is here and not in ppc4xx_pic.c? I don't think this is
> the right place to mess with UIC registers.
>
> [snip]
>
>
>>===================================================================
>>--- linux-2.6.12-bhpm.orig/arch/ppc/platforms/4xx/ibm440gp_sleep.S
>
> 2005-06-01 08:52:49.947684744 -0700
>
>>+++ linux-2.6.12-bhpm/arch/ppc/platforms/4xx/ibm440gp_sleep.S
>
> 2005-06-03 16:15:07.000000000 -0700
>
> I think it should be in arch/ppc/syslib not in arch/ppc/platforms/4xx.
>
Here's a cleaned-up version. I moved ibm440gp_sleep.S into syslib
and put a declaration in ibm440gp_common.h. I also made two new
pm suspend/resume routines in ppc4xx_pic.c.
I was thinking to add a static variable in ppc4xx_pic.c to hold the
state, that way the arch pm code doesn't need to take care of it,
which will make suspend to disk easier since the value will be
saved in the system image. I'm not sure which way to go. Any
comments?
-Geoff
* pm-on-ebony.patch
This patch provides power management support for the IBM PPC440GP Ebony
Reference Platform. The main portion of the patch implements the platform
specific pm_ops structure required by the kernel power management sub-system.
The current implementation only supports suspend-to-memory (PM_SUSPEND_MEM),
though unpublished suspend-to-disk work has been started.
This implementation arranges for the U44 switch on the Ebony platform,
connected to the SMI interrupt handler, to be used as a system resume trigger.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> for CELF
--
Index: linux-2.6.12-bhpm/arch/ppc/platforms/4xx/Kconfig
===================================================================
--- linux-2.6.12-bhpm.orig/arch/ppc/platforms/4xx/Kconfig 2005-06-06 09:29:06.000000000 -0700
+++ linux-2.6.12-bhpm/arch/ppc/platforms/4xx/Kconfig 2005-06-06 09:32:24.000000000 -0700
@@ -214,10 +214,6 @@
depends on 4xx
default y
-config PM
- bool "Power Management support (EXPERIMENTAL)"
- depends on 4xx && EXPERIMENTAL
-
choice
prompt "TTYS0 device and default console"
depends on 40x
Index: linux-2.6.12-bhpm/arch/ppc/platforms/4xx/Makefile
===================================================================
--- linux-2.6.12-bhpm.orig/arch/ppc/platforms/4xx/Makefile 2005-06-06 09:29:06.000000000 -0700
+++ linux-2.6.12-bhpm/arch/ppc/platforms/4xx/Makefile 2005-06-06 09:32:24.000000000 -0700
@@ -25,3 +25,6 @@
obj-$(CONFIG_405EP) += ibm405ep.o
obj-$(CONFIG_405GPR) += ibm405gpr.o
obj-$(CONFIG_VIRTEX_II_PRO) += virtex-ii_pro.o
+ifeq ($(CONFIG_PM),y)
+obj-$(CONFIG_EBONY) += ebony_pm.o
+endif
Index: linux-2.6.12-bhpm/arch/ppc/platforms/4xx/ebony_pm.c
===================================================================
--- linux-2.6.12-bhpm.orig/arch/ppc/platforms/4xx/ebony_pm.c 2005-06-01 08:52:49.947684744 -0700
+++ linux-2.6.12-bhpm/arch/ppc/platforms/4xx/ebony_pm.c 2005-06-06 10:42:42.000000000 -0700
@@ -0,0 +1,192 @@
+/*
+ * ebony_pm.c - This file contains the PM functions for Ebony.
+ *
+ * Copyright 2004,2005 Sony Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/types.h>
+#include <linux/suspend.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <asm/ibm44x.h>
+#include <asm/ppc4xx_pic.h>
+
+#undef DEBUG
+#undef ENABLE_WAKE_ON_LAN
+
+#define IBM_CPM_ALL (IBM_CPM_IIC0 | IBM_CPM_IIC1 | IBM_CPM_PCI | IBM_CPM_CPU \
+ | IBM_CPM_DMA | IBM_CPM_BGO | IBM_CPM_BGI | IBM_CPM_EBC | IBM_CPM_EBM \
+ | IBM_CPM_DMC | IBM_CPM_PLB | IBM_CPM_SRAM | IBM_CPM_PPM \
+ | IBM_CPM_UIC1 | IBM_CPM_GPIO0 | IBM_CPM_UART0 | IBM_CPM_UART1 \
+ | IBM_CPM_UIC0 | IBM_CPM_TMRCLK)
+
+#define UIC0_EIR5_BIT (1<<(31-28)) /* External Intr 5 == SMI */
+#define UIC0_UIC1NC_BIT (1<<(31-30))
+
+#if defined(DEBUG)
+#define tm_printk(...) __tm_printk(__VA_ARGS__)
+static int
+__tm_printk (const char *fmt, ...)
+{
+ char buf[512];
+ va_list args;
+ int i;
+ unsigned long long tt;
+ unsigned long us, ms;
+
+ tt = sched_clock();
+ ms = tt >> 10; /* convert to usec */
+ us = ms % 1000;
+ ms = ms / 1000;
+
+ i = sprintf(buf, "%6.6lu.%3.3lums:", ms,us);
+ va_start(args, fmt);
+ i = vsnprintf(buf+i, sizeof(buf)-i, fmt, args);
+ va_end(args);
+ printk(buf);
+
+ return i;
+}
+static inline void
+serial8250_suspend_port_busy (int line) {return;}
+static inline void
+serial8250_resume_port_busy (int line) {return;}
+#else
+#define tm_printk(...) (void)(0)
+static inline void
+serial8250_suspend_port_busy (int line) {return;}
+static inline void
+serial8250_resume_port_busy (int line) {return;}
+#endif
+
+static int
+ebony_pm_enter (suspend_state_t state)
+{
+ u32 pic_state;
+ u32 save_msr;
+ u32 cpm_save_er;
+ u32 cpm_er;
+
+ if (state != PM_SUSPEND_MEM)
+ return -EINVAL;
+
+ /* Save MSR and Stop all interrupts */
+ save_msr = mfmsr();
+ _nmask_and_or_msr((MSR_CE|MSR_EE), 0);
+
+ /* save current CPM */
+ cpm_save_er = mfdcr(DCRN_CPC0_ER);
+
+#if !defined(ENABLE_WAKE_ON_LAN)
+ ppc4xx_pic_suspend(UIC0_EIR5_BIT, &pic_state);
+
+ /* set up CPM */
+ cpm_er = IBM_CPM_ALL & ~IBM_CPM_UIC0;
+#else
+ ppc4xx_pic_suspend(UIC0_EIR5_BIT | UIC0_UIC1NC_BIT, &pic_state);
+
+ /* set up CPM */
+ cpm_er = IBM_CPM_ALL & ~(IBM_CPM_UIC0 | CPM_UIC1);
+#endif
+
+ tm_printk("UIC0_ER: 0x%8.8x -> 0x%8.8x\n", pic_state,
+ mfdcr(DCRN_UIC_ER(UIC0)));
+ tm_printk("UIC0_SR: 0x%8.8x\n", mfdcr(DCRN_UIC_SR(UIC0)));
+ tm_printk("CPM_ER: 0x%8.8x\n", cpm_er);
+ tm_printk("SLEEP\n");
+
+ /* for late printk on serial console */
+ serial8250_suspend_port_busy(0);
+
+ /* Enable interrupts and Enter SLEEP mode */
+ ibm440gp_sleep(cpm_er, (MSR_EE|MSR_WE));
+
+ /* Stop all interrupts, again */
+ _nmask_and_or_msr((MSR_CE|MSR_EE), 0);
+
+ /* Restore CPM. Need to do before resume serials */
+ mtdcr(DCRN_CPC0_ER, cpm_save_er);
+
+ /* for early printk on serial console */
+ serial8250_resume_port_busy(0);
+
+ tm_printk("WAKEUP\n");
+
+ ppc4xx_pic_resume(pic_state);
+
+ /* Restore MSR */
+ mtmsr(save_msr);
+
+ return 0;
+}
+
+static int
+ebony_pm_prepare (suspend_state_t state)
+{
+ if (state != PM_SUSPEND_MEM)
+ return -EINVAL;
+
+ return 0;
+}
+
+static int
+ebony_pm_finish (suspend_state_t state)
+{
+ return 0;
+}
+
+static struct pm_ops ebony_pm_ops = {
+ .pm_disk_mode = PM_DISK_FIRMWARE,
+ .prepare = ebony_pm_prepare,
+ .enter = ebony_pm_enter,
+ .finish = ebony_pm_finish,
+};
+
+static int __init
+ebony_pm_init (void)
+{
+ pm_set_ops(&ebony_pm_ops);
+ return 0;
+}
+
+late_initcall(ebony_pm_init);
+
+/*
+ * Use SMI handler for resume
+ */
+
+#define PPC440GP_EXT_INT5_INTR 28 /* See ebony.c */
+
+static irqreturn_t
+smi_handler (int cpl, void *dev_id, struct pt_regs *regs)
+{
+ tm_printk("SMI INTR\n");
+ return IRQ_HANDLED;
+}
+
+static int __init
+init_smi (void)
+{
+ if (request_irq(PPC440GP_EXT_INT5_INTR, smi_handler, SA_INTERRUPT,
+ "SMI", NULL)) {
+ printk(KERN_ERR "SMI: cannot register IRQ:%d\n",
+ PPC440GP_EXT_INT5_INTR);
+ return -EIO;
+ }
+ return 0;
+}
+
+late_initcall(init_smi);
Index: linux-2.6.12-bhpm/arch/ppc/syslib/Makefile
===================================================================
--- linux-2.6.12-bhpm.orig/arch/ppc/syslib/Makefile 2005-06-06 09:31:48.000000000 -0700
+++ linux-2.6.12-bhpm/arch/ppc/syslib/Makefile 2005-06-06 09:32:24.000000000 -0700
@@ -11,7 +11,7 @@
obj-$(CONFIG_PPC_OCP) += ocp.o
obj-$(CONFIG_IBM_OCP) += ibm_ocp.o
obj-$(CONFIG_44x) += ibm44x_common.o
-obj-$(CONFIG_440GP) += ibm440gp_common.o
+obj-$(CONFIG_440GP) += ibm440gp_common.o ibm440gp_sleep.o
obj-$(CONFIG_440GX) += ibm440gx_common.o
obj-$(CONFIG_440SP) += ibm440gx_common.o ibm440sp_common.o
ifeq ($(CONFIG_4xx),y)
Index: linux-2.6.12-bhpm/arch/ppc/syslib/ibm440gp_common.h
===================================================================
--- linux-2.6.12-bhpm.orig/arch/ppc/syslib/ibm440gp_common.h 2005-06-06 09:29:06.000000000 -0700
+++ linux-2.6.12-bhpm/arch/ppc/syslib/ibm440gp_common.h 2005-06-06 09:32:24.000000000 -0700
@@ -29,6 +29,7 @@
*/
void ibm440gp_get_clocks(struct ibm44x_clocks*, unsigned int sys_clk,
unsigned int ser_clk) __init;
+void ibm440gp_sleep(u32 cpc0_er_val, u32 msr_or_val);
#endif /* __ASSEMBLY__ */
#endif /* __PPC_SYSLIB_IBM440GP_COMMON_H */
Index: linux-2.6.12-bhpm/arch/ppc/syslib/ibm440gp_sleep.S
===================================================================
--- linux-2.6.12-bhpm.orig/arch/ppc/syslib/ibm440gp_sleep.S 2005-06-01 08:52:49.947684744 -0700
+++ linux-2.6.12-bhpm/arch/ppc/syslib/ibm440gp_sleep.S 2005-06-06 09:32:24.000000000 -0700
@@ -0,0 +1,45 @@
+/*
+ * ibm440gp_sleep.S - This file contains the sleep function for 440GP CPU.
+ *
+ * Copyright 2004,2005 Sony Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/config.h>
+#include <asm/processor.h>
+#include <asm/ppc_asm.h>
+
+ .text
+
+#if defined(CONFIG_PM)
+
+/*
+ * void ibm440gp_sleep(u32 cpc0_er_val, u32 msr_or_val);
+ * r3: new CPC0_ER value
+ * r4: value to be OR'ed with MSR
+ */
+
+_GLOBAL(ibm440gp_sleep)
+ mfmsr r0
+ or r0,r0,r4
+ sync
+ mtdcr 0xb1,r3 /* 0xb1 = DCRN_CPC0_ER */
+ sync
+ mtmsr r0
+ sync
+
+ blr
+
+#endif /* defined(CONFIG_PM) */
Index: linux-2.6.12-bhpm/include/asm-ppc/ocp.h
===================================================================
--- linux-2.6.12-bhpm.orig/include/asm-ppc/ocp.h 2005-06-06 09:31:47.000000000 -0700
+++ linux-2.6.12-bhpm/include/asm-ppc/ocp.h 2005-06-06 09:32:24.000000000 -0700
@@ -151,13 +151,21 @@
static inline void
ocp_force_power_off(struct ocp_device *odev)
{
+#ifdef CONFIG_44x
+ mtdcr(DCRN_CPC0_FR, mfdcr(DCRN_CPC0_FR) | odev->def->pm);
+#else
mtdcr(DCRN_CPMFR, mfdcr(DCRN_CPMFR) | odev->def->pm);
+#endif
}
static inline void
ocp_force_power_on(struct ocp_device *odev)
{
+#ifdef CONFIG_44x
+ mtdcr(DCRN_CPC0_FR, mfdcr(DCRN_CPC0_FR) & ~odev->def->pm);
+#else
mtdcr(DCRN_CPMFR, mfdcr(DCRN_CPMFR) & ~odev->def->pm);
+#endif
}
#else
#define ocp_force_power_off(x) (void)(x)
* ppc4xx_pic-pm.patch
This patch provides power management support for the IBM PPC4xx interrupt
controllers.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> for CELF
--
Index: linux-2.6.12-bhpm/arch/ppc/syslib/ppc4xx_pic.c
===================================================================
--- linux-2.6.12-bhpm.orig/arch/ppc/syslib/ppc4xx_pic.c 2005-06-06 09:31:45.000000000 -0700
+++ linux-2.6.12-bhpm/arch/ppc/syslib/ppc4xx_pic.c 2005-06-06 10:12:10.000000000 -0700
@@ -245,3 +245,23 @@
ppc_md.get_irq = ppc4xx_pic_get_irq;
}
+
+#if defined(CONFIG_PM)
+
+void ppc4xx_pic_suspend(u32 resume_bits, u32* pic_state)
+{
+ /* save UIC0 enable registers */
+ *pic_state = mfdcr(DCRN_UIC_ER(UIC0));
+
+ /* mask UIC0 interrupts, except resume_bits */
+ mtdcr(DCRN_UIC_ER(UIC0), resume_bits);
+}
+
+void ppc4xx_pic_resume(u32 pic_state)
+{
+ /* Restore UIC0 enable registers */
+ mtdcr(DCRN_UIC_ER(UIC0), pic_state);
+}
+
+#endif /* defined(CONFIG_PM) */
+
Index: linux-2.6.12-bhpm/include/asm-ppc/ppc4xx_pic.h
===================================================================
--- linux-2.6.12-bhpm.orig/include/asm-ppc/ppc4xx_pic.h 2005-06-06 09:31:47.000000000 -0700
+++ linux-2.6.12-bhpm/include/asm-ppc/ppc4xx_pic.h 2005-06-06 09:32:07.000000000 -0700
@@ -49,5 +49,7 @@
};
extern void ppc4xx_pic_init(void);
+void ppc4xx_pic_suspend(u32 resume_bits, u32* pic_state);
+void ppc4xx_pic_resume(u32 pic_state);
#endif /* __PPC4XX_PIC_H__ */
-EOF
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