* mpc82xx FCC patches
From: Allen Curtis @ 2005-06-13 0:29 UTC (permalink / raw)
To: Ppc Embedded
Can someone tell me if this is the latest FCC patch?
http://ozlabs.org/pipermail/linuxppc-embedded/2005-May/018124.html
It appears from the comments that there are a few RFCs outstanding.
^ permalink raw reply
* [PATCH][MM] ppc32: enable rapidio on mpc85xx ads boards
From: Matt Porter @ 2005-06-11 0:18 UTC (permalink / raw)
To: akpm; +Cc: linux-kernel, linuxppc-embedded
Enables RIO on the MPC8540/8560 ADS ref boards. RIO can be used
with a crossover cable between two of them.
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c b/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
+++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
@@ -47,6 +47,8 @@
#include <mm/mmu_decl.h>
+#include <syslib/ppc85xx_rio.h>
+
#include <platforms/85xx/mpc85xx_ads_common.h>
#ifndef CONFIG_PCI
@@ -223,3 +225,11 @@ mpc85xx_exclude_device(u_char bus, u_cha
}
#endif /* CONFIG_PCI */
+
+#ifdef CONFIG_RAPIDIO
+void platform_rio_init(void)
+{
+ /* 512MB RIO LAW at 0xc0000000 */
+ mpc85xx_rio_setup(0xc0000000, 0x20000000);
+}
+#endif /* CONFIG_RAPIDIO */
^ permalink raw reply
* Re: kernel ported from ELDK 3.0 hangs (loops in idled()) on my custom MPC870 Board
From: Edward Hong @ 2005-06-10 21:43 UTC (permalink / raw)
To: Randy Vinson; +Cc: linuxppc-embedded
In-Reply-To: <21fb73bc0506061300126b1c43@mail.gmail.com>
It looks like the BDI2000 debugger caused the problem. The kernel
boots fine after removing the debugger.
Thank you very much for all your replies!
Edward
On 6/6/05, Edward Hong <edward.qin.hong@gmail.com> wrote:
> On 6/6/05, Randy Vinson <rvinson@mvista.com> wrote:
> >
> > Hi Edward,
> > I've seen these symptoms before. The problem was traced to external
> > interrupts being disabled (MSR[EE] not set). Without external
> > interrupts, there is no decrementer interrupt (at least on 7xx
> > processors). Without the decrementer, there in no system clock tick and
> > without the clock tick, the scheduler won't run which means that the
> > init task won't start. To verify that this is the problem, use mfmsr()
> > to get the MSR and print it. I'd suggest that you add something like:
> >
> > printk("MSR =3D %x\n", mfmsr());
> >
> I got MSR =3D 9032 just before cpu_idle which means EE (the most
> significant bit) was enabled.
>=20
> Thank you!
>=20
> Edward
>
^ permalink raw reply
* Re: [PATCH] ppc32: add 405EP cpu_spec entry
From: Linus Torvalds @ 2005-06-10 18:54 UTC (permalink / raw)
To: Andrew Morton; +Cc: linuxppc-embedded
In-Reply-To: <20050610112907.7b566c91.akpm@osdl.org>
On Fri, 10 Jun 2005, Andrew Morton wrote:
>
> > I think Andrew continually thinks it is dropped, because the patch ends up
> > applying again, even though it got applied. So he keeps on re-sending it
> > over and over again ;)
>
> Fault-tolerance!
Indeed.
However, I'm sure there's a better way. For example, something like "try
if the patch applied reversed" might be a good idea to at least mark it
for questioning.
Something like
patch -spfR --dry-run --fuzz=0 < patch
if [ $? -eq 0 ]; then
echo Hmm.. patch might be applied already
exit 1
fi
might be a starting point...
Linus
^ permalink raw reply
* Re: [PATCH] ppc32: add 405EP cpu_spec entry
From: Andrew Morton @ 2005-06-10 18:29 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linuxppc-embedded
In-Reply-To: <Pine.LNX.4.58.0506100932240.2286@ppc970.osdl.org>
Linus Torvalds <torvalds@osdl.org> wrote:
>
> On Fri, 10 Jun 2005, Kumar Gala wrote:
> >
> > You have applied this patch twice now.
>
> Actually, looks like three times ;)
Crap, sorry, that's happened three times now... hmm..
> I think Andrew continually thinks it is dropped, because the patch ends up
> applying again, even though it got applied. So he keeps on re-sending it
> over and over again ;)
Fault-tolerance!
^ permalink raw reply
* [Fwd: [PATCH] ppc32: add Freescale MPC885ADS board support]
From: Andrei Konovalov @ 2005-06-10 17:13 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 1250 bytes --]
Forwarding to the correct address.
-------- Original Message --------
Subject: [PATCH] ppc32: add Freescale MPC885ADS board support
Date: Fri, 10 Jun 2005 21:09:28 +0400
From: Andrei Konovalov <akonovalov@ru.mvista.com>
To: Tom Rini <trini@kernel.crashing.org>
CC: linux-kernel@vger.kernel.org, linuxppc-embedded@lists.linuxppc.org
This patch adds the Freescale MPC885ADS board to 2.6.12-rc6.
The supported devices are two SMC UARTs and 10Mbit ethernet on SCC3.
FEC is not supported as the "combined FCC/FEC ethernet driver" driver
by Pantelis Antoniou (first posted to this list on May 9; I'll
call it "fs_enet" for short) should replace the current FEC driver.
On MPC885ADS SCC ethernet PHY defaults to the full duplex mode
upon reset. SCC is set to half duplex by default. This inconsistency
is not handled by this patch for the following reasons:
- ethernet works anyway (the statistics should look terrible though)
- we are working on a patch to add SCC ehternet support to the fs_enet
driver, and will revisit this full/half duplex issue when moving
the board to the new ethernet driver and platform devices.
Signed-off-by: Yuri Shpilevsky <yshpilevsky@ru.mvista.com>
Signed-off-by: Andrei Konovalov <akonovalov@ru.mvista.com>
[-- Attachment #2: mpc885ads.20050610.diff --]
[-- Type: text/plain, Size: 21403 bytes --]
diff -Nupr -x .git linux-2.5.base/arch/ppc/8xx_io/enet.c linux-2.5.cur/arch/ppc/8xx_io/enet.c
--- linux-2.5.base/arch/ppc/8xx_io/enet.c 2005-05-24 20:11:17.000000000 +0400
+++ linux-2.5.cur/arch/ppc/8xx_io/enet.c 2005-06-10 16:41:24.000000000 +0400
@@ -714,16 +714,24 @@ static int __init scc_enet_init(void)
immap->im_ioport.iop_pcdat &= ~PC_ENET_LBK; /* Disable Loopback */
#endif /* PC_ENET_LBK */
- /* Configure port C pins to enable CLSN and RENA.
+#ifdef PE_ENET_TCLK
+ /* Configure port E for TCLK and RCLK.
*/
- immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA);
- immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
- immap->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA);
-
+ cp->cp_pepar |= (PE_ENET_TCLK | PE_ENET_RCLK);
+ cp->cp_pedir &= ~(PE_ENET_TCLK | PE_ENET_RCLK);
+ cp->cp_peso &= ~(PE_ENET_TCLK | PE_ENET_RCLK);
+#else
/* Configure port A for TCLK and RCLK.
*/
immap->im_ioport.iop_papar |= (PA_ENET_TCLK | PA_ENET_RCLK);
immap->im_ioport.iop_padir &= ~(PA_ENET_TCLK | PA_ENET_RCLK);
+#endif
+
+ /* Configure port C pins to enable CLSN and RENA.
+ */
+ immap->im_ioport.iop_pcpar &= ~(PC_ENET_CLSN | PC_ENET_RENA);
+ immap->im_ioport.iop_pcdir &= ~(PC_ENET_CLSN | PC_ENET_RENA);
+ immap->im_ioport.iop_pcso |= (PC_ENET_CLSN | PC_ENET_RENA);
/* Configure Serial Interface clock routing.
* First, clear all SCC bits to zero, then set the ones we want.
@@ -896,14 +904,18 @@ static int __init scc_enet_init(void)
/* It is now OK to enable the Ethernet transmitter.
* Unfortunately, there are board implementation differences here.
*/
-#if (!defined (PB_ENET_TENA) && defined (PC_ENET_TENA))
+#if (!defined (PB_ENET_TENA) && defined (PC_ENET_TENA) && !defined (PE_ENET_TENA))
immap->im_ioport.iop_pcpar |= PC_ENET_TENA;
immap->im_ioport.iop_pcdir &= ~PC_ENET_TENA;
-#elif ( defined (PB_ENET_TENA) && !defined (PC_ENET_TENA))
+#elif ( defined (PB_ENET_TENA) && !defined (PC_ENET_TENA) && !defined (PE_ENET_TENA))
cp->cp_pbpar |= PB_ENET_TENA;
cp->cp_pbdir |= PB_ENET_TENA;
+#elif ( !defined (PB_ENET_TENA) && !defined (PC_ENET_TENA) && defined (PE_ENET_TENA))
+ cp->cp_pepar |= PE_ENET_TENA;
+ cp->cp_pedir &= ~PE_ENET_TENA;
+ cp->cp_peso |= PE_ENET_TENA;
#else
-#error Configuration Error: define exactly ONE of PB_ENET_TENA, PC_ENET_TENA
+#error Configuration Error: define exactly ONE of PB_ENET_TENA, PC_ENET_TENA, PE_ENET_TENA
#endif
#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
@@ -956,6 +968,19 @@ static int __init scc_enet_init(void)
return err;
}
+#ifdef CONFIG_MPC885ADS
+
+ /* Deassert PHY reset and enable the PHY.
+ */
+ *((volatile uint *)BCSR4) |= BCSR4_ETH10_RST;
+ *((volatile uint *)BCSR1) |= BCSR1_ETHEN;
+
+ /* On MPC885ADS SCC ethernet PHY defaults to the full duplex mode
+ * upon reset. SCC is set to half duplex by default. So this
+ * inconsistency should be better fixed by the software.
+ */
+#endif
+
/* And last, enable the transmit and receive processing.
*/
sccp->scc_gsmrl |= (SCC_GSMRL_ENR | SCC_GSMRL_ENT);
@@ -969,3 +994,4 @@ static int __init scc_enet_init(void)
}
module_init(scc_enet_init);
+
diff -Nupr -x .git linux-2.5.base/arch/ppc/configs/mpc885ads_defconfig linux-2.5.cur/arch/ppc/configs/mpc885ads_defconfig
--- linux-2.5.base/arch/ppc/configs/mpc885ads_defconfig 1970-01-01 03:00:00.000000000 +0300
+++ linux-2.5.cur/arch/ppc/configs/mpc885ads_defconfig 2005-06-09 21:17:29.000000000 +0400
@@ -0,0 +1,622 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.12-rc6
+# Thu Jun 9 21:17:29 2005
+#
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_PPC=y
+CONFIG_PPC32=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+# CONFIG_CLEAN_COMPILE is not set
+CONFIG_BROKEN=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+# CONFIG_SWAP is not set
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+CONFIG_HOTPLUG=y
+CONFIG_KOBJECT_UEVENT=y
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+# CONFIG_KALLSYMS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+# CONFIG_EPOLL is not set
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+
+#
+# Loadable module support
+#
+# CONFIG_MODULES is not set
+
+#
+# Processor
+#
+# CONFIG_6xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_POWER3 is not set
+# CONFIG_POWER4 is not set
+CONFIG_8xx=y
+# CONFIG_E500 is not set
+# CONFIG_MATH_EMULATION is not set
+# CONFIG_CPU_FREQ is not set
+CONFIG_EMBEDDEDBOOT=y
+# CONFIG_PM is not set
+CONFIG_NOT_COHERENT_CACHE=y
+
+#
+# Platform options
+#
+# CONFIG_RPXLITE is not set
+# CONFIG_RPXCLASSIC is not set
+# CONFIG_BSEIP is not set
+# CONFIG_FADS is not set
+CONFIG_MPC885ADS=y
+# CONFIG_TQM823L is not set
+# CONFIG_TQM850L is not set
+# CONFIG_TQM855L is not set
+# CONFIG_TQM860L is not set
+# CONFIG_FPS850L is not set
+# CONFIG_SPD823TS is not set
+# CONFIG_IVMS8 is not set
+# CONFIG_IVML24 is not set
+# CONFIG_SM850 is not set
+# CONFIG_HERMES_PRO is not set
+# CONFIG_IP860 is not set
+# CONFIG_LWMON is not set
+# CONFIG_PCU_E is not set
+# CONFIG_CCM is not set
+# CONFIG_LANTEC is not set
+# CONFIG_MBX is not set
+# CONFIG_WINCEPT is not set
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_CMDLINE_BOOL is not set
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+# CONFIG_PCI is not set
+# CONFIG_PCI_DOMAINS is not set
+# CONFIG_PCI_QSPAN is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x00400000
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_RAM is not set
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_LBD is not set
+# CONFIG_CDROM_PKTCDVD is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_SCSI is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_OAKNET is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+
+#
+# Ethernet (10000 Mbit)
+#
+
+#
+# Token Ring devices
+#
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+CONFIG_PPP=y
+# CONFIG_PPP_MULTILINK is not set
+# CONFIG_PPP_FILTER is not set
+CONFIG_PPP_ASYNC=y
+CONFIG_PPP_SYNC_TTY=y
+CONFIG_PPP_DEFLATE=y
+# CONFIG_PPP_BSDCOMP is not set
+# CONFIG_PPPOE is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_CPM=y
+CONFIG_SERIAL_CPM_CONSOLE=y
+# CONFIG_SERIAL_CPM_SCC1 is not set
+# CONFIG_SERIAL_CPM_SCC2 is not set
+# CONFIG_SERIAL_CPM_SCC3 is not set
+# CONFIG_SERIAL_CPM_SCC4 is not set
+CONFIG_SERIAL_CPM_SMC1=y
+CONFIG_SERIAL_CPM_SMC2=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_LEGACY_PTYS is not set
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+# CONFIG_USB_ARCH_HAS_HCD is not set
+# CONFIG_USB_ARCH_HAS_OHCI is not set
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+CONFIG_EXT2_FS_XATTR=y
+# CONFIG_EXT2_FS_POSIX_ACL is not set
+# CONFIG_EXT2_FS_SECURITY is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+
+#
+# XFS support
+#
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+# CONFIG_DNOTIFY is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+# CONFIG_PROC_KCORE is not set
+CONFIG_SYSFS=y
+# CONFIG_DEVFS_FS is not set
+# CONFIG_DEVPTS_FS_XATTR is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLBFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# MPC8xx CPM Options
+#
+CONFIG_SCC_ENET=y
+# CONFIG_SCC1_ENET is not set
+# CONFIG_SCC2_ENET is not set
+CONFIG_SCC3_ENET=y
+# CONFIG_FEC_ENET is not set
+# CONFIG_ENET_BIG_BUFFERS is not set
+
+#
+# Generic MPC8xx Options
+#
+CONFIG_8xx_COPYBACK=y
+CONFIG_8xx_CPU6=y
+CONFIG_NO_UCODE_PATCH=y
+# CONFIG_USB_SOF_UCODE_PATCH is not set
+# CONFIG_I2C_SPI_UCODE_PATCH is not set
+# CONFIG_I2C_SPI_SMC1_UCODE_PATCH is not set
+
+#
+# Library routines
+#
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC32 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+# CONFIG_DEBUG_KERNEL is not set
+CONFIG_LOG_BUF_SHIFT=14
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Hardware crypto devices
+#
diff -Nupr -x .git linux-2.5.base/arch/ppc/Kconfig linux-2.5.cur/arch/ppc/Kconfig
--- linux-2.5.base/arch/ppc/Kconfig 2005-06-03 14:11:55.000000000 +0400
+++ linux-2.5.cur/arch/ppc/Kconfig 2005-06-09 16:50:09.000000000 +0400
@@ -379,6 +379,14 @@ config BSEIP
config FADS
bool "FADS"
+config MPC885ADS
+ bool "MPC885ADS"
+ help
+ Freescale Semiconductor MPC885 Application Development System (ADS).
+ Also known as DUET.
+ The MPC885ADS is meant to serve as a platform for s/w and h/w
+ development around the MPC885 processor family.
+
config TQM823L
bool "TQM823L"
help
diff -Nupr -x .git linux-2.5.base/arch/ppc/platforms/mpc885ads.h linux-2.5.cur/arch/ppc/platforms/mpc885ads.h
--- linux-2.5.base/arch/ppc/platforms/mpc885ads.h 1970-01-01 03:00:00.000000000 +0300
+++ linux-2.5.cur/arch/ppc/platforms/mpc885ads.h 2005-06-10 16:46:03.000000000 +0400
@@ -0,0 +1,92 @@
+/*
+ * A collection of structures, addresses, and values associated with
+ * the Freescale MPC885ADS board.
+ * Copied from the FADS stuff.
+ *
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * 2005 (c) MontaVista Software, Inc. This file is licensed under the
+ * terms of the GNU General Public License version 2. This program is licensed
+ * "as is" without any warranty of any kind, whether express or implied.
+ */
+
+#ifdef __KERNEL__
+#ifndef __ASM_MPC885ADS_H__
+#define __ASM_MPC885ADS_H__
+
+#include <linux/config.h>
+
+#include <asm/ppcboot.h>
+
+/* U-Boot maps BCSR to 0xff080000 */
+#define BCSR_ADDR ((uint)0xff080000)
+#define BCSR_SIZE ((uint)(64 * 1024))
+#define BCSR0 ((uint)(BCSR_ADDR + 0x00))
+#define BCSR1 ((uint)(BCSR_ADDR + 0x04))
+#define BCSR2 ((uint)(BCSR_ADDR + 0x08))
+#define BCSR3 ((uint)(BCSR_ADDR + 0x0c))
+#define BCSR4 ((uint)(BCSR_ADDR + 0x10))
+
+#define CFG_PHYDEV_ADDR ((uint)0xff0a0000)
+#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300))
+
+#define IMAP_ADDR ((uint)0xff000000)
+#define IMAP_SIZE ((uint)(64 * 1024))
+
+#define PCMCIA_MEM_ADDR ((uint)0xff020000)
+#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
+
+/* Bits of interest in the BCSRs.
+ */
+#define BCSR1_ETHEN ((uint)0x20000000)
+#define BCSR1_IRDAEN ((uint)0x10000000)
+#define BCSR1_RS232EN_1 ((uint)0x01000000)
+#define BCSR1_PCCEN ((uint)0x00800000)
+#define BCSR1_PCCVCC0 ((uint)0x00400000)
+#define BCSR1_PCCVPP0 ((uint)0x00200000)
+#define BCSR1_PCCVPP1 ((uint)0x00100000)
+#define BCSR1_PCCVPP_MASK (BCSR1_PCCVPP0 | BCSR1_PCCVPP1)
+#define BCSR1_RS232EN_2 ((uint)0x00040000)
+#define BCSR1_PCCVCC1 ((uint)0x00010000)
+#define BCSR1_PCCVCC_MASK (BCSR1_PCCVCC0 | BCSR1_PCCVCC1)
+
+#define BCSR4_ETH10_RST ((uint)0x80000000) /* 10Base-T PHY reset*/
+#define BCSR4_USB_LO_SPD ((uint)0x04000000)
+#define BCSR4_USB_VCC ((uint)0x02000000)
+#define BCSR4_USB_FULL_SPD ((uint)0x00040000)
+#define BCSR4_USB_EN ((uint)0x00020000)
+
+#define BCSR5_MII2_EN 0x40
+#define BCSR5_MII2_RST 0x20
+#define BCSR5_T1_RST 0x10
+#define BCSR5_ATM155_RST 0x08
+#define BCSR5_ATM25_RST 0x04
+#define BCSR5_MII1_EN 0x02
+#define BCSR5_MII1_RST 0x01
+
+/* Interrupt level assignments */
+#define PHY_INTERRUPT SIU_IRQ7 /* PHY link change interrupt */
+#define SIU_INT_FEC1 SIU_LEVEL1 /* FEC1 interrupt */
+#define SIU_INT_FEC2 SIU_LEVEL3 /* FEC2 interrupt */
+#define FEC_INTERRUPT SIU_INT_FEC1 /* FEC interrupt */
+
+/* We don't use the 8259 */
+#define NR_8259_INTS 0
+
+/* CPM Ethernet through SCC3 */
+#define PA_ENET_RXD ((ushort)0x0040)
+#define PA_ENET_TXD ((ushort)0x0080)
+#define PE_ENET_TCLK ((uint)0x00004000)
+#define PE_ENET_RCLK ((uint)0x00008000)
+#define PE_ENET_TENA ((uint)0x00000010)
+#define PC_ENET_CLSN ((ushort)0x0400)
+#define PC_ENET_RENA ((ushort)0x0800)
+
+/* Control bits in the SICR to route TCLK (CLK5) and RCLK (CLK6) to
+ * SCC3. Also, make sure GR3 (bit 8) and SC3 (bit 9) are zero */
+#define SICR_ENET_MASK ((uint)0x00ff0000)
+#define SICR_ENET_CLKRT ((uint)0x002c0000)
+
+#endif /* __ASM_MPC885ADS_H__ */
+#endif /* __KERNEL__ */
diff -Nupr -x .git linux-2.5.base/arch/ppc/syslib/m8xx_setup.c linux-2.5.cur/arch/ppc/syslib/m8xx_setup.c
--- linux-2.5.base/arch/ppc/syslib/m8xx_setup.c 2005-05-24 20:11:22.000000000 +0400
+++ linux-2.5.cur/arch/ppc/syslib/m8xx_setup.c 2005-06-09 16:55:33.000000000 +0400
@@ -369,7 +369,7 @@ m8xx_map_io(void)
#if defined(CONFIG_HTDMSOUND) || defined(CONFIG_RPXTOUCH) || defined(CONFIG_FB_RPX)
io_block_mapping(HIOX_CSR_ADDR, HIOX_CSR_ADDR, HIOX_CSR_SIZE, _PAGE_IO);
#endif
-#ifdef CONFIG_FADS
+#if defined(CONFIG_FADS) || defined(CONFIG_MPC885ADS)
io_block_mapping(BCSR_ADDR, BCSR_ADDR, BCSR_SIZE, _PAGE_IO);
#endif
#ifdef CONFIG_PCI
diff -Nupr -x .git linux-2.5.base/drivers/serial/cpm_uart/cpm_uart_cpm1.c linux-2.5.cur/drivers/serial/cpm_uart/cpm_uart_cpm1.c
--- linux-2.5.base/drivers/serial/cpm_uart/cpm_uart_cpm1.c 2005-05-24 20:12:06.000000000 +0400
+++ linux-2.5.cur/drivers/serial/cpm_uart/cpm_uart_cpm1.c 2005-06-09 16:50:34.000000000 +0400
@@ -94,12 +94,28 @@ void smc1_lineif(struct uart_cpm_port *p
((immap_t *)IMAP_ADDR)->im_ioport.iop_paodr &= ~iobits;
}
+#ifdef CONFIG_MPC885ADS
+ /* Enable SMC1 transceivers */
+ *((volatile uint *)BCSR1) &= ~BCSR1_RS232EN_1;
+#endif
+
pinfo->brg = 1;
}
void smc2_lineif(struct uart_cpm_port *pinfo)
{
- /* XXX SMC2: insert port configuration here */
+#ifdef CONFIG_MPC885ADS
+ volatile cpm8xx_t *cp = cpmp;
+
+ cp->cp_pepar |= 0x00000c00;
+ cp->cp_pedir &= 0x00000c00;
+ cp->cp_peso &= ~0x00000400;
+ cp->cp_peso |= 0x00000800;
+
+ /* Enable SMC2 transceivers */
+ *((volatile uint *)BCSR1) &= ~BCSR1_RS232EN_2;
+#endif
+
pinfo->brg = 2;
}
diff -Nupr -x .git linux-2.5.base/include/asm-ppc/mpc8xx.h linux-2.5.cur/include/asm-ppc/mpc8xx.h
--- linux-2.5.base/include/asm-ppc/mpc8xx.h 2005-05-24 20:12:29.000000000 +0400
+++ linux-2.5.cur/include/asm-ppc/mpc8xx.h 2005-06-09 16:54:16.000000000 +0400
@@ -68,6 +68,10 @@
#include <platforms/lantec.h>
#endif
+#if defined(CONFIG_MPC885ADS)
+#include <platforms/mpc885ads.h>
+#endif
+
/* Currently, all 8xx boards that support a processor to PCI/ISA bridge
* use the same memory map.
*/
^ permalink raw reply
* Re: [PATCH] ppc32: add 405EP cpu_spec entry
From: Linus Torvalds @ 2005-06-10 16:34 UTC (permalink / raw)
To: Kumar Gala; +Cc: Andrew Morton, Linux PPC Embedded list
In-Reply-To: <27777aec8e616a79f994dca2935e26a7@freescale.com>
On Fri, 10 Jun 2005, Kumar Gala wrote:
>
> You have applied this patch twice now.
Actually, looks like three times ;)
I think Andrew continually thinks it is dropped, because the patch ends up
applying again, even though it got applied. So he keeps on re-sending it
over and over again ;)
Andrew, I'll remove two extra copies. You please remove that patch from
your queue..
Linus
^ permalink raw reply
* Re: MPC52xx: sysfs failure on adding new device driver
From: Grant Likely @ 2005-06-10 16:06 UTC (permalink / raw)
To: Sylvain Munaut; +Cc: linuxppc-embedded
In-Reply-To: <42A99F1C.50104@246tNt.com>
On 6/10/05, Sylvain Munaut <tnt@246tnt.com> wrote:
> Hi Grant
>=20
> > + /* Assign driver names to PSC devices */
> > + ppc_sys_platform_devices[MPC52xx_PSC1].name =3D "mpc52xx-psc.uart=
";
> > + ppc_sys_platform_devices[MPC52xx_PSC2].name =3D "mpc52xx-psc.uart=
";
> > + ppc_sys_platform_devices[MPC52xx_PSC3].name =3D "mpc52xx-psc.spi"=
;
>=20
> Yes, I kinda like that. That maybe the cleanest way, just 1 line of code
> per device and when no subfn is assigned, nothing is loaded.
>=20
> I don't really like messing manually with the ppc_sys_platform
> "internals" outside of the ppc_sys code, but maybe creating a call like
>=20
> ppc_sys_assign_subfn(MPC52xx_PSC1,"uart");
>=20
>=20
> and place it in the ppc_sys code so that other platforms havin such
> "multi usage" device all have an uniform way of handling that. Galak ?
Hmm, yes... I like this better. I was also uncomfortable with
messing with the table directly. A function like that can make sure
that the table is not modified after it is registered with the
platform bus; or if it is, make sure that a driver has not yet been
assigned and that sysfs is properly updated. It would protect against
doing something stupid like:
ppc_sys_platform_devices[MPC52xx_MSCAN1].name =3D "mpc52xx-psc.uart";
g.
^ permalink raw reply
* Re: [PATCH] ppc32: add 405EP cpu_spec entry
From: Kumar Gala @ 2005-06-10 15:24 UTC (permalink / raw)
To: Linus Torvalds; +Cc: Andrew Morton, Linux PPC Embedded list
In-Reply-To: <20050607012009.GB16387@gate.ebshome.net>
Linus,
You have applied this patch twice now.
- kumar
On Jun 6, 2005, at 8:20 PM, Eugene Surovegin wrote:
> Andrew,
>
> the following patch adds definition for PPC 405EP which was lost
> somehow during 2.4 -> 2.6 transition.
>
> Recent change to arch/ppc/kernel/misc.S ("Fix incorrect CPU_FTR fixup
> usage for unified caches") triggered this bug and 405EP boards don't
> boot anymore.
>
> Please, consider applying this patch before 2.6.12 release.
>
> Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
>
> diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c
> --- a/arch/ppc/kernel/cputable.c
> +++ b/arch/ppc/kernel/cputable.c
> @@ -838,6 +838,17 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> },
> + { /* 405EP */
> + .pvr_mask = 0xffff0000,
> + .pvr_value = 0x51210000,
> + .cpu_name = "405EP",
> + .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
> + CPU_FTR_USE_TB,
> + .cpu_user_features = PPC_FEATURE_32 |
> + PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
> + .icache_bsize = 32,
> + .dcache_bsize = 32,
> + },
>
> #endif /* CONFIG_40x */
> #ifdef CONFIG_44x
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
^ permalink raw reply
* RE: boot time scheduling hile atomic
From: Rune Torgersen @ 2005-06-10 14:23 UTC (permalink / raw)
To: linuxppc-dev list
Any patch forthcomming soon?=20
> -----Original Message-----
> From: linuxppc-dev-bounces@ozlabs.org=20
> [mailto:linuxppc-dev-bounces@ozlabs.org] On Behalf Of=20
> Benjamin Herrenschmidt
> Sent: Wednesday, March 16, 2005 16:29
> To: Takeharu KATO
> Cc: linuxppc-dev list
> Subject: Re: boot time scheduling hile atomic
>=20
> On Wed, 2005-03-16 at 23:07 +0900, Takeharu KATO wrote:
> > Hi Benjamin:
> >=20
> > I can not figure out why my previous patch is more preferable than
> > later one.
> > Could you explain the reason of that please.
>=20
> There may be other kernel bits calling syscall, it sounds saner to
> always make sure we don't reschedule when in atomic (though=20
> it's dubious
> that it's allowed to do syscalls in atomic regions, let's be safe
> there).
>=20
> In fact, we are thinking about consolidating the syscall=20
> return path and
> the normal irq return path like we did on ppc64.
>=20
> Ben.
>=20
>=20
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>=20
>=20
^ permalink raw reply
* Re: MPC52xx: sysfs failure on adding new device driver
From: Sylvain Munaut @ 2005-06-10 14:09 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-embedded
In-Reply-To: <528646bc050609114857191ca7@mail.gmail.com>
Hi Grant
> In the mean time, here's another option: Leave
> arch/ppc/syslib/mpc52xx_devices.c alone, but modify the table in the
> board setup code to assign specific drivers to the PSC devices before
> the table is parsed by the platform bus. This has the added advantage
> of eliminating the need for mpc52xx_match_psc_function() and it's
> cousins.
> + /* Assign driver names to PSC devices */
> + ppc_sys_platform_devices[MPC52xx_PSC1].name = "mpc52xx-psc.uart";
> + ppc_sys_platform_devices[MPC52xx_PSC2].name = "mpc52xx-psc.uart";
> + ppc_sys_platform_devices[MPC52xx_PSC3].name = "mpc52xx-psc.spi";
Yes, I kinda like that. That maybe the cleanest way, just 1 line of code
per device and when no subfn is assigned, nothing is loaded.
I don't really like messing manually with the ppc_sys_platform
"internals" outside of the ppc_sys code, but maybe creating a call like
ppc_sys_assign_subfn(MPC52xx_PSC1,"uart");
and place it in the ppc_sys code so that other platforms havin such
"multi usage" device all have an uniform way of handling that. Galak ?
Sylvain
^ permalink raw reply
* Re: consistent_alloc() on 82xx
From: Alex Zeffertt @ 2005-06-10 10:11 UTC (permalink / raw)
To: Dan Malek; +Cc: linuxppc-embedded
In-Reply-To: <fca77c4d1cd82ed8cfec528acdb6c2cb@embeddededge.com>
Hi Dan,
>
> You need to be more clear with your terms. Only the 60x core
> "uses" the cache. The CPM is a DMA device that can utilize
> cache coherency protocols if you enable that with the GBL flags.
>
Ah, I see. If the CPM DMA is configured to "snoop" the cache then that
doesn't mean it "uses" the cache - it just tells the cache when data
needs to flush - namely before DMA writes.
> > I have seen this causing problems. When I map a VPI/VCI to a
> > connection
> > table using the address compression table,
>
> Where are you placing the VP-level and VC-level tables? I assume
> you are properly configuring the GMODE to indicate their locations?
> Does it work properly if the tables are in DP RAM?
>
I've got the VP-level tables in DPRAM (as recommended by the UM) and the
VC-level tables in external memory (as required by UM). The EVPT bit in
GMODE is cleared to indicate VP tables in DPRAM.
The first few cells received after writing the mapping are
definitely going to the raw cell queue. This doesn't happen if I flush
the cache line following core writes to the VC-level table. This
suggests to me that the CPM DMA is not employing the cache coherency
protocol when accessing the address compression tables. This is not a
surprise since the UM only claims to be able to do "snooping" for
buffers, BDs, and interrupt tables.
> > With external connection tables the problem is more severe.
>
> There are some very subtle assumptions made by the ATM
> controller regarding all channel data structures. There aren't
> configuration location flags for every level of table, and assumptions
> are made that tables for a connection are either internal or
> external. Be careful with that. I either entirely use DP RAM for
> everything or external memory for everything, which seemed
> to work for me in the past. Maybe I was just lucky :-)
The UM definitely claims you can have a mixture of internal channels and
external channels. If you want a lot of simultaneous channels open you
are forced to use both since the number of internal channels is limited
by (a) the amount of DPRAM available, and (b) the design limit of 256.
>
> > .... During
> > frame transmission, the core is constantly having to read and write
> > to the Transmit Connection Table in order to use Auto-VC-ofF. I
> > couldn't get this to work until I added lots of
> > "invalidate_dcache_range" and"flush_dcache_range" calls.
>
> Are you sure this is really a cache problem and not a race condition
> with CPM access to the CTs? The CPM does atomic burst read/write
> of the RCT/TCT entries, and buy doing cache flush operations, the
> 60x core does the same.
>
Well it looks to me that for address compression tables and external
connection tables the CPM DMA is not employing it's cache coherency
mechanisms. This mechanism probably just boils down to the CPM saying
to the cache "I want to write to ptr, please flush any pending writes
then invalidate the line". By adding calls to
flush/invalidate_dcache_range in my code I am doing the cache coherency
mechanism in software instead. It would be a lot easier though if I
could just allocate uncached memory....
Thanks for your help,
Alex
^ permalink raw reply
* 8272ADS board support in 2.6.11
From: Rupesh S @ 2005-06-10 9:08 UTC (permalink / raw)
To: linuxppc-embedded
I have been using 2.6.6 kernel with patch, (linux-2_6_6-mpc82xxads_diff.htm=
) for my MPC8272ADS board.
Now that I was thinking of going for the 2.6.11 kernel for my board. =
Before starting the journey, can someone help me know the following =
information
1) Does the 2.6.11 kernel support 8272ADS board
2) Does it need any additional patches.
3) If already supported. are there any known issues with the 2.6.11 for =
the above hardware.
4) If not supported, which is the latest kernel version which is suitable =
for the above hardware.
Thanks
--
Rupesh S
^ permalink raw reply
* Re: linux/drivers/net/fec_8xx/* vs. linux/arch/ppc/8xx_io/fec.c
From: Pantelis Antoniou @ 2005-06-10 6:43 UTC (permalink / raw)
To: Guillaume Autran; +Cc: linuxppc-embedded
In-Reply-To: <42A8B272.6010206@mrv.com>
Guillaume Autran wrote:
>
> Can anyone tell me what is the difference between:
> linux/arch/ppc/8xx_io/fec.c
Old driver (AFAIK doesn't work on 2.6)
> and
> linux/drivers/net/fec_8xx/fec_*
The new driver for 2.6 (for now).
>
> They both seem to be mpc8xx fec drivers....
>
> Thanks.
> Guillaume.
>
Regards
Pantelis
^ permalink raw reply
* [PATCH] ppc32: Fix nasty sleep/wakeup problem
From: Benjamin Herrenschmidt @ 2005-06-10 4:19 UTC (permalink / raw)
To: Linus Torvalds; +Cc: Andrew Morton, linuxppc-dev list
Hi !
(This _is_ for 2.6.12 is possible)
Despite all the care lately in making the powermac sleep/wakeup as
robust as possible, there is still a nasty related to the use of cpufreq
on PMU based machines. Unfortunately, it affects paulus old powerbook so
I have to fix it :)
We didn't manage to understand what is precisely going on, it leads to
memory corruption and might have to do with RAM not beeing properly
refreshed when a cpufreq transition is done right before the sleep.
The best workaround (and less intrusive at this point) we could come up
with is included in this patch. We basically do _not_ force a switch to
high speed on suspend anymore (that is what is causing the problem) on
those machines. We still force a speed switch on wakeup (since we don't
know what speed we are coming back from sleep at, and that seems to work
fine).
Since, during this short interval, the actual CPU speed might be
incorrect, we also hack around by multiplying loops_per_jiffy by 2 (max
speed factor on those machines) during early wakeup stage to make sure
udelay's during that time aren't too short.
For after 2.6.12, we'll change udelay implementation to use the CPU
timebase (which is always constant) instead like we do on ppc64 and thus
get rid of all those problems.
Please apply,
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Index: linux-work/arch/ppc/platforms/pmac_cpufreq.c
===================================================================
--- linux-work.orig/arch/ppc/platforms/pmac_cpufreq.c 2005-06-10 13:42:44.000000000 +1000
+++ linux-work/arch/ppc/platforms/pmac_cpufreq.c 2005-06-10 13:45:44.000000000 +1000
@@ -83,7 +83,7 @@
static u32 slew_done_gpio;
static int no_schedule;
static int has_cpu_l2lve;
-
+static int is_pmu_based;
/* There are only two frequency states for each processor. Values
* are in kHz for the time being.
@@ -463,7 +463,7 @@
*/
no_schedule = 1;
sleep_freq = cur_freq;
- if (cur_freq == low_freq)
+ if (cur_freq == low_freq && !is_pmu_based)
do_set_cpu_speed(CPUFREQ_HIGH, 0);
return 0;
}
@@ -588,6 +588,7 @@
return 1;
hi_freq = (*value) / 1000;
set_speed_proc = pmu_set_cpu_speed;
+ is_pmu_based = 1;
return 0;
}
@@ -692,6 +693,7 @@
hi_freq = cur_freq;
low_freq = 400000;
set_speed_proc = pmu_set_cpu_speed;
+ is_pmu_based = 1;
}
/* Else check for TiPb 400 & 500 */
else if (machine_is_compatible("PowerBook3,2")) {
@@ -703,6 +705,7 @@
hi_freq = cur_freq;
low_freq = 300000;
set_speed_proc = pmu_set_cpu_speed;
+ is_pmu_based = 1;
}
/* Else check for 750FX */
else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
Index: linux-work/drivers/macintosh/via-pmu.c
===================================================================
--- linux-work.orig/drivers/macintosh/via-pmu.c 2005-06-10 13:42:44.000000000 +1000
+++ linux-work/drivers/macintosh/via-pmu.c 2005-06-10 13:47:30.000000000 +1000
@@ -2593,6 +2593,9 @@
/* Restore VIA */
restore_via_state();
+ /* tweak LPJ before cpufreq is there */
+ loops_per_jiffy *= 2;
+
/* Restore video */
pmac_call_early_video_resume();
@@ -2613,6 +2616,9 @@
pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
pmu_wait_complete(&req);
+ /* Restore LPJ, cpufreq will adjust the cpu frequency */
+ loops_per_jiffy /= 2;
+
pmac_wakeup_devices();
return 0;
^ permalink raw reply
* [PATCH] ppc32: Factor out common exception code into macro's for 4xx/Book-E
From: Kumar Gala @ 2005-06-10 2:40 UTC (permalink / raw)
To: Andrew Morton; +Cc: linux-kernel, linuxppc-embedded
4xx and Book-E PPC's have several exception levels. The code to handle
each level is fairly regular. Turning the code into macro's will ease
the handling of future exception levels (debug) in forth coming chips.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
---
commit 03d7635f7da398ffc32f53520090d34a1476755d
tree 9186ada6aa7177a41e2368e60dfc3596e3e30017
parent 24e4731a8b0b74af65f39fa11cc3a520e52f0a63
author Kumar K. Gala <kumar.gala@freescale.com> Thu, 09 Jun 2005 21:39:12 -0500
committer Kumar K. Gala <kumar.gala@freescale.com> Thu, 09 Jun 2005 21:39:12 -0500
arch/ppc/kernel/entry.S | 164 ++++++++++++++++--------------------------
arch/ppc/kernel/head_booke.h | 94 ++++++------------------
2 files changed, 87 insertions(+), 171 deletions(-)
diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S
--- a/arch/ppc/kernel/entry.S
+++ b/arch/ppc/kernel/entry.S
@@ -46,26 +46,23 @@
#ifdef CONFIG_BOOKE
#include "head_booke.h"
+#define TRANSFER_TO_HANDLER_EXC_LEVEL(exc_level) \
+ mtspr exc_level##_SPRG,r8; \
+ BOOKE_LOAD_EXC_LEVEL_STACK(exc_level); \
+ lwz r0,GPR10-INT_FRAME_SIZE(r8); \
+ stw r0,GPR10(r11); \
+ lwz r0,GPR11-INT_FRAME_SIZE(r8); \
+ stw r0,GPR11(r11); \
+ mfspr r8,exc_level##_SPRG
+
.globl mcheck_transfer_to_handler
mcheck_transfer_to_handler:
- mtspr MCHECK_SPRG,r8
- BOOKE_LOAD_MCHECK_STACK
- lwz r0,GPR10-INT_FRAME_SIZE(r8)
- stw r0,GPR10(r11)
- lwz r0,GPR11-INT_FRAME_SIZE(r8)
- stw r0,GPR11(r11)
- mfspr r8,MCHECK_SPRG
+ TRANSFER_TO_HANDLER_EXC_LEVEL(MCHECK)
b transfer_to_handler_full
.globl crit_transfer_to_handler
crit_transfer_to_handler:
- mtspr CRIT_SPRG,r8
- BOOKE_LOAD_CRIT_STACK
- lwz r0,GPR10-INT_FRAME_SIZE(r8)
- stw r0,GPR10(r11)
- lwz r0,GPR11-INT_FRAME_SIZE(r8)
- stw r0,GPR11(r11)
- mfspr r8,CRIT_SPRG
+ TRANSFER_TO_HANDLER_EXC_LEVEL(CRIT)
/* fall through */
#endif
@@ -781,99 +778,64 @@ exc_exit_restart_end:
* time of the critical interrupt.
*
*/
- .globl ret_from_crit_exc
-ret_from_crit_exc:
- REST_NVGPRS(r1)
- lwz r3,_MSR(r1)
- andi. r3,r3,MSR_PR
- LOAD_MSR_KERNEL(r10,MSR_KERNEL)
- bne user_exc_return
-
- lwz r0,GPR0(r1)
- lwz r2,GPR2(r1)
- REST_4GPRS(3, r1)
- REST_2GPRS(7, r1)
-
- lwz r10,_XER(r1)
- lwz r11,_CTR(r1)
- mtspr SPRN_XER,r10
- mtctr r11
-
- PPC405_ERR77(0,r1)
- stwcx. r0,0,r1 /* to clear the reservation */
-
- lwz r11,_LINK(r1)
- mtlr r11
- lwz r10,_CCR(r1)
- mtcrf 0xff,r10
#ifdef CONFIG_40x
- /* avoid any possible TLB misses here by turning off MSR.DR, we
- * assume the instructions here are mapped by a pinned TLB entry */
- li r10,MSR_IR
- mtmsr r10
- isync
- tophys(r1, r1)
+#define PPC_40x_TURN_OFF_MSR_DR \
+ /* avoid any possible TLB misses here by turning off MSR.DR, we \
+ * assume the instructions here are mapped by a pinned TLB entry */ \
+ li r10,MSR_IR; \
+ mtmsr r10; \
+ isync; \
+ tophys(r1, r1);
+#else
+#define PPC_40x_TURN_OFF_MSR_DR
#endif
- lwz r9,_DEAR(r1)
- lwz r10,_ESR(r1)
- mtspr SPRN_DEAR,r9
- mtspr SPRN_ESR,r10
- lwz r11,_NIP(r1)
- lwz r12,_MSR(r1)
- mtspr SPRN_CSRR0,r11
- mtspr SPRN_CSRR1,r12
- lwz r9,GPR9(r1)
- lwz r12,GPR12(r1)
- lwz r10,GPR10(r1)
- lwz r11,GPR11(r1)
- lwz r1,GPR1(r1)
- PPC405_ERR77_SYNC
- rfci
- b . /* prevent prefetch past rfci */
+
+#define RET_FROM_EXC_LEVEL(exc_lvl_srr0, exc_lvl_srr1, exc_lvl_rfi) \
+ REST_NVGPRS(r1); \
+ lwz r3,_MSR(r1); \
+ andi. r3,r3,MSR_PR; \
+ LOAD_MSR_KERNEL(r10,MSR_KERNEL); \
+ bne user_exc_return; \
+ lwz r0,GPR0(r1); \
+ lwz r2,GPR2(r1); \
+ REST_4GPRS(3, r1); \
+ REST_2GPRS(7, r1); \
+ lwz r10,_XER(r1); \
+ lwz r11,_CTR(r1); \
+ mtspr SPRN_XER,r10; \
+ mtctr r11; \
+ PPC405_ERR77(0,r1); \
+ stwcx. r0,0,r1; /* to clear the reservation */ \
+ lwz r11,_LINK(r1); \
+ mtlr r11; \
+ lwz r10,_CCR(r1); \
+ mtcrf 0xff,r10; \
+ PPC_40x_TURN_OFF_MSR_DR; \
+ lwz r9,_DEAR(r1); \
+ lwz r10,_ESR(r1); \
+ mtspr SPRN_DEAR,r9; \
+ mtspr SPRN_ESR,r10; \
+ lwz r11,_NIP(r1); \
+ lwz r12,_MSR(r1); \
+ mtspr exc_lvl_srr0,r11; \
+ mtspr exc_lvl_srr1,r12; \
+ lwz r9,GPR9(r1); \
+ lwz r12,GPR12(r1); \
+ lwz r10,GPR10(r1); \
+ lwz r11,GPR11(r1); \
+ lwz r1,GPR1(r1); \
+ PPC405_ERR77_SYNC; \
+ exc_lvl_rfi; \
+ b .; /* prevent prefetch past exc_lvl_rfi */
+
+ .globl ret_from_crit_exc
+ret_from_crit_exc:
+ RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI)
#ifdef CONFIG_BOOKE
-/*
- * Return from a machine check interrupt, similar to a critical
- * interrupt.
- */
.globl ret_from_mcheck_exc
ret_from_mcheck_exc:
- REST_NVGPRS(r1)
- lwz r3,_MSR(r1)
- andi. r3,r3,MSR_PR
- LOAD_MSR_KERNEL(r10,MSR_KERNEL)
- bne user_exc_return
-
- lwz r0,GPR0(r1)
- lwz r2,GPR2(r1)
- REST_4GPRS(3, r1)
- REST_2GPRS(7, r1)
-
- lwz r10,_XER(r1)
- lwz r11,_CTR(r1)
- mtspr SPRN_XER,r10
- mtctr r11
-
- stwcx. r0,0,r1 /* to clear the reservation */
-
- lwz r11,_LINK(r1)
- mtlr r11
- lwz r10,_CCR(r1)
- mtcrf 0xff,r10
- lwz r9,_DEAR(r1)
- lwz r10,_ESR(r1)
- mtspr SPRN_DEAR,r9
- mtspr SPRN_ESR,r10
- lwz r11,_NIP(r1)
- lwz r12,_MSR(r1)
- mtspr SPRN_MCSRR0,r11
- mtspr SPRN_MCSRR1,r12
- lwz r9,GPR9(r1)
- lwz r12,GPR12(r1)
- lwz r10,GPR10(r1)
- lwz r11,GPR11(r1)
- lwz r1,GPR1(r1)
- RFMCI
+ RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI)
#endif /* CONFIG_BOOKE */
/*
diff --git a/arch/ppc/kernel/head_booke.h b/arch/ppc/kernel/head_booke.h
--- a/arch/ppc/kernel/head_booke.h
+++ b/arch/ppc/kernel/head_booke.h
@@ -67,46 +67,36 @@
#define CRIT_STACK_TOP (exception_stack_top)
#ifdef CONFIG_SMP
-#define BOOKE_LOAD_CRIT_STACK \
+#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \
mfspr r8,SPRN_PIR; \
mulli r8,r8,BOOKE_EXCEPTION_STACK_SIZE; \
neg r8,r8; \
- addis r8,r8,CRIT_STACK_TOP@ha; \
- addi r8,r8,CRIT_STACK_TOP@l
-#define BOOKE_LOAD_MCHECK_STACK \
- mfspr r8,SPRN_PIR; \
- mulli r8,r8,BOOKE_EXCEPTION_STACK_SIZE; \
- neg r8,r8; \
- addis r8,r8,MCHECK_STACK_TOP@ha; \
- addi r8,r8,MCHECK_STACK_TOP@l
+ addis r8,r8,level##_STACK_TOP@ha; \
+ addi r8,r8,level##_STACK_TOP@l
#else
-#define BOOKE_LOAD_CRIT_STACK \
- lis r8,CRIT_STACK_TOP@h; \
- ori r8,r8,CRIT_STACK_TOP@l
-#define BOOKE_LOAD_MCHECK_STACK \
- lis r8,MCHECK_STACK_TOP@h; \
- ori r8,r8,MCHECK_STACK_TOP@l
+#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \
+ lis r8,level##_STACK_TOP@h; \
+ ori r8,r8,level##_STACK_TOP@l
#endif
/*
- * Exception prolog for critical exceptions. This is a little different
- * from the normal exception prolog above since a critical exception
- * can potentially occur at any point during normal exception processing.
- * Thus we cannot use the same SPRG registers as the normal prolog above.
- * Instead we use a portion of the critical exception stack at low physical
- * addresses.
+ * Exception prolog for critical/machine check exceptions. This is a
+ * little different from the normal exception prolog above since a
+ * critical/machine check exception can potentially occur at any point
+ * during normal exception processing. Thus we cannot use the same SPRG
+ * registers as the normal prolog above. Instead we use a portion of the
+ * critical/machine check exception stack at low physical addresses.
*/
-
-#define CRITICAL_EXCEPTION_PROLOG \
- mtspr CRIT_SPRG,r8; \
- BOOKE_LOAD_CRIT_STACK; /* r8 points to the crit stack */ \
+#define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \
+ mtspr exc_level##_SPRG,r8; \
+ BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \
stw r10,GPR10-INT_FRAME_SIZE(r8); \
stw r11,GPR11-INT_FRAME_SIZE(r8); \
mfcr r10; /* save CR in r10 for now */\
- mfspr r11,SPRN_CSRR1; /* check whether user or kernel */\
+ mfspr r11,exc_level_srr1; /* check whether user or kernel */\
andi. r11,r11,MSR_PR; \
mr r11,r8; \
- mfspr r8,CRIT_SPRG; \
+ mfspr r8,exc_level##_SPRG; \
beq 1f; \
/* COMING FROM USER MODE */ \
mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\
@@ -122,9 +112,9 @@
stw r12,_DEAR(r11); /* since they may have had stuff */\
mfspr r9,SPRN_ESR; /* in them at the point where the */\
stw r9,_ESR(r11); /* exception was taken */\
- mfspr r12,SPRN_CSRR0; \
+ mfspr r12,exc_level_srr0; \
stw r1,GPR1(r11); \
- mfspr r9,SPRN_CSRR1; \
+ mfspr r9,exc_level_srr1; \
stw r1,0(r11); \
mr r1,r11; \
rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\
@@ -132,45 +122,10 @@
SAVE_4GPRS(3, r11); \
SAVE_2GPRS(7, r11)
-/*
- * Exception prolog for machine check exceptions. This is similar to
- * the critical exception prolog, except that machine check exceptions
- * have their stack.
- */
-#define MCHECK_EXCEPTION_PROLOG \
- mtspr MCHECK_SPRG,r8; \
- BOOKE_LOAD_MCHECK_STACK; /* r8 points to the mcheck stack */\
- stw r10,GPR10-INT_FRAME_SIZE(r8); \
- stw r11,GPR11-INT_FRAME_SIZE(r8); \
- mfcr r10; /* save CR in r10 for now */\
- mfspr r11,SPRN_MCSRR1; /* check whether user or kernel */\
- andi. r11,r11,MSR_PR; \
- mr r11,r8; \
- mfspr r8,MCHECK_SPRG; \
- beq 1f; \
- /* COMING FROM USER MODE */ \
- mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\
- lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
- addi r11,r11,THREAD_SIZE; \
-1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\
- stw r10,_CCR(r11); /* save various registers */\
- stw r12,GPR12(r11); \
- stw r9,GPR9(r11); \
- mflr r10; \
- stw r10,_LINK(r11); \
- mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\
- stw r12,_DEAR(r11); /* since they may have had stuff */\
- mfspr r9,SPRN_ESR; /* in them at the point where the */\
- stw r9,_ESR(r11); /* exception was taken */\
- mfspr r12,SPRN_MCSRR0; \
- stw r1,GPR1(r11); \
- mfspr r9,SPRN_MCSRR1; \
- stw r1,0(r11); \
- mr r1,r11; \
- rlwinm r9,r9,0,14,12; /* clear MSR_WE (necessary?) */\
- stw r0,GPR0(r11); \
- SAVE_4GPRS(3, r11); \
- SAVE_2GPRS(7, r11)
+#define CRITICAL_EXCEPTION_PROLOG \
+ EXC_LEVEL_EXCEPTION_PROLOG(CRIT, SPRN_CSRR0, SPRN_CSRR1)
+#define MCHECK_EXCEPTION_PROLOG \
+ EXC_LEVEL_EXCEPTION_PROLOG(MCHECK, SPRN_MCSRR0, SPRN_MCSRR1)
/*
* Exception vectors.
@@ -237,7 +192,6 @@ label:
EXC_XFER_TEMPLATE(hdlr, n+1, MSR_KERNEL, COPY_EE, transfer_to_handler, \
ret_from_except)
-
/* Check for a single step debug exception while in an exception
* handler before state has been saved. This is to catch the case
* where an instruction that we are trying to single step causes
@@ -291,7 +245,7 @@ label:
lwz r9,GPR9(r11); \
lwz r12,GPR12(r11); \
mtspr CRIT_SPRG,r8; \
- BOOKE_LOAD_CRIT_STACK; /* r8 points to the crit stack */ \
+ BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */ \
lwz r10,GPR10-INT_FRAME_SIZE(r8); \
lwz r11,GPR11-INT_FRAME_SIZE(r8); \
mfspr r8,CRIT_SPRG; \
^ permalink raw reply
* Re: Mapping full 1 GB of memory on a Freescale Book E part
From: Kumar Gala @ 2005-06-10 1:08 UTC (permalink / raw)
To: Kylo Ginsberg; +Cc: linuxppc-embedded
In-Reply-To: <61cc712d050609162565d8bbfd@mail.gmail.com>
On Jun 9, 2005, at 6:25 PM, Kylo Ginsberg wrote:
> On 6/9/05, Kumar Gala <kumar.gala@freescale.com> wrote:
>>
>> On Jun 9, 2005, at 5:09 PM, Kylo Ginsberg wrote:
>>> I've modified fsl_booke_mmu.c to use a 4th TLB, thus mapping the full
>>> 1 GB of memory. However, I'm new to linux memory management, so I'd
>>> appreciate any comments as to whether there are tradeoffs or dangers
>>> here that I am missing.
>>
>> There is a danger here in that you have left no virtual address space
>> for the kernel. Since KERNEL_BASE is normally 0xc000_0000 + 1G ends
>> up
>> a the end of memory. There for any devices that need virtual memory
>> space would not have any to map out of. I'm kinda amazed this works
>> at
>> all. I'd be interested in seeing what a boot log looks like for this
>> config.
>
> Sorry, should have mentioned this in the first post. I dropped
> KERNEL_BASE to 0xa0000000 and upped LOWMEM_SIZE to 0x40000000. So the
> Advanced Setup portion of my .config reads:
>
> #
> # Advanced setup
> #
> CONFIG_ADVANCED_OPTIONS=y
> CONFIG_HIGHMEM_START=0xfe000000
> CONFIG_LOWMEM_SIZE_BOOL=y
> CONFIG_LOWMEM_SIZE=0x40000000
> CONFIG_KERNEL_START_BOOL=y
> CONFIG_KERNEL_START=0xa0000000
> # CONFIG_TASK_SIZE_BOOL is not set
> CONFIG_TASK_SIZE=0x80000000
> # CONFIG_BOOT_LOAD_BOOL is not set
> CONFIG_BOOT_LOAD=0x00800000
>
> and under Platform Options:
>
> # CONFIG_HIGHMEM is not set
>
>> The way to handle this is by enabling HIGHMEM support in the kernel or
>> dropping the KERNEL_START in the config. I'm haven't ever tried to
>> drop KERNEL_START so your milage may very on what if anything that
>> will
>> break.
>
> So, an alternative would be to leave fsl_booke_mmu.c untouched, revert
> my KERNEL_START/LOWMEM mods, and instead enable HIGHMEM? Setting
> HIGHMEM_START to ...? Will that entail more TLB thrashing?
You have to set HIGHMEM_START to something. I think the default is
fine. It only means more TLB thrasing if the kernel has to touch one
of the pages in HIGHMEM. If its only application code that is using
memory > 768M then you shouldn't really see any performance impact.
either solution should work, it just depends on what you want to
accomplish at the end.
- kumar
^ permalink raw reply
* IT Services
From: Consultants @ 2005-06-09 23:36 UTC (permalink / raw)
To: 'linuxppc-embedded@ozlabs.org'
[-- Attachment #1: Type: text/plain, Size: 2007 bytes --]
.Hi ,
I hope things are going well at your company!
We have built our reputation by giving our clients 1 or 2 resumes, whereby
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How can I be of service?
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^ permalink raw reply
* IT Services
From: Consultants @ 2005-06-09 23:36 UTC (permalink / raw)
To: 'linuxppc-dev@ozlabs.org'
[-- Attachment #1: Type: text/plain, Size: 1997 bytes --]
.Hi ,
I hope things are going well at your company!
We have built our reputation by giving our clients 1 or 2 resumes, whereby
both candidates are a 100% PERFECT matching candidates, based on the skills
required. The candidates we present are technically screened in-depth and
qualified by our internal recruiters (who are also technical). We may
interview 50 - 100 candidates before we have the confidence that the
candidate is a 100% match, for our client. We can also further qualify the
candidate through an online technical test from www.proveit.com. We go the
extra mile to service our clients!!
I am conducting my monthly check with you, for your needs for:
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^ permalink raw reply
* Re: Mapping full 1 GB of memory on a Freescale Book E part
From: Kylo Ginsberg @ 2005-06-09 23:25 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-embedded
In-Reply-To: <815f92995891b6f6e5333d0658637788@freescale.com>
On 6/9/05, Kumar Gala <kumar.gala@freescale.com> wrote:
>=20
> On Jun 9, 2005, at 5:09 PM, Kylo Ginsberg wrote:
> > I've modified fsl_booke_mmu.c to use a 4th TLB, thus mapping the full
> > 1 GB of memory. However, I'm new to linux memory management, so I'd
> > appreciate any comments as to whether there are tradeoffs or dangers
> > here that I am missing.
>=20
> There is a danger here in that you have left no virtual address space
> for the kernel. Since KERNEL_BASE is normally 0xc000_0000 + 1G ends up
> a the end of memory. There for any devices that need virtual memory
> space would not have any to map out of. I'm kinda amazed this works at
> all. I'd be interested in seeing what a boot log looks like for this
> config.
Sorry, should have mentioned this in the first post. I dropped
KERNEL_BASE to 0xa0000000 and upped LOWMEM_SIZE to 0x40000000. So the
Advanced Setup portion of my .config reads:
#
# Advanced setup
#
CONFIG_ADVANCED_OPTIONS=3Dy
CONFIG_HIGHMEM_START=3D0xfe000000
CONFIG_LOWMEM_SIZE_BOOL=3Dy
CONFIG_LOWMEM_SIZE=3D0x40000000
CONFIG_KERNEL_START_BOOL=3Dy
CONFIG_KERNEL_START=3D0xa0000000
# CONFIG_TASK_SIZE_BOOL is not set
CONFIG_TASK_SIZE=3D0x80000000
# CONFIG_BOOT_LOAD_BOOL is not set
CONFIG_BOOT_LOAD=3D0x00800000
and under Platform Options:
# CONFIG_HIGHMEM is not set
> The way to handle this is by enabling HIGHMEM support in the kernel or
> dropping the KERNEL_START in the config. I'm haven't ever tried to
> drop KERNEL_START so your milage may very on what if anything that will
> break.
So, an alternative would be to leave fsl_booke_mmu.c untouched, revert
my KERNEL_START/LOWMEM mods, and instead enable HIGHMEM? Setting
HIGHMEM_START to ...? Will that entail more TLB thrashing?
Kylo
^ permalink raw reply
* Re: 8xx fixes GIT tree
From: Marcelo Tosatti @ 2005-06-09 18:24 UTC (permalink / raw)
To: linux-ppc-embedded; +Cc: Aristeu Sergio Rozanski Filho
In-Reply-To: <20050609162650.GA8125@logos.cnet>
On Thu, Jun 09, 2005 at 01:26:50PM -0300, Marcelo Tosatti wrote:
> Hi,
>
> I've put up a GIT tree with some 8xx fixes.
>
> I plan to continue collecting fixes there - I encourage other folks
> working with v2.6 on 8xx to join in and contribute.
>
> Its about time to setup a "TODO" list for v2.6 8xx, a few which I
> remember from the top of my head:
>
> - merge CPU15 workaround
> - merge PCMCIA driver
> - merge arch/ppc/8xx_io/fec.c v2.6 update
> - Remove misc-embedded.c
>
> It should live somewhere in the web (wiki would be ideal).
>
> It contains the following changes at the moment:
Oh, I forgot to mention the URL - its at:
http://www.kernel.org/pub/scm/linux/kernel/git/marcelo/8xx-fixes/
Web interface at:
http://www.kernel.org/git/?p=linux/kernel/git/marcelo/8xx-fixes;a=summary
^ permalink raw reply
* Re: Mapping full 1 GB of memory on a Freescale Book E part
From: Kumar Gala @ 2005-06-09 23:07 UTC (permalink / raw)
To: Kylo Ginsberg; +Cc: linuxppc-embedded
In-Reply-To: <61cc712d0506091509527ee680@mail.gmail.com>
On Jun 9, 2005, at 5:09 PM, Kylo Ginsberg wrote:
> I'm running 2.6.11 on a Freescale 8555 with 1GB of DDR memory.
> Looking in arch/ppc/mm/fsl_booke_mmu.c, I see that at most 3 TLB
> entries will be used to map memory. Since the max tlb size on
> Freescale Book E is 256 MB, this caps mapped in memory at 768 MB.
>
> I've modified fsl_booke_mmu.c to use a 4th TLB, thus mapping the full
> 1 GB of memory. However, I'm new to linux memory management, so I'd
> appreciate any comments as to whether there are tradeoffs or dangers
> here that I am missing.
There is a danger here in that you have left no virtual address space
for the kernel. Since KERNEL_BASE is normally 0xc000_0000 + 1G ends up
a the end of memory. There for any devices that need virtual memory
space would not have any to map out of. I'm kinda amazed this works at
all. I'd be interested in seeing what a boot log looks like for this
config.
The way to handle this is by enabling HIGHMEM support in the kernel or
dropping the KERNEL_START in the config. I'm haven't ever tried to
drop KERNEL_START so your milage may very on what if anything that will
break.
- kumar
^ permalink raw reply
* Re: RE : PPC arch and spinlocks
From: Benjamin Herrenschmidt @ 2005-06-09 22:42 UTC (permalink / raw)
To: Garcia Jérémie; +Cc: linuxppc-dev
In-Reply-To: <D4FDDD1349B5AC46B68FC26AD8AF42D6226B32@exnet.3il.fr>
On Thu, 2005-06-09 at 11:28 +0200, Garcia Jérémie wrote:
> First of all,tks Jeff for this link.
> So reading that, I understood that I need to enable the SMP support in the makemenuconfig
> in order to use spinlocks even if I'm working on UP platform.
> That's what I did but I now go through compile errors (I'm using a montavista PE 3.1):
No, spinlocks are always around, though they do nothing on UP (except if
you use the _irq variants). Also, SMP isn't supported on 4xx.
You should do what Hollis says :)
Ben.
^ permalink raw reply
* Mapping full 1 GB of memory on a Freescale Book E part
From: Kylo Ginsberg @ 2005-06-09 22:09 UTC (permalink / raw)
To: linuxppc-embedded
I'm running 2.6.11 on a Freescale 8555 with 1GB of DDR memory. =20
Looking in arch/ppc/mm/fsl_booke_mmu.c, I see that at most 3 TLB
entries will be used to map memory. Since the max tlb size on
Freescale Book E is 256 MB, this caps mapped in memory at 768 MB.
I've modified fsl_booke_mmu.c to use a 4th TLB, thus mapping the full
1 GB of memory. However, I'm new to linux memory management, so I'd
appreciate any comments as to whether there are tradeoffs or dangers
here that I am missing.
Thanks,
Kylo
^ permalink raw reply
* linux/drivers/net/fec_8xx/* vs. linux/arch/ppc/8xx_io/fec.c
From: Guillaume Autran @ 2005-06-09 21:19 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <4434E283.3000201@eircom.net>
Can anyone tell me what is the difference between:
linux/arch/ppc/8xx_io/fec.c
and
linux/drivers/net/fec_8xx/fec_*
They both seem to be mpc8xx fec drivers....
Thanks.
Guillaume.
--
=======================================
Guillaume Autran
Senior Software Engineer
MRV Communications, Inc.
Tel: (978) 952-4932 office
E-mail: gautran@mrv.com
=======================================
^ permalink raw reply
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