* Re: DTC memory reserve question
From: Benjamin Herrenschmidt @ 2005-07-19 2:08 UTC (permalink / raw)
To: Jon Loeliger; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <1121718331.2400.24.camel@cashmere.sps.mot.com>
On Mon, 2005-07-18 at 15:25 -0500, Jon Loeliger wrote:
> So, when the Device Tree Compiler lays down a memory
> reserve table into an assembly file, it always adds
> a reserved region covering the whole DT blob itself.
> That is, it does this:
>
> .balign 8
> .globl dt_reserve_map
> dt_reserve_map:
> _dt_reserve_map:
> .long 0, _dt_blob_start
> .long 0, _dt_blob_end - _dt_blob_start
> .llong 0
> .llong 0
>
> Naturally, that yields System.map entries like this:
>
> c0013988 t _dt_blob_start
> c0013988 T dt_blob_start
> c0013988 t _dt_header
> c0013988 T dt_header
> c00139b0 t _dt_reserve_map
> c00139b0 T dt_reserve_map
> c00139d0 t _dt_struct_start
> c00139d0 T dt_struct_start
> c0013df0 t _dt_strings_start
> c0013df0 T dt_strings_start
> c0013df0 t _dt_struct_end
> c0013df0 T dt_struct_end
> c0013f05 t _dt_blob_end
> c0013f05 T dt_blob_end
>
> Notice that these are 0xC-gazillion addresses.
How are you getting these addresses ? You are trying to link the output
of dtc with the kernel directly ? Hrm... That will not work for that
(and maybe a couple of other things). Might be better to link it with
the zImage wrapper...
Ben.
^ permalink raw reply
* Re: PATCH: Add memreserve to DTC
From: David Gibson @ 2005-07-19 1:17 UTC (permalink / raw)
To: Jon Loeliger; +Cc: linuxppc64-dev, linuxppc-dev@ozlabs.org
In-Reply-To: <1121437857.24864.12.camel@cashmere.sps.mot.com>
On Fri, Jul 15, 2005 at 09:30:58AM -0500, Jon Loeliger wrote:
> On Fri, 2005-07-15 at 02:19, David Gibson wrote:
>
> >
> > Ok, I've merged this,
>
> Excellent, thanks!
>
> > although I've tweaked things substantially in the process.
>
> No problem.
>
> > I did rename "header_tree" to "boot_info", moved some
>
> Oh, good!
>
> > things around, and changed the syntax. Reserve ranges can now be
> > specified either as an address and length:
> >
> > /memreserve/ 10000000 00002000;
> >
> > or as an (inclusive) address range:
> >
> > /memreserve/ 10000000-10001fff;
> >
> > I am a bit worried that those two forms may be hard to distinguish at
> > a glance. Any sugggestions for changes to the syntax soon please, I'd
> > really like to keep the source syntax as stable as possible.
>
> Oh man. With syntax you can demystify those in any number
> of ways. Just a matter of what you are wanting. You can
> always add sugar:
>
> /memreserve_block/ 10000000 00002000;
> /memreserve_range/ 10000000 10001fff;
>
> /memreserve/ 10000000 /for/ 2000; // or /size/ ?
> /memreserve/ 10000000 /through/ 10001fff;
>
> /memreserve/ 10000000 00002000;
> /memreserve/ [10000000, 10001fff]; // or [10000000, 10002000)?
>
> Stuff like that maybe?
Hrm.. don't really like any of those better than what I have already,
I'm afraid. It does occur to me that size > base is going to be a
very rare situation, so the value of the numbers themselves will act
as a reasonable hint as to which form is in use.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/people/dgibson
^ permalink raw reply
* Re: MPC8540 DMA routines (channel 0 broken?)
From: Kumar Gala @ 2005-07-18 16:17 UTC (permalink / raw)
To: Clemens Koller; +Cc: linuxppc-embedded
In-Reply-To: <42DBCE60.8090300@anagramm.de>
Glad to see that the issue was software. If there is something going
on in u-boot during init that isn't leaving the DMA channel in a
clean state let me know.
Also, it looks like there maybe some proposal for a general DMA
engine API. If your interested take a look at the Linux Sympoisum
2005 papers (Accelerating Network Receive Processing). I'm hoping to
talk to the guys doing this to see what their thoughts are. If you
have some feedback on what they are proposing let me know.
- kumar
On Jul 18, 2005, at 10:44 AM, Clemens Koller wrote:
> Hello, Stephane!
>
>
>>> In the meanwhile, I got channel 0 working. It seems
>>> that the DMA#0 machine got stuck in some configuration from any
>>> previous (u-boot?) operation which didn't clean up things
>>> properly. I had to explicitly abort a (continously running?)
>>> transfer to be able to re-program it in the way I need.
>>>
>>
>> Are you using a BDI2000?
>>
>
> Nope.
>
>
>> Some init mode uses the DMA#0 for memory zeroing (see your .cfg
>> file).
>> Also the DDR ECC U-boot code may use the DMA#0.
>> Isn't it possible to reset the DMA#0 from Linux?
>>
>
> Thank you! Yes, that's true! <ACK>
>
> I've checked the U-Boot code, today. The problem comes up when
> U-Boot is built with CONFIG_DDR_ECC.
> The DMA #0 is used to initialize the DDR prior enabling ECC.
> Maybe the DMA doesn't get cleaned up properly.
> (I'll have to re-check the registers).
>
> But I can get my mpc85xx_dma "driver" working now.
> However I cannot disable ECC when I am in Linux for testing
> yet. :-]
> I'll need to customize U-Boot without ECC because I don't want
> to use it due to performance issues anyway.
> But that's getting OT here.
>
> Greets,
>
> Clemens Koller
> _______________________________
> R&D Imaging Devices
> Anagramm GmbH
> Rupert-Mayer-Str. 45/1
> 81379 Muenchen
> Germany
>
> http://www.anagramm.de
> Phone: +49-89-741518-50
> Fax: +49-89-741518-19
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
^ permalink raw reply
* DTC memory reserve question
From: Jon Loeliger @ 2005-07-18 20:25 UTC (permalink / raw)
To: linuxppc-dev@ozlabs.org
So, when the Device Tree Compiler lays down a memory
reserve table into an assembly file, it always adds
a reserved region covering the whole DT blob itself.
That is, it does this:
.balign 8
.globl dt_reserve_map
dt_reserve_map:
_dt_reserve_map:
.long 0, _dt_blob_start
.long 0, _dt_blob_end - _dt_blob_start
.llong 0
.llong 0
Naturally, that yields System.map entries like this:
c0013988 t _dt_blob_start
c0013988 T dt_blob_start
c0013988 t _dt_header
c0013988 T dt_header
c00139b0 t _dt_reserve_map
c00139b0 T dt_reserve_map
c00139d0 t _dt_struct_start
c00139d0 T dt_struct_start
c0013df0 t _dt_strings_start
c0013df0 T dt_strings_start
c0013df0 t _dt_struct_end
c0013df0 T dt_struct_end
c0013f05 t _dt_blob_end
c0013f05 T dt_blob_end
Notice that these are 0xC-gazillion addresses.
And way over here in the Ben H documentation, the memory
reserve map is described as containing physical addresses:
- off_mem_rsvmap
This is an offset from the beginning of the header to the start
of the reserved memory map. This map is a list of pairs of 64
bits integers. Each pair is a physical address and a size. The
list is terminated by an entry of size 0. This map provides the
kernel with a list of physical memory areas that are "reserved"
and thus not to be used for memory allocations, especially during
early initialisation.
Uh, so here's my dilemma: I can't just pa() all the addresses
that come in from the memreserve table, can I? They should
already _be_ physical, right? We aren't going to be able to
handle a mix of them without a flag or test or something?
jdl
^ permalink raw reply
* Re: [OLS 2005] Ottawa pub ideas
From: Michael Richardson @ 2005-07-18 19:30 UTC (permalink / raw)
To: David Ho; +Cc: linuxppc-embedded
In-Reply-To: <4dd15d18050718093979750163@mail.gmail.com>
-----BEGIN PGP SIGNED MESSAGE-----
>>>>> "David" == David Ho <davidkwho@gmail.com> writes:
David> --------------------------------------- D'arcy McGee's Irish
David> Pub 44 Sparks Street Ottawa, ON Tel:(613)230-4433
Loud, and often hard to get a seat.
David> Parliament Pub 101 Sparks Street Ottawa , ON Tel:(613)
David> 563-0636 www.parliamentpub.com
More of a restaurant/Tourist trap.
David> Heart and Crown Irish Pub 67 Clarence Street Ottawa , ON
Louder, lots of music.
David> The Fox and Feather Pub 283 Elgin Street Ottawa, ON (613)
David> 233-2219
David> http://www.foxandfeather.ca
Quieter, easier to sit at, but harder to find a place with 8 seats.
David> Pub Italia 434 Preston Street Ottawa, ON
Great place, busy. A restaurant as much as a pub.
David> Other notables --------------------- Honest Lawyer 141 George
David> Street Ottawa, ON K1N 5W5 http://www.honestlawyer.com/
David> Newly opened Restaurant/Lounge
David> ------------------------------------------------ Milestone's
David> Restaurant 700 Susses Drive Ottawa, ON
David> http://www.milestonesrestaurants.com/
I haven't been to either of these places.
- --
] Michael Richardson Xelerance Corporation, Ottawa, ON | firewalls [
] mcr @ xelerance.com Now doing IPsec training, see |net architect[
] http://www.sandelman.ca/mcr/ www.xelerance.com/training/ |device driver[
] I'm a dad: http://www.sandelman.ca/lrmr/ [
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.2.2 (GNU/Linux)
Comment: Finger me for keys
iQCVAwUBQtwDToqHRg3pndX9AQH8zgP+OERBw//r10k0hTa6VdIRiSDjUc8agX3+
kh6avZnMv59vgW+jE0RGuQmYnyfrWr7+fDdw37JfBlNuxl6GMvCazKjGwWw6qF/q
/OSvGX8uWrlf5wexqcMwjmNWxgrQs9eJCt6mac/Xrz4cQOPxdOJcjb5A9db8abZL
UrRnYh2XfHo=
=LUca
-----END PGP SIGNATURE-----
^ permalink raw reply
* Re: [OLS 2005] Ottawa pub ideas - V 2.0
From: David Ho @ 2005-07-18 17:13 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <4dd15d18050718093979750163@mail.gmail.com>
Minor update. Some links were broken.
=09
David
---------------------------------------
D'arcy McGee's Irish Pub
44 Sparks Street
Ottawa, ON
Tel:(613)230-4433
http://www.darcymcgees.ca/ottawa/
It's Ottawa's authentic Irish Pub, designed and built in Ireland. A
large selection of Irish Whiskeys, Single Malt Scotches, Bourbons,
Cognacs, and Ports awaits those with discerning tastes. Darcy's offers
live entertainment four nights a week (from Wednesday to Saturday
night) featuring Celtic, Maritime, Irish and a mix of contemporary
songs.
Parliament Pub
101 Sparks Street
Ottawa , ON
Tel:(613) 563-0636
www.parliamentpub.com
The Parliament Pub combines Dining and Political Fun. It is directly
across the street from Parliament Hill. It's an inviting spot for
lunch and dinner where excellent food and beverages can be enjoyed
against a political backdrop. The Parliament Pub serves great
sandwiches and wraps and creative salads. A fine selection of beers
(with no political agenda) is on tap.
Heart and Crown Irish Pub
67 Clarence Street
Ottawa , ON
(613) 562-0674
http://www.irishvillage.ca/
Live entertainment Wednesday to Saturday night with the finest bands,
offering a wide range of Popular, Traditional, Scottish and Irish
music.
The Fox and Feather Pub
283 Elgin Street
Ottawa, ON
(613) 233-2219
http://www.foxandfeather.ca
The Fox and Feather Pub is a great place to have a quiet pint, throw a
party or share an evening of fun with friends. They have got a
complimentary pool table, dartboards and board games to add to the
entertainment, and their large selection of beers on-tap covers
everything from Irish brews to Canadian microbreweries.
Pub Italia
434 Preston Street
Ottawa, ON
http://www.pubitalia.ca/welcome.html
Fine Italian food doubles as pub fare, and Wednesdays to Saturdays you
can order dishes after midnight . Pub Italia represents the perfect
marriage between an Italian trattoria and an Irish pub with its
combination of wonderful pizza and pasta dishes, and an incredible
selection of over 200 beers.
Other notables
---------------------
Honest Lawyer
141 George Street
Ottawa, ON
K1N 5W5
http://www.honestlawyer.com/
Newly opened Restaurant/Lounge
------------------------------------------------
Milestone's Restaurant
700 Susses Drive
Ottawa, ON
http://www.milestonesrestaurants.com/
^ permalink raw reply
* Re: [PATCH] ppc32: Register definition for MPC52xx
From: Tom Rini @ 2005-07-18 16:57 UTC (permalink / raw)
To: Grant Likely; +Cc: Sylvain Munaut, linuxppc-embedded
In-Reply-To: <528646bc0507170006540ac67a@mail.gmail.com>
On Sun, Jul 17, 2005 at 01:06:03AM -0600, Grant Likely wrote:
> Here are additional register definitions for the MPC52xx. CDM clock
> enables and port config bit settings in mpc52xx.h. Registers needed
> to support non-UART PSC modes in mpc52xx_psc.h. Drivers which use
> these regs/bits are to follow once I'm happy with them, but I thought
> that others may be interested in them now.
>
> Cheers,
> g.
>
> Signed-off-by: Grant Likely <grant.likely@gdcanada.com>
These should be held off until the drivers are ready (and really only
what the drivers need). Thanks!
--
Tom Rini
http://gate.crashing.org/~trini/
^ permalink raw reply
* [OLS 2005] Ottawa pub ideas
From: David Ho @ 2005-07-18 16:39 UTC (permalink / raw)
To: linuxppc-embedded
Sorry for the wait, and I hope everyone has access to their email in Ottawa=
.
David
---------------------------------------
D'arcy McGee's Irish Pub
44 Sparks Street
Ottawa, ON
Tel:(613)230-4433
http://www.heartandcrown.com/
It's Ottawa's authentic Irish Pub, designed and built in Ireland. A
large selection of Irish Whiskeys, Single Malt Scotches, Bourbons,
Cognacs, and Ports awaits those with discerning tastes. Darcy's offers
live entertainment four nights a week (from Wednesday to Saturday
night) featuring Celtic, Maritime, Irish and a mix of contemporary
songs.
Parliament Pub
101 Sparks Street
Ottawa , ON
Tel:(613) 563-0636
www.parliamentpub.com
The Parliament Pub combines Dining and Political Fun. It is directly
across the street from Parliament Hill. It's an inviting spot for
lunch and dinner where excellent food and beverages can be enjoyed
against a political backdrop. The Parliament Pub serves great
sandwiches and wraps and creative salads. A fine selection of beers
(with no political agenda) is on tap.
Heart and Crown Irish Pub
67 Clarence Street
Ottawa , ON
(613) 562-0674
http://www.heartandcrown.com/
Live entertainment Wednesday to Saturday night with the finest bands,
offering a wide range of Popular, Traditional, Scottish and Irish
music.
The Fox and Feather Pub
283 Elgin Street
Ottawa, ON
(613) 233-2219
http://www.foxandfeather.ca
The Fox and Feather Pub is a great place to have a quiet pint, throw a
party or share an evening of fun with friends. They have got a
complimentary pool table, dartboards and board games to add to the
entertainment, and their large selection of beers on-tap covers
everything from Irish brews to Canadian microbreweries.
Pub Italia
434 Preston Street
Ottawa, ON
http://www.pubitalia.ca/welcome.html
Fine Italian food doubles as pub fare, and Wednesdays to Saturdays you
can order dishes after midnight . Pub Italia represents the perfect
marriage between an Italian trattoria and an Irish pub with its
combination of wonderful pizza and pasta dishes, and an incredible
selection of over 200 beers.
Other notables
---------------------
Honest Lawyer=20
141 George Street
Ottawa, ON
K1N 5W5
http://www.honestlawyer.com/
Newly opened Restaurant/Lounge
------------------------------------------------
Milestone's Restaurant
700 Susses Drive
Ottawa, ON
http://www.milestonesrestaurants.com/
^ permalink raw reply
* Re: MPC8540 DMA routines (channel 0 broken?)
From: Clemens Koller @ 2005-07-18 15:44 UTC (permalink / raw)
To: Fillod Stephane; +Cc: linuxppc-embedded
In-Reply-To: <1CFEB358338412458B21FAA0D78FE86D02CABBE4@rennsmail02.eu.thmulti.com>
Hello, Stephane!
>>In the meanwhile, I got channel 0 working. It seems
>>that the DMA#0 machine got stuck in some configuration from any
>>previous (u-boot?) operation which didn't clean up things
>>properly. I had to explicitly abort a (continously running?)
>>transfer to be able to re-program it in the way I need.
>
> Are you using a BDI2000?
Nope.
> Some init mode uses the DMA#0 for memory zeroing (see your .cfg file).
> Also the DDR ECC U-boot code may use the DMA#0.
> Isn't it possible to reset the DMA#0 from Linux?
Thank you! Yes, that's true! <ACK>
I've checked the U-Boot code, today. The problem comes up when
U-Boot is built with CONFIG_DDR_ECC.
The DMA #0 is used to initialize the DDR prior enabling ECC.
Maybe the DMA doesn't get cleaned up properly.
(I'll have to re-check the registers).
But I can get my mpc85xx_dma "driver" working now.
However I cannot disable ECC when I am in Linux for testing
yet. :-]
I'll need to customize U-Boot without ECC because I don't want
to use it due to performance issues anyway.
But that's getting OT here.
Greets,
Clemens Koller
_______________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Str. 45/1
81379 Muenchen
Germany
http://www.anagramm.de
Phone: +49-89-741518-50
Fax: +49-89-741518-19
^ permalink raw reply
* RE: MPC8540 DMA routines (channel 0 broken?)
From: Fillod Stephane @ 2005-07-18 12:42 UTC (permalink / raw)
To: Clemens Koller; +Cc: linuxppc-embedded
Clemens Koller wrote:
>In the meanwhile, I got channel 0 working. It seems
>that the DMA#0 machine got stuck in some configuration from any
>previous (u-boot?) operation which didn't clean up things
>properly. I had to explicitly abort a (continously running?)
>transfer to be able to re-program it in the way I need.
Are you using a BDI2000?=20
Some init mode uses the DMA#0 for memory zeroing (see your .cfg file).
Also the DDR ECC U-boot code may use the DMA#0.
Isn't it possible to reset the DMA#0 from Linux?
Best regards,
--=20
Stephane
^ permalink raw reply
* Re: MPC8540 DMA routines (channel 0 broken?)
From: Clemens Koller @ 2005-07-18 12:37 UTC (permalink / raw)
To: Clemens Koller; +Cc: linuxppc-embedded
In-Reply-To: <42D7CFC2.3020006@anagramm.de>
Hello again...
In the meanwhile, I got channel 0 working. It seems
that the DMA#0 machine got stuck in some configuration from any
previous (u-boot?) operation which didn't clean up things
properly. I had to explicitly abort a (continously running?)
transfer to be able to re-program it in the way I need.
Best greets,
Clemens Koller
_______________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Str. 45/1
81379 Muenchen
Germany
http://www.anagramm.de
Phone: +49-89-741518-50
Fax: +49-89-741518-19
Clemens Koller wrote:
> Hello,
>
> I am about to bring Jason McMullan's DMA routines up to linux-2.6
> Currently I am in the process of getting the things started step
> by step.
>
> Until today I had a pretty hard time for some basic direct dma
> transfers because it seems that dma channel 0 doesn't work at all
> on my hardware (PPC8540PX833LB 2L71V MSIA QEAD0412).
> The status register always stays 0x0 (means everything is happy and
> okay) but it doesn't copy any data. I cannot even trigger a
> programming error by a wrong configuration!
> But when I let ch 1,2,3 do the work, everything
> seems to work fine!
> I havent found anything in the errata sheets or in the web.
> Can a DMA machine crash that it stays completely unusable?
> Have anybody seen similar things like that?
>
> Some other questions:
> I would also suggest to put my revised and almost
> complete immap_85xx.h and the mpc85xx_dma module into the
> current linux tree (Kumar?) to get things like that
> started more easily.
> Why is Jason's work not in the Kernel?
>
> If you are fine with that, I can offer some patches.
> But I first need to strip tons of the debug stuff from
> the last two weeks. :-/
>
> Best greets,
>
> Clemens Koller
> _______________________________
> R&D Imaging Devices
> Anagramm GmbH
> Rupert-Mayer-Str. 45/1
> 81379 Muenchen
> Germany
>
> http://www.anagramm.de
> Phone: +49-89-741518-50
> Fax: +49-89-741518-19
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
^ permalink raw reply
* Re: bug in arch/ppc/kernel/misc.S: __ashrdi3?
From: Gabriel Paubert @ 2005-07-18 12:14 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1121538297.14393.20.camel@gaston>
On Sun, Jul 17, 2005 at 04:24:57AM +1000, Benjamin Herrenschmidt wrote:
> On Sat, 2005-07-16 at 20:02 +0200, Andreas Schwab wrote:
> > Benjamin Herrenschmidt <benh@kernel.crashing.org> writes:
> >
> > > On Fri, 2005-07-15 at 18:01 +0200, Frank van Maarseveen wrote:
> > >> I don't really grok the code but an operand seems to be missing and the
> > >> assembler makes something out of it I don't trust:
> > >>
> > >> _GLOBAL(__ashrdi3)
> > >> ...
> > >> rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
> > >
> > > This is equivalent to r8 = r7 & 32. It will definitely not do what the
> > > comment says though. If (count < 64), however, it will do something
> > > like r8 = (r7 < 32) ? 0 : 32. Paul, maybe we should dbl check what's
> > > going in there ?
> >
> > r7 is count + 32, and ((count + 32) & 32) is equivalent to the expression
> > above if count < 64.
>
> Ok, with some context it makes more sense :)
Well, I wrote this code, to be fair I actually took most of these
code sequences from the multi precision shift appendix found in
all good PPC instruction set books. The exception is __ashrdi3
which I modified slightly to eliminate a conditional branch.
I tested it fairly exhaustively before submitting it. So the
comments might be wrong (and they will definitely look wrong
without the correct context), but the code very likely gives
the correct result. After all it has been used for quite some
time now without any complaint.
Now obviously the function only works for shift counts below
64, since the C language specification clearly states that
the result is undefined for shift counts equal or larger than
the bit size of the operand (but I felt against rebooting the
machine for an operand outside the allowed range, although
a simple "twlgti count,63" might do it).
Maybe this last point should be clearly stated in a comment.
Regards,
Gabriel
^ permalink raw reply
* Re: boot failure help needed
From: Nuguru Susheel @ 2005-07-18 14:18 UTC (permalink / raw)
To: Wolfgang Denk; +Cc: linuxppc-embedded
In-Reply-To: <20050718105318.CADBE352586@atlas.denx.de>
> >
> > Sorry to ask but what is BAPI ??? (I hope people wont mind answering
> > for newbie questions)
>
> BAPI = BestComm Application Programming Interface, i. e. the code in
> arch/ppc/5xxx_io/bestcomm/
Thanks for guiding me Denk, where can i get it from? ... and how is it
effecting here in this situation ?? sorry for too many questions, but it
will help me to learn and solve the problem ..
^ permalink raw reply
* Re: boot failure help needed
From: Wolfgang Denk @ 2005-07-18 10:53 UTC (permalink / raw)
To: Nuguru Susheel; +Cc: linuxppc-embedded
In-Reply-To: <1121687419.3288.27.camel@localhost.localdomain>
In message <1121687419.3288.27.camel@localhost.localdomain> you wrote:
>
> Sorry to ask but what is BAPI ??? (I hope people wont mind answering
> for newbie questions)
BAPI = BestComm Application Programming Interface, i. e. the code in
arch/ppc/5xxx_io/bestcomm/
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
There are three ways to get something done:
(1) Do it yourself.
(2) Hire someone to do it for you.
(3) Forbid your kids to do it.
^ permalink raw reply
* RE:boot failure help needed
From: Nuguru Susheel @ 2005-07-18 11:50 UTC (permalink / raw)
To: linuxppc-embedded
>> now the problem is that if i use MPC5200 Rev A then
>> the kernel boots without any problem and gets into the
>> command=20
>>=20
>> but when i am using MPC5200 Rev B it shows like this
>You need BAPI v2.2 for the Rev. B processors.
Hi Denk,
Sorry to ask but what is BAPI ??? (I hope people wont mind answering
for newbie questions)=20
--=20
/\ =20
=C2=B0 =C2=B0 =C2=B0 //\\
=C2=B0 ' =C2=B0 =C2=B0 //
------Cheers-//-- -- Software Engineering: Embedded and Realtime System=
s, Embedded Linux
\ =C2=B0 =C2=B0 nSr // '/
\---------//--/ .'-----------------------------------------------------=
---------------'.
\ .,=C2=B0.. // / ( Every program has at least one bug and can be sh=
ortened by at least )
\ .=C2=B0, ./ ( one instruction -- from which, by induction=
, one can deduce that )
\ . . / ( every program can be reduced to one instruction which=
doesn't work. )
\ . / '._____________________________________________________=
_______________ .'
\=3D=3D=3D/
| |
| |
| |
| |
| |
=3D=3D=3D=3D=3D=3D=3D
^ permalink raw reply
* "Wolfgang Denk" <wd@denx.de>
From: Nuguru Susheel @ 2005-07-18 11:47 UTC (permalink / raw)
To: linuxppc-embedded
>> now the problem is that if i use MPC5200 Rev A then
>> the kernel boots without any problem and gets into the
>> command=20
>>=20
>> but when i am using MPC5200 Rev B it shows like this
>You need BAPI v2.2 for the Rev. B processors.
Hi Denk,
Sorry to ask but what is BAPI ??? (I hope people wont mind answering for =
newbie questions)
--=20
/\ =20
=C2=B0 =C2=B0 =C2=B0 //\\
=C2=B0 ' =C2=B0 =C2=B0 //
------Cheers-//-- -- Software Engineering: Embedded and Realtime System=
s, Embedded Linux
\ =C2=B0 =C2=B0 nSr // '/
\---------//--/ .'-----------------------------------------------------=
---------------'.
\ .,=C2=B0.. // / ( Every program has at least one bug and can be sh=
ortened by at least )
\ .=C2=B0, ./ ( one instruction -- from which, by induction=
, one can deduce that )
\ . . / ( every program can be reduced to one instruction which=
doesn't work. )
\ . / '._____________________________________________________=
_______________ .'
\=3D=3D=3D/
| |
| |
| |
| |
| |
=3D=3D=3D=3D=3D=3D=3D
^ permalink raw reply
* Help: How can I port uCLinux to my PowerPC based FPGA
From: zqg zqg @ 2005-07-17 8:24 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 427 bytes --]
Experts:
Hello. I want to immigrate a kind of Linux OS such as uCLinux onto my PowerPC based FPGA (Vertex 2 p50). I expect there are experts could give me some advise. I think I need a bootloader, is the Yaboot OK? Do I need to change it and which part I must change? Help!!
Thanks for reading.
Zhang Qiang Gong
---------------------------------
DO YOU YAHOO!?
雅虎免费G邮箱－中国第一绝无垃圾邮件骚扰超大邮箱
[-- Attachment #2: Type: text/html, Size: 595 bytes --]
^ permalink raw reply
* swsusp for ppc440
From: Hiroyuki Machida @ 2005-07-17 7:16 UTC (permalink / raw)
To: linuxppc-embedded
Today I worked for enabling swsusp for ppc440, again
on kernel 2.6.12.
I wrote some changes for arch/ppc/kernel/swsusp.S, however
kernel was stopped, before hibernation is taken place with
following messages.
# echo disk > state
PM: prepare: Attempting to freeze processes.
Stopping tasks: ===|
Freeing memory... done (0 pages freed)
PM: prepare: OK.
ide-disk 0.0: suspending
serial8250 serial8250: suspending
.. nothing happen
It seems to be stopped at console device.
Do anyone point out where and how to exclude system devices
like console and swap from device suspend procedure as
preparation of swsusp?
Thanks,
Hiroyuki Machida
^ permalink raw reply
* swsusp for ppc440
From: Hiroyuki Machida @ 2005-07-17 7:11 UTC (permalink / raw)
To: linuxppc-embedded
Today I worked for enabling swsusp for ppc440, at 2.6.12.
I wrote changes for arch/ppc/kernel/swsusp.S, however
kernel is stopped, before hibernation is taken place
with following messages.
# echo disk > state
PM: prepare: Attempting to freeze processes.
Stopping tasks: ===|
Freeing memory... done (0 pages freed)
PM: prepare: OK.
ide-disk 0.0: suspending
serial8250 serial8250: suspending
.. nothing happen
It seems to be stopped at console device.
Do anyone point out where and how to exclude system devices
like console and swap from device suspend procedure as
preparation of swsusp?
Thanks,
Hiroyuki Machida
^ permalink raw reply
* [PATCH] ppc32: Register definition for MPC52xx
From: Grant Likely @ 2005-07-17 7:06 UTC (permalink / raw)
To: linuxppc-embedded, Sylvain Munaut
Here are additional register definitions for the MPC52xx. CDM clock
enables and port config bit settings in mpc52xx.h. Registers needed
to support non-UART PSC modes in mpc52xx_psc.h. Drivers which use
these regs/bits are to follow once I'm happy with them, but I thought
that others may be interested in them now.
Cheers,
g.
Signed-off-by: Grant Likely <grant.likely@gdcanada.com>
General Dynamics Canada, Ltd. relinquishes copywrite on this patch to
the public domain
--- k/include/asm-ppc/mpc52xx.h (mode:100644)
+++ l/include/asm-ppc/mpc52xx.h (mode:100644)
@@ -146,6 +146,28 @@ enum ppc_sys_devices {
#define MPC52xx_XLB_ARB_IRQ=09=09(MPC52xx_PERP_IRQ_BASE + 21)
#define MPC52xx_BDLC_IRQ=09=09(MPC52xx_PERP_IRQ_BASE + 22)
=20
+/* CDM Cloke enable bits */
+#define MPC52xx_CDM_CLKENABLE_MEM_CLK=09=09(0x00080000)
+#define MPC52xx_CDM_CLKENABLE_PCI_CLK=09=09(0x00040000)
+#define MPC52xx_CDM_CLKENABLE_LPC_CLK=09=09(0x00020000)
+#define MPC52xx_CDM_CLKENABLE_SIT_CLK=09=09(0x00010000)
+#define MPC52xx_CDM_CLKENABLE_SCOM_CLK=09=09(0x00008000)
+#define MPC52xx_CDM_CLKENABLE_ATA_CLK=09=09(0x00004000)
+#define MPC52xx_CDM_CLKENABLE_ETH_CLK=09=09(0x00002000)
+#define MPC52xx_CDM_CLKENABLE_USB_CLK=09=09(0x00001000)
+#define MPC52xx_CDM_CLKENABLE_SPI_CLK=09=09(0x00000800)
+#define MPC52xx_CDM_CLKENABLE_BDLC_CLK=09=09(0x00000400)
+#define MPC52xx_CDM_CLKENABLE_IRRX_CLK=09=09(0x00000200)
+#define MPC52xx_CDM_CLKENABLE_IRTX_CLK=09=09(0x00000100)
+#define MPC52xx_CDM_CLKENABLE_PSC345_CLK=09(0x00000080)
+#define MPC52xx_CDM_CLKENABLE_PSC2_CLK=09=09(0x00000040)
+#define MPC52xx_CDM_CLKENABLE_PSC1_CLK=09=09(0x00000020)
+#define MPC52xx_CDM_CLKENABLE_PSC6_CLK=09=09(0x00000010)
+#define MPC52xx_CDM_CLKENABLE_MSCAN_CLK=09=09(0x00000008)
+#define MPC52xx_CDM_CLKENABLE_I2C_CLK=09=09(0x00000004)
+#define MPC52xx_CDM_CLKENABLE_TIMER_CLK=09=09(0x00000002)
+#define MPC52xx_CDM_CLKENABLE_GPIO_CLK=09=09(0x00000001)
+
=20
=20
/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
@@ -266,6 +288,49 @@ struct mpc52xx_rtc {
};
=20
/* GPIO */
+#define PORT_CONFIG_CS1=09=09=090x80000000
+#define PORT_CONFIG_ALT_MASK=09=090x30000000
+#define PORT_CONFIG_CS7=09=09=090x08000000
+#define PORT_CONFIG_CS6=09=09=090x04000000
+#define PORT_CONFIG_ATA=09=09=090x03000000
+#define PORT_CONFIG_IR_USB_CLK=09=090x00800000
+#define PORT_CONFIG_IRDA_MASK=09=090x00700000 /* PSC6 */
+#define PORT_CONFIG_IRDA_GPIO=09=090x00000000
+#define PORT_CONFIG_IRDA_UART=09=090x00500000
+#define PORT_CONFIG_IRDA_CODEC=09=090x00700000
+#define PORT_CONFIG_ETHER_MASK=09=090x000F0000
+#define PORT_CONFIG_PCI_DIS=09=090x00008000
+#define PORT_CONFIG_USB_SE=09=090x00004000 /* Single ended mode */
+#define PORT_CONFIG_USB_MASK=09=090x00004000 /* (USB1 or 2 UARTs) */
+#define PORT_CONFIG_USB_USB=09=090x00001000
+#define PORT_CONFIG_USB_2UART=09=090x00002000
+#define PORT_CONFIG_PSC3_MASK=09=090x00000F00
+#define PORT_CONFIG_PSC3_GPIO=09=090x00000000
+#define PORT_CONFIG_PSC3_USB2=09=090x00000100
+#define PORT_CONFIG_PSC3_UART=09=090x00000400
+#define PORT_CONFIG_PSC3_UARTE_CD=090x00000500
+#define PORT_CONFIG_PSC3_CODEC=09=090x00000600
+#define PORT_CONFIG_PSC3_CODEC_MCLK=090x00000700
+#define PORT_CONFIG_PSC3_SPI=09=090x00000800
+#define PORT_CONFIG_PSC3_SPI_UART=090x00000C00
+#define PORT_CONFIG_PSC3_SPI_UARTE=090x00000D00
+#define PORT_CONFIG_PSC3_SPI_CODEC=090x00000E00
+#define PORT_CONFIG_PSC2_MASK=09=090x00000070
+#define PORT_CONFIG_PSC2_GPIO=09=090x00000000
+#define PORT_CONFIG_PSC2_CAN=09=090x00000010
+#define PORT_CONFIG_PSC2_AC97=09=090x00000020
+#define PORT_CONFIG_PSC2_UART=09=090x00000040
+#define PORT_CONFIG_PSC2_UARTE_CD=090x00000050
+#define PORT_CONFIG_PSC2_CODEC=09=090x00000060
+#define PORT_CONFIG_PSC2_CODEC_MCLK=090x00000070
+#define PORT_CONFIG_PSC1_MASK=09=090x00000007
+#define PORT_CONFIG_PSC1_GPIO=09=090x00000000
+#define PORT_CONFIG_PSC1_AC97=09=090x00000002
+#define PORT_CONFIG_PSC1_UART=09=090x00000004
+#define PORT_CONFIG_PSC1_UARTE_CD=090x00000005
+#define PORT_CONFIG_PSC1_CODEC=09=090x00000006
+#define PORT_CONFIG_PSC1_CODEC_MCLK=090x00000007
+
struct mpc52xx_gpio {
=09u32=09port_config;=09/* GPIO + 0x00 */
=09u32=09simple_gpioe;=09/* GPIO + 0x04 */
--- k/include/asm-ppc/mpc52xx_psc.h (mode:100644)
+++ l/include/asm-ppc/mpc52xx_psc.h (mode:100644)
@@ -72,6 +72,51 @@
#define MPC52xx_PSC_D_CTS=09=090x10
#define MPC52xx_PSC_D_DCD=09=090x20
=20
+/* PSC Serial Interface Control Register (SICR) bits */
+/* SICR Field masks */
+#define MPC52xx_PSC_SICR_ACRB=09=090x80000000
+#define MPC52xx_PSC_SICR_AWR=09=090x40000000
+#define MPC52xx_PSC_SICR_DTS1=09=090x20000000
+#define MPC52xx_PSC_SICR_SHDIR=09=090x10000000
+#define MPC52xx_PSC_SICR_SIM=09=090x0F000000
+#define MPC52xx_PSC_SICR_GENCLK=09=090x00800000
+#define MPC52xx_PSC_SICR_MULTIWD=090x00400000
+#define MPC52xx_PSC_SICR_CLKPOL=09=090x00200000
+#define MPC52xx_PSC_SICR_SYNCPOL=090x00100000
+#define MPC52xx_PSC_SICR_CELLSLAVE=090x00080000
+#define MPC52xx_PSC_SICR_CELL2XCLK=090x00040000
+#define MPC52xx_PSC_SICR_SPI=09=090x00008000
+#define MPC52xx_PSC_SICR_MSTR=09=090x00004000
+#define MPC52xx_PSC_SICR_CPOL=09=090x00002000
+#define MPC52xx_PSC_SICR_CPHA=09=090x00001000
+#define MPC52xx_PSC_SICR_USEEOF=09=090x00000800
+/* Operation modes */
+#define MPC52xx_PSC_SICR_SIM_UART=09=090x00000000
+#define MPC52xx_PSC_SICR_SIM_UART_DCD=09=090x08000000
+#define MPC52xx_PSC_SICR_SIM_CODEC8=09=090x01000000
+#define MPC52xx_PSC_SICR_SIM_CODEC16=09=090x02000000
+#define MPC52xx_PSC_SICR_SIM_AC97=09=090x03000000
+#define MPC52xx_PSC_SICR_SIM_SIR=09=090x04000000
+#define MPC52xx_PSC_SICR_SIM_SIR_DCD=09=090x0C000000
+#define MPC52xx_PSC_SICR_SIM_MIR=09=090x05000000
+#define MPC52xx_PSC_SICR_SIM_FIR=09=090x06000000
+#define MPC52xx_PSC_SICR_SIM_CODEC24=09=090x07000000
+#define MPC52xx_PSC_SICR_SIM_CODEC32=09=090x0F000000
+
+/* IRCR1 bit masks */
+#define MPC52xx_PSC_IRCR1_FD=09=09=090x04
+#define MPC52xx_PSC_IRCR1_SIPEN=09=09=090x02
+#define MPC52xx_PSC_IRCR1_SPUL=09=09=090x01
+
+/* IRCR2 bit masks */
+#define MPC52xx_PSC_IRCR2_SIPREQ=09=090x04
+#define MPC52xx_PSC_IRCR2_ABORT=09=09=090x02
+#define MPC52xx_PSC_IRCR2_NXTEOF=09=090x01
+
+/* Codec Clock Register fields */
+#define MPC52xx_PSC_CCR_FRAME_SYNC_DIV=09=090xFF00
+#define MPC52xx_PSC_CCR_BIT_CLK_DIV=09=090xFF00
+
/* PSC mode fields */
#define MPC52xx_PSC_MODE_5_BITS=09=09=090x00
#define MPC52xx_PSC_MODE_6_BITS=09=09=090x01
^ permalink raw reply
* ppc_sys.c with platform device model or create opb bus?
From: Yasushi SHOJI @ 2005-07-17 6:26 UTC (permalink / raw)
To: linuxppc-embedded
Hi all,
I've been reading some posts regarding to the transition of OCP to
platform device mode while searching for a good way to implement a
device driver for our fpga base platform. And now I have one question
regarding to ppc_sys.c
should I use ppc_sys_*() for platform like fpga?
since I'm working on FPGA base platform, ppc_sys_spec seems to be too
static. that is, IMHO, having static array of device list isn't ideal
for a dynamic system like fpga.
I feel that the ppc_sys_spec is for SoC, which doesn't dynamically
change the peripherals it has. otoh, fpga based platform can have
arbitrary number of devices if you configured so.
I usually implement a device with PLB or OPB. for those bus, should I
use platform device model or create new buses for each?
regards,
--
yashi
^ permalink raw reply
* Re: 8272ADS and Linux 2.6.12
From: Mike Rapoport @ 2005-07-17 6:52 UTC (permalink / raw)
To: SIP COP 009; +Cc: linuxppc-embedded
In-Reply-To: <5a4792c0050713235574522cfb@mail.gmail.com>
SIP COP 009 wrote:
>Hello,
>
>We have a MPC8272 Eval Board which came with Linux 2.4 and U-boot. We
>wanted to move to 2.6. I downloaded the latest 2.6.12 sources and
>compiled the sources for this platform. The kernel is built, have run
>the mkimage tool, but the kernel wont boot. It just hangs after
>decompressing the image.
>
>
>
>Any ideas ? Anything different that needs to be done for 2.6 ? Or any
>known issues ?
>
>
>
If you're using the u-boot that came with MPC8272 Eval board it may
happen that BCSR is mapped differently in u-boot and the kernel 2.6.
That's what happened when I tried to boot linux 2.6 on MPC8272ADS. Check
the value of CFG_BCSR in u-boot/include/configs/MPC8260ADS.h and
BCSR_ADDR in linux/arch/ppc/platforms/pq2ads.h
>Thanks!
>ashutosh
>
>
--
Sincerely yours,
Mike
^ permalink raw reply
* Re: Re: help: FCC_ENET OF MPC8250?
From: gqbenjamin @ 2005-07-17 4:04 UTC (permalink / raw)
To: Alex Zeffertt; +Cc: linuxppc-embedded
Thanks for your replying.
I have resolved that problem.
I found a bug in function *fcc_enet_start_xmit*.
In linux-2.6.12 and linux-2.6.9, the bug had been
patched by Dan Malek.
In fcc_net.c of linux-2.6.5,
at the end of *fcc_enet_start_xmit* :
if (bdp->cbd_sc & BD_ENET_TX_READY) {
netif_stop_queue(dev);
cep->tx_full = 1;
}
This cann't be used to decide TX-BD is full.
If the rate of transmit is too high, the *skbuf*
in TX-BD probably have not chance to be free befor
a new one had been put in. So, memory been lost.
> On Wed, 13 Jul 2005 10:42:52 +0800 (CST)
> gqbenjamin@21cn.com wrote:
>
> > Hi,
> >
> > I use a device, like SMARTBITS, to test the Ethernet rate of mpc8250. The kernel is linux-2.4.20
> > with CONFIG_FCC_LXT971 and CONFIG_USE_MDIO, and do 'cat "1">/proc/sys/net/ipv4/ip_forward'.
> >
> > If the rate of sending IP packet been set too high, for example 100 Mbps Full Duplex and each
> > packet is 1514 Bytes. Later, the kernel print '... Memory squeeze, dropping packet' on uart. Stop
> > sending IP packet and do 'cat /proc/meminfo', the *MemFree* become small.
> >
> > Try again, the *MemFree* become smaller, just look like some allocated memory (skbuf) do not be
> > free.
> >
> > Final, the kernel break down, because all memory have been used.
>
>
> It sounds to me like the problem may be that fcc_enet_rx() is consuming all the memory. This
> function is called in interrupt context and spins round the rx buffer descriptor ring until it finds
> an empty buffer descriptor. There is no check to stop it going round more than once and each time
> it finds a BD it does a dev_alloc_skb().
>
> It is possible that you are receiving data at a high enough rate that fcc_enet_rx() never exits.
>
> What is more likely is that there isn't enough time between rx interrupts for the CPU to tx all the
> queued packets.
>
>
> >
> > Q. How can I do to let kernel do not break down? Is it a kernel promblem?
> >
>
> This is just a guess, but... it may help to move fcc_enet_rx() from the interrupt handler to a
> bottom half. If you do this you should also ensure that it cannot process the rx buffer descriptor
> ring more than once per call. This may give the CPU *more* chance to tx queued packets by lowering
> the rx priority a little.
>
> I don't know if this would work but I'd be interested to find out.
>
> Alex
----------------------------------------------
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^ permalink raw reply
* Re: bug in arch/ppc/kernel/misc.S: __ashrdi3?
From: Benjamin Herrenschmidt @ 2005-07-16 18:24 UTC (permalink / raw)
To: Andreas Schwab; +Cc: linuxppc-dev
In-Reply-To: <jeackmbped.fsf@sykes.suse.de>
On Sat, 2005-07-16 at 20:02 +0200, Andreas Schwab wrote:
> Benjamin Herrenschmidt <benh@kernel.crashing.org> writes:
>
> > On Fri, 2005-07-15 at 18:01 +0200, Frank van Maarseveen wrote:
> >> I don't really grok the code but an operand seems to be missing and the
> >> assembler makes something out of it I don't trust:
> >>
> >> _GLOBAL(__ashrdi3)
> >> ...
> >> rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
> >
> > This is equivalent to r8 = r7 & 32. It will definitely not do what the
> > comment says though. If (count < 64), however, it will do something
> > like r8 = (r7 < 32) ? 0 : 32. Paul, maybe we should dbl check what's
> > going in there ?
>
> r7 is count + 32, and ((count + 32) & 32) is equivalent to the expression
> above if count < 64.
Ok, with some context it makes more sense :)
Ben.
^ permalink raw reply
* Re: bug in arch/ppc/kernel/misc.S: __ashrdi3?
From: Andreas Schwab @ 2005-07-16 18:02 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1121535588.14393.18.camel@gaston>
Benjamin Herrenschmidt <benh@kernel.crashing.org> writes:
> On Fri, 2005-07-15 at 18:01 +0200, Frank van Maarseveen wrote:
>> I don't really grok the code but an operand seems to be missing and the
>> assembler makes something out of it I don't trust:
>>
>> _GLOBAL(__ashrdi3)
>> ...
>> rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
>
> This is equivalent to r8 = r7 & 32. It will definitely not do what the
> comment says though. If (count < 64), however, it will do something
> like r8 = (r7 < 32) ? 0 : 32. Paul, maybe we should dbl check what's
> going in there ?
r7 is count + 32, and ((count + 32) & 32) is equivalent to the expression
above if count < 64.
Andreas.
--
Andreas Schwab, SuSE Labs, schwab@suse.de
SuSE Linux Products GmbH, Maxfeldstraße 5, 90409 Nürnberg, Germany
Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for something completely different."
^ permalink raw reply
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