* Re: [RFC PATCH 1/4] PHY Abstraction Layer III (now with more splitiness)
From: Francois Romieu @ 2005-07-25 21:06 UTC (permalink / raw)
To: Andy Fleming; +Cc: Netdev, linuxppc-embedded
In-Reply-To: <Pine.LNX.4.61.0507251134470.15537@cde-tx32-ldt113.sps.mot.com>
Andy Fleming <afleming@freescale.com> :
> This patch contains the PHY layer itself, no phy drivers
[...]
> diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig
> new file mode 100644
> --- /dev/null
> +++ b/drivers/net/phy/Kconfig
[...]
> +config MARVELL_PHY
> + bool "Drivers for Marvell PHYs"
> + depends on PHYLIB
> + ---help---
> + Currently has a driver for the 88E1011S
> +
> +config DAVICOM_PHY
> + bool "Drivers for Davicom PHYs"
> + depends on PHYLIB
> + ---help---
> + Currently supports dm9161e and dm9131
[snip]
They try to escape...
[...]
> diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile
> new file mode 100644
> --- /dev/null
> +++ b/drivers/net/phy/Makefile
> @@ -0,0 +1,9 @@
> +# Makefile for Linux PHY drivers
> +
> +obj-$(CONFIG_PHYLIB) += phy.o phy_device.o mdio_bus.o
> +
> +obj-$(CONFIG_MARVELL_PHY) += marvell.o
> +obj-$(CONFIG_DAVICOM_PHY) += davicom.o
> +obj-$(CONFIG_CICADA_PHY) += cicada.o
> +obj-$(CONFIG_LXT_PHY) += lxt.o
> +obj-$(CONFIG_QSEMI_PHY) += qsemi.o
...and they are not alone. :o)
> diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
> new file mode 100644
> --- /dev/null
> +++ b/drivers/net/phy/mdio_bus.c
> @@ -0,0 +1,175 @@
[...]
> +int mdiobus_register(struct mii_bus *bus)
> +{
> + int i;
> + int err = 0;
> +
> + spin_lock_init(&bus->mdio_lock);
> +
> + if (NULL == bus || NULL == bus->name ||
> + NULL == bus->read ||
> + NULL == bus->write)
Be spartan:
if (!bus || !bus->name || !bus->read || !bus->write)
> + return -EINVAL;
> +
> + if (bus->reset)
> + bus->reset(bus);
> +
> + for (i=0; i < PHY_MAX_ADDR; i++) {
for (i = 0; ...
> + struct phy_device *phydev;
> +
> + phydev = get_phy_device(bus, i);
> +
> + /* There's a PHY at this address
> + * We need to set:
> + * 1) IRQ
> + * 2) bus_id
> + * 3) parent
> + * 4) bus
> + * 5) mii_bus
> + * And, we need to register it */
> + if (phydev) {
> + phydev->irq = bus->irq[i];
> +
> + phydev->dev.parent = bus->dev;
> +
> + phydev->dev.bus = &mdio_bus_type;
> +
> + phydev->bus = bus;
> +
> + sprintf(phydev->dev.bus_id, "phy%d:%d", bus->id,
Imho you are going a bit too far with empty lines. Not a real issue.
> i);
Something decided to wrap the lines after you did the patch. It appears
several times in the patch (+ extra tabs/spaces at the end of the lines:
there are plenty of nice colorised editors around).
> +
> + err = device_register(&phydev->dev);
> +
> + if (err)
> + printk("phy %d did not register (%d)\n",
> + i, err);
Missing KERN_SOMETHING in the printk.
> +
> + /* If get_phy_device returned NULL, it may be
> + * because an error occurred. If so, we return
> + * that error */
> + } else if (errno)
> + return errno;
I'd rather use ERR_PTR/PTR_ERR/IS_ERR + goto in the first place
(then the previous printk will fit on a single line).
> +
> + bus->phy_map[i] = phydev;
> + }
> +
> + pr_info("%s: probed\n", bus->name);
> +
> + return err;
> +}
> +EXPORT_SYMBOL(mdiobus_register);
> +
> +void mdiobus_unregister(struct mii_bus *bus)
> +{
> + int i;
> +
> + for (i=0; i < PHY_MAX_ADDR; i++)
for( i = 0, ... + missing brace.
[...]
> +static int mdio_bus_suspend(struct device * dev, u32 state)
> +{
> + int ret = 0;
> +
> + if (dev->driver && dev->driver->suspend) {
> + ret = dev->driver->suspend(dev, state, SUSPEND_DISABLE);
> + if (ret == 0)
> + ret = dev->driver->suspend(dev, state,
> SUSPEND_SAVE_STATE);
> + if (ret == 0)
> + ret = dev->driver->suspend(dev, state,
> SUSPEND_POWER_DOWN);
> + }
Copy/paste abuse:
struct device_driver *drv = dev->driver;
(appears in several functions)
[...]
> +struct bus_type mdio_bus_type = {
> + .name = "mdio_bus",
> + .match = mdio_bus_match,
> + .suspend= mdio_bus_suspend,
^^
[...]
> diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
> new file mode 100644
> --- /dev/null
> +++ b/drivers/net/phy/phy.c
[...]
> +int phy_read(struct phy_device *phydev, u16 regnum);
> +int phy_write(struct phy_device *phydev, u16 regnum, u16 val);
> +void phy_change(void *data);
> +void phy_timer(unsigned long data);
phy_read and phy_write do not need to be forward-declared.
Not sure if it is possible for phy_{change/timer} as well.
> +
> +/* Convenience function to print out the current phy status
> + */
> +void phy_print_status(struct phy_device *phydev)
> +{
> + pr_info("%s: Link is %s", phydev->dev.bus_id,
> + phydev->link ? "Up" : "Down");
> + if (phydev->link)
> + printk(" - %d/%s", phydev->speed,
Missing KERN_SOMETHING in the printk.
[...]
> +static inline int phy_aneg_done(struct phy_device *phydev)
> +{
> + int retval;
> +
> + retval = phy_read(phydev, MII_BMSR);
> +
> + if (retval < 0)
> + return retval;
> +
> + return retval & BMSR_ANEGCOMPLETE;
Please use a ternary operator.
> +}
> +
> +/* phy_start_aneg
> + *
> + * description: Calls the PHY driver's config_aneg, and then
> + * sets the PHY state to PHY_AN if auto-negotiation is enabled,
> + * and to PHY_FORCING if auto-negotiation is disabled. Unless
> + * the PHY is currently HALTED.
> + */
> +int phy_start_aneg(struct phy_device *phydev)
> +{
> + int err = 0;
Unneeded initialization.
> +
> + spin_lock(&phydev->lock);
> +
> + if (AUTONEG_DISABLE == phydev->autoneg)
> + phy_sanitize_settings(phydev);
> +
> + err = phydev->drv->config_aneg(phydev);
> +
> + if (err < 0)
> + return err;
The lock should be released. Add a 'goto out_unlock;' ?
> +
> + if (phydev->state != PHY_HALTED) {
> + if (AUTONEG_ENABLE == phydev->autoneg) {
> + phydev->state = PHY_AN;
> + phydev->link_timeout = PHY_AN_TIMEOUT;
> + } else {
> + phydev->state = PHY_FORCING;
> + phydev->link_timeout = PHY_FORCE_TIMEOUT;
> + }
> + }
> +
out_unlock:
> + spin_unlock(&phydev->lock);
> +
> + return err;
> +}
> +EXPORT_SYMBOL(phy_start_aneg);
> +
> +
[...]
> +/* A mapping of all SUPPORTED settings to speed/duplex */
> +static struct phy_setting settings[] = {
> + { .speed = 10000, .duplex = DUPLEX_FULL,
> + .setting = SUPPORTED_10000baseT_Full,
> + },
> + { .speed = SPEED_1000, .duplex = DUPLEX_FULL,
> + .setting = SUPPORTED_1000baseT_Full,
> + },
> + { .speed = SPEED_1000, .duplex = DUPLEX_HALF,
> + .setting = SUPPORTED_1000baseT_Half,
> + },
> + { .speed = SPEED_100, .duplex = DUPLEX_FULL,
> + .setting = SUPPORTED_100baseT_Full,
> + },
> + { .speed = SPEED_100, .duplex = DUPLEX_HALF,
> + .setting = SUPPORTED_100baseT_Half,
> + },
> + { .speed = SPEED_10, .duplex = DUPLEX_FULL,
> + .setting = SUPPORTED_10baseT_Full,
> + },
> + { .speed = SPEED_10, .duplex = DUPLEX_HALF,
> + .setting = SUPPORTED_10baseT_Half,
> + },
> +};
Would you veto some macro to initialise this array ?
> +
> +#define MAX_NUM_SETTINGS (sizeof(settings)/sizeof(struct phy_setting))
The kernel provides ARRAY_SIZE
[...]
> +static inline int phy_find_setting(int speed, int duplex)
> +{
> + int idx = 0;
> +
> + while (idx < MAX_NUM_SETTINGS &&
> + (settings[idx].speed != speed ||
> + settings[idx].duplex != duplex))
> + idx++;
"for" loop in disguise ?
> +
> + return idx < MAX_NUM_SETTINGS ? idx : MAX_NUM_SETTINGS - 1;
Ok (dunno if "idx % MAX_NUM_SETTINGS" is more idiomatic or not).
[...]
> +int phy_start_interrupts(struct phy_device *phydev)
> +{
> + int err = 0;
> +
> + INIT_WORK(&phydev->phy_queue, phy_change, phydev);
> +
> + if (request_irq(phydev->irq, phy_interrupt,
> + SA_SHIRQ,
> + "phy_interrupt",
> + phydev) < 0) {
Please, don't do that :o(
err = request_irq(phydev->irq, phy_interrupt, SA_SHIRQ,
"phy_interrupt", phydev);
if (err < 0)
...
> + printk(KERN_ERR "%s: Can't get IRQ %d (PHY)\n",
> + phydev->bus->name,
> + phydev->irq);
> + phydev->irq = PHY_POLL;
> + return 0;
The description of the function says "Returns 0 on success".
[...]
> +/* Bring down the PHY link, and stop checking the status. */
> +void phy_stop(struct phy_device *phydev)
> +{
> + spin_lock(&phydev->lock);
> +
> + if (PHY_HALTED == phydev->state) {
> + spin_unlock(&phydev->lock);
> + return;
> + }
"goto out_unlock;"
> +
> + if (phydev->irq != PHY_POLL) {
> + /* Clear any pending interrupts */
> + phy_clear_interrupt(phydev);
> +
> + /* Disable PHY Interrupts */
> + phy_config_interrupt(phydev, PHY_INTERRUPT_DISABLED);
> + }
> +
> + phydev->state = PHY_HALTED;
> +
> + spin_unlock(&phydev->lock);
> +}
[...]
> +struct phy_device * get_phy_device(struct mii_bus *bus, uint addr)
> +{
uint ?
> + int phy_reg;
> + u32 phy_id;
> + struct phy_device *dev = NULL;
> +
> + errno = 0;
A bit ugly.
> +
> + /* Grab the bits from PHYIR1, and put them
> + * in the upper half */
> + phy_reg = bus->read(bus, addr, MII_PHYSID1);
> +
> + if (phy_reg < 0) {
> + errno = phy_reg;
> + return NULL;
dev = ERR_PTR(phy_reg);
goto out;
...
> + }
> +
> + phy_id = (phy_reg & 0xffff) << 16;
> +
> + /* Grab the bits from PHYIR2, and put them in the lower half */
> + phy_reg = bus->read(bus, addr, MII_PHYSID2);
> +
> + if (phy_reg < 0) {
> + errno = phy_reg;
> + return NULL;
> + }
> +
> + phy_id |= (phy_reg & 0xffff);
> +
> + /* If the phy_id is all Fs, there is no device there */
> + if (0xffffffff == phy_id)
> + return NULL;
> +
> + /* Otherwise, we allocate the device, and initialize the
> + * default values */
> + dev = kmalloc(sizeof(*dev), GFP_KERNEL);
> +
> + if (NULL == dev) {
> + errno = -ENOMEM;
> + return NULL;
> + }
> +
> + memset(dev, 0, sizeof(*dev));
The kernel provides kcalloc.
[...]
> +static int phy_compare_id(struct device *dev, void *data)
> +{
> + const char *name = data;
> +
> + if (strcmp(name, dev->bus_id) == 0)
> + return 1;
> + return 0;
Ternary operator ?
> +}
> +
> +struct phy_device *phy_attach(struct net_device *dev,
> + const char *phy_id, u32 flags)
> +{
> + struct phy_device *phydev = NULL;
Useless initialization.
> + struct bus_type *bus = &mdio_bus_type;
> + struct device *d;
> +
> + /* Search the list of PHY devices on the mdio bus for the
> + * PHY with the requested name */
> + d = bus_find_device(bus, NULL, (void *)phy_id, phy_compare_id);
> +
> + if (d) {
> + phydev = to_phy_device(d);
> + } else {
> + printk(KERN_ERR "%s not found\n", phy_id);
> + errno = -ENODEV;
> + return NULL;
> + }
> +
> + /* Assume that if there is no driver, that it doesn't
> + * exist, and we should use the genphy driver. */
> + if (NULL == phydev->dev.driver) {
> + int err;
> + down_write(&phydev->dev.bus->subsys.rwsem);
> + phydev->dev.driver = &genphy_driver.driver;
> +
> + err = phydev->dev.driver->probe(&phydev->dev);
Would it be possible to s/phydev->dev/d/ ?
--
Ueimor
^ permalink raw reply
* Virtex-II Pro - PCI Host
From: Joshua Lamorie @ 2005-07-25 21:12 UTC (permalink / raw)
To: linuxppc-embedded
Gidday there,
We are trying to put a PCI host into a Virtex-II Pro. We have seen that
the latest development board from Xilinx (ml310, link at end of email)
has PCI host and MontaVista has some form of Linux support. However, I
can't seem to find any kernel source around with any of this code. I
could easily have missed it.
Anyone know where I might find this code?
Thanks.
Joshua
p.s. The skinny on the ml310...
http://www.xilinx.com/products/boards/ml310/current/#pci
--
Xiphos Technologies
(514) 848-9640 x227
(514) 848-9644 fax
www.xiplink.com
_______________________________________________
The information transmitted is intended only for the
person or entity to which it is addressed and may contain
confidential and/or privileged material. If you have
received this in error, please contact the sender and delete
this communication and any copy immediately. Thank you.
^ permalink raw reply
* Seeking HOW-TO on bring up EP MPC8245 board
From: Steve Snyder @ 2005-07-25 15:28 UTC (permalink / raw)
To: linuxppc-embedded
My company has just purchased a couple of MPC8245 boards from Embedded
Planet. The boards come with just the boot loader (PlanetCore v1.03)
installed. Now I'm trying to get the boards to boot a Linux kernel.
I downloaded the software ISO image (ppc-2005-03-07.iso) from EP's
website. No problems seen when building the kernel with their
default config file. Before taking the step on burning the kernel
image to flash, I'm loading the image into RAM (via TFTP) and running
it.
When I attempt to run the kernel image nothing happens. No error
message, or serial output of any find.
The EP documentation is pretty generic since the board can be used to
run just about any OS. Is there a HOW-TO on how to get this, or a
similar, board up and running with Linux?
Thanks.
^ permalink raw reply
* platform/board removal update
From: Kumar Gala @ 2005-07-26 4:18 UTC (permalink / raw)
To: Embedded PPC Linux list, linuxppc-dev list
All,
I'm going to be sending a series of patches to remove the following
board/platforms (as discussed earlier):
adir
ash
beech
cedar
ep405
k2
mcpn765
menf1
oak
pcore
rainier
redwood
sm850
spd823ts
The following board/platforms are currently not building:
apus
gemini
lite5200
prpmc750
radstone_ppc7d
rpxcllf
TQM8260
At OLS, Paul and the various sub-arch maintainers (in attendance)
discussed that if the set of board/platforms that are not building
are not fixed by the release of 2.6.15 we will be removing support
for them. Some of the build issues are trivial and I may look at
fixing them myself. For all of the systems that I dont fix I'll be
sending a patch marking them BROKEN in the Kconfig file. If these
systems are still BROKEN after 2.6.15 we will be removing them.
- kumar
^ permalink raw reply
* [PATCH] ppc32: Fix building of prpmc750
From: Kumar Gala @ 2005-07-26 5:17 UTC (permalink / raw)
To: Andrew Morton; +Cc: linux-kernel, linuxppc-embedded
Updated prpmc750 platform code to include serial_reg.h to fix building.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
---
commit c6d47b85a4f5743a0328ab6388a085744e00ac48
tree 41a83749e10e4dc70feefcd75396c8c5385b8fb1
parent dc5a25603c1f8984f10f9e93d91b4d95b2ce6d9d
author Kumar K. Gala <kumar.gala@freescale.com> Tue, 26 Jul 2005 00:12:37 -0500
committer Kumar K. Gala <kumar.gala@freescale.com> Tue, 26 Jul 2005 00:12:37 -0500
arch/ppc/platforms/prpmc750.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/arch/ppc/platforms/prpmc750.c b/arch/ppc/platforms/prpmc750.c
--- a/arch/ppc/platforms/prpmc750.c
+++ b/arch/ppc/platforms/prpmc750.c
@@ -29,6 +29,7 @@
#include <linux/ide.h>
#include <linux/root_dev.h>
#include <linux/slab.h>
+#include <linux/serial_reg.h>
#include <asm/byteorder.h>
#include <asm/system.h>
^ permalink raw reply
* [PATCH] ppc32: Fix building of radstone_ppc7d
From: Kumar Gala @ 2005-07-26 5:17 UTC (permalink / raw)
To: Andrew Morton; +Cc: linux-kernel, linuxppc-embedded
Updated radstone_ppc7d_defconfig to include the ds1337 driver which
is used by the platform code. This fixes the link error when building.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
---
commit dc5a25603c1f8984f10f9e93d91b4d95b2ce6d9d
tree 84b86f1b54b4d703a447aa6650ffe4a3e398ed13
parent b9540327726da964f8ac27185d01ccf244ea8e46
author Kumar K. Gala <kumar.gala@freescale.com> Tue, 26 Jul 2005 00:08:58 -0500
committer Kumar K. Gala <kumar.gala@freescale.com> Tue, 26 Jul 2005 00:08:58 -0500
arch/ppc/configs/radstone_ppc7d_defconfig | 234 +++++++++++++++++------------
1 files changed, 135 insertions(+), 99 deletions(-)
diff --git a/arch/ppc/configs/radstone_ppc7d_defconfig b/arch/ppc/configs/radstone_ppc7d_defconfig
--- a/arch/ppc/configs/radstone_ppc7d_defconfig
+++ b/arch/ppc/configs/radstone_ppc7d_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.11
-# Tue Mar 15 14:31:19 2005
+# Linux kernel version: 2.6.13-rc3
+# Tue Jul 26 00:02:09 2005
#
CONFIG_MMU=y
CONFIG_GENERIC_HARDIRQS=y
@@ -11,6 +11,7 @@ CONFIG_HAVE_DEC_LOCK=y
CONFIG_PPC=y
CONFIG_PPC32=y
CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
#
# Code maturity level options
@@ -18,6 +19,7 @@ CONFIG_GENERIC_NVRAM=y
CONFIG_EXPERIMENTAL=y
CONFIG_CLEAN_COMPILE=y
CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
#
# General setup
@@ -35,6 +37,8 @@ CONFIG_KOBJECT_UEVENT=y
CONFIG_EMBEDDED=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
@@ -67,9 +71,12 @@ CONFIG_6xx=y
# CONFIG_POWER3 is not set
# CONFIG_POWER4 is not set
# CONFIG_8xx is not set
+# CONFIG_E200 is not set
# CONFIG_E500 is not set
+CONFIG_PPC_FPU=y
CONFIG_ALTIVEC=y
# CONFIG_TAU is not set
+# CONFIG_KEXEC is not set
# CONFIG_CPU_FREQ is not set
CONFIG_PPC_GEN550=y
# CONFIG_PM is not set
@@ -84,21 +91,18 @@ CONFIG_PPC_STD_MMU=y
# CONFIG_KATANA is not set
# CONFIG_WILLOW is not set
# CONFIG_CPCI690 is not set
-# CONFIG_PCORE is not set
# CONFIG_POWERPMC250 is not set
# CONFIG_CHESTNUT is not set
# CONFIG_SPRUCE is not set
+# CONFIG_HDPU is not set
# CONFIG_EV64260 is not set
# CONFIG_LOPEC is not set
-# CONFIG_MCPN765 is not set
# CONFIG_MVME5100 is not set
# CONFIG_PPLUS is not set
# CONFIG_PRPMC750 is not set
# CONFIG_PRPMC800 is not set
# CONFIG_SANDPOINT is not set
CONFIG_RADSTONE_PPC7D=y
-# CONFIG_ADIR is not set
-# CONFIG_K2 is not set
# CONFIG_PAL4 is not set
# CONFIG_GEMINI is not set
# CONFIG_EST8260 is not set
@@ -121,10 +125,18 @@ CONFIG_MV64X60_NEW_BASE=0xfef00000
# CONFIG_SMP is not set
# CONFIG_PREEMPT is not set
# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_BINFMT_ELF=y
CONFIG_BINFMT_MISC=y
CONFIG_CMDLINE_BOOL=y
CONFIG_CMDLINE="console=ttyS0,9600"
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
#
# Bus options
@@ -155,6 +167,69 @@ CONFIG_TASK_SIZE=0x80000000
CONFIG_BOOT_LOAD=0x00800000
#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_NETFILTER is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+CONFIG_BRIDGE=y
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+
+#
# Device Drivers
#
@@ -203,6 +278,7 @@ CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
CONFIG_MTD_CFI_INTELEXT=y
# CONFIG_MTD_CFI_AMDSTD is not set
# CONFIG_MTD_CFI_STAA is not set
@@ -210,13 +286,13 @@ CONFIG_MTD_CFI_UTIL=y
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_ABSENT is not set
-# CONFIG_MTD_XIP is not set
#
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_PLATRAM is not set
#
# Self-contained MTD device drivers
@@ -299,6 +375,7 @@ CONFIG_BLK_DEV_SD=y
CONFIG_BLK_DEV_SR=y
CONFIG_BLK_DEV_SR_VENDOR=y
CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
#
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@@ -331,7 +408,6 @@ CONFIG_SCSI_SPI_ATTRS=y
# CONFIG_SCSI_BUSLOGIC is not set
# CONFIG_SCSI_DMX3191D is not set
# CONFIG_SCSI_EATA is not set
-# CONFIG_SCSI_EATA_PIO is not set
# CONFIG_SCSI_FUTURE_DOMAIN is not set
# CONFIG_SCSI_GDTH is not set
# CONFIG_SCSI_IPS is not set
@@ -343,7 +419,6 @@ CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
# CONFIG_SCSI_IPR is not set
-# CONFIG_SCSI_QLOGIC_ISP is not set
# CONFIG_SCSI_QLOGIC_FC is not set
# CONFIG_SCSI_QLOGIC_1280 is not set
CONFIG_SCSI_QLA2XXX=y
@@ -352,6 +427,7 @@ CONFIG_SCSI_QLA2XXX=y
# CONFIG_SCSI_QLA2300 is not set
# CONFIG_SCSI_QLA2322 is not set
# CONFIG_SCSI_QLA6312 is not set
+# CONFIG_SCSI_LPFC is not set
# CONFIG_SCSI_DC395x is not set
# CONFIG_SCSI_DC390T is not set
# CONFIG_SCSI_NSP32 is not set
@@ -366,6 +442,8 @@ CONFIG_SCSI_QLA2XXX=y
# Fusion MPT device support
#
# CONFIG_FUSION is not set
+# CONFIG_FUSION_SPI is not set
+# CONFIG_FUSION_FC is not set
#
# IEEE 1394 (FireWire) support
@@ -382,71 +460,8 @@ CONFIG_SCSI_QLA2XXX=y
#
#
-# Networking support
+# Network device support
#
-CONFIG_NET=y
-
-#
-# Networking options
-#
-CONFIG_PACKET=y
-# CONFIG_PACKET_MMAP is not set
-# CONFIG_NETLINK_DEV is not set
-CONFIG_UNIX=y
-# CONFIG_NET_KEY is not set
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-# CONFIG_IP_ADVANCED_ROUTER is not set
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-# CONFIG_IP_PNP_RARP is not set
-# CONFIG_NET_IPIP is not set
-# CONFIG_NET_IPGRE is not set
-# CONFIG_IP_MROUTE is not set
-# CONFIG_ARPD is not set
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_AH is not set
-# CONFIG_INET_ESP is not set
-# CONFIG_INET_IPCOMP is not set
-# CONFIG_INET_TUNNEL is not set
-CONFIG_IP_TCPDIAG=y
-# CONFIG_IP_TCPDIAG_IPV6 is not set
-# CONFIG_IPV6 is not set
-# CONFIG_NETFILTER is not set
-
-#
-# SCTP Configuration (EXPERIMENTAL)
-#
-# CONFIG_IP_SCTP is not set
-# CONFIG_ATM is not set
-CONFIG_BRIDGE=y
-# CONFIG_VLAN_8021Q is not set
-# CONFIG_DECNET is not set
-# CONFIG_LLC2 is not set
-# CONFIG_IPX is not set
-# CONFIG_ATALK is not set
-# CONFIG_X25 is not set
-# CONFIG_LAPB is not set
-# CONFIG_NET_DIVERT is not set
-# CONFIG_ECONET is not set
-# CONFIG_WAN_ROUTER is not set
-
-#
-# QoS and/or fair queueing
-#
-# CONFIG_NET_SCHED is not set
-# CONFIG_NET_CLS_ROUTE is not set
-
-#
-# Network testing
-#
-# CONFIG_NET_PKTGEN is not set
-# CONFIG_NETPOLL is not set
-# CONFIG_NET_POLL_CONTROLLER is not set
-# CONFIG_HAMRADIO is not set
-# CONFIG_IRDA is not set
-# CONFIG_BT is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
@@ -511,9 +526,11 @@ CONFIG_E100=y
# CONFIG_YELLOWFIN is not set
CONFIG_R8169=y
CONFIG_R8169_NAPI=y
+# CONFIG_SKGE is not set
CONFIG_SK98LIN=y
# CONFIG_VIA_VELOCITY is not set
CONFIG_TIGON3=y
+# CONFIG_BNX2 is not set
CONFIG_MV643XX_ETH=y
CONFIG_MV643XX_ETH_0=y
CONFIG_MV643XX_ETH_1=y
@@ -546,6 +563,8 @@ CONFIG_MV643XX_ETH_1=y
# CONFIG_NET_FC is not set
# CONFIG_SHAPER is not set
# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
#
# ISDN subsystem
@@ -598,7 +617,6 @@ CONFIG_SERIO_SERPORT=y
CONFIG_SERIO_LIBPS2=y
# CONFIG_SERIO_RAW is not set
# CONFIG_GAMEPORT is not set
-CONFIG_SOUND_GAMEPORT=y
#
# Character devices
@@ -623,6 +641,7 @@ CONFIG_SERIAL_MPSC=y
# CONFIG_SERIAL_MPSC_CONSOLE is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
@@ -690,11 +709,11 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_ISA is not set
# CONFIG_I2C_MPC is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
-# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_PROSAVAGE is not set
# CONFIG_I2C_SAVAGE4 is not set
# CONFIG_SCx200_ACB is not set
@@ -707,16 +726,41 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_VOODOO3 is not set
# CONFIG_I2C_PCA_ISA is not set
CONFIG_I2C_MV64XXX=y
+CONFIG_I2C_SENSOR=y
#
-# Hardware Sensors Chip support
+# Miscellaneous I2C Chip support
#
-CONFIG_I2C_SENSOR=y
+CONFIG_SENSORS_DS1337=y
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_RTC8564 is not set
+# CONFIG_SENSORS_M41T00 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Hardware Monitoring support
+#
+CONFIG_HWMON=y
# CONFIG_SENSORS_ADM1021 is not set
# CONFIG_SENSORS_ADM1025 is not set
# CONFIG_SENSORS_ADM1026 is not set
# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATXP1 is not set
# CONFIG_SENSORS_DS1621 is not set
# CONFIG_SENSORS_FSCHER is not set
# CONFIG_SENSORS_FSCPOS is not set
@@ -732,33 +776,18 @@ CONFIG_I2C_SENSOR=y
# CONFIG_SENSORS_LM85 is not set
# CONFIG_SENSORS_LM87 is not set
CONFIG_SENSORS_LM90=y
+# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_MAX1619 is not set
# CONFIG_SENSORS_PC87360 is not set
-# CONFIG_SENSORS_SMSC47B397 is not set
# CONFIG_SENSORS_SIS5595 is not set
# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
# CONFIG_SENSORS_VIA686A is not set
# CONFIG_SENSORS_W83781D is not set
# CONFIG_SENSORS_W83L785TS is not set
# CONFIG_SENSORS_W83627HF is not set
-
-#
-# Other I2C Chip support
-#
-# CONFIG_SENSORS_EEPROM is not set
-# CONFIG_SENSORS_PCF8574 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_SENSORS_RTC8564 is not set
-# CONFIG_SENSORS_M41T00 is not set
-# CONFIG_I2C_DEBUG_CORE is not set
-# CONFIG_I2C_DEBUG_ALGO is not set
-# CONFIG_I2C_DEBUG_BUS is not set
-# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# Dallas's 1-wire bus
-#
-# CONFIG_W1 is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Misc devices
@@ -813,14 +842,20 @@ CONFIG_USB_ARCH_HAS_OHCI=y
# CONFIG_INFINIBAND is not set
#
+# SN Devices
+#
+
+#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
# CONFIG_EXT3_FS is not set
# CONFIG_JBD is not set
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
#
# XFS support
@@ -828,6 +863,7 @@ CONFIG_EXT2_FS=y
# CONFIG_XFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
# CONFIG_QUOTA is not set
CONFIG_DNOTIFY=y
# CONFIG_AUTOFS_FS is not set
@@ -854,7 +890,6 @@ CONFIG_ISO9660_FS=y
CONFIG_PROC_FS=y
CONFIG_PROC_KCORE=y
CONFIG_SYSFS=y
-# CONFIG_DEVFS_FS is not set
# CONFIG_DEVPTS_FS_XATTR is not set
CONFIG_TMPFS=y
# CONFIG_TMPFS_XATTR is not set
@@ -874,8 +909,7 @@ CONFIG_RAMFS=y
# CONFIG_JFFS_FS is not set
CONFIG_JFFS2_FS=y
CONFIG_JFFS2_FS_DEBUG=0
-# CONFIG_JFFS2_FS_NAND is not set
-# CONFIG_JFFS2_FS_NOR_ECC is not set
+CONFIG_JFFS2_FS_WRITEBUFFER=y
# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
CONFIG_JFFS2_ZLIB=y
CONFIG_JFFS2_RTIME=y
@@ -892,12 +926,14 @@ CONFIG_JFFS2_RTIME=y
#
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
# CONFIG_NFS_DIRECTIO is not set
# CONFIG_NFSD is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_RPCSEC_GSS_SPKM3 is not set
^ permalink raw reply
* [PATCH] ppc32: fix dma_map_page() to use page_to_bus()
From: Eugene Surovegin @ 2005-07-26 6:52 UTC (permalink / raw)
To: Matt Porter; +Cc: linuxppc-dev
Matt,
the following trivial patch changes dma_map_page() to use
page_to_bus() instead of open-coding it (incorrectly in some cases).
Signed-off-by: Eugene Surovegin <ebs@ebshome.net>
diff --git a/include/asm-ppc/dma-mapping.h b/include/asm-ppc/dma-mapping.h
--- a/include/asm-ppc/dma-mapping.h
+++ b/include/asm-ppc/dma-mapping.h
@@ -117,7 +117,7 @@ dma_map_page(struct device *dev, struct
__dma_sync_page(page, offset, size, direction);
- return (page - mem_map) * PAGE_SIZE + PCI_DRAM_OFFSET + offset;
+ return page_to_bus(page) + offset;
}
/* We do nothing. */
^ permalink raw reply
* help
From: 戴红刚 @ 2005-07-26 9:21 UTC (permalink / raw)
To: linuxppc-embedded
thanks for your answer, my kernel is vxworks 5.5, can you give any help
or advice?
^ permalink raw reply
* Re: platform/board removal update
From: Marcelo Tosatti @ 2005-07-26 10:05 UTC (permalink / raw)
To: Kumar Gala, 'Aristeu Sergio Rozanski Filho'
Cc: linuxppc-dev list, Embedded PPC Linux list
In-Reply-To: <CBF42A67-D022-4218-8624-8E40400F7C0D@freescale.com>
On Tue, Jul 26, 2005 at 09:43:43AM -0500, Kumar Gala wrote:
>
> On Jul 26, 2005, at 9:35 AM, Dan Malek wrote:
>
> >
> >On Jul 26, 2005, at 9:01 AM, Kumar Gala wrote:
> >
> >
> >>All the other systems (apus, gemini, rpxcllf) were more effort than I
> >>was wanting to deal with.
> >>
> >
> >Why? The rpxcllf worked not long ago. What happened to the
> >courtesy of
> >the past when such updates were applied to all platforms such they
> >would at least build? After such changes, if there is still a
> >problem,
> >the
> >person should at least contact the maintainer to get it resolved. I
> >don't
> >appreciate being demanded to fix something within a short period of
> >time that someone else broke or else everything I've done in the past
> >will be discarded.
>
> Well, I think its reasonable amount of time. We are talking about
> 4-6 months between now and when a 2.6.15 is likely to get released.
> I'm not 100% sure who broken rpxcllf, but the issue seems to be with
> the 8xx_io/fec.c driver so it should be resolved with panto's updated
> driver.
8xx_io/fec.c is still using v2.4's workqueue infrastructure but other than
that its working fine.
The fix will be pushed upstream ASAP.
BTW, we should schedule 8xx_io/fec.c for removal, but before that we ought to
test all supported PHY's on the new driver.
Aris was talking to me about this on OLS. Aris, what are the PHY's not supported
by Panto's driver again? We should build a list of those and ask around for
testers.
> I'm just trying to get us back into a sane state and hopefully we
> will regress building of all our defconfigs more often to catch
> things sooner.
^ permalink raw reply
* Re: platform/board removal update
From: Marcelo Tosatti @ 2005-07-26 10:34 UTC (permalink / raw)
To: Dan Malek; +Cc: linuxppc-dev list, Embedded PPC Linux list
In-Reply-To: <3ac21d25cf921a6c3ee68b109434fd19@embeddededge.com>
On Tue, Jul 26, 2005 at 06:14:00PM -0400, Dan Malek wrote:
>
> On Jul 26, 2005, at 6:05 AM, Marcelo Tosatti wrote:
>
> >8xx_io/fec.c is still using v2.4's workqueue infrastructure but other
> >than
> >that its working fine.
>
> I talked to panto about this earlier today.
>
> >The fix will be pushed upstream ASAP.
>
> That's OK, I'm just glad I know what it is :-)
>
> >BTW, we should schedule 8xx_io/fec.c for removal, but before that we
> >ought to
> >test all supported PHY's on the new driver.
>
> It will be around in old kernels if we need it for reference.
Indeed.
> Thanks, and good luck with the new job :-)
Thanks! Be prepared to handle my questions :-)
^ permalink raw reply
* Linux on Bamboo
From: Frank Lautenbach @ 2005-07-26 10:42 UTC (permalink / raw)
To: linuxppc-embedded@ozlabs.org
Hey folks,
thanks for your hint with mktree, the converted image at least started
somehow up, I can see
"TUX!" (btw: can anybody tell the code snipet where this output is
generated?) on the onboard
display but the kernel seems to crash very early without any output to
the terminal...
I think the next hurdle is now to configure the kernel suitable for the
Bamboo hardware environment...
I suppose some of you did this before already so I want to ask if
somebody is so kind and
posts me the according .config file?
Bests,
Frank
^ permalink raw reply
* Re: Linux on Bamboo
From: Gerhard Jaeger @ 2005-07-26 11:55 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: Frank Lautenbach
In-Reply-To: <42E6137F.6040605@gmx.de>
Hi,
On Dienstag 26 Juli 2005 12:42, Frank Lautenbach wrote:
> Hey folks,
>
> thanks for your hint with mktree, the converted image at least started
> somehow up, I can see
> "TUX!" (btw: can anybody tell the code snipet where this output is
> generated?) on the onboard
--> this is done by PIBS, before starting the kernel img...
> display but the kernel seems to crash very early without any output to
> the terminal...
>
> I think the next hurdle is now to configure the kernel suitable for the
> Bamboo hardware environment...
hmmm, for what platform have you configured the kernel?
> I suppose some of you did this before already so I want to ask if
> somebody is so kind and
> posts me the according .config file?
--
Gerhard Jaeger <gjaeger@sysgo.com>
SYSGO AG Embedded and Real-Time Software
www.sysgo.com | www.elinos.com | www.osek.de | www.pikeos.com
^ permalink raw reply
* Re: platform/board removal update
From: Kumar Gala @ 2005-07-26 13:01 UTC (permalink / raw)
To: Gala Kumar K.-galak; +Cc: linuxppc-dev list, Embedded PPC Linux list
In-Reply-To: <CF36C2B8-267D-421C-AA4E-7AE83DCF5172@freescale.com>
> The following board/platforms are currently not building:
> apus
> gemini
> lite5200
lite5200 seems to be running into a pci.h issue between asm-ppc and
linux. Sent patch to akpm and gregkh to look at.
> prpmc750
> radstone_ppc7d
I've fixed up prpmc750 (include issue) and radstone_ppc7d (defconfig
update)
> rpxcllf
> TQM8260
the TQM8260 needs a slightly reorder of includes. I'll push this
change today.
All the other systems (apus, gemini, rpxcllf) were more effort than I
was wanting to deal with. I'll be sending a patch to list them as
CONFIG_BROKEN and let the various board maintainers look at fixing
them up.
- kumar
^ permalink raw reply
* Re: LITE5200 2.6.x kernel support
From: Kumar Gala @ 2005-07-26 13:02 UTC (permalink / raw)
To: Andrey Volkov; +Cc: linuxppc-embedded
In-Reply-To: <42E3DD39.8040104@varma-el.com>
>> I am currently using 2.4.25 on the Lite5200 board, but I'd really
>> like to
>> switch to 2.6.x. The only 5200 specific support I need are the
>> integrated
>> uart and the PCI. I tried both 2.6.11 and 2.6.12 without luck: the
>> kernel
>> start, but then is stuck (seems into the init sequence). I use the
>> configuration
>> file from arch/ppc/configs/lite5200_defconfig. I cross-compiled the
>> kernel with gcc-3.4.1.
>>
>> I was wondering if somebody could give me some help, maybe by telling
>> be what I am doing wrong.
>>
>> Thanks,
>> Olivier
>>
>> BTW, I tried also 2.6.13-rc3, but I can't even compile for the
>> Lite5200,
>> there are some syntax error when compile the pci module...
I think I've address the build issue and posted a patch to lkml for
it. Look for
http://www.ussg.iu.edu/hypermail/linux/kernel/0507.3/0365.html
- kumar
^ permalink raw reply
* Re: LITE5200 2.6.x kernel support
From: Andrey Volkov @ 2005-07-26 14:07 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-embedded
In-Reply-To: <B5950CF1-3667-4FAE-8F80-11F4C223BAA2@freescale.com>
Kumar, thank you.
Sylvain know about this patch?
--
Regards
Andrey Volkov
Kumar Gala wrote:
>>> I am currently using 2.4.25 on the Lite5200 board, but I'd really
>>> like to
>>> switch to 2.6.x. The only 5200 specific support I need are the
>>> integrated
>>> uart and the PCI. I tried both 2.6.11 and 2.6.12 without luck: the
>>> kernel
>>> start, but then is stuck (seems into the init sequence). I use the
>>> configuration
>>> file from arch/ppc/configs/lite5200_defconfig. I cross-compiled the
>>> kernel with gcc-3.4.1.
>>>
>>> I was wondering if somebody could give me some help, maybe by telling
>>> be what I am doing wrong.
>>>
>>> Thanks,
>>> Olivier
>>>
>>> BTW, I tried also 2.6.13-rc3, but I can't even compile for the
>>> Lite5200,
>>> there are some syntax error when compile the pci module...
>
>
> I think I've address the build issue and posted a patch to lkml for
> it. Look for
>
> http://www.ussg.iu.edu/hypermail/linux/kernel/0507.3/0365.html
>
> - kumar
>
>
>
^ permalink raw reply
* Re: LITE5200 2.6.x kernel support
From: Kumar Gala @ 2005-07-26 14:26 UTC (permalink / raw)
To: Andrey Volkov; +Cc: linuxppc-embedded
In-Reply-To: <42E643A4.1070303@varma-el.com>
I would assume he does now. I only sent it out yesterday upon
finding out that the boards did not boot.
- kumar
On Jul 26, 2005, at 9:07 AM, Andrey Volkov wrote:
> Kumar, thank you.
>
> Sylvain know about this patch?
>
> --
> Regards
> Andrey Volkov
>
> Kumar Gala wrote:
>
>>>> I am currently using 2.4.25 on the Lite5200 board, but I'd really
>>>> like to
>>>> switch to 2.6.x. The only 5200 specific support I need are the
>>>> integrated
>>>> uart and the PCI. I tried both 2.6.11 and 2.6.12 without luck: the
>>>> kernel
>>>> start, but then is stuck (seems into the init sequence). I use the
>>>> configuration
>>>> file from arch/ppc/configs/lite5200_defconfig. I cross-compiled the
>>>> kernel with gcc-3.4.1.
>>>>
>>>> I was wondering if somebody could give me some help, maybe by
>>>> telling
>>>> be what I am doing wrong.
>>>>
>>>> Thanks,
>>>> Olivier
>>>>
>>>> BTW, I tried also 2.6.13-rc3, but I can't even compile for the
>>>> Lite5200,
>>>> there are some syntax error when compile the pci module...
>>>>
>>
>>
>> I think I've address the build issue and posted a patch to lkml for
>> it. Look for
>>
>> http://www.ussg.iu.edu/hypermail/linux/kernel/0507.3/0365.html
>>
>> - kumar
>>
>>
>>
>
^ permalink raw reply
* Re: platform/board removal update
From: Dan Malek @ 2005-07-26 14:35 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev list, Embedded PPC Linux list
In-Reply-To: <F4AA78A2-3370-406A-83B1-362250AEEC4A@freescale.com>
On Jul 26, 2005, at 9:01 AM, Kumar Gala wrote:
> All the other systems (apus, gemini, rpxcllf) were more effort than I
> was wanting to deal with.
Why? The rpxcllf worked not long ago. What happened to the courtesy of
the past when such updates were applied to all platforms such they
would at least build? After such changes, if there is still a problem,
the
person should at least contact the maintainer to get it resolved. I
don't
appreciate being demanded to fix something within a short period of
time that someone else broke or else everything I've done in the past
will be discarded.
Thanks.
-- Dan
^ permalink raw reply
* Re: platform/board removal update
From: Kumar Gala @ 2005-07-26 14:43 UTC (permalink / raw)
To: Dan Malek; +Cc: linuxppc-dev list, Embedded PPC Linux list
In-Reply-To: <855be1bf81cc3629e58e6a23ebb50300@embeddededge.com>
On Jul 26, 2005, at 9:35 AM, Dan Malek wrote:
>
> On Jul 26, 2005, at 9:01 AM, Kumar Gala wrote:
>
>
>> All the other systems (apus, gemini, rpxcllf) were more effort than I
>> was wanting to deal with.
>>
>
> Why? The rpxcllf worked not long ago. What happened to the
> courtesy of
> the past when such updates were applied to all platforms such they
> would at least build? After such changes, if there is still a
> problem,
> the
> person should at least contact the maintainer to get it resolved. I
> don't
> appreciate being demanded to fix something within a short period of
> time that someone else broke or else everything I've done in the past
> will be discarded.
Well, I think its reasonable amount of time. We are talking about
4-6 months between now and when a 2.6.15 is likely to get released.
I'm not 100% sure who broken rpxcllf, but the issue seems to be with
the 8xx_io/fec.c driver so it should be resolved with panto's updated
driver.
I'm just trying to get us back into a sane state and hopefully we
will regress building of all our defconfigs more often to catch
things sooner.
- kumar
^ permalink raw reply
* [PATCH] Support 440EP On-Chip OHCI USB Host Controller
From: John Otken @ 2005-07-25 12:04 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: weissg
This patch adds support for the AMCC 440EP on-chip OHCI USB host controller. I tested it on the Bamboo and Yosemite boards using the 2.6.12 kernel.
This patch depends on Wade Farnsworth's "PPC440EP SoC and Bamboo board support" patch from 2005-04-07 and my "fix invalid function name usb_hcd_put in ohci-ppc-soc.c" patch from 2005-07-20:
http://patchwork.ozlabs.org/linuxppc/patch?id=1311
http://patchwork.ozlabs.org/linuxppc/patch?id=1803
Comments are welcome.
Signed-off-by: John Otken <jotken@softadvances.com>
diff -uprN b/arch/ppc/platforms/4xx/bamboo.c c/arch/ppc/platforms/4xx/bamboo.c
--- b/arch/ppc/platforms/4xx/bamboo.c 2005-07-24 16:14:36.000000000 -0500
+++ c/arch/ppc/platforms/4xx/bamboo.c 2005-07-25 06:34:52.498441038 -0500
@@ -431,5 +431,7 @@ void __init platform_init(unsigned long
#ifdef CONFIG_KGDB
ppc_md.early_serial_map = bamboo_early_serial_map;
#endif
+
+ SDR_WRITE( 0x320, 1 ); /* little endian usb (SDR0_USB0) */
}
diff -uprN b/arch/ppc/platforms/4xx/ibm440ep.c c/arch/ppc/platforms/4xx/ibm440ep.c
--- b/arch/ppc/platforms/4xx/ibm440ep.c 2005-07-24 16:14:36.000000000 -0500
+++ c/arch/ppc/platforms/4xx/ibm440ep.c 2005-07-24 18:00:38.000000000 -0500
@@ -187,3 +187,44 @@ struct ppc4xx_uic_settings ppc4xx_core_u
},
};
+static struct resource ohci_usb_resources[] = {
+ [0] = {
+ .start = 0x0EF601000,
+ .end = 0x0EF601000 + 0x80 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 40,
+ .end = 40,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 dma_mask = 0xffffffffULL;
+
+#include <asm/usb.h>
+
+static struct usb_hcd_platform_data platform_data;
+
+static struct platform_device ohci_usb_device = {
+ .name = "ppc-soc-ohci",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(ohci_usb_resources),
+ .resource = ohci_usb_resources,
+ .dev = {
+ .dma_mask = &dma_mask,
+ .coherent_dma_mask = 0xffffffffULL,
+ .platform_data = &platform_data,
+ }
+};
+
+static struct platform_device *ibm440ep_devs[] __initdata = {
+ &ohci_usb_device,
+};
+
+static int __init
+ ibm440ep_platform_add_devices(void)
+{
+ return platform_add_devices(ibm440ep_devs, ARRAY_SIZE(ibm440ep_devs));
+}
+arch_initcall(ibm440ep_platform_add_devices);
diff -uprN b/drivers/usb/host/Kconfig c/drivers/usb/host/Kconfig
--- b/drivers/usb/host/Kconfig 2005-07-14 09:48:19.000000000 -0500
+++ c/drivers/usb/host/Kconfig 2005-07-24 18:00:38.000000000 -0500
@@ -68,7 +68,7 @@ config USB_OHCI_HCD
config USB_OHCI_HCD_PPC_SOC
bool "OHCI support for on-chip PPC USB controller"
- depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
+ depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx || 440EP)
default y
select USB_OHCI_BIG_ENDIAN
---help---
@@ -92,7 +92,7 @@ config USB_OHCI_BIG_ENDIAN
config USB_OHCI_LITTLE_ENDIAN
bool
depends on USB_OHCI_HCD
- default n if STB03xxx || PPC_MPC52xx
+ default n if STB03xxx || PPC_MPC52xx || 440EP
default y
config USB_UHCI_HCD
diff -uprN b/include/asm-ppc/usb.h c/include/asm-ppc/usb.h
--- b/include/asm-ppc/usb.h 1969-12-31 17:00:00.000000000 -0700
+++ c/include/asm-ppc/usb.h 2005-07-24 18:00:38.000000000 -0500
@@ -0,0 +1,13 @@
+/*
+ * ppc/usb.h:
+ *
+ */
+#ifndef _PPC_USB_H
+#define _PPC_USB_H
+
+struct usb_hcd_platform_data {
+ int (*start) (struct platform_device *pdev);
+ void (*stop) (struct platform_device *pdev);
+};
+
+#endif /* !(_PPC_USB_H) */
^ permalink raw reply
* Re: Virtex-II Pro - PCI Host
From: Joshua Lamorie @ 2005-07-26 15:46 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <42E555B4.7030904@xiphos.ca>
Gidday there,
I think I've found the answer. The ml310 has a Xilinx EDK project that
is available online. Within this project is a collection of files for a
linux bsp, including many files that would go in the arch/ppc hierarchy.
I haven't built this for my own board yet, but I will soon and let
anyone know who is interested how it goes and if there are any patches
that may be useful.
Joshua
Joshua Lamorie wrote:
> Gidday there,
>
> We are trying to put a PCI host into a Virtex-II Pro. We have seen
> that the latest development board from Xilinx (ml310, link at end of
> email) has PCI host and MontaVista has some form of Linux support.
> However, I can't seem to find any kernel source around with any of
> this code. I could easily have missed it.
>
> Anyone know where I might find this code?
>
> Thanks.
>
> Joshua
>
> p.s. The skinny on the ml310...
> http://www.xilinx.com/products/boards/ml310/current/#pci
>
--
Xiphos Technologies
(514) 848-9640 x227
(514) 848-9644 fax
www.xiplink.com
_______________________________________________
The information transmitted is intended only for the
person or entity to which it is addressed and may contain
confidential and/or privileged material. If you have
received this in error, please contact the sender and delete
this communication and any copy immediately. Thank you.
^ permalink raw reply
* [Newbie] Linux Warm Reboot question
From: Srivatsan CR @ 2005-07-26 15:34 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 528 bytes --]
Dear all,
We are trying to perform a warm reboot on a MPC8260 based target but we
are unable to make the kernel jump to the correct location. Can anyone give
a brief on the RAM memory map Linux in use for these kind of processors ?
What I got from going thro' the code in head.S (exception vector is mapped
from 0x0, then Linux Kernel starts. But not able to find the physical start
address of the Linux Kernel code).
Thanks for all the time.
With Regards,
C.R.Srivatsan
[-- Attachment #2: Type: text/html, Size: 1364 bytes --]
^ permalink raw reply
* [PATCH 1/3] PPC440EP SoC and Bamboo board support
From: Wade Farnsworth @ 2005-07-26 15:57 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 173 bytes --]
Hello,
This adds support for the AMCC PPC440EP SoC and the Bamboo reference
board. This patch makes use of fpu.S.
Signed-off by: Wade Farnsworth <wfarnsworth@mvista.com>
[-- Attachment #2: 440ep-ppc.patch --]
[-- Type: text/x-patch, Size: 58807 bytes --]
diff -uprN linux-2.6.12/include/asm-ppc/ibm44x.h linux-2.6.12-440ep/include/asm-ppc/ibm44x.h
--- linux-2.6.12/include/asm-ppc/ibm44x.h 2005-06-17 12:48:29.000000000 -0700
+++ linux-2.6.12-440ep/include/asm-ppc/ibm44x.h 2005-07-25 11:32:23.000000000 -0700
@@ -35,8 +35,10 @@
#define PPC44x_LOW_SLOT 63
/* LS 32-bits of UART0 physical address location for early serial text debug */
-#ifdef CONFIG_440SP
+#if defined(CONFIG_440SP)
#define UART0_PHYS_IO_BASE 0xf0000200
+#elif defined(CONFIG_440EP)
+#define UART0_PHYS_IO_BASE 0xe0000000
#else
#define UART0_PHYS_IO_BASE 0x40000200
#endif
@@ -49,11 +51,16 @@
/*
* Standard 4GB "page" definitions
*/
-#ifdef CONFIG_440SP
+#if defined(CONFIG_440SP)
#define PPC44x_IO_PAGE 0x0000000100000000ULL
#define PPC44x_PCICFG_PAGE 0x0000000900000000ULL
#define PPC44x_PCIIO_PAGE PPC44x_PCICFG_PAGE
#define PPC44x_PCIMEM_PAGE 0x0000000a00000000ULL
+#elif defined(CONFIG_440EP)
+#define PPC44x_IO_PAGE 0x0000000000000000ULL
+#define PPC44x_PCICFG_PAGE 0x0000000000000000ULL
+#define PPC44x_PCIIO_PAGE PPC44x_PCICFG_PAGE
+#define PPC44x_PCIMEM_PAGE 0x0000000000000000ULL
#else
#define PPC44x_IO_PAGE 0x0000000100000000ULL
#define PPC44x_PCICFG_PAGE 0x0000000200000000ULL
@@ -64,7 +71,7 @@
/*
* 36-bit trap ranges
*/
-#ifdef CONFIG_440SP
+#if defined(CONFIG_440SP)
#define PPC44x_IO_LO 0xf0000000UL
#define PPC44x_IO_HI 0xf0000fffUL
#define PPC44x_PCI0CFG_LO 0x0ec00000UL
@@ -75,6 +82,13 @@
#define PPC44x_PCI2CFG_HI 0x2ec00007UL
#define PPC44x_PCIMEM_LO 0x80000000UL
#define PPC44x_PCIMEM_HI 0xdfffffffUL
+#elif defined(CONFIG_440EP)
+#define PPC44x_IO_LO 0xef500000UL
+#define PPC44x_IO_HI 0xefffffffUL
+#define PPC44x_PCI0CFG_LO 0xeec00000UL
+#define PPC44x_PCI0CFG_HI 0xeecfffffUL
+#define PPC44x_PCIMEM_LO 0xa0000000UL
+#define PPC44x_PCIMEM_HI 0xdfffffffUL
#else
#define PPC44x_IO_LO 0x40000000UL
#define PPC44x_IO_HI 0x40000fffUL
@@ -152,6 +166,12 @@
#define DCRN_SDR_UART0 0x0120
#define DCRN_SDR_UART1 0x0121
+#ifdef CONFIG_440EP
+#define DCRN_SDR_UART2 0x0122
+#define DCRN_SDR_UART3 0x0123
+#define DCRN_SDR_CUST0 0x4000
+#endif
+
/* SDR read/write helper macros */
#define SDR_READ(offset) ({\
mtdcr(DCRN_SDR_CONFIG_ADDR, offset); \
@@ -169,6 +189,14 @@
#define DCRNCAP_DMA_SG 1 /* have DMA scatter/gather capability */
#define DCRN_MAL_BASE 0x180
+#ifdef CONFIG_440EP
+#define DCRN_DMA2P40_BASE 0x300
+#define DCRN_DMA2P41_BASE 0x308
+#define DCRN_DMA2P42_BASE 0x310
+#define DCRN_DMA2P43_BASE 0x318
+#define DCRN_DMA2P4SR_BASE 0x320
+#endif
+
/* UIC */
#define DCRN_UIC0_BASE 0xc0
#define DCRN_UIC1_BASE 0xd0
diff -uprN linux-2.6.12/include/asm-ppc/ibm4xx.h linux-2.6.12-440ep/include/asm-ppc/ibm4xx.h
--- linux-2.6.12/include/asm-ppc/ibm4xx.h 2005-06-17 12:48:29.000000000 -0700
+++ linux-2.6.12-440ep/include/asm-ppc/ibm4xx.h 2005-07-25 11:32:23.000000000 -0700
@@ -97,6 +97,10 @@ void ppc4xx_init(unsigned long r3, unsig
#elif CONFIG_44x
+#if defined(CONFIG_BAMBOO)
+#include <platforms/4xx/bamboo.h>
+#endif
+
#if defined(CONFIG_EBONY)
#include <platforms/4xx/ebony.h>
#endif
diff -uprN linux-2.6.12/include/asm-ppc/ppc_asm.h linux-2.6.12-440ep/include/asm-ppc/ppc_asm.h
--- linux-2.6.12/include/asm-ppc/ppc_asm.h 2005-07-25 12:57:09.000000000 -0700
+++ linux-2.6.12-440ep/include/asm-ppc/ppc_asm.h 2005-07-25 11:32:23.000000000 -0700
@@ -186,6 +186,12 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
#define PPC405_ERR77_SYNC
#endif
+#ifdef CONFIG_IBM440EP_ERR42
+#define PPC440EP_ERR42 isync
+#else
+#define PPC440EP_ERR42
+#endif
+
/* The boring bits... */
/* Condition Register Bit Fields */
diff -uprN linux-2.6.12/arch/ppc/boot/simple/Makefile linux-2.6.12-440ep/arch/ppc/boot/simple/Makefile
--- linux-2.6.12/arch/ppc/boot/simple/Makefile 2005-07-25 12:57:00.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/boot/simple/Makefile 2005-07-25 11:32:20.000000000 -0700
@@ -61,6 +61,12 @@ zimageinitrd-$(CONFIG_IBM_OPENBIOS) := z
end-$(CONFIG_EMBEDDEDBOOT) := embedded
misc-$(CONFIG_EMBEDDEDBOOT) := misc-embedded.o
+ zimage-$(CONFIG_BAMBOO) := zImage-TREE
+zimageinitrd-$(CONFIG_BAMBOO) := zImage.initrd-TREE
+ end-$(CONFIG_BAMBOO) := bamboo
+ entrypoint-$(CONFIG_BAMBOO) := 0x01000000
+ extra.o-$(CONFIG_BAMBOO) := pibs.o
+
zimage-$(CONFIG_EBONY) := zImage-TREE
zimageinitrd-$(CONFIG_EBONY) := zImage.initrd-TREE
end-$(CONFIG_EBONY) := ebony
diff -uprN linux-2.6.12/arch/ppc/boot/simple/pibs.c linux-2.6.12-440ep/arch/ppc/boot/simple/pibs.c
--- linux-2.6.12/arch/ppc/boot/simple/pibs.c 2005-06-17 12:48:29.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/boot/simple/pibs.c 2005-07-25 11:32:21.000000000 -0700
@@ -91,9 +91,11 @@ load_kernel(unsigned long load_addr, int
mac64 = simple_strtoull((char *)PIBS_MAC_BASE, 0, 16);
memcpy(hold_residual->bi_enetaddr, (char *)&mac64+2, 6);
-#ifdef CONFIG_440GX
+#if defined(CONFIG_440GX) || defined(CONFIG_440EP)
mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET), 0, 16);
memcpy(hold_residual->bi_enet1addr, (char *)&mac64+2, 6);
+#endif
+#ifdef CONFIG_440GX
mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET*2), 0, 16);
memcpy(hold_residual->bi_enet2addr, (char *)&mac64+2, 6);
mac64 = simple_strtoull((char *)(PIBS_MAC_BASE+PIBS_MAC_OFFSET*3), 0, 16);
diff -uprN linux-2.6.12/arch/ppc/configs/bamboo_defconfig linux-2.6.12-440ep/arch/ppc/configs/bamboo_defconfig
--- linux-2.6.12/arch/ppc/configs/bamboo_defconfig 1969-12-31 17:00:00.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/configs/bamboo_defconfig 2005-07-25 11:32:21.000000000 -0700
@@ -0,0 +1,943 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.12
+# Tue Jun 28 15:24:25 2005
+#
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_HAVE_DEC_LOCK=y
+CONFIG_PPC=y
+CONFIG_PPC32=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_CLEAN_COMPILE=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+# CONFIG_HOTPLUG is not set
+CONFIG_KOBJECT_UEVENT=y
+# CONFIG_IKCONFIG is not set
+CONFIG_EMBEDDED=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SHMEM=y
+CONFIG_CC_ALIGN_FUNCTIONS=0
+CONFIG_CC_ALIGN_LABELS=0
+CONFIG_CC_ALIGN_LOOPS=0
+CONFIG_CC_ALIGN_JUMPS=0
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+CONFIG_OBSOLETE_MODPARM=y
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Processor
+#
+# CONFIG_6xx is not set
+# CONFIG_40x is not set
+CONFIG_44x=y
+# CONFIG_POWER3 is not set
+# CONFIG_POWER4 is not set
+# CONFIG_8xx is not set
+# CONFIG_E200 is not set
+# CONFIG_E500 is not set
+CONFIG_PPC_FPU=y
+CONFIG_BOOKE=y
+CONFIG_PTE_64BIT=y
+CONFIG_PHYS_64BIT=y
+# CONFIG_MATH_EMULATION is not set
+# CONFIG_KEXEC is not set
+# CONFIG_CPU_FREQ is not set
+CONFIG_4xx=y
+
+#
+# IBM 4xx options
+#
+CONFIG_BAMBOO=y
+# CONFIG_EBONY is not set
+# CONFIG_LUAN is not set
+# CONFIG_OCOTEA is not set
+CONFIG_440EP=y
+CONFIG_440=y
+CONFIG_IBM440EP_ERR42=y
+CONFIG_IBM_OCP=y
+# CONFIG_PPC4xx_DMA is not set
+CONFIG_PPC_GEN550=y
+# CONFIG_PM is not set
+CONFIG_NOT_COHERENT_CACHE=y
+
+#
+# Platform options
+#
+# CONFIG_PC_KEYBOARD is not set
+# CONFIG_SMP is not set
+# CONFIG_PREEMPT is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE="ip=on"
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+# CONFIG_PCI_LEGACY_PROC is not set
+# CONFIG_PCI_NAMES is not set
+# CONFIG_PCI_DEBUG is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x01000000
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+# CONFIG_STANDALONE is not set
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+# CONFIG_BLK_DEV_RAM is not set
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_LBD is not set
+# CONFIG_CDROM_PKTCDVD is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_BLK_DEV_IDESCSI is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_IDEPCI_SHARE_IRQ is not set
+# CONFIG_BLK_DEV_OFFBOARD is not set
+# CONFIG_BLK_DEV_GENERIC is not set
+# CONFIG_BLK_DEV_OPTI621 is not set
+# CONFIG_BLK_DEV_SL82C105 is not set
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
+# CONFIG_IDEDMA_PCI_AUTO is not set
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+CONFIG_BLK_DEV_CMD64X=y
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT34X is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_SC1200 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_IT821X is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+# CONFIG_BLK_DEV_PDC202XX_NEW is not set
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+# CONFIG_BLK_DEV_VIA82CXXX is not set
+# CONFIG_IDE_ARM is not set
+CONFIG_BLK_DEV_IDEDMA=y
+# CONFIG_IDEDMA_IVB is not set
+# CONFIG_IDEDMA_AUTO is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+# CONFIG_BLK_DEV_SD is not set
+CONFIG_CHR_DEV_ST=y
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transport Attributes
+#
+CONFIG_SCSI_SPI_ATTRS=y
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_SCSI_SATA is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+CONFIG_SCSI_SYM53C8XX_2=y
+CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
+CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
+CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
+# CONFIG_SCSI_SYM53C8XX_IOMAPPED is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_FC is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+CONFIG_SCSI_QLA2XXX=y
+# CONFIG_SCSI_QLA21XX is not set
+# CONFIG_SCSI_QLA22XX is not set
+# CONFIG_SCSI_QLA2300 is not set
+# CONFIG_SCSI_QLA2322 is not set
+# CONFIG_SCSI_QLA6312 is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+# CONFIG_FUSION_SPI is not set
+# CONFIG_FUSION_FC is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+
+#
+# Networking support
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+# CONFIG_IP_PNP_DHCP is not set
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_IP_TCPDIAG=y
+# CONFIG_IP_TCPDIAG_IPV6 is not set
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+
+#
+# IP: Virtual Server Configuration
+#
+# CONFIG_IP_VS is not set
+# CONFIG_IPV6 is not set
+CONFIG_NETFILTER=y
+# CONFIG_NETFILTER_DEBUG is not set
+
+#
+# IP: Netfilter Configuration
+#
+# CONFIG_IP_NF_CONNTRACK is not set
+# CONFIG_IP_NF_CONNTRACK_MARK is not set
+# CONFIG_IP_NF_QUEUE is not set
+# CONFIG_IP_NF_IPTABLES is not set
+# CONFIG_IP_NF_ARPTABLES is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+# CONFIG_NET_CLS_ROUTE is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_IBM_EMAC=y
+# CONFIG_IBM_EMAC_ERRMSG is not set
+CONFIG_IBM_EMAC_RXB=64
+CONFIG_IBM_EMAC_TXB=8
+CONFIG_IBM_EMAC_FGAP=8
+CONFIG_IBM_EMAC_SKBRES=0
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+# CONFIG_DGRS is not set
+CONFIG_EEPRO100=y
+# CONFIG_E100 is not set
+# CONFIG_FEALNX is not set
+CONFIG_NATSEMI=y
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+# CONFIG_E1000_NAPI is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+# CONFIG_SERIO_I8042 is not set
+# CONFIG_SERIO_SERPORT is not set
+# CONFIG_SERIO_PCIPS2 is not set
+# CONFIG_SERIO_LIBPS2 is not set
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_RSA is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_EHCI_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_BLUETOOTH_TTY is not set
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
+#
+# CONFIG_USB_STORAGE is not set
+
+#
+# USB Input Devices
+#
+# CONFIG_USB_HID is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_ACECAD is not set
+# CONFIG_USB_KBTAB is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_MTOUCH is not set
+# CONFIG_USB_ITMTOUCH is not set
+# CONFIG_USB_EGALAX is not set
+# CONFIG_USB_XPAD is not set
+# CONFIG_USB_ATI_REMOTE is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB Multimedia devices
+#
+# CONFIG_USB_DABUSB is not set
+
+#
+# Video4Linux support is needed for USB Multimedia device support
+#
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+CONFIG_USB_PEGASUS=y
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGETKIT is not set
+# CONFIG_USB_PHIDGETSERVO is not set
+# CONFIG_USB_IDMOUSE is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
+# SN Devices
+#
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_JBD is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+
+#
+# XFS support
+#
+# CONFIG_XFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+# CONFIG_DEVPTS_FS_XATTR is not set
+# CONFIG_TMPFS is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+
+#
+# Profiling support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_MAGIC_SYSRQ=y
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_FS is not set
+# CONFIG_KGDB is not set
+# CONFIG_XMON is not set
+CONFIG_BDI_SWITCH=y
+# CONFIG_SERIAL_TEXT_DEBUG is not set
+CONFIG_PPC_OCP=y
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+# CONFIG_CRYPTO is not set
+
+#
+# Hardware crypto devices
+#
diff -uprN linux-2.6.12/arch/ppc/kernel/cputable.c linux-2.6.12-440ep/arch/ppc/kernel/cputable.c
--- linux-2.6.12/arch/ppc/kernel/cputable.c 2005-07-25 12:57:00.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/kernel/cputable.c 2005-07-25 11:32:21.000000000 -0700
@@ -852,6 +852,26 @@ struct cpu_spec cpu_specs[] = {
#endif /* CONFIG_40x */
#ifdef CONFIG_44x
+ {
+ .pvr_mask = 0xf0000fff,
+ .pvr_value = 0x40000850,
+ .cpu_name = "440EP Rev. A",
+ .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
+ CPU_FTR_USE_TB,
+ .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ },
+ {
+ .pvr_mask = 0xf0000fff,
+ .pvr_value = 0x400008d3,
+ .cpu_name = "440EP Rev. B",
+ .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
+ CPU_FTR_USE_TB,
+ .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ },
{ /* 440GP Rev. B */
.pvr_mask = 0xf0000fff,
.pvr_value = 0x40000440,
diff -uprN linux-2.6.12/arch/ppc/kernel/entry.S linux-2.6.12-440ep/arch/ppc/kernel/entry.S
--- linux-2.6.12/arch/ppc/kernel/entry.S 2005-07-25 12:57:00.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/kernel/entry.S 2005-07-25 11:32:21.000000000 -0700
@@ -215,6 +215,7 @@ syscall_dotrace_cont:
lwzx r10,r10,r0 /* Fetch system call handler [ptr] */
mtlr r10
addi r9,r1,STACK_FRAME_OVERHEAD
+ PPC440EP_ERR42
blrl /* Call handler */
.globl ret_from_syscall
ret_from_syscall:
diff -uprN linux-2.6.12/arch/ppc/kernel/head_44x.S linux-2.6.12-440ep/arch/ppc/kernel/head_44x.S
--- linux-2.6.12/arch/ppc/kernel/head_44x.S 2005-06-17 12:48:29.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/kernel/head_44x.S 2005-07-25 11:32:22.000000000 -0700
@@ -190,7 +190,9 @@ skpinv: addi r4,r4,1 /* Increment */
/* xlat fields */
lis r4,UART0_PHYS_IO_BASE@h /* RPN depends on SoC */
+#ifndef CONFIG_440EP
ori r4,r4,0x0001 /* ERPN is 1 for second 4GB page */
+#endif
/* attrib fields */
li r5,0
@@ -228,6 +230,16 @@ skpinv: addi r4,r4,1 /* Increment */
lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
mtspr SPRN_IVPR,r4
+#ifdef CONFIG_440EP
+ /* Clear DAPUIB flag in CCR0 (enable APU between CPU and FPU) */
+ mfspr r2,SPRN_CCR0
+ lis r3,0xffef
+ ori r3,r3,0xffff
+ and r2,r2,r3
+ mtspr SPRN_CCR0,r2
+ isync
+#endif
+
/*
* This is where the main kernel code starts.
*/
diff -uprN linux-2.6.12/arch/ppc/kernel/misc.S linux-2.6.12-440ep/arch/ppc/kernel/misc.S
--- linux-2.6.12/arch/ppc/kernel/misc.S 2005-07-25 12:57:00.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/kernel/misc.S 2005-07-25 11:32:22.000000000 -0700
@@ -1145,6 +1145,7 @@ _GLOBAL(kernel_thread)
stwu r0,-16(r1)
mtlr r30 /* fn addr in lr */
mr r3,r31 /* load arg and call fn */
+ PPC440EP_ERR42
blrl
li r0,__NR_exit /* exit if function returns */
li r3,0
diff -uprN linux-2.6.12/arch/ppc/platforms/4xx/Kconfig linux-2.6.12-440ep/arch/ppc/platforms/4xx/Kconfig
--- linux-2.6.12/arch/ppc/platforms/4xx/Kconfig 2005-06-17 12:48:29.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/platforms/4xx/Kconfig 2005-07-25 11:32:22.000000000 -0700
@@ -68,6 +68,11 @@ choice
depends on 44x
default EBONY
+config BAMBOO
+ bool "Bamboo"
+ help
+ This option enables support for the IBM PPC440EP evaluation board.
+
config EBONY
bool "Ebony"
help
@@ -98,6 +103,12 @@ config NP405H
depends on ASH
default y
+config 440EP
+ bool
+ depends on BAMBOO
+ select PPC_FPU
+ default y
+
config 440GP
bool
depends on EBONY
@@ -115,7 +126,7 @@ config 440SP
config 440
bool
- depends on 440GP || 440SP
+ depends on 440GP || 440SP || 440EP
default y
config 440A
@@ -123,6 +134,11 @@ config 440A
depends on 440GX
default y
+config IBM440EP_ERR42
+ bool
+ depends on 440EP
+ default y
+
# All 405-based cores up until the 405GPR and 405EP have this errata.
config IBM405_ERR77
bool
@@ -142,7 +158,7 @@ config BOOKE
config IBM_OCP
bool
- depends on ASH || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
+ depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
default y
config XILINX_OCP
diff -uprN linux-2.6.12/arch/ppc/platforms/4xx/Makefile linux-2.6.12-440ep/arch/ppc/platforms/4xx/Makefile
--- linux-2.6.12/arch/ppc/platforms/4xx/Makefile 2005-06-17 12:48:29.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/platforms/4xx/Makefile 2005-07-25 11:32:22.000000000 -0700
@@ -2,6 +2,7 @@
# Makefile for the PowerPC 4xx linux kernel.
obj-$(CONFIG_ASH) += ash.o
+obj-$(CONFIG_BAMBOO) += bamboo.o
obj-$(CONFIG_CPCI405) += cpci405.o
obj-$(CONFIG_EBONY) += ebony.o
obj-$(CONFIG_EP405) += ep405.o
@@ -19,6 +20,7 @@ obj-$(CONFIG_405GP) += ibm405gp.o
obj-$(CONFIG_REDWOOD_5) += ibmstb4.o
obj-$(CONFIG_NP405H) += ibmnp405h.o
obj-$(CONFIG_REDWOOD_6) += ibmstbx25.o
+obj-$(CONFIG_440EP) += ibm440ep.o
obj-$(CONFIG_440GP) += ibm440gp.o
obj-$(CONFIG_440GX) += ibm440gx.o
obj-$(CONFIG_440SP) += ibm440sp.o
diff -uprN linux-2.6.12/arch/ppc/platforms/4xx/bamboo.c linux-2.6.12-440ep/arch/ppc/platforms/4xx/bamboo.c
--- linux-2.6.12/arch/ppc/platforms/4xx/bamboo.c 1969-12-31 17:00:00.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/platforms/4xx/bamboo.c 2005-07-25 11:32:22.000000000 -0700
@@ -0,0 +1,427 @@
+/*
+ * arch/ppc/platforms/4xx/bamboo.c
+ *
+ * Bamboo board specific routines
+ *
+ * Wade Farnsworth <wfarnsworth@mvista.com>
+ * Copyright 2004 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/types.h>
+#include <linux/major.h>
+#include <linux/blkdev.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/ide.h>
+#include <linux/initrd.h>
+#include <linux/irq.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <linux/ethtool.h>
+
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/dma.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/ocp.h>
+#include <asm/pci-bridge.h>
+#include <asm/time.h>
+#include <asm/todc.h>
+#include <asm/bootinfo.h>
+#include <asm/ppc4xx_pic.h>
+#include <asm/ppcboot.h>
+
+#include <syslib/gen550.h>
+#include <syslib/ibm440gx_common.h>
+
+/*
+ * This is a horrible kludge, we eventually need to abstract this
+ * generic PHY stuff, so the standard phy mode defines can be
+ * easily used from arch code.
+ */
+#include "../../../../drivers/net/ibm_emac/ibm_emac_phy.h"
+
+bd_t __res;
+
+static struct ibm44x_clocks clocks __initdata;
+
+/*
+ * Bamboo external IRQ triggering/polarity settings
+ */
+unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = {
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ0: Ethernet transceiver */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* IRQ1: Expansion connector */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ2: PCI slot 0 */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ3: PCI slot 1 */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ4: PCI slot 2 */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ5: PCI slot 3 */
+ (IRQ_SENSE_EDGE | IRQ_POLARITY_NEGATIVE), /* IRQ6: SMI pushbutton */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ7: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ8: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ9: EXT */
+};
+
+static void __init
+bamboo_calibrate_decr(void)
+{
+ unsigned int freq;
+
+ if (mfspr(SPRN_CCR1) & CCR1_TCS)
+ freq = BAMBOO_TMRCLK;
+ else
+ freq = clocks.cpu;
+
+ ibm44x_calibrate_decr(freq);
+
+}
+
+static int
+bamboo_show_cpuinfo(struct seq_file *m)
+{
+ seq_printf(m, "vendor\t\t: IBM\n");
+ seq_printf(m, "machine\t\t: PPC440EP EVB (Bamboo)\n");
+
+ return 0;
+}
+
+static inline int
+bamboo_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
+{
+ static char pci_irq_table[][4] =
+ /*
+ * PCI IDSEL/INTPIN->INTLINE
+ * A B C D
+ */
+ {
+ { 28, 28, 28, 28 }, /* IDSEL 1 - PCI Slot 0 */
+ { 27, 27, 27, 27 }, /* IDSEL 2 - PCI Slot 1 */
+ { 26, 26, 26, 26 }, /* IDSEL 3 - PCI Slot 2 */
+ { 25, 25, 25, 25 }, /* IDSEL 4 - PCI Slot 3 */
+ };
+
+ const long min_idsel = 1, max_idsel = 4, irqs_per_slot = 4;
+ return PCI_IRQ_TABLE_LOOKUP;
+}
+
+static void __init bamboo_set_emacdata(void)
+{
+ unsigned char * selection1_base;
+ struct ocp_def *def;
+ struct ocp_func_emac_data *emacdata;
+ u8 selection1_val;
+ int mode;
+
+ selection1_base = ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 16);
+ selection1_val = readb(selection1_base);
+ iounmap((void *) selection1_base);
+ if (BAMBOO_SEL_MII(selection1_val))
+ mode = PHY_MODE_MII;
+ else if (BAMBOO_SEL_RMII(selection1_val))
+ mode = PHY_MODE_RMII;
+ else
+ mode = PHY_MODE_SMII;
+
+ /* Set mac_addr and phy mode for each EMAC */
+
+ def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
+ emacdata = def->additions;
+ memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
+ emacdata->phy_mode = mode;
+
+ def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 1);
+ emacdata = def->additions;
+ memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6);
+ emacdata->phy_mode = mode;
+}
+
+static int
+bamboo_exclude_device(unsigned char bus, unsigned char devfn)
+{
+ return (bus == 0 && devfn == 0);
+}
+
+#define PCI_READW(offset) \
+ (readw((void *)((u32)pci_reg_base+offset)))
+
+#define PCI_WRITEW(value, offset) \
+ (writew(value, (void *)((u32)pci_reg_base+offset)))
+
+#define PCI_WRITEL(value, offset) \
+ (writel(value, (void *)((u32)pci_reg_base+offset)))
+
+static void __init
+bamboo_setup_pci(void)
+{
+ void *pci_reg_base;
+ unsigned long memory_size;
+ memory_size = ppc_md.find_end_of_memory();
+
+ pci_reg_base = ioremap64(BAMBOO_PCIL0_BASE, BAMBOO_PCIL0_SIZE);
+
+ /* Enable PCI I/O, Mem, and Busmaster cycles */
+ PCI_WRITEW(PCI_READW(PCI_COMMAND) |
+ PCI_COMMAND_MEMORY |
+ PCI_COMMAND_MASTER, PCI_COMMAND);
+
+ /* Disable region first */
+ PCI_WRITEL(0, BAMBOO_PCIL0_PMM0MA);
+
+ /* PLB starting addr: 0x00000000A0000000 */
+ PCI_WRITEL(BAMBOO_PCI_PHY_MEM_BASE, BAMBOO_PCIL0_PMM0LA);
+
+ /* PCI start addr, 0xA0000000 (PCI Address) */
+ PCI_WRITEL(BAMBOO_PCI_MEM_BASE, BAMBOO_PCIL0_PMM0PCILA);
+ PCI_WRITEL(0, BAMBOO_PCIL0_PMM0PCIHA);
+
+ /* Enable no pre-fetch, enable region */
+ PCI_WRITEL(((0xffffffff -
+ (BAMBOO_PCI_UPPER_MEM - BAMBOO_PCI_MEM_BASE)) | 0x01),
+ BAMBOO_PCIL0_PMM0MA);
+
+ /* Disable region one */
+ PCI_WRITEL(0, BAMBOO_PCIL0_PMM1MA);
+ PCI_WRITEL(0, BAMBOO_PCIL0_PMM1LA);
+ PCI_WRITEL(0, BAMBOO_PCIL0_PMM1PCILA);
+ PCI_WRITEL(0, BAMBOO_PCIL0_PMM1PCIHA);
+ PCI_WRITEL(0, BAMBOO_PCIL0_PMM1MA);
+
+ /* Disable region two */
+ PCI_WRITEL(0, BAMBOO_PCIL0_PMM2MA);
+ PCI_WRITEL(0, BAMBOO_PCIL0_PMM2LA);
+ PCI_WRITEL(0, BAMBOO_PCIL0_PMM2PCILA);
+ PCI_WRITEL(0, BAMBOO_PCIL0_PMM2PCIHA);
+ PCI_WRITEL(0, BAMBOO_PCIL0_PMM2MA);
+
+ /* Now configure the PCI->PLB windows, we only use PTM1
+ *
+ * For Inbound flow, set the window size to all available memory
+ * This is required because if size is smaller,
+ * then Eth/PCI DD would fail as PCI card not able to access
+ * the memory allocated by DD.
+ */
+
+ PCI_WRITEL(0, BAMBOO_PCIL0_PTM1MS); /* disabled region 1 */
+ PCI_WRITEL(0, BAMBOO_PCIL0_PTM1LA); /* begin of address map */
+
+ memory_size = 1 << fls(memory_size - 1);
+
+ /* Size low + Enabled */
+ PCI_WRITEL((0xffffffff - (memory_size - 1)) | 0x1, BAMBOO_PCIL0_PTM1MS);
+
+ eieio();
+ iounmap(pci_reg_base);
+}
+
+static void __init
+bamboo_setup_hose(void)
+{
+ unsigned int bar_response, bar;
+ struct pci_controller *hose;
+
+ bamboo_setup_pci();
+
+ hose = pcibios_alloc_controller();
+
+ if (!hose)
+ return;
+
+ hose->first_busno = 0;
+ hose->last_busno = 0xff;
+
+ hose->pci_mem_offset = BAMBOO_PCI_MEM_OFFSET;
+
+ pci_init_resource(&hose->io_resource,
+ BAMBOO_PCI_LOWER_IO,
+ BAMBOO_PCI_UPPER_IO,
+ IORESOURCE_IO,
+ "PCI host bridge");
+
+ pci_init_resource(&hose->mem_resources[0],
+ BAMBOO_PCI_LOWER_MEM,
+ BAMBOO_PCI_UPPER_MEM,
+ IORESOURCE_MEM,
+ "PCI host bridge");
+
+ ppc_md.pci_exclude_device = bamboo_exclude_device;
+
+ hose->io_space.start = BAMBOO_PCI_LOWER_IO;
+ hose->io_space.end = BAMBOO_PCI_UPPER_IO;
+ hose->mem_space.start = BAMBOO_PCI_LOWER_MEM;
+ hose->mem_space.end = BAMBOO_PCI_UPPER_MEM;
+ isa_io_base =
+ (unsigned long)ioremap64(BAMBOO_PCI_IO_BASE, BAMBOO_PCI_IO_SIZE);
+ hose->io_base_virt = (void *)isa_io_base;
+
+ setup_indirect_pci(hose,
+ BAMBOO_PCI_CFGA_PLB32,
+ BAMBOO_PCI_CFGD_PLB32);
+ hose->set_cfg_type = 1;
+
+ /* Zero config bars */
+ for (bar = PCI_BASE_ADDRESS_1; bar <= PCI_BASE_ADDRESS_2; bar += 4) {
+ early_write_config_dword(hose, hose->first_busno,
+ PCI_FUNC(hose->first_busno), bar,
+ 0x00000000);
+ early_read_config_dword(hose, hose->first_busno,
+ PCI_FUNC(hose->first_busno), bar,
+ &bar_response);
+ }
+
+ hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
+
+ ppc_md.pci_swizzle = common_swizzle;
+ ppc_md.pci_map_irq = bamboo_map_irq;
+}
+
+TODC_ALLOC();
+
+static void __init
+bamboo_early_serial_map(void)
+{
+ struct uart_port port;
+
+ /* Setup ioremapped serial port access */
+ memset(&port, 0, sizeof(port));
+ port.membase = ioremap64(PPC440EP_UART0_ADDR, 8);
+ port.irq = 0;
+ port.uartclk = clocks.uart0;
+ port.regshift = 0;
+ port.iotype = SERIAL_IO_MEM;
+ port.flags = ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST;
+ port.line = 0;
+
+ if (early_serial_setup(&port) != 0) {
+ printk("Early serial init of port 0 failed\n");
+ }
+
+#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
+ /* Configure debug serial access */
+ gen550_init(0, &port);
+#endif
+
+ port.membase = ioremap64(PPC440EP_UART1_ADDR, 8);
+ port.irq = 1;
+ port.uartclk = clocks.uart1;
+ port.line = 1;
+
+ if (early_serial_setup(&port) != 0) {
+ printk("Early serial init of port 1 failed\n");
+ }
+
+#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
+ /* Configure debug serial access */
+ gen550_init(1, &port);
+#endif
+
+ port.membase = ioremap64(PPC440EP_UART2_ADDR, 8);
+ port.irq = 3;
+ port.uartclk = clocks.uart2;
+ port.line = 2;
+
+ if (early_serial_setup(&port) != 0) {
+ printk("Early serial init of port 2 failed\n");
+ }
+
+#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
+ /* Configure debug serial access */
+ gen550_init(2, &port);
+#endif
+
+ port.membase = ioremap64(PPC440EP_UART3_ADDR, 8);
+ port.irq = 4;
+ port.uartclk = clocks.uart3;
+ port.line = 3;
+
+ if (early_serial_setup(&port) != 0) {
+ printk("Early serial init of port 3 failed\n");
+ }
+}
+
+static void __init
+bamboo_setup_arch(void)
+{
+
+ bamboo_set_emacdata();
+
+ ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
+ ocp_sys_info.opb_bus_freq = clocks.opb;
+
+ /* Setup TODC access */
+ TODC_INIT(TODC_TYPE_DS1743,
+ 0,
+ 0,
+ ioremap64(BAMBOO_RTC_ADDR, BAMBOO_RTC_SIZE),
+ 8);
+
+ /* init to some ~sane value until calibrate_delay() runs */
+ loops_per_jiffy = 50000000/HZ;
+
+ /* Setup PCI host bridge */
+ bamboo_setup_hose();
+
+#ifdef CONFIG_BLK_DEV_INITRD
+ if (initrd_start)
+ ROOT_DEV = Root_RAM0;
+ else
+#endif
+#ifdef CONFIG_ROOT_NFS
+ ROOT_DEV = Root_NFS;
+#else
+ ROOT_DEV = Root_HDA1;
+#endif
+
+ bamboo_early_serial_map();
+
+ /* Identify the system */
+ printk("IBM Bamboo port (MontaVista Software, Inc. (source@mvista.com))\n");
+}
+
+void __init platform_init(unsigned long r3, unsigned long r4,
+ unsigned long r5, unsigned long r6, unsigned long r7)
+{
+ parse_bootinfo(find_bootinfo());
+
+ /*
+ * If we were passed in a board information, copy it into the
+ * residual data area.
+ */
+ if (r3)
+ __res = *(bd_t *)(r3 + KERNELBASE);
+
+
+ ibm44x_platform_init();
+
+ ppc_md.setup_arch = bamboo_setup_arch;
+ ppc_md.show_cpuinfo = bamboo_show_cpuinfo;
+ ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */
+
+ ppc_md.calibrate_decr = bamboo_calibrate_decr;
+ ppc_md.time_init = todc_time_init;
+ ppc_md.set_rtc_time = todc_set_rtc_time;
+ ppc_md.get_rtc_time = todc_get_rtc_time;
+
+ ppc_md.nvram_read_val = todc_direct_read_val;
+ ppc_md.nvram_write_val = todc_direct_write_val;
+#ifdef CONFIG_KGDB
+ ppc_md.early_serial_map = bamboo_early_serial_map;
+#endif
+}
+
diff -uprN linux-2.6.12/arch/ppc/platforms/4xx/bamboo.h linux-2.6.12-440ep/arch/ppc/platforms/4xx/bamboo.h
--- linux-2.6.12/arch/ppc/platforms/4xx/bamboo.h 1969-12-31 17:00:00.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/platforms/4xx/bamboo.h 2005-07-25 11:32:22.000000000 -0700
@@ -0,0 +1,136 @@
+/*
+ * arch/ppc/platforms/bamboo.h
+ *
+ * Bamboo board definitions
+ *
+ * Wade Farnsworth <wfarnsworth@mvista.com>
+ *
+ * Copyright 2004 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifdef __KERNEL__
+#ifndef __ASM_BAMBOO_H__
+#define __ASM_BAMBOO_H__
+
+#include <linux/config.h>
+#include <platforms/4xx/ibm440ep.h>
+
+/* F/W TLB mapping used in bootloader glue to reset EMAC */
+#define PPC44x_EMAC0_MR0 0x0EF600E00
+
+/* Location of MAC addresses in PIBS image */
+#define PIBS_FLASH_BASE 0xfff00000
+#define PIBS_MAC_BASE (PIBS_FLASH_BASE+0xc0400)
+#define PIBS_MAC_SIZE 0x200
+#define PIBS_MAC_OFFSET 0x100
+
+/* Default clock rate */
+#define BAMBOO_TMRCLK 25000000
+
+/* RTC/NVRAM location */
+#define BAMBOO_RTC_ADDR 0x080000000ULL
+#define BAMBOO_RTC_SIZE 0x2000
+
+/* FPGA Registers */
+#define BAMBOO_FPGA_ADDR 0x080002000ULL
+
+#define BAMBOO_FPGA_CONFIG2_REG_ADDR (BAMBOO_FPGA_ADDR + 0x1)
+#define BAMBOO_FULL_DUPLEX_EN(x) (x & 0x08)
+#define BAMBOO_FORCE_100Mbps(x) (x & 0x04)
+#define BAMBOO_AUTONEGOTIATE(x) (x & 0x02)
+
+#define BAMBOO_FPGA_SETTING_REG_ADDR (BAMBOO_FPGA_ADDR + 0x3)
+#define BAMBOO_BOOT_SMALL_FLASH(x) (!(x & 0x80))
+#define BAMBOO_LARGE_FLASH_EN(x) (!(x & 0x40))
+#define BAMBOO_BOOT_NAND_FLASH(x) (!(x & 0x20))
+
+#define BAMBOO_FPGA_SELECTION1_REG_ADDR (BAMBOO_FPGA_ADDR + 0x4)
+#define BAMBOO_SEL_MII(x) (x & 0x80)
+#define BAMBOO_SEL_RMII(x) (x & 0x40)
+#define BAMBOO_SEL_SMII(x) (x & 0x20)
+
+/* Flash */
+#define BAMBOO_SMALL_FLASH_LOW 0x087f00000ULL
+#define BAMBOO_SMALL_FLASH_HIGH 0x0fff00000ULL
+#define BAMBOO_SMALL_FLASH_SIZE 0x100000
+#define BAMBOO_LARGE_FLASH_LOW 0x087800000ULL
+#define BAMBOO_LARGE_FLASH_HIGH1 0x0ff800000ULL
+#define BAMBOO_LARGE_FLASH_HIGH2 0x0ffc00000ULL
+#define BAMBOO_LARGE_FLASH_SIZE 0x400000
+#define BAMBOO_SRAM_LOW 0x087f00000ULL
+#define BAMBOO_SRAM_HIGH1 0x0fff00000ULL
+#define BAMBOO_SRAM_HIGH2 0x0ff800000ULL
+#define BAMBOO_SRAM_SIZE 0x100000
+#define BAMBOO_NAND_FLASH_REG_ADDR 0x090000000ULL
+#define BAMBOO_NAND_FLASH_REG_SIZE 0x2000
+
+/*
+ * Serial port defines
+ */
+#define RS_TABLE_SIZE 4
+
+#define UART0_IO_BASE 0xEF600300
+#define UART1_IO_BASE 0xEF600400
+#define UART2_IO_BASE 0xEF600500
+#define UART3_IO_BASE 0xEF600600
+
+#define BASE_BAUD 33177600/3/16
+#define UART0_INT 0
+#define UART1_INT 1
+#define UART2_INT 3
+#define UART3_INT 4
+
+#define STD_UART_OP(num) \
+ { 0, BASE_BAUD, 0, UART##num##_INT, \
+ (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
+ iomem_base: UART##num##_IO_BASE, \
+ io_type: SERIAL_IO_MEM},
+
+#define SERIAL_PORT_DFNS \
+ STD_UART_OP(0) \
+ STD_UART_OP(1) \
+ STD_UART_OP(2) \
+ STD_UART_OP(3)
+
+/* PCI support */
+#define BAMBOO_PCI_CFGA_PLB32 0xeec00000
+#define BAMBOO_PCI_CFGD_PLB32 0xeec00004
+
+#define BAMBOO_PCI_IO_BASE 0x00000000e8000000ULL
+#define BAMBOO_PCI_IO_SIZE 0x00010000
+#define BAMBOO_PCI_MEM_OFFSET 0x00000000
+#define BAMBOO_PCI_PHY_MEM_BASE 0x00000000a0000000ULL
+
+#define BAMBOO_PCI_LOWER_IO 0x00000000
+#define BAMBOO_PCI_UPPER_IO 0x0000ffff
+#define BAMBOO_PCI_LOWER_MEM 0xa0000000
+#define BAMBOO_PCI_UPPER_MEM 0xafffffff
+#define BAMBOO_PCI_MEM_BASE 0xa0000000
+
+#define BAMBOO_PCIL0_BASE 0x00000000ef400000ULL
+#define BAMBOO_PCIL0_SIZE 0x40
+
+#define BAMBOO_PCIL0_PMM0LA 0x000
+#define BAMBOO_PCIL0_PMM0MA 0x004
+#define BAMBOO_PCIL0_PMM0PCILA 0x008
+#define BAMBOO_PCIL0_PMM0PCIHA 0x00C
+#define BAMBOO_PCIL0_PMM1LA 0x010
+#define BAMBOO_PCIL0_PMM1MA 0x014
+#define BAMBOO_PCIL0_PMM1PCILA 0x018
+#define BAMBOO_PCIL0_PMM1PCIHA 0x01C
+#define BAMBOO_PCIL0_PMM2LA 0x020
+#define BAMBOO_PCIL0_PMM2MA 0x024
+#define BAMBOO_PCIL0_PMM2PCILA 0x028
+#define BAMBOO_PCIL0_PMM2PCIHA 0x02C
+#define BAMBOO_PCIL0_PTM1MS 0x030
+#define BAMBOO_PCIL0_PTM1LA 0x034
+#define BAMBOO_PCIL0_PTM2MS 0x038
+#define BAMBOO_PCIL0_PTM2LA 0x03C
+
+#endif /* __ASM_BAMBOO_H__ */
+#endif /* __KERNEL__ */
diff -uprN linux-2.6.12/arch/ppc/platforms/4xx/ibm440ep.c linux-2.6.12-440ep/arch/ppc/platforms/4xx/ibm440ep.c
--- linux-2.6.12/arch/ppc/platforms/4xx/ibm440ep.c 1969-12-31 17:00:00.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/platforms/4xx/ibm440ep.c 2005-07-25 12:53:37.000000000 -0700
@@ -0,0 +1,220 @@
+/*
+ * arch/ppc/platforms/4xx/ibm440ep.c
+ *
+ * PPC440EP I/O descriptions
+ *
+ * Wade Farnsworth <wfarnsworth@mvista.com>
+ * Copyright 2004 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <platforms/4xx/ibm440ep.h>
+#include <asm/ocp.h>
+#include <asm/ppc4xx_pic.h>
+
+static struct ocp_func_emac_data ibm440ep_emac0_def = {
+ .rgmii_idx = -1, /* No RGMII */
+ .rgmii_mux = -1, /* No RGMII */
+ .zmii_idx = 0, /* ZMII device index */
+ .zmii_mux = 0, /* ZMII input of this EMAC */
+ .mal_idx = 0, /* MAL device index */
+ .mal_rx_chan = 0, /* MAL rx channel number */
+ .mal_tx_chan = 0, /* MAL tx channel number */
+ .wol_irq = 61, /* WOL interrupt number */
+ .mdio_idx = -1, /* No shared MDIO */
+ .tah_idx = -1, /* No TAH */
+};
+
+static struct ocp_func_emac_data ibm440ep_emac1_def = {
+ .rgmii_idx = -1, /* No RGMII */
+ .rgmii_mux = -1, /* No RGMII */
+ .zmii_idx = 0, /* ZMII device index */
+ .zmii_mux = 1, /* ZMII input of this EMAC */
+ .mal_idx = 0, /* MAL device index */
+ .mal_rx_chan = 1, /* MAL rx channel number */
+ .mal_tx_chan = 2, /* MAL tx channel number */
+ .wol_irq = 63, /* WOL interrupt number */
+ .mdio_idx = -1, /* No shared MDIO */
+ .tah_idx = -1, /* No TAH */
+};
+OCP_SYSFS_EMAC_DATA()
+
+static struct ocp_func_mal_data ibm440ep_mal0_def = {
+ .num_tx_chans = 4, /* Number of TX channels */
+ .num_rx_chans = 2, /* Number of RX channels */
+ .txeob_irq = 10, /* TX End Of Buffer IRQ */
+ .rxeob_irq = 11, /* RX End Of Buffer IRQ */
+ .txde_irq = 33, /* TX Descriptor Error IRQ */
+ .rxde_irq = 34, /* RX Descriptor Error IRQ */
+ .serr_irq = 32, /* MAL System Error IRQ */
+};
+OCP_SYSFS_MAL_DATA()
+
+static struct ocp_func_iic_data ibm440ep_iic0_def = {
+ .fast_mode = 0, /* Use standad mode (100Khz) */
+};
+
+static struct ocp_func_iic_data ibm440ep_iic1_def = {
+ .fast_mode = 0, /* Use standad mode (100Khz) */
+};
+OCP_SYSFS_IIC_DATA()
+
+struct ocp_def core_ocp[] = {
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_OPB,
+ .index = 0,
+ .paddr = 0x0EF600000ULL,
+ .irq = OCP_IRQ_NA,
+ .pm = OCP_CPM_NA,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_16550,
+ .index = 0,
+ .paddr = PPC440EP_UART0_ADDR,
+ .irq = UART0_INT,
+ .pm = IBM_CPM_UART0,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_16550,
+ .index = 1,
+ .paddr = PPC440EP_UART1_ADDR,
+ .irq = UART1_INT,
+ .pm = IBM_CPM_UART1,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_16550,
+ .index = 2,
+ .paddr = PPC440EP_UART2_ADDR,
+ .irq = UART2_INT,
+ .pm = IBM_CPM_UART2,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_16550,
+ .index = 3,
+ .paddr = PPC440EP_UART3_ADDR,
+ .irq = UART3_INT,
+ .pm = IBM_CPM_UART3,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_IIC,
+ .index = 0,
+ .paddr = 0x0EF600700ULL,
+ .irq = 2,
+ .pm = IBM_CPM_IIC0,
+ .additions = &ibm440ep_iic0_def,
+ .show = &ocp_show_iic_data
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_IIC,
+ .index = 1,
+ .paddr = 0x0EF600800ULL,
+ .irq = 7,
+ .pm = IBM_CPM_IIC1,
+ .additions = &ibm440ep_iic1_def,
+ .show = &ocp_show_iic_data
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_GPIO,
+ .index = 0,
+ .paddr = 0x0EF600B00ULL,
+ .irq = OCP_IRQ_NA,
+ .pm = IBM_CPM_GPIO0,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_GPIO,
+ .index = 1,
+ .paddr = 0x0EF600C00ULL,
+ .irq = OCP_IRQ_NA,
+ .pm = OCP_CPM_NA,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_MAL,
+ .paddr = OCP_PADDR_NA,
+ .irq = OCP_IRQ_NA,
+ .pm = OCP_CPM_NA,
+ .additions = &ibm440ep_mal0_def,
+ .show = &ocp_show_mal_data,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_EMAC,
+ .index = 0,
+ .paddr = 0x0EF600E00ULL,
+ .irq = 60,
+ .pm = OCP_CPM_NA,
+ .additions = &ibm440ep_emac0_def,
+ .show = &ocp_show_emac_data,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_EMAC,
+ .index = 1,
+ .paddr = 0x0EF600F00ULL,
+ .irq = 62,
+ .pm = OCP_CPM_NA,
+ .additions = &ibm440ep_emac1_def,
+ .show = &ocp_show_emac_data,
+ },
+ { .vendor = OCP_VENDOR_IBM,
+ .function = OCP_FUNC_ZMII,
+ .paddr = 0x0EF600D00ULL,
+ .irq = OCP_IRQ_NA,
+ .pm = OCP_CPM_NA,
+ },
+ { .vendor = OCP_VENDOR_INVALID
+ }
+};
+
+/* Polarity and triggering settings for internal interrupt sources */
+struct ppc4xx_uic_settings ppc4xx_core_uic_cfg[] __initdata = {
+ { .polarity = 0xffbffe03,
+ .triggering = 0xfffffe00,
+ .ext_irq_mask = 0x000001fc, /* IRQ0 - IRQ6 */
+ },
+ { .polarity = 0xffffc6ef,
+ .triggering = 0xffffc7ff,
+ .ext_irq_mask = 0x00003800, /* IRQ7 - IRQ9 */
+ },
+};
+
+static struct resource usb_gadget_resources[] = {
+ [0] = {
+ .start = 0x050000100ULL,
+ .end = 0x05000017FULL,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 55,
+ .end = 55,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static u64 dma_mask = 0xffffffffULL;
+
+static struct platform_device usb_gadget_device = {
+ .name = "musbhsfc",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(usb_gadget_resources),
+ .resource = usb_gadget_resources,
+ .dev = {
+ .dma_mask = &dma_mask,
+ .coherent_dma_mask = 0xffffffffULL,
+ }
+};
+
+static struct platform_device *ibm440ep_devs[] __initdata = {
+ &usb_gadget_device,
+};
+
+static int __init
+ibm440ep_platform_add_devices(void)
+{
+ return platform_add_devices(ibm440ep_devs, ARRAY_SIZE(ibm440ep_devs));
+}
+arch_initcall(ibm440ep_platform_add_devices);
+
diff -uprN linux-2.6.12/arch/ppc/platforms/4xx/ibm440ep.h linux-2.6.12-440ep/arch/ppc/platforms/4xx/ibm440ep.h
--- linux-2.6.12/arch/ppc/platforms/4xx/ibm440ep.h 1969-12-31 17:00:00.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/platforms/4xx/ibm440ep.h 2005-07-25 11:32:22.000000000 -0700
@@ -0,0 +1,76 @@
+/*
+ * arch/ppc/platforms/4xx/ibm440ep.h
+ *
+ * PPC440EP definitions
+ *
+ * Wade Farnsworth <wfarnsworth@mvista.com>
+ *
+ * Copyright 2002 Roland Dreier
+ * Copyright 2004 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifdef __KERNEL__
+#ifndef __PPC_PLATFORMS_IBM440EP_H
+#define __PPC_PLATFORMS_IBM440EP_H
+
+#include <linux/config.h>
+#include <asm/ibm44x.h>
+
+/* UART */
+#define PPC440EP_UART0_ADDR 0x0EF600300
+#define PPC440EP_UART1_ADDR 0x0EF600400
+#define PPC440EP_UART2_ADDR 0x0EF600500
+#define PPC440EP_UART3_ADDR 0x0EF600600
+#define UART0_INT 0
+#define UART1_INT 1
+#define UART2_INT 3
+#define UART3_INT 4
+
+/* Clock and Power Management */
+#define IBM_CPM_IIC0 0x80000000 /* IIC interface */
+#define IBM_CPM_IIC1 0x40000000 /* IIC interface */
+#define IBM_CPM_PCI 0x20000000 /* PCI bridge */
+#define IBM_CPM_USB1H 0x08000000 /* USB 1.1 Host */
+#define IBM_CPM_FPU 0x04000000 /* floating point unit */
+#define IBM_CPM_CPU 0x02000000 /* processor core */
+#define IBM_CPM_DMA 0x01000000 /* DMA controller */
+#define IBM_CPM_BGO 0x00800000 /* PLB to OPB bus arbiter */
+#define IBM_CPM_BGI 0x00400000 /* OPB to PLB bridge */
+#define IBM_CPM_EBC 0x00200000 /* External Bus Controller */
+#define IBM_CPM_EBM 0x00100000 /* Ext Bus Master Interface */
+#define IBM_CPM_DMC 0x00080000 /* SDRAM peripheral controller */
+#define IBM_CPM_PLB4 0x00040000 /* PLB4 bus arbiter */
+#define IBM_CPM_PLB4x3 0x00020000 /* PLB4 to PLB3 bridge controller */
+#define IBM_CPM_PLB3x4 0x00010000 /* PLB3 to PLB4 bridge controller */
+#define IBM_CPM_PLB3 0x00008000 /* PLB3 bus arbiter */
+#define IBM_CPM_PPM 0x00002000 /* PLB Performance Monitor */
+#define IBM_CPM_UIC1 0x00001000 /* Universal Interrupt Controller */
+#define IBM_CPM_GPIO0 0x00000800 /* General Purpose IO (??) */
+#define IBM_CPM_GPT 0x00000400 /* General Purpose Timers */
+#define IBM_CPM_UART0 0x00000200 /* serial port 0 */
+#define IBM_CPM_UART1 0x00000100 /* serial port 1 */
+#define IBM_CPM_UIC0 0x00000080 /* Universal Interrupt Controller */
+#define IBM_CPM_TMRCLK 0x00000040 /* CPU timers */
+#define IBM_CPM_EMAC0 0x00000020 /* ethernet port 0 */
+#define IBM_CPM_EMAC1 0x00000010 /* ethernet port 1 */
+#define IBM_CPM_UART2 0x00000008 /* serial port 2 */
+#define IBM_CPM_UART3 0x00000004 /* serial port 3 */
+#define IBM_CPM_USB2D 0x00000002 /* USB 2.0 Device */
+#define IBM_CPM_USB2H 0x00000001 /* USB 2.0 Host */
+
+#define DFLT_IBM4xx_PM ~(IBM_CPM_UIC0 | IBM_CPM_UIC1 | IBM_CPM_CPU \
+ | IBM_CPM_EBC | IBM_CPM_BGO | IBM_CPM_FPU \
+ | IBM_CPM_EBM | IBM_CPM_PLB4 | IBM_CPM_3x4 \
+ | IBM_CPM_PLB3 | IBM_CPM_PLB4x3 \
+ | IBM_CPM_EMAC0 | IBM_CPM_TMRCLK \
+ | IBM_CPM_DMA | IBM_CPM_PCI | IBM_CPM_EMAC1)
+
+
+#endif /* __PPC_PLATFORMS_IBM440EP_H */
+#endif /* __KERNEL__ */
diff -uprN linux-2.6.12/arch/ppc/syslib/Makefile linux-2.6.12-440ep/arch/ppc/syslib/Makefile
--- linux-2.6.12/arch/ppc/syslib/Makefile 2005-07-25 12:57:00.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/syslib/Makefile 2005-07-25 11:32:22.000000000 -0700
@@ -11,6 +11,7 @@ obj-$(CONFIG_PPCBUG_NVRAM) += prep_nvram
obj-$(CONFIG_PPC_OCP) += ocp.o
obj-$(CONFIG_IBM_OCP) += ibm_ocp.o
obj-$(CONFIG_44x) += ibm44x_common.o
+obj-$(CONFIG_440EP) += ibm440gx_common.o
obj-$(CONFIG_440GP) += ibm440gp_common.o
obj-$(CONFIG_440GX) += ibm440gx_common.o
obj-$(CONFIG_440SP) += ibm440gx_common.o ibm440sp_common.o
@@ -44,6 +45,7 @@ obj-$(CONFIG_PPC_CHRP) += open_pic.o in
obj-$(CONFIG_PPC_PREP) += open_pic.o indirect_pci.o i8259.o todc_time.o
obj-$(CONFIG_ADIR) += i8259.o indirect_pci.o pci_auto.o \
todc_time.o
+obj-$(CONFIG_BAMBOO) += indirect_pci.o pci_auto.o todc_time.o
obj-$(CONFIG_CPCI690) += todc_time.o pci_auto.o
obj-$(CONFIG_EBONY) += indirect_pci.o pci_auto.o todc_time.o
obj-$(CONFIG_EV64260) += todc_time.o pci_auto.o
diff -uprN linux-2.6.12/arch/ppc/syslib/ibm440gx_common.c linux-2.6.12-440ep/arch/ppc/syslib/ibm440gx_common.c
--- linux-2.6.12/arch/ppc/syslib/ibm440gx_common.c 2005-06-17 12:48:29.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/syslib/ibm440gx_common.c 2005-07-25 11:32:22.000000000 -0700
@@ -34,6 +34,10 @@ void __init ibm440gx_get_clocks(struct i
u32 plld = CPR_READ(DCRN_CPR_PLLD);
u32 uart0 = SDR_READ(DCRN_SDR_UART0);
u32 uart1 = SDR_READ(DCRN_SDR_UART1);
+#ifdef CONFIG_440EP
+ u32 uart2 = SDR_READ(DCRN_SDR_UART2);
+ u32 uart3 = SDR_READ(DCRN_SDR_UART3);
+#endif
/* Dividers */
u32 fbdv = __fix_zero((plld >> 24) & 0x1f, 32);
@@ -96,6 +100,17 @@ bypass:
p->uart1 = ser_clk;
else
p->uart1 = p->plb / __fix_zero(uart1 & 0xff, 256);
+#ifdef CONFIG_440EP
+ if (uart2 & 0x00800000)
+ p->uart2 = ser_clk;
+ else
+ p->uart2 = p->plb / __fix_zero(uart2 & 0xff, 256);
+
+ if (uart3 & 0x00800000)
+ p->uart3 = ser_clk;
+ else
+ p->uart3 = p->plb / __fix_zero(uart3 & 0xff, 256);
+#endif
}
/* Issue L2C diagnostic command */
diff -uprN linux-2.6.12/arch/ppc/syslib/ibm44x_common.h linux-2.6.12-440ep/arch/ppc/syslib/ibm44x_common.h
--- linux-2.6.12/arch/ppc/syslib/ibm44x_common.h 2005-06-17 12:48:29.000000000 -0700
+++ linux-2.6.12-440ep/arch/ppc/syslib/ibm44x_common.h 2005-07-25 11:32:23.000000000 -0700
@@ -29,6 +29,10 @@ struct ibm44x_clocks {
unsigned int ebc; /* PerClk */
unsigned int uart0;
unsigned int uart1;
+#ifdef CONFIG_440EP
+ unsigned int uart2;
+ unsigned int uart3;
+#endif
};
/* common 44x platform init */
^ permalink raw reply
* Re: [PATCH 2/3] IBM EMAC support for the PPC440EP
From: Wade Farnsworth @ 2005-07-26 16:03 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <1122393448.22059.32.camel@rhino.az.mvista.com>
[-- Attachment #1: Type: text/plain, Size: 124 bytes --]
This adds support to the IBM EMAC ethernet driver for the 440EP.
Signed-off by: Wade Farnsworth <wfarnsworth@mvista.com>
[-- Attachment #2: 440ep-net.patch --]
[-- Type: text/x-patch, Size: 2788 bytes --]
diff -uprN linux-2.6.12/drivers/net/ibm_emac/ibm_emac_phy.c linux-2.6.12-440ep/drivers/net/ibm_emac/ibm_emac_phy.c
--- linux-2.6.12/drivers/net/ibm_emac/ibm_emac_phy.c 2005-06-17 12:48:29.000000000 -0700
+++ linux-2.6.12-440ep/drivers/net/ibm_emac/ibm_emac_phy.c 2005-07-25 11:32:38.000000000 -0700
@@ -24,6 +24,7 @@
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/delay.h>
+#include <linux/vmalloc.h>
#include "ibm_emac_phy.h"
@@ -78,6 +79,45 @@ static int cis8201_init(struct mii_phy *
return 0;
}
+#ifdef CONFIG_BAMBOO
+static int ac104_init(struct mii_phy *phy)
+{
+ /*
+ * SW2 on the Bamboo is used for ethernet configuration and is accessed
+ * via the CONFIG2 register in the FPGA. If the ANEG pin is set,
+ * overwrite the supported features with the settings in SW2.
+ */
+ u8 *config2_addr, config2_val;
+ config2_addr = ioremap64(BAMBOO_FPGA_CONFIG2_REG_ADDR, 0x8);
+ config2_val = * config2_addr;
+ iounmap(config2_addr);
+ if (BAMBOO_AUTONEGOTIATE(config2_val))
+ return 0;
+ phy->def->features = SUPPORTED_TP | SUPPORTED_MII;
+ if (BAMBOO_FORCE_100Mbps(config2_val)) {
+ phy->speed = SPEED_100;
+ if (BAMBOO_FULL_DUPLEX_EN(config2_val)) {
+ phy->def->features |= SUPPORTED_100baseT_Full;
+ phy->duplex = DUPLEX_FULL;
+ } else {
+ phy->def->features |= SUPPORTED_100baseT_Half;
+ phy->duplex = DUPLEX_HALF;
+ }
+ } else {
+ phy->speed = SPEED_10;
+ if (BAMBOO_FULL_DUPLEX_EN(config2_val)) {
+ phy->def->features |= SUPPORTED_10baseT_Full;
+ phy->duplex = DUPLEX_FULL;
+ } else {
+ phy->def->features |= SUPPORTED_10baseT_Half;
+ phy->duplex = DUPLEX_HALF;
+ }
+ }
+
+ return 0;
+}
+#endif
+
static int genmii_setup_aneg(struct mii_phy *phy, u32 advertise)
{
u16 ctl, adv;
@@ -226,6 +266,17 @@ static struct mii_phy_ops cis8201_phy_op
read_link:cis8201_read_link
};
+/* AC104 phy ops */
+static struct mii_phy_ops ac104_phy_ops = {
+#ifdef CONFIG_BAMBOO
+ init:ac104_init,
+#endif
+ setup_aneg:genmii_setup_aneg,
+ setup_forced:genmii_setup_forced,
+ poll_link:genmii_poll_link,
+ read_link:genmii_read_link
+};
+
/* Generic implementation for most 10/100 PHYs */
static struct mii_phy_ops generic_phy_ops = {
setup_aneg:genmii_setup_aneg,
@@ -234,6 +285,15 @@ static struct mii_phy_ops generic_phy_op
read_link:genmii_read_link
};
+static struct mii_phy_def ac104_phy_def = {
+ phy_id:0x00225540,
+ phy_id_mask:0x00fffff0,
+ name:"AC104 Ethernet",
+ features:MII_BASIC_FEATURES,
+ magic_aneg:0,
+ ops:&ac104_phy_ops
+};
+
static struct mii_phy_def cis8201_phy_def = {
phy_id:0x000fc410,
phy_id_mask:0x000ffff0,
@@ -254,6 +314,7 @@ static struct mii_phy_def genmii_phy_def
static struct mii_phy_def *mii_phy_table[] = {
&cis8201_phy_def,
+ &ac104_phy_def,
&genmii_phy_def,
NULL
};
^ permalink raw reply
* Re: [PATCH 3/3] MTD support for the Bamboo board
From: Wade Farnsworth @ 2005-07-26 16:06 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <1122393818.22059.38.camel@rhino.az.mvista.com>
[-- Attachment #1: Type: text/plain, Size: 101 bytes --]
This adds MTD support for the Bamboo board.
Signed-off by: Wade Farnsworth <wfarnsworth@mvista.com>
[-- Attachment #2: 440ep-mtd.patch --]
[-- Type: text/x-patch, Size: 56380 bytes --]
diff -uprN linux-2.6.12/drivers/mtd/maps/Kconfig linux-2.6.12-440ep/drivers/mtd/maps/Kconfig
--- linux-2.6.12/drivers/mtd/maps/Kconfig 2005-07-25 12:57:05.000000000 -0700
+++ linux-2.6.12-440ep/drivers/mtd/maps/Kconfig 2005-07-25 11:32:32.000000000 -0700
@@ -331,6 +331,13 @@ config MTD_OCOTEA
This enables access routines for the flash chips on the IBM 440GX
Ocotea board. If you have one of these boards and would like to
use the flash chips on it, say 'Y'.
+config MTD_BAMBOO
+ tristate "Flash devices mapped on IBM 440EP Bamboo"
+ depends on MTD_CFI && PPC32 && 44x && BAMBOO
+ help
+ This enables access routined for the flash chips on the IBM 440EP
+ Bamboo board. If you have one of these boards and would like to
+ use the flash chips on it, say 'Y'.
config MTD_REDWOOD
tristate "CFI Flash devices mapped on IBM Redwood"
diff -uprN linux-2.6.12/drivers/mtd/maps/Kconfig.orig linux-2.6.12-440ep/drivers/mtd/maps/Kconfig.orig
--- linux-2.6.12/drivers/mtd/maps/Kconfig.orig 1969-12-31 17:00:00.000000000 -0700
+++ linux-2.6.12-440ep/drivers/mtd/maps/Kconfig.orig 2005-07-25 11:31:51.000000000 -0700
@@ -0,0 +1,628 @@
+# drivers/mtd/maps/Kconfig
+# $Id: Kconfig,v 1.55 2005/07/02 01:53:24 tpoynor Exp $
+
+menu "Mapping drivers for chip access"
+ depends on MTD!=n
+
+config MTD_COMPLEX_MAPPINGS
+ bool "Support non-linear mappings of flash chips"
+ depends on MTD
+ help
+ This causes the chip drivers to allow for complicated
+ paged mappings of flash chips.
+
+config MTD_PHYSMAP
+ tristate "CFI Flash device in physical memory map"
+ depends on MTD_CFI
+ help
+ This provides a 'mapping' driver which allows the CFI probe and
+ command set driver code to communicate with flash chips which
+ are mapped physically into the CPU's memory. You will need to
+ configure the physical address and size of the flash chips on
+ your particular board as well as the bus width, either statically
+ with config options or at run-time.
+
+config MTD_PHYSMAP_START
+ hex "Physical start address of flash mapping"
+ depends on MTD_PHYSMAP
+ default "0x8000000"
+ help
+ This is the physical memory location at which the flash chips
+ are mapped on your particular target board. Refer to the
+ memory map which should hopefully be in the documentation for
+ your board.
+ Ignore this option if you use run-time physmap configuration
+ (i.e., run-time calling physmap_configure()).
+
+config MTD_PHYSMAP_LEN
+ hex "Physical length of flash mapping"
+ depends on MTD_PHYSMAP
+ default "0x4000000"
+ help
+ This is the total length of the mapping of the flash chips on
+ your particular board. If there is space, or aliases, in the
+ physical memory map between the chips, this could be larger
+ than the total amount of flash present. Refer to the memory
+ map which should hopefully be in the documentation for your
+ board.
+ Ignore this option if you use run-time physmap configuration
+ (i.e., run-time calling physmap_configure()).
+
+config MTD_PHYSMAP_BANKWIDTH
+ int "Bank width in octets"
+ depends on MTD_PHYSMAP
+ default "2"
+ help
+ This is the total width of the data bus of the flash devices
+ in octets. For example, if you have a data bus width of 32
+ bits, you would set the bus width octect value to 4. This is
+ used internally by the CFI drivers.
+ Ignore this option if you use run-time physmap configuration
+ (i.e., run-time calling physmap_configure()).
+
+config MTD_SUN_UFLASH
+ tristate "Sun Microsystems userflash support"
+ depends on (SPARC32 || SPARC64) && MTD_CFI
+ help
+ This provides a 'mapping' driver which supports the way in
+ which user-programmable flash chips are connected on various
+ Sun Microsystems boardsets. This driver will require CFI support
+ in the kernel, so if you did not enable CFI previously, do that now.
+
+config MTD_PNC2000
+ tristate "CFI Flash device mapped on Photron PNC-2000"
+ depends on X86 && MTD_CFI && MTD_PARTITIONS
+ help
+ PNC-2000 is the name of Network Camera product from PHOTRON
+ Ltd. in Japan. It uses CFI-compliant flash.
+
+config MTD_SC520CDP
+ tristate "CFI Flash device mapped on AMD SC520 CDP"
+ depends on X86 && MTD_CFI
+ help
+ The SC520 CDP board has two banks of CFI-compliant chips and one
+ Dual-in-line JEDEC chip. This 'mapping' driver supports that
+ arrangement, implementing three MTD devices.
+
+config MTD_NETSC520
+ tristate "CFI Flash device mapped on AMD NetSc520"
+ depends on X86 && MTD_CFI && MTD_PARTITIONS
+ help
+ This enables access routines for the flash chips on the AMD NetSc520
+ demonstration board. If you have one of these boards and would like
+ to use the flash chips on it, say 'Y'.
+
+config MTD_TS5500
+ tristate "JEDEC Flash device mapped on Technologic Systems TS-5500"
+ depends on X86 && MTD_JEDECPROBE && MTD_PARTITIONS
+ help
+ This provides a driver for the on-board flash of the Technologic
+ System's TS-5500 board. The flash is split into 3 partitions
+ which are accessed as separate MTD devices.
+
+ mtd0 and mtd2 are the two BIOS drives. Unfortunately the BIOS
+ uses a proprietary flash translation layer from General Software,
+ which is not supported (the drives cannot be mounted). You can
+ create your own file system (jffs for example), but the BIOS
+ won't be able to boot from it.
+
+ mtd1 allows you to reprogram your BIOS. BE VERY CAREFUL.
+
+ Note that jumper 3 ("Write Enable Drive A") must be set
+ otherwise detection won't succeeed.
+
+config MTD_SBC_GXX
+ tristate "CFI Flash device mapped on Arcom SBC-GXx boards"
+ depends on X86 && MTD_CFI_INTELEXT && MTD_PARTITIONS && MTD_COMPLEX_MAPPINGS
+ help
+ This provides a driver for the on-board flash of Arcom Control
+ Systems' SBC-GXn family of boards, formerly known as SBC-MediaGX.
+ By default the flash is split into 3 partitions which are accessed
+ as separate MTD devices. This board utilizes Intel StrataFlash.
+ More info at
+ <http://www.arcomcontrols.com/products/icp/pc104/processors/SBC_GX1.htm>.
+
+config MTD_LUBBOCK
+ tristate "CFI Flash device mapped on Intel Lubbock XScale eval board"
+ depends on ARCH_LUBBOCK && MTD_CFI_INTELEXT && MTD_PARTITIONS
+ help
+ This provides a driver for the on-board flash of the Intel
+ 'Lubbock' XScale evaluation board.
+
+config MTD_MAINSTONE
+ tristate "CFI Flash device mapped on Intel Mainstone XScale eval board"
+ depends on MACH_MAINSTONE && MTD_CFI_INTELEXT
+ select MTD_PARTITIONS
+ help
+ This provides a driver for the on-board flash of the Intel
+ 'Mainstone PXA27x evaluation board.
+
+config MTD_OCTAGON
+ tristate "JEDEC Flash device mapped on Octagon 5066 SBC"
+ depends on X86 && MTD_JEDEC && MTD_COMPLEX_MAPPINGS
+ help
+ This provides a 'mapping' driver which supports the way in which
+ the flash chips are connected in the Octagon-5066 Single Board
+ Computer. More information on the board is available at
+ <http://www.octagonsystems.com/CPUpages/5066.html>.
+
+config MTD_VMAX
+ tristate "JEDEC Flash device mapped on Tempustech VMAX SBC301"
+ depends on X86 && MTD_JEDEC && MTD_COMPLEX_MAPPINGS
+ help
+ This provides a 'mapping' driver which supports the way in which
+ the flash chips are connected in the Tempustech VMAX SBC301 Single
+ Board Computer. More information on the board is available at
+ <http://www.tempustech.com/>.
+
+config MTD_SCx200_DOCFLASH
+ tristate "Flash device mapped with DOCCS on NatSemi SCx200"
+ depends on SCx200 && MTD_CFI && MTD_PARTITIONS
+ help
+ Enable support for a flash chip mapped using the DOCCS signal on a
+ National Semiconductor SCx200 processor.
+
+ If you don't know what to do here, say N.
+
+ If compiled as a module, it will be called scx200_docflash.
+
+config MTD_AMD76XROM
+ tristate "BIOS flash chip on AMD76x southbridge"
+ depends on X86 && MTD_JEDECPROBE
+ help
+ Support for treating the BIOS flash chip on AMD76x motherboards
+ as an MTD device - with this you can reprogram your BIOS.
+
+ BE VERY CAREFUL.
+
+config MTD_ICHXROM
+ tristate "BIOS flash chip on Intel Controller Hub 2/3/4/5"
+ depends on X86 && MTD_JEDECPROBE
+ help
+ Support for treating the BIOS flash chip on ICHX motherboards
+ as an MTD device - with this you can reprogram your BIOS.
+
+ BE VERY CAREFUL.
+
+config MTD_SCB2_FLASH
+ tristate "BIOS flash chip on Intel SCB2 boards"
+ depends on X86 && MTD_JEDECPROBE
+ help
+ Support for treating the BIOS flash chip on Intel SCB2 boards
+ as an MTD device - with this you can reprogram your BIOS.
+
+ BE VERY CAREFUL.
+
+config MTD_TSUNAMI
+ tristate "Flash chips on Tsunami TIG bus"
+ depends on ALPHA_TSUNAMI && MTD_COMPLEX_MAPPINGS
+ help
+ Support for the flash chip on Tsunami TIG bus.
+
+config MTD_LASAT
+ tristate "Flash chips on LASAT board"
+ depends on LASAT
+ help
+ Support for the flash chips on the Lasat 100 and 200 boards.
+
+config MTD_NETtel
+ tristate "CFI flash device on SnapGear/SecureEdge"
+ depends on X86 && MTD_PARTITIONS && MTD_JEDECPROBE
+ help
+ Support for flash chips on NETtel/SecureEdge/SnapGear boards.
+
+config MTD_ALCHEMY
+ tristate ' AMD Alchemy Pb1xxx/Db1xxx/RDK MTD support'
+ depends on MIPS && SOC_AU1X00
+ help
+ Flash memory access on AMD Alchemy Pb/Db/RDK Reference Boards
+
+config MTD_DILNETPC
+ tristate "CFI Flash device mapped on DIL/Net PC"
+ depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT
+ help
+ MTD map driver for SSV DIL/Net PC Boards "DNP" and "ADNP".
+ For details, see <http://www.ssv-embedded.de/ssv/pc104/p169.htm>
+ and <http://www.ssv-embedded.de/ssv/pc104/p170.htm>
+
+config MTD_DILNETPC_BOOTSIZE
+ hex "Size of DIL/Net PC flash boot partition"
+ depends on MTD_DILNETPC
+ default "0x80000"
+ help
+ The amount of space taken up by the kernel or Etherboot
+ on the DIL/Net PC flash chips.
+
+config MTD_L440GX
+ tristate "BIOS flash chip on Intel L440GX boards"
+ depends on X86 && MTD_JEDECPROBE
+ help
+ Support for treating the BIOS flash chip on Intel L440GX motherboards
+ as an MTD device - with this you can reprogram your BIOS.
+
+ BE VERY CAREFUL.
+
+config MTD_SBC8240
+ tristate "Flash device on SBC8240"
+ depends on PPC32 && MTD_JEDECPROBE && 6xx && 8260
+ help
+ Flash access on the SBC8240 board from Wind River. See
+ <http://www.windriver.com/products/sbc8240/>
+
+config MTD_TQM8XXL
+ tristate "CFI Flash device mapped on TQM8XXL"
+ depends on MTD_CFI && PPC32 && 8xx && TQM8xxL
+ help
+ The TQM8xxL PowerPC board has up to two banks of CFI-compliant
+ chips, currently uses AMD one. This 'mapping' driver supports
+ that arrangement, allowing the CFI probe and command set driver
+ code to communicate with the chips on the TQM8xxL board. More at
+ <http://www.denx.de/embedded-ppc-en.html>.
+
+config MTD_RPXLITE
+ tristate "CFI Flash device mapped on RPX Lite or CLLF"
+ depends on MTD_CFI && PPC32 && 8xx && (RPXCLASSIC || RPXLITE)
+ help
+ The RPXLite PowerPC board has CFI-compliant chips mapped in
+ a strange sparse mapping. This 'mapping' driver supports that
+ arrangement, allowing the CFI probe and command set driver code
+ to communicate with the chips on the RPXLite board. More at
+ <http://www.embeddedplanet.com/>.
+
+config MTD_MBX860
+ tristate "System flash on MBX860 board"
+ depends on MTD_CFI && PPC32 && 8xx && MBX
+ help
+ This enables access routines for the flash chips on the Motorola
+ MBX860 board. If you have one of these boards and would like
+ to use the flash chips on it, say 'Y'.
+
+config MTD_DBOX2
+ tristate "CFI Flash device mapped on D-Box2"
+ depends on PPC32 && 8xx && DBOX2 && MTD_CFI_INTELSTD && MTD_CFI_INTELEXT && MTD_CFI_AMDSTD
+ help
+ This enables access routines for the flash chips on the Nokia/Sagem
+ D-Box 2 board. If you have one of these boards and would like to use
+ the flash chips on it, say 'Y'.
+
+config MTD_CFI_FLAGADM
+ tristate "CFI Flash device mapping on FlagaDM"
+ depends on PPC32 && 8xx && MTD_CFI
+ help
+ Mapping for the Flaga digital module. If you don't have one, ignore
+ this setting.
+
+config MTD_BEECH
+ tristate "CFI Flash device mapped on IBM 405LP Beech"
+ depends on MTD_CFI && PPC32 && 40x && BEECH
+ help
+ This enables access routines for the flash chips on the IBM
+ 405LP Beech board. If you have one of these boards and would like
+ to use the flash chips on it, say 'Y'.
+
+config MTD_ARCTIC
+ tristate "CFI Flash device mapped on IBM 405LP Arctic"
+ depends on MTD_CFI && PPC32 && 40x && ARCTIC2
+ help
+ This enables access routines for the flash chips on the IBM 405LP
+ Arctic board. If you have one of these boards and would like to
+ use the flash chips on it, say 'Y'.
+
+config MTD_WALNUT
+ tristate "Flash device mapped on IBM 405GP Walnut"
+ depends on MTD_JEDECPROBE && PPC32 && 40x && WALNUT
+ help
+ This enables access routines for the flash chips on the IBM 405GP
+ Walnut board. If you have one of these boards and would like to
+ use the flash chips on it, say 'Y'.
+
+config MTD_EBONY
+ tristate "Flash devices mapped on IBM 440GP Ebony"
+ depends on MTD_JEDECPROBE && PPC32 && 44x && EBONY
+ help
+ This enables access routines for the flash chips on the IBM 440GP
+ Ebony board. If you have one of these boards and would like to
+ use the flash chips on it, say 'Y'.
+
+config MTD_OCOTEA
+ tristate "Flash devices mapped on IBM 440GX Ocotea"
+ depends on MTD_CFI && PPC32 && 44x && OCOTEA
+ help
+ This enables access routines for the flash chips on the IBM 440GX
+ Ocotea board. If you have one of these boards and would like to
+ use the flash chips on it, say 'Y'.
+
+config MTD_REDWOOD
+ tristate "CFI Flash devices mapped on IBM Redwood"
+ depends on MTD_CFI && PPC32 && 4xx && 40x && ( REDWOOD_4 || REDWOOD_5 || REDWOOD_6 )
+ help
+ This enables access routines for the flash chips on the IBM
+ Redwood board. If you have one of these boards and would like to
+ use the flash chips on it, say 'Y'.
+
+config MTD_CSTM_MIPS_IXX
+ tristate "Flash chip mapping on ITE QED-4N-S01B, Globespan IVR or custom board"
+ depends on MIPS && MTD_CFI && MTD_JEDECPROBE && MTD_PARTITIONS
+ help
+ This provides a mapping driver for the Integrated Technology
+ Express, Inc (ITE) QED-4N-S01B eval board and the Globespan IVR
+ Reference Board. It provides the necessary addressing, length,
+ buswidth, vpp code and addition setup of the flash device for
+ these boards. In addition, this mapping driver can be used for
+ other boards via setting of the CONFIG_MTD_CSTM_MIPS_IXX_START/
+ LEN/BUSWIDTH parameters. This mapping will provide one mtd device
+ using one partition. The start address can be offset from the
+ beginning of flash and the len can be less than the total flash
+ device size to allow a window into the flash. Both CFI and JEDEC
+ probes are called.
+
+config MTD_CSTM_MIPS_IXX_START
+ hex "Physical start address of flash mapping"
+ depends on MTD_CSTM_MIPS_IXX
+ default "0x8000000"
+ help
+ This is the physical memory location that the MTD driver will
+ use for the flash chips on your particular target board.
+ Refer to the memory map which should hopefully be in the
+ documentation for your board.
+
+config MTD_CSTM_MIPS_IXX_LEN
+ hex "Physical length of flash mapping"
+ depends on MTD_CSTM_MIPS_IXX
+ default "0x4000000"
+ help
+ This is the total length that the MTD driver will use for the
+ flash chips on your particular board. Refer to the memory
+ map which should hopefully be in the documentation for your
+ board.
+
+config MTD_CSTM_MIPS_IXX_BUSWIDTH
+ int "Bus width in octets"
+ depends on MTD_CSTM_MIPS_IXX
+ default "2"
+ help
+ This is the total bus width of the mapping of the flash chips
+ on your particular board.
+
+config MTD_OCELOT
+ tristate "Momenco Ocelot boot flash device"
+ depends on MIPS && MOMENCO_OCELOT
+ help
+ This enables access routines for the boot flash device and for the
+ NVRAM on the Momenco Ocelot board. If you have one of these boards
+ and would like access to either of these, say 'Y'.
+
+config MTD_SOLUTIONENGINE
+ tristate "CFI Flash device mapped on Hitachi SolutionEngine"
+ depends on SUPERH && MTD_CFI && MTD_REDBOOT_PARTS
+ help
+ This enables access to the flash chips on the Hitachi SolutionEngine and
+ similar boards. Say 'Y' if you are building a kernel for such a board.
+
+config MTD_ARM_INTEGRATOR
+ tristate "CFI Flash device mapped on ARM Integrator/P720T"
+ depends on ARM && MTD_CFI
+
+config MTD_CDB89712
+ tristate "Cirrus CDB89712 evaluation board mappings"
+ depends on ARM && MTD_CFI && ARCH_CDB89712
+ help
+ This enables access to the flash or ROM chips on the CDB89712 board.
+ If you have such a board, say 'Y'.
+
+config MTD_SA1100
+ tristate "CFI Flash device mapped on StrongARM SA11x0"
+ depends on ARM && MTD_CFI && ARCH_SA1100 && MTD_PARTITIONS
+ help
+ This enables access to the flash chips on most platforms based on
+ the SA1100 and SA1110, including the Assabet and the Compaq iPAQ.
+ If you have such a board, say 'Y'.
+
+config MTD_IPAQ
+ tristate "CFI Flash device mapped on Compaq/HP iPAQ"
+ depends on ARM && IPAQ_HANDHELD && MTD_CFI
+ help
+ This provides a driver for the on-board flash of the iPAQ.
+
+config MTD_DC21285
+ tristate "CFI Flash device mapped on DC21285 Footbridge"
+ depends on ARM && MTD_CFI && ARCH_FOOTBRIDGE && MTD_COMPLEX_MAPPINGS
+ help
+ This provides a driver for the flash accessed using Intel's
+ 21285 bridge used with Intel's StrongARM processors. More info at
+ <http://www.intel.com/design/bridge/docs/21285_documentation.htm>.
+
+config MTD_IQ80310
+ tristate "CFI Flash device mapped on the XScale IQ80310 board"
+ depends on ARM && MTD_CFI && ARCH_IQ80310
+ help
+ This enables access routines for the flash chips on the Intel XScale
+ IQ80310 evaluation board. If you have one of these boards and would
+ like to use the flash chips on it, say 'Y'.
+
+config MTD_IXP4XX
+ tristate "CFI Flash device mapped on Intel IXP4xx based systems"
+ depends on ARM && MTD_CFI && MTD_COMPLEX_MAPPINGS && ARCH_IXP4XX
+ help
+ This enables MTD access to flash devices on platforms based
+ on Intel's IXP4xx family of network processors such as the
+ IXDP425 and Coyote. If you have an IXP4xx based board and
+ would like to use the flash chips on it, say 'Y'.
+
+config MTD_IXP2000
+ tristate "CFI Flash device mapped on Intel IXP2000 based systems"
+ depends on ARM && MTD_CFI && MTD_COMPLEX_MAPPINGS && ARCH_IXP2000
+ help
+ This enables MTD access to flash devices on platforms based
+ on Intel's IXP2000 family of network processors such as the
+ IXDP425 and Coyote. If you have an IXP2000 based board and
+ would like to use the flash chips on it, say 'Y'.
+
+config MTD_EPXA10DB
+ tristate "CFI Flash device mapped on Epxa10db"
+ depends on ARM && MTD_CFI && MTD_PARTITIONS && ARCH_CAMELOT
+ help
+ This enables support for the flash devices on the Altera
+ Excalibur XA10 Development Board. If you are building a kernel
+ for on of these boards then you should say 'Y' otherwise say 'N'.
+
+config MTD_FORTUNET
+ tristate "CFI Flash device mapped on the FortuNet board"
+ depends on ARM && MTD_CFI && MTD_PARTITIONS && SA1100_FORTUNET
+ help
+ This enables access to the Flash on the FortuNet board. If you
+ have such a board, say 'Y'.
+
+config MTD_AUTCPU12
+ tristate "NV-RAM mapping AUTCPU12 board"
+ depends on ARM && ARCH_AUTCPU12
+ help
+ This enables access to the NV-RAM on autronix autcpu12 board.
+ If you have such a board, say 'Y'.
+
+config MTD_EDB7312
+ tristate "CFI Flash device mapped on EDB7312"
+ depends on ARM && MTD_CFI
+ help
+ This enables access to the CFI Flash on the Cogent EDB7312 board.
+ If you have such a board, say 'Y' here.
+
+config MTD_IMPA7
+ tristate "JEDEC Flash device mapped on impA7"
+ depends on ARM && MTD_JEDECPROBE
+ help
+ This enables access to the NOR Flash on the impA7 board of
+ implementa GmbH. If you have such a board, say 'Y' here.
+
+config MTD_CEIVA
+ tristate "JEDEC Flash device mapped on Ceiva/Polaroid PhotoMax Digital Picture Frame"
+ depends on ARM && MTD_JEDECPROBE && ARCH_CEIVA
+ help
+ This enables access to the flash chips on the Ceiva/Polaroid
+ PhotoMax Digital Picture Frame.
+ If you have such a device, say 'Y'.
+
+config MTD_NOR_TOTO
+ tristate "NOR Flash device on TOTO board"
+ depends on ARM && ARCH_OMAP && OMAP_TOTO
+ help
+ This enables access to the NOR flash on the Texas Instruments
+ TOTO board.
+
+config MTD_H720X
+ tristate "Hynix evaluation board mappings"
+ depends on ARM && MTD_CFI && ( ARCH_H7201 || ARCH_H7202 )
+ help
+ This enables access to the flash chips on the Hynix evaluation boards.
+ If you have such a board, say 'Y'.
+
+config MTD_MPC1211
+ tristate "CFI Flash device mapped on Interface MPC-1211"
+ depends on SUPERH && SH_MPC1211 && MTD_CFI
+ help
+ This enables access to the flash chips on the Interface MPC-1211(CTP/PCI/MPC-SH02).
+ If you have such a board, say 'Y'.
+
+config MTD_OMAP_NOR
+ tristate "TI OMAP board mappings"
+ depends on MTD_CFI && ARCH_OMAP
+ help
+ This enables access to the NOR flash chips on TI OMAP-based
+ boards defining flash platform devices and flash platform data.
+ These boards include the Innovator, H2, H3, OSK, Perseus2, and
+ more. If you have such a board, say 'Y'.
+
+# This needs CFI or JEDEC, depending on the cards found.
+config MTD_PCI
+ tristate "PCI MTD driver"
+ depends on MTD && PCI && MTD_COMPLEX_MAPPINGS
+ help
+ Mapping for accessing flash devices on add-in cards like the Intel XScale
+ IQ80310 card, and the Intel EBSA285 card in blank ROM programming mode
+ (please see the manual for the link settings).
+
+ If you are not sure, say N.
+
+config MTD_PCMCIA
+ tristate "PCMCIA MTD driver"
+ depends on MTD && PCMCIA && MTD_COMPLEX_MAPPINGS && BROKEN
+ help
+ Map driver for accessing PCMCIA linear flash memory cards. These
+ cards are usually around 4-16MiB in size. This does not include
+ Compact Flash cards which are treated as IDE devices.
+
+config MTD_PCMCIA_ANONYMOUS
+ bool "Use PCMCIA MTD drivers for anonymous PCMCIA cards"
+ depends on MTD_PCMCIA
+ default N
+ help
+ If this option is enabled, PCMCIA cards which do not report
+ anything about themselves are assumed to be MTD cards.
+
+ If unsure, say N.
+
+config MTD_UCLINUX
+ tristate "Generic uClinux RAM/ROM filesystem support"
+ depends on MTD_PARTITIONS && !MMU
+ help
+ Map driver to support image based filesystems for uClinux.
+
+config MTD_WRSBC8260
+ tristate "Map driver for WindRiver PowerQUICC II MPC82xx board"
+ depends on (SBC82xx || SBC8560)
+ select MTD_PARTITIONS
+ select MTD_MAP_BANK_WIDTH_4
+ select MTD_MAP_BANK_WIDTH_1
+ select MTD_CFI_I1
+ select MTD_CFI_I4
+ help
+ Map driver for WindRiver PowerQUICC II MPC82xx board. Drives
+ all three flash regions on CS0, CS1 and CS6 if they are configured
+ correctly by the boot loader.
+
+config MTD_DMV182
+ tristate "Map driver for Dy-4 SVME/DMV-182 board."
+ depends on DMV182
+ select MTD_PARTITIONS
+ select MTD_MAP_BANK_WIDTH_32
+ select MTD_CFI_I8
+ select MTD_CFI_AMDSTD
+ help
+ Map driver for Dy-4 SVME/DMV-182 board.
+
+config MTD_BAST
+ tristate "Map driver for Simtec BAST (EB2410ITX) or Thorcom VR1000"
+ depends on ARCH_BAST || MACH_VR1000
+ select MTD_PARTITIONS
+ select MTD_MAP_BANK_WIDTH_16
+ select MTD_JEDECPROBE
+ help
+ Map driver for NOR flash on the Simtec BAST (EB2410ITX), or the
+ Thorcom VR1000
+
+ Note, this driver *cannot* over-ride the WP link on the
+ board, or currently detect the state of the link.
+
+config MTD_BAST_MAXSIZE
+ int "Maximum size for BAST flash area (MiB)"
+ depends on MTD_BAST
+ default "4"
+
+config MTD_SHARP_SL
+ bool "ROM maped on Sharp SL Series"
+ depends on MTD && ARCH_PXA
+ help
+ This enables access to the flash chip on the Sharp SL Series of PDAs.
+
+config MTD_PLATRAM
+ tristate "Map driver for platform device RAM (mtd-ram)"
+ depends on MTD
+ select MTD_RAM
+ help
+ Map driver for RAM areas described via the platform device
+ system.
+
+ This selection automatically selects the map_ram driver.
+
+endmenu
+
diff -uprN linux-2.6.12/drivers/mtd/maps/Makefile linux-2.6.12-440ep/drivers/mtd/maps/Makefile
--- linux-2.6.12/drivers/mtd/maps/Makefile 2005-07-25 12:57:05.000000000 -0700
+++ linux-2.6.12-440ep/drivers/mtd/maps/Makefile 2005-07-25 11:32:32.000000000 -0700
@@ -56,6 +56,7 @@ obj-$(CONFIG_MTD_NETtel) += nettel.o
obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
obj-$(CONFIG_MTD_EBONY) += ebony.o
obj-$(CONFIG_MTD_OCOTEA) += ocotea.o
+obj-$(CONFIG_MTD_BAMBOO) += bamboo.o
obj-$(CONFIG_MTD_BEECH) += beech-mtd.o
obj-$(CONFIG_MTD_ARCTIC) += arctic-mtd.o
obj-$(CONFIG_MTD_WALNUT) += walnut.o
diff -uprN linux-2.6.12/drivers/mtd/maps/Makefile.orig linux-2.6.12-440ep/drivers/mtd/maps/Makefile.orig
--- linux-2.6.12/drivers/mtd/maps/Makefile.orig 1969-12-31 17:00:00.000000000 -0700
+++ linux-2.6.12-440ep/drivers/mtd/maps/Makefile.orig 2005-07-25 11:31:51.000000000 -0700
@@ -0,0 +1,72 @@
+#
+# linux/drivers/maps/Makefile
+#
+# $Id: Makefile.common,v 1.30 2005/07/02 01:53:24 tpoynor Exp $
+
+ifeq ($(CONFIG_MTD_COMPLEX_MAPPINGS),y)
+obj-$(CONFIG_MTD) += map_funcs.o
+endif
+
+# Chip mappings
+obj-$(CONFIG_MTD_CDB89712) += cdb89712.o
+obj-$(CONFIG_MTD_ARM_INTEGRATOR)+= integrator-flash.o
+obj-$(CONFIG_MTD_BAST) += bast-flash.o
+obj-$(CONFIG_MTD_CFI_FLAGADM) += cfi_flagadm.o
+obj-$(CONFIG_MTD_CSTM_MIPS_IXX) += cstm_mips_ixx.o
+obj-$(CONFIG_MTD_DC21285) += dc21285.o
+obj-$(CONFIG_MTD_DILNETPC) += dilnetpc.o
+obj-$(CONFIG_MTD_EPXA10DB) += epxa10db-flash.o
+obj-$(CONFIG_MTD_IQ80310) += iq80310.o
+obj-$(CONFIG_MTD_L440GX) += l440gx.o
+obj-$(CONFIG_MTD_AMD76XROM) += amd76xrom.o
+obj-$(CONFIG_MTD_ICHXROM) += ichxrom.o
+obj-$(CONFIG_MTD_TSUNAMI) += tsunami_flash.o
+obj-$(CONFIG_MTD_LUBBOCK) += lubbock-flash.o
+obj-$(CONFIG_MTD_MAINSTONE) += mainstone-flash.o
+obj-$(CONFIG_MTD_MBX860) += mbx860.o
+obj-$(CONFIG_MTD_CEIVA) += ceiva.o
+obj-$(CONFIG_MTD_OCTAGON) += octagon-5066.o
+obj-$(CONFIG_MTD_PHYSMAP) += physmap.o
+obj-$(CONFIG_MTD_PNC2000) += pnc2000.o
+obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o
+obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o
+obj-$(CONFIG_MTD_TQM8XXL) += tqm8xxl.o
+obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o
+obj-$(CONFIG_MTD_IPAQ) += ipaq-flash.o
+obj-$(CONFIG_MTD_SBC_GXX) += sbc_gxx.o
+obj-$(CONFIG_MTD_SC520CDP) += sc520cdp.o
+obj-$(CONFIG_MTD_NETSC520) += netsc520.o
+obj-$(CONFIG_MTD_TS5500) += ts5500_flash.o
+obj-$(CONFIG_MTD_SUN_UFLASH) += sun_uflash.o
+obj-$(CONFIG_MTD_VMAX) += vmax301.o
+obj-$(CONFIG_MTD_SCx200_DOCFLASH)+= scx200_docflash.o
+obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.o
+obj-$(CONFIG_MTD_OCELOT) += ocelot.o
+obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
+obj-$(CONFIG_MTD_PCI) += pci.o
+obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o
+obj-$(CONFIG_MTD_LASAT) += lasat.o
+obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
+obj-$(CONFIG_MTD_EDB7312) += edb7312.o
+obj-$(CONFIG_MTD_IMPA7) += impa7.o
+obj-$(CONFIG_MTD_FORTUNET) += fortunet.o
+obj-$(CONFIG_MTD_REDWOOD) += redwood.o
+obj-$(CONFIG_MTD_UCLINUX) += uclinux.o
+obj-$(CONFIG_MTD_NETtel) += nettel.o
+obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
+obj-$(CONFIG_MTD_EBONY) += ebony.o
+obj-$(CONFIG_MTD_OCOTEA) += ocotea.o
+obj-$(CONFIG_MTD_BEECH) += beech-mtd.o
+obj-$(CONFIG_MTD_ARCTIC) += arctic-mtd.o
+obj-$(CONFIG_MTD_WALNUT) += walnut.o
+obj-$(CONFIG_MTD_H720X) += h720x-flash.o
+obj-$(CONFIG_MTD_SBC8240) += sbc8240.o
+obj-$(CONFIG_MTD_NOR_TOTO) += omap-toto-flash.o
+obj-$(CONFIG_MTD_MPC1211) += mpc1211.o
+obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o
+obj-$(CONFIG_MTD_IXP2000) += ixp2000.o
+obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o
+obj-$(CONFIG_MTD_DMV182) += dmv182.o
+obj-$(CONFIG_MTD_SHARP_SL) += sharpsl-flash.o
+obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
+obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
diff -uprN linux-2.6.12/drivers/mtd/maps/bamboo.c linux-2.6.12-440ep/drivers/mtd/maps/bamboo.c
--- linux-2.6.12/drivers/mtd/maps/bamboo.c 1969-12-31 17:00:00.000000000 -0700
+++ linux-2.6.12-440ep/drivers/mtd/maps/bamboo.c 2005-07-25 11:32:32.000000000 -0700
@@ -0,0 +1,245 @@
+/*
+ * Mapping for Bamboo user flash
+ *
+ * Wade Farnsworth <wfarnsworth@mvista.com>
+ *
+ * Copyright 2005 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/partitions.h>
+#include <linux/config.h>
+#include <asm/io.h>
+#include <asm/ibm44x.h>
+#include <platforms/4xx/bamboo.h>
+
+static struct mtd_info *small_flash, *large_flash, *sram;
+
+static struct map_info bamboo_small_map = {
+ .name = "Bamboo small flash",
+ .size = BAMBOO_SMALL_FLASH_SIZE,
+ .bankwidth = 1,
+};
+
+static struct map_info bamboo_large_map = {
+ .name = "Bamboo large flash",
+ .size = BAMBOO_LARGE_FLASH_SIZE,
+ .bankwidth = 2,
+};
+
+static struct map_info bamboo_sram_map = {
+ .name = "Bamboo SRAM",
+ .size = BAMBOO_SRAM_SIZE,
+ .bankwidth = 2,
+};
+
+static struct mtd_partition bamboo_small_partitions[] = {
+ {
+ .name = "pibs",
+ .offset = 0x0,
+ .size = 0x100000,
+ .mask_flags = MTD_WRITEABLE,
+ }
+};
+
+static struct mtd_partition bamboo_large_partitions[] = {
+ {
+ .name = "filesystem",
+ .offset = 0x0,
+ .size = 0x400000,
+ }
+};
+
+static struct mtd_partition bamboo_sram_partitions[] = {
+ {
+ .name = "sram",
+ .offset = 0x0,
+ .size = 0x100000,
+ }
+};
+
+int __init
+init_bamboo(void)
+{
+ u8 setting_reg;
+ u8 *setting_adr;
+ unsigned long small_flash_base, large_flash_base, sram_base;
+ unsigned long *gpio_base;
+
+ setting_adr = ioremap64(BAMBOO_FPGA_SETTING_REG_ADDR, 8);
+ if (!setting_adr)
+ return -ENOMEM;
+ setting_reg = readb(setting_adr);
+ iounmap(setting_adr);
+
+ /*
+ * Some versions of PIBS don't set up the GPIO controller
+ * for the devices on chip select 4 (large flash and sram).
+ */
+ gpio_base = ioremap64(0x0EF600B00ULL, 0x80);
+ if (!gpio_base) {
+ printk("Failed to ioremap GPIO\n");
+ return -ENOMEM;
+ }
+ * (gpio_base + 0x02) |= 0x00001000;
+ * (gpio_base + 0x04) |= 0x00001000;
+ iounmap((void *) gpio_base);
+
+ /*
+ * Use the values in the FPGA Setting Register to determine where
+ * each flash bank is located.
+ */
+ if (!BAMBOO_BOOT_NAND_FLASH(setting_reg)) {
+ if (BAMBOO_BOOT_SMALL_FLASH(setting_reg)) {
+ small_flash_base = BAMBOO_SMALL_FLASH_HIGH;
+ } else {
+ small_flash_base = BAMBOO_SMALL_FLASH_LOW;
+ }
+
+ bamboo_small_map.phys = small_flash_base;
+ bamboo_small_map.virt =
+ (ulong *) ioremap64(small_flash_base,
+ bamboo_small_map.size);
+ if (!bamboo_small_map.virt) {
+ printk("Failed to ioremap flash\n");
+ return -EIO;
+ }
+
+ simple_map_init(&bamboo_small_map);
+
+ small_flash = do_map_probe("map_rom", &bamboo_small_map);
+ if (small_flash) {
+ small_flash->owner = THIS_MODULE;
+ add_mtd_partitions(small_flash, bamboo_small_partitions,
+ ARRAY_SIZE(bamboo_small_partitions));
+ } else {
+ printk(KERN_INFO
+ "small flash disabled: Probe failed due to probable hardware issue\n");
+ iounmap((void *) bamboo_small_map.virt);
+ bamboo_small_map.virt = 0;
+ }
+ } else
+ bamboo_small_map.virt = 0;
+
+ /*
+ * Wiring to the large flash on the Rev 0 Bamboo is incorrect, so
+ * this should fail.
+ *
+ * This has been fixed on the Rev 1.
+ */
+ if (BAMBOO_BOOT_NAND_FLASH(setting_reg) ||
+ BAMBOO_BOOT_SMALL_FLASH(setting_reg))
+ large_flash_base = BAMBOO_LARGE_FLASH_LOW;
+ else if (BAMBOO_LARGE_FLASH_EN(setting_reg))
+ large_flash_base = BAMBOO_LARGE_FLASH_HIGH1;
+ else
+ large_flash_base = BAMBOO_LARGE_FLASH_HIGH2;
+ bamboo_large_map.phys = large_flash_base;
+ bamboo_large_map.virt = (ulong *) ioremap64(large_flash_base,
+ bamboo_large_map.size);
+ if (!bamboo_large_map.virt) {
+ printk("Failed to ioremap flash\n");
+ return -EIO;
+ }
+
+ simple_map_init(&bamboo_large_map);
+ large_flash = do_map_probe("cfi_probe", &bamboo_large_map);
+ if (large_flash) {
+ large_flash->owner = THIS_MODULE;
+ add_mtd_partitions(large_flash, bamboo_large_partitions,
+ ARRAY_SIZE(bamboo_large_partitions));
+ } else {
+ printk(KERN_INFO
+ "large flash disabled: Probe failed due to probable hardware issue\n");
+ iounmap((void *) bamboo_large_map.virt);
+ bamboo_large_map.virt = 0;
+ }
+
+ if (BAMBOO_BOOT_NAND_FLASH(setting_reg) ||
+ BAMBOO_BOOT_SMALL_FLASH(setting_reg))
+ sram_base = BAMBOO_SRAM_LOW;
+ else if (BAMBOO_LARGE_FLASH_EN(setting_reg))
+ sram_base = BAMBOO_SRAM_HIGH2;
+ else
+ sram_base = BAMBOO_SRAM_HIGH1;
+
+ bamboo_sram_map.phys = sram_base;
+ bamboo_sram_map.virt = (ulong *) ioremap64(sram_base,
+ bamboo_sram_map.size);
+ if (!bamboo_sram_map.virt) {
+ printk("Failed to ioremap flash \n");
+ return -EIO;
+ }
+
+ simple_map_init(&bamboo_sram_map);
+
+ sram = do_map_probe("map_ram", &bamboo_sram_map);
+ if (sram) {
+ sram->owner = THIS_MODULE;
+ sram->erasesize = 0x10;
+ add_mtd_partitions(sram, bamboo_sram_partitions,
+ ARRAY_SIZE(bamboo_sram_partitions));
+ } else {
+ printk(KERN_INFO
+ "sram disabled: Probe failed due to probable hardware issue\n");
+ iounmap((void *) bamboo_sram_map.virt);
+ bamboo_sram_map.virt = 0;
+ }
+
+ if (!(small_flash || large_flash || sram))
+ return -ENXIO;
+
+ return 0;
+}
+
+static void __exit
+cleanup_bamboo(void)
+{
+ if (small_flash) {
+ del_mtd_partitions(small_flash);
+ map_destroy(small_flash);
+ }
+
+ if (large_flash) {
+ del_mtd_partitions(large_flash);
+ map_destroy(large_flash);
+ }
+
+ if (sram) {
+ del_mtd_partitions(sram);
+ map_destroy(sram);
+ }
+
+ if (bamboo_small_map.virt) {
+ iounmap((void *) bamboo_small_map.virt);
+ bamboo_small_map.virt = 0;
+ }
+
+ if (bamboo_large_map.virt) {
+ iounmap((void *) bamboo_large_map.virt);
+ bamboo_large_map.virt = 0;
+ }
+
+ if (bamboo_sram_map.virt) {
+ iounmap((void *) bamboo_sram_map.virt);
+ bamboo_sram_map.virt = 0;
+ }
+}
+
+module_init(init_bamboo);
+module_exit(cleanup_bamboo);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Wade Farnsworth <wfarnsworth@mvista.com>");
+MODULE_DESCRIPTION("MTD map and partitions for IBM 440EP Bamboo boards");
diff -uprN linux-2.6.12/drivers/mtd/nand/Kconfig linux-2.6.12-440ep/drivers/mtd/nand/Kconfig
--- linux-2.6.12/drivers/mtd/nand/Kconfig 2005-07-25 12:57:05.000000000 -0700
+++ linux-2.6.12-440ep/drivers/mtd/nand/Kconfig 2005-07-25 11:32:32.000000000 -0700
@@ -109,6 +109,13 @@ config MTD_NAND_S3C2410_HWECC
currently not be able to switch to software, as there is no
implementation for ECC method used by the S3C2410
+config MTD_NAND_BAMBOO
+ tristate "NAND flash support on IBM/AMCC 440EP Eval Board (Bamboo)"
+ depends on BAMBOO && MTD_NAND
+ help
+ This enables the NAND flash driver on the IBM/AMCC 440EP Eval Board
+ (Bamboo).
+
config MTD_NAND_DISKONCHIP
tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation) (EXPERIMENTAL)"
depends on MTD_NAND && EXPERIMENTAL
diff -uprN linux-2.6.12/drivers/mtd/nand/Kconfig.orig linux-2.6.12-440ep/drivers/mtd/nand/Kconfig.orig
--- linux-2.6.12/drivers/mtd/nand/Kconfig.orig 1969-12-31 17:00:00.000000000 -0700
+++ linux-2.6.12-440ep/drivers/mtd/nand/Kconfig.orig 2005-07-25 11:31:51.000000000 -0700
@@ -0,0 +1,194 @@
+# drivers/mtd/nand/Kconfig
+# $Id: Kconfig,v 1.31 2005/06/20 12:03:21 bjd Exp $
+
+menu "NAND Flash Device Drivers"
+ depends on MTD!=n
+
+config MTD_NAND
+ tristate "NAND Device Support"
+ depends on MTD
+ select MTD_NAND_IDS
+ help
+ This enables support for accessing all type of NAND flash
+ devices. For further information see
+ <http://www.linux-mtd.infradead.org/tech/nand.html>.
+
+config MTD_NAND_VERIFY_WRITE
+ bool "Verify NAND page writes"
+ depends on MTD_NAND
+ help
+ This adds an extra check when data is written to the flash. The
+ NAND flash device internally checks only bits transitioning
+ from 1 to 0. There is a rare possibility that even though the
+ device thinks the write was successful, a bit could have been
+ flipped accidentaly due to device wear or something else.
+
+config MTD_NAND_AUTCPU12
+ tristate "SmartMediaCard on autronix autcpu12 board"
+ depends on ARM && MTD_NAND && ARCH_AUTCPU12
+ help
+ This enables the driver for the autronix autcpu12 board to
+ access the SmartMediaCard.
+
+config MTD_NAND_EDB7312
+ tristate "Support for Cirrus Logic EBD7312 evaluation board"
+ depends on ARM && MTD_NAND && ARCH_EDB7312
+ help
+ This enables the driver for the Cirrus Logic EBD7312 evaluation
+ board to access the onboard NAND Flash.
+
+config MTD_NAND_H1900
+ tristate "iPAQ H1900 flash"
+ depends on ARM && MTD_NAND && ARCH_PXA && MTD_PARTITIONS
+ help
+ This enables the driver for the iPAQ h1900 flash.
+
+config MTD_NAND_SPIA
+ tristate "NAND Flash device on SPIA board"
+ depends on ARM && ARCH_P720T && MTD_NAND
+ help
+ If you had to ask, you don't have one. Say 'N'.
+
+config MTD_NAND_TOTO
+ tristate "NAND Flash device on TOTO board"
+ depends on ARM && ARCH_OMAP && MTD_NAND
+ help
+ Support for NAND flash on Texas Instruments Toto platform.
+
+config MTD_NAND_IDS
+ tristate
+
+config MTD_NAND_AU1550
+ tristate "Au1550 NAND support"
+ depends on SOC_AU1550 && MTD_NAND
+ help
+ This enables the driver for the NAND flash controller on the
+ AMD/Alchemy 1550 SOC.
+
+config MTD_NAND_RTC_FROM4
+ tristate "Renesas Flash ROM 4-slot interface board (FROM_BOARD4)"
+ depends on MTD_NAND && SH_SOLUTION_ENGINE
+ select REED_SOLOMON
+ select REED_SOLOMON_DEC8
+ help
+ This enables the driver for the Renesas Technology AG-AND
+ flash interface board (FROM_BOARD4)
+
+config MTD_NAND_PPCHAMELEONEVB
+ tristate "NAND Flash device on PPChameleonEVB board"
+ depends on PPCHAMELEONEVB && MTD_NAND
+ help
+ This enables the NAND flash driver on the PPChameleon EVB Board.
+
+config MTD_NAND_S3C2410
+ tristate "NAND Flash support for S3C2410/S3C2440 SoC"
+ depends on ARCH_S3C2410 && MTD_NAND
+ help
+ This enables the NAND flash controller on the S3C2410 and S3C2440
+ SoCs
+
+ No board specfic support is done by this driver, each board
+ must advertise a platform_device for the driver to attach.
+
+config MTD_NAND_S3C2410_DEBUG
+ bool "S3C2410 NAND driver debug"
+ depends on MTD_NAND_S3C2410
+ help
+ Enable debugging of the S3C2410 NAND driver
+
+config MTD_NAND_S3C2410_HWECC
+ bool "S3C2410 NAND Hardware ECC"
+ depends on MTD_NAND_S3C2410
+ help
+ Enable the use of the S3C2410's internal ECC generator when
+ using NAND. Early versions of the chip have had problems with
+ incorrect ECC generation, and if using these, the default of
+ software ECC is preferable.
+
+ If you lay down a device with the hardware ECC, then you will
+ currently not be able to switch to software, as there is no
+ implementation for ECC method used by the S3C2410
+
+config MTD_NAND_DISKONCHIP
+ tristate "DiskOnChip 2000, Millennium and Millennium Plus (NAND reimplementation) (EXPERIMENTAL)"
+ depends on MTD_NAND && EXPERIMENTAL
+ select REED_SOLOMON
+ select REED_SOLOMON_DEC16
+ help
+ This is a reimplementation of M-Systems DiskOnChip 2000,
+ Millennium and Millennium Plus as a standard NAND device driver,
+ as opposed to the earlier self-contained MTD device drivers.
+ This should enable, among other things, proper JFFS2 operation on
+ these devices.
+
+config MTD_NAND_DISKONCHIP_PROBE_ADVANCED
+ bool "Advanced detection options for DiskOnChip"
+ depends on MTD_NAND_DISKONCHIP
+ help
+ This option allows you to specify nonstandard address at which to
+ probe for a DiskOnChip, or to change the detection options. You
+ are unlikely to need any of this unless you are using LinuxBIOS.
+ Say 'N'.
+
+config MTD_NAND_DISKONCHIP_PROBE_ADDRESS
+ hex "Physical address of DiskOnChip" if MTD_NAND_DISKONCHIP_PROBE_ADVANCED
+ depends on MTD_NAND_DISKONCHIP
+ default "0"
+ ---help---
+ By default, the probe for DiskOnChip devices will look for a
+ DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
+ This option allows you to specify a single address at which to probe
+ for the device, which is useful if you have other devices in that
+ range which get upset when they are probed.
+
+ (Note that on PowerPC, the normal probe will only check at
+ 0xE4000000.)
+
+ Normally, you should leave this set to zero, to allow the probe at
+ the normal addresses.
+
+config MTD_NAND_DISKONCHIP_PROBE_HIGH
+ bool "Probe high addresses"
+ depends on MTD_NAND_DISKONCHIP_PROBE_ADVANCED
+ help
+ By default, the probe for DiskOnChip devices will look for a
+ DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
+ This option changes to make it probe between 0xFFFC8000 and
+ 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be
+ useful to you. Say 'N'.
+
+config MTD_NAND_DISKONCHIP_BBTWRITE
+ bool "Allow BBT writes on DiskOnChip Millennium and 2000TSOP"
+ depends on MTD_NAND_DISKONCHIP
+ help
+ On DiskOnChip devices shipped with the INFTL filesystem (Millennium
+ and 2000 TSOP/Alon), Linux reserves some space at the end of the
+ device for the Bad Block Table (BBT). If you have existing INFTL
+ data on your device (created by non-Linux tools such as M-Systems'
+ DOS drivers), your data might overlap the area Linux wants to use for
+ the BBT. If this is a concern for you, leave this option disabled and
+ Linux will not write BBT data into this area.
+ The downside of leaving this option disabled is that if bad blocks
+ are detected by Linux, they will not be recorded in the BBT, which
+ could cause future problems.
+ Once you enable this option, new filesystems (INFTL or others, created
+ in Linux or other operating systems) will not use the reserved area.
+ The only reason not to enable this option is to prevent damage to
+ preexisting filesystems.
+ Even if you leave this disabled, you can enable BBT writes at module
+ load time (assuming you build diskonchip as a module) with the module
+ parameter "inftl_bbt_write=1".
+
+ config MTD_NAND_SHARPSL
+ bool "Support for NAND Flash on Sharp SL Series (C7xx + others)"
+ depends on MTD_NAND && ARCH_PXA
+
+ config MTD_NAND_NANDSIM
+ bool "Support for NAND Flash Simulator"
+ depends on MTD_NAND && MTD_PARTITIONS
+
+ help
+ The simulator may simulate verious NAND flash chips for the
+ MTD nand layer.
+
+endmenu
diff -uprN linux-2.6.12/drivers/mtd/nand/Makefile linux-2.6.12-440ep/drivers/mtd/nand/Makefile
--- linux-2.6.12/drivers/mtd/nand/Makefile 2005-07-25 12:57:05.000000000 -0700
+++ linux-2.6.12-440ep/drivers/mtd/nand/Makefile 2005-07-25 11:32:32.000000000 -0700
@@ -13,6 +13,7 @@ obj-$(CONFIG_MTD_NAND_EDB7312) += edb73
obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
obj-$(CONFIG_MTD_NAND_PPCHAMELEONEVB) += ppchameleonevb.o
obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o
+obj-$(CONFIG_MTD_NAND_BAMBOO) += bamboo_nand.o
obj-$(CONFIG_MTD_NAND_DISKONCHIP) += diskonchip.o
obj-$(CONFIG_MTD_NAND_H1900) += h1910.o
obj-$(CONFIG_MTD_NAND_RTC_FROM4) += rtc_from4.o
diff -uprN linux-2.6.12/drivers/mtd/nand/Makefile.orig linux-2.6.12-440ep/drivers/mtd/nand/Makefile.orig
--- linux-2.6.12/drivers/mtd/nand/Makefile.orig 1969-12-31 17:00:00.000000000 -0700
+++ linux-2.6.12-440ep/drivers/mtd/nand/Makefile.orig 2005-07-25 11:31:51.000000000 -0700
@@ -0,0 +1,22 @@
+#
+# linux/drivers/nand/Makefile
+#
+# $Id: Makefile.common,v 1.15 2004/11/26 12:28:22 dedekind Exp $
+
+obj-$(CONFIG_MTD_NAND) += nand.o nand_ecc.o
+obj-$(CONFIG_MTD_NAND_IDS) += nand_ids.o
+
+obj-$(CONFIG_MTD_NAND_SPIA) += spia.o
+obj-$(CONFIG_MTD_NAND_TOTO) += toto.o
+obj-$(CONFIG_MTD_NAND_AUTCPU12) += autcpu12.o
+obj-$(CONFIG_MTD_NAND_EDB7312) += edb7312.o
+obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
+obj-$(CONFIG_MTD_NAND_PPCHAMELEONEVB) += ppchameleonevb.o
+obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o
+obj-$(CONFIG_MTD_NAND_DISKONCHIP) += diskonchip.o
+obj-$(CONFIG_MTD_NAND_H1900) += h1910.o
+obj-$(CONFIG_MTD_NAND_RTC_FROM4) += rtc_from4.o
+obj-$(CONFIG_MTD_NAND_SHARPSL) += sharpsl.o
+obj-$(CONFIG_MTD_NAND_NANDSIM) += nandsim.o
+
+nand-objs = nand_base.o nand_bbt.o
diff -uprN linux-2.6.12/drivers/mtd/nand/bamboo_nand.c linux-2.6.12-440ep/drivers/mtd/nand/bamboo_nand.c
--- linux-2.6.12/drivers/mtd/nand/bamboo_nand.c 1969-12-31 17:00:00.000000000 -0700
+++ linux-2.6.12-440ep/drivers/mtd/nand/bamboo_nand.c 2005-07-25 11:32:32.000000000 -0700
@@ -0,0 +1,467 @@
+/*
+ * drivers/mtd/bamboo_nand.c
+ *
+ * Overview:
+ * This is a device driver for the NAND flash devices found on the
+ * IBM 440EP Evaluation Board (Bamboo).
+ *
+ * Author: Wade Farnsworth <wfarnsworth@mvista.com>
+ *
+ * Copyright 2005 MontaVista Software Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_ecc.h>
+#include <linux/mtd/partitions.h>
+#include <linux/config.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <asm/io.h>
+#include <asm/ibm44x.h>
+#include <platforms/4xx/bamboo.h>
+
+struct ppc440ep_ndfc_regs {
+ uint cmd;
+ uint addr;
+ uint data;
+ uint reserved1;
+ uint ecc0;
+ uint ecc1;
+ uint ecc2;
+ uint ecc3;
+ uint ecc4;
+ uint ecc5;
+ uint ecc6;
+ uint ecc7;
+ uint b0cr;
+ uint b1cr;
+ uint b2cr;
+ uint b3cr;
+ uint cr;
+ uint sr;
+ uint hwctl;
+ uint reserved2;
+ uint revid;
+};
+
+static struct mtd_info *bamboo_nand0_mtd;
+static struct mtd_info *bamboo_nand1_mtd;
+static u8 hwctl;
+static struct ppc440ep_ndfc_regs *bamboo_ndfc;
+
+#define NAND0_NUM_PARTITIONS 1
+static struct mtd_partition nand0_partition_info[] = {
+ {
+ .name = "filesystem",
+ .offset = 0x0,
+ .size = 0x4000000,
+ },
+};
+
+#define NAND1_NUM_PARTITIONS 1
+static struct mtd_partition nand1_partition_info[] = {
+ {
+ .name = "filesystem",
+ .offset = 0x0,
+ .size = 0x10000000,
+ }
+};
+
+/*
+ * The 440EP has a NAND Flash Controller (NDFC) that handles all accesses to
+ * the NAND devices. The NDFC has command, address and data registers that
+ * when accessed will set up the NAND flash pins appropriately. We'll use the
+ * hwcontrol function to save the configuration in a global variable.
+ * We can then use this information in the read and write functions to
+ * determine which NDFC register to access. For the NCE commands, we'll just
+ * set or clear the Bank Enable bit in the NDFC Bank Config registers.
+ *
+ * There are 2 NAND devices on the board, a Samsung K9F1208U0A (64 MB) and a
+ * Samsung K9K2G08U0M (256 MB).
+ */
+static void
+bamboo_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+ switch (cmd) {
+ case NAND_CTL_SETCLE:
+ hwctl |= 0x1;
+ break;
+ case NAND_CTL_CLRCLE:
+ hwctl &= ~0x1;
+ break;
+ case NAND_CTL_SETALE:
+ hwctl |= 0x2;
+ break;
+ case NAND_CTL_CLRALE:
+ hwctl &= ~0x2;
+ break;
+ }
+}
+
+static void
+bamboo_nand0_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+ switch(cmd) {
+ case NAND_CTL_SETNCE:
+ bamboo_ndfc->b1cr |= 0x80000000;
+ break;
+ case NAND_CTL_CLRNCE:
+ bamboo_ndfc->b1cr &= ~0x80000000;
+ break;
+ default:
+ bamboo_hwcontrol(mtd, cmd);
+ }
+}
+
+static void
+bamboo_nand1_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+ switch(cmd) {
+ case NAND_CTL_SETNCE:
+ bamboo_ndfc->b2cr |= 0x80000000;
+ break;
+ case NAND_CTL_CLRNCE:
+ bamboo_ndfc->b2cr &= ~0x80000000;
+ break;
+ default:
+ bamboo_hwcontrol(mtd, cmd);
+ }
+}
+
+static void
+bamboo_nand0_enable(void)
+{
+ bamboo_ndfc->cr = 0x01001000;
+}
+
+static void
+bamboo_nand1_enable(void)
+{
+ bamboo_ndfc->cr = 0x02003000;
+}
+
+static void
+bamboo_write_byte(struct mtd_info *mtd, u_char byte)
+{
+ if (hwctl & 0x1)
+ writeb(byte, &(bamboo_ndfc->cmd));
+ else if (hwctl & 0x2)
+ writeb(byte, &(bamboo_ndfc->addr));
+ else
+ writeb(byte, &(bamboo_ndfc->data));
+}
+
+static void
+bamboo_nand0_write_byte(struct mtd_info *mtd, u_char byte)
+{
+ bamboo_nand0_enable();
+ bamboo_write_byte(mtd, byte);
+}
+
+static void
+bamboo_nand1_write_byte(struct mtd_info *mtd, u_char byte)
+{
+ bamboo_nand1_enable();
+ bamboo_write_byte(mtd,byte);
+}
+
+static u_char
+bamboo_read_byte(struct mtd_info *mtd)
+{
+ u_char retval;
+ if (hwctl & 0x1)
+ retval = readb(&(bamboo_ndfc->cmd));
+ else if (hwctl & 0x2)
+ retval = readb(&(bamboo_ndfc->addr));
+ else
+ retval = readb(&(bamboo_ndfc->data));
+ return retval;
+}
+
+static u_char
+bamboo_nand0_read_byte(struct mtd_info *mtd)
+{
+ bamboo_nand0_enable();
+ return bamboo_read_byte(mtd);
+}
+
+static u_char
+bamboo_nand1_read_byte(struct mtd_info *mtd)
+{
+ bamboo_nand1_enable();
+ return bamboo_read_byte(mtd);
+}
+
+static void
+bamboo_nand_write_buf(struct mtd_info *mtd, const u_char * buf, int len)
+{
+ int i;
+ for (i = 0; i < len; i++) {
+ if (hwctl & 0x1)
+ writeb(buf[i], &(bamboo_ndfc->cmd));
+ else if (hwctl & 0x2)
+ writeb(buf[i], &(bamboo_ndfc->addr));
+ else
+ writeb(buf[i], &(bamboo_ndfc->data));
+ }
+}
+
+static void
+bamboo_nand0_write_buf(struct mtd_info *mtd, const u_char * buf, int len)
+{
+ bamboo_nand0_enable();
+ bamboo_nand_write_buf(mtd, buf, len);
+}
+
+static void
+bamboo_nand1_write_buf(struct mtd_info *mtd, const u_char * buf, int len)
+{
+ bamboo_nand1_enable();
+ bamboo_nand_write_buf(mtd, buf, len);
+}
+
+static void
+bamboo_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len)
+{
+ int i;
+
+ for (i = 0; i < len; i++) {
+ if (hwctl & 0x1)
+ buf[i] = readb(&(bamboo_ndfc->cmd));
+ else if (hwctl & 0x2)
+ buf[i] = readb(&(bamboo_ndfc->addr));
+ else
+ buf[i] = readb(&(bamboo_ndfc->data));
+ }
+}
+
+static void
+bamboo_nand0_read_buf(struct mtd_info *mtd, u_char * buf, int len)
+{
+ bamboo_nand0_enable();
+ bamboo_nand_read_buf(mtd, buf, len);
+}
+
+static void
+bamboo_nand1_read_buf(struct mtd_info *mtd, u_char * buf, int len)
+{
+ bamboo_nand1_enable();
+ bamboo_nand_read_buf(mtd, buf, len);
+}
+
+static int
+bamboo_nand_verify_buf(struct mtd_info *mtd, const u_char * buf, int len)
+{
+ int i;
+
+ for (i = 0; i < len; i++) {
+ if (hwctl & 0x1) {
+ if (buf[i] != readb(&(bamboo_ndfc->cmd)))
+ return i;
+ } else if (hwctl & 0x2) {
+ if (buf[i] != readb(&(bamboo_ndfc->addr)))
+ return i;
+ } else {
+ if (buf[i] != readb(&(bamboo_ndfc->data)))
+ return i;
+ }
+
+ }
+
+ return 0;
+}
+
+static int
+bamboo_nand0_verify_buf(struct mtd_info *mtd, const u_char * buf, int len)
+{
+ bamboo_nand0_enable();
+ return bamboo_nand_verify_buf(mtd, buf, len);
+}
+
+static int
+bamboo_nand1_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
+{
+ bamboo_nand1_enable();
+ return bamboo_nand_verify_buf(mtd, buf, len);
+}
+
+static int
+bamboo_dev_ready(struct mtd_info *mtd)
+{
+ return ((bamboo_ndfc->sr) & 0x01000000) ? 1 : 0;
+}
+
+int __init
+bamboo_init(void)
+{
+ struct nand_chip *this;
+ uint * selection1_base, * gpio_base;
+ u8 selection1_val;
+ int err = 0;
+
+ hwctl = 0;
+
+ /*
+ * Bank 0 was set up by the firmware already. Bank 1 wasn't, so set it
+ * up now.
+ */
+
+ selection1_base = ioremap64(BAMBOO_FPGA_SELECTION1_REG_ADDR, 8);
+ if(!selection1_base){
+ printk("Ioremap to access FPGA Selection Register 1 failed \n");
+ err = -EIO;
+ goto out;
+ }
+ selection1_val = readb(selection1_base);
+ selection1_val |= 0x02;
+ writeb(selection1_val, selection1_base);
+ iounmap((void *)(selection1_base));
+
+ SDR_WRITE(DCRN_SDR_CUST0, SDR_READ(DCRN_SDR_CUST0) | 0x2);
+
+ gpio_base = ioremap64(0x0EF600B00ULL, 0x80);
+ if(!gpio_base) {
+ printk("Ioremap to access GPIO Registers failed \n");
+ err = -EIO;
+ goto out;
+ }
+ *(uint *) (gpio_base + 0x2) |= 0x00010000;
+ *(uint *) (gpio_base + 0x4) |= 0x00010000;
+ iounmap((void *) gpio_base);
+
+ bamboo_nand0_mtd = kmalloc(sizeof(struct mtd_info) +
+ sizeof(struct nand_chip),
+ GFP_KERNEL);
+
+ bamboo_nand1_mtd = kmalloc(sizeof (struct mtd_info) +
+ sizeof (struct nand_chip),
+ GFP_KERNEL);
+ if (!bamboo_nand1_mtd) {
+ printk("Unable to allocate NAND 1 MTD device structure.\n");
+ err = -ENOMEM;
+ goto out_mtd0;
+ }
+
+ bamboo_ndfc = ioremap64(BAMBOO_NAND_FLASH_REG_ADDR,
+ BAMBOO_NAND_FLASH_REG_SIZE);
+ if (!bamboo_ndfc) {
+ printk("Ioremap to access NDFC Registers failed \n");
+ err = -EIO;
+ goto out_mtd1;
+ }
+ bamboo_ndfc->b2cr = 0xC0007777;
+
+ /* Initialize structures */
+ memset((char *) bamboo_nand0_mtd, 0,
+ sizeof (struct mtd_info) + sizeof (struct nand_chip));
+
+ memset((char *) bamboo_nand1_mtd, 0,
+ sizeof (struct mtd_info) + sizeof (struct nand_chip));
+
+ /* Get pointer to private data */
+ this = (struct nand_chip *) (&bamboo_nand0_mtd[1]);
+ /* Link the private data with the MTD structure */
+ bamboo_nand0_mtd->priv = this;
+
+ /* Set address of NAND IO lines (Using Linear Data Access Region) */
+ this->IO_ADDR_R = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
+ this->IO_ADDR_W = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
+ /* Reference hardware control function */
+ this->hwcontrol = bamboo_nand0_hwcontrol;
+ /* Set command delay time */
+ this->chip_delay = 12;
+ this->eccmode = NAND_ECC_SOFT;
+ this->write_byte = bamboo_nand0_write_byte;
+ this->read_byte = bamboo_nand0_read_byte;
+ this->write_buf = bamboo_nand0_write_buf;
+ this->read_buf = bamboo_nand0_read_buf;
+ this->verify_buf = bamboo_nand0_verify_buf;
+ this->dev_ready = bamboo_dev_ready;
+
+ /* Scan to find existance of the device */
+ if (nand_scan(bamboo_nand0_mtd, 1)) {
+ err = -ENXIO;
+ goto out_ior;
+ }
+
+ /* Get pointer to private data */
+ this = (struct nand_chip *) (&bamboo_nand1_mtd[1]);
+ /* Link the private data with the MTD structure */
+ bamboo_nand1_mtd->priv = this;
+
+ /* Set address of NAND IO lines (Using Linear Data Access Region) */
+ this->IO_ADDR_R = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
+ this->IO_ADDR_W = (void __iomem *) ((ulong) bamboo_ndfc + 0x1000);
+ /* Reference hardware control function */
+ this->hwcontrol = bamboo_nand1_hwcontrol;
+ /* Set command delay time */
+ this->chip_delay = 25;
+ this->eccmode = NAND_ECC_SOFT;
+ this->write_byte = bamboo_nand1_write_byte;
+ this->read_byte = bamboo_nand1_read_byte;
+ this->write_buf = bamboo_nand1_write_buf;
+ this->read_buf = bamboo_nand1_read_buf;
+ this->verify_buf = bamboo_nand1_verify_buf;
+ this->dev_ready = NULL;
+
+ /* Scan to find existance of the device */
+ if (nand_scan(bamboo_nand1_mtd, 1)) {
+ err = -ENXIO;
+ goto out_ior;
+ }
+
+
+ add_mtd_partitions(bamboo_nand0_mtd, nand0_partition_info,
+ NAND0_NUM_PARTITIONS);
+
+ add_mtd_partitions(bamboo_nand1_mtd, nand1_partition_info,
+ NAND1_NUM_PARTITIONS);
+ goto out;
+
+out_ior:
+ iounmap((void *)bamboo_ndfc);
+out_mtd1:
+ kfree(bamboo_nand1_mtd);
+out_mtd0:
+ kfree(bamboo_nand0_mtd);
+out:
+ return err;
+}
+
+static void __exit
+bamboo_cleanup(void)
+{
+ /* Unregister partitions */
+ del_mtd_partitions(bamboo_nand0_mtd);
+ del_mtd_partitions(bamboo_nand1_mtd);
+
+ /* Release resources, unregister device */
+ del_mtd_device(bamboo_nand0_mtd);
+ del_mtd_device(bamboo_nand1_mtd);
+
+ /* unmap physical address */
+ iounmap((void *) bamboo_ndfc);
+
+ /* Free the MTD device structure */
+ kfree(bamboo_nand0_mtd);
+ kfree(bamboo_nand1_mtd);
+}
+
+module_init(bamboo_init);
+module_exit(bamboo_cleanup);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Wade Farnsworth <wfarnsworth@mvista.com>");
+MODULE_DESCRIPTION
+ ("Board-specific glue layer for NAND flash on IBM 440EP eval board");
^ permalink raw reply
* Re: [PATCH 3/3] MTD support for the Bamboo board
From: Eugene Surovegin @ 2005-07-26 16:40 UTC (permalink / raw)
To: Wade Farnsworth; +Cc: linuxppc-embedded
In-Reply-To: <1122393974.10004.41.camel@rhino.az.mvista.com>
On Tue, Jul 26, 2005 at 09:06:14AM -0700, Wade Farnsworth wrote:
> This adds MTD support for the Bamboo board.
>
> Signed-off by: Wade Farnsworth <wfarnsworth@mvista.com>
> diff -uprN linux-2.6.12/drivers/mtd/maps/Kconfig.orig linux-2.6.12-440ep/drivers/mtd/maps/Kconfig.orig
> --- linux-2.6.12/drivers/mtd/maps/Kconfig.orig 1969-12-31 17:00:00.000000000 -0700
> +++ linux-2.6.12-440ep/drivers/mtd/maps/Kconfig.orig 2005-07-25 11:31:51.000000000 -0700
This hunk seems to be bogus.
> diff -uprN linux-2.6.12/drivers/mtd/maps/Makefile.orig linux-2.6.12-440ep/drivers/mtd/maps/Makefile.orig
> --- linux-2.6.12/drivers/mtd/maps/Makefile.orig 1969-12-31 17:00:00.000000000 -0700
> +++ linux-2.6.12-440ep/drivers/mtd/maps/Makefile.orig 2005-07-25 11:31:51.000000000 -0700
Ditto.
> diff -uprN linux-2.6.12/drivers/mtd/nand/Kconfig.orig linux-2.6.12-440ep/drivers/mtd/nand/Kconfig.orig
> --- linux-2.6.12/drivers/mtd/nand/Kconfig.orig 1969-12-31 17:00:00.000000000 -0700
> +++ linux-2.6.12-440ep/drivers/mtd/nand/Kconfig.orig 2005-07-25 11:31:51.000000000 -0700
Ditto
--
Eugene
^ permalink raw reply
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