* Re: Git tree for the 32/64 merge
From: Kumar Gala @ 2005-09-19 14:29 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, linuxppc64-dev
In-Reply-To: <17197.65270.548340.377011@cargo.ozlabs.ibm.com>
On Sep 18, 2005, at 6:57 PM, Paul Mackerras wrote:
> I have created a git tree on kernel.org as a place to accumulate the
> patches for the ppc32/ppc64 merge. It is at:
>
> rsync://rsync.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc-
> merge.g
> it
>
> It doesn't include the objects in Linus' tree; instead it has an
> objects/info/alternates file pointing to Linus' tree.
>
> This tree contains all the patches I found in a scan through my inbox
> that relate to the merge and haven't already gone to Linus. If you
> have a patch that should go in, please resend it.
Paul,
You pulled the wrong version of the Kconfig patch for prep/chrp/
pmac. There is a newer version that doesn't leave duplicated 'bool's
in the Kconfig:
http://patchwork.ozlabs.org/linuxppc/patch?id=2447
- kumar
^ permalink raw reply
* PATCH powerpc: Revised merge asm-ppc*/hardirq.h
From: linuxppc @ 2005-09-19 14:32 UTC (permalink / raw)
To: linuxppc-dev, linuxppc64-dev
This is a revised patch to merge asm-ppc*/hardirq.h.
It removes some unnecessary #includes, but then requires
the addition of #include <asm/irq.h> in PPC32's hw_irq.h
much like ppc64 already does. Furthermore, several
unnecessary #includes were removed from some ppc32 boards
in order to break resulting bad #include cycles.
Builds pSeries_defconfig and all ppc32 platforms except
the already b0rken bseip.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
---
arch/ppc/platforms/83xx/mpc834x_sys.h | 1 -
arch/ppc/platforms/85xx/mpc85xx_ads_common.h | 1 -
arch/ppc/platforms/85xx/stx_gp3.h | 1 -
include/asm-powerpc/hardirq.h | 24 ++++++++++++++++++++
include/asm-ppc/hardirq.h | 31 --------------------------
include/asm-ppc/hw_irq.h | 1 +
include/asm-ppc64/hardirq.h | 27 -----------------------
7 files changed, 25 insertions(+), 61 deletions(-)
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h
--- a/arch/ppc/platforms/83xx/mpc834x_sys.h
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.h
@@ -19,7 +19,6 @@
#include <linux/config.h>
#include <linux/init.h>
-#include <linux/seq_file.h>
#include <syslib/ppc83xx_setup.h>
#include <asm/ppcboot.h>
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
+++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
@@ -19,7 +19,6 @@
#include <linux/config.h>
#include <linux/init.h>
-#include <linux/seq_file.h>
#include <asm/ppcboot.h>
#define BOARD_CCSRBAR ((uint)0xe0000000)
diff --git a/arch/ppc/platforms/85xx/stx_gp3.h b/arch/ppc/platforms/85xx/stx_gp3.h
--- a/arch/ppc/platforms/85xx/stx_gp3.h
+++ b/arch/ppc/platforms/85xx/stx_gp3.h
@@ -21,7 +21,6 @@
#include <linux/config.h>
#include <linux/init.h>
-#include <linux/seq_file.h>
#include <asm/ppcboot.h>
#define BOARD_CCSRBAR ((uint)0xe0000000)
diff --git a/include/asm-powerpc/hardirq.h b/include/asm-powerpc/hardirq.h
new file mode 100644
--- /dev/null
+++ b/include/asm-powerpc/hardirq.h
@@ -0,0 +1,24 @@
+#ifndef _ASM_POWERPC_HARDIRQ_H
+#define _ASM_POWERPC_HARDIRQ_H
+
+/* The __last_jiffy_stamp field is needed to ensure that no decrementer
+ * interrupt is lost on SMP machines. Since on most CPUs it is in the same
+ * cache line as local_irq_count, it is cheap to access and is also used on UP
+ * for uniformity.
+ */
+typedef struct {
+ unsigned int __softirq_pending; /* set_bit is used on this */
+ unsigned int __last_jiffy_stamp;
+} ____cacheline_aligned irq_cpustat_t;
+
+#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
+
+#define last_jiffy_stamp(cpu) __IRQ_STAT((cpu), __last_jiffy_stamp)
+
+static inline void ack_bad_irq(int irq)
+{
+ printk(KERN_CRIT "illegal vector %d received!\n", irq);
+ BUG();
+}
+
+#endif /* _ASM_POWERPC_HARDIRQ_H */
diff --git a/include/asm-ppc/hardirq.h b/include/asm-ppc/hardirq.h
deleted file mode 100644
--- a/include/asm-ppc/hardirq.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifdef __KERNEL__
-#ifndef __ASM_HARDIRQ_H
-#define __ASM_HARDIRQ_H
-
-#include <linux/config.h>
-#include <linux/cache.h>
-#include <linux/smp_lock.h>
-#include <asm/irq.h>
-
-/* The __last_jiffy_stamp field is needed to ensure that no decrementer
- * interrupt is lost on SMP machines. Since on most CPUs it is in the same
- * cache line as local_irq_count, it is cheap to access and is also used on UP
- * for uniformity.
- */
-typedef struct {
- unsigned long __softirq_pending; /* set_bit is used on this */
- unsigned int __last_jiffy_stamp;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
-
-#define last_jiffy_stamp(cpu) __IRQ_STAT((cpu), __last_jiffy_stamp)
-
-static inline void ack_bad_irq(int irq)
-{
- printk(KERN_CRIT "illegal vector %d received!\n", irq);
- BUG();
-}
-
-#endif /* __ASM_HARDIRQ_H */
-#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/hw_irq.h b/include/asm-ppc/hw_irq.h
--- a/include/asm-ppc/hw_irq.h
+++ b/include/asm-ppc/hw_irq.h
@@ -7,6 +7,7 @@
#include <asm/ptrace.h>
#include <asm/reg.h>
+#include <asm/irq.h>
extern void timer_interrupt(struct pt_regs *);
diff --git a/include/asm-ppc64/hardirq.h b/include/asm-ppc64/hardirq.h
deleted file mode 100644
--- a/include/asm-ppc64/hardirq.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef __ASM_HARDIRQ_H
-#define __ASM_HARDIRQ_H
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/config.h>
-#include <linux/cache.h>
-#include <linux/preempt.h>
-
-typedef struct {
- unsigned int __softirq_pending;
-} ____cacheline_aligned irq_cpustat_t;
-
-#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
-
-static inline void ack_bad_irq(int irq)
-{
- printk(KERN_CRIT "illegal vector %d received!\n", irq);
- BUG();
-}
-
-#endif /* __ASM_HARDIRQ_H */
^ permalink raw reply
* Re: [PATCH] ppc32: cleanup AMCC PPC4xx eval boards to better support U-Boot
From: Stefan Roese @ 2005-09-19 15:06 UTC (permalink / raw)
To: Matt Porter; +Cc: linuxppc-embedded
In-Reply-To: <20050919065942.A25356@cox.net>
Hi Matt,
On Monday 19 September 2005 15:59, Matt Porter wrote:
> On Mon, Sep 19, 2005 at 01:02:14PM +0200, Stefan Roese wrote:
> > Just to be sure: The 44x boot-wrapper approach you mention is
> > "boot/simple/pibs.c"?
>
> Yes, there's both boot/simple/pibs.c and boot/simple/openbios.c that
> were created so we could have the default firmware and u-boot use the
> same kernel build.
Yes, that's what I thought. But Eugene mentioned, that he boots vmlinux
without any boot-wrapper on the OpenBIOS targets (except Ebony probably). You
would loose this possibility, if I add this wrapper and switch from OpenBIOS
to U-Boot bd_info struct in the kernel.
Did I miss something here? How should I proceed?
Best regards,
Stefan
^ permalink raw reply
* Re: Which way to store log in flash on mpc8xx?
From: Frank @ 2005-09-19 15:09 UTC (permalink / raw)
To: David Jander, linuxppc-embedded
In-Reply-To: <200509191155.36540.david.jander@protonic.nl>
--- David JandJandervidaviddjandertprotonic nlote:
>
> Hi all,
>
> I am looking for a reliable way to store logflogfilesflash.
> The logflogfiles
> written by syslsyslogd The problem is that I am running on a
MPC8MPCprocessor, and
> kernel 2.6 is not
> quite there yet for that processor, so I have to stick with
> 2.4.
> Kernel of choice seems to be denxdenxulinuxppc_devedevelt I
> cannot trust the
> version of jffsjffsed in that kernel anymore. SomtSomtimescgc>
crashes with a
> BUG() in line 139, and sometimes processes are frozen for a
> looolooonge
> waiting for GC. GChave debugged that problem a little bit, and
> definitely,
> the FLASH access works ok, okd the chip is new. No CRC-CRC
> read-errors, but
> still gc.cgcrashes.
> The version of mtd/mtdsjffsivers in that kernel seem to be
> from march/2005 cvs cvs code, but when I read the following, I
get even more scared:
>
httphttpww.wwwulinux.mtdrinfradead/source.htmlhtmlnkernelversions
> So, I need something different. jffsjffs maybe ?
> This must be a very common task (to store logflogfilesflash),
> but I just can't
> seem to find the right way to do it.
>
> Any advice is highly appreciated.
>
> Sincerely,
>
> --
> David JandJanderProtProtonicland.
I'm using JFFSJFFS a 860 based board (to store log files
amonamongster things) and haven't seen any of the problems
you're expeexperiencing I were you, I would double check my
configuration settings...
> _______________________________________________
> LinuLinuxppcedded mailing list
> LinuLinuxppcedded@ozlaozlabs
> httphttpszlaozlabs/mailman/listlistinfoulinuxppcedded
>
__________________________________
Yahoo! Mail - PC Magazine Editors' Choice 2005
http://mail.yahoo.com
^ permalink raw reply
* HELLO
From: jonaris0 @ 2005-09-19 15:31 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 873 bytes --]
Hello,
My name is Col(Rtd) Jon Aristide,brother to the
exiled President of Haiti,(Dr.Jean Bertrand
Aristide)
Due to the evolution against the government
of my brother caused by his political opponents in
Haiti,we managed to enter a red cross airplane that
was evacuating foreigners and we are presently on
political assylum in Central African Repubilc(CAR)
I wish to invest in Real Estate and commercial
Properties and equally start a new life in your
country with your assistance and cooperation.If you
are in a good position to help my family,please send
an e-mail to my personal address below indicating your
desire to help meinvest this funds in your country and
beyond.
I urgently await your e-mail letter.
Reply to my confidential mail box: jonaris05@yahoo.com
Best Regards and hope to meet you soon.
God bless,
Col Jon(Rtd).
^ permalink raw reply
* HELLO
From: jonaris0 @ 2005-09-19 15:31 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 873 bytes --]
Hello,
My name is Col(Rtd) Jon Aristide,brother to the
exiled President of Haiti,(Dr.Jean Bertrand
Aristide)
Due to the evolution against the government
of my brother caused by his political opponents in
Haiti,we managed to enter a red cross airplane that
was evacuating foreigners and we are presently on
political assylum in Central African Repubilc(CAR)
I wish to invest in Real Estate and commercial
Properties and equally start a new life in your
country with your assistance and cooperation.If you
are in a good position to help my family,please send
an e-mail to my personal address below indicating your
desire to help meinvest this funds in your country and
beyond.
I urgently await your e-mail letter.
Reply to my confidential mail box: jonaris05@yahoo.com
Best Regards and hope to meet you soon.
God bless,
Col Jon(Rtd).
^ permalink raw reply
* Re: kernel 2.6.12.2, octobus ppc405EP: GUNZIP ERROR - must RESET board to recover
From: Wolfgang Denk @ 2005-09-19 15:33 UTC (permalink / raw)
To: Peter Fercher; +Cc: linux-ppc-embedded
In-Reply-To: <002e01c5bcfa$c500d860$dbe5fed4@scsad.scs.ch>
In message <002e01c5bcfa$c500d860$dbe5fed4@scsad.scs.ch> you wrote:
>
...
> TFTP from server 192.168.1.1; our IP address is 192.168.1.2
> Filename 'uImage-2.6.12.2'.
> Load address: 0x100000
...
> Image Type: PowerPC Linux Kernel Image (gzip compressed)
> Data Size: 919184 Bytes = 897.6 kB
...
> GUNZIP ERROR - must RESET board to recover.
Your load address is much too low for a kernel that big.
> any hints ?
Yes. RTFM. RTFAQ. See especially
http://www.denx.de/twiki/bin/view/DULG/LinuxUncompressingError
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
The important thing about being a leader is not being right or wrong,
but being *certain*. - Terry Pratchett, _Truckers_
^ permalink raw reply
* Re: Which way to store log in flash on mpc8xx?
From: Wolfgang Denk @ 2005-09-19 15:37 UTC (permalink / raw)
To: David Jander; +Cc: linuxppc-embedded
In-Reply-To: <200509191155.36540.david.jander@protonic.nl>
In message <200509191155.36540.david.jander@protonic.nl> you wrote:
>
> Kernel of choice seems to be denx linuxppc_2_4_devel, but I cannot trust the
> version of jffs2 used in that kernel anymore. Somtimes gc.c crashes with a
> BUG() in line 139, and sometimes processes are frozen for a looong time
Can you provide a little more details? The MTD / JFFS2 code in this
kernel is not too old, andwe use it in a couple of projects without
such problems.
> waiting for GC. I have debugged that problem a little bit, and definitely,
> the FLASH access works ok, and the chip is new. No CRC- or read-errors, but
> still gc.c crashes.
Can you provide soem more information for debugging?
> The version of mtd/jffs2 drivers in that kernel seem to be from march/2005 cvs
> code, but when I read the following, I get even more scared:
> http://www.linux-mtd.infradead.org/source.html#kernelversions
Don't worry. We backported the MTD / JFFS2 code. See the history of
changes on our CVS or git server.
> This must be a very common task (to store logfiles in flash), but I just can't
> seem to find the right way to do it.
Note that log files may cause a lot of trouble when using a JFFS2
file system. Youmay want to addd a buffering layer, like pramfs in a
dedicated RAM area (SRAM ideally).
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
Never underestimate the bandwidth of a station wagon full of tapes.
-- Dr. Warren Jackson, Director, UTCS
^ permalink raw reply
* 8250 serial driver on MPC8272ADS board
From: Landau, Bracha @ 2005-09-19 15:41 UTC (permalink / raw)
To: linuxppc-embedded
I am running linux kernel 2.6.13 on a MPC8272ADS board. When I compile =
the kernel with the 8250 serial driver, the kernel crashes when loading =
it. It crashes also if compiled as a module and insmod'ed later.
Has anyone had experience with this?
Thanks,
Bracha
^ permalink raw reply
* Re: [PATCH] ppc32: cleanup AMCC PPC4xx eval boards to better support U-Boot
From: Matt Porter @ 2005-09-19 15:21 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-embedded
In-Reply-To: <200509191706.24298.sr@denx.de>
On Mon, Sep 19, 2005 at 05:06:23PM +0200, Stefan Roese wrote:
> Hi Matt,
>
> On Monday 19 September 2005 15:59, Matt Porter wrote:
> > On Mon, Sep 19, 2005 at 01:02:14PM +0200, Stefan Roese wrote:
> > > Just to be sure: The 44x boot-wrapper approach you mention is
> > > "boot/simple/pibs.c"?
> >
> > Yes, there's both boot/simple/pibs.c and boot/simple/openbios.c that
> > were created so we could have the default firmware and u-boot use the
> > same kernel build.
>
> Yes, that's what I thought. But Eugene mentioned, that he boots vmlinux
> without any boot-wrapper on the OpenBIOS targets (except Ebony probably). You
> would loose this possibility, if I add this wrapper and switch from OpenBIOS
> to U-Boot bd_info struct in the kernel.
>
> Did I miss something here? How should I proceed?
I thought he was talking about booting a uImage, which from the
perspective of not having the zImage wrapper around it, is like booting
a vmlinux. He may referring to his own production firmware capabilities
too. I'll let him comment.
In any case, if you follow the model used on 44x where the board info
is the standard method of passing info into the kernel, then we'll be
alright. This means you have to add additional code in the
arch/ppc/boot/simple/openbios.c shim to generate some compatible board
info.
-Matt
^ permalink raw reply
* Re: [PATCH] ppc32: cleanup AMCC PPC4xx eval boards to better support U-Boot
From: Eugene Surovegin @ 2005-09-19 17:14 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-embedded
In-Reply-To: <200509191706.24298.sr@denx.de>
On Mon, Sep 19, 2005 at 05:06:23PM +0200, Stefan Roese wrote:
> Hi Matt,
>
> On Monday 19 September 2005 15:59, Matt Porter wrote:
> > On Mon, Sep 19, 2005 at 01:02:14PM +0200, Stefan Roese wrote:
> > > Just to be sure: The 44x boot-wrapper approach you mention is
> > > "boot/simple/pibs.c"?
> >
> > Yes, there's both boot/simple/pibs.c and boot/simple/openbios.c that
> > were created so we could have the default firmware and u-boot use the
> > same kernel build.
>
> Yes, that's what I thought. But Eugene mentioned, that he boots vmlinux
> without any boot-wrapper on the OpenBIOS targets (except Ebony probably).
Bad phrasing on my part. What I meant was "U-Boot is different from
OpenBIOS targets already, as with U-Boot we don't use any boot-wrapper
like with OpenBIOS".
Sorry for confusion :).
--
Eugene
^ permalink raw reply
* HELLO
From: jonaris0 @ 2005-09-19 17:25 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 873 bytes --]
Hello,
My name is Col(Rtd) Jon Aristide,brother to the
exiled President of Haiti,(Dr.Jean Bertrand
Aristide)
Due to the evolution against the government
of my brother caused by his political opponents in
Haiti,we managed to enter a red cross airplane that
was evacuating foreigners and we are presently on
political assylum in Central African Repubilc(CAR)
I wish to invest in Real Estate and commercial
Properties and equally start a new life in your
country with your assistance and cooperation.If you
are in a good position to help my family,please send
an e-mail to my personal address below indicating your
desire to help meinvest this funds in your country and
beyond.
I urgently await your e-mail letter.
Reply to my confidential mail box: jonaris05@yahoo.com
Best Regards and hope to meet you soon.
God bless,
Col Jon(Rtd).
^ permalink raw reply
* HELLO
From: jonaris0 @ 2005-09-19 17:25 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 873 bytes --]
Hello,
My name is Col(Rtd) Jon Aristide,brother to the
exiled President of Haiti,(Dr.Jean Bertrand
Aristide)
Due to the evolution against the government
of my brother caused by his political opponents in
Haiti,we managed to enter a red cross airplane that
was evacuating foreigners and we are presently on
political assylum in Central African Repubilc(CAR)
I wish to invest in Real Estate and commercial
Properties and equally start a new life in your
country with your assistance and cooperation.If you
are in a good position to help my family,please send
an e-mail to my personal address below indicating your
desire to help meinvest this funds in your country and
beyond.
I urgently await your e-mail letter.
Reply to my confidential mail box: jonaris05@yahoo.com
Best Regards and hope to meet you soon.
God bless,
Col Jon(Rtd).
^ permalink raw reply
* Re: Which way to store log in flash on mpc8xx?
From: David Jander @ 2005-09-19 17:26 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <20050919153747.78ACC352682@atlas.denx.de>
Hi again,
Thanks for helping,
On Monday 19 September 2005 17:37, Wolfgang Denk wrote:
>[...]
> Can you provide a little more details? The MTD / JFFS2 code in this
> kernel is not too old, andwe use it in a couple of projects without
> such problems.
Ok, good you asked, because I am willing to debug the problem until I get to
the point where it fails, but I will need help, because I am not at home in
jffs2 source-code nor its CVS history.
Here are more details:
Kernel: Denx CVS from around july 2005 or something. AFAIK there are no
further modifications other than BSP-specific stuff to the MTD code since
that day, so I won't bother upgrading any further right now.
Hardware: MPC852T custom board with a 32Mbyte mirror-bit flash-chip (x16 bus)
Software: System based on ELDK-3.1.1. Intended flash-layout and use:
rootfs : 10Mb, ro, hardly ever changed
app : 6Mb, ro, changed on software-upgrade by replacing partition.
log+config : 12Mb, rw
The log+config partition is extremely oversized, because we are aware of the
inefficiency of jffs2 for such purposes, we have the available space and we
want to stay out of trouble. Syslog writes to 4 log-files which are limited
in size to 50..100kbyte each. Logs are then rotated and one rotated copy is
kept. Maximum flash use is around 800kbyte for logs + 50kbyte for config
data. On a 12Mbyte partition, that shouldn't get us into trouble AFAIK.
> > waiting for GC. I have debugged that problem a little bit, and
> > definitely, the FLASH access works ok, and the chip is new. No CRC- or
> > read-errors, but still gc.c crashes.
>
> Can you provide soem more information for debugging?
Unfortunately right now I don't have debug messages, because since I installed
a kernel with debugging turned on in the jffs2 driver, the problem hasn't
repeated. I am working on that.
What happened: System boots, all fs are mounted. The first app that writes
something to the log-partition (in this case a config file that is
overwritten) causes the GC thread for that partition to crash with a BUG() in
line 139 of gc.c, and the application freezes forever. Since GC is dead, all
further write-accesses to that partition also hang forever.
The problem seems to ocurr after a few times power-cycling the board. We never
intended it to shut-down nicely, if it is at all ever shut-down, so it must
be able to survive quite a few power-cycles without breaking.
After a few more power-cycles, the problem is gone again. Each time GC kicks
in, it does something, but it crashes before finishing the job, so each time
the numbers reported by the printk() in line 138 change, and eventually it
work again.
My big question: Is it at all possible that gc.c comes to that BUG() in line
139 because of anything other than a bug in jffs2-code?
I mean, if hardware really was a problem, then I should also get at least
CRC-errors from jffs2, shouldn't I? IMHO at least, jffs2 should be robust
enough to not crash on flash-errors, shouldn't it?
Also, I am pretty certain that the hardware is good.... but you never know...
> > The version of mtd/jffs2 drivers in that kernel seem to be from
> > march/2005 cvs code, but when I read the following, I get even more
> > scared:
> > http://www.linux-mtd.infradead.org/source.html#kernelversions
>
> Don't worry. We backported the MTD / JFFS2 code. See the history of
> changes on our CVS or git server.
I am having trouble finding the right history, but that could be due to the
fact that I am not very good at CVS (we use subversion which is slightly
different) ;-)
The logs of almost all files in fs/jffs2/ which I have say that the actual
version corresponds to the CVS-snapshot of March 13, 2005, and that the
previous version of April 2004 is broken.
Which files were modified _after_ March 13, 2005?
(A hint to what command options or tools to use to browse cvs-logs more easily
at this point is appreciated... I am using cervisia).
> > This must be a very common task (to store logfiles in flash), but I just
> > can't seem to find the right way to do it.
>
> Note that log files may cause a lot of trouble when using a JFFS2
> file system. Youmay want to addd a buffering layer, like pramfs in a
> dedicated RAM area (SRAM ideally).
I know about the problems jffs2 has with logfiles and alikes. I am still
thinking about what would be the most robust way of coping with this, and
until now, oversized partitions with log-rotation on size seems to do the
trick. I don't want to loose log-data on power-loss so I don't feel so
comfortable with buffering much of it in RAM.
Best Regards,
--
David Jander
Protonic Holland.
^ permalink raw reply
* Re: Which way to store log in flash on mpc8xx?
From: Shawn Jin @ 2005-09-19 18:40 UTC (permalink / raw)
To: Wolfgang Denk; +Cc: David Jander, linuxppc-embedded
In-Reply-To: <20050919153747.78ACC352682@atlas.denx.de>
> > This must be a very common task (to store logfiles in flash), but I jus=
t can't
> > seem to find the right way to do it.
>=20
> Note that log files may cause a lot of trouble when using a JFFS2
> file system. Youmay want to addd a buffering layer, like pramfs in a
> dedicated RAM area (SRAM ideally).
What's the trouble caused by log files when using a JFFS2? I'm not
aware of that. Any pointers to where I should look into are much
appreciated.
Best regards,
-Shawn.
^ permalink raw reply
* GT64260_eth (Ethernet) Driver
From: Earl Olsen @ 2005-09-19 18:53 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 1026 bytes --]
Dieu:
I saw that you had a problem with uncachedPages in gt64260_eth.c.
I'm having the same problem you describe. Did you ever get this
resolved?
Thanks for any help
--
Earl Olsen
Senior Software Engineer
Dilithium Networks, Inc.
TEL:+1 707-792-3925
earl.olsen@dilithiumnetworks.com
www.dilithiumnetworks.com
Communications for a Borderless World
This electronic message from Dilithium Networks contains information
which may be privileged or confidential. It is intended to be for the
use of the recipient(s) named above. If you are not the intended
recipient please return the message to the sender by replying to it and
then delete the message from your computer. Dilithium Networks shall not
be held liable to any person resulting from the use of any information
contained in this e-mail and shall not be liable to any person who acts
or omits to do anything in reliance upon it. Dilithium Networks does not
accept responsibility for changes made to this message after it was
sent.
[-- Attachment #2: Type: text/html, Size: 2178 bytes --]
^ permalink raw reply
* Re: Which way to store log in flash on mpc8xx?
From: Wolfgang Denk @ 2005-09-19 19:21 UTC (permalink / raw)
To: David Jander; +Cc: linuxppc-embedded
In-Reply-To: <200509191926.12736.david.jander@protonic.nl>
In message <200509191926.12736.david.jander@protonic.nl> you wrote:
>
> What happened: System boots, all fs are mounted. The first app that writes
> something to the log-partition (in this case a config file that is
> overwritten) causes the GC thread for that partition to crash with a BUG() in
> line 139 of gc.c, and the application freezes forever. Since GC is dead, all
> further write-accesses to that partition also hang forever.
Are you 100% sure your system is stable and wihout any memory errors?
Never seen any other erros or crashes?
> My big question: Is it at all possible that gc.c comes to that BUG() in line
> 139 because of anything other than a bug in jffs2-code?
Yes, for example when your SDRAM initialization is broken and/or
other memory corruption happens.
> I mean, if hardware really was a problem, then I should also get at least
> CRC-errors from jffs2, shouldn't I? IMHO at least, jffs2 should be robust
> enough to not crash on flash-errors, shouldn't it?
I don't think it's a flash error. If there is data corruption, then
it's more likely the SDRAM.
> The logs of almost all files in fs/jffs2/ which I have say that the actual
> version corresponds to the CVS-snapshot of March 13, 2005, and that the
> previous version of April 2004 is broken.
> Which files were modified _after_ March 13, 2005?
> (A hint to what command options or tools to use to browse cvs-logs more easily
> at this point is appreciated... I am using cervisia).
cvsps is really helpful, see http://www.cobite.com/cvsps/cvsps-2.1.tar.gz
Also there are web interfaces to our kernel tree;
for CVS see
http://81.169.171.120/cgi-bin/cvsweb/
for git see
http://81.169.171.120/cgi-bin/gitweb.cgi
Make sure to use at least the version tagged as LABEL_2005_05_09_1245
or later.
> I know about the problems jffs2 has with logfiles and alikes. I am still
> thinking about what would be the most robust way of coping with this, and
> until now, oversized partitions with log-rotation on size seems to do the
> trick. I don't want to loose log-data on power-loss so I don't feel so
> comfortable with buffering much of it in RAM.
The problem with your approach is the number of erase cycles which
will cause the flash to die sooner than you may want.
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
A dog always bit deepest on the veterinary hand.
- Terry Pratchett, _Wyrd Sisters_
^ permalink raw reply
* Re: Which way to store log in flash on mpc8xx?
From: Jörn Engel @ 2005-09-19 19:07 UTC (permalink / raw)
To: Shawn Jin; +Cc: linux-mtd, David Jander, linuxppc-embedded
In-Reply-To: <c3d0340b050919114040d0a0fe@mail.gmail.com>
On Mon, 19 September 2005 11:40:05 -0700, Shawn Jin wrote:
>
> > > This must be a very common task (to store logfiles in flash), but I just can't
> > > seem to find the right way to do it.
> >
> > Note that log files may cause a lot of trouble when using a JFFS2
> > file system. Youmay want to addd a buffering layer, like pramfs in a
> > dedicated RAM area (SRAM ideally).
>
> What's the trouble caused by log files when using a JFFS2? I'm not
> aware of that. Any pointers to where I should look into are much
> appreciated.
I guess this should become a FAQ item.
JFFS2 creates one or more nodes whenever sys_write is called.
Unbuffered log entries are usually quite small, so a single node is
written. Let's assume the worst case, just for fun, writes of a
single by.
Now, each node is prepended by a struct jffs2_raw_inode of 64 bytes.
So you're causing the first problem:
1. Up to 65x the raw file data is written to flash.
Which means you waste bus bandwidth, was flash space and waste flash
lifetime. After GC, most of those nodes should get combined to 4k
nodes (plus 64 bytes for the header). Now, JFFS2 also requires an
in-memory structure per node, the struct jffs2_raw_node_ref, weighing
in at 16 or 24 bytes, if you have a 32bit or 64bit arch. Those will
cost you precious memory:
2. Up to 24x the raw file data is required in DRAM.
Next problem is with GC accounting. JFFS2 only differentiates between
valid and obsolete data. After writing a huge logfile, all of its
nodes are still valid. Therefore GC will never try to GC such nodes,
unless they happen to sit in an erase block with a lot of obsolete
data. And even then, they could get copied as-is, with no combining.
3. JFFS2 GC is too stupid to detect miniature nodes and combine them.
So, your problem 1 and 2 will not go away if you wait long enough.
Renaming the log file also won't help. The only cure would be to
*copy* it to the new location and delete the original file afterwards.
Or - alternatively - to fix JFFS2 GC and send a patch.
Or - as already proposed - by writing in larger chunks in the first
place.
If you decide to fix JFFS2 GC, I'd be happy to review the patches and
merge them if deemed worthy.
Jörn
--
My second remark is that our intellectual powers are rather geared to
master static relations and that our powers to visualize processes
evolving in time are relatively poorly developed.
-- Edsger W. Dijkstra
^ permalink raw reply
* Re: Which way to store log in flash on mpc8xx?
From: Wolfgang Denk @ 2005-09-19 19:29 UTC (permalink / raw)
To: shawnxjin; +Cc: linuxppc-embedded
In-Reply-To: <c3d0340b050919114040d0a0fe@mail.gmail.com>
In message <c3d0340b050919114040d0a0fe@mail.gmail.com> you wrote:
>
> What's the trouble caused by log files when using a JFFS2? I'm not
> aware of that. Any pointers to where I should look into are much
> appreciated.
Please see the linux-mtd web site and/or MTD mailing list archives
for details. JFFS2 works excellent with files that are written once
(or with only a few write() calls. Logfiles typically grow forever,
by many, many small chunks of data appended in many write()
operations - this is kind of killer application for JFFS2.
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
"I find this a nice feature but it is not according to the documen-
tation. Or is it a BUG?" "Let's call it an accidental feature. :-)"
- Larry Wall in <6909@jpl-devvax.JPL.NASA.GOV>
^ permalink raw reply
* PATCH powerpc Merge atomic.h
From: Jon Loeliger @ 2005-09-19 20:29 UTC (permalink / raw)
To: linuxppc-dev, linuxppc64-dev
Paul,
There is also Arnd's patch called "[PATCH 0/3] Start the merge"
from 08/29 that is really the merger of asm-ppc*/atomic.h.
I repost it here for Arnd, who can NAK it or not.
It is a pre-requisite patch for doing the rwsem.h merge
as discussed recently.
jdl
This is another patch to merge the atomic.h file. It is not completely
trivial and changes the semantics for 32 bit SMP systems, which previously
did not do EIEIO_ON_SMP within the atomic operations. AFAICT, that was
a bug in the 32 bit version, which is now fixed as a side-effect of
the merge.
The combined version of this file also prevents building user space
applications using atomic.h on ppc64. That was already impossible
on 32 bit ppc, but probably also created broken output on ppc64.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
--
include/asm-ppc/atomic.h | 214 ------------------------------
include/asm-ppc64/atomic.h | 197 ---------------------------
include/asm-ppc64/memory.h | 59 --------
linux-2.6.12/include/asm-powerpc/atomic.h | 209 +++++++++++++++++++++++++++++
linux-2.6.12/include/asm-powerpc/memory.h | 59 ++++++++
linux-2.6.12/include/asm-ppc/io.h | 11 -
6 files changed, 269 insertions(+), 480 deletions(-)
Index: linux-2.6.12/include/asm-ppc/atomic.h
===================================================================
--- linux-2.6.12.orig/include/asm-ppc/atomic.h 2005-08-29 08:04:06.000000000 +0200
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,214 +0,0 @@
-/*
- * PowerPC atomic operations
- */
-
-#ifndef _ASM_PPC_ATOMIC_H_
-#define _ASM_PPC_ATOMIC_H_
-
-typedef struct { volatile int counter; } atomic_t;
-
-#ifdef __KERNEL__
-
-#define ATOMIC_INIT(i) { (i) }
-
-#define atomic_read(v) ((v)->counter)
-#define atomic_set(v,i) (((v)->counter) = (i))
-
-extern void atomic_clear_mask(unsigned long mask, unsigned long *addr);
-
-#ifdef CONFIG_SMP
-#define SMP_SYNC "sync"
-#define SMP_ISYNC "\n\tisync"
-#else
-#define SMP_SYNC ""
-#define SMP_ISYNC
-#endif
-
-/* Erratum #77 on the 405 means we need a sync or dcbt before every stwcx.
- * The old ATOMIC_SYNC_FIX covered some but not all of this.
- */
-#ifdef CONFIG_IBM405_ERR77
-#define PPC405_ERR77(ra,rb) "dcbt " #ra "," #rb ";"
-#else
-#define PPC405_ERR77(ra,rb)
-#endif
-
-static __inline__ void atomic_add(int a, atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%3 # atomic_add\n\
- add %0,%2,%0\n"
- PPC405_ERR77(0,%3)
-" stwcx. %0,0,%3 \n\
- bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (a), "r" (&v->counter), "m" (v->counter)
- : "cc");
-}
-
-static __inline__ int atomic_add_return(int a, atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%2 # atomic_add_return\n\
- add %0,%1,%0\n"
- PPC405_ERR77(0,%2)
-" stwcx. %0,0,%2 \n\
- bne- 1b"
- SMP_ISYNC
- : "=&r" (t)
- : "r" (a), "r" (&v->counter)
- : "cc", "memory");
-
- return t;
-}
-
-#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
-
-static __inline__ void atomic_sub(int a, atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%3 # atomic_sub\n\
- subf %0,%2,%0\n"
- PPC405_ERR77(0,%3)
-" stwcx. %0,0,%3 \n\
- bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (a), "r" (&v->counter), "m" (v->counter)
- : "cc");
-}
-
-static __inline__ int atomic_sub_return(int a, atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%2 # atomic_sub_return\n\
- subf %0,%1,%0\n"
- PPC405_ERR77(0,%2)
-" stwcx. %0,0,%2 \n\
- bne- 1b"
- SMP_ISYNC
- : "=&r" (t)
- : "r" (a), "r" (&v->counter)
- : "cc", "memory");
-
- return t;
-}
-
-static __inline__ void atomic_inc(atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%2 # atomic_inc\n\
- addic %0,%0,1\n"
- PPC405_ERR77(0,%2)
-" stwcx. %0,0,%2 \n\
- bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (&v->counter), "m" (v->counter)
- : "cc");
-}
-
-static __inline__ int atomic_inc_return(atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%1 # atomic_inc_return\n\
- addic %0,%0,1\n"
- PPC405_ERR77(0,%1)
-" stwcx. %0,0,%1 \n\
- bne- 1b"
- SMP_ISYNC
- : "=&r" (t)
- : "r" (&v->counter)
- : "cc", "memory");
-
- return t;
-}
-
-/*
- * atomic_inc_and_test - increment and test
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1
- * and returns true if the result is zero, or false for all
- * other cases.
- */
-#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
-
-static __inline__ void atomic_dec(atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%2 # atomic_dec\n\
- addic %0,%0,-1\n"
- PPC405_ERR77(0,%2)\
-" stwcx. %0,0,%2\n\
- bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (&v->counter), "m" (v->counter)
- : "cc");
-}
-
-static __inline__ int atomic_dec_return(atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%1 # atomic_dec_return\n\
- addic %0,%0,-1\n"
- PPC405_ERR77(0,%1)
-" stwcx. %0,0,%1\n\
- bne- 1b"
- SMP_ISYNC
- : "=&r" (t)
- : "r" (&v->counter)
- : "cc", "memory");
-
- return t;
-}
-
-#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0)
-#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0)
-
-/*
- * Atomically test *v and decrement if it is greater than 0.
- * The function returns the old value of *v minus 1.
- */
-static __inline__ int atomic_dec_if_positive(atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\
- addic. %0,%0,-1\n\
- blt- 2f\n"
- PPC405_ERR77(0,%1)
-" stwcx. %0,0,%1\n\
- bne- 1b"
- SMP_ISYNC
- "\n\
-2:" : "=&r" (t)
- : "r" (&v->counter)
- : "cc", "memory");
-
- return t;
-}
-
-#define __MB __asm__ __volatile__ (SMP_SYNC : : : "memory")
-#define smp_mb__before_atomic_dec() __MB
-#define smp_mb__after_atomic_dec() __MB
-#define smp_mb__before_atomic_inc() __MB
-#define smp_mb__after_atomic_inc() __MB
-
-#endif /* __KERNEL__ */
-#endif /* _ASM_PPC_ATOMIC_H_ */
Index: linux-2.6.12/include/asm-ppc64/memory.h
===================================================================
--- linux-2.6.12.orig/include/asm-ppc64/memory.h 2005-08-29 08:04:06.000000000 +0200
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,59 +0,0 @@
-#ifndef _ASM_POWERPC_MEMORY_H_
-#define _ASM_POWERPC_MEMORY_H_
-
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <linux/config.h>
-
-/*
- * Arguably the bitops and *xchg operations don't imply any memory barrier
- * or SMP ordering, but in fact a lot of drivers expect them to imply
- * both, since they do on x86 cpus.
- */
-#ifdef CONFIG_SMP
-#define EIEIO_ON_SMP "eieio\n"
-#define ISYNC_ON_SMP "\n\tisync"
-#else
-#define EIEIO_ON_SMP
-#define ISYNC_ON_SMP
-#endif
-
-static inline void eieio(void)
-{
- __asm__ __volatile__ ("eieio" : : : "memory");
-}
-
-static inline void isync(void)
-{
- __asm__ __volatile__ ("isync" : : : "memory");
-}
-
-#ifdef CONFIG_SMP
-#define eieio_on_smp() eieio()
-#define isync_on_smp() isync()
-#else
-#define eieio_on_smp() __asm__ __volatile__("": : :"memory")
-#define isync_on_smp() __asm__ __volatile__("": : :"memory")
-#endif
-
-/* Macros for adjusting thread priority (hardware multi-threading) */
-#define HMT_very_low() asm volatile("or 31,31,31 # very low priority")
-#define HMT_low() asm volatile("or 1,1,1 # low priority")
-#define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority")
-#define HMT_medium() asm volatile("or 2,2,2 # medium priority")
-#define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority")
-#define HMT_high() asm volatile("or 3,3,3 # high priority")
-
-#define HMT_VERY_LOW "\tor 31,31,31 # very low priority\n"
-#define HMT_LOW "\tor 1,1,1 # low priority\n"
-#define HMT_MEDIUM_LOW "\tor 6,6,6 # medium low priority\n"
-#define HMT_MEDIUM "\tor 2,2,2 # medium priority\n"
-#define HMT_MEDIUM_HIGH "\tor 5,5,5 # medium high priority\n"
-#define HMT_HIGH "\tor 3,3,3 # high priority\n"
-
-#endif
Index: linux-2.6.12/include/asm-ppc/io.h
===================================================================
--- linux-2.6.12.orig/include/asm-ppc/io.h 2005-08-29 08:04:06.000000000 +0200
+++ linux-2.6.12/include/asm-ppc/io.h 2005-08-29 08:04:26.000000000 +0200
@@ -8,6 +8,7 @@
#include <asm/page.h>
#include <asm/byteorder.h>
+#include <asm/memory.h>
#include <asm/mmu.h>
#define SIO_CONFIG_RA 0x398
@@ -440,16 +441,6 @@
#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
#define page_to_bus(page) (page_to_phys(page) + PCI_DRAM_OFFSET)
-/*
- * Enforce In-order Execution of I/O:
- * Acts as a barrier to ensure all previous I/O accesses have
- * completed before any further ones are issued.
- */
-extern inline void eieio(void)
-{
- __asm__ __volatile__ ("eieio" : : : "memory");
-}
-
/* Enforce in-order execution of data I/O.
* No distinction between read/write on PPC; use eieio for all three.
*/
Index: linux-2.6.12/include/asm-ppc64/atomic.h
===================================================================
--- linux-2.6.12.orig/include/asm-ppc64/atomic.h 2005-08-29 08:04:06.000000000 +0200
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,197 +0,0 @@
-/*
- * PowerPC64 atomic operations
- *
- * Copyright (C) 2001 Paul Mackerras <paulus@au.ibm.com>, IBM
- * Copyright (C) 2001 Anton Blanchard <anton@au.ibm.com>, IBM
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#ifndef _ASM_PPC64_ATOMIC_H_
-#define _ASM_PPC64_ATOMIC_H_
-
-#include <asm/memory.h>
-
-typedef struct { volatile int counter; } atomic_t;
-
-#define ATOMIC_INIT(i) { (i) }
-
-#define atomic_read(v) ((v)->counter)
-#define atomic_set(v,i) (((v)->counter) = (i))
-
-static __inline__ void atomic_add(int a, atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%3 # atomic_add\n\
- add %0,%2,%0\n\
- stwcx. %0,0,%3\n\
- bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (a), "r" (&v->counter), "m" (v->counter)
- : "cc");
-}
-
-static __inline__ int atomic_add_return(int a, atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
- EIEIO_ON_SMP
-"1: lwarx %0,0,%2 # atomic_add_return\n\
- add %0,%1,%0\n\
- stwcx. %0,0,%2\n\
- bne- 1b"
- ISYNC_ON_SMP
- : "=&r" (t)
- : "r" (a), "r" (&v->counter)
- : "cc", "memory");
-
- return t;
-}
-
-#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
-
-static __inline__ void atomic_sub(int a, atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%3 # atomic_sub\n\
- subf %0,%2,%0\n\
- stwcx. %0,0,%3\n\
- bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (a), "r" (&v->counter), "m" (v->counter)
- : "cc");
-}
-
-static __inline__ int atomic_sub_return(int a, atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
- EIEIO_ON_SMP
-"1: lwarx %0,0,%2 # atomic_sub_return\n\
- subf %0,%1,%0\n\
- stwcx. %0,0,%2\n\
- bne- 1b"
- ISYNC_ON_SMP
- : "=&r" (t)
- : "r" (a), "r" (&v->counter)
- : "cc", "memory");
-
- return t;
-}
-
-static __inline__ void atomic_inc(atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%2 # atomic_inc\n\
- addic %0,%0,1\n\
- stwcx. %0,0,%2\n\
- bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (&v->counter), "m" (v->counter)
- : "cc");
-}
-
-static __inline__ int atomic_inc_return(atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
- EIEIO_ON_SMP
-"1: lwarx %0,0,%1 # atomic_inc_return\n\
- addic %0,%0,1\n\
- stwcx. %0,0,%1\n\
- bne- 1b"
- ISYNC_ON_SMP
- : "=&r" (t)
- : "r" (&v->counter)
- : "cc", "memory");
-
- return t;
-}
-
-/*
- * atomic_inc_and_test - increment and test
- * @v: pointer of type atomic_t
- *
- * Atomically increments @v by 1
- * and returns true if the result is zero, or false for all
- * other cases.
- */
-#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
-
-static __inline__ void atomic_dec(atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
-"1: lwarx %0,0,%2 # atomic_dec\n\
- addic %0,%0,-1\n\
- stwcx. %0,0,%2\n\
- bne- 1b"
- : "=&r" (t), "=m" (v->counter)
- : "r" (&v->counter), "m" (v->counter)
- : "cc");
-}
-
-static __inline__ int atomic_dec_return(atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
- EIEIO_ON_SMP
-"1: lwarx %0,0,%1 # atomic_dec_return\n\
- addic %0,%0,-1\n\
- stwcx. %0,0,%1\n\
- bne- 1b"
- ISYNC_ON_SMP
- : "=&r" (t)
- : "r" (&v->counter)
- : "cc", "memory");
-
- return t;
-}
-
-#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0)
-#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0)
-
-/*
- * Atomically test *v and decrement if it is greater than 0.
- * The function returns the old value of *v minus 1.
- */
-static __inline__ int atomic_dec_if_positive(atomic_t *v)
-{
- int t;
-
- __asm__ __volatile__(
- EIEIO_ON_SMP
-"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\
- addic. %0,%0,-1\n\
- blt- 2f\n\
- stwcx. %0,0,%1\n\
- bne- 1b"
- ISYNC_ON_SMP
- "\n\
-2:" : "=&r" (t)
- : "r" (&v->counter)
- : "cc", "memory");
-
- return t;
-}
-
-#define smp_mb__before_atomic_dec() smp_mb()
-#define smp_mb__after_atomic_dec() smp_mb()
-#define smp_mb__before_atomic_inc() smp_mb()
-#define smp_mb__after_atomic_inc() smp_mb()
-
-#endif /* _ASM_PPC64_ATOMIC_H_ */
Index: linux-2.6.12/include/asm-powerpc/memory.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.12/include/asm-powerpc/memory.h 2005-08-29 08:04:26.000000000 +0200
@@ -0,0 +1,59 @@
+#ifndef _ASM_PPC64_MEMORY_H_
+#define _ASM_PPC64_MEMORY_H_
+
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/config.h>
+
+/*
+ * Arguably the bitops and *xchg operations don't imply any memory barrier
+ * or SMP ordering, but in fact a lot of drivers expect them to imply
+ * both, since they do on x86 cpus.
+ */
+#ifdef CONFIG_SMP
+#define EIEIO_ON_SMP "eieio\n"
+#define ISYNC_ON_SMP "\n\tisync"
+#else
+#define EIEIO_ON_SMP
+#define ISYNC_ON_SMP
+#endif
+
+static inline void eieio(void)
+{
+ __asm__ __volatile__ ("eieio" : : : "memory");
+}
+
+static inline void isync(void)
+{
+ __asm__ __volatile__ ("isync" : : : "memory");
+}
+
+#ifdef CONFIG_SMP
+#define eieio_on_smp() eieio()
+#define isync_on_smp() isync()
+#else
+#define eieio_on_smp() __asm__ __volatile__("": : :"memory")
+#define isync_on_smp() __asm__ __volatile__("": : :"memory")
+#endif
+
+/* Macros for adjusting thread priority (hardware multi-threading) */
+#define HMT_very_low() asm volatile("or 31,31,31 # very low priority")
+#define HMT_low() asm volatile("or 1,1,1 # low priority")
+#define HMT_medium_low() asm volatile("or 6,6,6 # medium low priority")
+#define HMT_medium() asm volatile("or 2,2,2 # medium priority")
+#define HMT_medium_high() asm volatile("or 5,5,5 # medium high priority")
+#define HMT_high() asm volatile("or 3,3,3 # high priority")
+
+#define HMT_VERY_LOW "\tor 31,31,31 # very low priority\n"
+#define HMT_LOW "\tor 1,1,1 # low priority\n"
+#define HMT_MEDIUM_LOW "\tor 6,6,6 # medium low priority\n"
+#define HMT_MEDIUM "\tor 2,2,2 # medium priority\n"
+#define HMT_MEDIUM_HIGH "\tor 5,5,5 # medium high priority\n"
+#define HMT_HIGH "\tor 3,3,3 # high priority\n"
+
+#endif
Index: linux-2.6.12/include/asm-powerpc/atomic.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.12/include/asm-powerpc/atomic.h 2005-08-29 08:04:26.000000000 +0200
@@ -0,0 +1,209 @@
+/*
+ * PowerPC atomic operations
+ */
+
+#ifndef _ASM_POWERPC_ATOMIC_H_
+#define _ASM_POWERPC_ATOMIC_H_
+
+typedef struct { volatile int counter; } atomic_t;
+
+#ifdef __KERNEL__
+#include <asm/memory.h>
+
+#define ATOMIC_INIT(i) { (i) }
+
+#define atomic_read(v) ((v)->counter)
+#define atomic_set(v,i) (((v)->counter) = (i))
+
+/* Erratum #77 on the 405 means we need a sync or dcbt before every stwcx.
+ * The old ATOMIC_SYNC_FIX covered some but not all of this.
+ */
+#ifdef CONFIG_IBM405_ERR77
+#define PPC405_ERR77(ra,rb) "dcbt " #ra "," #rb ";"
+#else
+#define PPC405_ERR77(ra,rb)
+#endif
+
+static __inline__ void atomic_add(int a, atomic_t *v)
+{
+ int t;
+
+ __asm__ __volatile__(
+"1: lwarx %0,0,%3 # atomic_add\n\
+ add %0,%2,%0\n"
+ PPC405_ERR77(0,%3)
+" stwcx. %0,0,%3 \n\
+ bne- 1b"
+ : "=&r" (t), "=m" (v->counter)
+ : "r" (a), "r" (&v->counter), "m" (v->counter)
+ : "cc");
+}
+
+static __inline__ int atomic_add_return(int a, atomic_t *v)
+{
+ int t;
+
+ __asm__ __volatile__(
+ EIEIO_ON_SMP
+"1: lwarx %0,0,%2 # atomic_add_return\n\
+ add %0,%1,%0\n"
+ PPC405_ERR77(0,%2)
+" stwcx. %0,0,%2 \n\
+ bne- 1b"
+ ISYNC_ON_SMP
+ : "=&r" (t)
+ : "r" (a), "r" (&v->counter)
+ : "cc", "memory");
+
+ return t;
+}
+
+#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
+
+static __inline__ void atomic_sub(int a, atomic_t *v)
+{
+ int t;
+
+ __asm__ __volatile__(
+"1: lwarx %0,0,%3 # atomic_sub\n\
+ subf %0,%2,%0\n"
+ PPC405_ERR77(0,%3)
+" stwcx. %0,0,%3 \n\
+ bne- 1b"
+ : "=&r" (t), "=m" (v->counter)
+ : "r" (a), "r" (&v->counter), "m" (v->counter)
+ : "cc");
+}
+
+static __inline__ int atomic_sub_return(int a, atomic_t *v)
+{
+ int t;
+
+ __asm__ __volatile__(
+ EIEIO_ON_SMP
+"1: lwarx %0,0,%2 # atomic_sub_return\n\
+ subf %0,%1,%0\n"
+ PPC405_ERR77(0,%2)
+" stwcx. %0,0,%2 \n\
+ bne- 1b"
+ ISYNC_ON_SMP
+ : "=&r" (t)
+ : "r" (a), "r" (&v->counter)
+ : "cc", "memory");
+
+ return t;
+}
+
+static __inline__ void atomic_inc(atomic_t *v)
+{
+ int t;
+
+ __asm__ __volatile__(
+"1: lwarx %0,0,%2 # atomic_inc\n\
+ addic %0,%0,1\n"
+ PPC405_ERR77(0,%2)
+" stwcx. %0,0,%2 \n\
+ bne- 1b"
+ : "=&r" (t), "=m" (v->counter)
+ : "r" (&v->counter), "m" (v->counter)
+ : "cc");
+}
+
+static __inline__ int atomic_inc_return(atomic_t *v)
+{
+ int t;
+
+ __asm__ __volatile__(
+ EIEIO_ON_SMP
+"1: lwarx %0,0,%1 # atomic_inc_return\n\
+ addic %0,%0,1\n"
+ PPC405_ERR77(0,%1)
+" stwcx. %0,0,%1 \n\
+ bne- 1b"
+ ISYNC_ON_SMP
+ : "=&r" (t)
+ : "r" (&v->counter)
+ : "cc", "memory");
+
+ return t;
+}
+
+/*
+ * atomic_inc_and_test - increment and test
+ * @v: pointer of type atomic_t
+ *
+ * Atomically increments @v by 1
+ * and returns true if the result is zero, or false for all
+ * other cases.
+ */
+#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
+
+static __inline__ void atomic_dec(atomic_t *v)
+{
+ int t;
+
+ __asm__ __volatile__(
+"1: lwarx %0,0,%2 # atomic_dec\n\
+ addic %0,%0,-1\n"
+ PPC405_ERR77(0,%2)\
+" stwcx. %0,0,%2\n\
+ bne- 1b"
+ : "=&r" (t), "=m" (v->counter)
+ : "r" (&v->counter), "m" (v->counter)
+ : "cc");
+}
+
+static __inline__ int atomic_dec_return(atomic_t *v)
+{
+ int t;
+
+ __asm__ __volatile__(
+ EIEIO_ON_SMP
+"1: lwarx %0,0,%1 # atomic_dec_return\n\
+ addic %0,%0,-1\n"
+ PPC405_ERR77(0,%1)
+" stwcx. %0,0,%1\n\
+ bne- 1b"
+ ISYNC_ON_SMP
+ : "=&r" (t)
+ : "r" (&v->counter)
+ : "cc", "memory");
+
+ return t;
+}
+
+#define atomic_sub_and_test(a, v) (atomic_sub_return((a), (v)) == 0)
+#define atomic_dec_and_test(v) (atomic_dec_return((v)) == 0)
+
+/*
+ * Atomically test *v and decrement if it is greater than 0.
+ * The function returns the old value of *v minus 1.
+ */
+static __inline__ int atomic_dec_if_positive(atomic_t *v)
+{
+ int t;
+
+ __asm__ __volatile__(
+ EIEIO_ON_SMP
+"1: lwarx %0,0,%1 # atomic_dec_if_positive\n\
+ addic. %0,%0,-1\n\
+ blt- 2f\n"
+ PPC405_ERR77(0,%1)
+" stwcx. %0,0,%1\n\
+ bne- 1b"
+ ISYNC_ON_SMP
+ "\n\
+2:" : "=&r" (t)
+ : "r" (&v->counter)
+ : "cc", "memory");
+
+ return t;
+}
+
+#define smp_mb__before_atomic_dec() smp_mb()
+#define smp_mb__after_atomic_dec() smp_mb()
+#define smp_mb__before_atomic_inc() smp_mb()
+#define smp_mb__after_atomic_inc() smp_mb()
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_POWERPC_ATOMIC_H_ */
^ permalink raw reply
* Re: PATCH powerpc Merge atomic.h
From: Jon Loeliger @ 2005-09-19 20:52 UTC (permalink / raw)
Cc: linuxppc-dev, linuxppc64-dev
In-Reply-To: <E1EHSGk-0005RA-Dh@jdl.com>
So, like, the other day Jon Loeliger mumbled:
> Paul,
>
> There is also Arnd's patch called "[PATCH 0/3] Start the merge"
> from 08/29 that is really the merger of asm-ppc*/atomic.h.
>
> I repost it here for Arnd, who can NAK it or not.
<talk-like-a-pirate-day>
Arrrg! Scurvey dogs! Ye cannt even squeek by repostin' old
patches today. Run it out the gang-plank and flush the rotten thing!
Someone needs a floggin' til this applies properly. Memory.h be damned.
You'll be needin' two-patches iffin you don't watcherself.
</talk-like-a-pirate-day>
jdl
^ permalink raw reply
* [PATCH] powerpc Merge bug.h
From: Becky Bruce @ 2005-09-19 22:01 UTC (permalink / raw)
To: linuxppc64-dev, linuxppc-dev
Resending per Paul's request.....
ppc32/ppc64: Merge bug.h into include/asm-powerpc
This patch merges bug.h into include/asm-powerpc. Changed the data
structure for bug_entry such that line is always an int on both 32 and
64-bit platforms; removed casts to int from the 64-bit trap code to
reflect this.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Becky Bruce <Becky.Bruce@freescale.com>
---
commit fcaf8560dc918048b43867d79efa5b26bd6a9a81
tree 079802fdb229c0e3721b893235e2ef912e30d7cd
parent dfe2ac4994952cadc891f095668f9e582d4402b3
author Becky Bruce <becky.bruce@freescale.com> Fri, 09 Sep 2005 11:15:22 -0500
committer Becky Bruce <becky.bruce@freescale.com> Fri, 09 Sep 2005 11:15:22 -0500
arch/ppc/kernel/traps.c | 2 +
arch/ppc64/kernel/traps.c | 4 +-
include/asm-powerpc/bug.h | 81 +++++++++++++++++++++++++++++++++++++++++++++
include/asm-ppc/bug.h | 58 --------------------------------
include/asm-ppc64/bug.h | 69 --------------------------------------
5 files changed, 84 insertions(+), 130 deletions(-)
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -553,7 +553,7 @@ extern struct bug_entry __start___bug_ta
#define module_find_bug(x) NULL
#endif
-static struct bug_entry *find_bug(unsigned long bugaddr)
+struct bug_entry *find_bug(unsigned long bugaddr)
{
struct bug_entry *bug;
diff --git a/arch/ppc64/kernel/traps.c b/arch/ppc64/kernel/traps.c
--- a/arch/ppc64/kernel/traps.c
+++ b/arch/ppc64/kernel/traps.c
@@ -389,12 +389,12 @@ check_bug_trap(struct pt_regs *regs)
/* this is a WARN_ON rather than BUG/BUG_ON */
printk(KERN_ERR "Badness in %s at %s:%d\n",
bug->function, bug->file,
- (unsigned int)bug->line & ~BUG_WARNING_TRAP);
+ bug->line & ~BUG_WARNING_TRAP);
show_stack(current, (void *)regs->gpr[1]);
return 1;
}
printk(KERN_CRIT "kernel BUG in %s at %s:%d!\n",
- bug->function, bug->file, (unsigned int)bug->line);
+ bug->function, bug->file, bug->line);
return 0;
}
diff --git a/include/asm-powerpc/bug.h b/include/asm-powerpc/bug.h
new file mode 100644
--- /dev/null
+++ b/include/asm-powerpc/bug.h
@@ -0,0 +1,81 @@
+#ifndef _ASM_POWERPC_BUG_H
+#define _ASM_POWERPC_BUG_H
+
+/*
+ * Define an illegal instr to trap on the bug.
+ * We don't use 0 because that marks the end of a function
+ * in the ELF ABI. That's "Boo Boo" in case you wonder...
+ */
+#define BUG_OPCODE .long 0x00b00b00 /* For asm */
+#define BUG_ILLEGAL_INSTR "0x00b00b00" /* For BUG macro */
+
+#ifndef __ASSEMBLY__
+
+#ifdef __powerpc64__
+#define BUG_TABLE_ENTRY(label, line, file, func) \
+ ".llong " #label "\n .long " #line "\n .llong " #file ", " #func "\n"
+#define TRAP_OP(ra, rb) "1: tdnei " #ra ", " #rb "\n"
+#define DATA_TYPE long long
+#else
+#define BUG_TABLE_ENTRY(label, line, file, func) \
+ ".long " #label ", " #line ", " #file ", " #func "\n"
+#define TRAP_OP(ra, rb) "1: twnei " #ra ", " #rb "\n"
+#define DATA_TYPE int
+#endif /* __powerpc64__ */
+
+struct bug_entry {
+ unsigned long bug_addr;
+ int line;
+ const char *file;
+ const char *function;
+};
+
+struct bug_entry *find_bug(unsigned long bugaddr);
+
+/*
+ * If this bit is set in the line number it means that the trap
+ * is for WARN_ON rather than BUG or BUG_ON.
+ */
+#define BUG_WARNING_TRAP 0x1000000
+
+#ifdef CONFIG_BUG
+
+#define BUG() do { \
+ __asm__ __volatile__( \
+ "1: twi 31,0,0\n" \
+ ".section __bug_table,\"a\"\n\t" \
+ BUG_TABLE_ENTRY(1b,%0,%1,%2) \
+ ".previous" \
+ : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
+} while (0)
+
+#define BUG_ON(x) do { \
+ __asm__ __volatile__( \
+ TRAP_OP(%0,0) \
+ ".section __bug_table,\"a\"\n\t" \
+ BUG_TABLE_ENTRY(1b,%1,%2,%3) \
+ ".previous" \
+ : : "r" ((DATA_TYPE)(x)), "i" (__LINE__), \
+ "i" (__FILE__), "i" (__FUNCTION__)); \
+} while (0)
+
+#define WARN_ON(x) do { \
+ __asm__ __volatile__( \
+ TRAP_OP(%0,0) \
+ ".section __bug_table,\"a\"\n\t" \
+ BUG_TABLE_ENTRY(1b,%1,%2,%3) \
+ ".previous" \
+ : : "r" ((DATA_TYPE)(x)), \
+ "i" (__LINE__ + BUG_WARNING_TRAP), \
+ "i" (__FILE__), "i" (__FUNCTION__)); \
+} while (0)
+
+#define HAVE_ARCH_BUG
+#define HAVE_ARCH_BUG_ON
+#define HAVE_ARCH_WARN_ON
+#endif /* CONFIG_BUG */
+#endif /* __ASSEMBLY __ */
+
+#include <asm-generic/bug.h>
+
+#endif /* _ASM_POWERPC_BUG_H */
diff --git a/include/asm-ppc/bug.h b/include/asm-ppc/bug.h
deleted file mode 100644
--- a/include/asm-ppc/bug.h
+++ /dev/null
@@ -1,58 +0,0 @@
-#ifndef _PPC_BUG_H
-#define _PPC_BUG_H
-
-struct bug_entry {
- unsigned long bug_addr;
- int line;
- const char *file;
- const char *function;
-};
-
-/*
- * If this bit is set in the line number it means that the trap
- * is for WARN_ON rather than BUG or BUG_ON.
- */
-#define BUG_WARNING_TRAP 0x1000000
-
-#ifdef CONFIG_BUG
-#define BUG() do { \
- __asm__ __volatile__( \
- "1: twi 31,0,0\n" \
- ".section __bug_table,\"a\"\n\t" \
- " .long 1b,%0,%1,%2\n" \
- ".previous" \
- : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
-} while (0)
-
-#define BUG_ON(x) do { \
- if (!__builtin_constant_p(x) || (x)) { \
- __asm__ __volatile__( \
- "1: twnei %0,0\n" \
- ".section __bug_table,\"a\"\n\t" \
- " .long 1b,%1,%2,%3\n" \
- ".previous" \
- : : "r" (x), "i" (__LINE__), "i" (__FILE__), \
- "i" (__FUNCTION__)); \
- } \
-} while (0)
-
-#define WARN_ON(x) do { \
- if (!__builtin_constant_p(x) || (x)) { \
- __asm__ __volatile__( \
- "1: twnei %0,0\n" \
- ".section __bug_table,\"a\"\n\t" \
- " .long 1b,%1,%2,%3\n" \
- ".previous" \
- : : "r" (x), "i" (__LINE__ + BUG_WARNING_TRAP), \
- "i" (__FILE__), "i" (__FUNCTION__)); \
- } \
-} while (0)
-
-#define HAVE_ARCH_BUG
-#define HAVE_ARCH_BUG_ON
-#define HAVE_ARCH_WARN_ON
-#endif
-
-#include <asm-generic/bug.h>
-
-#endif
diff --git a/include/asm-ppc64/bug.h b/include/asm-ppc64/bug.h
deleted file mode 100644
--- a/include/asm-ppc64/bug.h
+++ /dev/null
@@ -1,69 +0,0 @@
-#ifndef _PPC64_BUG_H
-#define _PPC64_BUG_H
-
-/*
- * Define an illegal instr to trap on the bug.
- * We don't use 0 because that marks the end of a function
- * in the ELF ABI. That's "Boo Boo" in case you wonder...
- */
-#define BUG_OPCODE .long 0x00b00b00 /* For asm */
-#define BUG_ILLEGAL_INSTR "0x00b00b00" /* For BUG macro */
-
-#ifndef __ASSEMBLY__
-
-struct bug_entry {
- unsigned long bug_addr;
- long line;
- const char *file;
- const char *function;
-};
-
-struct bug_entry *find_bug(unsigned long bugaddr);
-
-/*
- * If this bit is set in the line number it means that the trap
- * is for WARN_ON rather than BUG or BUG_ON.
- */
-#define BUG_WARNING_TRAP 0x1000000
-
-#ifdef CONFIG_BUG
-
-#define BUG() do { \
- __asm__ __volatile__( \
- "1: twi 31,0,0\n" \
- ".section __bug_table,\"a\"\n\t" \
- " .llong 1b,%0,%1,%2\n" \
- ".previous" \
- : : "i" (__LINE__), "i" (__FILE__), "i" (__FUNCTION__)); \
-} while (0)
-
-#define BUG_ON(x) do { \
- __asm__ __volatile__( \
- "1: tdnei %0,0\n" \
- ".section __bug_table,\"a\"\n\t" \
- " .llong 1b,%1,%2,%3\n" \
- ".previous" \
- : : "r" ((long long)(x)), "i" (__LINE__), \
- "i" (__FILE__), "i" (__FUNCTION__)); \
-} while (0)
-
-#define WARN_ON(x) do { \
- __asm__ __volatile__( \
- "1: tdnei %0,0\n" \
- ".section __bug_table,\"a\"\n\t" \
- " .llong 1b,%1,%2,%3\n" \
- ".previous" \
- : : "r" ((long long)(x)), \
- "i" (__LINE__ + BUG_WARNING_TRAP), \
- "i" (__FILE__), "i" (__FUNCTION__)); \
-} while (0)
-
-#define HAVE_ARCH_BUG
-#define HAVE_ARCH_BUG_ON
-#define HAVE_ARCH_WARN_ON
-#endif
-#endif
-
-#include <asm-generic/bug.h>
-
-#endif
^ permalink raw reply
* Add Pantelis' OF Flat Dev Tree bits?
From: Jon Loeliger @ 2005-09-19 22:31 UTC (permalink / raw)
To: linuxppc-dev, linuxppc64-dev
Avast, Cap'n Paul!
Did ye wan ta add Pantelis Antoniou's patch ta
support OF Flat Dev Tree to the powerpc-merge tree?
His patch be dated Sep-03, but I don't think I'll
be directly repostin' that booty here.
jdl
^ permalink raw reply
* [PATCH] powerpc: Merge elf.h
From: Becky Bruce @ 2005-09-20 0:17 UTC (permalink / raw)
To: linuxppc64-dev, linuxppc-dev
ppc/ppc64: Merge elf.h into include/asm-powerpc
Merge elf.h into a single include file for 32 and 64-bit ppc platforms. This
patch has been tested on 32-bit and built on 64-bit platforms.
Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
Signed-off-by: Becky Bruce <Becky.Bruce@freescale.com>
---
commit 4377f15fe916f0ef45e5204537be7efa2c6d1872
tree 144f0009ea0246044f1a36693512cc358fc01058
parent a374ad4968cd7b4b45443328b608b459add77a2e
author Becky Bruce <becky.bruce@freescale.com> Mon, 19 Sep 2005 19:13:34 -0500
committer Becky Bruce <becky.bruce@freescale.com> Mon, 19 Sep 2005 19:13:34 -0500
include/asm-powerpc/elf.h | 414 +++++++++++++++++++++++++++++++++++++++++++++
include/asm-ppc/elf.h | 151 ----------------
include/asm-ppc64/elf.h | 387 ------------------------------------------
3 files changed, 414 insertions(+), 538 deletions(-)
diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
new file mode 100644
--- /dev/null
+++ b/include/asm-powerpc/elf.h
@@ -0,0 +1,414 @@
+#ifndef _ASM_POWERPC_ELF_H
+#define _ASM_POWERPC_ELF_H
+
+#include <asm/types.h>
+#include <asm/ptrace.h>
+#include <asm/cputable.h>
+#include <asm/auxvec.h>
+
+/* PowerPC relocations defined by the ABIs */
+#define R_PPC_NONE 0
+#define R_PPC_ADDR32 1 /* 32bit absolute address */
+#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
+#define R_PPC_ADDR16 3 /* 16bit absolute address */
+#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
+#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
+#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
+#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
+#define R_PPC_ADDR14_BRTAKEN 8
+#define R_PPC_ADDR14_BRNTAKEN 9
+#define R_PPC_REL24 10 /* PC relative 26 bit */
+#define R_PPC_REL14 11 /* PC relative 16 bit */
+#define R_PPC_REL14_BRTAKEN 12
+#define R_PPC_REL14_BRNTAKEN 13
+#define R_PPC_GOT16 14
+#define R_PPC_GOT16_LO 15
+#define R_PPC_GOT16_HI 16
+#define R_PPC_GOT16_HA 17
+#define R_PPC_PLTREL24 18
+#define R_PPC_COPY 19
+#define R_PPC_GLOB_DAT 20
+#define R_PPC_JMP_SLOT 21
+#define R_PPC_RELATIVE 22
+#define R_PPC_LOCAL24PC 23
+#define R_PPC_UADDR32 24
+#define R_PPC_UADDR16 25
+#define R_PPC_REL32 26
+#define R_PPC_PLT32 27
+#define R_PPC_PLTREL32 28
+#define R_PPC_PLT16_LO 29
+#define R_PPC_PLT16_HI 30
+#define R_PPC_PLT16_HA 31
+#define R_PPC_SDAREL16 32
+#define R_PPC_SECTOFF 33
+#define R_PPC_SECTOFF_LO 34
+#define R_PPC_SECTOFF_HI 35
+#define R_PPC_SECTOFF_HA 36
+
+/* PowerPC relocations defined for the TLS access ABI. */
+#define R_PPC_TLS 67 /* none (sym+add)@tls */
+#define R_PPC_DTPMOD32 68 /* word32 (sym+add)@dtpmod */
+#define R_PPC_TPREL16 69 /* half16* (sym+add)@tprel */
+#define R_PPC_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
+#define R_PPC_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
+#define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
+#define R_PPC_TPREL32 73 /* word32 (sym+add)@tprel */
+#define R_PPC_DTPREL16 74 /* half16* (sym+add)@dtprel */
+#define R_PPC_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
+#define R_PPC_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
+#define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
+#define R_PPC_DTPREL32 78 /* word32 (sym+add)@dtprel */
+#define R_PPC_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
+#define R_PPC_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
+#define R_PPC_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
+#define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
+#define R_PPC_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
+#define R_PPC_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
+#define R_PPC_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
+#define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
+#define R_PPC_GOT_TPREL16 87 /* half16* (sym+add)@got@tprel */
+#define R_PPC_GOT_TPREL16_LO 88 /* half16 (sym+add)@got@tprel@l */
+#define R_PPC_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
+#define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
+#define R_PPC_GOT_DTPREL16 91 /* half16* (sym+add)@got@dtprel */
+#define R_PPC_GOT_DTPREL16_LO 92 /* half16* (sym+add)@got@dtprel@l */
+#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */
+#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */
+
+/* keep this the last entry. */
+#define R_PPC_NUM 95
+
+/*
+ * ELF register definitions..
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <asm/ptrace.h>
+
+#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
+#define ELF_NFPREG 33 /* includes fpscr */
+
+typedef unsigned long elf_greg_t64;
+typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
+
+typedef unsigned int elf_greg_t32;
+typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
+
+/*
+ * ELF_ARCH, CLASS, and DATA are used to set parameters in the core dumps.
+ */
+#ifdef __powerpc64__
+# define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */
+# define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
+# define ELF_GREG_TYPE elf_greg_t64
+#else
+# define ELF_NEVRREG 34 /* includes acc (as 2) */
+# define ELF_NVRREG 33 /* includes vscr */
+# define ELF_GREG_TYPE elf_greg_t32
+# define ELF_ARCH EM_PPC
+# define ELF_CLASS ELFCLASS32
+# define ELF_DATA ELFDATA2MSB
+#endif /* __powerpc64__ */
+
+#ifndef ELF_ARCH
+# define ELF_ARCH EM_PPC64
+# define ELF_CLASS ELFCLASS64
+# define ELF_DATA ELFDATA2MSB
+ typedef elf_greg_t64 elf_greg_t;
+ typedef elf_gregset_t64 elf_gregset_t;
+# define elf_addr_t unsigned long
+#else
+ /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
+ typedef elf_greg_t32 elf_greg_t;
+ typedef elf_gregset_t32 elf_gregset_t;
+# define elf_addr_t u32
+#endif /* ELF_ARCH */
+
+/* Floating point registers */
+typedef double elf_fpreg_t;
+typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
+
+/* Altivec registers */
+/*
+ * The entries with indexes 0-31 contain the corresponding vector registers.
+ * The entry with index 32 contains the vscr as the last word (offset 12)
+ * within the quadword. This allows the vscr to be stored as either a
+ * quadword (since it must be copied via a vector register to/from storage)
+ * or as a word.
+ *
+ * 64-bit kernel notes: The entry at index 33 contains the vrsave as the first
+ * word (offset 0) within the quadword.
+ *
+ * This definition of the VMX state is compatible with the current PPC32
+ * ptrace interface. This allows signal handling and ptrace to use the same
+ * structures. This also simplifies the implementation of a bi-arch
+ * (combined (32- and 64-bit) gdb.
+ *
+ * Note that it's _not_ compatible with 32 bits ucontext which stuffs the
+ * vrsave along with vscr and so only uses 33 vectors for the register set
+ */
+typedef __vector128 elf_vrreg_t;
+typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
+#ifdef __powerpc64__
+typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
+#endif
+
+/*
+ * This is used to ensure we don't load something for the wrong architecture.
+ */
+#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
+
+#define USE_ELF_CORE_DUMP
+#define ELF_EXEC_PAGESIZE 4096
+
+/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
+ use of this is to invoke "./ld.so someprog" to test out a new version of
+ the loader. We need to make sure that it is out of the way of the program
+ that it will "exec", and that there is sufficient room for the brk. */
+
+#define ELF_ET_DYN_BASE (0x08000000)
+
+#ifdef __KERNEL__
+
+/* Common routine for both 32-bit and 64-bit processes */
+static inline void ppc_elf_core_copy_regs(elf_gregset_t elf_regs,
+ struct pt_regs *regs)
+{
+ int i;
+ int gprs = sizeof(struct pt_regs)/sizeof(ELF_GREG_TYPE);
+
+ if (gprs > ELF_NGREG)
+ gprs = ELF_NGREG;
+
+ for (i=0; i < gprs; i++)
+ elf_regs[i] = (elf_greg_t)((ELF_GREG_TYPE *)regs)[i];
+
+ memset((char *)(elf_regs) + sizeof(struct pt_regs), 0, \
+ sizeof(elf_gregset_t) - sizeof(struct pt_regs));
+
+}
+#define ELF_CORE_COPY_REGS(gregs, regs) ppc_elf_core_copy_regs(gregs, regs);
+
+static inline int dump_task_regs(struct task_struct *tsk,
+ elf_gregset_t *elf_regs)
+{
+ struct pt_regs *regs = tsk->thread.regs;
+ if (regs)
+ ppc_elf_core_copy_regs(*elf_regs, regs);
+
+ return 1;
+}
+#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
+
+extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
+#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
+
+#endif /* __KERNEL__ */
+
+/* ELF_HWCAP yields a mask that user programs can use to figure out what
+ instruction set this cpu supports. This could be done in userspace,
+ but it's not easy, and we've already done it here. */
+#ifdef __powerpc64__
+# define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
+# define ELF_PLAT_INIT(_r, load_addr) do { \
+ memset(_r->gpr, 0, sizeof(_r->gpr)); \
+ _r->ctr = _r->link = _r->xer = _r->ccr = 0; \
+ _r->gpr[2] = load_addr; \
+} while (0)
+#else
+# define ELF_HWCAP (cur_cpu_spec[0]->cpu_user_features)
+#endif /* __powerpc64__ */
+
+/* This yields a string that ld.so will use to load implementation
+ specific libraries for optimization. This is more specific in
+ intent than poking at uname or /proc/cpuinfo.
+
+ For the moment, we have only optimizations for the Intel generations,
+ but that could change... */
+
+#define ELF_PLATFORM (NULL)
+
+#ifdef __KERNEL__
+
+#ifdef __powerpc64__
+# define SET_PERSONALITY(ex, ibcs2) \
+do { \
+ unsigned long new_flags = 0; \
+ if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
+ new_flags = _TIF_32BIT; \
+ if ((current_thread_info()->flags & _TIF_32BIT) \
+ != new_flags) \
+ set_thread_flag(TIF_ABI_PENDING); \
+ else \
+ clear_thread_flag(TIF_ABI_PENDING); \
+ if (personality(current->personality) != PER_LINUX32) \
+ set_personality(PER_LINUX); \
+} while (0)
+/*
+ * An executable for which elf_read_implies_exec() returns TRUE will
+ * have the READ_IMPLIES_EXEC personality flag set automatically. This
+ * is only required to work around bugs in old 32bit toolchains. Since
+ * the 64bit ABI has never had these issues dont enable the workaround
+ * even if we have an executable stack.
+ */
+# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
+ (exec_stk != EXSTACK_DISABLE_X) : 0)
+#else
+# define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
+#endif /* __powerpc64__ */
+
+#endif /* __KERNEL__ */
+
+extern int dcache_bsize;
+extern int icache_bsize;
+extern int ucache_bsize;
+
+#ifdef __powerpc64__
+struct linux_binprm;
+#define ARCH_HAS_SETUP_ADDITIONAL_PAGES /* vDSO has arch_setup_additional_pages */
+extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack);
+#define VDSO_AUX_ENT(a,b) NEW_AUX_ENT(a,b);
+#else
+#define VDSO_AUX_ENT(a,b)
+#endif /* __powerpc64__ */
+
+/*
+ * The requirements here are:
+ * - keep the final alignment of sp (sp & 0xf)
+ * - make sure the 32-bit value at the first 16 byte aligned position of
+ * AUXV is greater than 16 for glibc compatibility.
+ * AT_IGNOREPPC is used for that.
+ * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
+ * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
+ */
+#define ARCH_DLINFO \
+do { \
+ /* Handle glibc compatibility. */ \
+ NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
+ NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
+ /* Cache size items */ \
+ NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
+ NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
+ NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
+ VDSO_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base) \
+} while (0)
+
+/* PowerPC64 relocations defined by the ABIs */
+#define R_PPC64_NONE R_PPC_NONE
+#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address. */
+#define R_PPC64_ADDR24 R_PPC_ADDR24 /* 26bit address, word aligned. */
+#define R_PPC64_ADDR16 R_PPC_ADDR16 /* 16bit absolute address. */
+#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address. */
+#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */
+#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits. */
+#define R_PPC64_ADDR14 R_PPC_ADDR14 /* 16bit address, word aligned. */
+#define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN
+#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN
+#define R_PPC64_REL24 R_PPC_REL24 /* PC relative 26 bit, word aligned. */
+#define R_PPC64_REL14 R_PPC_REL14 /* PC relative 16 bit. */
+#define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN
+#define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN
+#define R_PPC64_GOT16 R_PPC_GOT16
+#define R_PPC64_GOT16_LO R_PPC_GOT16_LO
+#define R_PPC64_GOT16_HI R_PPC_GOT16_HI
+#define R_PPC64_GOT16_HA R_PPC_GOT16_HA
+
+#define R_PPC64_COPY R_PPC_COPY
+#define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT
+#define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT
+#define R_PPC64_RELATIVE R_PPC_RELATIVE
+
+#define R_PPC64_UADDR32 R_PPC_UADDR32
+#define R_PPC64_UADDR16 R_PPC_UADDR16
+#define R_PPC64_REL32 R_PPC_REL32
+#define R_PPC64_PLT32 R_PPC_PLT32
+#define R_PPC64_PLTREL32 R_PPC_PLTREL32
+#define R_PPC64_PLT16_LO R_PPC_PLT16_LO
+#define R_PPC64_PLT16_HI R_PPC_PLT16_HI
+#define R_PPC64_PLT16_HA R_PPC_PLT16_HA
+
+#define R_PPC64_SECTOFF R_PPC_SECTOFF
+#define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO
+#define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI
+#define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA
+#define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2. */
+#define R_PPC64_ADDR64 38 /* doubleword64 S + A. */
+#define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A). */
+#define R_PPC64_ADDR16_HIGHERA 40 /* half16 #highera(S + A). */
+#define R_PPC64_ADDR16_HIGHEST 41 /* half16 #highest(S + A). */
+#define R_PPC64_ADDR16_HIGHESTA 42 /* half16 #highesta(S + A). */
+#define R_PPC64_UADDR64 43 /* doubleword64 S + A. */
+#define R_PPC64_REL64 44 /* doubleword64 S + A - P. */
+#define R_PPC64_PLT64 45 /* doubleword64 L + A. */
+#define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P. */
+#define R_PPC64_TOC16 47 /* half16* S + A - .TOC. */
+#define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.). */
+#define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.). */
+#define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.). */
+#define R_PPC64_TOC 51 /* doubleword64 .TOC. */
+#define R_PPC64_PLTGOT16 52 /* half16* M + A. */
+#define R_PPC64_PLTGOT16_LO 53 /* half16 #lo(M + A). */
+#define R_PPC64_PLTGOT16_HI 54 /* half16 #hi(M + A). */
+#define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A). */
+
+#define R_PPC64_ADDR16_DS 56 /* half16ds* (S + A) >> 2. */
+#define R_PPC64_ADDR16_LO_DS 57 /* half16ds #lo(S + A) >> 2. */
+#define R_PPC64_GOT16_DS 58 /* half16ds* (G + A) >> 2. */
+#define R_PPC64_GOT16_LO_DS 59 /* half16ds #lo(G + A) >> 2. */
+#define R_PPC64_PLT16_LO_DS 60 /* half16ds #lo(L + A) >> 2. */
+#define R_PPC64_SECTOFF_DS 61 /* half16ds* (R + A) >> 2. */
+#define R_PPC64_SECTOFF_LO_DS 62 /* half16ds #lo(R + A) >> 2. */
+#define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2. */
+#define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2. */
+#define R_PPC64_PLTGOT16_DS 65 /* half16ds* (M + A) >> 2. */
+#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds #lo(M + A) >> 2. */
+
+/* PowerPC64 relocations defined for the TLS access ABI. */
+#define R_PPC64_TLS 67 /* none (sym+add)@tls */
+#define R_PPC64_DTPMOD64 68 /* doubleword64 (sym+add)@dtpmod */
+#define R_PPC64_TPREL16 69 /* half16* (sym+add)@tprel */
+#define R_PPC64_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
+#define R_PPC64_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
+#define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
+#define R_PPC64_TPREL64 73 /* doubleword64 (sym+add)@tprel */
+#define R_PPC64_DTPREL16 74 /* half16* (sym+add)@dtprel */
+#define R_PPC64_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
+#define R_PPC64_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
+#define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
+#define R_PPC64_DTPREL64 78 /* doubleword64 (sym+add)@dtprel */
+#define R_PPC64_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
+#define R_PPC64_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
+#define R_PPC64_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
+#define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
+#define R_PPC64_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
+#define R_PPC64_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
+#define R_PPC64_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
+#define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
+#define R_PPC64_GOT_TPREL16_DS 87 /* half16ds* (sym+add)@got@tprel */
+#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
+#define R_PPC64_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
+#define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
+#define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */
+#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
+#define R_PPC64_GOT_DTPREL16_HI 93 /* half16 (sym+add)@got@dtprel@h */
+#define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */
+#define R_PPC64_TPREL16_DS 95 /* half16ds* (sym+add)@tprel */
+#define R_PPC64_TPREL16_LO_DS 96 /* half16ds (sym+add)@tprel@l */
+#define R_PPC64_TPREL16_HIGHER 97 /* half16 (sym+add)@tprel@higher */
+#define R_PPC64_TPREL16_HIGHERA 98 /* half16 (sym+add)@tprel@highera */
+#define R_PPC64_TPREL16_HIGHEST 99 /* half16 (sym+add)@tprel@highest */
+#define R_PPC64_TPREL16_HIGHESTA 100 /* half16 (sym+add)@tprel@highesta */
+#define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */
+#define R_PPC64_DTPREL16_LO_DS 102 /* half16ds (sym+add)@dtprel@l */
+#define R_PPC64_DTPREL16_HIGHER 103 /* half16 (sym+add)@dtprel@higher */
+#define R_PPC64_DTPREL16_HIGHERA 104 /* half16 (sym+add)@dtprel@highera */
+#define R_PPC64_DTPREL16_HIGHEST 105 /* half16 (sym+add)@dtprel@highest */
+#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */
+
+/* Keep this the last entry. */
+#define R_PPC64_NUM 107
+
+#endif /* _ASM_POWERPC_ELF_H */
diff --git a/include/asm-ppc/elf.h b/include/asm-ppc/elf.h
deleted file mode 100644
--- a/include/asm-ppc/elf.h
+++ /dev/null
@@ -1,151 +0,0 @@
-#ifndef __PPC_ELF_H
-#define __PPC_ELF_H
-
-/*
- * ELF register definitions..
- */
-#include <asm/types.h>
-#include <asm/ptrace.h>
-#include <asm/cputable.h>
-#include <asm/auxvec.h>
-
-/* PowerPC relocations defined by the ABIs */
-#define R_PPC_NONE 0
-#define R_PPC_ADDR32 1 /* 32bit absolute address */
-#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
-#define R_PPC_ADDR16 3 /* 16bit absolute address */
-#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
-#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
-#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
-#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
-#define R_PPC_ADDR14_BRTAKEN 8
-#define R_PPC_ADDR14_BRNTAKEN 9
-#define R_PPC_REL24 10 /* PC relative 26 bit */
-#define R_PPC_REL14 11 /* PC relative 16 bit */
-#define R_PPC_REL14_BRTAKEN 12
-#define R_PPC_REL14_BRNTAKEN 13
-#define R_PPC_GOT16 14
-#define R_PPC_GOT16_LO 15
-#define R_PPC_GOT16_HI 16
-#define R_PPC_GOT16_HA 17
-#define R_PPC_PLTREL24 18
-#define R_PPC_COPY 19
-#define R_PPC_GLOB_DAT 20
-#define R_PPC_JMP_SLOT 21
-#define R_PPC_RELATIVE 22
-#define R_PPC_LOCAL24PC 23
-#define R_PPC_UADDR32 24
-#define R_PPC_UADDR16 25
-#define R_PPC_REL32 26
-#define R_PPC_PLT32 27
-#define R_PPC_PLTREL32 28
-#define R_PPC_PLT16_LO 29
-#define R_PPC_PLT16_HI 30
-#define R_PPC_PLT16_HA 31
-#define R_PPC_SDAREL16 32
-#define R_PPC_SECTOFF 33
-#define R_PPC_SECTOFF_LO 34
-#define R_PPC_SECTOFF_HI 35
-#define R_PPC_SECTOFF_HA 36
-/* Keep this the last entry. */
-#define R_PPC_NUM 37
-
-#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
-#define ELF_NFPREG 33 /* includes fpscr */
-#define ELF_NVRREG 33 /* includes vscr */
-#define ELF_NEVRREG 34 /* includes acc (as 2) */
-
-/*
- * These are used to set parameters in the core dumps.
- */
-#define ELF_ARCH EM_PPC
-#define ELF_CLASS ELFCLASS32
-#define ELF_DATA ELFDATA2MSB
-
-/* General registers */
-typedef unsigned long elf_greg_t;
-typedef elf_greg_t elf_gregset_t[ELF_NGREG];
-
-/* Floating point registers */
-typedef double elf_fpreg_t;
-typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
-
-/* Altivec registers */
-typedef __vector128 elf_vrreg_t;
-typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
-
-#ifdef __KERNEL__
-
-struct task_struct;
-
-/*
- * This is used to ensure we don't load something for the wrong architecture.
- */
-
-#define elf_check_arch(x) ((x)->e_machine == EM_PPC)
-
-/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
- use of this is to invoke "./ld.so someprog" to test out a new version of
- the loader. We need to make sure that it is out of the way of the program
- that it will "exec", and that there is sufficient room for the brk. */
-
-#define ELF_ET_DYN_BASE (0x08000000)
-
-#define USE_ELF_CORE_DUMP
-#define ELF_EXEC_PAGESIZE 4096
-
-#define ELF_CORE_COPY_REGS(gregs, regs) \
- memcpy((gregs), (regs), sizeof(struct pt_regs)); \
- memset((char *)(gregs) + sizeof(struct pt_regs), 0, \
- sizeof(elf_gregset_t) - sizeof(struct pt_regs));
-
-#define ELF_CORE_COPY_TASK_REGS(t, elfregs) \
- ((t)->thread.regs? \
- ({ ELF_CORE_COPY_REGS((elfregs), (t)->thread.regs); 1; }): 0)
-
-extern int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpu);
-#define ELF_CORE_COPY_FPREGS(t, fpu) dump_task_fpu((t), (fpu))
-
-/* This yields a mask that user programs can use to figure out what
- instruction set this cpu supports. This could be done in userspace,
- but it's not easy, and we've already done it here. */
-
-#define ELF_HWCAP (cur_cpu_spec[0]->cpu_user_features)
-
-/* This yields a string that ld.so will use to load implementation
- specific libraries for optimization. This is more specific in
- intent than poking at uname or /proc/cpuinfo.
-
- For the moment, we have only optimizations for the Intel generations,
- but that could change... */
-
-#define ELF_PLATFORM (NULL)
-
-#define SET_PERSONALITY(ex, ibcs2) set_personality((ibcs2)?PER_SVR4:PER_LINUX)
-
-extern int dcache_bsize;
-extern int icache_bsize;
-extern int ucache_bsize;
-
-/*
- * The requirements here are:
- * - keep the final alignment of sp (sp & 0xf)
- * - make sure the 32-bit value at the first 16 byte aligned position of
- * AUXV is greater than 16 for glibc compatibility.
- * AT_IGNOREPPC is used for that.
- * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
- * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
- */
-#define ARCH_DLINFO \
-do { \
- /* Handle glibc compatibility. */ \
- NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
- NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
- /* Cache size items */ \
- NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
- NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
- NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
- } while (0)
-
-#endif /* __KERNEL__ */
-#endif
diff --git a/include/asm-ppc64/elf.h b/include/asm-ppc64/elf.h
deleted file mode 100644
--- a/include/asm-ppc64/elf.h
+++ /dev/null
@@ -1,387 +0,0 @@
-#ifndef __PPC64_ELF_H
-#define __PPC64_ELF_H
-
-#include <asm/types.h>
-#include <asm/ptrace.h>
-#include <asm/cputable.h>
-#include <asm/auxvec.h>
-
-/* PowerPC relocations defined by the ABIs */
-#define R_PPC_NONE 0
-#define R_PPC_ADDR32 1 /* 32bit absolute address */
-#define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
-#define R_PPC_ADDR16 3 /* 16bit absolute address */
-#define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
-#define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
-#define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
-#define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
-#define R_PPC_ADDR14_BRTAKEN 8
-#define R_PPC_ADDR14_BRNTAKEN 9
-#define R_PPC_REL24 10 /* PC relative 26 bit */
-#define R_PPC_REL14 11 /* PC relative 16 bit */
-#define R_PPC_REL14_BRTAKEN 12
-#define R_PPC_REL14_BRNTAKEN 13
-#define R_PPC_GOT16 14
-#define R_PPC_GOT16_LO 15
-#define R_PPC_GOT16_HI 16
-#define R_PPC_GOT16_HA 17
-#define R_PPC_PLTREL24 18
-#define R_PPC_COPY 19
-#define R_PPC_GLOB_DAT 20
-#define R_PPC_JMP_SLOT 21
-#define R_PPC_RELATIVE 22
-#define R_PPC_LOCAL24PC 23
-#define R_PPC_UADDR32 24
-#define R_PPC_UADDR16 25
-#define R_PPC_REL32 26
-#define R_PPC_PLT32 27
-#define R_PPC_PLTREL32 28
-#define R_PPC_PLT16_LO 29
-#define R_PPC_PLT16_HI 30
-#define R_PPC_PLT16_HA 31
-#define R_PPC_SDAREL16 32
-#define R_PPC_SECTOFF 33
-#define R_PPC_SECTOFF_LO 34
-#define R_PPC_SECTOFF_HI 35
-#define R_PPC_SECTOFF_HA 36
-
-/* PowerPC relocations defined for the TLS access ABI. */
-#define R_PPC_TLS 67 /* none (sym+add)@tls */
-#define R_PPC_DTPMOD32 68 /* word32 (sym+add)@dtpmod */
-#define R_PPC_TPREL16 69 /* half16* (sym+add)@tprel */
-#define R_PPC_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
-#define R_PPC_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
-#define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
-#define R_PPC_TPREL32 73 /* word32 (sym+add)@tprel */
-#define R_PPC_DTPREL16 74 /* half16* (sym+add)@dtprel */
-#define R_PPC_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
-#define R_PPC_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
-#define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
-#define R_PPC_DTPREL32 78 /* word32 (sym+add)@dtprel */
-#define R_PPC_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
-#define R_PPC_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
-#define R_PPC_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
-#define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
-#define R_PPC_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
-#define R_PPC_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
-#define R_PPC_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
-#define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
-#define R_PPC_GOT_TPREL16 87 /* half16* (sym+add)@got@tprel */
-#define R_PPC_GOT_TPREL16_LO 88 /* half16 (sym+add)@got@tprel@l */
-#define R_PPC_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
-#define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
-#define R_PPC_GOT_DTPREL16 91 /* half16* (sym+add)@got@dtprel */
-#define R_PPC_GOT_DTPREL16_LO 92 /* half16* (sym+add)@got@dtprel@l */
-#define R_PPC_GOT_DTPREL16_HI 93 /* half16* (sym+add)@got@dtprel@h */
-#define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */
-
-/* Keep this the last entry. */
-#define R_PPC_NUM 95
-
-/*
- * ELF register definitions..
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-#include <asm/ptrace.h>
-
-#define ELF_NGREG 48 /* includes nip, msr, lr, etc. */
-#define ELF_NFPREG 33 /* includes fpscr */
-#define ELF_NVRREG32 33 /* includes vscr & vrsave stuffed together */
-#define ELF_NVRREG 34 /* includes vscr & vrsave in split vectors */
-
-typedef unsigned long elf_greg_t64;
-typedef elf_greg_t64 elf_gregset_t64[ELF_NGREG];
-
-typedef unsigned int elf_greg_t32;
-typedef elf_greg_t32 elf_gregset_t32[ELF_NGREG];
-
-/*
- * These are used to set parameters in the core dumps.
- */
-#ifndef ELF_ARCH
-# define ELF_ARCH EM_PPC64
-# define ELF_CLASS ELFCLASS64
-# define ELF_DATA ELFDATA2MSB
- typedef elf_greg_t64 elf_greg_t;
- typedef elf_gregset_t64 elf_gregset_t;
-# define elf_addr_t unsigned long
-#else
- /* Assumption: ELF_ARCH == EM_PPC and ELF_CLASS == ELFCLASS32 */
- typedef elf_greg_t32 elf_greg_t;
- typedef elf_gregset_t32 elf_gregset_t;
-# define elf_addr_t u32
-#endif
-
-typedef double elf_fpreg_t;
-typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
-
-/* Altivec registers */
-/*
- * The entries with indexes 0-31 contain the corresponding vector registers.
- * The entry with index 32 contains the vscr as the last word (offset 12)
- * within the quadword. This allows the vscr to be stored as either a
- * quadword (since it must be copied via a vector register to/from storage)
- * or as a word. The entry with index 33 contains the vrsave as the first
- * word (offset 0) within the quadword.
- *
- * This definition of the VMX state is compatible with the current PPC32
- * ptrace interface. This allows signal handling and ptrace to use the same
- * structures. This also simplifies the implementation of a bi-arch
- * (combined (32- and 64-bit) gdb.
- *
- * Note that it's _not_ compatible with 32 bits ucontext which stuffs the
- * vrsave along with vscr and so only uses 33 vectors for the register set
- */
-typedef __vector128 elf_vrreg_t;
-typedef elf_vrreg_t elf_vrregset_t[ELF_NVRREG];
-typedef elf_vrreg_t elf_vrregset_t32[ELF_NVRREG32];
-
-/*
- * This is used to ensure we don't load something for the wrong architecture.
- */
-#define elf_check_arch(x) ((x)->e_machine == ELF_ARCH)
-
-#define USE_ELF_CORE_DUMP
-#define ELF_EXEC_PAGESIZE 4096
-
-/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
- use of this is to invoke "./ld.so someprog" to test out a new version of
- the loader. We need to make sure that it is out of the way of the program
- that it will "exec", and that there is sufficient room for the brk. */
-
-#define ELF_ET_DYN_BASE (0x08000000)
-
-#ifdef __KERNEL__
-
-/* Common routine for both 32-bit and 64-bit processes */
-static inline void ppc64_elf_core_copy_regs(elf_gregset_t elf_regs,
- struct pt_regs *regs)
-{
- int i;
- int gprs = sizeof(struct pt_regs)/sizeof(elf_greg_t64);
-
- if (gprs > ELF_NGREG)
- gprs = ELF_NGREG;
-
- for (i=0; i < gprs; i++)
- elf_regs[i] = (elf_greg_t)((elf_greg_t64 *)regs)[i];
-}
-#define ELF_CORE_COPY_REGS(gregs, regs) ppc64_elf_core_copy_regs(gregs, regs);
-
-static inline int dump_task_regs(struct task_struct *tsk,
- elf_gregset_t *elf_regs)
-{
- struct pt_regs *regs = tsk->thread.regs;
- if (regs)
- ppc64_elf_core_copy_regs(*elf_regs, regs);
-
- return 1;
-}
-#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
-
-extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
-#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
-
-/* XXX Should we define the XFPREGS using altivec ??? */
-
-#endif
-
-/* This yields a mask that user programs can use to figure out what
- instruction set this cpu supports. This could be done in userspace,
- but it's not easy, and we've already done it here. */
-
-#define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
-
-/* This yields a string that ld.so will use to load implementation
- specific libraries for optimization. This is more specific in
- intent than poking at uname or /proc/cpuinfo.
-
- For the moment, we have only optimizations for the Intel generations,
- but that could change... */
-
-#define ELF_PLATFORM (NULL)
-
-#define ELF_PLAT_INIT(_r, load_addr) do { \
- memset(_r->gpr, 0, sizeof(_r->gpr)); \
- _r->ctr = _r->link = _r->xer = _r->ccr = 0; \
- _r->gpr[2] = load_addr; \
-} while (0)
-
-#ifdef __KERNEL__
-#define SET_PERSONALITY(ex, ibcs2) \
-do { \
- unsigned long new_flags = 0; \
- if ((ex).e_ident[EI_CLASS] == ELFCLASS32) \
- new_flags = _TIF_32BIT; \
- if ((current_thread_info()->flags & _TIF_32BIT) \
- != new_flags) \
- set_thread_flag(TIF_ABI_PENDING); \
- else \
- clear_thread_flag(TIF_ABI_PENDING); \
- if (personality(current->personality) != PER_LINUX32) \
- set_personality(PER_LINUX); \
-} while (0)
-
-/*
- * An executable for which elf_read_implies_exec() returns TRUE will
- * have the READ_IMPLIES_EXEC personality flag set automatically. This
- * is only required to work around bugs in old 32bit toolchains. Since
- * the 64bit ABI has never had these issues dont enable the workaround
- * even if we have an executable stack.
- */
-#define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
- (exec_stk != EXSTACK_DISABLE_X) : 0)
-
-#endif
-
-extern int dcache_bsize;
-extern int icache_bsize;
-extern int ucache_bsize;
-
-/* We do have an arch_setup_additional_pages for vDSO matters */
-#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
-struct linux_binprm;
-extern int arch_setup_additional_pages(struct linux_binprm *bprm, int executable_stack);
-
-/*
- * The requirements here are:
- * - keep the final alignment of sp (sp & 0xf)
- * - make sure the 32-bit value at the first 16 byte aligned position of
- * AUXV is greater than 16 for glibc compatibility.
- * AT_IGNOREPPC is used for that.
- * - for compatibility with glibc ARCH_DLINFO must always be defined on PPC,
- * even if DLINFO_ARCH_ITEMS goes to zero or is undefined.
- */
-#define ARCH_DLINFO \
-do { \
- /* Handle glibc compatibility. */ \
- NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
- NEW_AUX_ENT(AT_IGNOREPPC, AT_IGNOREPPC); \
- /* Cache size items */ \
- NEW_AUX_ENT(AT_DCACHEBSIZE, dcache_bsize); \
- NEW_AUX_ENT(AT_ICACHEBSIZE, icache_bsize); \
- NEW_AUX_ENT(AT_UCACHEBSIZE, ucache_bsize); \
- /* vDSO base */ \
- NEW_AUX_ENT(AT_SYSINFO_EHDR, current->thread.vdso_base); \
- } while (0)
-
-/* PowerPC64 relocations defined by the ABIs */
-#define R_PPC64_NONE R_PPC_NONE
-#define R_PPC64_ADDR32 R_PPC_ADDR32 /* 32bit absolute address. */
-#define R_PPC64_ADDR24 R_PPC_ADDR24 /* 26bit address, word aligned. */
-#define R_PPC64_ADDR16 R_PPC_ADDR16 /* 16bit absolute address. */
-#define R_PPC64_ADDR16_LO R_PPC_ADDR16_LO /* lower 16bits of abs. address. */
-#define R_PPC64_ADDR16_HI R_PPC_ADDR16_HI /* high 16bits of abs. address. */
-#define R_PPC64_ADDR16_HA R_PPC_ADDR16_HA /* adjusted high 16bits. */
-#define R_PPC64_ADDR14 R_PPC_ADDR14 /* 16bit address, word aligned. */
-#define R_PPC64_ADDR14_BRTAKEN R_PPC_ADDR14_BRTAKEN
-#define R_PPC64_ADDR14_BRNTAKEN R_PPC_ADDR14_BRNTAKEN
-#define R_PPC64_REL24 R_PPC_REL24 /* PC relative 26 bit, word aligned. */
-#define R_PPC64_REL14 R_PPC_REL14 /* PC relative 16 bit. */
-#define R_PPC64_REL14_BRTAKEN R_PPC_REL14_BRTAKEN
-#define R_PPC64_REL14_BRNTAKEN R_PPC_REL14_BRNTAKEN
-#define R_PPC64_GOT16 R_PPC_GOT16
-#define R_PPC64_GOT16_LO R_PPC_GOT16_LO
-#define R_PPC64_GOT16_HI R_PPC_GOT16_HI
-#define R_PPC64_GOT16_HA R_PPC_GOT16_HA
-
-#define R_PPC64_COPY R_PPC_COPY
-#define R_PPC64_GLOB_DAT R_PPC_GLOB_DAT
-#define R_PPC64_JMP_SLOT R_PPC_JMP_SLOT
-#define R_PPC64_RELATIVE R_PPC_RELATIVE
-
-#define R_PPC64_UADDR32 R_PPC_UADDR32
-#define R_PPC64_UADDR16 R_PPC_UADDR16
-#define R_PPC64_REL32 R_PPC_REL32
-#define R_PPC64_PLT32 R_PPC_PLT32
-#define R_PPC64_PLTREL32 R_PPC_PLTREL32
-#define R_PPC64_PLT16_LO R_PPC_PLT16_LO
-#define R_PPC64_PLT16_HI R_PPC_PLT16_HI
-#define R_PPC64_PLT16_HA R_PPC_PLT16_HA
-
-#define R_PPC64_SECTOFF R_PPC_SECTOFF
-#define R_PPC64_SECTOFF_LO R_PPC_SECTOFF_LO
-#define R_PPC64_SECTOFF_HI R_PPC_SECTOFF_HI
-#define R_PPC64_SECTOFF_HA R_PPC_SECTOFF_HA
-#define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2. */
-#define R_PPC64_ADDR64 38 /* doubleword64 S + A. */
-#define R_PPC64_ADDR16_HIGHER 39 /* half16 #higher(S + A). */
-#define R_PPC64_ADDR16_HIGHERA 40 /* half16 #highera(S + A). */
-#define R_PPC64_ADDR16_HIGHEST 41 /* half16 #highest(S + A). */
-#define R_PPC64_ADDR16_HIGHESTA 42 /* half16 #highesta(S + A). */
-#define R_PPC64_UADDR64 43 /* doubleword64 S + A. */
-#define R_PPC64_REL64 44 /* doubleword64 S + A - P. */
-#define R_PPC64_PLT64 45 /* doubleword64 L + A. */
-#define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P. */
-#define R_PPC64_TOC16 47 /* half16* S + A - .TOC. */
-#define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.). */
-#define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.). */
-#define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.). */
-#define R_PPC64_TOC 51 /* doubleword64 .TOC. */
-#define R_PPC64_PLTGOT16 52 /* half16* M + A. */
-#define R_PPC64_PLTGOT16_LO 53 /* half16 #lo(M + A). */
-#define R_PPC64_PLTGOT16_HI 54 /* half16 #hi(M + A). */
-#define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A). */
-
-#define R_PPC64_ADDR16_DS 56 /* half16ds* (S + A) >> 2. */
-#define R_PPC64_ADDR16_LO_DS 57 /* half16ds #lo(S + A) >> 2. */
-#define R_PPC64_GOT16_DS 58 /* half16ds* (G + A) >> 2. */
-#define R_PPC64_GOT16_LO_DS 59 /* half16ds #lo(G + A) >> 2. */
-#define R_PPC64_PLT16_LO_DS 60 /* half16ds #lo(L + A) >> 2. */
-#define R_PPC64_SECTOFF_DS 61 /* half16ds* (R + A) >> 2. */
-#define R_PPC64_SECTOFF_LO_DS 62 /* half16ds #lo(R + A) >> 2. */
-#define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2. */
-#define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2. */
-#define R_PPC64_PLTGOT16_DS 65 /* half16ds* (M + A) >> 2. */
-#define R_PPC64_PLTGOT16_LO_DS 66 /* half16ds #lo(M + A) >> 2. */
-
-/* PowerPC64 relocations defined for the TLS access ABI. */
-#define R_PPC64_TLS 67 /* none (sym+add)@tls */
-#define R_PPC64_DTPMOD64 68 /* doubleword64 (sym+add)@dtpmod */
-#define R_PPC64_TPREL16 69 /* half16* (sym+add)@tprel */
-#define R_PPC64_TPREL16_LO 70 /* half16 (sym+add)@tprel@l */
-#define R_PPC64_TPREL16_HI 71 /* half16 (sym+add)@tprel@h */
-#define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */
-#define R_PPC64_TPREL64 73 /* doubleword64 (sym+add)@tprel */
-#define R_PPC64_DTPREL16 74 /* half16* (sym+add)@dtprel */
-#define R_PPC64_DTPREL16_LO 75 /* half16 (sym+add)@dtprel@l */
-#define R_PPC64_DTPREL16_HI 76 /* half16 (sym+add)@dtprel@h */
-#define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */
-#define R_PPC64_DTPREL64 78 /* doubleword64 (sym+add)@dtprel */
-#define R_PPC64_GOT_TLSGD16 79 /* half16* (sym+add)@got@tlsgd */
-#define R_PPC64_GOT_TLSGD16_LO 80 /* half16 (sym+add)@got@tlsgd@l */
-#define R_PPC64_GOT_TLSGD16_HI 81 /* half16 (sym+add)@got@tlsgd@h */
-#define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */
-#define R_PPC64_GOT_TLSLD16 83 /* half16* (sym+add)@got@tlsld */
-#define R_PPC64_GOT_TLSLD16_LO 84 /* half16 (sym+add)@got@tlsld@l */
-#define R_PPC64_GOT_TLSLD16_HI 85 /* half16 (sym+add)@got@tlsld@h */
-#define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */
-#define R_PPC64_GOT_TPREL16_DS 87 /* half16ds* (sym+add)@got@tprel */
-#define R_PPC64_GOT_TPREL16_LO_DS 88 /* half16ds (sym+add)@got@tprel@l */
-#define R_PPC64_GOT_TPREL16_HI 89 /* half16 (sym+add)@got@tprel@h */
-#define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */
-#define R_PPC64_GOT_DTPREL16_DS 91 /* half16ds* (sym+add)@got@dtprel */
-#define R_PPC64_GOT_DTPREL16_LO_DS 92 /* half16ds (sym+add)@got@dtprel@l */
-#define R_PPC64_GOT_DTPREL16_HI 93 /* half16 (sym+add)@got@dtprel@h */
-#define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */
-#define R_PPC64_TPREL16_DS 95 /* half16ds* (sym+add)@tprel */
-#define R_PPC64_TPREL16_LO_DS 96 /* half16ds (sym+add)@tprel@l */
-#define R_PPC64_TPREL16_HIGHER 97 /* half16 (sym+add)@tprel@higher */
-#define R_PPC64_TPREL16_HIGHERA 98 /* half16 (sym+add)@tprel@highera */
-#define R_PPC64_TPREL16_HIGHEST 99 /* half16 (sym+add)@tprel@highest */
-#define R_PPC64_TPREL16_HIGHESTA 100 /* half16 (sym+add)@tprel@highesta */
-#define R_PPC64_DTPREL16_DS 101 /* half16ds* (sym+add)@dtprel */
-#define R_PPC64_DTPREL16_LO_DS 102 /* half16ds (sym+add)@dtprel@l */
-#define R_PPC64_DTPREL16_HIGHER 103 /* half16 (sym+add)@dtprel@higher */
-#define R_PPC64_DTPREL16_HIGHERA 104 /* half16 (sym+add)@dtprel@highera */
-#define R_PPC64_DTPREL16_HIGHEST 105 /* half16 (sym+add)@dtprel@highest */
-#define R_PPC64_DTPREL16_HIGHESTA 106 /* half16 (sym+add)@dtprel@highesta */
-
-/* Keep this the last entry. */
-#define R_PPC64_NUM 107
-
-#endif /* __PPC64_ELF_H */
^ permalink raw reply
* [PATCH] Add support for USB to 440EP platform files
From: Wade Farnsworth @ 2005-09-19 23:55 UTC (permalink / raw)
To: Matt Porter; +Cc: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 223 bytes --]
This adds support for the USB host and device interfaces on the 440EP to
the appropriate platform-specific files.
Signed off by: John Otken <jotken@softadvances.com>
Signed off by: Wade Farnsworth <wfarnsworth@mvista.com>
[-- Attachment #2: 440ep-ppc-usb.patch --]
[-- Type: text/x-patch, Size: 2374 bytes --]
diff -uprN linux-2.6/include/asm-ppc/ibm44x.h linux-2.6-dev/include/asm-ppc/ibm44x.h
--- linux-2.6/include/asm-ppc/ibm44x.h 2005-09-12 11:18:19.000000000 -0700
+++ linux-2.6-dev/include/asm-ppc/ibm44x.h 2005-09-13 13:51:23.000000000 -0700
@@ -169,6 +169,7 @@
#ifdef CONFIG_440EP
#define DCRN_SDR_UART2 0x0122
#define DCRN_SDR_UART3 0x0123
+#define DCRN_SDR_USB0 0x0320
#define DCRN_SDR_CUST0 0x4000
#endif
Binary files linux-2.6/arch/ppc/boot/images/ramdisk.gz and linux-2.6-dev/arch/ppc/boot/images/ramdisk.gz differ
Binary files linux-2.6/arch/ppc/boot/images/ramdisk.image.gz and linux-2.6-dev/arch/ppc/boot/images/ramdisk.image.gz differ
diff -uprN linux-2.6/arch/ppc/platforms/4xx/ibm440ep.c linux-2.6-dev/arch/ppc/platforms/4xx/ibm440ep.c
--- linux-2.6/arch/ppc/platforms/4xx/ibm440ep.c 2005-09-12 11:17:54.000000000 -0700
+++ linux-2.6-dev/arch/ppc/platforms/4xx/ibm440ep.c 2005-09-13 14:00:10.000000000 -0700
@@ -182,23 +182,48 @@ struct ppc4xx_uic_settings ppc4xx_core_u
},
};
-static struct resource usb_gadget_resources[] = {
+static struct resource ohci_usb_resources[] = {
[0] = {
- .start = 0x050000100ULL,
- .end = 0x05000017FULL,
+ .start = 0x0EF601000ULL,
+ .end = 0x0EF60107FULL,
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = 55,
- .end = 55,
+ .start = 40,
+ .end = 40,
.flags = IORESOURCE_IRQ,
},
};
+static struct resource usb_gadget_resources[] = {
+ [0] = {
+ .start = 0x050000100ULL,
+ .end = 0x05000017FULL,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = 55,
+ .end = 55,
+ .flags = IORESOURCE_IRQ,
+ .name = "usb_device_irq",
+ },
+};
+
static u64 dma_mask = 0xffffffffULL;
+static struct platform_device ohci_usb_device = {
+ .name = "ppc-soc-ohci",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(ohci_usb_resources),
+ .resource = ohci_usb_resources,
+ .dev = {
+ .dma_mask = &dma_mask,
+ .coherent_dma_mask = 0xffffffffULL,
+ }
+};
+
static struct platform_device usb_gadget_device = {
- .name = "musbhsfc",
+ .name = "musbhsfc_udc",
.id = 0,
.num_resources = ARRAY_SIZE(usb_gadget_resources),
.resource = usb_gadget_resources,
@@ -210,6 +235,7 @@ static struct platform_device usb_gadget
static struct platform_device *ibm440ep_devs[] __initdata = {
&usb_gadget_device,
+ &ohci_usb_device,
};
static int __init
^ permalink raw reply
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