* Re: [PATCH] ppc32: 8xx board-specific platform stuff for fs_enet
From: Dan Malek @ 2005-11-23 20:18 UTC (permalink / raw)
To: Marcelo Tosatti; +Cc: linuxppc-embedded list, Paul Mackerras
In-Reply-To: <20051123120033.GA3551@logos.cnet>
On Nov 23, 2005, at 7:00 AM, Marcelo Tosatti wrote:
> The files in arch/ppc/8xx_io/ (which is what I think you refer to as
> candidates for drivers/), are:
I don't particularly like these macros, but I'm tired of fighting
about it. If you follow the usage path, you will see it's only
used in the CPM drivers, and I wish people would just use
the data structure pointers to access these ports/bits with
standard C code and then place any synchronization
instructions properly. There are some cases where you
have to be quite careful about how you read and write
some control registers, and I think this opens the possibility
to just be sloppy and make mistakes since the read/write
is hidden within the macro.
> Does anyone have hardware to test it? Dan?
Yes, I have hardware to test it. I will do that one of these days.
Thanks.
-- Dan
^ permalink raw reply
* Re: Freescale 8541 support
From: Wolfgang Denk @ 2005-11-23 20:14 UTC (permalink / raw)
To: Dan Wilson; +Cc: linuxppc-embedded
In-Reply-To: <200511230816400937.2B36A589@smtp.dslextreme.com>
In message <200511230816400937.2B36A589@smtp.dslextreme.com> you wrote:
>
> Thanks for the reply! Unfortunately, I am constrained to use the 2.4
> kernel by another software package that I have to use, which doesn't yet
> support 2.6. It appears to me that the 8541/8555 support was put into 2.6
> and never back-ported to 2.4. I'll take a look at the manuals today and
Yes. We will add specific board support for the 8541/8555 (in terms
of the TQM8541 and TQM8555 boards) to our 2.6 git repository in a few
days, but we don't have any intentions to support these boards in our
2.4 tree (unless you pay us for it, of course :-)
> compare the 8540 to the 8541: perhaps I can live with the 8540 support
> that does appear to be in the 2.4 kernel. If not, hopefully the porting
> job won't be very difficult.
It's just a routine job, but it takes time and resources, and you
have to decide if it makes sense to invest these in a kernel tree
that will not be developed any further.
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
Our business is run on trust. We trust you will pay in advance.
^ permalink raw reply
* Re: Freescale 8541 support
From: Dan Malek @ 2005-11-23 20:07 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-embedded
In-Reply-To: <876043CF-5CC2-409D-A543-8C90C5E92097@kernel.crashing.org>
On Nov 23, 2005, at 11:19 AM, Kumar Gala wrote:
> I believe the linuxppc-dev 2.4 tree had support for the MPC8541/55.
Yes, it does. If anyone spends more than a couple of hours,
or does anything that isn't board specific, you are probably
headed down the wrong path. :-)
-- Dan
^ permalink raw reply
* Re: [PATCH] powerpc: Add support for building uImages
From: Sam Ravnborg @ 2005-11-23 18:55 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <Pine.LNX.4.44.0511231242510.4183-100000@gate.crashing.org>
On Wed, Nov 23, 2005 at 12:43:15PM -0600, Kumar Gala wrote:
> +
> +$(obj)/uImage: $(obj)/vmlinux.gz
> + $(Q)rm -f $@
> + $(call if_changed,uimage)
> + @echo -n ' Image: $@ '
> + @if [ -f $@ ]; then echo 'is ready' ; else echo 'not made'; fi
The above is suboptimal. The $(call if_changed,uimage) will execute
$(cmd_uimage) if 1) prerequisites has changed or 2) the command to execute
has changed.
In the above case 1) is always true, otherwise we would not reach the
statement. So change it to $(call cmd,uimage) is the correct way.
The 'bug' is also present in ppc/boot/images
Sam
^ permalink raw reply
* RE: [PATCH] I2C: Add I2C support for the MPC8260
From: Kumar Gala @ 2005-11-23 19:06 UTC (permalink / raw)
To: Heiko Schocher; +Cc: linuxppc-dev, lm-sensors
In-Reply-To: <AHEILKONAKAEJPHNMOPNEEMNCDAA.hs@denx.de>
On Wed, 23 Nov 2005, Heiko Schocher wrote:
* There is a bunch of code commented out in one form or another, is this
needed?
* Single line comment style
* some other comments are inline.
- kumar
> Hello
>
> On Wednesday, November 23, 2005 8:01 AM Kumar Gala wrote:
> > Can we rename the driver from mpc8260 -> cpm2. The driver should work
> > on any device that has a "CPM2" which includes a number of MPC82xx
> > and MPC85xx processors. So calling it and its config options, etc
> > MPC8260 is going to be confusing to users.
>
> [PATCH] I2C: Add I2C Bus support for MPC with CPM2.
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
>
> ---
>
> drivers/i2c/busses/Kconfig | 10 +
> drivers/i2c/busses/Makefile | 1
> drivers/i2c/busses/i2c-cpm2.c | 616 +++++++++++++++++++++++++++++++++++++++++
> include/linux/i2c-algo-cpm2.h | 26 ++
> include/linux/i2c-id.h | 3
> 5 files changed, 656 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> index 4010fe9..2acb4cc 100644
> --- a/drivers/i2c/busses/Kconfig
> +++ b/drivers/i2c/busses/Kconfig
> @@ -270,6 +270,16 @@ config I2C_MPC
> This driver can also be built as a module. If so, the module
> will be called i2c-mpc.
>
> +config I2C_CPM2
> + tristate "CPM2"
> + depends on I2C && PPC32
it should really depend on CPM2 being set not PPC32.
> + help
> + If you say yes to this option, support will be included for the
> + I2C interface on PPC with CPM2
> +
> + This driver can also be built as a module. If so, the module
> + will be called i2c-cpm2.
> +
> config I2C_NFORCE2
> tristate "Nvidia nForce2, nForce3 and nForce4"
> depends on I2C && PCI
> diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
> index f1df00f..a4c1b69 100644
> --- a/drivers/i2c/busses/Makefile
> +++ b/drivers/i2c/busses/Makefile
> @@ -43,6 +43,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
> obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
> obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
> obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
> +obj-$(CONFIG_I2C_CPM2) += i2c-cpm2.o
>
> ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
> EXTRA_CFLAGS += -DDEBUG
> diff --git a/drivers/i2c/busses/i2c-cpm2.c b/drivers/i2c/busses/i2c-cpm2.c
> new file mode 100644
> index 0000000..80dc532
> --- /dev/null
> +++ b/drivers/i2c/busses/i2c-cpm2.c
> @@ -0,0 +1,616 @@
> +/*
> + * (C) Copyright 2005
> + * Heiko Schocher <hs@denx.de>
> + *
> + * This is a combined i2c adapter and algorithm driver for
> + * PPC with CPM2
> + *
> + * Release 0.1
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/config.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/sched.h>
> +#include <linux/init.h>
> +#include <linux/pci.h>
> +#include <asm/io.h>
> +#include <linux/fsl_devices.h>
> +#include <linux/i2c.h>
> +#include <linux/interrupt.h>
> +#include <linux/delay.h>
> +#include <asm/immap_cpm2.h>
> +#include <asm/mpc8260.h>
> +#include <asm/cpm2.h>
> +
> +#include <linux/i2c-algo-cpm2.h>
> +#include <linux/platform_device.h>
> +
> +#define CPM_MAX_READ 513
> +
> +static wait_queue_head_t iic_wait;
> +static ushort r_tbase, r_rbase;
> +
> +int cpm_scan = 0;
> +int cpm_debug = 0;
> +
It would be nice to rename the struct so its unique between i2c-mpc and
i2c-cpm2. Since its reasonable for both drivers to exist in a system.
> +struct mpc_i2c {
> + u32 interrupt;
> + wait_queue_head_t queue;
> + struct i2c_adapter adap;
> + int irq;
> + u32 flags;
> + struct i2c_algo_cpm2_data *data;
> +};
> +
> +static struct i2c_algo_cpm2_data cpm2_data;
> +
> +static void
> +cpm2_iic_init(struct i2c_algo_cpm2_data *data)
> +{
> + volatile cpm_cpm2_t *cp;
> + volatile cpm2_map_t *immap;
> +
> + cp = cpmp; /* Get pointer to Communication Processor */
> + immap = (cpm2_map_t *)CPM_MAP_ADDR; /* and to internal registers */
> +
> + *(ushort *)(&immap->im_dprambase[PROFF_I2C_BASE]) = PROFF_I2C;
> + data->iip = (iic_t *)&immap->im_dprambase[PROFF_I2C];
> +
> + data->i2c = (i2c_cpm2_t *)&(immap->im_i2c);
> + data->cp = cp;
> +
> + /* Initialize Port D IIC pins.
> + */
> + immap->im_ioport.iop_ppard |= 0x00030000;
> + immap->im_ioport.iop_pdird &= ~0x00030000;
> + immap->im_ioport.iop_podrd |= 0x00030000;
> + immap->im_ioport.iop_psord |= 0x00030000;
> +
> + /* Allocate space for two transmit and two receive buffer
> + * descriptors in the DP ram.
> + */
> + data->dp_addr = cpm_dpalloc(sizeof(cbd_t) * 4, 8);
> +
> + /* ptr to i2c area */
> + data->i2c = (i2c_cpm2_t *)&(((cpm2_map_t *)CPM_MAP_ADDR)->im_i2c);
> +}
> +
> +static irqreturn_t cpm2_i2c_isr(int irq, void *dev_id, struct pt_regs *regs)
> +{
> + struct mpc_i2c *mpc_i2c = dev_id;
> + struct i2c_algo_cpm2_data *cpm_adap = mpc_i2c->data;
> + volatile i2c_cpm2_t *i2c = cpm_adap->i2c;
> +
> + if (cpm_debug > 1)
> + printk(KERN_DEBUG "cpm_iic_interrupt(dev_id=%p)\n", dev_id);
> +
> + /* Clear interrupt.
> + */
> + i2c->i2c_i2cer = 0xff;
> +
> + /* Get 'me going again.
> + */
> + wake_up_interruptible(&iic_wait);
> + return IRQ_HANDLED;
> +}
> +
> +
> +static void
> +cpm_iic_init(struct i2c_algo_cpm2_data *cpm_adap)
> +{
> + volatile iic_t *iip = cpm_adap->iip;
> + volatile i2c_cpm2_t *i2c = cpm_adap->i2c;
> +
> + if (cpm_debug) printk(KERN_DEBUG "cpm_iic_init() - iip=%p\n",iip);
> +
> + /* Initialize the parameter ram.
> + * We need to make sure many things are initialized to zero,
> + * especially in the case of a microcode patch.
> + */
> + iip->iic_rstate = 0;
> + iip->iic_rdp = 0;
> + iip->iic_rbptr = 0;
> + iip->iic_rbc = 0;
> + iip->iic_rxtmp = 0;
> + iip->iic_tstate = 0;
> + iip->iic_tdp = 0;
> + iip->iic_tbptr = 0;
> + iip->iic_tbc = 0;
> + iip->iic_txtmp = 0;
> +
> + /* Set up the IIC parameters in the parameter ram.
> + */
> + iip->iic_tbase = r_tbase = cpm_adap->dp_addr;
> + iip->iic_rbase = r_rbase = cpm_adap->dp_addr + sizeof(cbd_t)*2;
> +
> + iip->iic_tfcr = CPMFCR_GBL | CPMFCR_EB;
> + iip->iic_rfcr = CPMFCR_GBL | CPMFCR_EB;
> +
> + /* Set maximum receive size.
> + */
> + iip->iic_mrblr = CPM_MAX_READ;
> +
> + /* Initialize Tx/Rx parameters.
> + */
> + {
> + volatile cpm_cpm2_t *cp = cpm_adap->cp;
> + cp->cp_cpcr =
> + mk_cr_cmd(CPM_CR_I2C_PAGE, CPM_CR_I2C_SBLOCK, 0x00, CPM_CR_INIT_TRX) | CPM_CR_FLG;
> + while (cp->cp_cpcr & CPM_CR_FLG);
> + }
> +
> + /* Select an arbitrary address. Just make sure it is unique.
> + */
> + i2c->i2c_i2add = 0x34;
> +
> + /* Divider is 2 * ( 15 + 3 )
> + */
> + i2c->i2c_i2brg = 0x0f;
> +
> + /* Pre-divider is BRGCLK/4
> + */
> + i2c->i2c_i2mod = 0x06;
> +
> + /* Disable interrupts.
> + */
> + i2c->i2c_i2cmr = 0;
> + i2c->i2c_i2cer = 0xff;
> +
> + init_waitqueue_head(&iic_wait);
> +}
> +
> +
> +#if 0
> +static int
> +cpm_iic_shutdown(struct i2c_algo_cpm2_data *cpm_adap)
> +{
> + volatile i2c_cpm2_t *i2c = cpm_adap->i2c;
> +
> + /* Shut down IIC.
> + */
> + i2c->i2c_i2mod = 0;
> + i2c->i2c_i2cmr = 0;
> + i2c->i2c_i2cer = 0xff;
> +
> + return(0);
> +}
> +#endif
> +
> +static void
> +cpm_reset_iic_params(volatile iic_t *iip)
> +{
> + iip->iic_tbase = r_tbase;
> + iip->iic_rbase = r_rbase;
> +
> + iip->iic_tfcr = CPMFCR_GBL | CPMFCR_EB;
> + iip->iic_rfcr = CPMFCR_GBL | CPMFCR_EB;
> +
> + iip->iic_mrblr = CPM_MAX_READ;
> +
> + iip->iic_rstate = 0;
> + iip->iic_rdp = 0;
> + iip->iic_rbptr = 0;
> + iip->iic_rbc = 0;
> + iip->iic_rxtmp = 0;
> + iip->iic_tstate = 0;
> + iip->iic_tdp = 0;
> + iip->iic_tbptr = 0;
> + iip->iic_tbc = 0;
> + iip->iic_txtmp = 0;
> +}
> +
> +#define BD_SC_NAK ((ushort)0x0004) /* NAK - did not respond */
> +#define CPM_CR_CLOSE_RXBD ((ushort)0x0007)
> +
> +static void force_close(struct i2c_algo_cpm2_data *cpm)
> +{
> +#if 0
> + volatile cpm_cpm2_t *cp = cpm->cp;
> +
> + if (cpm_debug) printk(KERN_DEBUG "force_close()\n");
> + cp->cp_cpcr =
> + mk_cr_cmd(CPM_CR_CH_I2C, CPM_CR_CLOSE_RXBD) |
> + CPM_CR_FLG;
> +
> + while (cp->cp_cpcr & CPM_CR_FLG);
> +#endif
> +}
> +
> +
> +/* Read from IIC...
> + * abyte = address byte, with r/w flag already set
> + */
> +static int
> +cpm_iic_read(struct i2c_algo_cpm2_data *cpm, u_char abyte, char *buf, int count)
> +{
> + volatile cpm2_map_t *immap = (cpm2_map_t *)CPM_MAP_ADDR;
> + volatile iic_t *iip = cpm->iip;
> + volatile i2c_cpm2_t *i2c = cpm->i2c;
> + volatile cbd_t *tbdf, *rbdf;
> + u_char *tb;
> + unsigned long flags;
> +
> + if (count >= CPM_MAX_READ)
> + return -EINVAL;
> +
> + tbdf = (cbd_t *)&immap->im_dprambase[iip->iic_tbase];
> + rbdf = (cbd_t *)&immap->im_dprambase[iip->iic_rbase];
> +
> + /* To read, we need an empty buffer of the proper length.
> + * All that is used is the first byte for address, the remainder
> + * is just used for timing (and doesn't really have to exist).
> + */
> + if (/*cpm->reloc*/0) {
> + cpm_reset_iic_params(iip);
> + }
> + tb = cpm->temp;
> + tb = (u_char *)(((uint)tb + 15) & ~15);
> + tb[0] = abyte; /* Device address byte w/rw flag */
> +
> + dma_cache_wback_inv (tb, 1);
> +
> + if (cpm_debug) printk(KERN_DEBUG "cpm_iic_read(abyte=0x%x)\n", abyte);
> +
> + tbdf->cbd_bufaddr = __pa(tb);
> + tbdf->cbd_datlen = count + 1;
> + tbdf->cbd_sc =
> + BD_SC_READY | BD_SC_INTRPT | BD_SC_LAST |
> + BD_SC_WRAP | BD_IIC_START;
> +
> + rbdf->cbd_datlen = 0;
> + rbdf->cbd_bufaddr = __pa(buf);
> + rbdf->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP;
> +
> + if (count > 0 && count < CPM_MAX_READ)
> + iip->iic_mrblr = count; /* prevent excessive read */
> +
> + dma_cache_inv (buf, count);
> +
> + /* Chip bug, set enable here */
> + local_irq_save(flags);
> + i2c->i2c_i2cmr = 0x13; /* Enable some interupts */
> + i2c->i2c_i2cer = 0xff;
> + i2c->i2c_i2mod |= 1; /* Enable */
> + i2c->i2c_i2com = 0x81; /* Start master */
> +
> + /* Wait for IIC transfer */
> + interruptible_sleep_on(&iic_wait);
> + local_irq_restore(flags);
> + if (signal_pending(current))
> + return -EIO;
> +
> + if (cpm_debug) {
> + printk(KERN_DEBUG "tx sc %04x, rx sc %04x\n",
> + tbdf->cbd_sc, rbdf->cbd_sc);
> + }
> +
> + if (tbdf->cbd_sc & BD_SC_NAK) {
> + printk(KERN_INFO "IIC read; no ack\n");
> + return 0;
> + }
> +
> + if (rbdf->cbd_sc & BD_SC_EMPTY) {
> + printk(KERN_INFO "IIC read; complete but rbuf empty\n");
> + force_close(cpm);
> + printk(KERN_INFO "tx sc %04x, rx sc %04x\n",
> + tbdf->cbd_sc, rbdf->cbd_sc);
> + }
> +
> + if (cpm_debug) printk(KERN_DEBUG "read %d bytes\n", rbdf->cbd_datlen);
> +
> + if (rbdf->cbd_datlen < count) {
> + printk(KERN_INFO "IIC read; short, wanted %d got %d\n",
> + count, rbdf->cbd_datlen);
> + return 0;
> + }
> + if (cpm_debug) {
> + int u;
> + for (u = 0; u < count; u++) {
> + printk(KERN_DEBUG "buf[%d] = 0x%x\n", u, buf[u]);
> + }
> + }
> +
> +
> + return count;
> +}
> +
> +/* Write to IIC...
> + * addr = address byte, with r/w flag already set
> + */
> +static int
> +cpm_iic_write(struct i2c_algo_cpm2_data *cpm, u_char abyte, char *buf,int count)
> +{
> + volatile cpm2_map_t *immap = (cpm2_map_t *)CPM_MAP_ADDR;
> + volatile iic_t *iip = cpm->iip;
> + volatile i2c_cpm2_t *i2c = cpm->i2c;
> + volatile cbd_t *tbdf;
> + u_char *tb;
> + unsigned long flags;
> +
> + tb = cpm->temp;
> + tb = (u_char *)(((uint)tb + 15) & ~15);
> + *tb = abyte; /* Device address byte w/rw flag */
> +
> + dma_cache_wback_inv (tb, 1);
> + dma_cache_wback_inv (buf, count);
> +
> + if (cpm_debug) printk(KERN_DEBUG "cpm_iic_write(abyte=0x%x)\n", abyte);
> + if (cpm_debug) printk(KERN_DEBUG "buf[0] = 0x%x, buf[1] = 0x%x\n", buf[0], buf[1]);
> +
> + /* set up 2 descriptors */
> + tbdf = (cbd_t *)&immap->im_dprambase[iip->iic_tbase];
> +
> + tbdf[0].cbd_bufaddr = __pa(tb);
> + tbdf[0].cbd_datlen = 1;
> + tbdf[0].cbd_sc = BD_SC_READY | BD_IIC_START;
> +
> + tbdf[1].cbd_bufaddr = __pa(buf);
> + tbdf[1].cbd_datlen = count;
> + tbdf[1].cbd_sc = BD_SC_READY | BD_SC_INTRPT | BD_SC_LAST | BD_SC_WRAP;
> +
> + /* Chip bug, set enable here */
> + local_irq_save(flags);;
> + i2c->i2c_i2cmr = 0x13; /* Enable some interupts */
> + i2c->i2c_i2cer = 0xff;
> + i2c->i2c_i2mod |= 1; /* Enable */
> + i2c->i2c_i2com = 0x81; /* Start master */
> +
> + /* Wait for IIC transfer */
> + interruptible_sleep_on(&iic_wait);
> + local_irq_restore(flags);
> + if (signal_pending(current))
> + return -EIO;
> +
> + if (cpm_debug) {
> + printk(KERN_DEBUG "tx0 sc %04x, tx1 sc %04x\n",
> + tbdf[0].cbd_sc, tbdf[1].cbd_sc);
> + }
> +
> + if (tbdf->cbd_sc & BD_SC_NAK) {
> + printk(KERN_INFO "IIC write; no ack\n");
> + return 0;
> + }
> +
> + if (tbdf->cbd_sc & BD_SC_READY) {
> + printk(KERN_INFO "IIC write; complete but tbuf ready\n");
> + return 0;
> + }
> +
> + return count;
> +}
> +
> +#if 0
> +/* See if an IIC address exists..
> + * addr = 7 bit address, unshifted
> + */
> +static int
> +cpm_iic_tryaddress(struct i2c_algo_cpm2_data *cpm, int addr)
> +{
> + volatile cpm2_map_t *immap = (cpm2_map_t *)CPM_MAP_ADDR;
> + volatile iic_t *iip = cpm->iip;
> + volatile i2c_cpm2_t *i2c = cpm->i2c;
> + volatile cbd_t *tbdf, *rbdf;
> + u_char *tb;
> + unsigned long flags, len;
> +
> + if (cpm_debug > 1)
> + printk(KERN_DEBUG "cpm_iic_tryaddress(cpm=%p,addr=%d)\n", cpm, addr);
> +
> + if (cpm_debug && addr == 0) {
> + printk(KERN_DEBUG "iip %p, dp_addr 0x%x\n", cpm->iip, cpm->dp_addr);
> + printk(KERN_DEBUG "iic_tbase %d, r_tbase %d\n", iip->iic_tbase, r_tbase);
> + }
> +
> + tbdf = (cbd_t *)&immap->im_dprambase[iip->iic_tbase];
> + rbdf = (cbd_t *)&immap->im_dprambase[iip->iic_rbase];
> +
> + tb = cpm->temp;
> + tb = (u_char *)(((uint)tb + 15) & ~15);
> +
> + /* do a simple read */
> + tb[0] = (addr << 1) | 1; /* device address (+ read) */
> + len = 2;
> +
> + dma_cache_wback_inv (tb, 1);
> +
> + tbdf->cbd_bufaddr = __pa(tb);
> + tbdf->cbd_datlen = len;
> + tbdf->cbd_sc =
> + BD_SC_READY | BD_SC_INTRPT | BD_SC_LAST |
> + BD_SC_WRAP | BD_IIC_START;
> +
> + rbdf->cbd_datlen = 0;
> + rbdf->cbd_bufaddr = __pa(tb+2);
> + rbdf->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP;
> +
> + local_irq_save(flags);
> + i2c->i2c_i2cmr = 0x13; /* Enable some interupts */
> + i2c->i2c_i2cer = 0xff;
> + i2c->i2c_i2mod |= 1; /* Enable */
> + i2c->i2c_i2com = 0x81; /* Start master */
> +
> + if (cpm_debug > 1) printk(KERN_DEBUG "about to sleep\n");
> +
> + /* wait for IIC transfer */
> + interruptible_sleep_on(&iic_wait);
> + local_irq_restore(flags);
> + if (signal_pending(current))
> + return -EIO;
> +
> + if (cpm_debug > 1) printk(KERN_DEBUG "back from sleep\n");
> +
> + if (tbdf->cbd_sc & BD_SC_NAK) {
> + if (cpm_debug > 1) printk(KERN_DEBUG "IIC try; no ack\n");
> + return 0;
> + }
> +
> + if (tbdf->cbd_sc & BD_SC_READY) {
> + printk(KERN_INFO "IIC try; complete but tbuf ready\n");
> + }
> +
> + return 1;
> +}
> +#endif
> +
> +static int cpm2_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
> +{
> + struct i2c_msg *pmsg;
> + int i;
> + int ret = 0;
> + struct mpc_i2c *mpc_i2c = i2c_get_adapdata(adap);
> + struct i2c_algo_cpm2_data *data = mpc_i2c->data;
> + u_char addr;
> +
> + for (i = 0; i < num; i++) {
> + pmsg = &msgs[i];
> +
> + if (cpm_debug)
> + printk(KERN_DEBUG "i2c-cpm2.o: "
> + "#%d addr=0x%x flags=0x%x len=%d\n",
> + i, pmsg->addr, pmsg->flags, pmsg->len);
> +
> + addr = pmsg->addr << 1;
> + if (pmsg->flags & I2C_M_RD )
> + addr |= 1;
> + if (pmsg->flags & I2C_M_REV_DIR_ADDR )
> + addr ^= 1;
> +
> + if (!(pmsg->flags & I2C_M_NOSTART)) {
> + }
> + if (pmsg->flags & I2C_M_RD ) {
> + /* read bytes into buffer*/
> + ret = cpm_iic_read(data, addr, pmsg->buf, pmsg->len);
> + if (cpm_debug)
> + printk(KERN_DEBUG "i2c-cpm2.o: read %d bytes\n", ret);
> + if (ret < pmsg->len ) {
> + return (ret<0)? ret : -EREMOTEIO;
> + }
> + } else {
> + /* write bytes from buffer */
> + ret = cpm_iic_write(data, addr, pmsg->buf, pmsg->len);
> + if (cpm_debug)
> + printk(KERN_DEBUG "i2c-cpm2.o: wrote %d\n", ret);
> + if (ret < pmsg->len ) {
> + return (ret<0) ? ret : -EREMOTEIO;
> + }
> + }
> + }
> + return (ret < 0) ? ret : num;
> +}
> +
> +static u32 cpm2_functionality(struct i2c_adapter *adap)
> +{
> + return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR |
> + I2C_FUNC_PROTOCOL_MANGLING;
> +}
> +
> +static struct i2c_algorithm cpm2_algo = {
> + .master_xfer = cpm2_xfer,
> + .functionality = cpm2_functionality,
> +};
> +
> +static struct i2c_adapter cpm2_ops = {
> + .owner = THIS_MODULE,
> + .name = "MPC CPM2 adapter",
> + .id = I2C_HW_MPC82xx,
> + .algo = &cpm2_algo,
> + .class = I2C_CLASS_HWMON,
> + .timeout = 1,
> + .retries = 1
> +};
> +
> +static int fsl_i2c_probe(struct device *device)
> +{
> + int result = 0;
> + struct mpc_i2c *i2c;
> + struct platform_device *pdev = to_platform_device(device);
> + struct fsl_i2c_platform_data *pdata;
> +
> + pdata = (struct fsl_i2c_platform_data *) pdev->dev.platform_data;
> +
> + if (!(i2c = kmalloc(sizeof(*i2c), GFP_KERNEL))) {
> + return -ENOMEM;
> + }
> + memset(i2c, 0, sizeof(*i2c));
> +
> + i2c->data = &cpm2_data;
> + /* CPM Plattform initialisation */
> + cpm2_iic_init (i2c->data);
> + /* CPM init */
> + cpm_iic_init (i2c->data);
> + i2c->irq = platform_get_irq(pdev, 0);
> +
> + if (i2c->irq != 0) {
> + if ((result = request_irq(i2c->irq, cpm2_i2c_isr,
> + SA_SHIRQ, "i2c-mpc", i2c)) < 0) {
> + printk(KERN_ERR
> + "i2c-mpc - failed to attach interrupt\n");
> + goto fail_irq;
> + }
> + }
> + dev_set_drvdata(device, i2c);
> +
> + i2c->adap = cpm2_ops;
> + i2c_set_adapdata(&i2c->adap, i2c);
> + i2c->adap.dev.parent = &pdev->dev;
> + if ((result = i2c_add_adapter(&i2c->adap)) < 0) {
> + printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
> + goto fail_add;
> + }
> +
> + return result;
> +
> + fail_add:
> + if (i2c->irq != 0)
> + free_irq(i2c->irq, NULL);
> + fail_irq:
> + kfree(i2c);
> + return result;
> +};
> +
> +static int fsl_i2c_remove(struct device *device)
> +{
> + struct mpc_i2c *i2c = dev_get_drvdata(device);
> +
> + cpm_dpfree (i2c->data->dp_addr);
> +
> + i2c_del_adapter(&i2c->adap);
> + dev_set_drvdata(device, NULL);
> +
> + if (i2c->irq != 0)
> + free_irq(i2c->irq, i2c);
> +
> + kfree(i2c);
> + return 0;
> +};
> +
> +/* Structure for a device driver */
> +static struct device_driver fsl_i2c_driver = {
> + .name = "fsl-cpm-i2c",
> + .bus = &platform_bus_type,
> + .probe = fsl_i2c_probe,
> + .remove = fsl_i2c_remove,
> +};
> +
> +static int __init fsl_i2c_init(void)
> +{
> + return driver_register(&fsl_i2c_driver);
> +}
> +
> +static void __exit fsl_i2c_exit(void)
> +{
> + driver_unregister(&fsl_i2c_driver);
> +}
> +
> +module_init(fsl_i2c_init);
> +module_exit(fsl_i2c_exit);
> +
> +MODULE_AUTHOR("Heiko Schocher <hs@denx.de>");
> +MODULE_DESCRIPTION
> + ("I2C-Bus adapter for MPC with CPM2 processors");
> +MODULE_LICENSE("GPL");
> diff --git a/include/linux/i2c-algo-cpm2.h b/include/linux/i2c-algo-cpm2.h
> new file mode 100644
> index 0000000..f03277c
> --- /dev/null
> +++ b/include/linux/i2c-algo-cpm2.h
> @@ -0,0 +1,26 @@
> +/* ----------------------------------------------------------- */
> +/* i2c-algo-cpm2.h i2c driver algorithms for MPC with CPM2 */
> +/* ----------------------------------------------------------- */
> +
> +/* $Id$ */
> +
> +#ifndef I2C_ALGO_CPM2_H
> +#define I2C_ALGO_CPM2_H 1
> +
> +#include <linux/i2c.h>
> +
> +struct i2c_algo_cpm2_data {
> + uint dp_addr;
> + int reloc;
> + volatile i2c_cpm2_t *i2c;
> + volatile iic_t *iip;
> + volatile cpm_cpm2_t *cp;
> +
> + int (*setisr) (int irq,
> + void (*func)(int, void (*)(void *), void *),
> + void *data);
> +
> + u_char temp[513];
> +};
> +
> +#endif /* I2C_ALGO_CPM2_H */
> diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
> index 1543daa..e7a12cc 100644
> --- a/include/linux/i2c-id.h
> +++ b/include/linux/i2c-id.h
> @@ -223,6 +223,9 @@
> /* --- PowerPC on-chip adapters */
> #define I2C_HW_OCP 0x120000 /* IBM on-chip I2C adapter */
>
> +/* --- MPC82xx PowerPC adapters */
> +#define I2C_HW_MPC82xx 0x100002 /* MPC82xx I2C adapter */
> +
> /* --- Broadcom SiByte adapters */
> #define I2C_HW_SIBYTE 0x150000
>
>
^ permalink raw reply
* [PATCH] powerpc: Fix suboptimal uImage target
From: Kumar Gala @ 2005-11-23 19:03 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, linux-kernel
Sam Ravnborg pointed out that calling if_changed was redudant in the
rule since we a prerequisite had to have change for us to get there.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
commit b3b2fd54eab2d87dcc29db5c537b5aee2a7732ce
tree 0eba205e3944aca7095fb2723f95e9799be5c853
parent 74dc65dbfa00bb69929c34da2ae788868aaae399
author Kumar Gala <galak@kernel.crashing.org> Wed, 23 Nov 2005 13:04:48 -0600
committer Kumar Gala <galak@kernel.crashing.org> Wed, 23 Nov 2005 13:04:48 -0600
arch/powerpc/boot/Makefile | 2 +-
arch/ppc/boot/images/Makefile | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index dfc7eac..22726ae 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -169,7 +169,7 @@ $(obj)/vmlinux.gz: $(obj)/vmlinux.bin FO
$(obj)/uImage: $(obj)/vmlinux.gz
$(Q)rm -f $@
- $(call if_changed,uimage)
+ $(call cmd,uimage)
@echo -n ' Image: $@ '
@if [ -f $@ ]; then echo 'is ready' ; else echo 'not made'; fi
diff --git a/arch/ppc/boot/images/Makefile b/arch/ppc/boot/images/Makefile
index 532e7ef..58415d5 100644
--- a/arch/ppc/boot/images/Makefile
+++ b/arch/ppc/boot/images/Makefile
@@ -26,7 +26,7 @@ quiet_cmd_uimage = UIMAGE $@
targets += uImage
$(obj)/uImage: $(obj)/vmlinux.gz
$(Q)rm -f $@
- $(call if_changed,uimage)
+ $(call cmd,uimage)
@echo -n ' Image: $@ '
@if [ -f $@ ]; then echo 'is ready' ; else echo 'not made'; fi
^ permalink raw reply related
* Re: [PATCH] powerpc: Add support for building uImages
From: Kumar Gala @ 2005-11-23 19:02 UTC (permalink / raw)
To: Sam Ravnborg; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <20051123185523.GC8336@mars.ravnborg.org>
On Wed, 23 Nov 2005, Sam Ravnborg wrote:
> On Wed, Nov 23, 2005 at 12:43:15PM -0600, Kumar Gala wrote:
> > +
> > +$(obj)/uImage: $(obj)/vmlinux.gz
> > + $(Q)rm -f $@
> > + $(call if_changed,uimage)
> > + @echo -n ' Image: $@ '
> > + @if [ -f $@ ]; then echo 'is ready' ; else echo 'not made'; fi
>
> The above is suboptimal. The $(call if_changed,uimage) will execute
> $(cmd_uimage) if 1) prerequisites has changed or 2) the command to execute
> has changed.
> In the above case 1) is always true, otherwise we would not reach the
> statement. So change it to $(call cmd,uimage) is the correct way.
>
> The 'bug' is also present in ppc/boot/images
thanks. I'll send a follow up patch to fix both cases.
- kumar
^ permalink raw reply
* Re: [PATCH] Fix USB suspend/resume crasher
From: David Brownell @ 2005-11-23 18:58 UTC (permalink / raw)
To: Greg KH; +Cc: Andrew Morton, Linux Kernel list, linuxppc-dev list, Alan Stern
In-Reply-To: <20051123171041.GC26149@kroah.com>
On Wednesday 23 November 2005 9:10 am, Greg KH wrote:
> On Wed, Nov 23, 2005 at 02:08:07PM +1100, Benjamin Herrenschmidt wrote:
> > This patch applies on top of
Ben, I'll look at this patch today.
> > the patch that moves the PowerMac specific
> > code out of ohci-pci.c to hcd-pci.c where it belongs. This patch isn't
> > upstream yet for reasons I don't fully understand (why does USB stuffs
> > has such a high latency for going upstream ?), I'm sending it as a reply
> > to this email for completeness.
>
> Sorry, I hadn't seen it, otherwise I would have sent it on.
>
> David, are you ok with the patch Ben sent on as a followup?
It should be the same as
http://www.kernel.org/pub/linux/kernel/people/gregkh/gregkh-2.6/gregkh-04-usb/usb-ohci-move-ppc-asic-tweaks-nearer-pci.patch
which is already in your queue, just it's not yet upstream.
I posted it before RC1 came out, but evidently not before
your RC1-merge-to-Linus window had closed.
- Dave
^ permalink raw reply
* [PATCH] powerpc: Add support for building uImages
From: Kumar Gala @ 2005-11-23 18:43 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, linux-kernel
powerpc: Add support for building uImages
Add support to build a kernel image bootable by u-boot.
Most of the makefile foo is taken from arch/ppc/boot/images/Makefile
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
commit 74dc65dbfa00bb69929c34da2ae788868aaae399
tree 2344f27b9a84a2c3212c4dcc070f6b0cebb906ef
parent 8573cff663f4df7af110c9781ccefd6b12522a2f
author Kumar Gala <galak@kernel.crashing.org> Wed, 23 Nov 2005 12:44:01 -0600
committer Kumar Gala <galak@kernel.crashing.org> Wed, 23 Nov 2005 12:44:01 -0600
arch/powerpc/Makefile | 2 +-
arch/powerpc/boot/Makefile | 30 ++++++++++++++++++++++++++++++
2 files changed, 31 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index a13eb57..5f80e58 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -151,7 +151,7 @@ CPPFLAGS_vmlinux.lds := -Upowerpc
# All the instructions talk about "make bzImage".
bzImage: zImage
-BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm
+BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm uImage
.PHONY: $(BOOT_TARGETS)
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 9770f58..dfc7eac 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -143,6 +143,36 @@ $(obj)/zImage.initrd: $(obj)/zImage.init
@cp -f $< $@
$(call if_changed,addnote)
+#-----------------------------------------------------------
+# build u-boot images
+#-----------------------------------------------------------
+quiet_cmd_mygzip = GZIP $@
+cmd_mygzip = gzip -f -9 < $< > $@.$$$$ && mv $@.$$$$ $@
+
+quiet_cmd_objbin = OBJCOPY $@
+ cmd_objbin = $(OBJCOPY) -O binary $< $@
+
+quiet_cmd_uimage = UIMAGE $@
+ cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A ppc -O linux -T kernel \
+ -C gzip -a 00000000 -e 00000000 -n 'Linux-$(KERNELRELEASE)' \
+ -d $< $@
+
+MKIMAGE := $(srctree)/scripts/mkuboot.sh
+targets += uImage
+extra-y += vmlinux.bin vmlinux.gz
+
+$(obj)/vmlinux.bin: vmlinux FORCE
+ $(call if_changed,objbin)
+
+$(obj)/vmlinux.gz: $(obj)/vmlinux.bin FORCE
+ $(call if_changed,mygzip)
+
+$(obj)/uImage: $(obj)/vmlinux.gz
+ $(Q)rm -f $@
+ $(call if_changed,uimage)
+ @echo -n ' Image: $@ '
+ @if [ -f $@ ]; then echo 'is ready' ; else echo 'not made'; fi
+
install: $(CONFIGURE) $(BOOTIMAGE)
sh -x $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" vmlinux System.map "$(INSTALL_PATH)" "$(BOOTIMAGE)"
^ permalink raw reply related
* Re: [PATCH] ppc32: 8xx board-specific platform stuff for fs_enet
From: 'Aristeu Sergio Rozanski Filho' @ 2005-11-23 18:25 UTC (permalink / raw)
To: Marcelo Tosatti; +Cc: linuxppc-embedded list, Paul Mackerras
In-Reply-To: <20051123120033.GA3551@logos.cnet>
> However there are some PHY descriptions in fec.c which are missing from
> fs_enet - we'd better make sure to have them all in the new driver
> before removing the old one.
>
> Aris, would you mind looking into this?
I'm on it
--
Aristeu
^ permalink raw reply
* Re: [PATCH] 8xx PCMCIA: support for MPC885ADS and MPC866ADS
From: Kumar Gala @ 2005-11-23 18:42 UTC (permalink / raw)
To: Marcelo Tosatti; +Cc: Vitaly Bordug, linuxppc-embedded list
In-Reply-To: <20051123125326.GB4526@logos.cnet>
On Nov 23, 2005, at 6:53 AM, Marcelo Tosatti wrote:
> Hi Vitaly,
>
> On Fri, Nov 18, 2005 at 07:42:51PM +0300, Vitaly Bordug wrote:
>> This adds adds PCMCIA supported for both MPC885ADS and MPC866ADS.
>>
>> This is established not together with FADS, because 885 does not have
>> io_block_mapping() for BCSR area.
>> Also, some cleanups done both for 885ADS and MBX.
>>
>> Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
>
> <snip>
>
>> + bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
>
> Shouldnt you handle ioremap() failure? Most 85xx code written
> by Kumar also does not.
Ok, I'll take a hint to go audit my code for ioremap() returns :)
- kumar
^ permalink raw reply
* RE: [PATCH] I2C: Add I2C support for the MPC8260
From: Heiko Schocher @ 2005-11-23 18:29 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, lm-sensors
In-Reply-To: <72C7A068-2C84-49BB-957A-1D1A725949D0@kernel.crashing.org>
Hello
On Wednesday, November 23, 2005 8:01 AM Kumar Gala wrote:
> Can we rename the driver from mpc8260 -> cpm2. The driver should work
> on any device that has a "CPM2" which includes a number of MPC82xx
> and MPC85xx processors. So calling it and its config options, etc
> MPC8260 is going to be confusing to users.
[PATCH] I2C: Add I2C Bus support for MPC with CPM2.
Signed-off-by: Heiko Schocher <hs@denx.de>
---
drivers/i2c/busses/Kconfig | 10 +
drivers/i2c/busses/Makefile | 1
drivers/i2c/busses/i2c-cpm2.c | 616 +++++++++++++++++++++++++++++++++++++++++
include/linux/i2c-algo-cpm2.h | 26 ++
include/linux/i2c-id.h | 3
5 files changed, 656 insertions(+), 0 deletions(-)
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 4010fe9..2acb4cc 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -270,6 +270,16 @@ config I2C_MPC
This driver can also be built as a module. If so, the module
will be called i2c-mpc.
+config I2C_CPM2
+ tristate "CPM2"
+ depends on I2C && PPC32
+ help
+ If you say yes to this option, support will be included for the
+ I2C interface on PPC with CPM2
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-cpm2.
+
config I2C_NFORCE2
tristate "Nvidia nForce2, nForce3 and nForce4"
depends on I2C && PCI
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index f1df00f..a4c1b69 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -43,6 +43,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o
obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o
obj-$(CONFIG_SCx200_ACB) += scx200_acb.o
obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o
+obj-$(CONFIG_I2C_CPM2) += i2c-cpm2.o
ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
EXTRA_CFLAGS += -DDEBUG
diff --git a/drivers/i2c/busses/i2c-cpm2.c b/drivers/i2c/busses/i2c-cpm2.c
new file mode 100644
index 0000000..80dc532
--- /dev/null
+++ b/drivers/i2c/busses/i2c-cpm2.c
@@ -0,0 +1,616 @@
+/*
+ * (C) Copyright 2005
+ * Heiko Schocher <hs@denx.de>
+ *
+ * This is a combined i2c adapter and algorithm driver for
+ * PPC with CPM2
+ *
+ * Release 0.1
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/config.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/pci.h>
+#include <asm/io.h>
+#include <linux/fsl_devices.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+#include <asm/immap_cpm2.h>
+#include <asm/mpc8260.h>
+#include <asm/cpm2.h>
+
+#include <linux/i2c-algo-cpm2.h>
+#include <linux/platform_device.h>
+
+#define CPM_MAX_READ 513
+
+static wait_queue_head_t iic_wait;
+static ushort r_tbase, r_rbase;
+
+int cpm_scan = 0;
+int cpm_debug = 0;
+
+struct mpc_i2c {
+ u32 interrupt;
+ wait_queue_head_t queue;
+ struct i2c_adapter adap;
+ int irq;
+ u32 flags;
+ struct i2c_algo_cpm2_data *data;
+};
+
+static struct i2c_algo_cpm2_data cpm2_data;
+
+static void
+cpm2_iic_init(struct i2c_algo_cpm2_data *data)
+{
+ volatile cpm_cpm2_t *cp;
+ volatile cpm2_map_t *immap;
+
+ cp = cpmp; /* Get pointer to Communication Processor */
+ immap = (cpm2_map_t *)CPM_MAP_ADDR; /* and to internal registers */
+
+ *(ushort *)(&immap->im_dprambase[PROFF_I2C_BASE]) = PROFF_I2C;
+ data->iip = (iic_t *)&immap->im_dprambase[PROFF_I2C];
+
+ data->i2c = (i2c_cpm2_t *)&(immap->im_i2c);
+ data->cp = cp;
+
+ /* Initialize Port D IIC pins.
+ */
+ immap->im_ioport.iop_ppard |= 0x00030000;
+ immap->im_ioport.iop_pdird &= ~0x00030000;
+ immap->im_ioport.iop_podrd |= 0x00030000;
+ immap->im_ioport.iop_psord |= 0x00030000;
+
+ /* Allocate space for two transmit and two receive buffer
+ * descriptors in the DP ram.
+ */
+ data->dp_addr = cpm_dpalloc(sizeof(cbd_t) * 4, 8);
+
+ /* ptr to i2c area */
+ data->i2c = (i2c_cpm2_t *)&(((cpm2_map_t *)CPM_MAP_ADDR)->im_i2c);
+}
+
+static irqreturn_t cpm2_i2c_isr(int irq, void *dev_id, struct pt_regs *regs)
+{
+ struct mpc_i2c *mpc_i2c = dev_id;
+ struct i2c_algo_cpm2_data *cpm_adap = mpc_i2c->data;
+ volatile i2c_cpm2_t *i2c = cpm_adap->i2c;
+
+ if (cpm_debug > 1)
+ printk(KERN_DEBUG "cpm_iic_interrupt(dev_id=%p)\n", dev_id);
+
+ /* Clear interrupt.
+ */
+ i2c->i2c_i2cer = 0xff;
+
+ /* Get 'me going again.
+ */
+ wake_up_interruptible(&iic_wait);
+ return IRQ_HANDLED;
+}
+
+
+static void
+cpm_iic_init(struct i2c_algo_cpm2_data *cpm_adap)
+{
+ volatile iic_t *iip = cpm_adap->iip;
+ volatile i2c_cpm2_t *i2c = cpm_adap->i2c;
+
+ if (cpm_debug) printk(KERN_DEBUG "cpm_iic_init() - iip=%p\n",iip);
+
+ /* Initialize the parameter ram.
+ * We need to make sure many things are initialized to zero,
+ * especially in the case of a microcode patch.
+ */
+ iip->iic_rstate = 0;
+ iip->iic_rdp = 0;
+ iip->iic_rbptr = 0;
+ iip->iic_rbc = 0;
+ iip->iic_rxtmp = 0;
+ iip->iic_tstate = 0;
+ iip->iic_tdp = 0;
+ iip->iic_tbptr = 0;
+ iip->iic_tbc = 0;
+ iip->iic_txtmp = 0;
+
+ /* Set up the IIC parameters in the parameter ram.
+ */
+ iip->iic_tbase = r_tbase = cpm_adap->dp_addr;
+ iip->iic_rbase = r_rbase = cpm_adap->dp_addr + sizeof(cbd_t)*2;
+
+ iip->iic_tfcr = CPMFCR_GBL | CPMFCR_EB;
+ iip->iic_rfcr = CPMFCR_GBL | CPMFCR_EB;
+
+ /* Set maximum receive size.
+ */
+ iip->iic_mrblr = CPM_MAX_READ;
+
+ /* Initialize Tx/Rx parameters.
+ */
+ {
+ volatile cpm_cpm2_t *cp = cpm_adap->cp;
+ cp->cp_cpcr =
+ mk_cr_cmd(CPM_CR_I2C_PAGE, CPM_CR_I2C_SBLOCK, 0x00, CPM_CR_INIT_TRX) | CPM_CR_FLG;
+ while (cp->cp_cpcr & CPM_CR_FLG);
+ }
+
+ /* Select an arbitrary address. Just make sure it is unique.
+ */
+ i2c->i2c_i2add = 0x34;
+
+ /* Divider is 2 * ( 15 + 3 )
+ */
+ i2c->i2c_i2brg = 0x0f;
+
+ /* Pre-divider is BRGCLK/4
+ */
+ i2c->i2c_i2mod = 0x06;
+
+ /* Disable interrupts.
+ */
+ i2c->i2c_i2cmr = 0;
+ i2c->i2c_i2cer = 0xff;
+
+ init_waitqueue_head(&iic_wait);
+}
+
+
+#if 0
+static int
+cpm_iic_shutdown(struct i2c_algo_cpm2_data *cpm_adap)
+{
+ volatile i2c_cpm2_t *i2c = cpm_adap->i2c;
+
+ /* Shut down IIC.
+ */
+ i2c->i2c_i2mod = 0;
+ i2c->i2c_i2cmr = 0;
+ i2c->i2c_i2cer = 0xff;
+
+ return(0);
+}
+#endif
+
+static void
+cpm_reset_iic_params(volatile iic_t *iip)
+{
+ iip->iic_tbase = r_tbase;
+ iip->iic_rbase = r_rbase;
+
+ iip->iic_tfcr = CPMFCR_GBL | CPMFCR_EB;
+ iip->iic_rfcr = CPMFCR_GBL | CPMFCR_EB;
+
+ iip->iic_mrblr = CPM_MAX_READ;
+
+ iip->iic_rstate = 0;
+ iip->iic_rdp = 0;
+ iip->iic_rbptr = 0;
+ iip->iic_rbc = 0;
+ iip->iic_rxtmp = 0;
+ iip->iic_tstate = 0;
+ iip->iic_tdp = 0;
+ iip->iic_tbptr = 0;
+ iip->iic_tbc = 0;
+ iip->iic_txtmp = 0;
+}
+
+#define BD_SC_NAK ((ushort)0x0004) /* NAK - did not respond */
+#define CPM_CR_CLOSE_RXBD ((ushort)0x0007)
+
+static void force_close(struct i2c_algo_cpm2_data *cpm)
+{
+#if 0
+ volatile cpm_cpm2_t *cp = cpm->cp;
+
+ if (cpm_debug) printk(KERN_DEBUG "force_close()\n");
+ cp->cp_cpcr =
+ mk_cr_cmd(CPM_CR_CH_I2C, CPM_CR_CLOSE_RXBD) |
+ CPM_CR_FLG;
+
+ while (cp->cp_cpcr & CPM_CR_FLG);
+#endif
+}
+
+
+/* Read from IIC...
+ * abyte = address byte, with r/w flag already set
+ */
+static int
+cpm_iic_read(struct i2c_algo_cpm2_data *cpm, u_char abyte, char *buf, int count)
+{
+ volatile cpm2_map_t *immap = (cpm2_map_t *)CPM_MAP_ADDR;
+ volatile iic_t *iip = cpm->iip;
+ volatile i2c_cpm2_t *i2c = cpm->i2c;
+ volatile cbd_t *tbdf, *rbdf;
+ u_char *tb;
+ unsigned long flags;
+
+ if (count >= CPM_MAX_READ)
+ return -EINVAL;
+
+ tbdf = (cbd_t *)&immap->im_dprambase[iip->iic_tbase];
+ rbdf = (cbd_t *)&immap->im_dprambase[iip->iic_rbase];
+
+ /* To read, we need an empty buffer of the proper length.
+ * All that is used is the first byte for address, the remainder
+ * is just used for timing (and doesn't really have to exist).
+ */
+ if (/*cpm->reloc*/0) {
+ cpm_reset_iic_params(iip);
+ }
+ tb = cpm->temp;
+ tb = (u_char *)(((uint)tb + 15) & ~15);
+ tb[0] = abyte; /* Device address byte w/rw flag */
+
+ dma_cache_wback_inv (tb, 1);
+
+ if (cpm_debug) printk(KERN_DEBUG "cpm_iic_read(abyte=0x%x)\n", abyte);
+
+ tbdf->cbd_bufaddr = __pa(tb);
+ tbdf->cbd_datlen = count + 1;
+ tbdf->cbd_sc =
+ BD_SC_READY | BD_SC_INTRPT | BD_SC_LAST |
+ BD_SC_WRAP | BD_IIC_START;
+
+ rbdf->cbd_datlen = 0;
+ rbdf->cbd_bufaddr = __pa(buf);
+ rbdf->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP;
+
+ if (count > 0 && count < CPM_MAX_READ)
+ iip->iic_mrblr = count; /* prevent excessive read */
+
+ dma_cache_inv (buf, count);
+
+ /* Chip bug, set enable here */
+ local_irq_save(flags);
+ i2c->i2c_i2cmr = 0x13; /* Enable some interupts */
+ i2c->i2c_i2cer = 0xff;
+ i2c->i2c_i2mod |= 1; /* Enable */
+ i2c->i2c_i2com = 0x81; /* Start master */
+
+ /* Wait for IIC transfer */
+ interruptible_sleep_on(&iic_wait);
+ local_irq_restore(flags);
+ if (signal_pending(current))
+ return -EIO;
+
+ if (cpm_debug) {
+ printk(KERN_DEBUG "tx sc %04x, rx sc %04x\n",
+ tbdf->cbd_sc, rbdf->cbd_sc);
+ }
+
+ if (tbdf->cbd_sc & BD_SC_NAK) {
+ printk(KERN_INFO "IIC read; no ack\n");
+ return 0;
+ }
+
+ if (rbdf->cbd_sc & BD_SC_EMPTY) {
+ printk(KERN_INFO "IIC read; complete but rbuf empty\n");
+ force_close(cpm);
+ printk(KERN_INFO "tx sc %04x, rx sc %04x\n",
+ tbdf->cbd_sc, rbdf->cbd_sc);
+ }
+
+ if (cpm_debug) printk(KERN_DEBUG "read %d bytes\n", rbdf->cbd_datlen);
+
+ if (rbdf->cbd_datlen < count) {
+ printk(KERN_INFO "IIC read; short, wanted %d got %d\n",
+ count, rbdf->cbd_datlen);
+ return 0;
+ }
+ if (cpm_debug) {
+ int u;
+ for (u = 0; u < count; u++) {
+ printk(KERN_DEBUG "buf[%d] = 0x%x\n", u, buf[u]);
+ }
+ }
+
+
+ return count;
+}
+
+/* Write to IIC...
+ * addr = address byte, with r/w flag already set
+ */
+static int
+cpm_iic_write(struct i2c_algo_cpm2_data *cpm, u_char abyte, char *buf,int count)
+{
+ volatile cpm2_map_t *immap = (cpm2_map_t *)CPM_MAP_ADDR;
+ volatile iic_t *iip = cpm->iip;
+ volatile i2c_cpm2_t *i2c = cpm->i2c;
+ volatile cbd_t *tbdf;
+ u_char *tb;
+ unsigned long flags;
+
+ tb = cpm->temp;
+ tb = (u_char *)(((uint)tb + 15) & ~15);
+ *tb = abyte; /* Device address byte w/rw flag */
+
+ dma_cache_wback_inv (tb, 1);
+ dma_cache_wback_inv (buf, count);
+
+ if (cpm_debug) printk(KERN_DEBUG "cpm_iic_write(abyte=0x%x)\n", abyte);
+ if (cpm_debug) printk(KERN_DEBUG "buf[0] = 0x%x, buf[1] = 0x%x\n", buf[0], buf[1]);
+
+ /* set up 2 descriptors */
+ tbdf = (cbd_t *)&immap->im_dprambase[iip->iic_tbase];
+
+ tbdf[0].cbd_bufaddr = __pa(tb);
+ tbdf[0].cbd_datlen = 1;
+ tbdf[0].cbd_sc = BD_SC_READY | BD_IIC_START;
+
+ tbdf[1].cbd_bufaddr = __pa(buf);
+ tbdf[1].cbd_datlen = count;
+ tbdf[1].cbd_sc = BD_SC_READY | BD_SC_INTRPT | BD_SC_LAST | BD_SC_WRAP;
+
+ /* Chip bug, set enable here */
+ local_irq_save(flags);;
+ i2c->i2c_i2cmr = 0x13; /* Enable some interupts */
+ i2c->i2c_i2cer = 0xff;
+ i2c->i2c_i2mod |= 1; /* Enable */
+ i2c->i2c_i2com = 0x81; /* Start master */
+
+ /* Wait for IIC transfer */
+ interruptible_sleep_on(&iic_wait);
+ local_irq_restore(flags);
+ if (signal_pending(current))
+ return -EIO;
+
+ if (cpm_debug) {
+ printk(KERN_DEBUG "tx0 sc %04x, tx1 sc %04x\n",
+ tbdf[0].cbd_sc, tbdf[1].cbd_sc);
+ }
+
+ if (tbdf->cbd_sc & BD_SC_NAK) {
+ printk(KERN_INFO "IIC write; no ack\n");
+ return 0;
+ }
+
+ if (tbdf->cbd_sc & BD_SC_READY) {
+ printk(KERN_INFO "IIC write; complete but tbuf ready\n");
+ return 0;
+ }
+
+ return count;
+}
+
+#if 0
+/* See if an IIC address exists..
+ * addr = 7 bit address, unshifted
+ */
+static int
+cpm_iic_tryaddress(struct i2c_algo_cpm2_data *cpm, int addr)
+{
+ volatile cpm2_map_t *immap = (cpm2_map_t *)CPM_MAP_ADDR;
+ volatile iic_t *iip = cpm->iip;
+ volatile i2c_cpm2_t *i2c = cpm->i2c;
+ volatile cbd_t *tbdf, *rbdf;
+ u_char *tb;
+ unsigned long flags, len;
+
+ if (cpm_debug > 1)
+ printk(KERN_DEBUG "cpm_iic_tryaddress(cpm=%p,addr=%d)\n", cpm, addr);
+
+ if (cpm_debug && addr == 0) {
+ printk(KERN_DEBUG "iip %p, dp_addr 0x%x\n", cpm->iip, cpm->dp_addr);
+ printk(KERN_DEBUG "iic_tbase %d, r_tbase %d\n", iip->iic_tbase, r_tbase);
+ }
+
+ tbdf = (cbd_t *)&immap->im_dprambase[iip->iic_tbase];
+ rbdf = (cbd_t *)&immap->im_dprambase[iip->iic_rbase];
+
+ tb = cpm->temp;
+ tb = (u_char *)(((uint)tb + 15) & ~15);
+
+ /* do a simple read */
+ tb[0] = (addr << 1) | 1; /* device address (+ read) */
+ len = 2;
+
+ dma_cache_wback_inv (tb, 1);
+
+ tbdf->cbd_bufaddr = __pa(tb);
+ tbdf->cbd_datlen = len;
+ tbdf->cbd_sc =
+ BD_SC_READY | BD_SC_INTRPT | BD_SC_LAST |
+ BD_SC_WRAP | BD_IIC_START;
+
+ rbdf->cbd_datlen = 0;
+ rbdf->cbd_bufaddr = __pa(tb+2);
+ rbdf->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP;
+
+ local_irq_save(flags);
+ i2c->i2c_i2cmr = 0x13; /* Enable some interupts */
+ i2c->i2c_i2cer = 0xff;
+ i2c->i2c_i2mod |= 1; /* Enable */
+ i2c->i2c_i2com = 0x81; /* Start master */
+
+ if (cpm_debug > 1) printk(KERN_DEBUG "about to sleep\n");
+
+ /* wait for IIC transfer */
+ interruptible_sleep_on(&iic_wait);
+ local_irq_restore(flags);
+ if (signal_pending(current))
+ return -EIO;
+
+ if (cpm_debug > 1) printk(KERN_DEBUG "back from sleep\n");
+
+ if (tbdf->cbd_sc & BD_SC_NAK) {
+ if (cpm_debug > 1) printk(KERN_DEBUG "IIC try; no ack\n");
+ return 0;
+ }
+
+ if (tbdf->cbd_sc & BD_SC_READY) {
+ printk(KERN_INFO "IIC try; complete but tbuf ready\n");
+ }
+
+ return 1;
+}
+#endif
+
+static int cpm2_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+{
+ struct i2c_msg *pmsg;
+ int i;
+ int ret = 0;
+ struct mpc_i2c *mpc_i2c = i2c_get_adapdata(adap);
+ struct i2c_algo_cpm2_data *data = mpc_i2c->data;
+ u_char addr;
+
+ for (i = 0; i < num; i++) {
+ pmsg = &msgs[i];
+
+ if (cpm_debug)
+ printk(KERN_DEBUG "i2c-cpm2.o: "
+ "#%d addr=0x%x flags=0x%x len=%d\n",
+ i, pmsg->addr, pmsg->flags, pmsg->len);
+
+ addr = pmsg->addr << 1;
+ if (pmsg->flags & I2C_M_RD )
+ addr |= 1;
+ if (pmsg->flags & I2C_M_REV_DIR_ADDR )
+ addr ^= 1;
+
+ if (!(pmsg->flags & I2C_M_NOSTART)) {
+ }
+ if (pmsg->flags & I2C_M_RD ) {
+ /* read bytes into buffer*/
+ ret = cpm_iic_read(data, addr, pmsg->buf, pmsg->len);
+ if (cpm_debug)
+ printk(KERN_DEBUG "i2c-cpm2.o: read %d bytes\n", ret);
+ if (ret < pmsg->len ) {
+ return (ret<0)? ret : -EREMOTEIO;
+ }
+ } else {
+ /* write bytes from buffer */
+ ret = cpm_iic_write(data, addr, pmsg->buf, pmsg->len);
+ if (cpm_debug)
+ printk(KERN_DEBUG "i2c-cpm2.o: wrote %d\n", ret);
+ if (ret < pmsg->len ) {
+ return (ret<0) ? ret : -EREMOTEIO;
+ }
+ }
+ }
+ return (ret < 0) ? ret : num;
+}
+
+static u32 cpm2_functionality(struct i2c_adapter *adap)
+{
+ return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_10BIT_ADDR |
+ I2C_FUNC_PROTOCOL_MANGLING;
+}
+
+static struct i2c_algorithm cpm2_algo = {
+ .master_xfer = cpm2_xfer,
+ .functionality = cpm2_functionality,
+};
+
+static struct i2c_adapter cpm2_ops = {
+ .owner = THIS_MODULE,
+ .name = "MPC CPM2 adapter",
+ .id = I2C_HW_MPC82xx,
+ .algo = &cpm2_algo,
+ .class = I2C_CLASS_HWMON,
+ .timeout = 1,
+ .retries = 1
+};
+
+static int fsl_i2c_probe(struct device *device)
+{
+ int result = 0;
+ struct mpc_i2c *i2c;
+ struct platform_device *pdev = to_platform_device(device);
+ struct fsl_i2c_platform_data *pdata;
+
+ pdata = (struct fsl_i2c_platform_data *) pdev->dev.platform_data;
+
+ if (!(i2c = kmalloc(sizeof(*i2c), GFP_KERNEL))) {
+ return -ENOMEM;
+ }
+ memset(i2c, 0, sizeof(*i2c));
+
+ i2c->data = &cpm2_data;
+ /* CPM Plattform initialisation */
+ cpm2_iic_init (i2c->data);
+ /* CPM init */
+ cpm_iic_init (i2c->data);
+ i2c->irq = platform_get_irq(pdev, 0);
+
+ if (i2c->irq != 0) {
+ if ((result = request_irq(i2c->irq, cpm2_i2c_isr,
+ SA_SHIRQ, "i2c-mpc", i2c)) < 0) {
+ printk(KERN_ERR
+ "i2c-mpc - failed to attach interrupt\n");
+ goto fail_irq;
+ }
+ }
+ dev_set_drvdata(device, i2c);
+
+ i2c->adap = cpm2_ops;
+ i2c_set_adapdata(&i2c->adap, i2c);
+ i2c->adap.dev.parent = &pdev->dev;
+ if ((result = i2c_add_adapter(&i2c->adap)) < 0) {
+ printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
+ goto fail_add;
+ }
+
+ return result;
+
+ fail_add:
+ if (i2c->irq != 0)
+ free_irq(i2c->irq, NULL);
+ fail_irq:
+ kfree(i2c);
+ return result;
+};
+
+static int fsl_i2c_remove(struct device *device)
+{
+ struct mpc_i2c *i2c = dev_get_drvdata(device);
+
+ cpm_dpfree (i2c->data->dp_addr);
+
+ i2c_del_adapter(&i2c->adap);
+ dev_set_drvdata(device, NULL);
+
+ if (i2c->irq != 0)
+ free_irq(i2c->irq, i2c);
+
+ kfree(i2c);
+ return 0;
+};
+
+/* Structure for a device driver */
+static struct device_driver fsl_i2c_driver = {
+ .name = "fsl-cpm-i2c",
+ .bus = &platform_bus_type,
+ .probe = fsl_i2c_probe,
+ .remove = fsl_i2c_remove,
+};
+
+static int __init fsl_i2c_init(void)
+{
+ return driver_register(&fsl_i2c_driver);
+}
+
+static void __exit fsl_i2c_exit(void)
+{
+ driver_unregister(&fsl_i2c_driver);
+}
+
+module_init(fsl_i2c_init);
+module_exit(fsl_i2c_exit);
+
+MODULE_AUTHOR("Heiko Schocher <hs@denx.de>");
+MODULE_DESCRIPTION
+ ("I2C-Bus adapter for MPC with CPM2 processors");
+MODULE_LICENSE("GPL");
diff --git a/include/linux/i2c-algo-cpm2.h b/include/linux/i2c-algo-cpm2.h
new file mode 100644
index 0000000..f03277c
--- /dev/null
+++ b/include/linux/i2c-algo-cpm2.h
@@ -0,0 +1,26 @@
+/* ----------------------------------------------------------- */
+/* i2c-algo-cpm2.h i2c driver algorithms for MPC with CPM2 */
+/* ----------------------------------------------------------- */
+
+/* $Id$ */
+
+#ifndef I2C_ALGO_CPM2_H
+#define I2C_ALGO_CPM2_H 1
+
+#include <linux/i2c.h>
+
+struct i2c_algo_cpm2_data {
+ uint dp_addr;
+ int reloc;
+ volatile i2c_cpm2_t *i2c;
+ volatile iic_t *iip;
+ volatile cpm_cpm2_t *cp;
+
+ int (*setisr) (int irq,
+ void (*func)(int, void (*)(void *), void *),
+ void *data);
+
+ u_char temp[513];
+};
+
+#endif /* I2C_ALGO_CPM2_H */
diff --git a/include/linux/i2c-id.h b/include/linux/i2c-id.h
index 1543daa..e7a12cc 100644
--- a/include/linux/i2c-id.h
+++ b/include/linux/i2c-id.h
@@ -223,6 +223,9 @@
/* --- PowerPC on-chip adapters */
#define I2C_HW_OCP 0x120000 /* IBM on-chip I2C adapter */
+/* --- MPC82xx PowerPC adapters */
+#define I2C_HW_MPC82xx 0x100002 /* MPC82xx I2C adapter */
+
/* --- Broadcom SiByte adapters */
#define I2C_HW_SIBYTE 0x150000
^ permalink raw reply related
* Re: [PATCH] 8xx PCMCIA: support for MPC885ADS and MPC866ADS
From: Marcelo Tosatti @ 2005-11-23 12:53 UTC (permalink / raw)
To: Vitaly Bordug, Kumar Gala; +Cc: linuxppc-embedded list
In-Reply-To: <437E048B.2020605@dev.rtsoft.ru>
Hi Vitaly,
On Fri, Nov 18, 2005 at 07:42:51PM +0300, Vitaly Bordug wrote:
> This adds adds PCMCIA supported for both MPC885ADS and MPC866ADS.
>
> This is established not together with FADS, because 885 does not have
> io_block_mapping() for BCSR area.
> Also, some cleanups done both for 885ADS and MBX.
>
> Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
<snip>
> + bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
Shouldnt you handle ioremap() failure? Most 85xx code written
by Kumar also does not.
^ permalink raw reply
* RE: [PATCH] MTD: Add support for the PM82x Boards.
From: Heiko Schocher @ 2005-11-23 17:50 UTC (permalink / raw)
To: tglx; +Cc: linuxppc-dev, dwmw2, linux-mtd
In-Reply-To: <1132754409.32542.161.camel@tglx.tec.linutronix.de>
Hello,
i made the changes in the code you suggested to me.
Additional changes:
- I now use the CFI interface (I tested it, and it seems OK
to me)
- MB -> MiB
- Code reworked
[PATCH] MTD: Add support for the PM82x Board.
Included support for the NOR flashes on the Modul,
and for the DiskOnChip on the Board.
Signed-off-by: Heiko Schocher <hs@denx.de>
---
drivers/mtd/maps/Kconfig | 6 +
drivers/mtd/maps/Makefile | 1
drivers/mtd/maps/pm82x.c | 337 +++++++++++++++++++++++++++++++++++++++++
drivers/mtd/nand/diskonchip.c | 4
4 files changed, 348 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 846a533..237abe8 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -256,6 +256,12 @@ config MTD_SBC8240
Flash access on the SBC8240 board from Wind River. See
<http://www.windriver.com/products/sbc8240/>
+config MTD_PM82X
+ tristate "Flash device on PM82X Boards"
+ depends on PPC32 && 6xx && 8260 && MTD_COMPLEX_MAPPINGS && MTD_PARTITIONS
+ help
+ Flash access on the PM82X boards from Microsys.
+
config MTD_TQM8XXL
tristate "CFI Flash device mapped on TQM8XXL"
depends on MTD_CFI && TQM8xxL
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index 7d9e940..e3733b1 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -73,3 +73,4 @@ obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
obj-$(CONFIG_MTD_PQ2FADS) += pq2fads.o
obj-$(CONFIG_MTD_MTX1) += mtx-1_flash.o
obj-$(CONFIG_MTD_TQM834x) += tqm834x.o
+obj-$(CONFIG_MTD_PM82X) += pm82x.o
diff --git a/drivers/mtd/maps/pm82x.c b/drivers/mtd/maps/pm82x.c
new file mode 100644
index 0000000..840fc29
--- /dev/null
+++ b/drivers/mtd/maps/pm82x.c
@@ -0,0 +1,337 @@
+/*
+ * Copyright(C) 2005
+ * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
+ *
+ * Copyright(C) 2005
+ * Josef Wagner, MicroSys GmbH <wagner@microsys.de>
+ *
+ * This code is GPLed
+ *
+ */
+
+/*
+ * PM825/PM826 uses 4 x Intel 28F160C3B (16 Mbit)
+ * 4 x Intel 28F160C3 (16 Mbit) in one bank (64 bit bankwidth)
+ * for a total of 8MiB flash
+ *
+ * PM827/PM828 uses 4 x Intel 28F640C3 (64 Mbit)
+ * in one bank (64 bit bankwidth)
+ * for a total of 32MiB flash
+
+ * Thus we have to chose:
+ * - Support 64-bit bankwidth => CONFIG_MTD_CFI_B8
+ * - Support 4-chip flash interleave => CONFIG_MTD_CFI_I4
+*/
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <asm/io.h>
+#include <asm/ppcboot.h>
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/partitions.h>
+
+#define FLASH_BANK_MAX 1
+
+/* The "residual" data board information structure the boot loader
+ * hands to us.
+ */
+extern unsigned char __res[];
+
+/* trivial struct to describe partition information */
+struct mtd_part_def
+{
+ int nums;
+ unsigned char *type;
+ struct mtd_partition* mtd_part;
+};
+
+static struct mtd_info* mtd_banks[FLASH_BANK_MAX];
+static struct map_info* map_banks[FLASH_BANK_MAX];
+static struct mtd_part_def part_banks[FLASH_BANK_MAX];
+static unsigned long num_banks;
+static __iomem void *start_scan_addr;
+
+static map_word pm82x_read64(struct map_info *map, unsigned long ofs)
+{
+ map_word val;
+ val.x[0] = *((volatile __u32 *)(map->map_priv_1 + ofs));
+ val.x[1] = *(((volatile __u32 *)(map->map_priv_1 + ofs)) + 1);
+ return val;
+}
+
+static void pm82x_copy_from(struct map_info *map,
+ void *to, unsigned long from, ssize_t len)
+{
+ memcpy_fromio(to, (void *)(map->map_priv_1 + from), len);
+}
+
+static void pm82x_write64 (struct map_info *map, map_word map_d,
+ unsigned long adr)
+{
+ ulong addr = map->map_priv_1 + adr;
+ __u64 d = ((__u64)map_d.x[0] << 32) + map_d.x[1];
+ __u64 * data = &d;
+ ulong flags;
+ volatile ulong msr;
+ ulong saved_msr;
+ volatile long saved_fr[2];
+
+ local_irq_save (flags);
+
+ __asm__ __volatile__ ("mfmsr %0" : "=r" (msr):);
+ saved_msr = msr;
+ msr |= MSR_FP;
+ msr &= ~(MSR_FE0 | MSR_FE1);
+
+ __asm__ __volatile__ (
+ "mtmsr %0\n"
+ "isync\n"
+ :
+ : "r" (msr));
+
+ __asm__ __volatile__ (
+ "stfd 1, 0(%2)\n"
+ "lfd 1, 0(%0)\n"
+ "stfd 1, 0(%1)\n"
+ "lfd 1, 0(%2)\n"
+ :
+ : "r" (data), "r" (addr), "b" (saved_fr)
+ );
+
+ __asm__ __volatile__ (
+ "mtmsr %0\n"
+ "isync\n"
+ :
+ : "r" (saved_msr));
+
+ local_irq_restore (flags);
+}
+
+static void pm82x_copy_to(struct map_info *map,
+ unsigned long to, const void *from, ssize_t len)
+{
+ memcpy_toio((void *)(map->map_priv_1 + to), from, len);
+}
+
+/*
+ * The following defines the partition layout of PM825/PM826 boards.
+ *
+ * See include/linux/mtd/partitions.h for definition of the
+ * mtd_partition structure.
+ *
+ */
+
+#ifdef CONFIG_MTD_PARTITIONS
+/* partition definition for first (and only) flash bank
+ * also ref. to "drivers/char/flash_config.c"
+ */
+static struct mtd_partition pm82x_partitions_8M[] = {
+ {
+ .name = "U-Boot", /* U-Boot image */
+ .offset = 0x00000000,
+ .size = 0x00040000, /* 256 KB */
+ },
+ {
+ .name = "kernel", /* Linux kernel image */
+ .offset = 0x00040000,
+ .size = 0x000C0000, /* 768 KB */
+ },
+ {
+ .name = "ramdisk", /* Ramdisk image */
+ .offset = 0x00100000,
+ .size = 0x00300000, /* 3 MiB */
+ },
+ {
+ .name = "user", /* User file system */
+ .offset = 0x00400000,
+ .size = 0x00400000, /* 4 MiB */
+ },
+};
+
+static struct mtd_partition pm82x_partitions_32M[] = {
+ {
+ .name = "U-Boot", /* U-Boot image */
+ .offset = 0x00000000,
+ .size = 0x00040000, /* 256 KB */
+ },
+ {
+ .name = "kernel", /* Linux kernel image */
+ .offset = 0x00040000,
+ .size = 0x000C0000, /* 768 KB */
+ },
+ {
+ .name = "ramdisk", /* Ramdisk image */
+ .offset = 0x00100000,
+ .size = 0x00300000, /* 3 MiB */
+ },
+ {
+ .name = "user", /* User file system */
+ .offset = 0x00400000,
+ .size = 0x01C00000, /* 28 MiB */
+ },
+};
+
+#endif /* CONFIG_MTD_PARTITIONS */
+
+int __init init_pm82x_mtd(void)
+{
+ int idx = 0, ret = 0;
+ unsigned long flash_addr, flash_size, mtd_size = 0;
+
+ /* pointer to PM82x board info data */
+ bd_t *bd = (bd_t *)__res;
+
+#ifdef CONFIG_MTD_CMDLINE_PARTS
+ int n;
+ const char *part_probes[] = { "cmdlinepart", NULL };
+#endif
+
+ flash_addr = bd->bi_flashstart;
+ flash_size = bd->bi_flashsize;
+
+ /* request maximum flash size address space */
+ start_scan_addr = ioremap(flash_addr, flash_size);
+ if (!start_scan_addr) {
+ printk(KERN_ERR "%s: Failed to ioremap address: 0x%lx\n",
+ __FUNCTION__, flash_addr);
+ return -EIO;
+ }
+
+ for(idx = 0 ; idx < FLASH_BANK_MAX ; idx++) {
+ if (mtd_size >= flash_size)
+ break;
+
+ pr_debug ("%s: chip probing count %d\n", __FUNCTION__, idx);
+
+ map_banks[idx] = kmalloc(sizeof(struct map_info) + 16,
+ GFP_KERNEL);
+ if (map_banks[idx] == NULL) {
+ ret = -ENOMEM;
+ goto error_mem;
+ }
+ memset(map_banks[idx]->name, 0, 16);
+ sprintf(map_banks[idx]->name, "PM82x-%d", idx);
+ map_banks[idx]->size = flash_size;
+ map_banks[idx]->bankwidth = 8;
+ map_banks[idx]->read = pm82x_read64;
+ map_banks[idx]->copy_from = pm82x_copy_from;
+ map_banks[idx]->write = pm82x_write64;
+ map_banks[idx]->copy_to = pm82x_copy_to;
+ map_banks[idx]->map_priv_1= (unsigned long)
+ start_scan_addr + ((idx > 0) ?
+ (mtd_banks[idx-1] ? mtd_banks[idx-1]->size : 0) : 0);
+
+ /* start to probe flash chips */
+ mtd_banks[idx] = do_map_probe("cfi_probe", map_banks[idx]);
+ if (mtd_banks[idx]) {
+ mtd_banks[idx]->owner = THIS_MODULE;
+ mtd_size += mtd_banks[idx]->size;
+ num_banks++;
+ pr_debug ("%s: bank %ld, name: %s, size: %d bytes \n",
+ __FUNCTION__,
+ num_banks,
+ mtd_banks[idx]->name,
+ mtd_banks[idx]->size);
+ }
+ }
+
+ /* no supported flash chips found */
+ if (!num_banks) {
+ printk(KERN_ERR "PM82x: No supported flash chips found!\n");
+ ret = -ENXIO;
+ goto error_mem;
+ }
+
+#ifdef CONFIG_MTD_PARTITIONS
+ /*
+ * Select static partition definitions
+ */
+ if (flash_size == 0x800000) {
+ part_banks[0].mtd_part = pm82x_partitions_8M;
+ part_banks[0].nums = ARRAY_SIZE(pm82x_partitions_8M);
+ } else {
+ part_banks[0].mtd_part = pm82x_partitions_32M;
+ part_banks[0].nums = ARRAY_SIZE(pm82x_partitions_32M);
+ }
+ part_banks[0].type = "static image";
+
+ for(idx = 0; idx < num_banks ; idx++) {
+#ifdef CONFIG_MTD_CMDLINE_PARTS
+ n = parse_mtd_partitions(mtd_banks[idx],
+ part_probes,
+ &part_banks[idx].mtd_part,
+ 0);
+ pr_debug ("%s: %d command line partitions on bank %d\n",
+ __FUNCTION__, n, idx);
+ if (n > 0) {
+ part_banks[idx].type = "command line";
+ part_banks[idx].nums = n;
+ }
+#endif /* CONFIG_MTD_CMDLINE_PARTS */
+
+ if (part_banks[idx].nums == 0) {
+ printk (KERN_NOTICE
+ "PM82x flash bank %d: no partition info "
+ "available, registering whole device\n", idx);
+ add_mtd_device(mtd_banks[idx]);
+ } else {
+ printk (KERN_NOTICE
+ "PM82x flash bank %d: Using %s partition "
+ "definition\n", idx, part_banks[idx].type);
+ add_mtd_partitions (mtd_banks[idx],
+ part_banks[idx].mtd_part,
+ part_banks[idx].nums);
+ }
+ }
+#else /* ! CONFIG_MTD_PARTITIONS */
+ printk (KERN_NOTICE "PM82x flash: registering %d flash banks "
+ "at once\n", num_banks);
+
+ for(idx = 0 ; idx < num_banks ; idx++)
+ add_mtd_device(mtd_banks[idx]);
+
+#endif /* CONFIG_MTD_PARTITIONS */
+
+ return 0;
+error_mem:
+ for (idx = 0 ; idx < FLASH_BANK_MAX ; idx++) {
+ if (map_banks[idx] != NULL) {
+ kfree(map_banks[idx]);
+ map_banks[idx] = NULL;
+ }
+ }
+ iounmap(start_scan_addr);
+
+ return ret;
+}
+
+static void __exit cleanup_pm82x_mtd(void)
+{
+ unsigned int idx = 0;
+ for(idx = 0 ; idx < num_banks ; idx++) {
+ /* destroy mtd_info previously allocated */
+ if (mtd_banks[idx]) {
+ del_mtd_partitions(mtd_banks[idx]);
+ map_destroy(mtd_banks[idx]);
+ }
+ /* release map_info not used anymore */
+ kfree(map_banks[idx]);
+ }
+ if (start_scan_addr) {
+ iounmap(start_scan_addr);
+ start_scan_addr = NULL;
+ }
+}
+
+module_init(init_pm82x_mtd);
+module_exit(cleanup_pm82x_mtd);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Wolfgang Denk <wd@denx.de>");
+MODULE_DESCRIPTION("MTD map driver for PM82x boards");
diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c
index 21d4e8f..bf7cf54 100644
--- a/drivers/mtd/nand/diskonchip.c
+++ b/drivers/mtd/nand/diskonchip.c
@@ -55,7 +55,11 @@ static unsigned long __initdata doc_loca
0xe8000, 0xea000, 0xec000, 0xee000,
#endif /* CONFIG_MTD_DOCPROBE_HIGH */
#elif defined(__PPC__)
+#if defined(CONFIG_PM82X)
+ 0xff800000,
+#else
0xe4000000,
+#endif
#elif defined(CONFIG_MOMENCO_OCELOT)
0x2f000000,
0xff000000,
^ permalink raw reply related
* Re: [PATCH] ppc32: 8xx board-specific platform stuff for fs_enet
From: Marcelo Tosatti @ 2005-11-23 12:00 UTC (permalink / raw)
To: Kumar Gala, Dan Malek, 'Aristeu Sergio Rozanski Filho',
Pantelis Antoniou
Cc: Paul Mackerras, linuxppc-embedded list
In-Reply-To: <ACB2F36A-0A37-4EA1-9E4A-F773AD4E0D86@kernel.crashing.org>
[-- Attachment #1: Type: text/plain, Size: 2027 bytes --]
On Wed, Nov 23, 2005 at 10:05:19AM -0600, Kumar Gala wrote:
>
> On Nov 23, 2005, at 3:11 AM, Marcelo Tosatti wrote:
>
> >On Wed, Nov 23, 2005 at 01:40:38PM +1100, Paul Mackerras wrote:
> >>Marcelo Tosatti writes:
> >>
> >>>Paul, you're OK with the following definitions on asm-ppc/io.h?
> >>>
> >>>+/* access ports */
> >>>+#define setbits32(_addr, _v) out_be32(&(_addr), in_be32(&
> >>>(_addr)) | (_v))
> >>>+#define clrbits32(_addr, _v) out_be32(&(_addr), in_be32(&
> >>>(_addr)) & ~(_v))
> >>>+
> >>>+#define setbits16(_addr, _v) out_be16(&(_addr), in_be16(&
> >>>(_addr)) | (_v))
> >>>+#define clrbits16(_addr, _v) out_be16(&(_addr), in_be16(&
> >>>(_addr)) & ~(_v))
> >>
> >>I guess so... how many drivers need these things?
> >
> >Many.
>
> Shouldn't these go into some non-arch specific location? I hate
> making drivers only build on a give arch.
Hi Kumar,
I dont really know the policy for driver placement, but it seems that
it works on a case by case basis.
The files in arch/ppc/8xx_io/ (which is what I think you refer to as
candidates for drivers/), are:
1) commproc.c
Basic API for dpram access. Core code.
2) micropatch.c
microcode update code/data. Core code.
3) cs4218.h
4) cs4218_tdm.c
cs4218 does not compile at the moment due to syntatical problems,
I've fixed them up and the driver compiles, but I don't know
if it works (patch attached).
I would not be surprised if the driver has been broken since
long time ago.
Does anyone have hardware to test it? Dan?
Otherwise we should remove it from the tree, since its unmaintained
and unused.
5) enet.c
6) fec.c
The ENET/FEC network drivers are obseleted by fs_enet.
However there are some PHY descriptions in fec.c which are missing from
fs_enet - we'd better make sure to have them all in the new driver
before removing the old one.
Aris, would you mind looking into this?
Once we have that we can set a deadline at Documentation/feature-removal.txt
if desired.
Other than those there are no 8xx drivers in arch/ppc/ AFAIK.
[-- Attachment #2: cs42.patch --]
[-- Type: text/plain, Size: 489 bytes --]
@@ -1380,7 +1381,7 @@
}
static DEFINE_TIMER(beep_timer, cs_nosound, 0, 0);
-};
+//};
static void cs_mksound(unsigned int hz, unsigned int ticks)
{
@@ -1462,7 +1463,7 @@
}
static MACHINE mach_cs4218 = {
- .owner = THIS_MODULE,
+// .owner = THIS_MODULE,
.name = "HIOX CS4218",
.name2 = "Built-in Sound",
.dma_alloc = CS_Alloc,
@@ -2475,6 +2476,7 @@
volatile smc_t *sp;
volatile smc_uart_t *up;
volatile immap_t *immap;
+ unsigned long dp_addr;
has_sound = 0;
^ permalink raw reply
* Re: Tsi108
From: Kumar Gala @ 2005-11-23 17:21 UTC (permalink / raw)
To: Adrian Cox; +Cc: linuxppc-embedded
In-Reply-To: <1132761494.2776.14.camel@localhost>
On Wed, 23 Nov 2005, Adrian Cox wrote:
> I've just received the evaluation board for the Tsi108 bridge:
>
> http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MCEVALHPC2-7448&nodeId=0162468rH3bTdGb9MM
>
> The kernel supplied is 2.6.11.1, and it looks like it needs the
> following to bring it up to date:
>
> 1) Using platform_device for on-chip resources.
> 2) Coding standards cleanup.
> 3) Fix the ethernet driver
> 3a) Fix bugs in stopping and starting interface
> 3b) remove virt_to_phys
> 3c) ethtool support?
>
> Has anybody started on this before I begin?
I'm not aware of anyone, but I know I told people at FSL to clean this up.
Also, the PIC code needs to be looked at. The TSI108 looked too similar to
openpic to warrant its own code when I reviewed this code awhile ago.
- kumar
^ permalink raw reply
* Re: [PATCH] Fix USB suspend/resume crasher
From: Greg KH @ 2005-11-23 17:10 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: Andrew Morton, Linux Kernel list, David Brownell,
linuxppc-dev list, Alan Stern
In-Reply-To: <1132715288.26560.262.camel@gaston>
On Wed, Nov 23, 2005 at 02:08:07PM +1100, Benjamin Herrenschmidt wrote:
> This patch applies on top of the patch that moves the PowerMac specific
> code out of ohci-pci.c to hcd-pci.c where it belongs. This patch isn't
> upstream yet for reasons I don't fully understand (why does USB stuffs
> has such a high latency for going upstream ?), I'm sending it as a reply
> to this email for completeness.
Sorry, I hadn't seen it, otherwise I would have sent it on.
David, are you ok with the patch Ben sent on as a followup?
thanks,
greg k-h
^ permalink raw reply
* RE: Booting hangs after "Calibrating delay loop..."
From: Autran, Guillaume @ 2005-11-23 16:39 UTC (permalink / raw)
To: 'linuxppc-embedded@ozlabs.org',
'n_tbinh@yahoo.com'
Hi,
I remember there is some race condition before calling set_dec(..) in time.c
Basically, what happens is that the external decrementer is set way before
the interrupt gets enabled. When we get to enable the interrupt, the
decrementer value already reached 0 and wrapped arround (at least in our
case).
The fix was to comment the line in:
arch/ppc/kernel/time.c:330: set_dec(tb_ticks_per_jiffy);
And move it to:
arch/ppc/syslib/m8xx_setup.c
inside m8xx_calibrate_decr() just before setting up the interrupt for the
decrementer.
In time.c, you may also need to initialize stamp = get_native_tbl(); as this
variable may not have been initialized since you are using an external
decrementer.
Try that...
Guillaume.
^ permalink raw reply
* Tsi108
From: Adrian Cox @ 2005-11-23 15:58 UTC (permalink / raw)
To: linuxppc-embedded
I've just received the evaluation board for the Tsi108 bridge:
http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MCEVALHPC2-7448&nodeId=0162468rH3bTdGb9MM
The kernel supplied is 2.6.11.1, and it looks like it needs the
following to bring it up to date:
1) Using platform_device for on-chip resources.
2) Coding standards cleanup.
3) Fix the ethernet driver
3a) Fix bugs in stopping and starting interface
3b) remove virt_to_phys
3c) ethtool support?
Has anybody started on this before I begin?
--
Adrian Cox <adrian@humboldt.co.uk>
^ permalink raw reply
* Re: [PATCH 2/3] ppc32: PCIX support for Yucca board
From: Ruslan V. Sushko @ 2005-11-23 16:29 UTC (permalink / raw)
To: Dale Farnsworth; +Cc: linuxppc-embedded
In-Reply-To: <20051121174745.GA2654@xyzzy.farnsworth.org>
[-- Attachment #1: Type: text/plain, Size: 3242 bytes --]
This is updated Yucca PCI-X patch with removed leading spaces
Signed-off-by: Ruslan V. Sushko <rsushko@ru.mvista.com>
Thanks,
Ruslan Sushko
On Mon, 2005-11-21 at 10:47 -0700, Dale Farnsworth wrote:
> On Mon, Nov 21, 2005 at 02:25:52PM +0000, Ruslan V. Sushko wrote:
> > This patch includes following changes:
> >
> > 1) Fix wrong PCIe config space address calculation for slot #3 (Using an
> > signed integer for port numbering will cause wrong address accessing)
> > 2) Fix the PCI bus numbering assignment. This will be an issues if more
> > than one PCI card is inserted.
> > 3) Add verbose error checking.
> > 4) Remove commented or unused lines.
> >
> > Signed-off-by: Ruslan V. Sushko <rsushko@ru.mvista.com>
>
> There are a couple of whitespace/style problems in these 3 patches.
> Please clean them up and re-submit.
>
> > diff --git a/arch/ppc/platforms/4xx/yucca.c b/arch/ppc/platforms/4xx/yucca.c
> > --- a/arch/ppc/platforms/4xx/yucca.c
> > +++ b/arch/ppc/platforms/4xx/yucca.c
> > @@ -280,12 +276,14 @@ yucca_setup_hoses(void)
> > IORESOURCE_MEM,
> > name);
> >
> > - hose->first_busno = 0;
> > - hose->last_busno = 15;
> > + hose->first_busno = bus_no;
> > + hose->last_busno = 0xFF;
> > hose_type[hose->index] = HOSE_PCIE0 + i;
> >
> > ppc440spe_setup_pcie(hose, i);
> > hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
> > + bus_no = hose->last_busno + 1;
> > + printk(KERN_INFO "%s: resources allocated\n", name);
>
> The above two lines have leading spaces instead of tabs. The same
> problem exists in several other lines added by the patches.
>
> diff --git a/arch/ppc/syslib/ppc440spe_pcie.c b/arch/ppc/syslib/ppc440spe_pcie.c
> --- a/arch/ppc/syslib/ppc440spe_pcie.c
> +++ b/arch/ppc/syslib/ppc440spe_pcie.c
> > @@ -157,33 +162,37 @@ int ppc440spe_init_pcie(void)
> > /* Set PLL clock receiver to LVPECL */
> > SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) | 1 << 28);
> >
> > - check_error();
> > -
> > - printk(KERN_INFO "PCIE initialization OK\n");
> > -
> > - if (!(SDR_READ(PESDR0_PLLLCT2) & 0x10000))
> > - printk(KERN_INFO "PESDR_PLLCT2 resistance calibration failed (0x%08x)\n",
> > + if (check_error()) {
> > + return -1;
> > + }
>
> The above braces aren't needed.
>
> > +
> > + if (!(SDR_READ(PESDR0_PLLLCT2) & 0x10000)) {
> > + printk(KERN_INFO "PCIE: PESDR_PLLCT2 resistance calibration "
> > + "failed (0x%08x)\n",
> > SDR_READ(PESDR0_PLLLCT2));
> > + return -1;
> > + }
> >
> > /* De-assert reset of PCIe PLL, wait for lock */
> > SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) & ~(1 << 24));
> > udelay(3);
> > + printk(KERN_INFO "PCIE initialization OK\n");
> >
> > return 0;
> > }
> >
> > -int ppc440spe_init_pcie_rootport(int port)
> > +int ppc440spe_init_pcie_rootport(u32 port)
> > {
> > static int core_init;
> > void __iomem *utl_base;
> > + int attempts;
> > u32 val = 0;
> > - int i;
> >
> > if (!core_init) {
> > + if(ppc440spe_init_pcie()) {
> > + return -1;
> > + }
>
> Again, the above braces are unnecessary.
>
> Thanks,
> -Dale Farnsworth
>
>
[-- Attachment #2: yucca_pcix_support.patch --]
[-- Type: text/x-patch, Size: 8678 bytes --]
diff --git a/arch/ppc/platforms/4xx/yucca.c b/arch/ppc/platforms/4xx/yucca.c
--- a/arch/ppc/platforms/4xx/yucca.c
+++ b/arch/ppc/platforms/4xx/yucca.c
@@ -58,6 +58,25 @@ extern bd_t __res;
static struct ibm44x_clocks clocks __initdata;
+unsigned char ppc4xx_uic_ext_irq_cfg[] __initdata = {
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ15: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ14: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ13: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ12: PCI-X slot */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ11: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ10: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ9: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ8: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ7: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ6: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ5: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ4: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ3: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ2: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ1: EXT */
+ (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* IRQ0: EXT */
+};
+
static void __init
yucca_calibrate_decr(void)
{
@@ -80,13 +99,83 @@ yucca_show_cpuinfo(struct seq_file *m)
return 0;
}
-static enum {
- HOSE_UNKNOWN,
+static void __init yucca_set_emacdata(void)
+{
+ struct ocp_def *def;
+ struct ocp_func_emac_data *emacdata;
+
+ /* Set phy_map, phy_mode, and mac_addr for the EMAC */
+ def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
+ emacdata = def->additions;
+ emacdata->phy_map = 0x00000001; /* Skip 0x00 */
+ emacdata->phy_mode = PHY_MODE_GMII;
+ memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
+}
+
+enum yucca_hoses {
HOSE_PCIX,
HOSE_PCIE0,
HOSE_PCIE1,
- HOSE_PCIE2
-} hose_type[4];
+ HOSE_PCIE2,
+ HOSE_MAX
+};
+
+static enum yucca_hoses hose_type[4];
+
+#define is_pcix_hose(_hs_) ((_hs_) == HOSE_PCIX)
+#define is_pcie_hose(_hs_) (((_hs_) >= HOSE_PCIE0) && ((_hs_) <= HOSE_PCIE2))
+#define pcie_hose_num(_hs_) ((_hs_) - HOSE_PCIE0)
+
+#define PCIX_READW(offset) \
+ (readw((void *)((u32)pcix_reg_base+offset)))
+
+#define PCIX_WRITEW(value, offset) \
+ (writew(value, (void *)((u32)pcix_reg_base+offset)))
+
+#define PCIX_WRITEL(value, offset) \
+ (writel(value, (void *)((u32)pcix_reg_base+offset)))
+
+static void __init
+ppc440spe_setup_pcix(struct pci_controller *hose)
+{
+ void *pcix_reg_base;
+
+ pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE);
+
+ /* Disable all windows */
+ PCIX_WRITEL(0, PCIX0_POM0SA);
+ PCIX_WRITEL(0, PCIX0_POM1SA);
+ PCIX_WRITEL(0, PCIX0_POM2SA);
+ PCIX_WRITEL(0, PCIX0_PIM0SA);
+ PCIX_WRITEL(0, PCIX0_PIM0SAH);
+ PCIX_WRITEL(0, PCIX0_PIM1SA);
+ PCIX_WRITEL(0, PCIX0_PIM2SA);
+ PCIX_WRITEL(0, PCIX0_PIM2SAH);
+
+ /*
+ * Setup 512MB PLB->PCI outbound mem window
+ * (a_n000_0000->0_n000_0000)
+ * */
+ PCIX_WRITEL(0x0000000d, PCIX0_POM0LAH);
+ PCIX_WRITEL(hose->mem_space.start, PCIX0_POM0LAL);
+ PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH);
+ PCIX_WRITEL(hose->mem_space.start, PCIX0_POM0PCIAL);
+ PCIX_WRITEL(~(hose->mem_space.end - hose->mem_space.start) | 1 ,
+ PCIX0_POM0SA);
+
+ /* Setup 1GB PCI->PLB inbound memory window at 0, enable MSIs */
+ PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH);
+ PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL);
+ PCIX_WRITEL(0xc0000007, PCIX0_PIM0SA);
+ PCIX_WRITEL(0xffffffff, PCIX0_PIM0SAH);
+
+ /* Enable PCIX0 I/O, Mem, and Busmaster cycles */
+ PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_MEMORY |
+ PCI_COMMAND_MASTER, PCIX0_COMMAND);
+
+ iounmap(pcix_reg_base);
+ eieio();
+}
static inline int
yucca_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
@@ -100,7 +189,7 @@ yucca_map_irq(struct pci_dev *dev, unsig
* A B C D
*/
{
- { 81, -1, -1, -1 }, /* IDSEL 1 - PCIX0 Slot 0 */
+ { 49, -1, -1, -1 }, /* IDSEL 1 - PCIX0 Slot 0 */
};
const long min_idsel = 1, max_idsel = 1, irqs_per_slot = 4;
return PCI_IRQ_TABLE_LOOKUP;
@@ -141,34 +230,25 @@ yucca_map_irq(struct pci_dev *dev, unsig
return -1;
}
-static void __init yucca_set_emacdata(void)
-{
- struct ocp_def *def;
- struct ocp_func_emac_data *emacdata;
-
- /* Set phy_map, phy_mode, and mac_addr for the EMAC */
- def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, 0);
- emacdata = def->additions;
- emacdata->phy_map = 0x00000001; /* Skip 0x00 */
- emacdata->phy_mode = PHY_MODE_GMII;
- memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
-}
-
static int __init yucca_pcie_card_present(int port)
{
- void __iomem *pcie_fpga_base;
- u16 reg;
+ void __iomem *pcie_fpga_base;
+ u16 reg;
+
+ pcie_fpga_base = ioremap64(YUCCA_FPGA_REG_BASE, YUCCA_FPGA_REG_SIZE);
+ if (!pcie_fpga_base) {
+ printk(KERN_ERR "FPGA remap filed\n");
+ return 0;
+ }
+ reg = in_be16(pcie_fpga_base + FPGA_REG1C);
+ iounmap(pcie_fpga_base);
- pcie_fpga_base = ioremap64(YUCCA_FPGA_REG_BASE, YUCCA_FPGA_REG_SIZE);
- reg = in_be16(pcie_fpga_base + FPGA_REG1C);
- iounmap(pcie_fpga_base);
-
- switch(port) {
- case 0: return !(reg & FPGA_REG1C_PE0_PRSNT);
- case 1: return !(reg & FPGA_REG1C_PE1_PRSNT);
- case 2: return !(reg & FPGA_REG1C_PE2_PRSNT);
- default: return 0;
- }
+ switch(port) {
+ case 0: return !(reg & FPGA_REG1C_PE0_PRSNT);
+ case 1: return !(reg & FPGA_REG1C_PE1_PRSNT);
+ case 2: return !(reg & FPGA_REG1C_PE2_PRSNT);
+ default: return 0;
+ }
}
/*
@@ -240,35 +320,44 @@ yucca_setup_hoses(void)
{
struct pci_controller *hose;
char name[20];
+ enum yucca_hoses hs;
int bus_no = 0;
- int i;
- for (i = 0; i <= 2; ++i) {
- if (!yucca_pcie_card_present(i))
- continue;
-
- printk(KERN_INFO "PCIE%d: card present\n", i);
- yucca_setup_pcie_fpga_rootpoint(i);
- if (ppc440spe_init_pcie_rootport(i)) {
- printk(KERN_WARNING "PCIE%d: initialization failed\n", i);
- continue;
+ for (hs = HOSE_PCIX; hs < HOSE_MAX; ++hs) {
+ if (is_pcie_hose(hs)) {
+ if (!yucca_pcie_card_present(pcie_hose_num(hs)))
+ continue;
+
+ printk(KERN_INFO "PCIE%d: card present\n",
+ pcie_hose_num(hs));
+
+ yucca_setup_pcie_fpga_rootpoint(pcie_hose_num(hs));
+ if (ppc440spe_init_pcie_rootport(pcie_hose_num(hs))) {
+ printk(KERN_ERR "PCIE%d: initialization "
+ "failed\n", pcie_hose_num(hs));
+ continue;
+ }
}
hose = pcibios_alloc_controller();
+
if (!hose)
return;
- sprintf(name, "PCIE%d host bridge", i);
+ sprintf(name, "PCI%s%d host bridge",
+ is_pcix_hose(hs) ? "X" : "E",
+ is_pcie_hose(hs) ? pcie_hose_num(hs) : 0
+ );
pci_init_resource(&hose->io_resource,
YUCCA_PCIX_LOWER_IO,
YUCCA_PCIX_UPPER_IO,
IORESOURCE_IO,
name);
- hose->mem_space.start = YUCCA_PCIE_LOWER_MEM +
- i * YUCCA_PCIE_MEM_SIZE;
+ hose->mem_space.start = YUCCA_PCIX_LOWER_MEM +
+ hs * YUCCA_PCIX_MEM_SIZE;
hose->mem_space.end = hose->mem_space.start +
- YUCCA_PCIE_MEM_SIZE - 1;
+ YUCCA_PCIX_MEM_SIZE - 1;
pci_init_resource(&hose->mem_resources[0],
hose->mem_space.start,
@@ -278,9 +367,24 @@ yucca_setup_hoses(void)
hose->first_busno = bus_no;
hose->last_busno = 0xFF;
- hose_type[hose->index] = HOSE_PCIE0 + i;
+ hose_type[hose->index] = hs;
+
+ if (is_pcix_hose(hs)) {
+ hose->io_space.start = YUCCA_PCIX_LOWER_IO;
+ hose->io_space.end = YUCCA_PCIX_UPPER_IO;
+ isa_io_base =
+ (unsigned long)
+ ioremap64(PCIX0_IO_BASE, PCIX_IO_SIZE);
+ hose->io_base_virt = (void *)isa_io_base;
+
+ ppc440spe_setup_pcix(hose);
+
+ setup_indirect_pci(hose, PCIX0_CFGA, PCIX0_CFGD);
+ hose->set_cfg_type = 1;
+ } else {
+ ppc440spe_setup_pcie(hose, pcie_hose_num(hs));
+ }
- ppc440spe_setup_pcie(hose, i);
hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
bus_no = hose->last_busno + 1;
printk(KERN_INFO "%s: resources allocated\n", name);
diff --git a/include/asm-ppc/ibm44x.h b/include/asm-ppc/ibm44x.h
--- a/include/asm-ppc/ibm44x.h
+++ b/include/asm-ppc/ibm44x.h
@@ -557,12 +557,19 @@
#define PCIX1_CFGD 0x1ec00004UL
#define PCIX2_CFGD 0x2ec00004UL
+#if defined (CONFIG_440SPE)
+#define PCIX0_IO_BASE 0x0000000C08000000ULL
+#else
#define PCIX0_IO_BASE 0x0000000908000000ULL
#define PCIX1_IO_BASE 0x0000000908000000ULL
#define PCIX2_IO_BASE 0x0000000908000000ULL
+#endif
+
#define PCIX_IO_SIZE 0x00010000
-#ifdef CONFIG_440SP
+#if defined (CONFIG_440SPE)
+#define PCIX0_REG_BASE 0x0000000c0ec80000ULL
+#elif defined(CONFIG_440SP)
#define PCIX0_REG_BASE 0x000000090ec80000ULL
#else
#define PCIX0_REG_BASE 0x000000020ec80000ULL
^ permalink raw reply
* Re: [PATCH 1/3] ppc32: Fix a few issues in Yucca PCIe functionality
From: Ruslan V. Sushko @ 2005-11-23 16:29 UTC (permalink / raw)
To: Dale Farnsworth; +Cc: linuxppc-embedded
In-Reply-To: <20051121174745.GA2654@xyzzy.farnsworth.org>
[-- Attachment #1: Type: text/plain, Size: 3267 bytes --]
This is the updated Yucca PCIE patch with removed leading spaces and
unnecessary braces
Signed-off-by: Ruslan V. Sushko <rsushko@ru.mvista.com>
Thanks,
Ruslan Sushko
On Mon, 2005-11-21 at 10:47 -0700, Dale Farnsworth wrote:
> On Mon, Nov 21, 2005 at 02:25:52PM +0000, Ruslan V. Sushko wrote:
> > This patch includes following changes:
> >
> > 1) Fix wrong PCIe config space address calculation for slot #3 (Using an
> > signed integer for port numbering will cause wrong address accessing)
> > 2) Fix the PCI bus numbering assignment. This will be an issues if more
> > than one PCI card is inserted.
> > 3) Add verbose error checking.
> > 4) Remove commented or unused lines.
> >
> > Signed-off-by: Ruslan V. Sushko <rsushko@ru.mvista.com>
>
> There are a couple of whitespace/style problems in these 3 patches.
> Please clean them up and re-submit.
>
> > diff --git a/arch/ppc/platforms/4xx/yucca.c b/arch/ppc/platforms/4xx/yucca.c
> > --- a/arch/ppc/platforms/4xx/yucca.c
> > +++ b/arch/ppc/platforms/4xx/yucca.c
> > @@ -280,12 +276,14 @@ yucca_setup_hoses(void)
> > IORESOURCE_MEM,
> > name);
> >
> > - hose->first_busno = 0;
> > - hose->last_busno = 15;
> > + hose->first_busno = bus_no;
> > + hose->last_busno = 0xFF;
> > hose_type[hose->index] = HOSE_PCIE0 + i;
> >
> > ppc440spe_setup_pcie(hose, i);
> > hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
> > + bus_no = hose->last_busno + 1;
> > + printk(KERN_INFO "%s: resources allocated\n", name);
>
> The above two lines have leading spaces instead of tabs. The same
> problem exists in several other lines added by the patches.
>
> diff --git a/arch/ppc/syslib/ppc440spe_pcie.c b/arch/ppc/syslib/ppc440spe_pcie.c
> --- a/arch/ppc/syslib/ppc440spe_pcie.c
> +++ b/arch/ppc/syslib/ppc440spe_pcie.c
> > @@ -157,33 +162,37 @@ int ppc440spe_init_pcie(void)
> > /* Set PLL clock receiver to LVPECL */
> > SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) | 1 << 28);
> >
> > - check_error();
> > -
> > - printk(KERN_INFO "PCIE initialization OK\n");
> > -
> > - if (!(SDR_READ(PESDR0_PLLLCT2) & 0x10000))
> > - printk(KERN_INFO "PESDR_PLLCT2 resistance calibration failed (0x%08x)\n",
> > + if (check_error()) {
> > + return -1;
> > + }
>
> The above braces aren't needed.
>
> > +
> > + if (!(SDR_READ(PESDR0_PLLLCT2) & 0x10000)) {
> > + printk(KERN_INFO "PCIE: PESDR_PLLCT2 resistance calibration "
> > + "failed (0x%08x)\n",
> > SDR_READ(PESDR0_PLLLCT2));
> > + return -1;
> > + }
> >
> > /* De-assert reset of PCIe PLL, wait for lock */
> > SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) & ~(1 << 24));
> > udelay(3);
> > + printk(KERN_INFO "PCIE initialization OK\n");
> >
> > return 0;
> > }
> >
> > -int ppc440spe_init_pcie_rootport(int port)
> > +int ppc440spe_init_pcie_rootport(u32 port)
> > {
> > static int core_init;
> > void __iomem *utl_base;
> > + int attempts;
> > u32 val = 0;
> > - int i;
> >
> > if (!core_init) {
> > + if(ppc440spe_init_pcie()) {
> > + return -1;
> > + }
>
> Again, the above braces are unnecessary.
>
> Thanks,
> -Dale Farnsworth
>
>
[-- Attachment #2: yucca_pcie_fix.patch --]
[-- Type: text/x-patch, Size: 6815 bytes --]
diff --git a/arch/ppc/platforms/4xx/yucca.c b/arch/ppc/platforms/4xx/yucca.c
--- a/arch/ppc/platforms/4xx/yucca.c
+++ b/arch/ppc/platforms/4xx/yucca.c
@@ -240,13 +240,9 @@ yucca_setup_hoses(void)
{
struct pci_controller *hose;
char name[20];
+ int bus_no = 0;
int i;
- if (0 && ppc440spe_init_pcie()) {
- printk(KERN_WARNING "PPC440SPe PCI Express initialization failed\n");
- return;
- }
-
for (i = 0; i <= 2; ++i) {
if (!yucca_pcie_card_present(i))
continue;
@@ -280,12 +276,14 @@ yucca_setup_hoses(void)
IORESOURCE_MEM,
name);
- hose->first_busno = 0;
- hose->last_busno = 15;
+ hose->first_busno = bus_no;
+ hose->last_busno = 0xFF;
hose_type[hose->index] = HOSE_PCIE0 + i;
ppc440spe_setup_pcie(hose, i);
hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
+ bus_no = hose->last_busno + 1;
+ printk(KERN_INFO "%s: resources allocated\n", name);
}
ppc_md.pci_swizzle = common_swizzle;
diff --git a/arch/ppc/syslib/ppc440spe_pcie.c b/arch/ppc/syslib/ppc440spe_pcie.c
--- a/arch/ppc/syslib/ppc440spe_pcie.c
+++ b/arch/ppc/syslib/ppc440spe_pcie.c
@@ -47,8 +47,6 @@ pcie_read_config(struct pci_bus *bus, un
break;
}
- if (0) printk("%s: read %x(%d) @ %x\n", __func__, *val, len, offset);
-
return PCIBIOS_SUCCESSFUL;
}
@@ -93,9 +91,10 @@ enum {
LNKW_X8 = 0x8
};
-static void check_error(void)
+static int check_error(void)
{
u32 valPE0, valPE1, valPE2;
+ int err = 0;
/* SDR0_PEGPLLLCT1 reset */
if (!(valPE0 = SDR_READ(PESDR0_PLLLCT1) & 0x01000000)) {
@@ -111,6 +110,7 @@ static void check_error(void)
!(valPE1 & 0x01000000) ||
!(valPE2 & 0x01000000)) {
printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstgu error\n");
+ err = -1;
}
/* SDR0_PExRCSSET rstdl */
@@ -118,6 +118,7 @@ static void check_error(void)
!(valPE1 & 0x00010000) ||
!(valPE2 & 0x00010000)) {
printk(KERN_INFO "PCIE: SDR0_PExRCSSET rstdl error\n");
+ err = -1;
}
/* SDR0_PExRCSSET rstpyn */
@@ -132,6 +133,7 @@ static void check_error(void)
(valPE1 & 0x10000000) ||
(valPE2 & 0x10000000)) {
printk(KERN_INFO "PCIE: SDR0_PExRCSSET hldplb error\n");
+ err = -1;
}
/* SDR0_PExRCSSET rdy */
@@ -139,6 +141,7 @@ static void check_error(void)
(valPE1 & 0x00100000) ||
(valPE2 & 0x00100000)) {
printk(KERN_INFO "PCIE: SDR0_PExRCSSET rdy error\n");
+ err = -1;
}
/* SDR0_PExRCSSET shutdown */
@@ -146,7 +149,9 @@ static void check_error(void)
(valPE1 & 0x00000100) ||
(valPE2 & 0x00000100)) {
printk(KERN_INFO "PCIE: SDR0_PExRCSSET shutdown error\n");
+ err = -1;
}
+ return err;
}
/*
@@ -157,33 +162,35 @@ int ppc440spe_init_pcie(void)
/* Set PLL clock receiver to LVPECL */
SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) | 1 << 28);
- check_error();
-
- printk(KERN_INFO "PCIE initialization OK\n");
+ if (check_error())
+ return -1;
- if (!(SDR_READ(PESDR0_PLLLCT2) & 0x10000))
- printk(KERN_INFO "PESDR_PLLCT2 resistance calibration failed (0x%08x)\n",
+ if (!(SDR_READ(PESDR0_PLLLCT2) & 0x10000)) {
+ printk(KERN_INFO "PCIE: PESDR_PLLCT2 resistance calibration "
+ "failed (0x%08x)\n",
SDR_READ(PESDR0_PLLLCT2));
+ return -1;
+ }
/* De-assert reset of PCIe PLL, wait for lock */
SDR_WRITE(PESDR0_PLLLCT1, SDR_READ(PESDR0_PLLLCT1) & ~(1 << 24));
udelay(3);
+ printk(KERN_INFO "PCIE initialization OK\n");
return 0;
}
-int ppc440spe_init_pcie_rootport(int port)
+int ppc440spe_init_pcie_rootport(u32 port)
{
static int core_init;
void __iomem *utl_base;
+ int attempts;
u32 val = 0;
- int i;
if (!core_init) {
+ if(ppc440spe_init_pcie())
+ return -1;
++core_init;
- i = ppc440spe_init_pcie();
- if (i)
- return i;
}
/*
@@ -254,15 +261,10 @@ int ppc440spe_init_pcie_rootport(int por
case 2: val = SDR_READ(PESDR2_RCSSTS); break;
}
- if (!(val & (1 << 20)))
- printk(KERN_INFO "PCIE%d: PGRST inactive\n", port);
- else
- printk(KERN_WARNING "PGRST for PCIE%d failed %08x\n", port, val);
-
- switch (port) {
- case 0: printk(KERN_INFO "PCIE0: LOOP %08x\n", SDR_READ(PESDR0_LOOP)); break;
- case 1: printk(KERN_INFO "PCIE1: LOOP %08x\n", SDR_READ(PESDR1_LOOP)); break;
- case 2: printk(KERN_INFO "PCIE2: LOOP %08x\n", SDR_READ(PESDR2_LOOP)); break;
+ if (val & (1 << 20)) {
+ printk(KERN_WARNING "PGRST for PCIE%d failed %08x\n",
+ port, val);
+ return -1;
}
/*
@@ -335,44 +337,47 @@ int ppc440spe_init_pcie_rootport(int por
/*
* Check for VC0 active and assert RDY.
*/
+
+ attempts = 10;
switch (port) {
case 0:
- if (!(SDR_READ(PESDR0_RCSSTS) & (1 << 16)))
- printk(KERN_WARNING "PCIE0: VC0 not active\n");
+ while(!(SDR_READ(PESDR0_RCSSTS) & (1 << 16))) {
+ if (!(attempts--)) {
+ printk(KERN_WARNING "PCIE0: VC0 not active\n");
+ return -1;
+ }
+ mdelay(1000);
+ }
SDR_WRITE(PESDR0_RCSSET, SDR_READ(PESDR0_RCSSET) | 1 << 20);
break;
case 1:
- if (!(SDR_READ(PESDR1_RCSSTS) & (1 << 16)))
- printk(KERN_WARNING "PCIE0: VC0 not active\n");
+ while(!(SDR_READ(PESDR1_RCSSTS) & (1 << 16))) {
+ if (!(attempts--)) {
+ printk(KERN_WARNING "PCIE1: VC0 not active\n");
+ return -1;
+ }
+ mdelay(1000);
+ }
SDR_WRITE(PESDR1_RCSSET, SDR_READ(PESDR1_RCSSET) | 1 << 20);
break;
case 2:
- if (!(SDR_READ(PESDR2_RCSSTS) & (1 << 16)))
- printk(KERN_WARNING "PCIE0: VC0 not active\n");
+ while(!(SDR_READ(PESDR2_RCSSTS) & (1 << 16))) {
+ if (!(attempts--)) {
+ printk(KERN_WARNING "PCIE2: VC0 not active\n");
+ return -1;
+ }
+ mdelay(1000);
+ }
SDR_WRITE(PESDR2_RCSSET, SDR_READ(PESDR2_RCSSET) | 1 << 20);
break;
}
-#if 0
- /* Dump all config regs */
- for (i = 0x300; i <= 0x320; ++i)
- printk("[%04x] 0x%08x\n", i, SDR_READ(i));
- for (i = 0x340; i <= 0x353; ++i)
- printk("[%04x] 0x%08x\n", i, SDR_READ(i));
- for (i = 0x370; i <= 0x383; ++i)
- printk("[%04x] 0x%08x\n", i, SDR_READ(i));
- for (i = 0x3a0; i <= 0x3a2; ++i)
- printk("[%04x] 0x%08x\n", i, SDR_READ(i));
- for (i = 0x3c0; i <= 0x3c3; ++i)
- printk("[%04x] 0x%08x\n", i, SDR_READ(i));
-#endif
-
mdelay(100);
return 0;
}
-void ppc440spe_setup_pcie(struct pci_controller *hose, int port)
+void ppc440spe_setup_pcie(struct pci_controller *hose, u32 port)
{
void __iomem *mbase;
diff --git a/arch/ppc/syslib/ppc440spe_pcie.h b/arch/ppc/syslib/ppc440spe_pcie.h
--- a/arch/ppc/syslib/ppc440spe_pcie.h
+++ b/arch/ppc/syslib/ppc440spe_pcie.h
@@ -143,7 +143,7 @@
#define PECFG_POM0LAH 0x384
int ppc440spe_init_pcie(void);
-int ppc440spe_init_pcie_rootport(int port);
-void ppc440spe_setup_pcie(struct pci_controller *hose, int port);
+int ppc440spe_init_pcie_rootport(u32 port);
+void ppc440spe_setup_pcie(struct pci_controller *hose, u32 port);
#endif /* __PPC_SYSLIB_PPC440SPE_PCIE_H */
^ permalink raw reply
* Re: USB Keyboard Support
From: Igor Luri @ 2005-11-23 16:00 UTC (permalink / raw)
To: Absolut Hunter, linuxppc-embedded
In-Reply-To: <000901c5f03c$5d4e8c60$6405a8c0@absolut>
[-- Attachment #1: Type: text/plain, Size: 1680 bytes --]
Absolut Hunter wrote:
>Everyone,
>
>I recently got the USB device up and working under DENX Linux 2.4.25 with a
>MPC8280.
>
>We are using a Sm501 video chip and also have that working now, I was hoping
>to get the USB Keyboard system and running so I could totally run the system
>without having to use the serial port as the stdin/stdout anymore.
>
>However, I am having trouble getting any USB keyboard input to be recognized
>as the stdin or anything really.
>
>I have verified that the kernel sees the keyboard and associates the correct
>HID driver, and keyboard driver with it. Also I have added the
>/dev/input/input0-3 files and have verified that they are receiving garbage
>when keys are pressed. i.e. via 'cat input0' and dumping the input to the
>console.
>
>Anyone know what else is required in order to setup the USB keyboard as the
>input device when using a VGA console?
>
>Thanks,
>
>-Russ
>
>_______________________________________________
>Linuxppc-embedded mailing list
>Linuxppc-embedded@ozlabs.org
>https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
>
Dear Russ,
We have MPC5200Lite board running DENX Linux 2.4.25 with Fujitsu CoralP
video card.
To have have the USB keyboard as system stdin, the only thing I have
done is to remove "console" args from kernel command line. I use the
following command lines:
1)To have the console output on serial line and screen, and the input on
serial line:
root=/dev/nfs rw ip=on console=tty console=ttyS0 init=/sbin/init
2) To have the console input on the USB keyboard and the output on the
screen:
root=/dev/nfs rw ip=on init=/sbin/init
I have atached our kernel configuration.
Hope this helps.
[-- Attachment #2: autoconf.h --]
[-- Type: text/x-chdr, Size: 21211 bytes --]
/*
* Automatically generated by make menuconfig: don't edit
*/
#define AUTOCONF_INCLUDED
#undef CONFIG_UID16
#undef CONFIG_RWSEM_GENERIC_SPINLOCK
#define CONFIG_RWSEM_XCHGADD_ALGORITHM 1
#define CONFIG_HAVE_DEC_LOCK 1
/*
* Code maturity level options
*/
#define CONFIG_EXPERIMENTAL 1
#define CONFIG_ADVANCED_OPTIONS 1
/*
* Loadable module support
*/
#define CONFIG_MODULES 1
#undef CONFIG_MODVERSIONS
#define CONFIG_KMOD 1
/*
* Platform support
*/
#define CONFIG_PPC 1
#define CONFIG_PPC32 1
#define CONFIG_6xx 1
#undef CONFIG_40x
#undef CONFIG_44x
#undef CONFIG_E500
#undef CONFIG_POWER3
#undef CONFIG_POWER4
#undef CONFIG_8xx
#undef CONFIG_8260
#define CONFIG_PPC_STD_MMU 1
#undef CONFIG_ALL_PPC
#undef CONFIG_APUS
#undef CONFIG_INKA4X0
#undef CONFIG_WILLOW
#undef CONFIG_TOP5200
#undef CONFIG_CPCI690
#undef CONFIG_PCORE
#undef CONFIG_POWERPMC250
#undef CONFIG_PPMC260
#undef CONFIG_EV64260
#undef CONFIG_SPRUCE
#undef CONFIG_HMI1001
#undef CONFIG_PP01
#undef CONFIG_CPC45
#undef CONFIG_CU824
#undef CONFIG_PM520
#undef CONFIG_PUMA_A
#undef CONFIG_ALASKA
#undef CONFIG_GLACIER
#define CONFIG_ICECUBE 1
#undef CONFIG_HXEB100
#undef CONFIG_LOPEC
#undef CONFIG_MCPN765
#undef CONFIG_MVME5100
#undef CONFIG_PPLUS
#undef CONFIG_PRPMC750
#undef CONFIG_PRPMC800
#undef CONFIG_SANDPOINT
#undef CONFIG_P3G4
#undef CONFIG_ADIR
#undef CONFIG_K2
#undef CONFIG_PAL4
#undef CONFIG_SL8245
#undef CONFIG_GEMINI
#undef CONFIG_TQM5200
#undef CONFIG_O2DNT
#undef CONFIG_SORCERY
#define CONFIG_PPC_5xxx 1
#undef CONFIG_SMP
#define CONFIG_RTHAL 1
#undef CONFIG_ALTIVEC
#undef CONFIG_TAU
#define CONFIG_PPC_ISATIMER 1
#undef CONFIG_MPC5100
#define CONFIG_MPC5200 1
#define CONFIG_PPC_5xxx_PSC_CONSOLE_BAUD (115200)
#define CONFIG_UBOOT 1
#define CONFIG_PPC_5xxx_PSC_CONSOLE_PORT (0)
/*
* General setup
*/
#undef CONFIG_BIGPHYS_AREA
#undef CONFIG_HIGHMEM
#undef CONFIG_LOWMEM_SIZE_BOOL
#undef CONFIG_KERNEL_START_BOOL
#undef CONFIG_TASK_SIZE_BOOL
#define CONFIG_HIGHMEM_START 0xfe000000
#define CONFIG_LOWMEM_SIZE 0x30000000
#define CONFIG_KERNEL_START 0xc0000000
#define CONFIG_TASK_SIZE 0x80000000
#undef CONFIG_ISA
#undef CONFIG_EISA
#undef CONFIG_SBUS
#undef CONFIG_MCA
#define CONFIG_PCI 1
#define CONFIG_NET 1
#define CONFIG_SYSCTL 1
#define CONFIG_SYSVIPC 1
#undef CONFIG_BSD_PROCESS_ACCT
#define CONFIG_KCORE_ELF 1
#define CONFIG_BINFMT_ELF 1
#define CONFIG_KERNEL_ELF 1
#undef CONFIG_BINFMT_MISC
#undef CONFIG_OOM_KILLER
#undef CONFIG_PCI_NAMES
#undef CONFIG_HOTPLUG
#undef CONFIG_PCMCIA
/*
* Parallel port support
*/
#undef CONFIG_PARPORT
#undef CONFIG_GEN_RTC
#define CONFIG_PPC_RTC 1
#undef CONFIG_CMDLINE_BOOL
/*
* Embedded options
*/
#undef CONFIG_EMBEDDED
/*
* Memory Technology Devices (MTD)
*/
#define CONFIG_MTD 1
#undef CONFIG_MTD_DEBUG
#define CONFIG_MTD_PARTITIONS 1
#undef CONFIG_MTD_CONCAT
#undef CONFIG_MTD_REDBOOT_PARTS
#undef CONFIG_MTD_CMDLINE_PARTS
#define CONFIG_MTD_CHAR 1
#define CONFIG_MTD_BLOCK 1
#undef CONFIG_FTL
#undef CONFIG_NFTL
#undef CONFIG_INFTL
/*
* RAM/ROM/Flash chip drivers
*/
#define CONFIG_MTD_CFI 1
#undef CONFIG_MTD_JEDECPROBE
#define CONFIG_MTD_GEN_PROBE 1
#undef CONFIG_MTD_CFI_ADV_OPTIONS
#define CONFIG_MTD_MAP_BANK_WIDTH_1 1
#define CONFIG_MTD_MAP_BANK_WIDTH_2 1
#define CONFIG_MTD_MAP_BANK_WIDTH_4 1
#define CONFIG_MTD_CFI_I1 1
#define CONFIG_MTD_CFI_I2 1
#undef CONFIG_MTD_CFI_INTELEXT
#define CONFIG_MTD_CFI_AMDSTD 1
#undef CONFIG_MTD_CFI_STAA
#define CONFIG_MTD_CFI_UTIL 1
#undef CONFIG_MTD_RAM
#undef CONFIG_MTD_ROM
#undef CONFIG_MTD_ABSENT
#undef CONFIG_MTD_OBSOLETE_CHIPS
#undef CONFIG_MTD_AMDSTD
#undef CONFIG_MTD_SHARP
#undef CONFIG_MTD_JEDEC
/*
* Mapping drivers for chip access
*/
#define CONFIG_MTD_COMPLEX_MAPPINGS 1
#undef CONFIG_MTD_PHYSMAP
#undef CONFIG_MTD_PUMA_A
#undef CONFIG_MTD_CHESTNUT
#undef CONFIG_MTD_K2
#undef CONFIG_MTD_HXEB100
#undef CONFIG_MTD_PPMC260
#undef CONFIG_MTD_SL8245
#undef CONFIG_MTD_CU824
#undef CONFIG_MTD_CPC45
#define CONFIG_MTD_ICECUBE 1
#undef CONFIG_MTD_PP01
#undef CONFIG_MTD_PM520
#undef CONFIG_MTD_TQM5200
#undef CONFIG_MTD_INKA4X0
#undef CONFIG_MTD_SORCERY
#undef CONFIG_MTD_HMI1001
#undef CONFIG_MTD_P3G4
#undef CONFIG_MTD_O2DNT
#undef CONFIG_MTD_PCI
#undef CONFIG_MTD_PCMCIA
/*
* Self-contained MTD device drivers
*/
#undef CONFIG_MTD_PMC551
#undef CONFIG_MTD_SLRAM
#undef CONFIG_MTD_MTDRAM
#undef CONFIG_MTD_BLKMTD
#undef CONFIG_MTD_DOC2000
#undef CONFIG_MTD_DOC2001
#undef CONFIG_MTD_DOC2001PLUS
#undef CONFIG_MTD_DOCPROBE
#undef CONFIG_MTD_DOCECC
/*
* NAND Flash Device Drivers
*/
#undef CONFIG_MTD_NAND
#undef CONFIG_MTD_NAND_DISKONCHIP
#undef CONFIG_MTD_NAND_NANDSIM
/*
* Plug and Play configuration
*/
#undef CONFIG_PNP
#undef CONFIG_ISAPNP
/*
* Block devices
*/
#undef CONFIG_BLK_DEV_FD
#undef CONFIG_BLK_DEV_XD
#undef CONFIG_PARIDE
#undef CONFIG_BLK_CPQ_DA
#undef CONFIG_BLK_CPQ_CISS_DA
#undef CONFIG_CISS_SCSI_TAPE
#undef CONFIG_CISS_MONITOR_THREAD
#undef CONFIG_BLK_DEV_DAC960
#undef CONFIG_BLK_DEV_UMEM
#define CONFIG_BLK_DEV_LOOP 1
#undef CONFIG_BLK_DEV_NBD
#define CONFIG_BLK_DEV_RAM 1
#define CONFIG_BLK_DEV_RAM_SIZE (10240)
#define CONFIG_BLK_DEV_INITRD 1
#undef CONFIG_BLK_STATS
/*
* Multi-device support (RAID and LVM)
*/
#undef CONFIG_MD
#undef CONFIG_BLK_DEV_MD
#undef CONFIG_MD_LINEAR
#undef CONFIG_MD_RAID0
#undef CONFIG_MD_RAID1
#undef CONFIG_MD_RAID5
#undef CONFIG_MD_MULTIPATH
#undef CONFIG_BLK_DEV_LVM
/*
* Networking options
*/
#define CONFIG_PACKET 1
#undef CONFIG_PACKET_MMAP
#undef CONFIG_NETLINK_DEV
#define CONFIG_NETFILTER 1
#undef CONFIG_NETFILTER_DEBUG
#undef CONFIG_FILTER
#define CONFIG_UNIX 1
#define CONFIG_INET 1
#define CONFIG_IP_MULTICAST 1
#define CONFIG_IP_ADVANCED_ROUTER 1
#undef CONFIG_IP_MULTIPLE_TABLES
#undef CONFIG_IP_ROUTE_MULTIPATH
#undef CONFIG_IP_ROUTE_TOS
#undef CONFIG_IP_ROUTE_VERBOSE
#define CONFIG_IP_PNP 1
#define CONFIG_IP_PNP_DHCP 1
#undef CONFIG_IP_PNP_BOOTP
#undef CONFIG_IP_PNP_RARP
#undef CONFIG_NET_IPIP
#undef CONFIG_NET_IPGRE
#undef CONFIG_IP_MROUTE
#undef CONFIG_ARPD
#undef CONFIG_INET_ECN
#define CONFIG_SYN_COOKIES 1
/*
* IP: Netfilter Configuration
*/
#undef CONFIG_IP_NF_CONNTRACK
#undef CONFIG_IP_NF_QUEUE
#undef CONFIG_IP_NF_IPTABLES
#undef CONFIG_IP_NF_ARPTABLES
#undef CONFIG_IP_NF_COMPAT_IPCHAINS
#undef CONFIG_IP_NF_COMPAT_IPFWADM
/*
* IP: Virtual Server Configuration
*/
#undef CONFIG_IP_VS
#undef CONFIG_IPV6
#undef CONFIG_KHTTPD
/*
* SCTP Configuration (EXPERIMENTAL)
*/
#define CONFIG_IPV6_SCTP__ 1
#undef CONFIG_IP_SCTP
#undef CONFIG_ATM
#undef CONFIG_VLAN_8021Q
#undef CONFIG_IPX
#undef CONFIG_ATALK
/*
* Appletalk devices
*/
#undef CONFIG_DEV_APPLETALK
#undef CONFIG_DECNET
#undef CONFIG_BRIDGE
#undef CONFIG_X25
#undef CONFIG_LAPB
#undef CONFIG_LLC
#undef CONFIG_NET_DIVERT
#undef CONFIG_ECONET
#undef CONFIG_WAN_ROUTER
#undef CONFIG_NET_FASTROUTE
#undef CONFIG_NET_HW_FLOWCONTROL
/*
* QoS and/or fair queueing
*/
#undef CONFIG_NET_SCHED
/*
* Network testing
*/
#undef CONFIG_NET_PKTGEN
/*
* ATA/IDE/MFM/RLL support
*/
#define CONFIG_IDE 1
/*
* IDE, ATA and ATAPI Block devices
*/
#define CONFIG_BLK_DEV_IDE 1
#undef CONFIG_BLK_DEV_HD_IDE
#undef CONFIG_BLK_DEV_HD
#define CONFIG_BLK_DEV_IDEDISK 1
#define CONFIG_IDEDISK_MULTI_MODE 1
#undef CONFIG_IDEDISK_STROKE
#undef CONFIG_BLK_DEV_IDECS
#define CONFIG_BLK_DEV_IDECD 1
#undef CONFIG_BLK_DEV_IDETAPE
#undef CONFIG_BLK_DEV_IDEFLOPPY
#undef CONFIG_BLK_DEV_IDESCSI
#undef CONFIG_IDE_TASK_IOCTL
#undef CONFIG_BLK_DEV_CMD640
#undef CONFIG_BLK_DEV_CMD640_ENHANCED
#undef CONFIG_BLK_DEV_ISAPNP
#undef CONFIG_BLK_DEV_IDEPCI
#define CONFIG_BLK_DEV_IDE_MPC5xxx 1
#undef CONFIG_IDE_CHIPSETS
#undef CONFIG_IDEDMA_AUTO
#undef CONFIG_DMA_NONPCI
#undef CONFIG_BLK_DEV_ATARAID
#undef CONFIG_BLK_DEV_ATARAID_PDC
#undef CONFIG_BLK_DEV_ATARAID_HPT
#undef CONFIG_BLK_DEV_ATARAID_SII
/*
* SCSI support
*/
#undef CONFIG_SCSI
/*
* Fusion MPT device support
*/
#undef CONFIG_FUSION
#undef CONFIG_FUSION_BOOT
#undef CONFIG_FUSION_ISENSE
#undef CONFIG_FUSION_CTL
#undef CONFIG_FUSION_LAN
/*
* IEEE 1394 (FireWire) support (EXPERIMENTAL)
*/
#undef CONFIG_IEEE1394
/*
* I2O device support
*/
#undef CONFIG_I2O
#undef CONFIG_I2O_PCI
#undef CONFIG_I2O_BLOCK
#undef CONFIG_I2O_LAN
#undef CONFIG_I2O_SCSI
#undef CONFIG_I2O_PROC
/*
* Network device support
*/
#define CONFIG_NETDEVICES 1
/*
* ARCnet devices
*/
#undef CONFIG_ARCNET
#undef CONFIG_DUMMY
#undef CONFIG_BONDING
#undef CONFIG_EQUALIZER
#undef CONFIG_TUN
#undef CONFIG_ETHERTAP
/*
* Ethernet (10 or 100Mbit)
*/
#define CONFIG_NET_ETHERNET 1
#undef CONFIG_MACE
#undef CONFIG_BMAC
#undef CONFIG_GMAC
#undef CONFIG_SUNLANCE
#undef CONFIG_HAPPYMEAL
#undef CONFIG_SUNBMAC
#undef CONFIG_SUNQE
#undef CONFIG_SUNGEM
#undef CONFIG_NET_VENDOR_3COM
#undef CONFIG_LANCE
#undef CONFIG_NET_VENDOR_SMC
#undef CONFIG_NET_VENDOR_RACAL
#undef CONFIG_HP100
#undef CONFIG_NET_ISA
#undef CONFIG_NET_PCI
#undef CONFIG_NET_POCKET
/*
* Ethernet (1000 Mbit)
*/
#undef CONFIG_ACENIC
#undef CONFIG_DL2K
#undef CONFIG_E1000
#undef CONFIG_MYRI_SBUS
#undef CONFIG_NS83820
#undef CONFIG_HAMACHI
#undef CONFIG_YELLOWFIN
#undef CONFIG_R8169
#undef CONFIG_SK98LIN
#undef CONFIG_TIGON3
#undef CONFIG_GIANFAR
#undef CONFIG_GFAR_NAPI
#undef CONFIG_GFAR_BDSTASH
#undef CONFIG_GFAR_BUFSTASH
#undef CONFIG_FDDI
#undef CONFIG_NETCONSOLE
#undef CONFIG_HIPPI
#undef CONFIG_PLIP
#undef CONFIG_PPP
#undef CONFIG_SLIP
/*
* Wireless LAN (non-hamradio)
*/
#undef CONFIG_NET_RADIO
/*
* Token Ring devices
*/
#undef CONFIG_TR
#undef CONFIG_NET_FC
#undef CONFIG_RCPCI
#undef CONFIG_SHAPER
/*
* Wan interfaces
*/
#undef CONFIG_WAN
/*
* Amateur Radio support
*/
#undef CONFIG_HAMRADIO
/*
* IrDA (infrared) support
*/
#undef CONFIG_IRDA
/*
* ISDN subsystem
*/
#undef CONFIG_ISDN
/*
* Old CD-ROM drivers (not SCSI, not IDE)
*/
#undef CONFIG_CD_NO_IDESCSI
/*
* Console drivers
*/
#undef CONFIG_VGA_CONSOLE
/*
* Frame-buffer support
*/
#define CONFIG_FB 1
#define CONFIG_DUMMY_CONSOLE 1
#undef CONFIG_FB_VOYAGER
#define CONFIG_FB_MB86290 1
#undef CONFIG_FB_RIVA
#undef CONFIG_FB_CLGEN
#undef CONFIG_FB_PM2
#undef CONFIG_FB_PM3
#undef CONFIG_FB_CYBER2000
#undef CONFIG_FB_CT65550
#undef CONFIG_FB_IMSTT
#undef CONFIG_FB_S3TRIO
#undef CONFIG_FB_VESA
#undef CONFIG_FB_VGA16
#undef CONFIG_FB_LYNX
#undef CONFIG_FB_SM712
#undef CONFIG_FB_MATROX
#undef CONFIG_FB_ATY
#undef CONFIG_FB_RADEON
#undef CONFIG_FB_ATY128
#undef CONFIG_FB_INTEL
#undef CONFIG_FB_SIS
#undef CONFIG_FB_NEOMAGIC
#undef CONFIG_FB_3DFX
#undef CONFIG_FB_VOODOO1
#undef CONFIG_FB_TRIDENT
#undef CONFIG_FB_IT8181
#undef CONFIG_FB_VIRTUAL
#define CONFIG_FBCON_ADVANCED 1
#undef CONFIG_FBCON_MFB
#undef CONFIG_FBCON_CFB2
#undef CONFIG_FBCON_CFB4
#undef CONFIG_FBCON_CFB8
#define CONFIG_FBCON_CFB16 1
#undef CONFIG_FBCON_CFB24
#undef CONFIG_FBCON_CFB32
#undef CONFIG_FBCON_AFB
#undef CONFIG_FBCON_ILBM
#undef CONFIG_FBCON_IPLAN2P2
#undef CONFIG_FBCON_IPLAN2P4
#undef CONFIG_FBCON_IPLAN2P8
#undef CONFIG_FBCON_MAC
#undef CONFIG_FBCON_VGA_PLANES
#undef CONFIG_FBCON_VGA
#undef CONFIG_FBCON_HGA
#undef CONFIG_FBCON_YUV16
#undef CONFIG_FBCON_FONTWIDTH8_ONLY
#define CONFIG_FBCON_FONTS 1
#define CONFIG_FONT_8x8 1
#define CONFIG_FONT_8x16 1
#undef CONFIG_FONT_SUN8x16
#undef CONFIG_FONT_SUN12x22
#undef CONFIG_FONT_6x11
#undef CONFIG_FONT_PEARL_8x8
#undef CONFIG_FONT_ACORN_8x8
/*
* Input core support
*/
#define CONFIG_INPUT 1
#define CONFIG_INPUT_KEYBDEV 1
#define CONFIG_INPUT_MOUSEDEV 1
#define CONFIG_INPUT_MOUSEDEV_SCREEN_X (1024)
#define CONFIG_INPUT_MOUSEDEV_SCREEN_Y (768)
#undef CONFIG_INPUT_JOYDEV
#define CONFIG_INPUT_EVDEV 1
#undef CONFIG_INPUT_UINPUT
/*
* Macintosh device drivers
*/
/*
* Character devices
*/
#define CONFIG_VT 1
#define CONFIG_VT_CONSOLE 1
#undef CONFIG_CONSOLE_NOBLANK
#undef CONFIG_CONSOLE_NOCUR
#undef CONFIG_SERIAL
#undef CONFIG_SERIAL_EXTENDED
#define CONFIG_SERIAL_NONSTANDARD 1
#undef CONFIG_COMPUTONE
#undef CONFIG_ROCKETPORT
#undef CONFIG_CYCLADES
#undef CONFIG_DIGIEPCA
#undef CONFIG_DIGI
#undef CONFIG_ESPSERIAL
#undef CONFIG_MOXA_INTELLIO
#undef CONFIG_MOXA_SMARTIO
#undef CONFIG_ISI
#undef CONFIG_SYNCLINK
#undef CONFIG_SYNCLINKMP
#undef CONFIG_N_HDLC
#undef CONFIG_RISCOM8
#undef CONFIG_SPECIALIX
#undef CONFIG_SX
#undef CONFIG_RIO
#undef CONFIG_STALDRV
#undef CONFIG_PS2MULT
#define CONFIG_UNIX98_PTYS 1
#define CONFIG_UNIX98_PTY_COUNT (256)
/*
* I2C support
*/
#undef CONFIG_I2C
/*
* SPI support
*/
#undef CONFIG_SPI
/*
* Mice
*/
#undef CONFIG_BUSMOUSE
#undef CONFIG_MOUSE
/*
* Joysticks
*/
#undef CONFIG_INPUT_GAMEPORT
#undef CONFIG_INPUT_NS558
#undef CONFIG_INPUT_LIGHTNING
#undef CONFIG_INPUT_PCIGAME
#undef CONFIG_INPUT_CS461X
#undef CONFIG_INPUT_EMU10K1
#undef CONFIG_INPUT_SERIO
#undef CONFIG_INPUT_SERPORT
#undef CONFIG_INPUT_ANALOG
#undef CONFIG_INPUT_A3D
#undef CONFIG_INPUT_ADI
#undef CONFIG_INPUT_COBRA
#undef CONFIG_INPUT_GF2K
#undef CONFIG_INPUT_GRIP
#undef CONFIG_INPUT_INTERACT
#undef CONFIG_INPUT_TMDC
#undef CONFIG_INPUT_SIDEWINDER
#undef CONFIG_INPUT_IFORCE_USB
#undef CONFIG_INPUT_IFORCE_232
#undef CONFIG_INPUT_WARRIOR
#undef CONFIG_INPUT_MAGELLAN
#undef CONFIG_INPUT_SPACEORB
#undef CONFIG_INPUT_SPACEBALL
#undef CONFIG_INPUT_STINGER
#undef CONFIG_INPUT_DB9
#undef CONFIG_INPUT_GAMECON
#undef CONFIG_INPUT_TURBOGRAFX
#undef CONFIG_QIC02_TAPE
#undef CONFIG_IPMI_HANDLER
#undef CONFIG_IPMI_PANIC_EVENT
#undef CONFIG_IPMI_DEVICE_INTERFACE
#undef CONFIG_IPMI_KCS
#undef CONFIG_IPMI_WATCHDOG
/*
* Watchdog Cards
*/
#undef CONFIG_WATCHDOG
#undef CONFIG_SCx200
#undef CONFIG_SCx200_GPIO
#undef CONFIG_AMD_PM768
#undef CONFIG_NVRAM
#undef CONFIG_RTC
#undef CONFIG_RTC_11_MINUTE_MODE
#undef CONFIG_DTLK
#undef CONFIG_R3964
#undef CONFIG_APPLICOM
#undef CONFIG_FLASH
/*
* Ftape, the floppy tape device driver
*/
#undef CONFIG_FTAPE
#undef CONFIG_AGP
/*
* Direct Rendering Manager (XFree86 DRI support)
*/
#undef CONFIG_DRM
/*
* Multimedia devices
*/
#undef CONFIG_VIDEO_DEV
/*
* File systems
*/
#undef CONFIG_QUOTA
#undef CONFIG_QFMT_V2
#undef CONFIG_AUTOFS_FS
#undef CONFIG_AUTOFS4_FS
#undef CONFIG_REISERFS_FS
#undef CONFIG_REISERFS_CHECK
#undef CONFIG_REISERFS_PROC_INFO
#undef CONFIG_ADFS_FS
#undef CONFIG_ADFS_FS_RW
#undef CONFIG_AFFS_FS
#undef CONFIG_HFS_FS
#undef CONFIG_HFSPLUS_FS
#undef CONFIG_BEFS_FS
#undef CONFIG_BEFS_DEBUG
#undef CONFIG_BFS_FS
#define CONFIG_EXT3_FS 1
#define CONFIG_JBD 1
#undef CONFIG_JBD_DEBUG
#define CONFIG_FAT_FS 1
#define CONFIG_MSDOS_FS 1
#undef CONFIG_UMSDOS_FS
#define CONFIG_VFAT_FS 1
#undef CONFIG_EFS_FS
#undef CONFIG_JFFS_FS
#define CONFIG_JFFS2_FS 1
#define CONFIG_JFFS2_FS_DEBUG (0)
#define CONFIG_JFFS2_FS_WRITEBUFFER 1
#define CONFIG_JFFS2_ZLIB 1
#define CONFIG_JFFS2_RTIME 1
#undef CONFIG_JFFS2_RUBIN
#undef CONFIG_JFFS2_LZO
#undef CONFIG_JFFS2_LZARI
#undef CONFIG_JFFS2_CMODE_NONE
#define CONFIG_JFFS2_CMODE_PRIORITY 1
#undef CONFIG_JFFS2_CMODE_SIZE
#define CONFIG_JFFS2_PROC 1
#define CONFIG_CRAMFS 1
#define CONFIG_TMPFS 1
#define CONFIG_RAMFS 1
#define CONFIG_ISO9660_FS 1
#define CONFIG_JOLIET 1
#define CONFIG_ZISOFS 1
#undef CONFIG_JFS_FS
#undef CONFIG_JFS_DEBUG
#undef CONFIG_JFS_STATISTICS
#undef CONFIG_MINIX_FS
#undef CONFIG_VXFS_FS
#undef CONFIG_NTFS_FS
#undef CONFIG_NTFS_RW
#undef CONFIG_HPFS_FS
#define CONFIG_PROC_FS 1
#undef CONFIG_DEVFS_FS
#undef CONFIG_DEVFS_MOUNT
#undef CONFIG_DEVFS_DEBUG
#define CONFIG_DEVPTS_FS 1
#undef CONFIG_QNX4FS_FS
#undef CONFIG_QNX4FS_RW
#define CONFIG_ROMFS_FS 1
#define CONFIG_EXT2_FS 1
#undef CONFIG_SYSV_FS
#undef CONFIG_UDF_FS
#undef CONFIG_UDF_RW
#undef CONFIG_UFS_FS
#undef CONFIG_UFS_FS_WRITE
#undef CONFIG_XFS_FS
#undef CONFIG_XFS_QUOTA
#undef CONFIG_XFS_RT
#undef CONFIG_XFS_TRACE
#undef CONFIG_XFS_DEBUG
/*
* Network File Systems
*/
#undef CONFIG_CODA_FS
#undef CONFIG_INTERMEZZO_FS
#define CONFIG_NFS_FS 1
#define CONFIG_NFS_V3 1
#undef CONFIG_NFS_DIRECTIO
#define CONFIG_ROOT_NFS 1
#define CONFIG_NFSD 1
#define CONFIG_NFSD_V3 1
#undef CONFIG_NFSD_TCP
#define CONFIG_SUNRPC 1
#define CONFIG_LOCKD 1
#define CONFIG_LOCKD_V4 1
#undef CONFIG_SMB_FS
#undef CONFIG_NCP_FS
#undef CONFIG_NCPFS_PACKET_SIGNING
#undef CONFIG_NCPFS_IOCTL_LOCKING
#undef CONFIG_NCPFS_STRONG
#undef CONFIG_NCPFS_NFS_NS
#undef CONFIG_NCPFS_OS2_NS
#undef CONFIG_NCPFS_SMALLDOS
#undef CONFIG_NCPFS_NLS
#undef CONFIG_NCPFS_EXTRAS
#define CONFIG_ZISOFS_FS 1
/*
* Partition Types
*/
#define CONFIG_PARTITION_ADVANCED 1
#undef CONFIG_ACORN_PARTITION
#undef CONFIG_OSF_PARTITION
#undef CONFIG_AMIGA_PARTITION
#undef CONFIG_ATARI_PARTITION
#define CONFIG_MAC_PARTITION 1
#define CONFIG_MSDOS_PARTITION 1
#undef CONFIG_BSD_DISKLABEL
#undef CONFIG_MINIX_SUBPARTITION
#undef CONFIG_SOLARIS_X86_PARTITION
#undef CONFIG_UNIXWARE_DISKLABEL
#undef CONFIG_LDM_PARTITION
#undef CONFIG_SGI_PARTITION
#undef CONFIG_ULTRIX_PARTITION
#undef CONFIG_SUN_PARTITION
#undef CONFIG_EFI_PARTITION
#undef CONFIG_SMB_NLS
#define CONFIG_NLS 1
/*
* Native Language Support
*/
#define CONFIG_NLS_DEFAULT "iso8859-1"
#define CONFIG_NLS_CODEPAGE_437 1
#undef CONFIG_NLS_CODEPAGE_737
#undef CONFIG_NLS_CODEPAGE_775
#define CONFIG_NLS_CODEPAGE_850 1
#undef CONFIG_NLS_CODEPAGE_852
#undef CONFIG_NLS_CODEPAGE_855
#undef CONFIG_NLS_CODEPAGE_857
#undef CONFIG_NLS_CODEPAGE_860
#undef CONFIG_NLS_CODEPAGE_861
#undef CONFIG_NLS_CODEPAGE_862
#undef CONFIG_NLS_CODEPAGE_863
#undef CONFIG_NLS_CODEPAGE_864
#undef CONFIG_NLS_CODEPAGE_865
#undef CONFIG_NLS_CODEPAGE_866
#undef CONFIG_NLS_CODEPAGE_869
#undef CONFIG_NLS_CODEPAGE_936
#undef CONFIG_NLS_CODEPAGE_950
#undef CONFIG_NLS_CODEPAGE_932
#undef CONFIG_NLS_CODEPAGE_949
#undef CONFIG_NLS_CODEPAGE_874
#undef CONFIG_NLS_ISO8859_8
#undef CONFIG_NLS_CODEPAGE_1250
#undef CONFIG_NLS_CODEPAGE_1251
#define CONFIG_NLS_ISO8859_1 1
#undef CONFIG_NLS_ISO8859_2
#undef CONFIG_NLS_ISO8859_3
#undef CONFIG_NLS_ISO8859_4
#undef CONFIG_NLS_ISO8859_5
#undef CONFIG_NLS_ISO8859_6
#undef CONFIG_NLS_ISO8859_7
#undef CONFIG_NLS_ISO8859_9
#undef CONFIG_NLS_ISO8859_13
#undef CONFIG_NLS_ISO8859_14
#define CONFIG_NLS_ISO8859_15 1
#undef CONFIG_NLS_KOI8_R
#undef CONFIG_NLS_KOI8_U
#undef CONFIG_NLS_UTF8
/*
* Sound
*/
#undef CONFIG_SOUND
/*
* MPC5xxx I/O Options
*/
#define CONFIG_BESTCOMM_API 1
#define CONFIG_PPC_5xxx_FEC 1
#define CONFIG_USE_MDIO 1
#undef CONFIG_FEC_GENERIC_PHY
#define CONFIG_FEC_LXT971 1
#undef CONFIG_FEC_DP83847
#define CONFIG_PPC_5xxx_PSC 1
#define CONFIG_PPC_5xxx_PSC_CONSOLE 1
#define CONFIG_SERIAL_CONSOLE 1
#undef CONFIG_5200_I2S
#undef CONFIG_5200_I2S_RING
/*
* USB support
*/
#define CONFIG_USB 1
#undef CONFIG_USB_DEBUG
#define CONFIG_USB_DEVICEFS 1
#undef CONFIG_USB_BANDWIDTH
#undef CONFIG_USB_EHCI_HCD
#undef CONFIG_USB_UHCI
#undef CONFIG_USB_UHCI_ALT
#define CONFIG_USB_OHCI 1
#undef CONFIG_USB_ISP1362
#define CONFIG_USB_PPC_5xxx 1
#undef CONFIG_USB_SINGLEENDED
#define CONFIG_USB_USEBOTH 1
#define CONFIG_USB_OHCI 1
#undef CONFIG_USB_AUDIO
#undef CONFIG_USB_EMI26
#undef CONFIG_USB_BLUETOOTH
#undef CONFIG_USB_MIDI
#undef CONFIG_USB_STORAGE
#undef CONFIG_USB_STORAGE_DEBUG
#undef CONFIG_USB_STORAGE_DATAFAB
#undef CONFIG_USB_STORAGE_FREECOM
#undef CONFIG_USB_STORAGE_ISD200
#undef CONFIG_USB_STORAGE_DPCM
#undef CONFIG_USB_STORAGE_HP8200e
#undef CONFIG_USB_STORAGE_SDDR09
#undef CONFIG_USB_STORAGE_SDDR55
#undef CONFIG_USB_STORAGE_JUMPSHOT
#undef CONFIG_USB_ACM
#undef CONFIG_USB_PRINTER
#define CONFIG_USB_HID 1
#define CONFIG_USB_HIDINPUT 1
#define CONFIG_USB_HIDDEV 1
#undef CONFIG_USB_AIPTEK
#undef CONFIG_USB_WACOM
#undef CONFIG_USB_KBTAB
#undef CONFIG_USB_POWERMATE
#undef CONFIG_USB_DC2XX
#undef CONFIG_USB_MDC800
#undef CONFIG_USB_SCANNER
#undef CONFIG_USB_MICROTEK
#undef CONFIG_USB_HPUSBSCSI
#undef CONFIG_USB_PEGASUS
#undef CONFIG_USB_RTL8150
#undef CONFIG_USB_KAWETH
#undef CONFIG_USB_CATC
#undef CONFIG_USB_CDCETHER
#undef CONFIG_USB_USBNET
#undef CONFIG_USB_USS720
/*
* USB Serial Converter support
*/
#undef CONFIG_USB_SERIAL
#undef CONFIG_USB_RIO500
#undef CONFIG_USB_AUERSWALD
#undef CONFIG_USB_TIGL
#undef CONFIG_USB_BRLVGER
#undef CONFIG_USB_LCD
#undef CONFIG_ISP1362_USB
#undef CONFIG_ISP1362_NETLINK
/*
* Support for USB gadgets
*/
#undef CONFIG_USB_GADGET
/*
* Bluetooth support
*/
#undef CONFIG_BLUEZ
/*
* Cryptographic options
*/
#undef CONFIG_CRYPTO
/*
* Library routines
*/
#undef CONFIG_CRC32
#define CONFIG_ZLIB_INFLATE 1
#define CONFIG_ZLIB_DEFLATE 1
#undef CONFIG_REED_SOLOMON
/*
* Kernel hacking
*/
#define CONFIG_DEBUG_KERNEL 1
#undef CONFIG_MAGIC_SYSRQ
#undef CONFIG_DEBUG_HIGHMEM
#undef CONFIG_DEBUG_SLAB
#undef CONFIG_DEBUG_IOVIRT
#undef CONFIG_DEBUG_SPINLOCK
#undef CONFIG_DEBUG_WAITQ
#undef CONFIG_KGDB
#undef CONFIG_XMON
#define CONFIG_BDI_SWITCH 1
#define CONFIG_MORE_COMPILE_OPTIONS 1
#define CONFIG_COMPILE_OPTIONS "-g -ggdb"
#undef CONFIG_SERIAL_TEXT_DEBUG
#define CONFIG_LOG_BUF_SHIFT (0)
^ permalink raw reply
* Re: Freescale 8541 support
From: Kumar Gala @ 2005-11-23 16:19 UTC (permalink / raw)
To: Dan Wilson; +Cc: linuxppc-embedded
In-Reply-To: <200511230816400937.2B36A589@smtp.dslextreme.com>
On Nov 23, 2005, at 10:16 AM, Dan Wilson wrote:
> On 11/23/2005 at 9:51 AM Kumar Gala wrote:
>
>> If I'm not mistaken the Denx kernel is based on 2.6.14. This should
>> have support for the MPC8541. Realize that the differences between
>> MPC8540 and MPC8541/55 are minor. Is there something specific on
>> MPC8541 your looking for.
>>
>> - kumar
>
> Thanks for the reply! Unfortunately, I am constrained to use the
> 2.4 kernel by another software package that I have to use, which
> doesn't yet support 2.6. It appears to me that the 8541/8555
> support was put into 2.6 and never back-ported to 2.4. I'll take a
> look at the manuals today and compare the 8540 to the 8541: perhaps
> I can live with the 8540 support that does appear to be in the 2.4
> kernel. If not, hopefully the porting job won't be very difficult.
I believe the linuxppc-dev 2.4 tree had support for the MPC8541/55.
- kumar
^ permalink raw reply
* RE: [PATCH] MTD: Add support for the PM82x Boards.
From: David Woodhouse @ 2005-11-23 16:15 UTC (permalink / raw)
To: hs; +Cc: linuxppc-dev, linux-mtd
In-Reply-To: <AHEILKONAKAEJPHNMOPNMEMKCDAA.hs@denx.de>
On Wed, 2005-11-23 at 17:08 +0100, Heiko Schocher wrote:
> I ported this code from the 2.4er Kernel, so I didn´t know
> the background, why this code uses the jedec-probe. What
> exactly bothers you?
The JEDEC tables are large enough already -- if the chips do support the
CFI probe, then I'd prefer not to add them to the table.
--
dwmw2
^ permalink raw reply
* Re: Freescale 8541 support
From: Dan Wilson @ 2005-11-23 16:16 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <A49A0ECA-B0EB-4673-928D-0C41D0856635@kernel.crashing.org>
On 11/23/2005 at 9:51 AM Kumar Gala wrote:
> If I'm not mistaken the Denx kernel is based on 2.6.14. This should
> have support for the MPC8541. Realize that the differences between
> MPC8540 and MPC8541/55 are minor. Is there something specific on
> MPC8541 your looking for.
>
> - kumar
Thanks for the reply! Unfortunately, I am constrained to use the 2.4=
kernel by another software package that I have to use, which doesn't yet=
support 2.6. It appears to me that the 8541/8555 support was put into 2.6=
and never back-ported to 2.4. I'll take a look at the manuals today and=
compare the 8540 to the 8541: perhaps I can live with the 8540 support=
that does appear to be in the 2.4 kernel. If not, hopefully the porting=
job won't be very difficult.
Thanks for your help!
Dan.
^ permalink raw reply
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