* [PATCH] powerpc: cleaned up fsl_soc.c
From: Kumar Gala @ 2006-01-23 22:58 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Cleaned up fsl_soc.c based on comments from Olof Johansson. Ran through
Lindent, and split gfar_mdio init into its own function.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
commit 9a8e139654ff5807b5b8fc3f73e9d118f22a3947
tree 04fed9acbcb1565682808ac49946898ddc18a153
parent b87359141569cb0fb0fad4ba6fed7de04ec22af9
author Kumar Gala <galak@kernel.crashing.org> Mon, 23 Jan 2006 17:04:23 -0600
committer Kumar Gala <galak@kernel.crashing.org> Mon, 23 Jan 2006 17:04:23 -0600
arch/powerpc/sysdev/fsl_soc.c | 152 +++++++++++++++++++++++++----------------
1 files changed, 94 insertions(+), 58 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 064c9de..e0887d5 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -40,7 +40,7 @@ phys_addr_t get_immrbase(void)
return immrbase;
soc = of_find_node_by_type(NULL, "soc");
- if (soc != 0) {
+ if (soc) {
unsigned int size;
void *prop = get_property(soc, "reg", &size);
immrbase = of_translate_address(soc, prop);
@@ -49,21 +49,20 @@ phys_addr_t get_immrbase(void)
return immrbase;
}
-EXPORT_SYMBOL(get_immrbase);
-static const char * gfar_tx_intr = "tx";
-static const char * gfar_rx_intr = "rx";
-static const char * gfar_err_intr = "error";
+EXPORT_SYMBOL(get_immrbase);
-static int __init gfar_of_init(void)
+static int __init gfar_mdio_of_init(void)
{
struct device_node *np;
unsigned int i;
- struct platform_device *mdio_dev, *gfar_dev;
+ struct platform_device *mdio_dev;
struct resource res;
int ret;
- for (np = NULL, i = 0; (np = of_find_compatible_node(np, "mdio", "gianfar")) != NULL; i++) {
+ for (np = NULL, i = 0;
+ (np = of_find_compatible_node(np, "mdio", "gianfar")) != NULL;
+ i++) {
int k;
struct device_node *child = NULL;
struct gianfar_mdio_data mdio_data;
@@ -73,12 +72,14 @@ static int __init gfar_of_init(void)
ret = of_address_to_resource(np, 0, &res);
if (ret)
- goto mdio_err;
+ goto err;
- mdio_dev = platform_device_register_simple("fsl-gianfar_mdio", res.start, &res, 1);
+ mdio_dev =
+ platform_device_register_simple("fsl-gianfar_mdio",
+ res.start, &res, 1);
if (IS_ERR(mdio_dev)) {
ret = PTR_ERR(mdio_dev);
- goto mdio_err;
+ goto err;
}
for (k = 0; k < 32; k++)
@@ -86,17 +87,44 @@ static int __init gfar_of_init(void)
while ((child = of_get_next_child(np, child)) != NULL) {
if (child->n_intrs) {
- u32 *id = (u32 *) get_property(child, "reg", NULL);
+ u32 *id =
+ (u32 *) get_property(child, "reg", NULL);
mdio_data.irq[*id] = child->intrs[0].line;
}
}
- ret = platform_device_add_data(mdio_dev, &mdio_data, sizeof(struct gianfar_mdio_data));
+ ret =
+ platform_device_add_data(mdio_dev, &mdio_data,
+ sizeof(struct gianfar_mdio_data));
if (ret)
- goto mdio_unreg;
+ goto unreg;
}
- for (np = NULL, i = 0; (np = of_find_compatible_node(np, "network", "gianfar")) != NULL; i++) {
+ return 0;
+
+unreg:
+ platform_device_unregister(mdio_dev);
+err:
+ return ret;
+}
+
+arch_initcall(gfar_mdio_of_init);
+
+static const char *gfar_tx_intr = "tx";
+static const char *gfar_rx_intr = "rx";
+static const char *gfar_err_intr = "error";
+
+static int __init gfar_of_init(void)
+{
+ struct device_node *np;
+ unsigned int i;
+ struct platform_device *gfar_dev;
+ struct resource res;
+ int ret;
+
+ for (np = NULL, i = 0;
+ (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
+ i++) {
struct resource r[4];
struct device_node *phy, *mdio;
struct gianfar_platform_data gfar_data;
@@ -110,7 +138,7 @@ static int __init gfar_of_init(void)
ret = of_address_to_resource(np, 0, &r[0]);
if (ret)
- goto gfar_err;
+ goto err;
r[1].start = np->intrs[0].line;
r[1].end = np->intrs[0].line;
@@ -133,11 +161,13 @@ static int __init gfar_of_init(void)
r[3].flags = IORESOURCE_IRQ;
}
- gfar_dev = platform_device_register_simple("fsl-gianfar", i, &r[0], np->n_intrs + 1);
+ gfar_dev =
+ platform_device_register_simple("fsl-gianfar", i, &r[0],
+ np->n_intrs + 1);
if (IS_ERR(gfar_dev)) {
ret = PTR_ERR(gfar_dev);
- goto gfar_err;
+ goto err;
}
mac_addr = get_property(np, "address", NULL);
@@ -145,26 +175,26 @@ static int __init gfar_of_init(void)
if (model && !strcasecmp(model, "TSEC"))
gfar_data.device_flags =
- FSL_GIANFAR_DEV_HAS_GIGABIT |
- FSL_GIANFAR_DEV_HAS_COALESCE |
- FSL_GIANFAR_DEV_HAS_RMON |
- FSL_GIANFAR_DEV_HAS_MULTI_INTR;
+ FSL_GIANFAR_DEV_HAS_GIGABIT |
+ FSL_GIANFAR_DEV_HAS_COALESCE |
+ FSL_GIANFAR_DEV_HAS_RMON |
+ FSL_GIANFAR_DEV_HAS_MULTI_INTR;
if (model && !strcasecmp(model, "eTSEC"))
gfar_data.device_flags =
- FSL_GIANFAR_DEV_HAS_GIGABIT |
- FSL_GIANFAR_DEV_HAS_COALESCE |
- FSL_GIANFAR_DEV_HAS_RMON |
- FSL_GIANFAR_DEV_HAS_MULTI_INTR |
- FSL_GIANFAR_DEV_HAS_CSUM |
- FSL_GIANFAR_DEV_HAS_VLAN |
- FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
+ FSL_GIANFAR_DEV_HAS_GIGABIT |
+ FSL_GIANFAR_DEV_HAS_COALESCE |
+ FSL_GIANFAR_DEV_HAS_RMON |
+ FSL_GIANFAR_DEV_HAS_MULTI_INTR |
+ FSL_GIANFAR_DEV_HAS_CSUM |
+ FSL_GIANFAR_DEV_HAS_VLAN |
+ FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
ph = (phandle *) get_property(np, "phy-handle", NULL);
phy = of_find_node_by_phandle(*ph);
if (phy == NULL) {
ret = -ENODEV;
- goto gfar_unreg;
+ goto unreg;
}
mdio = of_get_parent(phy);
@@ -174,7 +204,7 @@ static int __init gfar_of_init(void)
if (ret) {
of_node_put(phy);
of_node_put(mdio);
- goto gfar_unreg;
+ goto unreg;
}
gfar_data.phy_id = *id;
@@ -183,23 +213,22 @@ static int __init gfar_of_init(void)
of_node_put(phy);
of_node_put(mdio);
- ret = platform_device_add_data(gfar_dev, &gfar_data, sizeof(struct gianfar_platform_data));
+ ret =
+ platform_device_add_data(gfar_dev, &gfar_data,
+ sizeof(struct
+ gianfar_platform_data));
if (ret)
- goto gfar_unreg;
+ goto unreg;
}
return 0;
-mdio_unreg:
- platform_device_unregister(mdio_dev);
-mdio_err:
- return ret;
-
-gfar_unreg:
+unreg:
platform_device_unregister(gfar_dev);
-gfar_err:
+err:
return ret;
}
+
arch_initcall(gfar_of_init);
static int __init fsl_i2c_of_init(void)
@@ -209,17 +238,19 @@ static int __init fsl_i2c_of_init(void)
struct platform_device *i2c_dev;
int ret;
- for (np = NULL, i = 0; (np = of_find_compatible_node(np, "i2c", "fsl-i2c")) != NULL; i++) {
+ for (np = NULL, i = 0;
+ (np = of_find_compatible_node(np, "i2c", "fsl-i2c")) != NULL;
+ i++) {
struct resource r[2];
struct fsl_i2c_platform_data i2c_data;
- unsigned char * flags = NULL;
+ unsigned char *flags = NULL;
memset(&r, 0, sizeof(r));
memset(&i2c_data, 0, sizeof(i2c_data));
ret = of_address_to_resource(np, 0, &r[0]);
if (ret)
- goto i2c_err;
+ goto err;
r[1].start = np->intrs[0].line;
r[1].end = np->intrs[0].line;
@@ -228,7 +259,7 @@ static int __init fsl_i2c_of_init(void)
i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
if (IS_ERR(i2c_dev)) {
ret = PTR_ERR(i2c_dev);
- goto i2c_err;
+ goto err;
}
i2c_data.device_flags = 0;
@@ -240,18 +271,22 @@ static int __init fsl_i2c_of_init(void)
if (flags)
i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
- ret = platform_device_add_data(i2c_dev, &i2c_data, sizeof(struct fsl_i2c_platform_data));
+ ret =
+ platform_device_add_data(i2c_dev, &i2c_data,
+ sizeof(struct
+ fsl_i2c_platform_data));
if (ret)
- goto i2c_unreg;
+ goto unreg;
}
return 0;
-i2c_unreg:
+unreg:
platform_device_unregister(i2c_dev);
-i2c_err:
+err:
return ret;
}
+
arch_initcall(fsl_i2c_of_init);
#ifdef CONFIG_PPC_83xx
@@ -267,51 +302,52 @@ static int __init mpc83xx_wdt_init(void)
if (!np) {
ret = -ENODEV;
- goto mpc83xx_wdt_nodev;
+ goto nodev;
}
soc = of_find_node_by_type(NULL, "soc");
if (!soc) {
ret = -ENODEV;
- goto mpc83xx_wdt_nosoc;
+ goto nosoc;
}
freq = (unsigned int *)get_property(soc, "bus-frequency", NULL);
if (!freq) {
ret = -ENODEV;
- goto mpc83xx_wdt_err;
+ goto err;
}
memset(&r, 0, sizeof(r));
ret = of_address_to_resource(np, 0, &r);
if (ret)
- goto mpc83xx_wdt_err;
+ goto err;
dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
if (IS_ERR(dev)) {
ret = PTR_ERR(dev);
- goto mpc83xx_wdt_err;
+ goto err;
}
ret = platform_device_add_data(dev, freq, sizeof(int));
if (ret)
- goto mpc83xx_wdt_unreg;
+ goto unreg;
of_node_put(soc);
of_node_put(np);
return 0;
-mpc83xx_wdt_unreg:
+unreg:
platform_device_unregister(dev);
-mpc83xx_wdt_err:
+err:
of_node_put(soc);
-mpc83xx_wdt_nosoc:
+nosoc:
of_node_put(np);
-mpc83xx_wdt_nodev:
+nodev:
return ret;
}
+
arch_initcall(mpc83xx_wdt_init);
#endif
^ permalink raw reply related
* Re: [PATCH 001/001 Updated] PMAC HD runtime blinking control
From: Benjamin Herrenschmidt @ 2006-01-23 23:10 UTC (permalink / raw)
To: Cedric Pradalier; +Cc: Linuxppc-dev
In-Reply-To: <20060124073133.5cab0e93.cedric.pradalier@inrialpes.fr>
On Tue, 2006-01-24 at 07:31 +1000, Cedric Pradalier wrote:
> According to Benjamin Herrenschmidt, on Tue, 24 Jan 2006
> 00:47:16 +1100,
> >> The key I could not understand was that hwif->gendev is
> >> only initialised in the probe. So I had to move the
> >> device creation after that.
> >>
> >> Currently, it is blinking by default. Should it be that
> >> way? I guess so, since it is activated by a kernel config
> >> option. It is easy to change if required.
> >
> >Yes. In fact, by enabled default for ATA disks and by disabled for ATAPI
> >would make sense...
>
> How do I tell the difference?. There is a 'kind' in pmif,
> and also a atapi_dma flag in hwif. Which is more sensible?
You need to check drive->media ... Which is a bit annoying since it mans
it's per drive, not per-HWIF... you may want to move your sysfs entry
down one more level :) (Each HWIF has an array of 2 drives, though check
drive->present before expecting a useful struct device there)
> >Also, we should think a bit about the file name... "blinking_led" isn't
> >terrific for something that will end up in a non-ppc specific location.
> >Or maybe on the contrary it's good ... what about "activity_led"
> >rather ?
> >
>
> I'm open to any suggestion. I'll wait a bit to see if
> someone else has a comment, then I'll change to
> "activity_led".
>
> --
> Cedric
^ permalink raw reply
* Re: AGPGART driver for ArticiaS - ioremap() problem
From: Benjamin Herrenschmidt @ 2006-01-23 23:15 UTC (permalink / raw)
To: Gerhard Pircher; +Cc: linuxppc-dev, debian-powerpc
In-Reply-To: <29335.1138054327@www080.gmx.net>
On Mon, 2006-01-23 at 23:12 +0100, Gerhard Pircher wrote:
> > --- Ursprüngliche Nachricht ---
> > Von: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> > An: Gerhard Pircher <gerhard_pircher@gmx.net>
> > Kopie: linuxppc-dev@ozlabs.org, debian-powerpc@lists.debian.org
> > Betreff: Re: AGPGART driver for ArticiaS - ioremap() problem
> > Datum: Sun, 22 Jan 2006 09:48:44 +1100
> >
> > On Sat, 2006-01-21 at 02:59 +0100, Gerhard Pircher wrote:
> >
> > > Yes, I see. :( The code mostly allocates the resources for the AGPGART
> > > driver beyond the real memory space, thus preventing the X server to
> > > work. Sometimes the resource is also mapped to where the resource of
> > > the graphic card resides (address 0x88000000, compare with the included
> > > iomem file).
> >
> > The AGP aperture should generally be located "outside" of those spaces.
> > That is above RAM and in some place where no device already resides...
> > It can be made to overlap RAM but that isn't a good idea (that's what
> > happens on Macs though due to a bug in the Apple chipset).
> Ahh, so the AGP aperture should not be within the memory space and any other
> PCI/IO address range. Slowly but surely I become confused. ;-)
>
> > I don't see anything related to AGP in your output... you didn't post
> > the lspci as root thus it's missing all the useful infos ;)
> I included a new lspci output log. :-) (now done as root)
>
> > Also, the AGP base isn't generally a PCI BAR of the bridge... it is one
> > in your case ?
> I'm afraid I can't answer this question (you know, we have no datasheet for
> the ArticiaS yet). From what I can see in the log, there is an unassigned
> memory region (type 0, should be <4GB I guess). Could this affect AGP
> operation?
No idea... memory BARs on host bridges can be anything... It might just
be the normal PCI DMA region.
Ben.
^ permalink raw reply
* [PATCH] Updated Patch to add support for Freescale 83xx Host Mode USB
From: Randy Vinson @ 2006-01-23 23:59 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 976 bytes --]
Greetings,
I've attached an updated patch (based on 2.6.16-rc1) which adds
Host mode support for the Dual-Role(DR) and Multi-Port-Host (MPH) USB
controllers found in the Freescale 8349. The update was to reconcile the
port numbering scheme such that it matches the 8349 documentation. Since
my previous patch has not yet gone upstream, the maintainer requested a
fresh patch.
Note that this patch only provides the platform-specific code that
sets up the external hardware and pin configuration. The actual DR and
MPH controller driver was posted on the linux-usb-devel mailing list.
Using a Freescale 8349CDS reference board, the DR and MPH
controllers have been successfully tested using a USB 2.0 high speed
FLASH drive, a USB 1.1 full speed 4-port hub and a Siemens SpeedStream
USB to Ethernet adapter (assuming the previous 8349 driver updates
posted to linux-usb-devel have been applied).
Randy Vinson
MontaVista Software
[-- Attachment #2: updated_8349_usb_platform.patch --]
[-- Type: text/plain, Size: 8578 bytes --]
Adding platform support for the 834x Host Mode USB controller.
This patch provides the platform-specific hardware setup required by the
83xx Host Mode USB controller on the Freescale 8349CDS reference system.
Signed-off-by: Randy Vinson <rvinson@mvista.com>
---
commit 30caa62b0e433b466b0880efa32375359b6e4fea
tree e9bacf15ad1a58f6f15a343a2b5f233affec0ca1
parent a3d36ef38dcdcbbc7e1860f2f92569145524b1d5
author Randy Vinson <rvinson@linuxbox.(none)> Mon, 23 Jan 2006 16:46:39 -0700
committer Randy Vinson <rvinson@linuxbox.(none)> Mon, 23 Jan 2006 16:46:39 -0700
arch/ppc/Kconfig | 2 +
arch/ppc/platforms/83xx/Kconfig | 28 +++++++++
arch/ppc/platforms/83xx/mpc834x_sys.c | 100 +++++++++++++++++++++++++++++++++
arch/ppc/platforms/83xx/mpc834x_sys.h | 3 +
arch/ppc/syslib/mpc83xx_devices.c | 16 +++++
include/asm-ppc/mpc83xx.h | 17 ++++++
6 files changed, 166 insertions(+), 0 deletions(-)
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 11899f0..b33b0eb 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -681,6 +681,8 @@ config EV64360
platform.
endchoice
+source arch/ppc/platforms/83xx/Kconfig
+
config PQ2ADS
bool
depends on ADS8272
diff --git a/arch/ppc/platforms/83xx/Kconfig b/arch/ppc/platforms/83xx/Kconfig
new file mode 100644
index 0000000..90bc67a
--- /dev/null
+++ b/arch/ppc/platforms/83xx/Kconfig
@@ -0,0 +1,28 @@
+config 834x_USB_SUPPORT
+ bool "834x USB Support"
+ depends on MPC834x_SYS
+ default y
+ ---help---
+ Enables support for the USB controllers on the MPC834x chip. The 834x
+ reference board is wired for only one USB port. That port may be
+ used by either the MPH or DR USB controller.
+ Requires USB Host EHCI support.
+ If unsure, say Y.
+choice
+ prompt "834x USB Controller Selection"
+ depends on 834x_USB_SUPPORT
+ default 834x_DR_USB_SUPPORT
+
+config 834x_DR_USB_SUPPORT
+ bool "DR Controller"
+ select USB_EHCI_ROOT_HUB_TT
+ ---help---
+ Select if using the Dual-Role (DR) USB controller.
+
+config 834x_MPH_USB_SUPPORT
+ bool "MPH Controller"
+ ---help---
+ Select if using the Multi-Port-Host (MPH) USB controller.
+
+endchoice
+
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c
index 012e1e6..319661e 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.c
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.c
@@ -11,6 +11,9 @@
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
+ *
+ * USB setup added by Randy Vinson <rvinson@mvista.com> based on code from
+ * Hunter Wu.
*/
#include <linux/config.h>
@@ -93,6 +96,99 @@ mpc83xx_exclude_device(u_char bus, u_cha
}
#endif /* CONFIG_PCI */
+/*
+ * Configure the on-chip USB controller. The MPC834xCDS only supports the
+ * second USB interface (port 1). This code sets up the hardware and then
+ * lets the platform driver take over device setup.
+ */
+
+#ifdef CONFIG_834x_USB_SUPPORT
+void mpc834x_board_init(void)
+{
+ unsigned char __iomem *bcsr;
+ volatile unsigned char *bcsr5_p;
+
+ /*
+ * if SYS board is plug into PIB board,
+ * force to use the PHY on SYS board
+ * */
+ bcsr = ioremap(BCSR_PHYS_ADDR, BCSR_SIZE);
+ bcsr5_p = bcsr + BCSR5_OFF;
+ if ( (*bcsr5_p & BCSR5_INT_USB) == 0 )
+ *bcsr5_p = (*bcsr5_p | BCSR5_INT_USB);
+ iounmap(bcsr);
+}
+
+void mpc834x_usb_clk_cfg(void)
+{
+ unsigned long sccr;
+ volatile unsigned long *p;
+
+ p = (volatile unsigned long *)(VIRT_IMMRBAR + MPC83XX_SCCR_OFFS); /* SCCR */
+ sccr = *p;
+
+ sccr |= MPC83XX_SCCR_USB_MPHCM_11 | MPC83XX_SCCR_USB_DRCM_11;
+
+ *p = sccr;
+}
+
+static void mpc834x_usb_pin_cfg(struct fsl_usb2_platform_data *pdata)
+{
+ unsigned long sicrl;
+ volatile unsigned long *p;
+
+ p = (volatile unsigned long *)(VIRT_IMMRBAR + MPC83XX_SICRL_OFFS); /* SCCR */
+ sicrl = *p;
+
+ /* set both ports to MPH mode */
+ sicrl &= ~(MPC83XX_SICRL_USB0 | MPC83XX_SICRL_USB1);
+
+ if (pdata->operating_mode == FSL_USB2_DR_HOST) {
+ if (pdata->phy_mode == FSL_USB2_PHY_UTMI_WIDE) {
+ /* UTMI WIDE combines both ports into a single 16-bit port */
+ sicrl |= MPC83XX_SICRL_USB0 | MPC83XX_SICRL_USB1;
+ }
+ else {
+ if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
+ sicrl |= MPC83XX_SICRL_USB1;
+ }
+ }
+ *p = sicrl;
+}
+
+static void __init
+mpc834x_usb_init(void)
+{
+ struct fsl_usb2_platform_data *pdata;
+
+#ifdef CONFIG_834x_DR_USB_SUPPORT
+ ppc_sys_device_remove(MPC83xx_USB2_MPH);
+ pdata = (struct fsl_usb2_platform_data *) ppc_sys_get_pdata(MPC83xx_USB2_DR);
+
+ if (pdata) {
+ pdata->phy_mode = FSL_USB2_PHY_ULPI;
+ pdata->operating_mode = FSL_USB2_DR_HOST;
+ pdata->port_enables = FSL_USB2_PORT1_ENABLED;
+ }
+
+#elif defined(CONFIG_834x_MPH_USB_SUPPORT)
+ ppc_sys_device_remove(MPC83xx_USB2_DR);
+ pdata = (struct fsl_usb2_platform_data *) ppc_sys_get_pdata(MPC83xx_USB2_MPH);
+
+ if (pdata) {
+ pdata->phy_mode = FSL_USB2_PHY_ULPI;
+ pdata->operating_mode = FSL_USB2_MPH_HOST;
+ pdata->port_enables = FSL_USB2_PORT1_ENABLED;
+ }
+
+#endif
+ mpc834x_usb_pin_cfg(pdata);
+ mpc834x_board_init();
+ mpc834x_usb_clk_cfg();
+ return;
+}
+#endif /* CONFIG_834x_USB_SUPPORT */
+
/* ************************************************************************
*
* Setup the architecture
@@ -144,6 +240,10 @@ mpc834x_sys_setup_arch(void)
memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
}
+#ifdef CONFIG_834x_USB_SUPPORT
+ mpc834x_usb_init();
+#endif
+
#ifdef CONFIG_BLK_DEV_INITRD
if (initrd_start)
ROOT_DEV = Root_RAM0;
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h
index 2e514d3..fab3762 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.h
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.h
@@ -27,6 +27,9 @@
#define BCSR_PHYS_ADDR ((uint)0xf8000000)
#define BCSR_SIZE ((uint)(128 * 1024))
+#define BCSR5_OFF 0x05
+#define BCSR5_INT_USB 0x02
+
#define BCSR_MISC_REG2_OFF 0x07
#define BCSR_MISC_REG2_PORESET 0x01
diff --git a/arch/ppc/syslib/mpc83xx_devices.c b/arch/ppc/syslib/mpc83xx_devices.c
index f9b95de..916926c 100644
--- a/arch/ppc/syslib/mpc83xx_devices.c
+++ b/arch/ppc/syslib/mpc83xx_devices.c
@@ -23,6 +23,8 @@
#include <asm/ppc_sys.h>
#include <asm/machdep.h>
+static u64 mpc83xx_dma_mask = 0xffffffffULL;
+
/* We use offsets for IORESOURCE_MEM since we do not know at compile time
* what IMMRBAR is, will get fixed up by mach_mpc83xx_fixup
*/
@@ -50,6 +52,14 @@ static struct fsl_i2c_platform_data mpc8
.device_flags = FSL_I2C_DEV_SEPARATE_DFSRR,
};
+/* Placeholder to be filled in by board code */
+static struct fsl_usb2_platform_data mpc83xx_fsl_dr_pdata = {
+};
+
+/* Placeholder to be filled in by board code */
+static struct fsl_usb2_platform_data mpc83xx_fsl_mph_pdata = {
+};
+
static struct plat_serial8250_port serial_platform_data[] = {
[0] = {
.mapbase = 0x4500,
@@ -190,7 +200,10 @@ struct platform_device ppc_sys_platform_
[MPC83xx_USB2_DR] = {
.name = "fsl-usb2-dr",
.id = 1,
+ .dev.platform_data = &mpc83xx_fsl_dr_pdata,
.num_resources = 2,
+ .dev.dma_mask = &mpc83xx_dma_mask,
+ .dev.coherent_dma_mask = 0xffffffffULL,
.resource = (struct resource[]) {
{
.start = 0x23000,
@@ -208,6 +221,9 @@ struct platform_device ppc_sys_platform_
.name = "fsl-usb2-mph",
.id = 1,
.num_resources = 2,
+ .dev.platform_data = &mpc83xx_fsl_mph_pdata,
+ .dev.dma_mask = &mpc83xx_dma_mask,
+ .dev.coherent_dma_mask = 0xffffffffULL,
.resource = (struct resource[]) {
{
.start = 0x22000,
diff --git a/include/asm-ppc/mpc83xx.h b/include/asm-ppc/mpc83xx.h
index 7cdf60f..74957a6 100644
--- a/include/asm-ppc/mpc83xx.h
+++ b/include/asm-ppc/mpc83xx.h
@@ -95,6 +95,23 @@ extern unsigned char __res[];
#define MPC83xx_CCSRBAR_SIZE (1024*1024)
+#define MPC83XX_SCCR_OFFS 0xA08
+#define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000
+#define MPC83XX_SCCR_USB_MPHCM_01 0x00400000
+#define MPC83XX_SCCR_USB_MPHCM_10 0x00800000
+#define MPC83XX_SCCR_USB_DRCM_11 0x00300000
+#define MPC83XX_SCCR_USB_DRCM_01 0x00100000
+#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
+
+/* system i/o configuration register low */
+#define MPC83XX_SICRL_OFFS 0x114
+#define MPC83XX_SICRL_USB1 0x40000000
+#define MPC83XX_SICRL_USB0 0x20000000
+
+/* system i/o configuration register high */
+#define MPC83XX_SICRH_OFFS 0x118
+#define MPC83XX_SICRH_USB_UTMI 0x00020000
+
/* Let modules/drivers get at immrbar (physical) */
extern phys_addr_t immrbar;
^ permalink raw reply related
* MCC Driver
From: s.maiti @ 2006-01-24 5:15 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <mailman.166.1137617278.17753.linuxppc-embedded@ozlabs.org>
In the MCC driver as in www.sourceforge.com there is no information of
clock routing and I/O routing. It is commented that ""clock routing and
I/O routing supposed done in fec001a_setup.c."" I am using Linux-2.4.25
and couldn't find the file.
I will be highly grateful if anyone can help me with the information that
where should I look for the corresponding file in Linux-2.4.25 so that i
can provide the information's or we have to include those information's in
the driver.
Thanks and regards,
Souvik Maiti
Tata Consultancy Services Limited
Mailto: s.maiti@tcs.com
Website: http://www.tcs.com
Notice: The information contained in this e-mail message and/or attachments to it may contain confidential or privileged information. If you are not the intended recipient, any dissemination, use, review, distribution, printing or copying of the information contained in this e-mail message and/or attachments to it are strictly prohibited. If you have received this communication in error, please notify us by reply e-mail or telephone and immediately and permanently delete the message and any attachments. Thank you
^ permalink raw reply
* Linux kernel and u-boot debugging with Eclipse IDE
From: IGOR LURI @ 2006-01-24 7:59 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 722 bytes --]
Hi all,
We have a MPC5200Lite board running Linux 2.4.25 and u-boot 1.1.4. We are able to debug Linux kernel and U-boot using DDD/GDB and BDI2000, and we are trying to use Eclipse IDE (with CDT plugin) / BDI2000 to develop and debug software.
Eclipse works well to remote debugging aplications over ethernet, however, we are not able to debug Linux kernel or u-boot using Eclipse. When it stops in the first breakpoint, I can´t view some variables and stepping into a function, it shows another. It seems that Eclipse has problems with Linux kernel and u-boot symbols.
Someone uses Eclipse and BDI2000 to debug Linux kernel and u-boot?
Igor Luri
R&D Software Department
Fagor Automation S. Coop.
[-- Attachment #2: Type: text/html, Size: 1404 bytes --]
^ permalink raw reply
* Trouble with SMC serial port in ppc/boot/simple on Embedded Planet 8248 board
From: Laurent Pinchart @ 2006-01-24 8:26 UTC (permalink / raw)
To: linuxppc-embedded
Hi everybody,
(First of all, this is a repost of a mail I sent yesterday for which I haven't
received a copy from the mailing list and which does not appear in the
archives. If the mail hasn't been dropped, sorry for the duplicate).
I'm trying to port the Linux kernel (2.6.15.1) to the Embedded Planet 8248
board. The board has a proprietary boot loader and uses SMC1 has a serial
console.
After some work (2.6.15.1 has a nasty bug related to relocation which has been
fixed in the git tree), I have been able to load and start the kernel image.
Unfortunately, the early serial output is lost. Here is the kernel boot
messages I get with 2.6.15.1 :
-----------------------------------------------------------------------------
Embedded Planet EP8248 PowerPC port
Built 1 zonelists
Kernel command line: console=ttyCPM0,9600n8 root=/dev/ram0 rw
PID hash table entries: 4096 (order: 12, 65536 bytes)
Warning: real time clock seems stuck!
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 777088k available (1520k kernel code, 440k data, 96k init, 0k highmem)
Mount-cache hash table entries: 512
NET: Registered protocol family 16
-----------------------------------------------------------------------------
And here is the same with the modified 2.6.10-pre3 kernel shipped with the
board:
-----------------------------------------------------------------------------
loaded at: 00200000 002D01E8
relocated to: 00400000 004D01E8
board data at: 004CE12C 004CE168
relocated to: 0040509C 004050D8
zimage at: 00405A31 004CD2C4
avail ram: 004D1000 01000000
Linux/PPC load: console=ttyCPM0,9600n8 root=/dev/ram0 rw
Uncompressing Linux...done.
Now booting the kernel
Linux version 2.6.10-rc3 (laurent@pclaurent) (gcc version 3.4.1) #5 Thu Jan 19
15:25:42 CET 2006
Embedded Planet EP8248 PowerPC port
Built 1 zonelists
[...]
-----------------------------------------------------------------------------
Early boot messages (printed with puts in ppc/boot/simple/misc-embedded.c) are
lost.
I compared the Embedded Planet kernel with the 2.6.10-rc3 from kernel.org,
haven't seen any big change related to the SMC serial port. Embedded Planet
uses BRGC7 instead of BRGC1 for SMC1, but that didn't work better for me.
I of course enabled the RS232 transceivers in the board control and status
registers (BCSR).
Could anyone give me any pointer to where I should look at ?
Thanks in advance,
Laurent Pinchart
^ permalink raw reply
* [PATCH 001/001 Updated again] PMAC HD runtime blinking control
From: Cedric Pradalier @ 2006-01-24 12:25 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Linuxppc-dev
In-Reply-To: <1138057827.4907.30.camel@localhost.localdomain>
According to Benjamin Herrenschmidt, on Tue, 24 Jan 2006
10:10:26 +1100,
>On Tue, 2006-01-24 at 07:31 +1000, Cedric Pradalier wrote:
>> >
>> >Yes. In fact, by enabled default for ATA disks and by disabled for ATAPI
>> >would make sense...
>>
>> How do I tell the difference?. There is a 'kind' in pmif,
>> and also a atapi_dma flag in hwif. Which is more sensible?
>
>You need to check drive->media ... Which is a bit annoying since it mans
>it's per drive, not per-HWIF... you may want to move your sysfs entry
>down one more level :) (Each HWIF has an array of 2 drives, though check
>drive->present before expecting a useful struct device there)
>
Well in this case, I'll let this part waiting for now.
I don't think there will be enough real users of this minor
thing to justify putting any more efforts for now.
I think the practical solution is to disable the led by
default. The few user who will want it will be able to add
either ide_core.blink to their boot parameter or make a
small init.d script to put 1 into the sysfs entry.
That's the way I've implemented it, and I've changed the
name into activity_led.
pradalier@localhost:~$ find /sys/ -name activity_led
/sys/devices/pci0001:10/0001:10:17.0/0.80000000:mac-io/0.0001f000:ata-4/ide0/activity_led
This is the updated version of the patch. I, for one, will
consider it stable now.
signed-off-by: Cedric Pradalier <cedric.pradalier@free.fr>
---
--- drivers/ide/ppc/pmac.c.orig 2006-01-03 13:21:10.000000000 +1000
+++ drivers/ide/ppc/pmac.c 2006-01-24 21:18:36.000000000 +1000
@@ -36,6 +36,11 @@
#include <linux/pmu.h>
#include <linux/scatterlist.h>
+#ifdef CONFIG_BLK_DEV_IDE_PMAC_BLINK
+#include <linux/device.h>
+#include <asm/of_device.h>
+#endif
+
#include <asm/prom.h>
#include <asm/io.h>
#include <asm/dbdma.h>
@@ -427,6 +432,15 @@ static void pmac_ide_kauai_selectproc(id
#ifdef CONFIG_BLK_DEV_IDE_PMAC_BLINK
+MODULE_AUTHOR("Paul Mackerras & Ben. Herrenschmidt");
+MODULE_DESCRIPTION("Support for IDE interfaces on PowerMacs");
+MODULE_LICENSE("GPL");
+
+static int activity_led = 0;
+module_param_named(blink,activity_led, bool, 0666);
+MODULE_PARM_DESC(blink,"Enable/Disable activity led [Default: disabled]");
+
+
/* Set to 50ms minimum led-on time (also used to limit frequency
* of requests sent to the PMU
*/
@@ -437,8 +451,7 @@ static spinlock_t pmu_blink_lock;
static unsigned long pmu_blink_stoptime;
static int pmu_blink_ledstate;
static struct timer_list pmu_blink_timer;
-static int pmu_ide_blink_enabled;
-
+static int pmu_ide_blink_enabled = 0;
static void
pmu_hd_blink_timeout(unsigned long data)
@@ -468,6 +481,8 @@ static void
pmu_hd_kick_blink(void *data, int rw)
{
unsigned long flags;
+ if (!activity_led)
+ return;
pmu_blink_stoptime = jiffies + PMU_HD_BLINK_TIME;
wmb();
@@ -483,6 +498,26 @@ pmu_hd_kick_blink(void *data, int rw)
spin_unlock_irqrestore(&pmu_blink_lock, flags);
}
+static ssize_t show_activity_led_enable(struct device *dev, struct device_attribute *attr, char *buf)\
+{
+ return sprintf(buf, "%c\n", activity_led?'1':'0');
+}
+
+static ssize_t set_activity_led_enable(struct device *dev, struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ int blink=0;
+ if (sscanf (buf, "%d", &blink) != 1)
+ return -EINVAL;
+ activity_led = (blink != 0);
+ printk(KERN_INFO "pmac blinking led initialized (blink %s)\n",
+ activity_led?"enabled":"disabled");
+ return count;
+}
+
+static DEVICE_ATTR (activity_led, S_IRUGO | S_IWUSR,
+ show_activity_led_enable, set_activity_led_enable);
+
static int
pmu_hd_blink_init(void)
{
@@ -516,6 +551,9 @@ pmu_hd_blink_init(void)
init_timer(&pmu_blink_timer);
pmu_blink_timer.function = pmu_hd_blink_timeout;
+ printk(KERN_INFO "pmac blinking led initialized (blink %s)\n",
+ activity_led?"enabled":"disabled");
+
return 1;
}
@@ -1271,7 +1309,7 @@ static int
pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
{
struct device_node *np = pmif->node;
- int *bidp, i;
+ int *bidp;
pmif->cable_80 = 0;
pmif->broken_dma = pmif->broken_dma_warn = 0;
@@ -1401,6 +1439,12 @@ pmac_ide_setup_device(pmac_ide_hwif_t *p
/* We probe the hwif now */
probe_hwif_init(hwif);
+#ifdef CONFIG_BLK_DEV_IDE_PMAC_BLINK
+ /* We wait till here to have the gendev initialized in hwif */
+ device_create_file (&hwif->gendev, &dev_attr_activity_led);
+#endif
+
+
return 0;
}
^ permalink raw reply
* [PATCH] Add support for lite5200b board.
From: John Rigby @ 2006-01-24 17:12 UTC (permalink / raw)
To: Sylvain Munaut; +Cc: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 64 bytes --]
Sylvain,
Here is an updated patch for the liteb board.
John
[-- Attachment #2: liteb.patch --]
[-- Type: text/x-patch, Size: 4151 bytes --]
Adds support for liteb board.
Signed-off-by: John Rigby <jrigby@freescale.com>
arch/ppc/Kconfig | 8 ++++++++
arch/ppc/platforms/lite5200.c | 38 +++++++++++++++++++++++++++++++++++---
arch/ppc/syslib/mpc52xx_pci.c | 3 ++-
include/linux/pci_ids.h | 1 +
4 files changed, 46 insertions(+), 4 deletions(-)
3a68d4fcd6a175c7887e570b3f11af07a812bdc0
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 11899f0..eecb608 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -664,6 +664,14 @@ config LITE5200
much but it's only been tested on this board version. I think this
board is also known as IceCube.
+config LITE5200B
+ bool "Freescale LITE5200B"
+ depends on LITE5200
+ help
+ Support for the LITE5200B dev board for the MPC5200 from Freescale.
+ This is the new board with 2 PCI slots.
+
+
config MPC834x_SYS
bool "Freescale MPC834x SYS"
help
diff --git a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
index 7ed52dc..8cd9c67 100644
--- a/arch/ppc/platforms/lite5200.c
+++ b/arch/ppc/platforms/lite5200.c
@@ -36,6 +36,7 @@
#include <asm/mpc52xx.h>
#include <asm/ppc_sys.h>
#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
#include <syslib/mpc52xx_pci.h>
@@ -70,12 +71,32 @@ lite5200_show_cpuinfo(struct seq_file *m
}
#ifdef CONFIG_PCI
+#ifdef CONFIG_LITE5200B
+static int
+lite5200_map_irq(struct pci_dev *dev, unsigned char idsel,
+ unsigned char pin)
+{
+ static char pci_irq_table[][4] =
+ /*
+ * PCI IDSEL/INTPIN->INTLINE
+ * A B C D
+ */
+ {
+ {MPC52xx_IRQ0, MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3},
+ {MPC52xx_IRQ1, MPC52xx_IRQ2, MPC52xx_IRQ3, MPC52xx_IRQ0},
+ };
+
+ const long min_idsel = 24, max_idsel = 25, irqs_per_slot = 4;
+ return PCI_IRQ_TABLE_LOOKUP;
+}
+#else /* Original Lite */
static int
lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
{
return (pin == 1) && (idsel==24) ? MPC52xx_IRQ0 : -1;
}
#endif
+#endif
static void __init
lite5200_setup_cpu(void)
@@ -111,6 +132,11 @@ lite5200_setup_cpu(void)
/* Get port mux config */
port_config = in_be32(&gpio->port_config);
+#ifdef CONFIG_LITE5200B
+ /* turn on cs1 */
+ port_config |= 0x80000000;
+#endif
+
/* 48Mhz internal, pin is GPIO */
port_config &= ~0x00800000;
@@ -129,11 +155,17 @@ lite5200_setup_cpu(void)
out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);
out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
- /* IRQ[0-3] setup : IRQ0 - Level Active Low */
- /* IRQ[1-3] - Level Active High */
+ /* IRQ[0-3] setup */
intr_ctrl = in_be32(&intr->ctrl);
intr_ctrl &= ~0x00ff0000;
- intr_ctrl |= 0x00c00000;
+#if CONFIG_LITE5200B
+ /* IRQ[0-3] Level Active Low */
+ intr_ctrl |= 0x00ff0000;
+#else
+ /* IRQ0 Level Active Low
+ * IRQ[1-3] Level Active High */
+ intr_ctrl |= 0x00c00000;
+#endif
out_be32(&intr->ctrl, intr_ctrl);
/* Unmap reg zone */
diff --git a/arch/ppc/syslib/mpc52xx_pci.c b/arch/ppc/syslib/mpc52xx_pci.c
index 313c96e..c5bf453 100644
--- a/arch/ppc/syslib/mpc52xx_pci.c
+++ b/arch/ppc/syslib/mpc52xx_pci.c
@@ -227,7 +227,8 @@ mpc52xx_pci_fixup_resources(struct pci_d
/* The PCI Host bridge of MPC52xx has a prefetch memory resource
fixed to 1Gb. Doesn't fit in the resource system so we remove it */
if ( (dev->vendor == PCI_VENDOR_ID_MOTOROLA) &&
- (dev->device == PCI_DEVICE_ID_MOTOROLA_MPC5200) ) {
+ (dev->device == PCI_DEVICE_ID_MOTOROLA_MPC5200
+ || dev->device == PCI_DEVICE_ID_MOTOROLA_MPC5200B) ) {
struct resource *res = &dev->resource[1];
res->start = res->end = res->flags = 0;
}
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index ecc1fc1..c16cf15 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -778,6 +778,7 @@
#define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803
#define PCI_DEVICE_ID_MOTOROLA_HARRIER 0x480b
#define PCI_DEVICE_ID_MOTOROLA_MPC5200 0x5803
+#define PCI_DEVICE_ID_MOTOROLA_MPC5200B 0x5809
#define PCI_VENDOR_ID_PROMISE 0x105a
#define PCI_DEVICE_ID_PROMISE_20265 0x0d30
--
1.1.3
^ permalink raw reply related
* Yosemite/440EP why are readl()/ioread32() setup to read little-endian?
From: David Hawkins @ 2006-01-24 18:08 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <43CC3E37.4040707@softadvances.com>
Hi all,
I was writing a simple driver to test IRQ handling on the
AMCC Yosemite board. The board has an 8x2 header with several
GPIO pins, a number of which can be configured as IRQ inputs.
I plan to setup GPIO46 as output, and GPIO47 as input, and
select IRQ8 on that pin.
The GPIO46 and GPIO47 are configured via the GPIO1 registers
at 0xEF600C00. U-Boot can be used to read the register values:
=> md ef600c00 b
ef600c00: 00000000 c2000000 50080000 00000000 ........P.......
ef600c10: 00000000 00000000 00000000 3ffcfffd ............?...
ef600c20: 00000000 00000000 00000000 ............
=> md ef600c30 6
ef600c30: 00000400 00000000 00010000 00000000 ................
ef600c40: 00000000 00000000 ........
=>
So
ef600c00 GPIO1_OR = 00000000
ef600c04 GPIO1_TCR = c2000000
ef600c30 GPIO1_ISR1L = 00000400
However, if I read those same registers back under Linux,
using the driver code pasted at the end of this message
I get:
# insmod yosemite_gpio.ko
- remap the GPIO registers
- remapped to address 0xD1008C00
- Read some GPIO1 registers using readl()
- GPIO1_OR = 0x00000000
- GPIO1_TCR = 0x000000C2
- GPIO1_ISR1L = 0x00040000
- Read some GPIO1 registers using ioread32()
- GPIO1_OR = 0x00000000
- GPIO1_TCR = 0x000000C2
- GPIO1_ISR1L = 0x00040000
- Read some GPIO1 registers using an integer pointer
- GPIO1_OR = 0x00000000
- GPIO1_TCR = 0xC2000000
- GPIO1_ISR1L = 0x00000400
readl() and ioread32() read the registers in little-endian format!
Looking at asm-ppc/io.h
- ioread32() is just a readl()
- line 180 (2.6.13) has readl() as in_le32()
(the code is the same in the 2.6.15-denx kernel too)
So, this explains why the data is read in little-endian format,
but not why this was done.
If the processor was reading from the PCI bus, then sure, I
could understand why this might be used, but even then, that
should be up to the user, eg. by using cpu_to_le32 etc.
Should I just be using pointers for remapped processor
registers, and only use readl(), ioread32(), etc, on external
memory?
I know this is just a big-endian/little-endian issue, I'm
really just asking for the driver writing 'best practices'
in this regard.
Looking forward to enlightenment :)
Cheers
Dave
--------------------------driver code----------------------------
/* yosemite_gpio.c */
#include <linux/module.h> /* kernel modules */
#include <asm/io.h> /* ioremap64(), iounmap(), readl() */
static unsigned long long base = 0x0EF600C00; // 36-bit address
static unsigned int size = 0x44;
static char *kernel;
static int __init simple_init(void)
{
int *p;
/* Get the GPIO control registers */
printk(" - remap the GPIO registers\n");
kernel = ioremap64(base, size);
printk(" - remapped to address 0x%.8X\n", (int)kernel);
printk(" - Read some GPIO1 registers using readl()\n");
printk(" - GPIO1_OR = 0x%.8X\n", readl(kernel));
printk(" - GPIO1_TCR = 0x%.8X\n", readl(kernel+0x04));
printk(" - GPIO1_ISR1L = 0x%.8X\n", readl(kernel+0x30));
printk(" - Read some GPIO1 registers using ioread32()\n");
printk(" - GPIO1_OR = 0x%.8X\n", ioread32(kernel));
printk(" - GPIO1_TCR = 0x%.8X\n", ioread32(kernel+0x04));
printk(" - GPIO1_ISR1L = 0x%.8X\n", ioread32(kernel+0x30));
p = (int *)kernel;
printk(" - Read some GPIO1 registers using an integer pointer\n");
printk(" - GPIO1_OR = 0x%.8X\n", p[0]);
printk(" - GPIO1_TCR = 0x%.8X\n", p[1]);
printk(" - GPIO1_ISR1L = 0x%.8X\n", p[12]);
/* Don't load */
iounmap(kernel);
return -EINVAL;
}
module_init(simple_init);
MODULE_LICENSE("GPL");
^ permalink raw reply
* Re: [PATCH] Add support for lite5200b board.
From: Sylvain Munaut @ 2006-01-24 18:17 UTC (permalink / raw)
To: John Rigby; +Cc: linuxppc-embedded
In-Reply-To: <43D65FE3.6080501@freescale.com>
Hi John,
John Rigby wrote:
> Sylvain,
>
> Here is an updated patch for the liteb board.
>
> John
Looks good. But two comments :
* Isn't a modif to the arch/ppc/platform/Makefile missing ?
* What's the "cs-1" you turn on there :
>
> +#ifdef CONFIG_LITE5200B
> + /* turn on cs1 */
> + port_config |= 0x80000000;
> +#endif
I couldn't find the schema / real-doc of the Lite5200b,
is this available somewhere on-line ?
Sylvain
^ permalink raw reply
* Yosemite/440EP is there a global interrupt enable mask?
From: David Hawkins @ 2006-01-24 19:07 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <43D66D06.9090904@ovro.caltech.edu>
Hi all,
I'm writing a simple driver to test IRQ handling on the
AMCC Yosemite board. The board has an 8x2 header with several
GPIO pins, a number of which can be configured as IRQ inputs.
I have setup GPIO46 as output, and GPIO47 as input, and
selected IRQ8 on that pin.
The simple driver sets up the IRQ handler, and then drops
into a loop where it pulses the GPIO47 output. The relevent
messages from this loop are:
- Read some GPIO1 registers
- GPIO1_OR = 0x00020000
- GPIO1_TCR = 0xC2020000
- GPIO1_ISR1L = 0x00000401
- enable IRQ8
- UIC1_SR = 0x00002800
- UIC1_ER = 0xE0801008
IRQ8 is bit 19 in the enable register, i.e., 1 << (31-19) = 1000h
So, clearly its enabled here.
- sleep for 1s
- UIC1_SR = 0x00002800
- UIC1_ER = 0xE0801008
And after a sleep for 1s its still enabled.
----- loop test -----
- generate low on GPIO46
- sleep for 10 ticks
- generate high on GPIO46
- UIC1_SR = 0x00003800
- UIC1_ER = 0xE0800008
- IRQ8 status is set, clearing it
- UIC1_SR = 0x00002800
- UIC1_ER = 0xE0800008
- sleep for 10 ticks
... repeats ...
The low pulse on the GPIO46 pin definitely set the IRQ8 status
bit, but why on earth is the enable bit cleared!
(I added the check for the status bit being set, since my
IRQ handler was not getting called)
To enable the IRQ8 line, I simply accessed the UIC1_ER register
directly via
reg = mfdcr(DCRN_UIC_ER(UIC1));
reg |= 1 << (31-19);
mtdcr(DCRN_UIC_ER(UIC1), reg);
So, is there a kernel wide interrupt enable mask that I really
should be using? Or, an interrupt enable API? I initially
thought that when I registered an interrupt using
request_irq() that the kernel would go off an enable the
requested IRQ, but this test shows that it did not.
Any ideas?
Cheers
Dave
--------------- driver code --------------------------
/* yosemite_irq.c */
#include <linux/module.h> /* kernel modules */
#include <linux/interrupt.h>/* request_irq(), etc */
#include <asm/io.h> /* ioremap64(), iounmap(), readl() */
static char *name = "yosemite_irq";
static unsigned long long base = 0x0EF600C00; // 36-bit address
static unsigned int size = 0x44;
static char *kernel;
static int irq = 8;
static irqreturn_t
simple_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
{
int *p = (int *)kernel;
printk("<irq %d> received!\n", irq);
/* Deassert the interrupt input; GPIO1_OR[14] = 1 */
// writel(1<<(31-14), kernel);
p[0] = 1 << (31-14);
/* Clear IRQ8 status (UIC1_SR[19] = 1 to clear it) */
mtdcr(DCRN_UIC_SR(UIC1), 1 << (31-19));
return IRQ_HANDLED;
}
static int __init simple_init(void)
{
int status;
int reg;
int *p;
int i;
printk("<init> called.\n");
/* Get the GPIO control registers */
printk(" - remap the GPIO registers\n");
kernel = ioremap64(base, size);
printk(" - remapped to address 0x%.8X\n", (int)kernel);
p = (int *)kernel;
/* Get the IRQ8 */
printk(" - request the IRQ\n");
status = request_irq(
irq,
simple_irq_handler,
SA_INTERRUPT,
name,
0);
if (status < 0) {
printk(" - request for irq %d failed\n", irq);
return status;
}
printk(" - Read some DCR registers\n");
printk(" - UIC0_SR = 0x%.8X\n", mfdcr(DCRN_UIC_SR(UIC0)));
printk(" - UIC0_ER = 0x%.8X\n", mfdcr(DCRN_UIC_ER(UIC0)));
printk(" - UIC0_PR = 0x%.8X\n", mfdcr(DCRN_UIC_PR(UIC0)));
printk(" - UIC0_TR = 0x%.8X\n", mfdcr(DCRN_UIC_TR(UIC0)));
printk(" - UIC1_SR = 0x%.8X\n", mfdcr(DCRN_UIC_SR(UIC1)));
printk(" - UIC1_ER = 0x%.8X\n", mfdcr(DCRN_UIC_ER(UIC1)));
printk(" - UIC1_PR = 0x%.8X\n", mfdcr(DCRN_UIC_PR(UIC1)));
printk(" - UIC1_TR = 0x%.8X\n", mfdcr(DCRN_UIC_TR(UIC1)));
printk(" - Read some GPIO1 registers\n");
printk(" - GPIO1_OR = 0x%.8X\n", p[0]);
printk(" - GPIO1_TCR = 0x%.8X\n", p[1]);
printk(" - GPIO1_ISR1L = 0x%.8X\n", p[12]);
/* Setup GPIO46 as output. GPIO46 drives GPIO47, and
* GPIO47 will be used as IRQ8. The default IRQ
* sensitivity is low and level sensitive.
*/
printk(" - set GPIO46 as output\n");
/* GPIO1_OR[14] = 1 */
// writel(readl(kernel) | (1 << (31-14)), kernel);
p[0] |= 1 << (31-14);
/* GPIO1_TCR[14] = 1 */
// writel(readl(kernel+0x04) | (1 << (31-14)), kernel+0x04);
p[1] |= 1 << (31-14);
/* Select GPIO47 IRQ8 input */
printk(" - set GPIO47 as IRQ8 input\n");
/* GPIO1_ISR1L[30:31] = 01b */
// writel(readl(kernel+0x30) | 1, kernel+0x30);
p[12] |= 1;
/* Clear IRQ8 status (write 1 to bit 19 to clear it) */
printk(" - clear IRQ8 status\n");
mtdcr(DCRN_UIC_SR(UIC1), 1 << (31-19));
printk(" - Read some GPIO1 registers\n");
printk(" - GPIO1_OR = 0x%.8X\n", p[0]);
printk(" - GPIO1_TCR = 0x%.8X\n", p[1]);
printk(" - GPIO1_ISR1L = 0x%.8X\n", p[12]);
/* Enable IRQ8 */
printk(" - enable IRQ8\n");
reg = mfdcr(DCRN_UIC_ER(UIC1));
reg |= 1 << (31-19);
mtdcr(DCRN_UIC_ER(UIC1), reg);
printk(" - UIC1_SR = 0x%.8X\n", mfdcr(DCRN_UIC_SR(UIC1)));
printk(" - UIC1_ER = 0x%.8X\n", mfdcr(DCRN_UIC_ER(UIC1)));
printk(" - sleep for 1s\n");
set_current_state(TASK_INTERRUPTIBLE);
schedule_timeout(HZ);
printk(" - UIC1_SR = 0x%.8X\n", mfdcr(DCRN_UIC_SR(UIC1)));
printk(" - UIC1_ER = 0x%.8X\n", mfdcr(DCRN_UIC_ER(UIC1)));
reg = mfdcr(DCRN_UIC_ER(UIC1));
if ((reg & (1 << (31-19))) == 0) {
printk(" - hey something cleared my enable bit!\n");
return 0;
}
printk(" ----- loop test -----\n");
for (i = 0; i < 5; i++) {
printk(" - generate low on GPIO46\n");
p[0] = 0;
printk(" - sleep for 10 ticks\n");
set_current_state(TASK_INTERRUPTIBLE);
schedule_timeout(10);
printk(" - generate high on GPIO46\n");
p[0] = 1 << (31-14);
printk(" - UIC1_SR = 0x%.8X\n", mfdcr(DCRN_UIC_SR(UIC1)));
printk(" - UIC1_ER = 0x%.8X\n", mfdcr(DCRN_UIC_ER(UIC1)));
reg = mfdcr(DCRN_UIC_SR(UIC1));
if ((reg & (1 << (31-19))) == 0) {
printk(" - IRQ8 status is not set\n");
} else {
printk(" - IRQ8 status is set, clearing it\n");
mtdcr(DCRN_UIC_SR(UIC1), 1 << (31-19));
}
printk(" - UIC1_SR = 0x%.8X\n", mfdcr(DCRN_UIC_SR(UIC1)));
printk(" - UIC1_ER = 0x%.8X\n", mfdcr(DCRN_UIC_ER(UIC1)));
printk(" - sleep for 10 ticks\n");
set_current_state(TASK_INTERRUPTIBLE);
schedule_timeout(10);
}
/* log load */
printk("module loaded.\n");
return 0;
}
void __exit simple_exit(void)
{
int reg;
printk("<exit> called.\n");
/* Disable IRQ8 */
reg = mfdcr(DCRN_UIC_ER(UIC1));
reg &= ~(1 << (31-19));
mtdcr(DCRN_UIC_ER(UIC1), reg);
free_irq(irq, 0);
iounmap(kernel);
printk("module unloaded\n");
}
module_init(simple_init);
module_exit(simple_exit);
^ permalink raw reply
* Re: [PATCH 001/001 Updated again] PMAC HD runtime blinking control
From: Benjamin Herrenschmidt @ 2006-01-24 23:14 UTC (permalink / raw)
To: Cedric Pradalier; +Cc: Linuxppc-dev
In-Reply-To: <20060124222513.48ef0276.cedric.pradalier@inrialpes.fr>
On Tue, 2006-01-24 at 22:25 +1000, Cedric Pradalier wrote:
> According to Benjamin Herrenschmidt, on Tue, 24 Jan 2006
> 10:10:26 +1100,
> >On Tue, 2006-01-24 at 07:31 +1000, Cedric Pradalier wrote:
> >> >
> >> >Yes. In fact, by enabled default for ATA disks and by disabled for ATAPI
> >> >would make sense...
> >>
> >> How do I tell the difference?. There is a 'kind' in pmif,
> >> and also a atapi_dma flag in hwif. Which is more sensible?
> >
> >You need to check drive->media ... Which is a bit annoying since it mans
> >it's per drive, not per-HWIF... you may want to move your sysfs entry
> >down one more level :) (Each HWIF has an array of 2 drives, though check
> >drive->present before expecting a useful struct device there)
> >
>
> Well in this case, I'll let this part waiting for now.
> I don't think there will be enough real users of this minor
> thing to justify putting any more efforts for now.
>
> I think the practical solution is to disable the led by
> default. The few user who will want it will be able to add
> either ide_core.blink to their boot parameter or make a
> small init.d script to put 1 into the sysfs entry.
>
> That's the way I've implemented it, and I've changed the
> name into activity_led.
I'll have a look into making it work he way I want :) Then I'll submit
it.
Thanks,
Ben.
> pradalier@localhost:~$ find /sys/ -name activity_led
> /sys/devices/pci0001:10/0001:10:17.0/0.80000000:mac-io/0.0001f000:ata-4/ide0/activity_led
>
> This is the updated version of the patch. I, for one, will
> consider it stable now.
>
> signed-off-by: Cedric Pradalier <cedric.pradalier@free.fr>
> ---
> --- drivers/ide/ppc/pmac.c.orig 2006-01-03 13:21:10.000000000 +1000
> +++ drivers/ide/ppc/pmac.c 2006-01-24 21:18:36.000000000 +1000
> @@ -36,6 +36,11 @@
> #include <linux/pmu.h>
> #include <linux/scatterlist.h>
>
> +#ifdef CONFIG_BLK_DEV_IDE_PMAC_BLINK
> +#include <linux/device.h>
> +#include <asm/of_device.h>
> +#endif
> +
> #include <asm/prom.h>
> #include <asm/io.h>
> #include <asm/dbdma.h>
> @@ -427,6 +432,15 @@ static void pmac_ide_kauai_selectproc(id
>
> #ifdef CONFIG_BLK_DEV_IDE_PMAC_BLINK
>
> +MODULE_AUTHOR("Paul Mackerras & Ben. Herrenschmidt");
> +MODULE_DESCRIPTION("Support for IDE interfaces on PowerMacs");
> +MODULE_LICENSE("GPL");
> +
> +static int activity_led = 0;
> +module_param_named(blink,activity_led, bool, 0666);
> +MODULE_PARM_DESC(blink,"Enable/Disable activity led [Default: disabled]");
> +
> +
> /* Set to 50ms minimum led-on time (also used to limit frequency
> * of requests sent to the PMU
> */
> @@ -437,8 +451,7 @@ static spinlock_t pmu_blink_lock;
> static unsigned long pmu_blink_stoptime;
> static int pmu_blink_ledstate;
> static struct timer_list pmu_blink_timer;
> -static int pmu_ide_blink_enabled;
> -
> +static int pmu_ide_blink_enabled = 0;
>
> static void
> pmu_hd_blink_timeout(unsigned long data)
> @@ -468,6 +481,8 @@ static void
> pmu_hd_kick_blink(void *data, int rw)
> {
> unsigned long flags;
> + if (!activity_led)
> + return;
>
> pmu_blink_stoptime = jiffies + PMU_HD_BLINK_TIME;
> wmb();
> @@ -483,6 +498,26 @@ pmu_hd_kick_blink(void *data, int rw)
> spin_unlock_irqrestore(&pmu_blink_lock, flags);
> }
>
> +static ssize_t show_activity_led_enable(struct device *dev, struct device_attribute *attr, char *buf)\
> +{
> + return sprintf(buf, "%c\n", activity_led?'1':'0');
> +}
> +
> +static ssize_t set_activity_led_enable(struct device *dev, struct device_attribute *attr,
> + const char *buf, size_t count)
> +{
> + int blink=0;
> + if (sscanf (buf, "%d", &blink) != 1)
> + return -EINVAL;
> + activity_led = (blink != 0);
> + printk(KERN_INFO "pmac blinking led initialized (blink %s)\n",
> + activity_led?"enabled":"disabled");
> + return count;
> +}
> +
> +static DEVICE_ATTR (activity_led, S_IRUGO | S_IWUSR,
> + show_activity_led_enable, set_activity_led_enable);
> +
> static int
> pmu_hd_blink_init(void)
> {
> @@ -516,6 +551,9 @@ pmu_hd_blink_init(void)
> init_timer(&pmu_blink_timer);
> pmu_blink_timer.function = pmu_hd_blink_timeout;
>
> + printk(KERN_INFO "pmac blinking led initialized (blink %s)\n",
> + activity_led?"enabled":"disabled");
> +
> return 1;
> }
>
> @@ -1271,7 +1309,7 @@ static int
> pmac_ide_setup_device(pmac_ide_hwif_t *pmif, ide_hwif_t *hwif)
> {
> struct device_node *np = pmif->node;
> - int *bidp, i;
> + int *bidp;
>
> pmif->cable_80 = 0;
> pmif->broken_dma = pmif->broken_dma_warn = 0;
> @@ -1401,6 +1439,12 @@ pmac_ide_setup_device(pmac_ide_hwif_t *p
> /* We probe the hwif now */
> probe_hwif_init(hwif);
>
> +#ifdef CONFIG_BLK_DEV_IDE_PMAC_BLINK
> + /* We wait till here to have the gendev initialized in hwif */
> + device_create_file (&hwif->gendev, &dev_attr_activity_led);
> +#endif
> +
> +
> return 0;
> }
>
^ permalink raw reply
* Help: FCC driver does not handle IPV6 multicast packet
From: Bizhan Gholikhamseh (bgholikh) @ 2006-01-25 0:14 UTC (permalink / raw)
To: linuxppc-embedded, linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 835 bytes --]
HI All,
Our custom board is based on PPC 8541 running Linux 2.6.11.
We have NO issue if FCC is operating in 100 Mbs. However, if we
configure the interface in 10 Mbs we see the following behavior:
If IPV6 is enabled, as soon as the FCC network interface is plumbed
through "ifconfig" system call, we observe the CPU load increases to 90
percent
and most of the load is related to softirq process. A traceroute command
on the interface displays an IPV6 multicast packet continuously getting
transmitted.
If we bring the interface down through the ifconfig, we do not observe
the problem
no longer. The strange thing is we do not observe this behavior if the
interface
is plumbed 100 Mbs.
We need to root cause this and have no idea what to look for, any idea
greatly
appreciated.
Many thanks in advance,
Bizhan
[-- Attachment #2: Type: text/html, Size: 2760 bytes --]
^ permalink raw reply
* Linux kernel and u-boot debugging with Eclipse IDE
From: IGOR LURI @ 2006-01-25 7:44 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 720 bytes --]
Hi all,
We have a MPC5200Lite board running Linux 2.4.25 and u-boot 1.1.4. We are able to debug Linux kernel and U-boot using DDD/GDB and BDI2000, and we are trying to use Eclipse IDE (with CDT plugin) / BDI2000 to develop and debug software.
Eclipse works well to remote debugging aplications over ethernet, however, we are not able to debug Linux kernel or u-boot using Eclipse. When it stops in the first breakpoint, I can´t view some variables and stepping into a function, it shows another. It seems that Eclipse has problems with Linux kernel and u-boot symbols.
Someone uses Eclipse and BDI2000 to debug Linux kernel and u-boot?
Igor Luri
R&D Software Department
Fagor Automation S. Coop.
[-- Attachment #2: Type: text/html, Size: 1398 bytes --]
^ permalink raw reply
* Re: [FIXED] Trouble with SMC serial port in ppc/boot/simple on Embedded Planet 8248 board
From: Laurent Pinchart @ 2006-01-25 9:30 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <200601240926.14408.laurent.pinchart@tbox.biz>
Hi,
I've been able to fix the problem. I made a mistake in Linux boot code
(ppc/boot/simple/embed_config.c) when computing the amount of available RAM,
which resulted in Linux thinking it could access -16MB = 4080MB of RAM.
Laurent Pinchart
^ permalink raw reply
* Re: Yosemite/440EP why are readl()/ioread32() setup to read little-endian?
From: Stefan Roese @ 2006-01-25 9:57 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <43D66D06.9090904@ovro.caltech.edu>
Hi David,
On Tuesday 24 January 2006 19:08, David Hawkins wrote:
> readl() and ioread32() read the registers in little-endian format!
Correct. That's how it is implemented on all platforms. Think for example of
an pci device driver. Using these IO functions, the driver will become
platform independent, running without modifications on little- and big-endian
machines.
> If the processor was reading from the PCI bus, then sure, I
> could understand why this might be used, but even then, that
> should be up to the user, eg. by using cpu_to_le32 etc.
No. Please see above.
> Should I just be using pointers for remapped processor
> registers, and only use readl(), ioread32(), etc, on external
> memory?
That's how I do it. Only use readl() and friends for pci spaces (or other
little endian memory mapped areas).
Best regards,
Stefan
^ permalink raw reply
* Re: Yosemite/440EP is there a global interrupt enable mask?
From: Stefan Roese @ 2006-01-25 10:28 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <43D67AF6.6070403@ovro.caltech.edu>
Hi David,
On Tuesday 24 January 2006 20:07, David Hawkins wrote:
> I'm writing a simple driver to test IRQ handling on the
> AMCC Yosemite board. The board has an 8x2 header with several
> GPIO pins, a number of which can be configured as IRQ inputs.
>
> I have setup GPIO46 as output, and GPIO47 as input, and
> selected IRQ8 on that pin.
OK. So far good.
<snip>
> So, is there a kernel wide interrupt enable mask that I really
> should be using? Or, an interrupt enable API? I initially
> thought that when I registered an interrupt using
> request_irq() that the kernel would go off an enable the
> requested IRQ, but this test shows that it did not.
Yes, the request_irq() should enable the requested IRQ. You seem to have used
the wrong IRQ number though. Please see below.
> #include <linux/module.h> /* kernel modules */
> #include <linux/interrupt.h>/* request_irq(), etc */
> #include <asm/io.h> /* ioremap64(), iounmap(), readl() */
>
> static char *name = "yosemite_irq";
> static unsigned long long base = 0x0EF600C00; // 36-bit address
> static unsigned int size = 0x44;
> static char *kernel;
> static int irq = 8;
You are using the "External IRQ 8". This results in IRQ number 19 of the 2nd
interrupt controller of the 440ep. So please try (19+32) as the IRQ number
upon requesting the interrupt.
Best regards,
Stefan
^ permalink raw reply
* Re: [PATCH] Add support for lite5200b board.
From: Txema Lopez @ 2006-01-25 10:24 UTC (permalink / raw)
To: Sylvain Munaut; +Cc: John Rigby, linuxppc-embedded
In-Reply-To: <43D66F54.8000404@246tNt.com>
[-- Attachment #1: Type: text/plain, Size: 963 bytes --]
Hi ,
Sylvain Munaut wrote:
>Hi John,
>
>John Rigby wrote:
>
>
>>Sylvain,
>>
>>Here is an updated patch for the liteb board.
>>
>>John
>>
>>
>
>
>
We have a Lite5200b and are very interesting in this point.
For wich kernel version is this patch?
>Looks good. But two comments :
>
> * Isn't a modif to the arch/ppc/platform/Makefile missing ?
> * What's the "cs-1" you turn on there :
>
>
>
>>
>>+#ifdef CONFIG_LITE5200B
>>+ /* turn on cs1 */
>>+ port_config |= 0x80000000;
>>+#endif
>>
>>
>
>
>
What fix this ?
> I couldn't find the schema / real-doc of the Lite5200b,
>is this available somewhere on-line ?
>
>
>
>
>
Sylvain, I don't know if there are some Lite5200b doc on line, but I
have the schematics and could send to you or to anyone who want it.
> Sylvain
>_______________________________________________
>Linuxppc-embedded mailing list
>Linuxppc-embedded@ozlabs.org
>https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
>
[-- Attachment #2: tlopez.vcf --]
[-- Type: text/x-vcard, Size: 324 bytes --]
begin:vcard
fn:Jose Maria Lopez
n:Lopez;Jose Maria
org:Fagor Automation S. Coop.
adr:;;San Andres 19. Apdo. 144;Arrasate-Mondragon;;20500;Spain
email;internet:tlopez@aotek.es
title:Sotware engineer
tel;work:(34) 943719200
tel;fax:(34) 943791712
x-mozilla-html:FALSE
url:http://www.fagorautomation.es
version:2.1
end:vcard
^ permalink raw reply
* Re: [PATCH 001/001 Updated again] PMAC HD runtime blinking control
From: Andreas Schwab @ 2006-01-25 11:06 UTC (permalink / raw)
To: Cedric Pradalier; +Cc: Linuxppc-dev
In-Reply-To: <20060124222513.48ef0276.cedric.pradalier@inrialpes.fr>
Cedric Pradalier <cedric.pradalier@inrialpes.fr> writes:
> @@ -427,6 +432,15 @@ static void pmac_ide_kauai_selectproc(id
>
> #ifdef CONFIG_BLK_DEV_IDE_PMAC_BLINK
>
> +MODULE_AUTHOR("Paul Mackerras & Ben. Herrenschmidt");
> +MODULE_DESCRIPTION("Support for IDE interfaces on PowerMacs");
> +MODULE_LICENSE("GPL");
> +
> +static int activity_led = 0;
No need to zero-initialize a static variable.
> @@ -437,8 +451,7 @@ static spinlock_t pmu_blink_lock;
> static unsigned long pmu_blink_stoptime;
> static int pmu_blink_ledstate;
> static struct timer_list pmu_blink_timer;
> -static int pmu_ide_blink_enabled;
> -
> +static int pmu_ide_blink_enabled = 0;
Same.
Andreas.
--
Andreas Schwab, SuSE Labs, schwab@suse.de
SuSE Linux Products GmbH, Maxfeldstraße 5, 90409 Nürnberg, Germany
PGP key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for something completely different."
^ permalink raw reply
* [RFC] arch/ppc/boot/simple/embed_boot.c : Merging all keyvals parsing code
From: Laurent Pinchart @ 2006-01-25 11:15 UTC (permalink / raw)
To: linuxppc-embedded
Hi everybody,
the Embedded Planet boards boot loader pass a string containing key/value
pairs to the Linux loader code. That string is parsed in
arch/ppc/simple/embed_boot.c.
The current implementation duplicates the parsing code once for each supported
board. As I'm adding support for a new EP board (EP8248), I was wondering if
it would be worth merging all those parsers together. This would reduce the
source code size, but would be pointless at runtime as only one board support
code is compiled in the kernel anyway.
Should I submit a patch, or leave the code as it is ?
Laurent Pinchart
^ permalink raw reply
* Re: [PATCH 001/001 Updated again] PMAC HD runtime blinking control
From: Cedric Pradalier @ 2006-01-25 11:27 UTC (permalink / raw)
To: Andreas Schwab; +Cc: Linuxppc-dev
In-Reply-To: <jey814y3az.fsf@sykes.suse.de>
According to Andreas Schwab, on Wed, 25 Jan 2006 12:06:44
+0100,
>Cedric Pradalier <cedric.pradalier@inrialpes.fr> writes:
>
>> @@ -427,6 +432,15 @@ static void pmac_ide_kauai_selectproc(id
>>
>> #ifdef CONFIG_BLK_DEV_IDE_PMAC_BLINK
>>
>> +MODULE_AUTHOR("Paul Mackerras & Ben. Herrenschmidt");
>> +MODULE_DESCRIPTION("Support for IDE interfaces on PowerMacs");
>> +MODULE_LICENSE("GPL");
>> +
>> +static int activity_led = 0;
>
>No need to zero-initialize a static variable.
On the other hand, the cost is minor for an increased
readability and a behavior which does not rely on any
assumption on the compiler (or even the C specification).
I tend to favor readability first in my coding.
Cheers
--
Cedric
^ permalink raw reply
* [PATCH 3/6] C-language equivalents of include/asm-*/bitops.h
From: Akinobu Mita @ 2006-01-25 11:32 UTC (permalink / raw)
To: linux-kernel
Cc: linux-mips, linux-ia64, Ian Molton, David Howells, linuxppc-dev,
Greg Ungerer, sparclinux, Miles Bader, Linus Torvalds,
Yoshinori Sato, Hirokazu Takata, linuxsh-shmedia-dev, linux-m68k,
Ivan Kokshaysky, Richard Henderson, Chris Zankel, dev-etrax,
ultralinux, Andi Kleen, linuxsh-dev, linux390, Russell King,
parisc-linux
In-Reply-To: <20060125112625.GA18584@miraclelinux.com>
o generic {,test_and_}{set,clear,change}_bit() (atomic bitops)
This patch introduces the C-language equivalents of the functions below:
void set_bit(int nr, volatile unsigned long *addr);
void clear_bit(int nr, volatile unsigned long *addr);
void change_bit(int nr, volatile unsigned long *addr);
int test_and_set_bit(int nr, volatile unsigned long *addr);
int test_and_clear_bit(int nr, volatile unsigned long *addr);
int test_and_change_bit(int nr, volatile unsigned long *addr);
HAVE_ARCH_ATOMIC_BITOPS is defined when the architecture has its own
version of these functions.
This code largely copied from:
include/asm-powerpc/bitops.h
include/asm-parisc/bitops.h
include/asm-parisc/atomic.h
o generic __{,test_and_}{set,clear,change}_bit() and test_bit()
This patch introduces the C-language equivalents of the functions below:
void __set_bit(int nr, volatile unsigned long *addr);
void __clear_bit(int nr, volatile unsigned long *addr);
void __change_bit(int nr, volatile unsigned long *addr);
int __test_and_set_bit(int nr, volatile unsigned long *addr);
int __test_and_clear_bit(int nr, volatile unsigned long *addr);
int __test_and_change_bit(int nr, volatile unsigned long *addr);
int test_bit(int nr, const volatile unsigned long *addr);
HAVE_ARCH_NON_ATOMIC_BITOPS is defined when the architecture has its own
version of these functions.
This code largely copied from:
asm-powerpc/bitops.h
o generic __ffs()
This patch introduces the C-language equivalent of the function:
unsigned long __ffs(unsigned long word);
HAVE_ARCH___FFS_BITOPS is defined when the architecture has its own
version of these functions.
This code largely copied from:
include/asm-sparc64/bitops.h
o generic ffz()
This patch introduces the C-language equivalent of the function:
unsigned long ffz(unsigned long word);
HAVE_ARCH_FFZ_BITOPS is defined when the architecture has its own
version of these functions.
This code largely copied from:
include/asm-sparc64/bitops.h
o generic fls()
This patch introduces the C-language equivalent of the function:
int fls(int x);
HAVE_ARCH_FLS_BITOPS is defined when the architecture has its own
version of these functions.
This code largely copied from:
include/linux/bitops.h
o generic fls64()
This patch introduces the C-language equivalent of the function:
int fls64(__u64 x);
HAVE_ARCH_FLS64_BITOPS is defined when the architecture has its own
version of these functions.
This code largely copied from:
include/linux/bitops.h
o generic find_{next,first}{,_zero}_bit()
This patch introduces the C-language equivalents of the functions below:
unsigned logn find_next_bit(const unsigned long *addr, unsigned long size,
unsigned long offset);
unsigned long find_next_zero_bit(const unsigned long *addr, unsigned long size,
unsigned long offset);
unsigned long find_first_zero_bit(const unsigned long *addr,
unsigned long size);
unsigned long find_first_bit(const unsigned long *addr, unsigned long size);
HAVE_ARCH_FIND_BITOPS is defined when the architecture has its own
version of these functions.
This code largely copied from:
arch/powerpc/lib/bitops.c
==== KERNEL
o generic sched_find_first_bit()
This patch introduces the C-language equivalent of the function:
int sched_find_first_bit(const unsigned long *b);
HAVE_ARCH_SCHED_BITOPS is defined when the architecture has its own
version of these functions.
This code largely copied from:
include/asm-powerpc/bitops.h
o generic ffs()
This patch introduces the C-language equivalent of the function:
int ffs(int x);
HAVE_ARCH_FFS_BITOPS is defined when the architecture has its own
version of these functions.
This code largely copied from:
include/linux/bitops.h
o generic hweight{32,16,8}()
This patch introduces the C-language equivalents of the functions below:
unsigned int hweight32(unsigned int w);
unsigned int hweight16(unsigned int w);
unsigned int hweight8(unsigned int w);
HAVE_ARCH_HWEIGHT_BITOPS is defined when the architecture has its own
version of these functions.
This code largely copied from:
include/linux/bitops.h
o generic hweight64()
This patch introduces the C-language equivalent of the function:
unsigned long hweight64(__u64 w);
HAVE_ARCH_HWEIGHT64_BITOPS is defined when the architecture has its own
version of these functions.
This code largely copied from:
include/linux/bitops.h
o generic ext2_{set,clear,test,find_first_zero,find_next_zero}_bit()
This patch introduces the C-language equivalents of the functions below:
int ext2_set_bit(int nr, volatile unsigned long *addr);
int ext2_clear_bit(int nr, volatile unsigned long *addr);
int ext2_test_bit(int nr, const volatile unsigned long *addr);
unsigned long ext2_find_first_zero_bit(const unsigned long *addr,
unsigned long size);
HAVE_ARCH_EXT2_NON_ATOMIC_BITOPS is defined when the architecture has its own
version of these functions.
unsinged long ext2_find_next_zero_bit(const unsigned long *addr,
unsigned long size);
This code largely copied from:
include/asm-powerpc/bitops.h
include/asm-parisc/bitops.h
o generic ext2_{set,clear}_bit_atomic()
This patch introduces the C-language equivalents of the functions below:
int ext2_set_bit_atomic(int nr, volatile unsigned long *addr);
int ext2_clear_bit_atomic(int nr, volatile unsigned long *addr);
HAVE_ARCH_EXT2_ATOMIC_BITOPS is defined when the architecture has its own
version of these functions.
This code largely copied from:
include/asm-sparc/bitops.h
o generic minix_{test,set,test_and_clear,test,find_first_zero}_bit()
This patch introduces the C-language equivalents of the functions below:
HAVE_ARCH_MINIX_BITOPS is defined when the architecture has its own
version of these functions.
int minix_test_and_set_bit(int nr, volatile unsigned long *addr);
int minix_set_bit(int nr, volatile unsigned long *addr);
int minix_test_and_clear_bit(int nr, volatile unsigned long *addr);
int minix_test_bit(int nr, const volatile unsigned long *addr);
unsigned long minix_find_first_zero_bit(const unsigned long *addr,
unsigned long size);
This code largely copied from:
include/asm-sparc/bitops.h
Signed-off-by: Akinobu Mita <mita@miraclelinux.com>
---
bitops.h | 677 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----
1 files changed, 641 insertions(+), 36 deletions(-)
Index: work/include/asm-generic/bitops.h
===================================================================
--- work.orig/include/asm-generic/bitops.h 2006-01-25 19:14:27.000000000 +0900
+++ work/include/asm-generic/bitops.h 2006-01-25 19:32:48.000000000 +0900
@@ -1,81 +1,686 @@
#ifndef _ASM_GENERIC_BITOPS_H_
#define _ASM_GENERIC_BITOPS_H_
+#include <asm/types.h>
+
+#define BITOP_MASK(nr) (1UL << ((nr) % BITS_PER_LONG))
+#define BITOP_WORD(nr) ((nr) / BITS_PER_LONG)
+#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
+
+#ifndef HAVE_ARCH_ATOMIC_BITOPS
+
+#ifdef CONFIG_SMP
+#include <asm/spinlock.h>
+#include <asm/cache.h> /* we use L1_CACHE_BYTES */
+
+/* Use an array of spinlocks for our atomic_ts.
+ * Hash function to index into a different SPINLOCK.
+ * Since "a" is usually an address, use one spinlock per cacheline.
+ */
+# define ATOMIC_HASH_SIZE 4
+# define ATOMIC_HASH(a) (&(__atomic_hash[ (((unsigned long) a)/L1_CACHE_BYTES) & (ATOMIC_HASH_SIZE-1) ]))
+
+extern raw_spinlock_t __atomic_hash[ATOMIC_HASH_SIZE] __lock_aligned;
+
+/* Can't use raw_spin_lock_irq because of #include problems, so
+ * this is the substitute */
+#define _atomic_spin_lock_irqsave(l,f) do { \
+ raw_spinlock_t *s = ATOMIC_HASH(l); \
+ local_irq_save(f); \
+ __raw_spin_lock(s); \
+} while(0)
+
+#define _atomic_spin_unlock_irqrestore(l,f) do { \
+ raw_spinlock_t *s = ATOMIC_HASH(l); \
+ __raw_spin_unlock(s); \
+ local_irq_restore(f); \
+} while(0)
+
+
+#else
+# define _atomic_spin_lock_irqsave(l,f) do { local_irq_save(f); } while (0)
+# define _atomic_spin_unlock_irqrestore(l,f) do { local_irq_restore(f); } while (0)
+#endif
+
/*
* For the benefit of those who are trying to port Linux to another
* architecture, here are some C-language equivalents. You should
* recode these in the native assembly language, if at all possible.
- * To guarantee atomicity, these routines call cli() and sti() to
- * disable interrupts while they operate. (You have to provide inline
- * routines to cli() and sti().)
*
- * Also note, these routines assume that you have 32 bit longs.
- * You will have to change this if you are trying to port Linux to the
- * Alpha architecture or to a Cray. :-)
- *
* C language equivalents written by Theodore Ts'o, 9/26/92
*/
-extern __inline__ int set_bit(int nr,long * addr)
+static __inline__ void set_bit(int nr, volatile unsigned long *addr)
+{
+ unsigned long mask = BITOP_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
+ unsigned long flags;
+
+ _atomic_spin_lock_irqsave(p, flags);
+ *p |= mask;
+ _atomic_spin_unlock_irqrestore(p, flags);
+}
+
+static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
+{
+ unsigned long mask = BITOP_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
+ unsigned long flags;
+
+ _atomic_spin_lock_irqsave(p, flags);
+ *p &= ~mask;
+ _atomic_spin_unlock_irqrestore(p, flags);
+}
+
+static __inline__ void change_bit(int nr, volatile unsigned long *addr)
+{
+ unsigned long mask = BITOP_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
+ unsigned long flags;
+
+ _atomic_spin_lock_irqsave(p, flags);
+ *p ^= mask;
+ _atomic_spin_unlock_irqrestore(p, flags);
+}
+
+static __inline__ int test_and_set_bit(int nr, volatile unsigned long *addr)
+{
+ unsigned long mask = BITOP_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
+ unsigned long old;
+ unsigned long flags;
+
+ _atomic_spin_lock_irqsave(p, flags);
+ old = *p;
+ *p = old | mask;
+ _atomic_spin_unlock_irqrestore(p, flags);
+
+ return (old & mask) != 0;
+}
+
+static __inline__ int test_and_clear_bit(int nr, volatile unsigned long *addr)
+{
+ unsigned long mask = BITOP_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
+ unsigned long old;
+ unsigned long flags;
+
+ _atomic_spin_lock_irqsave(p, flags);
+ old = *p;
+ *p = old & ~mask;
+ _atomic_spin_unlock_irqrestore(p, flags);
+
+ return (old & mask) != 0;
+}
+
+static __inline__ int test_and_change_bit(int nr, volatile unsigned long *addr)
+{
+ unsigned long mask = BITOP_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
+ unsigned long old;
+ unsigned long flags;
+
+ _atomic_spin_lock_irqsave(p, flags);
+ old = *p;
+ *p = old ^ mask;
+ _atomic_spin_unlock_irqrestore(p, flags);
+
+ return (old & mask) != 0;
+}
+
+#endif /* HAVE_ARCH_ATOMIC_BITOPS */
+
+#ifndef HAVE_ARCH_NON_ATOMIC_BITOPS
+
+static __inline__ void __set_bit(int nr, volatile unsigned long *addr)
+{
+ unsigned long mask = BITOP_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
+
+ *p |= mask;
+}
+
+static __inline__ void __clear_bit(int nr, volatile unsigned long *addr)
+{
+ unsigned long mask = BITOP_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
+
+ *p &= ~mask;
+}
+
+static __inline__ void __change_bit(int nr, volatile unsigned long *addr)
+{
+ unsigned long mask = BITOP_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
+
+ *p ^= mask;
+}
+
+static __inline__ int __test_and_set_bit(int nr, volatile unsigned long *addr)
{
- int mask, retval;
+ unsigned long mask = BITOP_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
+ unsigned long old = *p;
- addr += nr >> 5;
- mask = 1 << (nr & 0x1f);
- cli();
- retval = (mask & *addr) != 0;
- *addr |= mask;
- sti();
- return retval;
+ *p = old | mask;
+ return (old & mask) != 0;
}
-extern __inline__ int clear_bit(int nr, long * addr)
+static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long *addr)
{
- int mask, retval;
+ unsigned long mask = BITOP_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
+ unsigned long old = *p;
- addr += nr >> 5;
- mask = 1 << (nr & 0x1f);
- cli();
- retval = (mask & *addr) != 0;
- *addr &= ~mask;
- sti();
- return retval;
+ *p = old & ~mask;
+ return (old & mask) != 0;
}
-extern __inline__ int test_bit(int nr, const unsigned long * addr)
+static __inline__ int __test_and_change_bit(int nr,
+ volatile unsigned long *addr)
+{
+ unsigned long mask = BITOP_MASK(nr);
+ unsigned long *p = ((unsigned long *)addr) + BITOP_WORD(nr);
+ unsigned long old = *p;
+
+ *p = old ^ mask;
+ return (old & mask) != 0;
+}
+
+static __inline__ int test_bit(int nr, __const__ volatile unsigned long *addr)
+{
+ return 1UL & (addr[BITOP_WORD(nr)] >> (nr & (BITS_PER_LONG-1)));
+}
+
+#endif /* HAVE_ARCH_NON_ATOMIC_BITOPS */
+
+#ifndef HAVE_ARCH___FFS_BITOPS
+
+/**
+ * __ffs - find first bit in word.
+ * @word: The word to search
+ *
+ * Returns 0..BITS_PER_LONG-1
+ * Undefined if no bit exists, so code should check against 0 first.
+ */
+static inline unsigned long __ffs(unsigned long word)
{
- int mask;
+ int b = 0, s;
- addr += nr >> 5;
- mask = 1 << (nr & 0x1f);
- return ((mask & *addr) != 0);
+#if BITS_PER_LONG == 32
+ s = 16; if (word << 16 != 0) s = 0; b += s; word >>= s;
+ s = 8; if (word << 24 != 0) s = 0; b += s; word >>= s;
+ s = 4; if (word << 28 != 0) s = 0; b += s; word >>= s;
+ s = 2; if (word << 30 != 0) s = 0; b += s; word >>= s;
+ s = 1; if (word << 31 != 0) s = 0; b += s;
+
+ return b;
+#elif BITS_PER_LONG == 64
+ s = 32; if (word << 32 != 0) s = 0; b += s; word >>= s;
+ s = 16; if (word << 48 != 0) s = 0; b += s; word >>= s;
+ s = 8; if (word << 56 != 0) s = 0; b += s; word >>= s;
+ s = 4; if (word << 60 != 0) s = 0; b += s; word >>= s;
+ s = 2; if (word << 62 != 0) s = 0; b += s; word >>= s;
+ s = 1; if (word << 63 != 0) s = 0; b += s;
+
+ return b;
+#else
+#error BITS_PER_LONG not defined
+#endif
}
+#endif /* HAVE_ARCH___FFS_BITOPS */
+
+#ifndef HAVE_ARCH_FFZ_BITOPS
+
+/* Undefined if no bit is zero. */
+#define ffz(x) __ffs(~x)
+
+#endif /* HAVE_ARCH_FFZ_BITOPS */
+
+#ifndef HAVE_ARCH_FLS_BITOPS
+
/*
* fls: find last bit set.
*/
-#define fls(x) generic_fls(x)
-#define fls64(x) generic_fls64(x)
+static __inline__ int fls(int x)
+{
+ int r = 32;
+
+ if (!x)
+ return 0;
+ if (!(x & 0xffff0000u)) {
+ x <<= 16;
+ r -= 16;
+ }
+ if (!(x & 0xff000000u)) {
+ x <<= 8;
+ r -= 8;
+ }
+ if (!(x & 0xf0000000u)) {
+ x <<= 4;
+ r -= 4;
+ }
+ if (!(x & 0xc0000000u)) {
+ x <<= 2;
+ r -= 2;
+ }
+ if (!(x & 0x80000000u)) {
+ x <<= 1;
+ r -= 1;
+ }
+ return r;
+}
+
+#endif /* HAVE_ARCH_FLS_BITOPS */
+
+#ifndef HAVE_ARCH_FLS64_BITOPS
+
+static inline int fls64(__u64 x)
+{
+ __u32 h = x >> 32;
+ if (h)
+ return fls(x) + 32;
+ return fls(x);
+}
+
+#endif /* HAVE_ARCH_FLS64_BITOPS */
+
+#ifndef HAVE_ARCH_FIND_BITOPS
+
+/**
+ * find_next_bit - find the next set bit in a memory region
+ * @addr: The address to base the search on
+ * @offset: The bitnumber to start searching at
+ * @size: The maximum size to search
+ */
+static inline unsigned long find_next_bit(const unsigned long *addr,
+ unsigned long size, unsigned long offset)
+{
+ const unsigned long *p = addr + BITOP_WORD(offset);
+ unsigned long result = offset & ~(BITS_PER_LONG-1);
+ unsigned long tmp;
+
+ if (offset >= size)
+ return size;
+ size -= result;
+ offset %= BITS_PER_LONG;
+ if (offset) {
+ tmp = *(p++);
+ tmp &= (~0UL << offset);
+ if (size < BITS_PER_LONG)
+ goto found_first;
+ if (tmp)
+ goto found_middle;
+ size -= BITS_PER_LONG;
+ result += BITS_PER_LONG;
+ }
+ while (size & ~(BITS_PER_LONG-1)) {
+ if ((tmp = *(p++)))
+ goto found_middle;
+ result += BITS_PER_LONG;
+ size -= BITS_PER_LONG;
+ }
+ if (!size)
+ return result;
+ tmp = *p;
+
+found_first:
+ tmp &= (~0UL >> (BITS_PER_LONG - size));
+ if (tmp == 0UL) /* Are any bits set? */
+ return result + size; /* Nope. */
+found_middle:
+ return result + __ffs(tmp);
+}
+
+/*
+ * This implementation of find_{first,next}_zero_bit was stolen from
+ * Linus' asm-alpha/bitops.h.
+ */
+static inline unsigned long find_next_zero_bit(const unsigned long *addr,
+ unsigned long size, unsigned long offset)
+{
+ const unsigned long *p = addr + BITOP_WORD(offset);
+ unsigned long result = offset & ~(BITS_PER_LONG-1);
+ unsigned long tmp;
+
+ if (offset >= size)
+ return size;
+ size -= result;
+ offset %= BITS_PER_LONG;
+ if (offset) {
+ tmp = *(p++);
+ tmp |= ~0UL >> (BITS_PER_LONG - offset);
+ if (size < BITS_PER_LONG)
+ goto found_first;
+ if (~tmp)
+ goto found_middle;
+ size -= BITS_PER_LONG;
+ result += BITS_PER_LONG;
+ }
+ while (size & ~(BITS_PER_LONG-1)) {
+ if (~(tmp = *(p++)))
+ goto found_middle;
+ result += BITS_PER_LONG;
+ size -= BITS_PER_LONG;
+ }
+ if (!size)
+ return result;
+ tmp = *p;
+
+found_first:
+ tmp |= ~0UL << size;
+ if (tmp == ~0UL) /* Are any bits zero? */
+ return result + size; /* Nope. */
+found_middle:
+ return result + ffz(tmp);
+}
+
+#define find_first_zero_bit(addr, size) find_next_zero_bit((addr), (size), 0)
+#define find_first_bit(addr, size) find_next_bit((addr), (size), 0)
+
+#endif /* HAVE_ARCH_FIND_BITOPS */
#ifdef __KERNEL__
+#ifndef HAVE_ARCH_SCHED_BITOPS
+
+#include <linux/compiler.h> /* unlikely() */
+
+/*
+ * Every architecture must define this function. It's the fastest
+ * way of searching a 140-bit bitmap where the first 100 bits are
+ * unlikely to be set. It's guaranteed that at least one of the 140
+ * bits is cleared.
+ */
+static inline int sched_find_first_bit(const unsigned long *b)
+{
+#if BITS_PER_LONG == 64
+ if (unlikely(b[0]))
+ return __ffs(b[0]);
+ if (unlikely(b[1]))
+ return __ffs(b[1]) + 64;
+ return __ffs(b[2]) + 128;
+#elif BITS_PER_LONG == 32
+ if (unlikely(b[0]))
+ return __ffs(b[0]);
+ if (unlikely(b[1]))
+ return __ffs(b[1]) + 32;
+ if (unlikely(b[2]))
+ return __ffs(b[2]) + 64;
+ if (b[3])
+ return __ffs(b[3]) + 96;
+ return __ffs(b[4]) + 128;
+#else
+#error BITS_PER_LONG not defined
+#endif
+}
+
+#endif /* HAVE_ARCH_SCHED_BITOPS */
+
+#ifndef HAVE_ARCH_FFS_BITOPS
+
/*
* ffs: find first bit set. This is defined the same way as
* the libc and compiler builtin ffs routines, therefore
* differs in spirit from the above ffz (man ffs).
*/
-#define ffs(x) generic_ffs(x)
+static inline int ffs(int x)
+{
+ int r = 1;
+
+ if (!x)
+ return 0;
+ if (!(x & 0xffff)) {
+ x >>= 16;
+ r += 16;
+ }
+ if (!(x & 0xff)) {
+ x >>= 8;
+ r += 8;
+ }
+ if (!(x & 0xf)) {
+ x >>= 4;
+ r += 4;
+ }
+ if (!(x & 3)) {
+ x >>= 2;
+ r += 2;
+ }
+ if (!(x & 1)) {
+ x >>= 1;
+ r += 1;
+ }
+ return r;
+}
+
+#endif /* HAVE_ARCH_FFS_BITOPS */
+
+
+#ifndef HAVE_ARCH_HWEIGHT_BITOPS
/*
* hweightN: returns the hamming weight (i.e. the number
* of bits set) of a N-bit word
*/
-#define hweight32(x) generic_hweight32(x)
-#define hweight16(x) generic_hweight16(x)
-#define hweight8(x) generic_hweight8(x)
+static inline unsigned int hweight32(unsigned int w)
+{
+ unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
+ res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
+ res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
+ res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
+ return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
+}
+
+static inline unsigned int hweight16(unsigned int w)
+{
+ unsigned int res = (w & 0x5555) + ((w >> 1) & 0x5555);
+ res = (res & 0x3333) + ((res >> 2) & 0x3333);
+ res = (res & 0x0F0F) + ((res >> 4) & 0x0F0F);
+ return (res & 0x00FF) + ((res >> 8) & 0x00FF);
+}
+
+static inline unsigned int hweight8(unsigned int w)
+{
+ unsigned int res = (w & 0x55) + ((w >> 1) & 0x55);
+ res = (res & 0x33) + ((res >> 2) & 0x33);
+ return (res & 0x0F) + ((res >> 4) & 0x0F);
+}
+
+#endif /* HAVE_ARCH_HWEIGHT_BITOPS */
+
+#ifndef HAVE_ARCH_HWEIGHT64_BITOPS
+
+static inline unsigned long hweight64(__u64 w)
+{
+#if BITS_PER_LONG < 64
+ return hweight32((unsigned int)(w >> 32)) + hweight32((unsigned int)w);
+#else
+ u64 res;
+ res = (w & 0x5555555555555555ul) + ((w >> 1) & 0x5555555555555555ul);
+ res = (res & 0x3333333333333333ul) + ((res >> 2) & 0x3333333333333333ul);
+ res = (res & 0x0F0F0F0F0F0F0F0Ful) + ((res >> 4) & 0x0F0F0F0F0F0F0F0Ful);
+ res = (res & 0x00FF00FF00FF00FFul) + ((res >> 8) & 0x00FF00FF00FF00FFul);
+ res = (res & 0x0000FFFF0000FFFFul) + ((res >> 16) & 0x0000FFFF0000FFFFul);
+ return (res & 0x00000000FFFFFFFFul) + ((res >> 32) & 0x00000000FFFFFFFFul);
+#endif
+}
+
+#endif /* HAVE_ARCH_HWEIGHT64_BITOPS */
+
+#ifndef HAVE_ARCH_EXT2_NON_ATOMIC_BITOPS
+
+#include <asm/byteorder.h>
+
+#if defined(__LITTLE_ENDIAN)
+
+static __inline__ int generic_test_le_bit(unsigned long nr,
+ __const__ unsigned long *addr)
+{
+ __const__ unsigned char *tmp = (__const__ unsigned char *) addr;
+ return (tmp[nr >> 3] >> (nr & 7)) & 1;
+}
+
+#define generic___set_le_bit(nr, addr) __set_bit(nr, addr)
+#define generic___clear_le_bit(nr, addr) __clear_bit(nr, addr)
+
+#define generic_test_and_set_le_bit(nr, addr) test_and_set_bit(nr, addr)
+#define generic_test_and_clear_le_bit(nr, addr) test_and_clear_bit(nr, addr)
+
+#define generic___test_and_set_le_bit(nr, addr) __test_and_set_bit(nr, addr)
+#define generic___test_and_clear_le_bit(nr, addr) __test_and_clear_bit(nr, addr)
+
+#define generic_find_next_zero_le_bit(addr, size, offset) find_next_zero_bit(addr, size, offset)
+
+#elif defined(__BIG_ENDIAN)
+
+static __inline__ int generic_test_le_bit(unsigned long nr,
+ __const__ unsigned long *addr)
+{
+ __const__ unsigned char *tmp = (__const__ unsigned char *) addr;
+ return (tmp[nr >> 3] >> (nr & 7)) & 1;
+}
+
+#define generic___set_le_bit(nr, addr) \
+ __set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
+#define generic___clear_le_bit(nr, addr) \
+ __clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
+
+#define generic_test_and_set_le_bit(nr, addr) \
+ test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
+#define generic_test_and_clear_le_bit(nr, addr) \
+ test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
+
+#define generic___test_and_set_le_bit(nr, addr) \
+ __test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
+#define generic___test_and_clear_le_bit(nr, addr) \
+ __test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
+
+/* include/linux/byteorder does not support "unsigned long" type */
+static inline unsigned long ext2_swabp(const unsigned long * x)
+{
+#if BITS_PER_LONG == 64
+ return (unsigned long) __swab64p((u64 *) x);
+#elif BITS_PER_LONG == 32
+ return (unsigned long) __swab32p((u32 *) x);
+#else
+#error BITS_PER_LONG not defined
+#endif
+}
+
+/* include/linux/byteorder doesn't support "unsigned long" type */
+static inline unsigned long ext2_swab(const unsigned long y)
+{
+#if BITS_PER_LONG == 64
+ return (unsigned long) __swab64((u64) y);
+#elif BITS_PER_LONG == 32
+ return (unsigned long) __swab32((u32) y);
+#else
+#error BITS_PER_LONG not defined
+#endif
+}
+
+static __inline__ unsigned long generic_find_next_zero_le_bit(const unsigned long *addr,
+ unsigned long size, unsigned long offset)
+{
+ const unsigned long *p = addr + BITOP_WORD(offset);
+ unsigned long result = offset & ~(BITS_PER_LONG - 1);
+ unsigned long tmp;
+
+ if (offset >= size)
+ return size;
+ size -= result;
+ offset &= (BITS_PER_LONG - 1UL);
+ if (offset) {
+ tmp = ext2_swabp(p++);
+ tmp |= (~0UL >> (BITS_PER_LONG - offset));
+ if (size < BITS_PER_LONG)
+ goto found_first;
+ if (~tmp)
+ goto found_middle;
+ size -= BITS_PER_LONG;
+ result += BITS_PER_LONG;
+ }
+
+ while (size & ~(BITS_PER_LONG - 1)) {
+ if (~(tmp = *(p++)))
+ goto found_middle_swap;
+ result += BITS_PER_LONG;
+ size -= BITS_PER_LONG;
+ }
+ if (!size)
+ return result;
+ tmp = ext2_swabp(p);
+found_first:
+ tmp |= ~0UL << size;
+ if (tmp == ~0UL) /* Are any bits zero? */
+ return result + size; /* Nope. Skip ffz */
+found_middle:
+ return result + ffz(tmp);
+
+found_middle_swap:
+ return result + ffz(ext2_swab(tmp));
+}
+#else
+#error "Please fix <asm/byteorder.h>"
+#endif
+
+#define generic_find_first_zero_le_bit(addr, size) \
+ generic_find_next_zero_le_bit((addr), (size), 0)
+
+#define ext2_set_bit(nr,addr) \
+ generic___test_and_set_le_bit((nr),(unsigned long *)(addr))
+#define ext2_clear_bit(nr,addr) \
+ generic___test_and_clear_le_bit((nr),(unsigned long *)(addr))
+
+#define ext2_test_bit(nr,addr) \
+ generic_test_le_bit((nr),(unsigned long *)(addr))
+#define ext2_find_first_zero_bit(addr, size) \
+ generic_find_first_zero_le_bit((unsigned long *)(addr), (size))
+#define ext2_find_next_zero_bit(addr, size, off) \
+ generic_find_next_zero_le_bit((unsigned long *)(addr), (size), (off))
+
+#endif /* HAVE_ARCH_EXT2_NON_ATOMIC_BITOPS */
+
+#ifndef HAVE_ARCH_EXT2_ATOMIC_BITOPS
+
+#define ext2_set_bit_atomic(lock, nr, addr) \
+ ({ \
+ int ret; \
+ spin_lock(lock); \
+ ret = ext2_set_bit((nr), (unsigned long *)(addr)); \
+ spin_unlock(lock); \
+ ret; \
+ })
+
+#define ext2_clear_bit_atomic(lock, nr, addr) \
+ ({ \
+ int ret; \
+ spin_lock(lock); \
+ ret = ext2_clear_bit((nr), (unsigned long *)(addr)); \
+ spin_unlock(lock); \
+ ret; \
+ })
+
+#endif /* HAVE_ARCH_EXT2_ATOMIC_BITOPS */
+
+#ifndef HAVE_ARCH_MINIX_BITOPS
+
+#define minix_test_and_set_bit(nr,addr) \
+ __test_and_set_bit((nr),(unsigned long *)(addr))
+#define minix_set_bit(nr,addr) \
+ __set_bit((nr),(unsigned long *)(addr))
+#define minix_test_and_clear_bit(nr,addr) \
+ __test_and_clear_bit((nr),(unsigned long *)(addr))
+#define minix_test_bit(nr,addr) \
+ test_bit((nr),(unsigned long *)(addr))
+#define minix_find_first_zero_bit(addr,size) \
+ find_first_zero_bit((unsigned long *)(addr),(size))
+
+#endif /* HAVE_ARCH_MINIX_BITOPS */
#endif /* __KERNEL__ */
^ permalink raw reply
* [PATCH 5/6] fix warning on test_ti_thread_flag()
From: Akinobu Mita @ 2006-01-25 11:34 UTC (permalink / raw)
To: linux-kernel
Cc: linux-mips, linux-ia64, Ian Molton, David Howells, linuxppc-dev,
Greg Ungerer, sparclinux, Miles Bader, Linus Torvalds,
Yoshinori Sato, Hirokazu Takata, linuxsh-shmedia-dev, linux-m68k,
Ivan Kokshaysky, Richard Henderson, Chris Zankel, dev-etrax,
ultralinux, Andi Kleen, linuxsh-dev, linux390, Russell King,
parisc-linux
In-Reply-To: <20060125112625.GA18584@miraclelinux.com>
If the arechitecture is
- BITS_PER_LONG == 64
- struct thread_info.flag 32 is bits
- second argument of test_bit() was void *
Then compiler print error message on test_ti_thread_flags()
in include/linux/thread_info.h
Signed-off-by: Akinobu Mita <mita@miraclelinux.com>
---
thread_info.h | 2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: 2.6-git/include/linux/thread_info.h
===================================================================
--- 2.6-git.orig/include/linux/thread_info.h 2006-01-25 19:07:12.000000000 +0900
+++ 2.6-git/include/linux/thread_info.h 2006-01-25 19:14:26.000000000 +0900
@@ -49,7 +49,7 @@
static inline int test_ti_thread_flag(struct thread_info *ti, int flag)
{
- return test_bit(flag,&ti->flags);
+ return test_bit(flag, (void *)&ti->flags);
}
#define set_thread_flag(flag) \
^ permalink raw reply
* [PATCH 6/6] remove unused generic bitops in include/linux/bitops.h
From: Akinobu Mita @ 2006-01-25 11:35 UTC (permalink / raw)
To: linux-kernel
Cc: linux-mips, linux-ia64, Ian Molton, David Howells, linuxppc-dev,
Greg Ungerer, sparclinux, Miles Bader, Linus Torvalds,
Yoshinori Sato, Hirokazu Takata, linuxsh-shmedia-dev, linux-m68k,
Ivan Kokshaysky, Richard Henderson, Chris Zankel, dev-etrax,
ultralinux, Andi Kleen, linuxsh-dev, linux390, Russell King,
parisc-linux
In-Reply-To: <20060125112625.GA18584@miraclelinux.com>
generic_{ffs,fls,fls64,hweight{64,32,16,8}}() were moved into
include/asm-generic/bitops.h. So all architectures don't use them.
Signed-off-by: Akinobu Mita <mita@miraclelinux.com>
---
bitops.h | 124 ---------------------------------------------------------------
1 files changed, 1 insertion(+), 123 deletions(-)
Index: 2.6-git/include/linux/bitops.h
===================================================================
--- 2.6-git.orig/include/linux/bitops.h 2006-01-25 19:07:12.000000000 +0900
+++ 2.6-git/include/linux/bitops.h 2006-01-25 19:14:27.000000000 +0900
@@ -3,88 +3,11 @@
#include <asm/types.h>
/*
- * ffs: find first bit set. This is defined the same way as
- * the libc and compiler builtin ffs routines, therefore
- * differs in spirit from the above ffz (man ffs).
- */
-
-static inline int generic_ffs(int x)
-{
- int r = 1;
-
- if (!x)
- return 0;
- if (!(x & 0xffff)) {
- x >>= 16;
- r += 16;
- }
- if (!(x & 0xff)) {
- x >>= 8;
- r += 8;
- }
- if (!(x & 0xf)) {
- x >>= 4;
- r += 4;
- }
- if (!(x & 3)) {
- x >>= 2;
- r += 2;
- }
- if (!(x & 1)) {
- x >>= 1;
- r += 1;
- }
- return r;
-}
-
-/*
- * fls: find last bit set.
- */
-
-static __inline__ int generic_fls(int x)
-{
- int r = 32;
-
- if (!x)
- return 0;
- if (!(x & 0xffff0000u)) {
- x <<= 16;
- r -= 16;
- }
- if (!(x & 0xff000000u)) {
- x <<= 8;
- r -= 8;
- }
- if (!(x & 0xf0000000u)) {
- x <<= 4;
- r -= 4;
- }
- if (!(x & 0xc0000000u)) {
- x <<= 2;
- r -= 2;
- }
- if (!(x & 0x80000000u)) {
- x <<= 1;
- r -= 1;
- }
- return r;
-}
-
-/*
* Include this here because some architectures need generic_ffs/fls in
* scope
*/
#include <asm/bitops.h>
-
-static inline int generic_fls64(__u64 x)
-{
- __u32 h = x >> 32;
- if (h)
- return fls(x) + 32;
- return fls(x);
-}
-
static __inline__ int get_bitmask_order(unsigned int count)
{
int order;
@@ -103,54 +26,9 @@
return order;
}
-/*
- * hweightN: returns the hamming weight (i.e. the number
- * of bits set) of a N-bit word
- */
-
-static inline unsigned int generic_hweight32(unsigned int w)
-{
- unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555);
- res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
- res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F);
- res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF);
- return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF);
-}
-
-static inline unsigned int generic_hweight16(unsigned int w)
-{
- unsigned int res = (w & 0x5555) + ((w >> 1) & 0x5555);
- res = (res & 0x3333) + ((res >> 2) & 0x3333);
- res = (res & 0x0F0F) + ((res >> 4) & 0x0F0F);
- return (res & 0x00FF) + ((res >> 8) & 0x00FF);
-}
-
-static inline unsigned int generic_hweight8(unsigned int w)
-{
- unsigned int res = (w & 0x55) + ((w >> 1) & 0x55);
- res = (res & 0x33) + ((res >> 2) & 0x33);
- return (res & 0x0F) + ((res >> 4) & 0x0F);
-}
-
-static inline unsigned long generic_hweight64(__u64 w)
-{
-#if BITS_PER_LONG < 64
- return generic_hweight32((unsigned int)(w >> 32)) +
- generic_hweight32((unsigned int)w);
-#else
- u64 res;
- res = (w & 0x5555555555555555ul) + ((w >> 1) & 0x5555555555555555ul);
- res = (res & 0x3333333333333333ul) + ((res >> 2) & 0x3333333333333333ul);
- res = (res & 0x0F0F0F0F0F0F0F0Ful) + ((res >> 4) & 0x0F0F0F0F0F0F0F0Ful);
- res = (res & 0x00FF00FF00FF00FFul) + ((res >> 8) & 0x00FF00FF00FF00FFul);
- res = (res & 0x0000FFFF0000FFFFul) + ((res >> 16) & 0x0000FFFF0000FFFFul);
- return (res & 0x00000000FFFFFFFFul) + ((res >> 32) & 0x00000000FFFFFFFFul);
-#endif
-}
-
static inline unsigned long hweight_long(unsigned long w)
{
- return sizeof(w) == 4 ? generic_hweight32(w) : generic_hweight64(w);
+ return sizeof(w) == 4 ? hweight32(w) : hweight64(w);
}
/*
^ permalink raw reply
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