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* Re: [PATCH 1/2] powerpc: Add of_parse_dma_window()
From: Segher Boessenkool @ 2006-05-18 23:11 UTC (permalink / raw)
  To: Olof Johansson; +Cc: linuxppc-dev, paulus
In-Reply-To: <20060518171159.GD8220@pb15.lixom.net>

> Acked-by: Olof Johansson <olof@lixom.net>
>
> (I'm assuming you've booted it on POWER4 LPAR and JS20, I don't
> have access to either to make sure it doesn't break there. Main worry
> would be if it lacked ibm,#dma*-properties for some reason.)

The code seems to be resilient against that.  Haven't tested though.


Segher

^ permalink raw reply

* Re: [PATCH 1/2] powerpc: Add of_parse_dma_window()
From: Olof Johansson @ 2006-05-18 23:13 UTC (permalink / raw)
  To: Segher Boessenkool; +Cc: Olof Johansson, linuxppc-dev, paulus
In-Reply-To: <06890505-B9A0-42B9-A713-A035FBCBDD1B@kernel.crashing.org>

On Fri, May 19, 2006 at 01:11:51AM +0200, Segher Boessenkool wrote:
> > Acked-by: Olof Johansson <olof@lixom.net>
> >
> > (I'm assuming you've booted it on POWER4 LPAR and JS20, I don't
> > have access to either to make sure it doesn't break there. Main worry
> > would be if it lacked ibm,#dma*-properties for some reason.)
> 
> The code seems to be resilient against that.  Haven't tested though.

Well, yes. I should have said: if it lacks the ibm,#dma- and the
normal addr-cells properties aren't the same as we assumed before.


-Olof

^ permalink raw reply

* Re: PPC host with a PCI root-complex
From: Segher Boessenkool @ 2006-05-18 23:38 UTC (permalink / raw)
  To: Srinivas Murthy; +Cc: linuxppc-dev
In-Reply-To: <7cb1293c0605181456p3c1726e2n56942dfbd4217f70@mail.gmail.com>

> We have a ppc host with a PCI root-complex across which there are  
> multiple PCI end points.
>
> An application running on the ppc host reading one of the device  
> memory regions (not DMA access but direct CPU read) causes a parity  
> error on the PCI interface controller.
>
> We think that the error should be propagated up as a machine-check  
> which is considered a non-recoverable system-wide error. However  
> with multiple PCI devices present we think that this is too generic  
> and could be reduced to be a critical-error which could be  
> recovered from.
>
> Are there any other approaches/thoughts keeping in mind that this  
> is PPC host and we're running a PCI-rootcomplex interface?

You can handle the machine check in a platform-specific way --
see ppc_md.machine_check_exception().


Segher

^ permalink raw reply

* Re: [RFC/PATCH] Make powerpc64 use __thread for per-cpu variables
From: Paul Mackerras @ 2006-05-18 23:50 UTC (permalink / raw)
  To: David S. Miller; +Cc: linux-arch, linuxppc-dev, linux-kernel, amodra, rth
In-Reply-To: <20060510.171127.42619262.davem@davemloft.net>

David S. Miller writes:

> If you have to hide the operation so deeply like this, maybe you can
> do something similar to sparc64, by explicitly doing the per-cpu fixed
> register and offsets, and still get the single instruction relocs that
> powerpc can do for up to 64K by doing something like:
> 
> 	&per_cpu_blah - &per_cpu_base
> 
> to calculate the offset.

I don't know how to tell gcc that (&per_cpu_blah - &per_cpu_base) is a
quantity that the linker can compute and that will fit into a 16-bit
offset.  If I use an inline asm, then I have to generate the address
and let gcc dereference it, because __get_cpu_var is used both as an
lvalue and an rvalue.  That means two instructions where one would
suffice.  So there doesn't seem to be a way to get the optimal code,
unless the gcc folks are willing to add a -fkernel or something for
us. :)

Paul.

^ permalink raw reply

* Re: [patch] fix RTC/NVRAM accesses on Maple
From: Segher Boessenkool @ 2006-05-18 23:53 UTC (permalink / raw)
  To: Hollis Blanchard; +Cc: linuxppc-dev
In-Reply-To: <1147988040.2692.40.camel@basalt.austin.ibm.com>

> +	isa_ranges[0] = 0x1;
> +	isa_ranges[1] = 0x0;
> +	isa_ranges[2] = 0x0;
> +	isa_ranges[3] = 0x0;
> +	isa_ranges[4] = 0x0;
> +	isa_ranges[5] = 0x00010000;
> +	prom_setprop(isa, "/ht@0/isa@4", "ranges",
> +		     isa_ranges, sizeof(isa_ranges));

isa_ranges[2] = 0x01002000;

isa_ranges[5] looks suspicious as well; the value you put in
means that *no* (16-bit, which is all that 8111 supports) legacy
I/O sits on any other than the LPC bus; so no 8111 ATA support,
for example.

Showing only I/O ranges in the "ranges" property means that no
devices below the "isa" node sit on memory space; is that true
for the Maple device tree?  (The node for the flash chip,
specifically, if it exists in their tree at all).  If not, I'll
dig out the proper "ranges" value for it tomorrow (it depends on
hardware settings on their SIO chip, I have no idea what they
set it to right now :-) ).

I'm sure this all works for your kernel right now, but if you're
fixing up, let's fix it properly :-)


Segher

^ permalink raw reply

* Re: [PATCH 1/2] powerpc: Add of_parse_dma_window()
From: Segher Boessenkool @ 2006-05-18 23:55 UTC (permalink / raw)
  To: Olof Johansson; +Cc: linuxppc-dev, paulus
In-Reply-To: <20060518231306.GG8220@pb15.lixom.net>

>> The code seems to be resilient against that.  Haven't tested though.
>
> Well, yes. I should have said: if it lacks the ibm,#dma- and the
> normal addr-cells properties aren't the same as we assumed before.

Missing #addr-cells means it's 2; does our code handle that correctly?
Sorry, too tired to check it myself :-)


Segher

^ permalink raw reply

* Re: [HACK] add sandpoint + flattened dt support to arch/powerpc/boot
From: Mark A. Greer @ 2006-05-19  0:37 UTC (permalink / raw)
  To: Matthew McClintock; +Cc: linuxppc-dev
In-Reply-To: <1147960021.7607.5.camel@localhost.localdomain>

On Thu, May 18, 2006 at 08:47:01AM -0500, Matthew McClintock wrote:
> On Wed, 2006-05-17 at 17:21 -0700, Mark A. Greer wrote:
> > +void *
> > +dt_find_prop_by_name(void *dt_blob, char *full_name, u32 *val_sizep) 
> 
> Is there a reason you are not using of_get_flat_dt_prop() instead of
> implementing your own version?

Yes.  One is in the kernel, one isn't.  Or, are you asking why I didn't
just copy the kernel code?  If so, I probably should have.

Hrm, we almost need a library of code shared between the kernel &
the bootwrapper.  Sort of illegal but it would save duplicating code
like the flat dt code.

Comments?

Mark

^ permalink raw reply

* Re: [HACK] add sandpoint + flattened dt support to arch/powerpc/boot
From: Michael Ellerman @ 2006-05-19  0:49 UTC (permalink / raw)
  To: Mark A. Greer; +Cc: linuxppc-dev
In-Reply-To: <20060519003730.GA7338@mag.az.mvista.com>

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On Thu, 2006-05-18 at 17:37 -0700, Mark A. Greer wrote:
> On Thu, May 18, 2006 at 08:47:01AM -0500, Matthew McClintock wrote:
> > On Wed, 2006-05-17 at 17:21 -0700, Mark A. Greer wrote:
> > > +void *
> > > +dt_find_prop_by_name(void *dt_blob, char *full_name, u32 *val_sizep) 
> > 
> > Is there a reason you are not using of_get_flat_dt_prop() instead of
> > implementing your own version?
> 
> Yes.  One is in the kernel, one isn't.  Or, are you asking why I didn't
> just copy the kernel code?  If so, I probably should have.
> 
> Hrm, we almost need a library of code shared between the kernel &
> the bootwrapper.  Sort of illegal but it would save duplicating code
> like the flat dt code.
> 
> Comments?

Yeah we do. And it's not illegal IMHO as two of our boot wrappers
(prom_init and the iSeries one) are linked with the kernel anyway.

I think you should write it ;)

cheers

-- 
Michael Ellerman
IBM OzLabs

wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)

We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person

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^ permalink raw reply

* RE: [PATCH/2.6.17-rc4 1/10] Powerpc: Add general support for mpc7 448h pc2 (Taiga) platform
From: Zang Roy-r61911 @ 2006-05-19  1:45 UTC (permalink / raw)
  To: Paul Mackerras; +Cc: Yang Xin-Xin-r48390, Alexandre.Bounine, linuxppc-dev list

> Zang Roy-r61911 writes:
> 
> > I can migrate my code to embedded6xx technically. In fact, 
> > I can move it into anywhere in the arch/powerpc/platforms. 
> > While for mpc7448hpc2(taiga) board, it is not a embedded 
> > application board. It is a high performance server! It seems
> > odd to put code there :). What's your opinion?
> 
> What sort of machine(s) is this board used in?  Or what machines will
> it be in?
> 
> Paul.
> 
mpc7448hpc2 (taiga) board is a high-performance PowerPC 
server reference design,which is optimized for high speed throughput
between the processor (mpc7448 or 7447A) and the memory, disk drive 
and Ethernet port subsystems.

mpc7448hpc2 (taiga) is designed to the micro-ATX chassis, 
allowing it to be used in 1U or 2U rack-mount chassis' , as well as 
in standard ATX/Micro-ATX chassis.

Roy

^ permalink raw reply

* Re: [patch] fix RTC/NVRAM accesses on Maple
From: Hollis Blanchard @ 2006-05-19  2:25 UTC (permalink / raw)
  To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <17516.64514.854281.64425@cargo.ozlabs.ibm.com>

On Fri, 2006-05-19 at 08:58 +1000, Paul Mackerras wrote:
> 
> It would look better as:
> 
> #ifdef CONFIG_PPC_MAPLE
> /* PIBS Version 1.05.0000 04/26/2005 has an incorrect /ht/isa/ranges property.
>  * The values are bad, and it doesn't even have the right number of cells. */
> static void __init fixup_device_tree_maple(void)
> {
> 	... etc ...
> }
> #else
> #define fixup_device_tree_maple()
> #endif
> 
> #if defined(CONFIG_PPC64) && defined(CONFIG_PPC_PMAC)
> static void __init fixup_device_tree_pmac(void)
> {
> 	... etc ...
> }
> #else
> #define fixup_device_tree_pmac()
> #endif
> 
> static void __init fixup_device_tree(void)
> {
> 	fixup_device_tree_maple();
> 	fixup_device_tree_pmac();
> }
> 
> Care to redo the patch?

If you really think that looks better, sure. :)

-Hollis

^ permalink raw reply

* Re: [PATCH/2.6.17-rc4 1/10] Powerpc: Add general support for mpc7 448h pc2 (Taiga) platform
From: Andy Fleming @ 2006-05-18 20:49 UTC (permalink / raw)
  To: Benjamin Herrenschmidt
  Cc: Alexandre.Bounine, linuxppc-dev list, Paul Mackerras,
	Yang Xin-Xin-r48390
In-Reply-To: <1147936929.17679.106.camel@localhost.localdomain>


On May 18, 2006, at 02:22, Benjamin Herrenschmidt wrote:

> On Thu, 2006-05-18 at 15:12 +0800, Zang Roy-r61911 wrote:
>>> I'm not repeating Kumar's comments about that CONFIG_7xxx
>>> thing and that
>>> 7xxx/ directory, it should all go.
>>>
>>
>> Should I move my code to embedded6xx?
>
> Probably for now yes.
>
>> I will get rid of those tables.  I can see that in file
>>  arch/powerpc/platforms/85xx/mpc85xx_ads.c (2.6.17-rc4), there is
>> a similar table. Should it be removed in future :)?
>
> Yes. And somebody beaten up for letting that stuff leak into
> arch/powerpc :)
>
>>> Yes, please do so, we will not accept a board that does the above :)
>>
>> I just do the same thing as 85xx :).
>
> Yes and I intend to LART Kumar seriously for that next time I meet
> him :)


So some of this needs to be moved into u-boot (look at my patches to  
u-boot for the 85xx CDS support, and support in the current  
powerpc.git tree).  A lot of the PCI initialization is now there.   
However, the interrupt maps, while properly setup in the current 85xx  
u-boot oftree.dts files, is currently meaningless.  I may be wrong,  
but I thought support for getting the map from the flat-dev tree was  
still pending....

^ permalink raw reply

* RE: [PATCH/2.6.17-rc4 10/10]  bugs fix for marvell SATA on powerp c pl atform
From: Zang Roy-r61911 @ 2006-05-19  4:06 UTC (permalink / raw)
  To: Mark Lord, Jeff Garzik
  Cc: Alexandre.Bounine, linux-ide, linux-kernel, linuxppc-dev list,
	Paul Mackerras, Yang Xin-Xin-r48390

 
> Jeff Garzik wrote:
> > Benjamin Herrenschmidt wrote:
> >> On Thu, 2006-05-18 at 12:03 +0800, Zang Roy-r61911 wrote:
> ..
> >>> @@ -1567,13 +1570,18 @@ static void mv5_read_preamp(struct mv_ho
> >>>  static void mv5_enable_leds(struct mv_host_priv *hpriv, 
> void __iomem
> >> *mmio)
> >>>  {
> >>>       u32 tmp;
> >>> -
> >>> +#ifndef CONFIG_PPC
> >>>       writel(0, mmio + MV_GPIO_PORT_CTL);
> >>> +#endif
> >>
> >> You'll have to do better here too... I don't wee why when 
> compiled on
> >> PPC, this driver should "magically" not clear those 
> bits... At the very
> >> least, you should test the machine type if you want to do something
> >> specific to your platform, but first, you'll have to 
> convince Jeff why
> >> this change has to be done in the first place and if there 
> is a better
> >> way to handle it.
> > 
> > Correct...  it does seem some bugs were found, but #ifdef 
> powerpc is 
> > certainly out of the question.  We want the driver to work without 
> > ifdefs on all platforms.
> 
> Yup.  I have a powerpc platform here with PCI-X, and a PCI-X 
> Marvell card
> to try in it.  So I'll pick up these changes and try to 
> integrate them a
> little more nicely in my internal updated driver, and then 
> pass it on to Jeff.
> 
> Cheers
> 

^ permalink raw reply

* Cell and new CPU feature bits
From: Benjamin Herrenschmidt @ 2006-05-19  4:07 UTC (permalink / raw)
  To: linuxppc-dev list, cbe-oss-dev; +Cc: Paul Mackerras, Arnd Bergmann

The Cell has a couple of "features" that should be exposed to userland
in a way or another. That raises some questions however about how those
should be done. Among others that come to mind:

 - The timebase errata (should we use a separate aux vector for "bugs"
than for "features" ?
 - Additional Altivec instructions (load/store right/left). A new
feature bit for these ?
 - Lack of data stream instructions. Until now, it was assumed that
those were tied to the presence
   of an Altivec (and they are documented in the Altivec manual). Maybe
we should split that to a
   new bit. I don't know if existing applications use them though, if
they do, there will be a 
   problem to get them updated as the new bit isn't present on older
kernels...
 - Extended implementation of dcbt. (Another bit ? Or sould we just have
a "CELL" bit ? In which
   case should it cover the altivec additions too or are those likely to
exist in future non-Cell 
   processors ?)
 - Not strictly Cell specific but we currently don't expose the support
for optional instructions
   fres and frsqte (which are supported by Cell)

Part of the problem is that we only have 32 userland feature bits and
for some reason decided to put the microarchitecture in there, thus we
are running out fast...

Ben.

^ permalink raw reply

* RE: [PATCH/2.6.17-rc4 10/10]  bugs fix for marvell SATA on powerp c pl atform
From: Zang Roy-r61911 @ 2006-05-19  4:12 UTC (permalink / raw)
  To: Mark Lord, Jeff Garzik
  Cc: Alexandre.Bounine, linux-ide, linux-kernel, linuxppc-dev list,
	Paul Mackerras, Yang Xin-Xin-r48390

> Jeff Garzik wrote:
> > Benjamin Herrenschmidt wrote:
> >> On Thu, 2006-05-18 at 12:03 +0800, Zang Roy-r61911 wrote:
> ..
> >>> @@ -1567,13 +1570,18 @@ static void mv5_read_preamp(struct mv_ho
> >>>  static void mv5_enable_leds(struct mv_host_priv *hpriv, 
> void __iomem
> >> *mmio)
> >>>  {
> >>>       u32 tmp;
> >>> -
> >>> +#ifndef CONFIG_PPC
> >>>       writel(0, mmio + MV_GPIO_PORT_CTL);
> >>> +#endif
> >>
> >> You'll have to do better here too... I don't wee why when 
> compiled on
> >> PPC, this driver should "magically" not clear those 
> bits... At the very
> >> least, you should test the machine type if you want to do something
> >> specific to your platform, but first, you'll have to 
> convince Jeff why
> >> this change has to be done in the first place and if there 
> is a better
> >> way to handle it.
> > 
> > Correct...  it does seem some bugs were found, but #ifdef 
> powerpc is 
> > certainly out of the question.  We want the driver to work without 
> > ifdefs on all platforms.
> 
> Yup.  I have a powerpc platform here with PCI-X, and a PCI-X 
> Marvell card
> to try in it.  So I'll pick up these changes and try to 
> integrate them a
> little more nicely in my internal updated driver, and then 
> pass it on to Jeff.
> 
> Cheers
> 

The reason why I use "ifdef" is that I do not want to affect other platform. I do not 
have other platform to verify. If you can verify my patch on your powerpc platform, 
please help to integrate it into your driver.

^ permalink raw reply

* Recall: [PATCH/2.6.17-rc4 10/10]  bugs fix for marvell SATA on po werp c pl atform
From: Zang Roy-r61911 @ 2006-05-19  4:12 UTC (permalink / raw)
  To: Mark Lord, Jeff Garzik
  Cc: Alexandre.Bounine, linux-ide, linux-kernel, linuxppc-dev list,
	Paul Mackerras, Yang Xin-Xin-r48390

Zang Roy-r61911 would like to recall the message, "[PATCH/2.6.17-rc4 10/10]  bugs fix for marvell SATA on powerp c pl atform".

^ permalink raw reply

* Re: [PATCH] remove powerpc bitops infavor of existing generic bitops
From: Paul Mackerras @ 2006-05-19  5:00 UTC (permalink / raw)
  To: Jon Mason; +Cc: linuxppc-dev
In-Reply-To: <20060515180108.GB17646@us.ibm.com>

Jon Mason writes:

> There already exists a big endian safe bitops implementation in
> lib/find_next_bit.c.  The code in it is 90%+ common with the powerpc
> specific version, so the powerpc version is redundant.  This patch
> makes the necessary changes to use the generic bitops in powerpc, and
> removes the powerpc specific version.

This patch breaks ARCH=ppc builds.  Please resubmit with the necessary
changes to arch/ppc/Kconfig as well.

Paul.

^ permalink raw reply

* Re: Cell and new CPU feature bits
From: Olof Johansson @ 2006-05-19  5:19 UTC (permalink / raw)
  To: Benjamin Herrenschmidt
  Cc: linuxppc-dev list, Paul Mackerras, cbe-oss-dev, Arnd Bergmann
In-Reply-To: <1148011621.13249.7.camel@localhost.localdomain>

On Fri, May 19, 2006 at 02:07:01PM +1000, Benjamin Herrenschmidt wrote:
> The Cell has a couple of "features" that should be exposed to userland
> in a way or another. That raises some questions however about how those
> should be done. Among others that come to mind:

Good questions, to make things scale when going from here on out
(including new products from various companies in the PPC arena), more
fine-grained features would certainly be useful.

>  - The timebase errata (should we use a separate aux vector for "bugs"
> than for "features" ?

How are other userspace-exposed erratas normally handled? How are they
handled on other architectures? Adding it to the feature aux table
sounds like a bad idea.

>  - Additional Altivec instructions (load/store right/left). A new
> feature bit for these ?
>  - Lack of data stream instructions. Until now, it was assumed that
> those were tied to the presence
>    of an Altivec (and they are documented in the Altivec manual). Maybe
> we should split that to a
>    new bit. I don't know if existing applications use them though, if
> they do, there will be a 
>    problem to get them updated as the new bit isn't present on older
> kernels...

I'm assuming you mean the instructions described under "AltiVec Memory
Bandwidth Management" in secion 5.2 of the Altivec PEM -- dst, dstt,
dstst, dss and dssall?

Since they're explicitly part of the Altivec ISA, not the PPC ISA,
I don't see a need for a separate feature bit for them. They are not
marked as optional in the version I'm looking at right now (2.0).

>  - Extended implementation of dcbt. (Another bit ? Or sould we just have
> a "CELL" bit ? In which
>    case should it cover the altivec additions too or are those likely to
> exist in future non-Cell 
>    processors ?)

If you're referring to the extended dcbt that includes streaming hints
(as documented in the 64-bit PEM, but not in PPC book2 2.02), then a
separate bit is likely needed -- obviously at least 970 seems to
implement them.

>  - Not strictly Cell specific but we currently don't expose the support
> for optional instructions
>    fres and frsqte (which are supported by Cell)
> 
> Part of the problem is that we only have 32 userland feature bits and
> for some reason decided to put the microarchitecture in there, thus we
> are running out fast...

 From what I understood by Paul's choice of feature naming (see the
POWER6 patch discussions), PPC_ARCH_2_05 and similar will mean base
architecture version implemented and should not be used to assume
anything about optional features.

So, with that as a base, there will need to be a way to
indicate which optional features are available, plus what possible
extensions/implementation-specific features are there, at least if they
are common to more than one implementation/processor version. Bit arrays
seem to be the New Way of doing it between firmware and kernel, maybe
the same can/should be used for kernel->userspace? Can the aux vectors
be of arbitrary length?


-Olof

^ permalink raw reply

* pci-OF-bus-map deprecation
From: Benjamin Herrenschmidt @ 2006-05-19  5:24 UTC (permalink / raw)
  To: linuxppc-dev list, Linux Kernel list

For 32 bits machines with Open Firmware, we used to create a
pci-OF-bus-map property in the device-tree that provided a mapping
between linux and Open Firmware PCI bus numbers (since on some platforms
like PowerMac, we still renumber PCI busses).

This property is no longer necessary as

 - Nowadays, we have sysfs and the PCI devices in there do have a full
Open Firmware device path exposed as a "devspec" file in their sysfs
directories
 - I don't think anybody ever used that property in userland :)

This mail is mostly to make sure of the later. I intend to get rid of it
in 2.6.18 (that's early, but as I said, I think nobody uses it anyway. I
intended to use it in some X stuff I never ended up actually
implementing...)

It only concerns 32 bits ppc machines with OF, and only the ones that
renumber busses, which means basically only PowerMacs.

Ben.

^ permalink raw reply

* Re: [Cbe-oss-dev] Cell and new CPU feature bits
From: Andrew Pinski @ 2006-05-19  5:27 UTC (permalink / raw)
  To: Olof Johansson; +Cc: cbe-oss-dev, Arnd Bergmann, linuxppc-dev list
In-Reply-To: <20060519051939.GJ8220@pb15.lixom.net>


On May 18, 2006, at 10:19 PM, Olof Johansson wrote:

>>  - Lack of data stream instructions. Until now, it was assumed that
>> those were tied to the presence
>>    of an Altivec (and they are documented in the Altivec manual).  
>> Maybe
>> we should split that to a
>>    new bit. I don't know if existing applications use them though, if
>> they do, there will be a
>>    problem to get them updated as the new bit isn't present on older
>> kernels...
>
> I'm assuming you mean the instructions described under "AltiVec Memory
> Bandwidth Management" in secion 5.2 of the Altivec PEM -- dst, dstt,
> dstst, dss and dssall?

They are nops on the Cell though.  They are also microcoded on the 970.
>
> If you're referring to the extended dcbt that includes streaming hints
> (as documented in the 64-bit PEM, but not in PPC book2 2.02), then a
> separate bit is likely needed -- obviously at least 970 seems to
> implement them.

Yes they are implemented on the 970.

Thanks,
Andrew Pinski

^ permalink raw reply

* powerpc.git updated
From: Paul Mackerras @ 2006-05-19  6:07 UTC (permalink / raw)
  To: linuxppc-dev

I just pushed a bunch of patches to the powerpc.git tree (master
branch) and pulled in Linus' current linux-2.6.git tree.  The list
below shows which patches are in there but not in Linus' tree yet.
These will all go upstream after 2.6.17 is released.  If you have a
patch that you want to go in that I haven't picked up yet, please
resend it.

Paul.

Andy Fleming:
      Add 85xx CDS to arch/powerpc

Anton Blanchard:
      powerpc: remove io_page_mask

Geoff Levand:
      powerpc: remove do-nothing cpu setup routines

Haren Myneni:
      powerpc: clear IPIs on kdump

Jeremy Kerr:
      powerpc: cell: use kzalloc in alloc_spu_context()
      powerpc: Add of_parse_dma_window()
      powerpc: pseries: Use generic dma-window parsing function

Jimi Xenidis:
      powerpc: Auto reserve of device tree blob

jimix@watson.ibm.com:
      powerpc: udbg_printf() formatting attribute

Kumar Gala:
      powerpc: provide ppc_md.panic() for both ppc32 & ppc64

Linas Vepstas:
      powerpc/pseries: clear PCI failure counter if no new failures
      powerpc/pseries: Increment fail counter in PCI recovery

Michael Ellerman:
      powerpc: Disable and EOI interrupts in machine_crash_shutdown()
      powerpc: Make early debugging options behave with oldconfig
      powerpc: Make early xmon logic immune to location of early parsing
      powerpc: Parse early parameters earlier
      powerpc: Unify mem= handling
      powerpc: Kdump header cleanup
      powerpc: Move crashkernel= handling into the kernel.

Michael Neuling:
      powerpc: whitespace cleanup in reg.h

mostrows@watson.ibm.com:
      powerpc: Create /proc/rtas, /proc/ppc64/rtas if RTAS exists.

Olof Johansson:
      powerpc: Quiet HVSI boot output
      powerpc: Quiet time init output
      powerpc: Quiet page order output
      powerpc: Quiet VETH version printk
      powerpc: Don't print chosen idle loop at every boot
      powerpc: Less verbose mem configuration output
      powerpc: Lack of ISA interrupts on XICS isn't dangerous
      powerpc: Quiet PCI init printouts
      powerpc: Quiet rtasd output at boot
      powerpc: Quiet oprofile output at boot
      powerpc: Remove stale iseries global
      powerpc: kill union tce_entry
      powerpc iommu: minor cleanup

Stephen Rothwell:
      powerpc: add all the iSeries virtual devices to the device tree
      powerpc: use the device tree for the iSeries vio bus probe
      powerpc: use a common vio_match_device routine
      powerpc: merge the rest of the vio code
      powerpc: update iseries_veth device-tree information
      powerpc: update iSeries viodasd device-tree entries
      powerpc: update iSeries vdevice
      powerpc: update iSeries viocd and viotape device-tree
      powerpc: the iSeries vio lan driver changed device type

Will Schmidt:
      nvram_print_partitions cosmetic fixup

^ permalink raw reply

* RE: [PATCH/2.6.17-rc4  0/10]  powerpc: add mpc7448hpc2 (Taiga) bo ard  support
From: Zang Roy-r61911 @ 2006-05-19  7:03 UTC (permalink / raw)
  To: Kumar Gala
  Cc: linuxppc-dev list, Yang Xin-Xin-r48390, Paul Mackerras,
	Alexandre.Bounine

> 
> On May 17, 2006, at 5:13 AM, Zang Roy-r61911 wrote:
> 
> > Hi, Paul
> >
> > 	This series of patch adds mpc7448hpc2 (taiga) board support in  
> > arch/powerpc.
> > 	Tsi108 chip of Tundra Semiconductor is also supported.
> >
> > Roy Zang
> 
> Can you post your .dts for us to take a look at.  I know Mark Greer  
> is looking at support for the 105/6/7 family of bridges and the 10x  
> family should have consistent flat device trees.
> 
> - kumar
> 
/*
 * MPC7448HPC2 (Taiga) board Device Tree Source
 *
 * Copyright 2006 Freescale Semiconductor Inc.
 * 2006 Roy Zang <Roy Zang at freescale.com>.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */


/ {
	model = "mpc7448hpc2";
	compatible = "mpc74xx";
	#address-cells = <1>;
	#size-cells = <1>;
	linux,phandle = <100>;

	cpus {
		#cpus = <1>;
		#address-cells = <1>;
		#size-cells =<0>;
		linux,phandle = <200>;
				
		PowerPC,7448@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <20>;	// 32 bytes
			i-cache-line-size = <20>;	// 32 bytes
			d-cache-size = <8000>;		// L1, 32K bytes
			i-cache-size = <8000>;		// L1, 32K bytes
			timebase-frequency = <0>;	// 33 MHz, from uboot
			clock-frequency = <0>;		// From U-Boot
			bus-frequency = <0>;		// From U-Boot
			32-bit;
			linux,phandle = <201>;
			linux,boot-cpu;
		};
	};

	memory {
		device_type = "memory";
		linux,phandle = <300>;
		reg = <00000000 20000000	// DDR2   512M at 0
		       >;
	};

  	tsi108@c0000000 {
		#address-cells = <1>;
		#size-cells = <1>;
		#interrupt-cells = <2>;
		device_type = "tsi-bridge";
		ranges = <00000000 c0000000 00010000>;
		reg = <c0000000 00010000>;
		bus-frequency = <0>;

		i2c@7000 {
			interrupt-parent = <7400>;
			interrupts = <E 3>;
			reg = <7000 400>;
			device_type = "i2c";
			compatible  = "tsi-i2c";
		};

		mdio@6000 {
			device_type = "mdio";
			compatible = "tsi-ethernet";	

			ethernet-phy@6000 {
				linux,phandle = <6000>;
				interrupt-parent = <7400>;
				interrupts = <2 1>;
				reg = <6000 50>;
				device_type = "ethernet-phy";
			};

			ethernet-phy@6400 {
				linux,phandle = <6400>;
				interrupt-parent = <7400>;
				interrupts = <2 1>;
				reg = <6400 50>;
				device_type = "ethernet-phy";
			};

		};

		ethernet@6200 {
			#size-cells = <0>;
			device_type = "network";
			model = "TSI-ETH";		
			compatible = "tsi-ethernet";	
			reg = <6200 200>;
			address = [ 00 06 D2 00 00 01 ];
			interrupts = <10 3 10 3 10 3>;
			interrupt-parent = <7400>;
			phy-handle = <6000>;
		};

		ethernet@6600 {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "network";
			model = "TSI-ETH";		
			compatible = "tsi-ethernet";	
			reg = <6600 200>;
			address = [ 00 06 D2 00 00 02 ];
			interrupts = <11 3 11 3 11 3>;
			interrupt-parent = <7400>;
			phy-handle = <6400>;
		};

		serial@7808 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <7808 200>;
			clock-frequency = <3f6b5a00>;
			interrupts = <c 3>;
			interrupt-parent = <7400>;
		};

		serial@7c08 {
			device_type = "serial";
			compatible = "ns16550";
			reg = <7c08 200>;
			clock-frequency = <3f6b5a00>;
			interrupts = <d 3>;
			interrupt-parent = <7400>;
		};

	  	pic@7400 {
			linux,phandle = <7400>;
			clock-frequency = <0>;
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <7400 400>;
			built-in;
			compatible = "chrp,open-pic";
			device_type = "open-pic";
                       	big-endian;
		};
		pci@1000 {
			compatible = "tsi10x";
			device_type = "pci";
			linux,phandle = <1000>;
			#interrupt-cells = <1>;
			#size-cells = <2>;
			#address-cells = <3>;
			reg = <1000 1000>;
			bus-range = <0 0>;
			ranges = <02000000 0 e0000000 e0000000 0 1A000000	
				  01000000 0 00000000 fa000000 0 00010000>;
			clock-frequency = <7f28154>;
			interrupt-parent = <7400>;
			interrupts = <8 0>;
			interrupt-map-mask = <f800 0 0 7>;
			interrupt-map = <

				/* IDSEL 0x11 */
				8800 0 0 1 7400 24 0
				8800 0 0 2 7400 25 0
				8800 0 0 3 7400 26 0
				8800 0 0 4 7400 27 0

				/* IDSEL 0x12 */
				9000 0 0 1 7400 25 0
				9000 0 0 2 7400 26 0
				9000 0 0 3 7400 27 0
				9000 0 0 4 7400 24 0

				/* IDSEL 0x13 */
				9800 0 0 1 7400 26 0
				9800 0 0 2 7400 27 0
				9800 0 0 3 7400 24 0
				9800 0 0 4 7400 25 0

				/* IDSEL 0x14 */
				a000 0 0 1 7400 27 0
				a000 0 0 2 7400 24 0
				a000 0 0 3 7400 25 0
				a000 0 0 4 7400 26 0
				>;
		};
	};

};

^ permalink raw reply

* [PATCH 01/14] powerpc: tidy up iseries/pci.c
From: Stephen Rothwell @ 2006-05-19  6:42 UTC (permalink / raw)
  To: paulus; +Cc: ppc-dev

Remove some unused counters.

No need to allocate iomm_table and iobar_table, which means that
iomm_table_initialize is not longer needed.

Use kzalloc where sensible.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---

 arch/powerpc/platforms/iseries/pci.c |   78 +++++-----------------------------
 1 files changed, 11 insertions(+), 67 deletions(-)

This series of patches are intenede to put the iSeries PCI devices into
the flattened device tree.  Built and run on an iSeries 270 with a single
PCI ethernet.  Built for pSeries_defconfig.

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

039fac4f522c6207625993cd79bb2164dc0b91f1
diff --git a/arch/powerpc/platforms/iseries/pci.c b/arch/powerpc/platforms/iseries/pci.c
index 428ffb5..91a9474 100644
--- a/arch/powerpc/platforms/iseries/pci.c
+++ b/arch/powerpc/platforms/iseries/pci.c
@@ -57,15 +57,6 @@ LIST_HEAD(iSeries_Global_Device_List);
 
 static int DeviceCount;
 
-/* Counters and control flags. */
-static long Pci_Io_Read_Count;
-static long Pci_Io_Write_Count;
-#if 0
-static long Pci_Cfg_Read_Count;
-static long Pci_Cfg_Write_Count;
-#endif
-static long Pci_Error_Count;
-
 static int Pci_Retry_Max = 3;	/* Only retry 3 times  */
 static int Pci_Error_Flag = 1;	/* Set Retry Error on. */
 
@@ -79,41 +70,19 @@ #define IOMM_TABLE_MAX_ENTRIES	1024
 #define IOMM_TABLE_ENTRY_SIZE	0x0000000000400000UL
 #define BASE_IO_MEMORY		0xE000000000000000UL
 
-static unsigned long max_io_memory = 0xE000000000000000UL;
+static unsigned long max_io_memory = BASE_IO_MEMORY;
 static long current_iomm_table_entry;
 
 /*
  * Lookup Tables.
  */
-static struct device_node **iomm_table;
-static u8 *iobar_table;
+static struct device_node *iomm_table[IOMM_TABLE_MAX_ENTRIES];
+static u8 iobar_table[IOMM_TABLE_MAX_ENTRIES];
 
-/*
- * Static and Global variables
- */
-static char *pci_io_text = "iSeries PCI I/O";
+static const char pci_io_text[] = "iSeries PCI I/O";
 static DEFINE_SPINLOCK(iomm_table_lock);
 
 /*
- * iomm_table_initialize
- *
- * Allocates and initalizes the Address Translation Table and Bar
- * Tables to get them ready for use.  Must be called before any
- * I/O space is handed out to the device BARs.
- */
-static void iomm_table_initialize(void)
-{
-	spin_lock(&iomm_table_lock);
-	iomm_table = kmalloc(sizeof(*iomm_table) * IOMM_TABLE_MAX_ENTRIES,
-			GFP_KERNEL);
-	iobar_table = kmalloc(sizeof(*iobar_table) * IOMM_TABLE_MAX_ENTRIES,
-			GFP_KERNEL);
-	spin_unlock(&iomm_table_lock);
-	if ((iomm_table == NULL) || (iobar_table == NULL))
-		panic("PCI: I/O tables allocation failed.\n");
-}
-
-/*
  * iomm_table_allocate_entry
  *
  * Adds pci_dev entry in address translation table
@@ -140,9 +109,8 @@ static void iomm_table_allocate_entry(st
 	 */
 	spin_lock(&iomm_table_lock);
 	bar_res->name = pci_io_text;
-	bar_res->start =
+	bar_res->start = BASE_IO_MEMORY +
 		IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
-	bar_res->start += BASE_IO_MEMORY;
 	bar_res->end = bar_res->start + bar_size - 1;
 	/*
 	 * Allocate the number of table entries needed for BAR.
@@ -154,7 +122,7 @@ static void iomm_table_allocate_entry(st
 		++current_iomm_table_entry;
 	}
 	max_io_memory = BASE_IO_MEMORY +
-		(IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry);
+		IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
 	spin_unlock(&iomm_table_lock);
 }
 
@@ -171,13 +139,10 @@ static void iomm_table_allocate_entry(st
  */
 static void allocate_device_bars(struct pci_dev *dev)
 {
-	struct resource *bar_res;
 	int bar_num;
 
-	for (bar_num = 0; bar_num <= PCI_ROM_RESOURCE; ++bar_num) {
-		bar_res = &dev->resource[bar_num];
+	for (bar_num = 0; bar_num <= PCI_ROM_RESOURCE; ++bar_num)
 		iomm_table_allocate_entry(dev, bar_num);
-	}
 }
 
 /*
@@ -205,10 +170,9 @@ static struct device_node *build_device_
 	struct device_node *node;
 	struct pci_dn *pdn;
 
-	node = kmalloc(sizeof(struct device_node), GFP_KERNEL);
+	node = kzalloc(sizeof(struct device_node), GFP_KERNEL);
 	if (node == NULL)
 		return NULL;
-	memset(node, 0, sizeof(struct device_node));
 	pdn = kzalloc(sizeof(*pdn), GFP_KERNEL);
 	if (pdn == NULL) {
 		kfree(node);
@@ -224,7 +188,7 @@ static struct device_node *build_device_
 }
 
 /*
- * unsigned long __init find_and_init_phbs(void)
+ * iSeries_pcibios_init
  *
  * Description:
  *   This function checks for all possible system PCI host bridges that connect
@@ -232,7 +196,7 @@ static struct device_node *build_device_
  *   ownership status.  A pci_controller is built for any bus which is partially
  *   owned or fully owned by this guest partition.
  */
-unsigned long __init find_and_init_phbs(void)
+void iSeries_pcibios_init(void)
 {
 	struct pci_controller *phb;
 	HvBusNumber bus;
@@ -263,18 +227,6 @@ unsigned long __init find_and_init_phbs(
 			printk(KERN_ERR "Unexpected Return on Probe(0x%04X): 0x%04X",
 			       bus, ret);
 	}
-	return 0;
-}
-
-/*
- * iSeries_pcibios_init
- *
- * Chance to initialize and structures or variable before PCI Bus walk.
- */
-void iSeries_pcibios_init(void)
-{
-	iomm_table_initialize();
-	find_and_init_phbs();
 }
 
 /*
@@ -331,8 +283,7 @@ static void scan_PHB_slots(struct pci_co
 	int IdSel;
 	const int MaxAgents = 8;
 
-	DevInfo = (struct HvCallPci_DeviceInfo*)
-		kmalloc(sizeof(struct HvCallPci_DeviceInfo), GFP_KERNEL);
+	DevInfo = kmalloc(sizeof(struct HvCallPci_DeviceInfo), GFP_KERNEL);
 	if (DevInfo == NULL)
 		return;
 
@@ -622,7 +573,6 @@ static int CheckReturnCode(char *TextHdr
 	if (ret != 0)  {
 		struct pci_dn *pdn = PCI_DN(DevNode);
 
-		++Pci_Error_Count;
 		(*retry)++;
 		printk("PCI: %s: Device 0x%04X:%02X  I/O Error(%2d): 0x%04X\n",
 				TextHdr, pdn->busno, pdn->devfn,
@@ -704,7 +654,6 @@ u8 iSeries_Read_Byte(const volatile void
 		return 0xff;
 	}
 	do {
-		++Pci_Io_Read_Count;
 		HvCall3Ret16(HvCallPciBarLoad8, &ret, dsa, BarOffset, 0);
 	} while (CheckReturnCode("RDB", DevNode, &retry, ret.rc) != 0);
 
@@ -734,7 +683,6 @@ u16 iSeries_Read_Word(const volatile voi
 		return 0xffff;
 	}
 	do {
-		++Pci_Io_Read_Count;
 		HvCall3Ret16(HvCallPciBarLoad16, &ret, dsa,
 				BarOffset, 0);
 	} while (CheckReturnCode("RDW", DevNode, &retry, ret.rc) != 0);
@@ -765,7 +713,6 @@ u32 iSeries_Read_Long(const volatile voi
 		return 0xffffffff;
 	}
 	do {
-		++Pci_Io_Read_Count;
 		HvCall3Ret16(HvCallPciBarLoad32, &ret, dsa,
 				BarOffset, 0);
 	} while (CheckReturnCode("RDL", DevNode, &retry, ret.rc) != 0);
@@ -803,7 +750,6 @@ void iSeries_Write_Byte(u8 data, volatil
 		return;
 	}
 	do {
-		++Pci_Io_Write_Count;
 		rc = HvCall4(HvCallPciBarStore8, dsa, BarOffset, data, 0);
 	} while (CheckReturnCode("WWB", DevNode, &retry, rc) != 0);
 }
@@ -831,7 +777,6 @@ void iSeries_Write_Word(u16 data, volati
 		return;
 	}
 	do {
-		++Pci_Io_Write_Count;
 		rc = HvCall4(HvCallPciBarStore16, dsa, BarOffset, swab16(data), 0);
 	} while (CheckReturnCode("WWW", DevNode, &retry, rc) != 0);
 }
@@ -859,7 +804,6 @@ void iSeries_Write_Long(u32 data, volati
 		return;
 	}
 	do {
-		++Pci_Io_Write_Count;
 		rc = HvCall4(HvCallPciBarStore32, dsa, BarOffset, swab32(data), 0);
 	} while (CheckReturnCode("WWL", DevNode, &retry, rc) != 0);
 }
-- 
1.3.1.ge923

^ permalink raw reply related

* [PATCH 02/14] powerpc: reintroduce HvCallPci_configLoad32
From: Stephen Rothwell @ 2006-05-19  6:43 UTC (permalink / raw)
  To: paulus; +Cc: ppc-dev
In-Reply-To: <20060519164249.2dc43bc4.sfr@canb.auug.org.au>

This function was removed during iSeries cleanup but will prove useful
in the following patches.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---

 arch/powerpc/platforms/iseries/call_pci.h |   19 +++++++++++++++++++
 1 files changed, 19 insertions(+), 0 deletions(-)

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

59ad1dcb0d8d81e3a96f869109315652abf271f7
diff --git a/arch/powerpc/platforms/iseries/call_pci.h b/arch/powerpc/platforms/iseries/call_pci.h
index 59d4e0a..dbdf698 100644
--- a/arch/powerpc/platforms/iseries/call_pci.h
+++ b/arch/powerpc/platforms/iseries/call_pci.h
@@ -145,6 +145,25 @@ static inline u64 HvCallPci_configLoad16
 	return retVal.rc;
 }
 
+static inline u64 HvCallPci_configLoad32(u16 busNumber, u8 subBusNumber,
+		u8 deviceId, u32 offset, u32 *value)
+{
+	struct HvCallPci_DsaAddr dsa;
+	struct HvCallPci_LoadReturn retVal;
+
+	*((u64*)&dsa) = 0;
+
+	dsa.busNumber = busNumber;
+	dsa.subBusNumber = subBusNumber;
+	dsa.deviceId = deviceId;
+
+	HvCall3Ret16(HvCallPciConfigLoad32, &retVal, *(u64 *)&dsa, offset, 0);
+
+	*value = retVal.value;
+
+	return retVal.rc;
+}
+
 static inline u64 HvCallPci_configStore8(u16 busNumber, u8 subBusNumber,
 		u8 deviceId, u32 offset, u8 value)
 {
-- 
1.3.1.ge923

^ permalink raw reply related

* [PATCH 03/14] powerpc: move iSeries PCI devices to the device tree
From: Stephen Rothwell @ 2006-05-19  6:46 UTC (permalink / raw)
  To: paulus; +Cc: ppc-dev
In-Reply-To: <20060519164249.2dc43bc4.sfr@canb.auug.org.au>

Move the probing of PCI devices to setup.c and put them all into the
flattened device tree.  The later probing is now done by traversing the
device tree.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---

 arch/powerpc/platforms/iseries/irq.c   |    7 -
 arch/powerpc/platforms/iseries/irq.h   |    2 
 arch/powerpc/platforms/iseries/pci.c   |  273 +++++++++-----------------------
 arch/powerpc/platforms/iseries/setup.c |  204 ++++++++++++++++++++++++
 4 files changed, 286 insertions(+), 200 deletions(-)

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

97c92bf9859c9d883da1b8459f62dec2ab20804e
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index be3fbfc..62bbbcf 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -42,6 +42,7 @@ #include <asm/iseries/hv_call_xm.h>
 #include <asm/iseries/it_lp_queue.h>
 
 #include "irq.h"
+#include "pci.h"
 #include "call_pci.h"
 
 #if defined(CONFIG_SMP)
@@ -312,12 +313,12 @@ static hw_irq_controller iSeries_IRQ_han
  * Note that sub_bus is always 0 (at the moment at least).
  */
 int __init iSeries_allocate_IRQ(HvBusNumber bus,
-		HvSubBusNumber sub_bus, HvAgentId dev_id)
+		HvSubBusNumber sub_bus, u32 bsubbus)
 {
 	int virtirq;
 	unsigned int realirq;
-	u8 idsel = (dev_id >> 4);
-	u8 function = dev_id & 7;
+	u8 idsel = ISERIES_GET_DEVICE_FROM_SUBBUS(bsubbus);
+	u8 function = ISERIES_GET_FUNCTION_FROM_SUBBUS(bsubbus);
 
 	realirq = (((((sub_bus << 8) + (bus - 1)) << 3) + (idsel - 1)) << 3)
 		+ function;
diff --git a/arch/powerpc/platforms/iseries/irq.h b/arch/powerpc/platforms/iseries/irq.h
index b9c801b..188aa80 100644
--- a/arch/powerpc/platforms/iseries/irq.h
+++ b/arch/powerpc/platforms/iseries/irq.h
@@ -2,7 +2,7 @@ #ifndef	_ISERIES_IRQ_H
 #define	_ISERIES_IRQ_H
 
 extern void iSeries_init_IRQ(void);
-extern int  iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, HvAgentId);
+extern int  iSeries_allocate_IRQ(HvBusNumber, HvSubBusNumber, u32);
 extern void iSeries_activate_IRQs(void);
 extern int iSeries_get_irq(struct pt_regs *);
 
diff --git a/arch/powerpc/platforms/iseries/pci.c b/arch/powerpc/platforms/iseries/pci.c
index 91a9474..9d571e7 100644
--- a/arch/powerpc/platforms/iseries/pci.c
+++ b/arch/powerpc/platforms/iseries/pci.c
@@ -49,14 +49,9 @@ #include "call_pci.h"
  * Forward declares of prototypes.
  */
 static struct device_node *find_Device_Node(int bus, int devfn);
-static void scan_PHB_slots(struct pci_controller *Phb);
-static void scan_EADS_bridge(HvBusNumber Bus, HvSubBusNumber SubBus, int IdSel);
-static int scan_bridge_slot(HvBusNumber Bus, struct HvCallPci_BridgeInfo *Info);
 
 LIST_HEAD(iSeries_Global_Device_List);
 
-static int DeviceCount;
-
 static int Pci_Retry_Max = 3;	/* Only retry 3 times  */
 static int Pci_Error_Flag = 1;	/* Set Retry Error on. */
 
@@ -162,32 +157,6 @@ static void pci_Log_Error(char *Error_Te
 }
 
 /*
- * build_device_node(u16 Bus, int SubBus, u8 DevFn)
- */
-static struct device_node *build_device_node(HvBusNumber Bus,
-		HvSubBusNumber SubBus, int AgentId, int Function)
-{
-	struct device_node *node;
-	struct pci_dn *pdn;
-
-	node = kzalloc(sizeof(struct device_node), GFP_KERNEL);
-	if (node == NULL)
-		return NULL;
-	pdn = kzalloc(sizeof(*pdn), GFP_KERNEL);
-	if (pdn == NULL) {
-		kfree(node);
-		return NULL;
-	}
-	node->data = pdn;
-	pdn->node = node;
-	list_add_tail(&pdn->Device_List, &iSeries_Global_Device_List);
-	pdn->busno = Bus;
-	pdn->bussubno = SubBus;
-	pdn->devfn = PCI_DEVFN(ISERIES_ENCODE_DEVICE(AgentId), Function);
-	return node;
-}
-
-/*
  * iSeries_pcibios_init
  *
  * Description:
@@ -199,33 +168,86 @@ static struct device_node *build_device_
 void iSeries_pcibios_init(void)
 {
 	struct pci_controller *phb;
-	HvBusNumber bus;
-
-	/* Check all possible buses. */
-	for (bus = 0; bus < 256; bus++) {
-		int ret = HvCallXm_testBus(bus);
-		if (ret == 0) {
-			printk("bus %d appears to exist\n", bus);
-
-			phb = pcibios_alloc_controller(NULL);
-			if (phb == NULL)
-				return -ENOMEM;
+	struct device_node *node;
+	struct device_node *dn;
+
+	for_each_node_by_type(node, "pci") {
+		HvBusNumber bus;
+		u32 *busp;
+
+		busp = (u32 *)get_property(node, "bus-range", NULL);
+		if (busp == NULL)
+			continue;
+		bus = *busp;
+		printk("bus %d appears to exist\n", bus);
+		phb = pcibios_alloc_controller(node);
+		if (phb == NULL)
+			continue;
+
+		phb->pci_mem_offset = phb->local_number = bus;
+		phb->first_busno = bus;
+		phb->last_busno = bus;
+		phb->ops = &iSeries_pci_ops;
+
+		/* Find and connect the devices. */
+		for (dn = NULL; (dn = of_get_next_child(node, dn)) != NULL;) {
+			struct pci_dn *pdn;
+			u8 irq;
+			int err;
+			u32 *agent;
+			u32 *reg;
+			u32 *lsn;
+
+			reg = (u32 *)get_property(dn, "reg", NULL);
+			if (reg == NULL) {
+				printk(KERN_DEBUG "no reg property!\n");
+				continue;
+			}
+			busp = (u32 *)get_property(dn, "linux,subbus", NULL);
+			if (busp == NULL) {
+				printk(KERN_DEBUG "no subbus property!\n");
+				continue;
+			}
+			agent = (u32 *)get_property(dn, "linux,agent-id", NULL);
+			if (agent == NULL) {
+				printk(KERN_DEBUG "no agent-id\n");
+				continue;
+			}
+			lsn = (u32 *)get_property(dn,
+					"linux,logical-slot-number", NULL);
+			if (lsn == NULL) {
+				printk(KERN_DEBUG "no logical-slot-number\n");
+				continue;
+			}
 
-			phb->pci_mem_offset = phb->local_number = bus;
-			phb->first_busno = bus;
-			phb->last_busno = bus;
-			phb->ops = &iSeries_pci_ops;
+			irq = iSeries_allocate_IRQ(bus, 0, *busp);
+			err = HvCallXm_connectBusUnit(bus, *busp, *agent, irq);
+			if (err) {
+				pci_Log_Error("Connect Bus Unit",
+					      bus, *busp, *agent, err);
+				continue;
+			}
+			err = HvCallPci_configStore8(bus, *busp, *agent,
+					PCI_INTERRUPT_LINE, irq);
+			if (err) {
+				pci_Log_Error("PciCfgStore Irq Failed!",
+						bus, *busp, *agent, err);
+				continue;
+			}
 
-			/* Find and connect the devices. */
-			scan_PHB_slots(phb);
+			pdn = kzalloc(sizeof(*pdn), GFP_KERNEL);
+			if (pdn == NULL)
+				return;
+			dn->data = pdn;
+			pdn->node = dn;
+			pdn->busno = bus;
+			pdn->devfn = (reg[0] >> 8) & 0xff;
+			pdn->bussubno = *busp;
+			pdn->Irq = irq;
+			pdn->LogicalSlot = *lsn;
+			list_add_tail(&pdn->Device_List,
+					&iSeries_Global_Device_List);
 		}
-		/*
-		 * Check for Unexpected Return code, a clue that something
-		 * has gone wrong.
-		 */
-		else if (ret != 0x0301)
-			printk(KERN_ERR "Unexpected Return on Probe(0x%04X): 0x%04X",
-			       bus, ret);
 	}
 }
 
@@ -272,147 +294,6 @@ void pcibios_fixup_resources(struct pci_
 }
 
 /*
- * Loop through each node function to find usable EADs bridges.
- */
-static void scan_PHB_slots(struct pci_controller *Phb)
-{
-	struct HvCallPci_DeviceInfo *DevInfo;
-	HvBusNumber bus = Phb->local_number;	/* System Bus */
-	const HvSubBusNumber SubBus = 0;	/* EADs is always 0. */
-	int HvRc = 0;
-	int IdSel;
-	const int MaxAgents = 8;
-
-	DevInfo = kmalloc(sizeof(struct HvCallPci_DeviceInfo), GFP_KERNEL);
-	if (DevInfo == NULL)
-		return;
-
-	/*
-	 * Probe for EADs Bridges
-	 */
-	for (IdSel = 1; IdSel < MaxAgents; ++IdSel) {
-		HvRc = HvCallPci_getDeviceInfo(bus, SubBus, IdSel,
-				iseries_hv_addr(DevInfo),
-				sizeof(struct HvCallPci_DeviceInfo));
-		if (HvRc == 0) {
-			if (DevInfo->deviceType == HvCallPci_NodeDevice)
-				scan_EADS_bridge(bus, SubBus, IdSel);
-			else
-				printk("PCI: Invalid System Configuration(0x%02X)"
-				       " for bus 0x%02x id 0x%02x.\n",
-				       DevInfo->deviceType, bus, IdSel);
-		}
-		else
-			pci_Log_Error("getDeviceInfo", bus, SubBus, IdSel, HvRc);
-	}
-	kfree(DevInfo);
-}
-
-static void scan_EADS_bridge(HvBusNumber bus, HvSubBusNumber SubBus,
-		int IdSel)
-{
-	struct HvCallPci_BridgeInfo *BridgeInfo;
-	HvAgentId AgentId;
-	int Function;
-	int HvRc;
-
-	BridgeInfo = (struct HvCallPci_BridgeInfo *)
-		kmalloc(sizeof(struct HvCallPci_BridgeInfo), GFP_KERNEL);
-	if (BridgeInfo == NULL)
-		return;
-
-	/* Note: hvSubBus and irq is always be 0 at this level! */
-	for (Function = 0; Function < 8; ++Function) {
-		AgentId = ISERIES_PCI_AGENTID(IdSel, Function);
-		HvRc = HvCallXm_connectBusUnit(bus, SubBus, AgentId, 0);
-		if (HvRc == 0) {
-			printk("found device at bus %d idsel %d func %d (AgentId %x)\n",
-			       bus, IdSel, Function, AgentId);
-			/*  Connect EADs: 0x18.00.12 = 0x00 */
-			HvRc = HvCallPci_getBusUnitInfo(bus, SubBus, AgentId,
-					iseries_hv_addr(BridgeInfo),
-					sizeof(struct HvCallPci_BridgeInfo));
-			if (HvRc == 0) {
-				printk("bridge info: type %x subbus %x maxAgents %x maxsubbus %x logslot %x\n",
-					BridgeInfo->busUnitInfo.deviceType,
-					BridgeInfo->subBusNumber,
-					BridgeInfo->maxAgents,
-					BridgeInfo->maxSubBusNumber,
-					BridgeInfo->logicalSlotNumber);
-				if (BridgeInfo->busUnitInfo.deviceType ==
-						HvCallPci_BridgeDevice)  {
-					/* Scan_Bridge_Slot...: 0x18.00.12 */
-					scan_bridge_slot(bus, BridgeInfo);
-				} else
-					printk("PCI: Invalid Bridge Configuration(0x%02X)",
-						BridgeInfo->busUnitInfo.deviceType);
-			}
-		} else if (HvRc != 0x000B)
-			pci_Log_Error("EADs Connect",
-					bus, SubBus, AgentId, HvRc);
-	}
-	kfree(BridgeInfo);
-}
-
-/*
- * This assumes that the node slot is always on the primary bus!
- */
-static int scan_bridge_slot(HvBusNumber Bus,
-		struct HvCallPci_BridgeInfo *BridgeInfo)
-{
-	struct device_node *node;
-	HvSubBusNumber SubBus = BridgeInfo->subBusNumber;
-	u16 VendorId = 0;
-	int HvRc = 0;
-	u8 Irq = 0;
-	int IdSel = ISERIES_GET_DEVICE_FROM_SUBBUS(SubBus);
-	int Function = ISERIES_GET_FUNCTION_FROM_SUBBUS(SubBus);
-	HvAgentId EADsIdSel = ISERIES_PCI_AGENTID(IdSel, Function);
-
-	/* iSeries_allocate_IRQ.: 0x18.00.12(0xA3) */
-	Irq = iSeries_allocate_IRQ(Bus, 0, EADsIdSel);
-
-	/*
-	 * Connect all functions of any device found.
-	 */
-	for (IdSel = 1; IdSel <= BridgeInfo->maxAgents; ++IdSel) {
-		for (Function = 0; Function < 8; ++Function) {
-			HvAgentId AgentId = ISERIES_PCI_AGENTID(IdSel, Function);
-			HvRc = HvCallXm_connectBusUnit(Bus, SubBus,
-					AgentId, Irq);
-			if (HvRc != 0) {
-				pci_Log_Error("Connect Bus Unit",
-					      Bus, SubBus, AgentId, HvRc);
-				continue;
-			}
-
-			HvRc = HvCallPci_configLoad16(Bus, SubBus, AgentId,
-						      PCI_VENDOR_ID, &VendorId);
-			if (HvRc != 0) {
-				pci_Log_Error("Read Vendor",
-					      Bus, SubBus, AgentId, HvRc);
-				continue;
-			}
-			printk("read vendor ID: %x\n", VendorId);
-
-			/* FoundDevice: 0x18.28.10 = 0x12AE */
-			HvRc = HvCallPci_configStore8(Bus, SubBus, AgentId,
-						      PCI_INTERRUPT_LINE, Irq);
-			if (HvRc != 0)
-				pci_Log_Error("PciCfgStore Irq Failed!",
-					      Bus, SubBus, AgentId, HvRc);
-
-			++DeviceCount;
-			node = build_device_node(Bus, SubBus, EADsIdSel, Function);
-			PCI_DN(node)->Irq = Irq;
-			PCI_DN(node)->LogicalSlot = BridgeInfo->logicalSlotNumber;
-
-		} /* for (Function = 0; Function < 8; ++Function) */
-	} /* for (IdSel = 1; IdSel <= MaxAgents; ++IdSel) */
-	return HvRc;
-}
-
-/*
  * I/0 Memory copy MUST use mmio commands on iSeries
  * To do; For performance, include the hv call directly
  */
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index fd6d0eb..d83f5ed 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -66,6 +66,8 @@ #include "processor_vpd.h"
 #include "main_store.h"
 #include "call_sm.h"
 #include "call_hpt.h"
+#include "call_pci.h"
+#include "pci.h"
 
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -1000,6 +1002,207 @@ void dt_vdevices(struct iseries_flat_dt 
 	dt_end_node(dt);
 }
 
+/*
+ * This assumes that the node slot is always on the primary bus!
+ */
+static void scan_bridge_slot(struct iseries_flat_dt *dt, HvBusNumber bus,
+		struct HvCallPci_BridgeInfo *bridge_info)
+{
+	HvSubBusNumber sub_bus = bridge_info->subBusNumber;
+	u16 vendor_id;
+	u16 device_id;
+	u32 class_id;
+	int err;
+	char buf[32];
+	u32 reg[5];
+	int id_sel = ISERIES_GET_DEVICE_FROM_SUBBUS(sub_bus);
+	int function = ISERIES_GET_FUNCTION_FROM_SUBBUS(sub_bus);
+	HvAgentId eads_id_sel = ISERIES_PCI_AGENTID(id_sel, function);
+
+	/*
+	 * Connect all functions of any device found.
+	 */
+	for (id_sel = 1; id_sel <= bridge_info->maxAgents; id_sel++) {
+		for (function = 0; function < 8; function++) {
+			u8 devfn;
+
+			HvAgentId agent_id = ISERIES_PCI_AGENTID(id_sel,
+					function);
+			err = HvCallXm_connectBusUnit(bus, sub_bus,
+					agent_id, 0);
+			if (err) {
+				if (err != 0x302)
+					printk(KERN_DEBUG
+						"connectBusUnit(%x, %x, %x) "
+						"== %x\n",
+						bus, sub_bus, agent_id, err);
+				continue;
+			}
+
+			err = HvCallPci_configLoad16(bus, sub_bus, agent_id,
+					PCI_VENDOR_ID, &vendor_id);
+			if (err) {
+				printk(KERN_DEBUG
+					"ReadVendor(%x, %x, %x) == %x\n",
+					bus, sub_bus, agent_id, err);
+				continue;
+			}
+			err = HvCallPci_configLoad16(bus, sub_bus, agent_id,
+					PCI_DEVICE_ID, &device_id);
+			if (err) {
+				printk(KERN_DEBUG
+					"ReadDevice(%x, %x, %x) == %x\n",
+					bus, sub_bus, agent_id, err);
+				continue;
+			}
+			err = HvCallPci_configLoad32(bus, sub_bus, agent_id,
+					PCI_CLASS_REVISION , &class_id);
+			if (err) {
+				printk(KERN_DEBUG
+					"ReadClass(%x, %x, %x) == %x\n",
+					bus, sub_bus, agent_id, err);
+				continue;
+			}
+
+			devfn = PCI_DEVFN(ISERIES_ENCODE_DEVICE(eads_id_sel),
+					function);
+			if (function == 0)
+				snprintf(buf, sizeof(buf), "pci@%x",
+						PCI_SLOT(devfn));
+			else
+				snprintf(buf, sizeof(buf), "pci@%x,%d",
+						PCI_SLOT(devfn), function);
+			dt_start_node(dt, buf);
+			reg[0] = (bus << 18) | (devfn << 8);
+			reg[1] = 0;
+			reg[2] = 0;
+			reg[3] = 0;
+			reg[4] = 0;
+			dt_prop_u32_list(dt, "reg", reg, 5);
+			dt_prop_u32(dt, "vendor-id", vendor_id);
+			dt_prop_u32(dt, "device-id", device_id);
+			dt_prop_u32(dt, "class-code", class_id >> 8);
+			dt_prop_u32(dt, "revision-id", class_id & 0xff);
+			dt_prop_u32(dt, "linux,subbus", sub_bus);
+			dt_prop_u32(dt, "linux,agent-id", agent_id);
+			dt_prop_u32(dt, "linux,logical-slot-number",
+					bridge_info->logicalSlotNumber);
+			dt_end_node(dt);
+
+		}
+	}
+}
+
+static void scan_bridge(struct iseries_flat_dt *dt, HvBusNumber bus,
+		HvSubBusNumber sub_bus, int id_sel)
+{
+	struct HvCallPci_BridgeInfo bridge_info;
+	HvAgentId agent_id;
+	int function;
+	int ret;
+
+	/* Note: hvSubBus and irq is always be 0 at this level! */
+	for (function = 0; function < 8; ++function) {
+		agent_id = ISERIES_PCI_AGENTID(id_sel, function);
+		ret = HvCallXm_connectBusUnit(bus, sub_bus, agent_id, 0);
+		if (ret != 0) {
+			if (ret != 0xb)
+				printk(KERN_DEBUG "connectBusUnit(%x, %x, %x) "
+						"== %x\n",
+						bus, sub_bus, agent_id, ret);
+			continue;
+		}
+		printk("found device at bus %d idsel %d func %d (AgentId %x)\n",
+				bus, id_sel, function, agent_id);
+		ret = HvCallPci_getBusUnitInfo(bus, sub_bus, agent_id,
+				iseries_hv_addr(&bridge_info),
+				sizeof(struct HvCallPci_BridgeInfo));
+		if (ret != 0)
+			continue;
+		printk("bridge info: type %x subbus %x "
+			"maxAgents %x maxsubbus %x logslot %x\n",
+			bridge_info.busUnitInfo.deviceType,
+			bridge_info.subBusNumber,
+			bridge_info.maxAgents,
+			bridge_info.maxSubBusNumber,
+			bridge_info.logicalSlotNumber);
+		if (bridge_info.busUnitInfo.deviceType ==
+				HvCallPci_BridgeDevice)
+			scan_bridge_slot(dt, bus, &bridge_info);
+		else
+			printk("PCI: Invalid Bridge Configuration(0x%02X)",
+				bridge_info.busUnitInfo.deviceType);
+	}
+}
+
+static void scan_phb(struct iseries_flat_dt *dt, HvBusNumber bus)
+{
+	struct HvCallPci_DeviceInfo dev_info;
+	const HvSubBusNumber sub_bus = 0;	/* EADs is always 0. */
+	int err;
+	int id_sel;
+	const int max_agents = 8;
+
+	/*
+	 * Probe for EADs Bridges
+	 */
+	for (id_sel = 1; id_sel < max_agents; ++id_sel) {
+		err = HvCallPci_getDeviceInfo(bus, sub_bus, id_sel,
+				iseries_hv_addr(&dev_info),
+				sizeof(struct HvCallPci_DeviceInfo));
+		if (err) {
+			if (err != 0x302)
+				printk(KERN_DEBUG "getDeviceInfo(%x, %x, %x) "
+						"== %x\n",
+						bus, sub_bus, id_sel, err);
+			continue;
+		}
+		if (dev_info.deviceType != HvCallPci_NodeDevice) {
+			printk(KERN_DEBUG "PCI: Invalid System Configuration"
+					"(0x%02X) for bus 0x%02x id 0x%02x.\n",
+					dev_info.deviceType, bus, id_sel);
+			continue;
+		}
+		scan_bridge(dt, bus, sub_bus, id_sel);
+	}
+}
+
+static void dt_pci_devices(struct iseries_flat_dt *dt)
+{
+	HvBusNumber bus;
+	char buf[32];
+	u32 buses[2];
+	int phb_num = 0;
+
+	/* Check all possible buses. */
+	for (bus = 0; bus < 256; bus++) {
+		int err = HvCallXm_testBus(bus);
+
+		if (err) {
+			/*
+			 * Check for Unexpected Return code, a clue that
+			 * something has gone wrong.
+			 */
+			if (err != 0x0301)
+				printk(KERN_ERR "Unexpected Return on Probe"
+						"(0x%02X): 0x%04X", bus, err);
+			continue;
+		}
+		printk("bus %d appears to exist\n", bus);
+		snprintf(buf, 32, "pci@%d", phb_num);
+		dt_start_node(dt, buf);
+		dt_prop_str(dt, "device_type", "pci");
+		dt_prop_str(dt, "compatible", "IBM,iSeries-Logical-PHB");
+		dt_prop_u32(dt, "#address-cells", 3);
+		dt_prop_u32(dt, "#size-cells", 2);
+		buses[0] = buses[1] = bus;
+		dt_prop_u32_list(dt, "bus-range", buses, 2);
+		scan_phb(dt, bus);
+		dt_end_node(dt);
+		phb_num++;
+	}
+}
+
 void build_flat_dt(struct iseries_flat_dt *dt, unsigned long phys_mem_size)
 {
 	u64 tmp[2];
@@ -1029,6 +1232,7 @@ void build_flat_dt(struct iseries_flat_d
 	dt_cpus(dt);
 
 	dt_vdevices(dt);
+	dt_pci_devices(dt);
 
 	dt_end_node(dt);
 
-- 
1.3.1.ge923

^ permalink raw reply related

* [PATCH 04/14] powerpc: remove iSeries_Global_Device_List
From: Stephen Rothwell @ 2006-05-19  6:48 UTC (permalink / raw)
  To: paulus; +Cc: ppc-dev
In-Reply-To: <20060519164249.2dc43bc4.sfr@canb.auug.org.au>

We can now scan the list of device nodes instead.  This also allows us
to remove the Device_list member of struct pci_dn.

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---

 arch/powerpc/platforms/iseries/iommu.c |   15 +++++++++------
 arch/powerpc/platforms/iseries/pci.c   |   14 ++++++--------
 include/asm-powerpc/pci-bridge.h       |    1 -
 3 files changed, 15 insertions(+), 15 deletions(-)

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au

80052bf80f481996ffec6dddc8fab45bb36db0a3
diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c
index 3ac2206..75a5a1e 100644
--- a/arch/powerpc/platforms/iseries/iommu.c
+++ b/arch/powerpc/platforms/iseries/iommu.c
@@ -32,13 +32,11 @@ #include <asm/iommu.h>
 #include <asm/tce.h>
 #include <asm/machdep.h>
 #include <asm/abs_addr.h>
+#include <asm/prom.h>
 #include <asm/pci-bridge.h>
 #include <asm/iseries/hv_call_xm.h>
 #include <asm/iseries/iommu.h>
 
-extern struct list_head iSeries_Global_Device_List;
-
-
 static void tce_build_iSeries(struct iommu_table *tbl, long index, long npages,
 		unsigned long uaddr, enum dma_data_direction direction)
 {
@@ -140,10 +138,15 @@ #ifdef CONFIG_PCI
  */
 static struct iommu_table *iommu_table_find(struct iommu_table * tbl)
 {
-	struct pci_dn *pdn;
+	struct device_node *node;
+
+	for (node = NULL; (node = of_find_all_nodes(node)); ) {
+		struct pci_dn *pdn = PCI_DN(node);
+		struct iommu_table *it;
 
-	list_for_each_entry(pdn, &iSeries_Global_Device_List, Device_List) {
-		struct iommu_table *it = pdn->iommu_table;
+		if (pdn == NULL)
+			continue;
+		it = pdn->iommu_table;
 		if ((it != NULL) &&
 		    (it->it_type == TCE_PCI) &&
 		    (it->it_offset == tbl->it_offset) &&
diff --git a/arch/powerpc/platforms/iseries/pci.c b/arch/powerpc/platforms/iseries/pci.c
index 9d571e7..5bc08d4 100644
--- a/arch/powerpc/platforms/iseries/pci.c
+++ b/arch/powerpc/platforms/iseries/pci.c
@@ -50,8 +50,6 @@ #include "call_pci.h"
  */
 static struct device_node *find_Device_Node(int bus, int devfn);
 
-LIST_HEAD(iSeries_Global_Device_List);
-
 static int Pci_Retry_Max = 3;	/* Only retry 3 times  */
 static int Pci_Error_Flag = 1;	/* Set Retry Error on. */
 
@@ -245,8 +243,6 @@ void iSeries_pcibios_init(void)
 			pdn->bussubno = *busp;
 			pdn->Irq = irq;
 			pdn->LogicalSlot = *lsn;
-			list_add_tail(&pdn->Device_List,
-					&iSeries_Global_Device_List);
 		}
 	}
 }
@@ -338,11 +334,13 @@ EXPORT_SYMBOL(iSeries_memcpy_fromio);
  */
 static struct device_node *find_Device_Node(int bus, int devfn)
 {
-	struct pci_dn *pdn;
+	struct device_node *node;
+
+	for (node = NULL; (node = of_find_all_nodes(node)); ) {
+		struct pci_dn *pdn = PCI_DN(node);
 
-	list_for_each_entry(pdn, &iSeries_Global_Device_List, Device_List) {
-		if ((bus == pdn->busno) && (devfn == pdn->devfn))
-			return pdn->node;
+		if (pdn && (bus == pdn->busno) && (devfn == pdn->devfn))
+			return node;
 	}
 	return NULL;
 }
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index 38de92d..59794b4 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -79,7 +79,6 @@ #endif
 	struct	pci_dev *pcidev;	/* back-pointer to the pci device */
 	struct	device_node *node;	/* back-pointer to the device_node */
 #ifdef CONFIG_PPC_ISERIES
-	struct	list_head Device_List;
 	int	Irq;			/* Assigned IRQ */
 	int	Flags;			/* Possible flags(disable/bist)*/
 	u8	LogicalSlot;		/* Hv Slot Index for Tces */
-- 
1.3.1.ge923

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