* RE: question about linux with Xilinx ML-403
From: Ming Liu @ 2006-05-24 9:46 UTC (permalink / raw)
To: rick.moleres; +Cc: linuxppc-embedded
In-Reply-To: <689CB232690D8D4E97DA6C76DA098E6C0252AB7B@XCO-EXCHVS1.xlnx.xilinx.com>
Dear Rick,
First, thanks a lot for your information. However I still have something to
ask.
>Our best recommendation is to use the drivers/net/xilinx_enet directory
>for the temac driver and just enable the Xilinx 10/100 Ethernet in
>menuconfig.
I am not so clear with this. Do you mean that I just copy the source code
in the directory of xilinx_gige generated by EDK into the directory of
xilinx_enet in linux2.4.20, and then enable the Xilinx 10/100 ethernet in
the menuconfig? Can this method realize the 1000M ethernet? The source code
file names for Temac (xtemac_xxx.c or .h) are different with the ones for
emac (xemac_xxx.c or .h). Can the xtemac files be recognized by the linux
kernel?
BR
Ming
_________________________________________________________________
享用世界上最大的电子邮件系统― MSN Hotmail。 http://www.hotmail.com
^ permalink raw reply
* Re: snd-aoa status update / automatic driver loading
From: Johannes Berg @ 2006-05-24 9:42 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev list, Benjamin Berg, debian-powerpc
In-Reply-To: <1148422544.13249.96.camel@localhost.localdomain>
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On Wed, 2006-05-24 at 08:15 +1000, Benjamin Herrenschmidt wrote:
> > Right, that's how snd-powermac does it. It has the nasty side-effect of
> > polluting the cache a lot though, since dbdma commands are 16 bytes
> > long. Am I wrong?
>
> You don't have that much DBDMA commands that it would pollute the cache
> _a lot_ :)
Ah, yeah, I guess so. Well I do have 32 dbdma commands, them being
spaced up in 16-bytes means 16 cachelines, no? I'm not sure how the
cache is wired up ...
> > Alsa calls this thing the 'pointer' :) The frame counter we currently
> > use is the frame counter register of the i2s bus controller, and I don't
> > see why we shouldn't do that instead of reading back all the dbdma
> > command status fields.
>
> If you manage to have it properly in sync, that may work too.
Seems to work fine so far, even if bcm43xx kills a few interrupts ;)
johannes
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^ permalink raw reply
* Re: snd-aoa status update / automatic driver loading
From: Johannes Berg @ 2006-05-24 9:41 UTC (permalink / raw)
To: Hollis Blanchard; +Cc: linuxppc-dev list, debian-powerpc
In-Reply-To: <1148395617.3434.0.camel@diesel>
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On Tue, 2006-05-23 at 09:46 -0500, Hollis Blanchard wrote:
> Yeah, I'm not sure how I was supposed to know that i2sbus was the magic
> module.
Heh, yeah, sorry. Thing is, if you'd have just installed the modules and
rebooted, it would have worked :)
> That seems to be working now. Again, from PowerMac11,2:
Yeah looks fine, except I just fixed a very stupid bug in the i2sbus
module. Please don't try to remove it after loading, until you upgrade
to the current version.
> This is probably just because I loaded all the modules I could find.
I tried changing the tas module to detect if the codec *really is
present*, but failed. There's some code in there, but I'll solicit some
help with that later.
> Volume control does indeed work when the tas module isn't loaded.
Interesting, but good to know. I'd have thought that the fabric would
not take the codec into use. Will see if I can fix that.
> Could you also add a sample modules.conf? For example, users should be
> told to remove snd-powermac.
Good point. Everything else should not be necessary though, since the
i2sbus module should automatically load due to having a macio modalias.
johannes
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^ permalink raw reply
* via-pmu runs device_power_down in atomic context
From: Johannes Berg @ 2006-05-24 8:01 UTC (permalink / raw)
To: linuxppc-dev list; +Cc: cpufreq
[-- Attachment #1: Type: text/plain, Size: 2197 bytes --]
Hey,
Everytime I suspend my powerbook, I see the following trace:
[10655.887546] BUG: sleeping function called from invalid context at include/linux/rwsem.h:43
[10655.887558] in_atomic():0, irqs_disabled():1
[10655.887562] Call Trace:
[10655.887565] [C581BD20] [C00081E8] show_stack+0x50/0x190 (unreliable)
[10655.887582] [C581BD50] [C0023BB0] __might_sleep+0xcc/0xe8
[10655.887592] [C581BD60] [C0038290] blocking_notifier_call_chain+0x2c/0xc0
[10655.887606] [C581BD80] [C01E90C0] cpufreq_suspend+0x130/0x148
[10655.887616] [C581BDB0] [C019D9E8] sysdev_suspend+0x10c/0x300
[10655.887627] [C581BDF0] [C01A3888] device_power_down+0x74/0xac
[10655.887636] [C581BE10] [C01B1264] pmac_suspend_devices+0x98/0x188
[10655.887643] [C581BE30] [C01B18F0] pmu_ioctl+0x59c/0xbc0
[10655.887649] [C581BED0] [C008E898] do_ioctl+0x80/0x84
[10655.887660] [C581BEE0] [C008E928] vfs_ioctl+0x8c/0x48c
[10655.887666] [C581BF10] [C008ED68] sys_ioctl+0x40/0x74
[10655.887673] [C581BF40] [C000F3A4] ret_from_syscall+0x0/0x38
The might_sleep() comes from down_read() and this happens because
blocking_notifier_call_chain calls it, it is also commented to run in
process context so this is all proper.
However, it obviously isn't run at process context. Looking why, I see
this in via-pmu.c:
/* We can now disable MSR_EE. This code of course works properly only
* on UP machines... For SMP, if we ever implement sleep, we'll have to
* stop the "other" CPUs way before we do all that stuff.
*/
local_irq_disable();
/* Broadcast power down irq
* This isn't that useful in most cases (only directly wired devices can
* use this but still... This will take care of sysdev's as well, so
* we exit from here with local irqs disabled and PIC off.
*/
ret = device_power_down(PMSG_SUSPEND);
Apparently this was a deliberate decision.
So the question is: which is correct? I can test and submit a patch to
fix the issue at either end; if cpufreq is wrong I'd move from a
blocking_ to an atomic_notifier_call_chain, if via-pmu.c is wrong I'd
call device_power_down earlier...
johannes
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^ permalink raw reply
* delay programming
From: tony @ 2006-05-24 9:23 UTC (permalink / raw)
To: linuxppc-embedded@ozlabs.org
hi all
I want to delay 1ms in the program,
does usleep(1000) works accurate?
any good idea?
regards
tony
^ permalink raw reply
* Re:Help Needed: floating point used in kernel (task=c0398410, pc=3184)
From: sandeep malik @ 2006-05-24 8:14 UTC (permalink / raw)
To: linuxppc-embedded, roger.larsson
[-- Attachment #1: Type: text/plain, Size: 2729 bytes --]
Hi Roger...
Thanks for your response.....but in my case the application is causing this error....this is not coming from any kernel module but a user space application which is creating problem.....and in that application also i have replaced all double occurances with long but still the same error was being flashed......what i suspect is this error is no where related to the usage of floating point as i compiled following code and run the same on the 8325 board and the code was running without any issue.....
#include "stdio.h"
int main()
{
int i=0;
float j= 1.2;
float result;
for(i=0; i<10; i++ )
{
result = result * 2;
}
printf("\n result %f",result);
return 0;
}
The result was exactly what is expected.....so i think this is not related to floating point but might be some other issue......
Are there any other scenarios which can lead to this message????
Regards,
Malik
=====================================================
> Hi All...
>
> I am trying to run an application compiled with gcc toolchain gcc--3.4.3
> and glibc -2.3.4 on PPC 8325 board running Linux 2.6.11....but some how I
> am getting following error....
>
> floating point used in kernel (task=c0398410, pc=3184)
> floating point used in kernel (task=c0398410, pc=3184)
> floating point used in kernel (task=c0398410, pc=3184)
> floating point used in kernel (task=c0398410, pc=3184)
> floating point used in kernel (task=c0398410, pc=3184)
> floating point used in kernel (task=c0398410, pc=3184)
>
> I was suspecting this error might be because the hardware is not
> supporting floating point operations and hence i tried a simple program in
> which I intentionally did some floating point operation but that program
> was running as expected.
No, the warning is more serious than that.
Linux does not save floating point registers when entering kernel.
It might even optimize not to store/reload when doing a context switch.
If your kernel module is using floating point in your kernel code.
It will probably work on a processor not having floating point but will
break in mysterious ways on one supporting hardware floating point.
Do not use floating point in kernel. If you still have to you must take
extremely care.
Turn off kernel preemption.
Save FP registers.
Do your stuff.
Reload FP registers.
Turn on preemption.
But the question is why would you have to?
Simple calculations can be done in fixed point, and complex calculations
does not belong in the kernel.
/RogerL
---------------------------------
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^ permalink raw reply
* RE: [PATCH/2.6.17-rc4 1/10] Powerpc: Add general support for mpc7 448h pc2 (Taiga) platform
From: Zang Roy-r61911 @ 2006-05-24 7:23 UTC (permalink / raw)
To: Kumar Gala
Cc: Yang Xin-Xin-r48390, Paul Mackerras, Alexandre.Bounine,
linuxppc-dev list
> On May 18, 2006, at 3:05 AM, Zang Roy-r61911 wrote:
>
> >>
> >>> The tsi108 serial port is not a sub node of "soc". well,
> any way, I
> >>> can try soc!
> >>
> >> What is it ? Where is it ? "soc" is a bit of a generic name for
> >> something in the device-tree in fact... we might want to
> define a way
> >> to expose any bus via some kind of soc mecanism even if it's not a
> >> root bus.
> >>
> >>
> > Should I just use add_legacy_soc_port() instead of a new function
> > add_legacy_tsi_port()?
>
> I think seeing your dts will help here. We need to have a
> concept of a "bridge" that may be similar to an "soc".
mpc7448hpc2 dts :
/*
* MPC7448HPC2 (Taiga) board Device Tree Source
*
* Copyright 2006 Freescale Semiconductor Inc.
* 2006 Roy Zang <Roy Zang at freescale.com>.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
/ {
model = "mpc7448hpc2";
compatible = "mpc74xx";
#address-cells = <1>;
#size-cells = <1>;
linux,phandle = <100>;
cpus {
#cpus = <1>;
#address-cells = <1>;
#size-cells =<0>;
linux,phandle = <200>;
PowerPC,7448@0 {
device_type = "cpu";
reg = <0>;
d-cache-line-size = <20>; // 32 bytes
i-cache-line-size = <20>; // 32 bytes
d-cache-size = <8000>; // L1, 32K bytes
i-cache-size = <8000>; // L1, 32K bytes
timebase-frequency = <0>; // 33 MHz, from uboot
clock-frequency = <0>; // From U-Boot
bus-frequency = <0>; // From U-Boot
32-bit;
linux,phandle = <201>;
linux,boot-cpu;
};
};
memory {
device_type = "memory";
linux,phandle = <300>;
reg = <00000000 20000000 // DDR2 512M at 0
>;
};
tsi108@c0000000 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
device_type = "tsi-bridge";
ranges = <00000000 c0000000 00010000>;
reg = <c0000000 00010000>;
bus-frequency = <0>;
i2c@7000 {
interrupt-parent = <7400>;
interrupts = <E 3>;
reg = <7000 400>;
device_type = "i2c";
compatible = "tsi-i2c";
};
mdio@6000 {
device_type = "mdio";
compatible = "tsi-ethernet"; // FIXME
ethernet-phy@6000 {
linux,phandle = <6000>;
interrupt-parent = <7400>;
interrupts = <2 1>;
reg = <6000 50>;
device_type = "ethernet-phy";
};
ethernet-phy@6400 {
linux,phandle = <6400>;
interrupt-parent = <7400>;
interrupts = <2 1>;
reg = <6400 50>;
device_type = "ethernet-phy";
};
};
ethernet@6200 {
#size-cells = <0>;
device_type = "network";
model = "TSI-ETH"; // FIXME
compatible = "tsi-ethernet"; // FIXME
reg = <6200 200>;
address = [ 00 06 D2 00 00 01 ];
interrupts = <10 3 10 3 10 3>;
interrupt-parent = <7400>;
phy-handle = <6000>;
};
ethernet@6600 {
#address-cells = <1>;
#size-cells = <0>;
device_type = "network";
model = "TSI-ETH"; // FIXME
compatible = "tsi-ethernet"; // FIXME
reg = <6600 200>;
address = [ 00 06 D2 00 00 02 ];
interrupts = <11 3 11 3 11 3>;
interrupt-parent = <7400>;
phy-handle = <6400>;
};
serial@7808 {
device_type = "serial";
compatible = "ns16550";
reg = <7808 200>;
clock-frequency = <3f6b5a00>;
interrupts = <c 3>;
interrupt-parent = <7400>;
};
serial@7c08 {
device_type = "serial";
compatible = "ns16550";
reg = <7c08 200>;
clock-frequency = <3f6b5a00>;
interrupts = <d 3>;
interrupt-parent = <7400>;
};
pic@7400 {
linux,phandle = <7400>;
clock-frequency = <0>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
reg = <7400 400>;
built-in;
compatible = "chrp,open-pic";
device_type = "open-pic";
big-endian;
};
pci@1000 {
compatible = "tsi10x";
device_type = "pci";
linux,phandle = <1000>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
reg = <1000 1000>;
bus-range = <0 0>;
ranges = <02000000 0 e0000000 e0000000 0 1A000000
01000000 0 00000000 fa000000 0 00010000>;
clock-frequency = <7f28154>;
interrupt-parent = <7400>;
interrupts = <8 0>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x11 */
8800 0 0 1 7400 24 0
8800 0 0 2 7400 25 0
8800 0 0 3 7400 26 0
8800 0 0 4 7400 27 0
/* IDSEL 0x12 */
9000 0 0 1 7400 25 0
9000 0 0 2 7400 26 0
9000 0 0 3 7400 27 0
9000 0 0 4 7400 24 0
/* IDSEL 0x13 */
9800 0 0 1 7400 26 0
9800 0 0 2 7400 27 0
9800 0 0 3 7400 24 0
9800 0 0 4 7400 25 0
/* IDSEL 0x14 */
a000 0 0 1 7400 27 0
a000 0 0 2 7400 24 0
a000 0 0 3 7400 25 0
a000 0 0 4 7400 26 0
>;
};
};
};
^ permalink raw reply
* Re: Help Needed: floating point used in kernel (task=c0398410, pc=3184)
From: Roger Larsson @ 2006-05-24 6:50 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <20060524061205.53935.qmail@web8405.mail.in.yahoo.com>
On onsdag 24 maj 2006 08.12, sandeep malik wrote:
> Hi All...
>
> I am trying to run an application compiled with gcc toolchain gcc--3.4.3
> and glibc -2.3.4 on PPC 8325 board running Linux 2.6.11....but some how I
> am getting following error....
>
> floating point used in kernel (task=c0398410, pc=3184)
> floating point used in kernel (task=c0398410, pc=3184)
> floating point used in kernel (task=c0398410, pc=3184)
> floating point used in kernel (task=c0398410, pc=3184)
> floating point used in kernel (task=c0398410, pc=3184)
> floating point used in kernel (task=c0398410, pc=3184)
>
> I was suspecting this error might be because the hardware is not
> supporting floating point operations and hence i tried a simple program in
> which I intentionally did some floating point operation but that program
> was running as expected.
No, the warning is more serious than that.
Linux does not save floating point registers when entering kernel.
It might even optimize not to store/reload when doing a context switch.
If your kernel module is using floating point in your kernel code.
It will probably work on a processor not having floating point but will
break in mysterious ways on one supporting hardware floating point.
Do not use floating point in kernel. If you still have to you must take
extremely care.
Turn off kernel preemption.
Save FP registers.
Do your stuff.
Reload FP registers.
Turn on preemption.
But the question is why would you have to?
Simple calculations can be done in fixed point, and complex calculations
does not belong in the kernel.
/RogerL
^ permalink raw reply
* RE: Help Needed: floating point used in kernel (task=c0398410, pc =3184)
From: Liu Dave-r63238 @ 2006-05-24 6:26 UTC (permalink / raw)
To: 'sandeep malik', linuxppc-embedded
Malik,
Because PPC8325 have NO float point unit, so please compile all of source code with gcc 8325 compiler
or use fixed simulate. The source code includs kernel, and filesystem.
Dave
-----Original Message-----
Hi All...
I am trying to run an application compiled with gcc toolchain gcc--3.4.3 and glibc -2.3.4 on PPC 8325 board running Linux 2.6.11....but some how I am getting following error....
floating point used in kernel (task=c0398410, pc=3184)
floating point used in kernel (task=c0398410, pc=3184)
floating point used in kernel (task=c0398410, pc=3184)
floating point used in kernel (task=c0398410, pc=3184)
floating point used in kernel (task=c0398410, pc=3184)
floating point used in kernel (task=c0398410, pc=3184)
I was suspecting this error might be because the hardware is not supporting floating point operations and hence i tried a simple program in which I intentionally did some floating point operation but that program was running as expected. So i concluded that it is not a problem related to floating point operations....I even tried compiling the application with classic ppc compiler(Ver 3.4.3) with -msoft-float option enabled, but still the results were same......
After these errors i am not able to get control of the system. If anyone who faced this or any such related issue please help me out like what could be probable reason for this error and what all options i have to debug this issue.....
Thanks & Regards,
Malik
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^ permalink raw reply
* Help Needed: floating point used in kernel (task=c0398410, pc=3184)
From: sandeep malik @ 2006-05-24 6:12 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 1465 bytes --]
Hi All...
I am trying to run an application compiled with gcc toolchain gcc--3.4.3 and glibc -2.3.4 on PPC 8325 board running Linux 2.6.11....but some how I am getting following error....
floating point used in kernel (task=c0398410, pc=3184)
floating point used in kernel (task=c0398410, pc=3184)
floating point used in kernel (task=c0398410, pc=3184)
floating point used in kernel (task=c0398410, pc=3184)
floating point used in kernel (task=c0398410, pc=3184)
floating point used in kernel (task=c0398410, pc=3184)
I was suspecting this error might be because the hardware is not supporting floating point operations and hence i tried a simple program in which I intentionally did some floating point operation but that program was running as expected. So i concluded that it is not a problem related to floating point operations....I even tried compiling the application with classic ppc compiler(Ver 3.4.3) with -msoft-float option enabled, but still the results were same......
After these errors i am not able to get control of the system. If anyone who faced this or any such related issue please help me out like what could be probable reason for this error and what all options i have to debug this issue.....
Thanks & Regards,
Malik
---------------------------------
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^ permalink raw reply
* Re: pmppc7448/mv64x60 DMA from PCI to memory
From: Phil Nitschke @ 2006-05-24 2:23 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <20060523235449.GB1536@mag.az.mvista.com>
On Tue, 2006-05-23 at 16:54 -0700, Mark A. Greer wrote:
> You say that you don't see any PCI traffic. Does that mean you
> have a PCI analyzer and that you are sure that its set up correctly?
I don't have a PCI analyzer, however the JTAG used to program the PCI
device has been configured to display 4 K samples of PCI bus signals
(about 20 microsecs?) around the time of an interrupt which results in
the DMA being requested. Since my last post, I have managed to see some
traffic, but the PCI STOP# line is asserted, so I'm not seeing any data
being read. I'll investigate further...
> If so, then you have something botched in your IDMA->PCI window setup
Quite possibly. The patch below shows how I've set this window up. It
is not intended as a 'final' piece of code, so please forgive the magic
numbers. Could you review this for me?
> or in the pgming of the DMA itself (e.g., in your descriptor(s)).
Well the memory to memory DMA is working OK. I just didn't know what
the correct procedure was for determining the bus address of the FIFO.
For example, this mapping returns a dma handle which does not work:
fifo_dma_handle = pci_map_single(dev, my_card.bar1+fifo_address[0],
FIFO_SIZE, PCI_DMA_FROMDEVICE);
Whereas without DMA I would just use this:
ioread32_rep(my_card.bar1 + fifo_address[0], buf, 6);
Was I misguided in trying to use pci_map_single in this way?
> Also, set the SrcHold bit [3] of the channel control reg (low).
> If its really a FIFO, you are--or will be once you get your windows
> and descriptors set up correctly--reading the FIFO once then
> incrementing past it.
I can either address it as a FIFO, or as a memory range. I can read
from any address in the range and it returns the "next FIFO value".
Anyway, I've tried both src address hold settings...
> > For this scenario, can anyone tell me:
> > * Should I be using the same src address as that reported via
> > the 'lspci' command - this _is_ the PCI bus address, isn't it?
>
> "man lspci" (read up on the '-b' option)
I cannot see any difference with the '-b' flag. Maybe that is the way
of things on my architecture?
> > * Looking through mv64x60.c in the 2.6.16 kernel, I note that 4
> > of the 8 possible IDMA address windows are configured (for each
> > of the 512 MB DRAM on our processor card).
>
> No they aren't. They're configured (or not) according to the setup info
> that you pass in.
OK. I also note there are several cases where this is used in
mv64x60.c:
for (i=0; i<3; i++)
Why is 3 used in these loops, and not some other constant like
MV64360_xxxxx_WINDOWS (which are usually 4, not 3)?
> > Do I need to add
> > tests to my source and destination regions, to determine if they
> > cross one of the 512 MB regions, and hence will require a
> > different CSx line (and thus the DMA will need to be broken into
> > two transactions), or does kernel already take care to ensure
> > allocated regions will not cross these boundaries?
>
> No. You need to do what's appropriate for the hardware that you are
> essentially writing a driver for. YOU are supposed to know what the
> limitations of your hardware are.
OK, I know how my hardware is configured, but when trying to write a
generic driver, perhaps I need to have the mv64x60.c code remember the
CSx barriers, e.g. in the mv64x60_chip_info, so the IDMA engine can
access it. Do you think this would be possible/beneficial?
Thanks again,
--
Phil
Here is the patch to configure IDMA to PCI window(s):
--- linux-2.6.16/arch/ppc/syslib/mv64x60.c 2006-03-20
16:23:29.000000000 +1030
+++ linux-2.6.16-patched/arch/ppc/syslib/mv64x60.c 2006-05-23
16:33:52.000000000 +0930
@@ -535,6 +581,7 @@
mv64x60_config_pci_params(bh->hose_a, &si->pci_0);
mv64x60_config_cpu2pci_windows(bh, &si->pci_0, 0);
+ mv64x60_config_idma2pci_windows(bh, &si->pci_0, 0);
mv64x60_config_pci2mem_windows(bh, bh->hose_a,
&si->pci_0, 0,
mem_windows);
bh->ci->set_pci2regs_window(bh, bh->hose_a, 0,
@@ -548,6 +595,7 @@
mv64x60_config_pci_params(bh->hose_b, &si->pci_1);
mv64x60_config_cpu2pci_windows(bh, &si->pci_1, 1);
+ mv64x60_config_idma2pci_windows(bh, &si->pci_1, 1);
mv64x60_config_pci2mem_windows(bh, bh->hose_b,
&si->pci_1, 1,
mem_windows);
bh->ci->set_pci2regs_window(bh, bh->hose_b, 1,
@@ -1136,6 +1188,42 @@
bh->ci->disable_window_32bit(bh, win_tab[bus][i
+1]);
}
+static u32 idma_tab_xtra[MV64x60_CPU2MEM_WINDOWS] __initdata = {
+ MV64x60_IDMA2MEM_0_WIN, MV64x60_IDMA2MEM_1_WIN,
+ MV64x60_IDMA2MEM_2_WIN, MV64x60_IDMA2MEM_3_WIN,
+};
+
+void __init
+mv64x60_config_idma2pci_windows(struct mv64x60_handle *bh,
+ struct mv64x60_pci_info *pi, u32 bus)
+{
+ u32 attributes, unit_id;
+ int i;
+
+ /* Target Unit IDs: PCI0 = 3, PCI1 = 4. */
+ unit_id = bus ? 0x4 : 0x3;
+ /* 0x1d == No swap data, PCI-X NS attribute asserted, PCI memory
+ * space, PCIx_REQ64n asserted according to requested data size.
*/
+ attributes = (0x1d << 8) | unit_id;
+
+ for (i=0; i<3; i++)
+ if (pi->pci_mem[i].size > 0) {
+ mv64x60_set_32bit_window(bh, idma_tab_xtra[i],
+ pi->pci_mem[i].cpu_base,
pi->pci_mem[i].size,
+ attributes);
+ bh->ci->enable_window_32bit(bh,
idma_tab_xtra[i]);
+ /* Give idma r/w access to PCI memory region */
+ mv64x60_set_bits(bh,
MV64360_IDMA2MEM_ACC_PROT_0,
+ (0x3 << (i << 1)));
+ mv64x60_set_bits(bh,
MV64360_IDMA2MEM_ACC_PROT_1,
+ (0x3 << (i << 1)));
+ mv64x60_set_bits(bh,
MV64360_IDMA2MEM_ACC_PROT_2,
+ (0x3 << (i << 1)));
+ mv64x60_set_bits(bh,
MV64360_IDMA2MEM_ACC_PROT_3,
+ (0x3 << (i << 1)));
+ }
+}
+
/*
*****************************************************************************
*
@@ -2220,8 +2311,8 @@
};
static u32 idma_tab[MV64x60_CPU2MEM_WINDOWS] __initdata = {
- MV64x60_IDMA2MEM_0_WIN, MV64x60_IDMA2MEM_1_WIN,
- MV64x60_IDMA2MEM_2_WIN, MV64x60_IDMA2MEM_3_WIN,
+ MV64x60_IDMA2MEM_4_WIN, MV64x60_IDMA2MEM_5_WIN,
+ MV64x60_IDMA2MEM_6_WIN, MV64x60_IDMA2MEM_7_WIN,
};
static u32 dram_selects[MV64x60_CPU2MEM_WINDOWS] __initdata =
@@ -2285,13 +2376,13 @@
/* Give idma r/w access to memory region */
mv64x60_set_bits(bh,
MV64360_IDMA2MEM_ACC_PROT_0,
- (0x3 << (i << 1)));
+ (0x3 << ((i+4) << 1)));
mv64x60_set_bits(bh,
MV64360_IDMA2MEM_ACC_PROT_1,
- (0x3 << (i << 1)));
+ (0x3 << ((i+4) << 1)));
mv64x60_set_bits(bh,
MV64360_IDMA2MEM_ACC_PROT_2,
- (0x3 << (i << 1)));
+ (0x3 << ((i+4) << 1)));
mv64x60_set_bits(bh,
MV64360_IDMA2MEM_ACC_PROT_3,
- (0x3 << (i << 1)));
+ (0x3 << ((i+4) << 1)));
}
}
^ permalink raw reply
* RE: question about linux with Xilinx ML-403
From: Rick Moleres @ 2006-05-23 21:21 UTC (permalink / raw)
To: Ming Liu, rick.moleres; +Cc: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 2275 bytes --]
Ming,
-----Original Message-----
From: Ming Liu [mailto:eemingliu@hotmail.com]
Sent: Tuesday, May 23, 2006 3:42 AM
To: rick.moleres
Cc: linuxppc-embedded@ozlabs.org
Subject: question about linux with Xilinx ML-403
Hi Rick,
> Yes, we have a driver for the PLB TEMAC (different than the GSRD LL
> TEMAC) for Linux 2.4 (MontaVista Linux 2.4.20) that's shipped in EDK
> 8.1.1, and MontaVista is on the verge of publishing a driver for PLB
> TEMAC for Linux 2.6. (I believe it came across this mailing list a few
> weeks ago)
I have generated the BSP by EDK 8.1.1 for my project in ML403(hardcore
Temac and PLB Temac included). I noticed that there is a directory
called
Xilinx_gige in the directory of /drivers/net. Is this the driver for
MontaVista Linux2.4.20?
Yes, this is the PLB TEMAC driver for Linux 2.4.20. In EDK 8.1.x, the
temac driver and Makefile are copied to drivers/net/xilinx_gige. This
xilinx_gige directory is not available in the MVL 3.1 Preview Kit, only
in the full Professional kit. We put the temac driver here mostly to
take advantage of the JUMBO_FRAME_SUPPORT in kernel configuration.
I copied the BSP and overwrote the original one in
the linux kernel directory (in the kernel directory, there is only a
directory called Xilinx_enet, no Xilinx_gige. So I just copied
Xilinx_gige.). However, my problem is in the menuconfig item of Network
Device Support->1000Mbit ethernet, there is not any option to choose and
enable the Xilinx on-chip ethernet. Is this a problem of MontaVista
Linux
3.1 Preview Kit, or my problem? And What shall I do to enable the
tri-mode
Temac in my platform? Thanks for your answer.
Our best recommendation is to use the drivers/net/xilinx_enet directory
for the temac driver and just enable the Xilinx 10/100 Ethernet in
menuconfig. If you want jumbo frame support, modify adapter.c in the
driver to define the CONFIG_XILINX_GIGE_JUMBO constant.
Note that Linux 2.6 support for the temac should be available from
MontaVista soon and a driver was pushed to this mailing list in March.
There will be support for MV Linux 2.6 in EDK 8.2.1 (around August).
Thanks,
Rick
[-- Attachment #2: Type: text/html, Size: 8154 bytes --]
^ permalink raw reply
* Re: pmppc7448/mv64x60 DMA from PCI to memory
From: Mark A. Greer @ 2006-05-23 23:54 UTC (permalink / raw)
To: Phil Nitschke; +Cc: linuxppc-embedded
In-Reply-To: <1148395804.21475.53.camel@toby.int.avalon.com.au>
Hi Phil,
On Wed, May 24, 2006 at 12:20:04AM +0930, Phil Nitschke wrote:
> I've written a collection of simple routines to program the Marvell IDMA
> controller, for example:
> mv64x6x_init_dma_channel();
> mv64x6x_set_dma_mode();
> mv64x6x_set_src_addr();
> mv64x6x_set_dst_addr();
> mv64x6x_set_dma_count();
> mv64x6x_enable_dma();
> or rather more simply:
> mv64x6x_memcpy_dma(dst_handle, src_handle, size);
Listing routine names but no code doesn't really help.
> This works OK for copying from a memory to memory, where the buffers are
> allocated using:
> src = dma_alloc_noncoherent(NULL, BUF_SZ, &src_handle, GFP_KERNEL);
> The src_handle is passed directly to mv64x6x_set_src_addr();
>
> But when the src address is the FIFO on the PCI bus, I don't know how to
Do you really mean a FIFO? If so, that would explain a lot...
> get the IDMA controller to play nicely. The FIFO sits in the middle of
> the PCI device's I/O mem range 0x9fe00000 - 0x9fffffff. I've programmed
> and enabled a 5th address window in the IDMA controller which
> encompasses the 0x200000 bytes of the PCI memory range, and I'm not
> seeing any address violation or address miss errors. The PCI->memory
> DMA "completes" without any traffic every touching the PCI bus, so
> obviously I need to do something else/differently.
You say that you don't see any PCI traffic. Does that mean you
have a PCI analyzer and that you are sure that its set up correctly?
If so, then you have something botched in your IDMA->PCI window setup
or in the pgming of the DMA itself (e.g., in your descriptor(s)).
Also, set the SrcHold bit [3] of the channel control reg (low).
If its really a FIFO, you are--or will be once you get your windows
and descriptors set up correctly--reading the FIFO once then
incrementing past it.
> For this scenario, can anyone tell me:
> * Should I be using the same src address as that reported via
> the 'lspci' command - this _is_ the PCI bus address, isn't it?
"man lspci" (read up on the '-b' option)
> * Do I have to do anything special to tell the IDMA controller
> to source data from the PCI bus and shift it into memory?
You're talking to a *FIFO* which means you read all the data from one
address and write all the data to one, probably different, address.
Its not normal PCI memory, you don't increment through it. Its a
register of a FIFO that's in PCI memory space. That's why you need
to tell the IDMA ctlr to "hold" and read/write to the same address
each time.
> * Looking through mv64x60.c in the 2.6.16 kernel, I note that 4
> of the 8 possible IDMA address windows are configured (for each
> of the 512 MB DRAM on our processor card).
No they aren't. They're configured (or not) according to the setup info
that you pass in.
> Do I need to add
> tests to my source and destination regions, to determine if they
> cross one of the 512 MB regions, and hence will require a
> different CSx line (and thus the DMA will need to be broken into
> two transactions), or does kernel already take care to ensure
> allocated regions will not cross these boundaries?
No. You need to do what's appropriate for the hardware that you are
essentially writing a driver for. YOU are supposed to know what the
limitations of your hardware are. Even if you don't have a manual... ;)
Mark
^ permalink raw reply
* Re: CPU 1 refused to die!
From: Nathan Lynch @ 2006-05-23 22:51 UTC (permalink / raw)
To: Giuliano Pochini; +Cc: LinuxPPC-dev
In-Reply-To: <20060523235819.473e4149.pochini@shiny.it>
Giuliano Pochini wrote:
>
> I booted with maxcpus=1, then I enabled the 2nd cpu
> with echo 1 > /sys/devices/system/cpu/cpu1/online
So onlining at runtime seems to work. Did you verify that tasks get
run on the 2nd cpu after you online it? Any other strange messages in
dmesg?
> I can't disable it anymore. dmesg says "CPU 1 refused to die!".
But offlining doesn't.
Can you online and offline cpus if you boot without maxcpus=1?
^ permalink raw reply
* Re: Setting I&D cache enable in the same mtspr instruction
From: Mark A. Greer @ 2006-05-23 22:34 UTC (permalink / raw)
To: Assaf Hoffman; +Cc: Ronen Shitrit, Rita Shtern, linuxppc-embedded
In-Reply-To: <B9FFC3F97441D04093A504CEA31B7C41A39491@msilexch01.marvell.com>
On Tue, May 23, 2006 at 12:55:46PM +0300, Assaf Hoffman wrote:
> Attached.
> Thanks.
Er, how about a *patch* place inline (as in, not as an attachment).
Thanks,
Mark
^ permalink raw reply
* Re: snd-aoa status update / automatic driver loading
From: Benjamin Herrenschmidt @ 2006-05-23 22:15 UTC (permalink / raw)
To: Johannes Berg; +Cc: linuxppc-dev list, Benjamin Berg, debian-powerpc
In-Reply-To: <1148280172.6228.79.camel@johannes.berg>
> Right, that's how snd-powermac does it. It has the nasty side-effect of
> polluting the cache a lot though, since dbdma commands are 16 bytes
> long. Am I wrong?
You don't have that much DBDMA commands that it would pollute the cache
_a lot_ :)
> > Since we can only update the framecounter on a per-period basis,
>
> Alsa calls this thing the 'pointer' :) The frame counter we currently
> use is the frame counter register of the i2s bus controller, and I don't
> see why we shouldn't do that instead of reading back all the dbdma
> command status fields.
If you manage to have it properly in sync, that may work too.
> Since the i2s bus is not shut down it also counts when we are not
> transferring data. We currently calibrate on the first interrupt. That's
> fine, since having multiple periods means that we don't need to be
> absolutely precise here. If we miss one, that's fine, we can make it up
> the next time by saying that 2 have elapsed.
Ok.
Ben.
^ permalink raw reply
* CPU 1 refused to die!
From: Giuliano Pochini @ 2006-05-23 21:58 UTC (permalink / raw)
To: LinuxPPC-dev
I booted with maxcpus=1, then I enabled the 2nd cpu
with echo 1 > /sys/devices/system/cpu/cpu1/online
I can't disable it anymore. dmesg says "CPU 1 refused to die!".
/proc/cpuinfo and /proc/interrupts show one cpu only and the tasks run on
one cpu after the echo 0 > /sys/... , but since the command takes a couple
of seconds to complete I think it's not simply a bogus error message.
Dual G4 MDD
Linux Jay 2.6.16.16 #8 SMP Sat May 13 19:15:05 CEST 2006 ppc 7455,
altivec supported PowerMac3,6 GNU/Linux
--
Giuliano.
^ permalink raw reply
* Re: [Cbe-oss-dev] Cell and new CPU feature bits
From: Benjamin Herrenschmidt @ 2006-05-23 21:52 UTC (permalink / raw)
To: Alex Rosenberg; +Cc: linuxppc-dev list, cbe-oss-dev, Arnd Bergmann
In-Reply-To: <995508C0-6D30-479A-8ED5-C28CC0143DB7@playstation.sony.com>
> > Is this bug really going to be exposed in the wild or is it
> > an early silicon bug that will only bite early-testers?
>
> Is this or any other errata published somewhere? I didn't think they
> were.
I don't know, but I got approval to publically talk about that one (that
is to get a fix in the kernel, the vDSO, and see with Steve Munroe about
getting one in glibc hptiming as well)
> Our solution back at Apple was to put OF properties on the CPU node
> for each optional feature. e.g. for fres and frsqrte we put
> "graphics" since that's the official term for that group of optional
> instructions. We also put in "data-streams" instead of presuming that
> dss, etc. were always part of "altivec". These properties nicely fit
> into our Gestalt() API where "ppcf" had 32 bits to describe these to
> userland software.
Our firmwares do something similar, at least on pSeries (the cell blade
firmware may need a bit of kicking there). But that's only useful for
the kernel. I'm more interested about what is best to expose those to
userland and we have no such thing as good ol' Gestalt there :) We have
AT_HWCAP which we already use for a combination of things, and I was
wondering about the risk of running out of bits in there. Maybe we'll
have to extend the thing a bit.
I suppose the datastream instructions will mandate their own bits,
though nobody on the field seem to use them on linux at least on open
source code I've seen, and I'll probably add a separate bit for the new
altivec instructions. I was wondering if I should define a bit for those
"graphics" instruction and dcbf X form (at least the later could be just
derived from the uArchitecture bits in there)
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH 4/6] Have x86_64 use add_active_range() and free_area_init_nodes
From: Mel Gorman @ 2006-05-23 18:01 UTC (permalink / raw)
To: Andrew Morton
Cc: davej, tony.luck, linux-mm, ak, bob.picco, linux-kernel,
linuxppc-dev
In-Reply-To: <20060520135922.129a481d.akpm@osdl.org>
On Sat, 20 May 2006, Andrew Morton wrote:
> Mel Gorman <mel@csn.ul.ie> wrote:
>>
>>
>> Size zones and holes in an architecture independent manner for x86_64.
>>
>>
>
> I found a .config which triggers the cant-map-acpitables problem.
>
>
> With that .config, and without this patch:
>
> Linux version 2.6.17-rc4-mm2 (akpm@box) (gcc version 4.1.0 20060304 (Red Hat 4.6
> BIOS-provided physical RAM map:
> BIOS-e820: 0000000000000000 - 000000000009fc00 (usable)
> BIOS-e820: 000000000009fc00 - 00000000000a0000 (reserved)
> BIOS-e820: 00000000000e0000 - 0000000000100000 (reserved)
> BIOS-e820: 0000000000100000 - 00000000ca605000 (usable)
> BIOS-e820: 00000000ca605000 - 00000000ca680000 (ACPI NVS)
> BIOS-e820: 00000000ca680000 - 00000000cb5ef000 (usable)
> BIOS-e820: 00000000cb5ef000 - 00000000cb5fc000 (reserved)
> BIOS-e820: 00000000cb5fc000 - 00000000cb6a2000 (usable)
> BIOS-e820: 00000000cb6a2000 - 00000000cb6eb000 (ACPI NVS)
> BIOS-e820: 00000000cb6eb000 - 00000000cb6ef000 (usable)
> BIOS-e820: 00000000cb6ef000 - 00000000cb6ff000 (ACPI data)
> BIOS-e820: 00000000cb6ff000 - 00000000cb700000 (usable)
> BIOS-e820: 00000000cb700000 - 00000000cc000000 (reserved)
> BIOS-e820: 00000000ffe00000 - 0000000100000000 (reserved)
> BIOS-e820: 0000000100000000 - 0000000130000000 (usable)
> DMI 2.4 present.
> ACPI: PM-Timer IO Port: 0x408
> ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
> Processor #0 6:15 APIC version 20
> ACPI: LAPIC (acpi_id[0x02] lapic_id[0x01] enabled)
> Processor #1 6:15 APIC version 20
> ACPI: LAPIC (acpi_id[0x03] lapic_id[0x82] disabled)
> ACPI: LAPIC (acpi_id[0x04] lapic_id[0x83] disabled)
> ACPI: LAPIC_NMI (acpi_id[0x01] dfl dfl lint[0x1])
> ACPI: LAPIC_NMI (acpi_id[0x02] dfl dfl lint[0x1])
> ACPI: IOAPIC (id[0x02] address[0xfec00000] gsi_base[0])
> IOAPIC[0]: apic_id 2, version 32, address 0xfec00000, GSI 0-23
> ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl)
>
>
> With that .config, and with this patch:
>
> Bootdata ok (command line is ro root=LABEL=/ earlyprintk=serial,ttyS0,9600,keep netconsole=4444@192.168.2.4/eth0,5147@192.168.2.33/00:0D:56:C6:C6:CC)
> Linux version 2.6.17-rc4-mm2 (akpm@box) (gcc version 4.1.0 20060304 (Red Hat 4.1.0-3)) #33 SMP Sat May 20 12:08:03 PDT 2006
> BIOS-provided physical RAM map:
> BIOS-e820: 0000000000000000 - 000000000009fc00 (usable)
> BIOS-e820: 000000000009fc00 - 00000000000a0000 (reserved)
> BIOS-e820: 00000000000e0000 - 0000000000100000 (reserved)
> BIOS-e820: 0000000000100000 - 00000000ca605000 (usable)
> BIOS-e820: 00000000ca605000 - 00000000ca680000 (ACPI NVS)
> BIOS-e820: 00000000ca680000 - 00000000cb5ef000 (usable)
> BIOS-e820: 00000000cb5ef000 - 00000000cb5fc000 (reserved)
> BIOS-e820: 00000000cb5fc000 - 00000000cb6a2000 (usable)
> BIOS-e820: 00000000cb6a2000 - 00000000cb6eb000 (ACPI NVS)
> BIOS-e820: 00000000cb6eb000 - 00000000cb6ef000 (usable)
> BIOS-e820: 00000000cb6ef000 - 00000000cb6ff000 (ACPI data)
> BIOS-e820: 00000000cb6ff000 - 00000000cb700000 (usable)
> BIOS-e820: 00000000cb700000 - 00000000cc000000 (reserved)
> BIOS-e820: 00000000ffe00000 - 0000000100000000 (reserved)
> BIOS-e820: 0000000100000000 - 0000000130000000 (usable)
> Too many memory regions, truncating
> Too many memory regions, truncating
> Too many memory regions, truncating
> DMI 2.4 present.
> ACPI: Unable to map RSDT header
> Intel MultiProcessor Specification v1.4
> Virtual Wire compatibility mode.
> OEM ID: Product ID: APIC at: 0xFEE00000
>
I think I have figured out what went wrong here.
arch/i386/kernel/acpi/boot.c has a __acpi_map_table() function which uses
a variable end_pfn_map variable defined in arch/x86_64/kernel/e820.c .
Part of the arch-independent-zone-sizing patch calculates end_pfn_map from
early_node_map[] which only contains information on real RAM regions.
On Christian's machine, there is no usable region after the ACPI table
data so early_node_map[] finishes just before the ACPI tables. This
results in the wrong value for end_pfn_map and the table fails to be
mapped. In Andrew's machines case, the regions got truncated and nothing
after ACPI NVS was recorded, including ACPI data which is why it fails to
boot.
Am not ready to release another set of patches, but I think this was the
cause of magic failures on x86_64.
--
Mel Gorman
Part-time Phd Student Linux Technology Center
University of Limerick IBM Dublin Software Lab
^ permalink raw reply
* Re: Maple: killing a process that causes a machine check exception
From: Linas Vepstas @ 2006-05-23 16:48 UTC (permalink / raw)
To: Anton Blanchard; +Cc: linuxppc64-dev
In-Reply-To: <20060523162348.GC5938@krispykreme>
On Wed, May 24, 2006 at 02:23:48AM +1000, Anton Blanchard wrote:
> jfaslist <jfaslist@yahoo.fr> wrote:
> > What do you mean by synchronous? Do you mean that the current process
> > may no be not the one that caused the ME?
>
> Yeah, a device doing DMA might cause a machine check independent to your
> current task. In that case we really need to take the machine down.
>
> > In my case I _need_ the process to be killed, as it is making a VME bus
> > error. / PCI target-abort.
>
> Sounds like you need a Maple specific machine check handler. My point is
> we cant merge a fix like that because it affects every powerpc arch out
> there, all with different machine check handling requirements.
Here's an utterly crazy idea that might take a lot of work to implement,
but might help with the problem. *If* it can be determined which pci device
caused the error, then it might be possible to reset the PCI device and
restart the device driver.
There is an existing infrastructure for "PCI Error Recovery" (known as
EEH on the pSeries) for detecting and clearing PCI bus errors. On the
pSeries, it depends on a combination of custom hardware PCI bridges and
firmware to isolate the failing device; but maybe on other systems, one
might be able to do "almost" as well.
(See kernel source, Documentation/pci-error-recovery.txt)
--linas
^ permalink raw reply
* Re: Maple: killing a process that causes a machine check exception
From: jfaslist @ 2006-05-23 16:30 UTC (permalink / raw)
To: Anton Blanchard; +Cc: linuxppc64-dev
In-Reply-To: <20060523162348.GC5938@krispykreme>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=us-ascii; format=flowed, Size: 961 bytes --]
>>In my case I _need_ the process to be killed, as it is making a VME bus
>>error. / PCI target-abort.
>>I am starting to get desperate. I have been working for several month
>>with IBM to get a solution on machine check related issues on the Maple.
>>First, the Maple was hanging hard. Now that this is fixed, I need the
>>Linux ME to kill the offending process!
>>My feeling now, is that I am really starting to have it w/ the ppc64!
>>
>>
>
>Sounds like you need a Maple specific machine check handler. My point is
>we cant merge a fix like that because it affects every powerpc arch out
>there, all with different machine check handling requirements.
>
>
>
understood. thanks. sorry for letting out a little steam
-jean-francois simon
___________________________________________________________________________
Yahoo! Mail réinvente le mail ! Découvrez le nouveau Yahoo! Mail et son interface révolutionnaire.
http://fr.mail.yahoo.com
^ permalink raw reply
* Re: Maple: killing a process that causes a machine check exception
From: Anton Blanchard @ 2006-05-23 16:23 UTC (permalink / raw)
To: jfaslist; +Cc: linuxppc64-dev
In-Reply-To: <447333BF.6060306@yahoo.fr>
Hi,
> What do you mean by synchronous? Do you mean that the current process
> may no be not the one that caused the ME?
Yeah, a device doing DMA might cause a machine check independent to your
current task. In that case we really need to take the machine down.
> In my case I _need_ the process to be killed, as it is making a VME bus
> error. / PCI target-abort.
> I am starting to get desperate. I have been working for several month
> with IBM to get a solution on machine check related issues on the Maple.
> First, the Maple was hanging hard. Now that this is fixed, I need the
> Linux ME to kill the offending process!
> My feeling now, is that I am really starting to have it w/ the ppc64!
Sounds like you need a Maple specific machine check handler. My point is
we cant merge a fix like that because it affects every powerpc arch out
there, all with different machine check handling requirements.
Anton
^ permalink raw reply
* Re: Maple: killing a process that causes a machine check exception
From: jfaslist @ 2006-05-23 16:09 UTC (permalink / raw)
To: Anton Blanchard; +Cc: linuxppc64-dev
In-Reply-To: <20060523151541.GB10468@krispykreme>
[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=us-ascii; format=flowed, Size: 1259 bytes --]
Hi,
What do you mean by synchronous? Do you mean that the current process
may no be not the one that caused the ME?
In my case I _need_ the process to be killed, as it is making a VME bus
error. / PCI target-abort.
I am starting to get desperate. I have been working for several month
with IBM to get a solution on machine check related issues on the Maple.
First, the Maple was hanging hard. Now that this is fixed, I need the
Linux ME to kill the offending process!
My feeling now, is that I am really starting to have it w/ the ppc64!
-jfs
Anton Blanchard wrote:
>>By applying the following mods (plse see below), i was able to have a
>>user process that caused a machine check exception to be terminated (on
>>a Maple platform), as expected. I was wondering why the PPC64 had a
>>different ME handling than PPC which does send the SIGBUS to the process?
>>
>>
>
>Not all machine checks are synchronous so we cant always do this. From
>memory the ppc64 version will panic if the machine check wasnt
>synchronous.
>
>Anton
>
>
>
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^ permalink raw reply
* Re: snd-aoa status update / automatic driver loading
From: Sjoerd Simons @ 2006-05-23 15:41 UTC (permalink / raw)
To: Johannes Berg, linuxppc-dev list, debian-powerpc
In-Reply-To: <87wtcirw0y.fsf@briny.internal.ondioline.org>
On Fri, May 19, 2006 at 11:20:29PM +1000, Paul Collins wrote:
> Johannes Berg <johannes@sipsolutions.net> writes:
>
> > On Thu, 2006-05-18 at 10:25 +0300, Eddy Petri??or wrote:
> >
> >> Any chance for 5,2 ? What is needed for it? Codec only?
> >
> > I don't know. If you try loading the modules, the kernel will tell you
> > something about an unhandled layout id. Alternatively, you can find the
> > layout-id file in your /proc/device-tree/ and tell me the number in it.
> > The rest I can figure out.
>
> I have a PowerBook5,4 here and I'd be happy to test support for it.
> The hardware is identified by snd-powermac as "PowerMac Snapper" and
> the layout ID appears to be "3".
I wanted to test on my PowerBook5,2. Uhfortunately i can't find no layout-id
file for the sound device or any other layout-id file for that matter:
$ find /proc/device-tree | grep -i layout
/proc/device-tree/memory@0/ram-layout-architecture
Futhermore one loading the i2sbus module it only gives some information in
dmesg once every two tries ? No errors are shown when there is no output.
Probably not very usefull, but when i get output it shows the following:
i2sbus: mapped i2s control registers
i2sbus: control register contents:
i2sbus: fcr0 = 0x0
i2sbus: cell_control = 0x0
i2sbus: fcr2 = 0xa2caec
i2sbus: fcr3 = 0x0
i2sbus: clock_control = 0x0
i2sbus control destroyed
Sjoerd
--
Life exists for no known purpose.
^ permalink raw reply
* MPC8xx Debugging: function call vs. no function call
From: Josef Angermeier @ 2006-05-23 15:40 UTC (permalink / raw)
To: linuxppc-embedded
Hello,
I am not yet pretty familiar with 8xx system programming, so maybe you
could give me some debugging hint. My C code which programs the the CPM
(USB) has to execute the following commands:
eieio();
usbregs->usb_uscom = 0x80 | 0;
mb();
If i put those instructions in an new function, the CPM behaves as
wished, elsewise it depends on the remaining code. E.g. the number of
NOP machine code instructions before make a difference:
1.)
...< remaining C function code>
__asm__("nop\n\t");
eieio();
usbregs->usb_uscom = 0x80 | 0;
mb();
... <other code>
2.)
...< remaining C function code>
__asm__("nop\n\t");
__asm__("nop\n\t");
eieio();
usbregs->usb_uscom = 0x80 | 0;
mb();
... <other code>
Every hint howto find my mistake is appreciated! Thanks
Josef
^ permalink raw reply
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