* RE: reboot on PQ2FADS board.
From: Liu Dave-r63238 @ 2006-08-18 1:45 UTC (permalink / raw)
To: Zhimin (Jimmy) Liu, linuxppc-embedded
In-Reply-To: <BE82DD0EDDEFDE4CA878520C017D8C6F045BA3CF@eolrexc1.eolcorporate.com>
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Hi Liu,
please try this..
u32 msr;
volatile immap_t *immap = (immap_t *) IMAP_ADDR;
/* Interrupts and MachineCheck off */
__asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
msr &= ~(MSR_ME | MSR_EE);
__asm__ __volatile__ ("mtmsr %0"::"r" (msr));
immap->im_clkrst.car_rmr = 1; /* Checkstop Reset enable */
immap->resxxx = 0; /* please find one immap illegal address
access it, trig reset */
for (;;);
________________________________
From: linuxppc-embedded-bounces+daveliu=freescale.com@ozlabs.org
[mailto:linuxppc-embedded-bounces+daveliu=freescale.com@ozlabs.org] On
Behalf Of Zhimin (Jimmy) Liu
Sent: Friday, August 18, 2006 1:00 AM
To: linuxppc-embedded@ozlabs.org
Subject: reboot on PQ2FADS board.
Did you sovlve the problem? I have same issue for the PQ2FADS
board.
jimmy
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^ permalink raw reply
* [PATCH] Add 85xx DTS files
From: Andy Fleming @ 2006-08-18 1:26 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev
Added the DTS files for the 8540 ADS, and the 8555/41/48 CDS
Signed-of-by: Andy Fleming <afleming@freescale.com>
---
arch/powerpc/boot/dts/mpc8540ads.dts | 250 ++++++++++++++++++++++++++++++
arch/powerpc/boot/dts/mpc8541cds.dts | 244 +++++++++++++++++++++++++++++
arch/powerpc/boot/dts/mpc8548cds.dts | 287 ++++++++++++++++++++++++++++++++++
arch/powerpc/boot/dts/mpc8555cds.dts | 244 +++++++++++++++++++++++++++++
4 files changed, 1025 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
new file mode 100644
index 0000000..88b0ea7
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -0,0 +1,250 @@
+/*
+ * MPC8540 ADS Device Tree Source
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+
+/ {
+ model = "MPC8540ADS";
+ compatible = "MPC85xxADS";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ linux,phandle = <100>;
+
+ cpus {
+ #cpus = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ linux,phandle = <200>;
+
+ PowerPC,8540@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <20>; // 32 bytes
+ i-cache-line-size = <20>; // 32 bytes
+ d-cache-size = <8000>; // L1, 32K
+ i-cache-size = <8000>; // L1, 32K
+ timebase-frequency = <0>; // 33 MHz, from uboot
+ bus-frequency = <0>; // 166 MHz
+ clock-frequency = <0>; // 825 MHz, from uboot
+ 32-bit;
+ linux,phandle = <201>;
+ linux,boot-cpu;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ linux,phandle = <300>;
+ reg = <00000000 08000000>; // 128M at 0x0
+ };
+
+ soc8540@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ device_type = "soc";
+ ranges = <0 e0000000 00100000>;
+ reg = <e0000000 00100000>; // CCSRBAR 1M
+ bus-frequency = <0>;
+
+ i2c@3000 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <3000 100>;
+ interrupts = <1b 2>;
+ interrupt-parent = <40000>;
+ dfsrr;
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "mdio";
+ compatible = "gianfar";
+ reg = <24520 20>;
+ linux,phandle = <24520>;
+ ethernet-phy@0 {
+ linux,phandle = <2452000>;
+ interrupt-parent = <40000>;
+ interrupts = <35 3>;
+ reg = <0>;
+ device_type = "ethernet-phy";
+ };
+ ethernet-phy@1 {
+ linux,phandle = <2452001>;
+ interrupt-parent = <40000>;
+ interrupts = <35 3>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <24000 1000>;
+ local-mac-address = [ 00 E0 0C 00 73 00 ];
+ interrupts = <d 2 e 2 12 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452000>;
+ };
+
+ ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <25000 1000>;
+ local-mac-address = [ 00 E0 0C 00 73 01 ];
+ interrupts = <13 2 14 2 18 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452001>;
+ };
+
+ ethernet@26000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "FEC";
+ compatible = "gianfar";
+ reg = <26000 1000>;
+ local-mac-address = [ 00 E0 0C 00 73 02 ];
+ interrupts = <19 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452001>;
+ };
+
+
+
+ serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4500 100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <1a 2>;
+ interrupt-parent = <40000>;
+ };
+
+ serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4600 100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <1a 2>;
+ interrupt-parent = <40000>;
+ };
+ pci@8000 {
+ linux,phandle = <8000>;
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x02 */
+ 1000 0 0 1 40000 31 1
+ 1000 0 0 2 40000 32 1
+ 1000 0 0 3 40000 33 1
+ 1000 0 0 4 40000 34 1
+
+ /* IDSEL 0x03 */
+ 1800 0 0 1 40000 34 1
+ 1800 0 0 2 40000 31 1
+ 1800 0 0 3 40000 32 1
+ 1800 0 0 4 40000 33 1
+
+ /* IDSEL 0x04 */
+ 2000 0 0 1 40000 33 1
+ 2000 0 0 2 40000 34 1
+ 2000 0 0 3 40000 31 1
+ 2000 0 0 4 40000 32 1
+
+ /* IDSEL 0x05 */
+ 2800 0 0 1 40000 32 1
+ 2800 0 0 2 40000 33 1
+ 2800 0 0 3 40000 34 1
+ 2800 0 0 4 40000 31 1
+
+ /* IDSEL 0x0c */
+ 6000 0 0 1 40000 31 1
+ 6000 0 0 2 40000 32 1
+ 6000 0 0 3 40000 33 1
+ 6000 0 0 4 40000 34 1
+
+ /* IDSEL 0x0d */
+ 6800 0 0 1 40000 34 1
+ 6800 0 0 2 40000 31 1
+ 6800 0 0 3 40000 32 1
+ 6800 0 0 4 40000 33 1
+
+ /* IDSEL 0x0e */
+ 7000 0 0 1 40000 33 1
+ 7000 0 0 2 40000 34 1
+ 7000 0 0 3 40000 31 1
+ 7000 0 0 4 40000 32 1
+
+ /* IDSEL 0x0f */
+ 7800 0 0 1 40000 32 1
+ 7800 0 0 2 40000 33 1
+ 7800 0 0 3 40000 34 1
+ 7800 0 0 4 40000 31 1
+
+ /* IDSEL 0x12 */
+ 9000 0 0 1 40000 31 1
+ 9000 0 0 2 40000 32 1
+ 9000 0 0 3 40000 33 1
+ 9000 0 0 4 40000 34 1
+
+ /* IDSEL 0x13 */
+ 9800 0 0 1 40000 34 1
+ 9800 0 0 2 40000 31 1
+ 9800 0 0 3 40000 32 1
+ 9800 0 0 4 40000 33 1
+
+ /* IDSEL 0x14 */
+ a000 0 0 1 40000 33 1
+ a000 0 0 2 40000 34 1
+ a000 0 0 3 40000 31 1
+ a000 0 0 4 40000 32 1
+
+ /* IDSEL 0x15 */
+ a800 0 0 1 40000 32 1
+ a800 0 0 2 40000 33 1
+ a800 0 0 3 40000 34 1
+ a800 0 0 4 40000 31 1>;
+ interrupt-parent = <40000>;
+ interrupts = <08 3>;
+ bus-range = <0 0>;
+ ranges = <02000000 0 80000000 80000000 0 20000000
+ 01000000 0 00000000 e2000000 0 00100000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <8000 1000>;
+ compatible = "85xx";
+ device_type = "pci";
+ };
+
+ pic@40000 {
+ linux,phandle = <40000>;
+ clock-frequency = <0>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <40000 40000>;
+ built-in;
+ compatible = "chrp,open-pic";
+ device_type = "open-pic";
+ big-endian;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
new file mode 100644
index 0000000..d526397
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -0,0 +1,244 @@
+/*
+ * MPC8541 CDS Device Tree Source
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+
+/ {
+ model = "MPC8541CDS";
+ compatible = "MPC85xxCDS";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ linux,phandle = <100>;
+
+ cpus {
+ #cpus = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ linux,phandle = <200>;
+
+ PowerPC,8541@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <20>; // 32 bytes
+ i-cache-line-size = <20>; // 32 bytes
+ d-cache-size = <8000>; // L1, 32K
+ i-cache-size = <8000>; // L1, 32K
+ timebase-frequency = <0>; // 33 MHz, from uboot
+ bus-frequency = <0>; // 166 MHz
+ clock-frequency = <0>; // 825 MHz, from uboot
+ 32-bit;
+ linux,phandle = <201>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ linux,phandle = <300>;
+ reg = <00000000 08000000>; // 128M at 0x0
+ };
+
+ soc8541@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ device_type = "soc";
+ ranges = <0 e0000000 00100000>;
+ reg = <e0000000 00100000>; // CCSRBAR 1M
+ bus-frequency = <0>;
+
+ i2c@3000 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <3000 100>;
+ interrupts = <1b 2>;
+ interrupt-parent = <40000>;
+ dfsrr;
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "mdio";
+ compatible = "gianfar";
+ reg = <24520 20>;
+ linux,phandle = <24520>;
+ ethernet-phy@0 {
+ linux,phandle = <2452000>;
+ interrupt-parent = <40000>;
+ interrupts = <35 0>;
+ reg = <0>;
+ device_type = "ethernet-phy";
+ };
+ ethernet-phy@1 {
+ linux,phandle = <2452001>;
+ interrupt-parent = <40000>;
+ interrupts = <35 0>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <24000 1000>;
+ local-mac-address = [ 00 E0 0C 00 73 00 ];
+ interrupts = <d 2 e 2 12 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452000>;
+ };
+
+ ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <25000 1000>;
+ local-mac-address = [ 00 E0 0C 00 73 01 ];
+ interrupts = <13 2 14 2 18 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452001>;
+ };
+
+ serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4500 100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <1a 2>;
+ interrupt-parent = <40000>;
+ };
+
+ serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4600 100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <1a 2>;
+ interrupt-parent = <40000>;
+ };
+
+ pci@8000 {
+ linux,phandle = <8000>;
+ interrupt-map-mask = <1f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x10 */
+ 08000 0 0 1 40000 30 1
+ 08000 0 0 2 40000 31 1
+ 08000 0 0 3 40000 32 1
+ 08000 0 0 4 40000 33 1
+
+ /* IDSEL 0x11 */
+ 08800 0 0 1 40000 30 1
+ 08800 0 0 2 40000 31 1
+ 08800 0 0 3 40000 32 1
+ 08800 0 0 4 40000 33 1
+
+ /* IDSEL 0x12 (Slot 1) */
+ 09000 0 0 1 40000 30 1
+ 09000 0 0 2 40000 31 1
+ 09000 0 0 3 40000 32 1
+ 09000 0 0 4 40000 33 1
+
+ /* IDSEL 0x13 (Slot 2) */
+ 09800 0 0 1 40000 31 1
+ 09800 0 0 2 40000 32 1
+ 09800 0 0 3 40000 33 1
+ 09800 0 0 4 40000 30 1
+
+ /* IDSEL 0x14 (Slot 3) */
+ 0a000 0 0 1 40000 32 1
+ 0a000 0 0 2 40000 33 1
+ 0a000 0 0 3 40000 30 1
+ 0a000 0 0 4 40000 31 1
+
+ /* IDSEL 0x15 (Slot 4) */
+ 0a800 0 0 1 40000 33 1
+ 0a800 0 0 2 40000 30 1
+ 0a800 0 0 3 40000 31 1
+ 0a800 0 0 4 40000 32 1
+
+ /* Bus 1 (Tundra Bridge) */
+ /* IDSEL 0x12 (ISA bridge) */
+ 19000 0 0 1 40000 30 1
+ 19000 0 0 2 40000 31 1
+ 19000 0 0 3 40000 32 1
+ 19000 0 0 4 40000 33 1>;
+ interrupt-parent = <40000>;
+ interrupts = <08 2>;
+ bus-range = <0 0>;
+ ranges = <02000000 0 80000000 80000000 0 20000000
+ 01000000 0 00000000 e2000000 0 00100000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <8000 1000>;
+ compatible = "85xx";
+ device_type = "pci";
+
+ i8259@19000 {
+ clock-frequency = <0>;
+ interrupt-controller;
+ device_type = "interrupt-controller";
+ reg = <19000 0 0 0 1>;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ built-in;
+ compatible = "chrp,iic";
+ big-endian;
+ interrupts = <1>;
+ interrupt-parent = <8000>;
+ };
+ };
+
+ pci@9000 {
+ linux,phandle = <9000>;
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x15 */
+ a800 0 0 1 40000 3b 1
+ a800 0 0 2 40000 3b 1
+ a800 0 0 3 40000 3b 1
+ a800 0 0 4 40000 3b 1>;
+ interrupt-parent = <40000>;
+ interrupts = <09 2>;
+ bus-range = <0 0>;
+ ranges = <02000000 0 a0000000 a0000000 0 20000000
+ 01000000 0 00000000 e3000000 0 00100000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <9000 1000>;
+ compatible = "85xx";
+ device_type = "pci";
+ };
+
+ pic@40000 {
+ linux,phandle = <40000>;
+ clock-frequency = <0>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <40000 40000>;
+ built-in;
+ compatible = "chrp,open-pic";
+ device_type = "open-pic";
+ big-endian;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
new file mode 100644
index 0000000..ec1446a
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -0,0 +1,287 @@
+/*
+ * MPC8555 CDS Device Tree Source
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+
+/ {
+ model = "MPC8548CDS";
+ compatible = "MPC85xxCDS";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ linux,phandle = <100>;
+
+ cpus {
+ #cpus = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ linux,phandle = <200>;
+
+ PowerPC,8548@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <20>; // 32 bytes
+ i-cache-line-size = <20>; // 32 bytes
+ d-cache-size = <8000>; // L1, 32K
+ i-cache-size = <8000>; // L1, 32K
+ timebase-frequency = <0>; // 33 MHz, from uboot
+ bus-frequency = <0>; // 166 MHz
+ clock-frequency = <0>; // 825 MHz, from uboot
+ 32-bit;
+ linux,phandle = <201>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ linux,phandle = <300>;
+ reg = <00000000 08000000>; // 128M at 0x0
+ };
+
+ soc8548@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ device_type = "soc";
+ ranges = <0 e0000000 00100000>;
+ reg = <e0000000 00100000>; // CCSRBAR 1M
+ bus-frequency = <0>;
+
+ i2c@3000 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <3000 100>;
+ interrupts = <1b 2>;
+ interrupt-parent = <40000>;
+ dfsrr;
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "mdio";
+ compatible = "gianfar";
+ reg = <24520 20>;
+ linux,phandle = <24520>;
+ ethernet-phy@0 {
+ linux,phandle = <2452000>;
+ interrupt-parent = <40000>;
+ interrupts = <35 0>;
+ reg = <0>;
+ device_type = "ethernet-phy";
+ };
+ ethernet-phy@1 {
+ linux,phandle = <2452001>;
+ interrupt-parent = <40000>;
+ interrupts = <35 0>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+
+ ethernet-phy@2 {
+ linux,phandle = <2452002>;
+ interrupt-parent = <40000>;
+ interrupts = <35 0>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ ethernet-phy@3 {
+ linux,phandle = <2452003>;
+ interrupt-parent = <40000>;
+ interrupts = <35 0>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <24000 1000>;
+ local-mac-address = [ 00 E0 0C 00 73 00 ];
+ interrupts = <d 2 e 2 12 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452000>;
+ };
+
+ ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <25000 1000>;
+ local-mac-address = [ 00 E0 0C 00 73 01 ];
+ interrupts = <13 2 14 2 18 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452001>;
+ };
+
+ ethernet@26000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <26000 1000>;
+ local-mac-address = [ 00 E0 0C 00 73 02 ];
+ interrupts = <f 2 10 2 11 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452001>;
+ };
+
+/* eTSEC 4 is currently broken
+ ethernet@27000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <27000 1000>;
+ local-mac-address = [ 00 E0 0C 00 73 03 ];
+ interrupts = <15 2 16 2 17 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452001>;
+ };
+ */
+
+ serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4500 100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <1a 2>;
+ interrupt-parent = <40000>;
+ };
+
+ serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4600 100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <1a 2>;
+ interrupt-parent = <40000>;
+ };
+
+ pci@8000 {
+ linux,phandle = <8000>;
+ interrupt-map-mask = <1f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x10 */
+ 08000 0 0 1 40000 30 1
+ 08000 0 0 2 40000 31 1
+ 08000 0 0 3 40000 32 1
+ 08000 0 0 4 40000 33 1
+
+ /* IDSEL 0x11 */
+ 08800 0 0 1 40000 30 1
+ 08800 0 0 2 40000 31 1
+ 08800 0 0 3 40000 32 1
+ 08800 0 0 4 40000 33 1
+
+ /* IDSEL 0x12 (Slot 1) */
+ 09000 0 0 1 40000 30 1
+ 09000 0 0 2 40000 31 1
+ 09000 0 0 3 40000 32 1
+ 09000 0 0 4 40000 33 1
+
+ /* IDSEL 0x13 (Slot 2) */
+ 09800 0 0 1 40000 31 1
+ 09800 0 0 2 40000 32 1
+ 09800 0 0 3 40000 33 1
+ 09800 0 0 4 40000 30 1
+
+ /* IDSEL 0x14 (Slot 3) */
+ 0a000 0 0 1 40000 32 1
+ 0a000 0 0 2 40000 33 1
+ 0a000 0 0 3 40000 30 1
+ 0a000 0 0 4 40000 31 1
+
+ /* IDSEL 0x15 (Slot 4) */
+ 0a800 0 0 1 40000 33 1
+ 0a800 0 0 2 40000 30 1
+ 0a800 0 0 3 40000 31 1
+ 0a800 0 0 4 40000 32 1
+
+ /* Bus 1 (Tundra Bridge) */
+ /* IDSEL 0x12 (ISA bridge) */
+ 19000 0 0 1 40000 30 1
+ 19000 0 0 2 40000 31 1
+ 19000 0 0 3 40000 32 1
+ 19000 0 0 4 40000 33 1>;
+ interrupt-parent = <40000>;
+ interrupts = <08 2>;
+ bus-range = <0 0>;
+ ranges = <02000000 0 80000000 80000000 0 20000000
+ 01000000 0 00000000 e2000000 0 00100000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <8000 1000>;
+ compatible = "85xx";
+ device_type = "pci";
+
+ i8259@19000 {
+ clock-frequency = <0>;
+ interrupt-controller;
+ device_type = "interrupt-controller";
+ reg = <19000 0 0 0 1>;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ built-in;
+ compatible = "chrp,iic";
+ big-endian;
+ interrupts = <1>;
+ interrupt-parent = <8000>;
+ };
+ };
+
+ pci@9000 {
+ linux,phandle = <9000>;
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x15 */
+ a800 0 0 1 40000 3b 1
+ a800 0 0 2 40000 3b 1
+ a800 0 0 3 40000 3b 1
+ a800 0 0 4 40000 3b 1>;
+ interrupt-parent = <40000>;
+ interrupts = <09 2>;
+ bus-range = <0 0>;
+ ranges = <02000000 0 a0000000 a0000000 0 20000000
+ 01000000 0 00000000 e3000000 0 00100000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <9000 1000>;
+ compatible = "85xx";
+ device_type = "pci";
+ };
+
+ pic@40000 {
+ linux,phandle = <40000>;
+ clock-frequency = <0>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <40000 40000>;
+ built-in;
+ compatible = "chrp,open-pic";
+ device_type = "open-pic";
+ big-endian;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
new file mode 100644
index 0000000..71fea14
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -0,0 +1,244 @@
+/*
+ * MPC8555 CDS Device Tree Source
+ *
+ * Copyright 2006 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+
+/ {
+ model = "MPC8555CDS";
+ compatible = "MPC85xxCDS";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ linux,phandle = <100>;
+
+ cpus {
+ #cpus = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ linux,phandle = <200>;
+
+ PowerPC,8555@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <20>; // 32 bytes
+ i-cache-line-size = <20>; // 32 bytes
+ d-cache-size = <8000>; // L1, 32K
+ i-cache-size = <8000>; // L1, 32K
+ timebase-frequency = <0>; // 33 MHz, from uboot
+ bus-frequency = <0>; // 166 MHz
+ clock-frequency = <0>; // 825 MHz, from uboot
+ 32-bit;
+ linux,phandle = <201>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ linux,phandle = <300>;
+ reg = <00000000 08000000>; // 128M at 0x0
+ };
+
+ soc8555@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ device_type = "soc";
+ ranges = <0 e0000000 00100000>;
+ reg = <e0000000 00100000>; // CCSRBAR 1M
+ bus-frequency = <0>;
+
+ i2c@3000 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ reg = <3000 100>;
+ interrupts = <1b 2>;
+ interrupt-parent = <40000>;
+ dfsrr;
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "mdio";
+ compatible = "gianfar";
+ reg = <24520 20>;
+ linux,phandle = <24520>;
+ ethernet-phy@0 {
+ linux,phandle = <2452000>;
+ interrupt-parent = <40000>;
+ interrupts = <35 0>;
+ reg = <0>;
+ device_type = "ethernet-phy";
+ };
+ ethernet-phy@1 {
+ linux,phandle = <2452001>;
+ interrupt-parent = <40000>;
+ interrupts = <35 0>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <24000 1000>;
+ local-mac-address = [ 00 E0 0C 00 73 00 ];
+ interrupts = <0d 2 0e 2 12 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452000>;
+ };
+
+ ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <25000 1000>;
+ local-mac-address = [ 00 E0 0C 00 73 01 ];
+ interrupts = <13 2 14 2 18 2>;
+ interrupt-parent = <40000>;
+ phy-handle = <2452001>;
+ };
+
+ serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4500 100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <1a 2>;
+ interrupt-parent = <40000>;
+ };
+
+ serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4600 100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <1a 2>;
+ interrupt-parent = <40000>;
+ };
+
+ pci@8000 {
+ linux,phandle = <8000>;
+ interrupt-map-mask = <1f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x10 */
+ 08000 0 0 1 40000 30 1
+ 08000 0 0 2 40000 31 1
+ 08000 0 0 3 40000 32 1
+ 08000 0 0 4 40000 33 1
+
+ /* IDSEL 0x11 */
+ 08800 0 0 1 40000 30 1
+ 08800 0 0 2 40000 31 1
+ 08800 0 0 3 40000 32 1
+ 08800 0 0 4 40000 33 1
+
+ /* IDSEL 0x12 (Slot 1) */
+ 09000 0 0 1 40000 30 1
+ 09000 0 0 2 40000 31 1
+ 09000 0 0 3 40000 32 1
+ 09000 0 0 4 40000 33 1
+
+ /* IDSEL 0x13 (Slot 2) */
+ 09800 0 0 1 40000 31 1
+ 09800 0 0 2 40000 32 1
+ 09800 0 0 3 40000 33 1
+ 09800 0 0 4 40000 30 1
+
+ /* IDSEL 0x14 (Slot 3) */
+ 0a000 0 0 1 40000 32 1
+ 0a000 0 0 2 40000 33 1
+ 0a000 0 0 3 40000 30 1
+ 0a000 0 0 4 40000 31 1
+
+ /* IDSEL 0x15 (Slot 4) */
+ 0a800 0 0 1 40000 33 1
+ 0a800 0 0 2 40000 30 1
+ 0a800 0 0 3 40000 31 1
+ 0a800 0 0 4 40000 32 1
+
+ /* Bus 1 (Tundra Bridge) */
+ /* IDSEL 0x12 (ISA bridge) */
+ 19000 0 0 1 40000 30 1
+ 19000 0 0 2 40000 31 1
+ 19000 0 0 3 40000 32 1
+ 19000 0 0 4 40000 33 1>;
+ interrupt-parent = <40000>;
+ interrupts = <08 2>;
+ bus-range = <0 0>;
+ ranges = <02000000 0 80000000 80000000 0 20000000
+ 01000000 0 00000000 e2000000 0 00100000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <8000 1000>;
+ compatible = "85xx";
+ device_type = "pci";
+
+ i8259@19000 {
+ clock-frequency = <0>;
+ interrupt-controller;
+ device_type = "interrupt-controller";
+ reg = <19000 0 0 0 1>;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ built-in;
+ compatible = "chrp,iic";
+ big-endian;
+ interrupts = <1>;
+ interrupt-parent = <8000>;
+ };
+ };
+
+ pci@9000 {
+ linux,phandle = <9000>;
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x15 */
+ a800 0 0 1 40000 3b 1
+ a800 0 0 2 40000 3b 1
+ a800 0 0 3 40000 3b 1
+ a800 0 0 4 40000 3b 1>;
+ interrupt-parent = <40000>;
+ interrupts = <09 2>;
+ bus-range = <0 0>;
+ ranges = <02000000 0 a0000000 a0000000 0 20000000
+ 01000000 0 00000000 e3000000 0 00100000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <9000 1000>;
+ compatible = "85xx";
+ device_type = "pci";
+ };
+
+ pic@40000 {
+ linux,phandle = <40000>;
+ clock-frequency = <0>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <40000 40000>;
+ built-in;
+ compatible = "chrp,open-pic";
+ device_type = "open-pic";
+ big-endian;
+ };
+ };
+};
--
2006_06_07.01.gittree_pull-dirty
^ permalink raw reply related
* [PATCH] Fix CDS IRQ handling and PCI code
From: Andy Fleming @ 2006-08-18 1:24 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev
* Fix IRQ support in the 85xx CDS boards so it uses the new
generic stuff
* Fix PCI IRQ mapping to use the device tree
* Disabled i8259 support to allow the CDS to boot. This will be
fixed soon, but the current code doesn't even compile, so this
is a vast improvement
Signed-off-by: Andy Fleming <afleming@freescale.com>
---
This patch *also* really needs to go in for 2.6.18.
Thanks,
Andy
arch/powerpc/platforms/85xx/Kconfig | 1
arch/powerpc/platforms/85xx/mpc85xx_cds.c | 210 ++++++++++++-----------------
2 files changed, 88 insertions(+), 123 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 454fc53..c3268d9 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -14,7 +14,6 @@ config MPC8540_ADS
config MPC85xx_CDS
bool "Freescale MPC85xx CDS"
select DEFAULT_UIMAGE
- select PPC_I8259 if PCI
help
This option enables support for the MPC85xx CDS board
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 5fd53eb..c9c7ffc 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -57,94 +57,8 @@ #endif
static int cds_pci_slot = 2;
static volatile u8 *cadmus;
-/*
- * Internal interrupts are all Level Sensitive, and Positive Polarity
- *
- * Note: Likely, this table and the following function should be
- * obtained and derived from the OF Device Tree.
- */
-static u_char mpc85xx_cds_openpic_initsenses[] __initdata = {
- MPC85XX_INTERNAL_IRQ_SENSES,
-#if defined(CONFIG_PCI)
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Ext 0: PCI slot 0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 1: PCI slot 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 2: PCI slot 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 3: PCI slot 3 */
-#else
- 0x0, /* External 0: */
- 0x0, /* External 1: */
- 0x0, /* External 2: */
- 0x0, /* External 3: */
-#endif
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */
- 0x0, /* External 6: */
- 0x0, /* External 7: */
- 0x0, /* External 8: */
- 0x0, /* External 9: */
- 0x0, /* External 10: */
-#ifdef CONFIG_PCI
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 11: PCI2 slot 0 */
-#else
- 0x0, /* External 11: */
-#endif
-};
-
#ifdef CONFIG_PCI
-/*
- * interrupt routing
- */
-int
-mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
-
- if (!hose->index)
- {
- /* Handle PCI1 interrupts */
- char pci_irq_table[][4] =
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
-
- /* Note IRQ assignment for slots is based on which slot the elysium is
- * in -- in this setup elysium is in slot #2 (this PIRQA as first
- * interrupt on slot */
- {
- { 0, 1, 2, 3 }, /* 16 - PMC */
- { 0, 1, 2, 3 }, /* 17 P2P (Tsi320) */
- { 0, 1, 2, 3 }, /* 18 - Slot 1 */
- { 1, 2, 3, 0 }, /* 19 - Slot 2 */
- { 2, 3, 0, 1 }, /* 20 - Slot 3 */
- { 3, 0, 1, 2 }, /* 21 - Slot 4 */
- };
-
- const long min_idsel = 16, max_idsel = 21, irqs_per_slot = 4;
- int i, j;
-
- for (i = 0; i < 6; i++)
- for (j = 0; j < 4; j++)
- pci_irq_table[i][j] =
- ((pci_irq_table[i][j] + 5 -
- cds_pci_slot) & 0x3) + PIRQ0A;
-
- return PCI_IRQ_TABLE_LOOKUP;
- } else {
- /* Handle PCI2 interrupts (if we have one) */
- char pci_irq_table[][4] =
- {
- /*
- * We only have one slot and one interrupt
- * going to PIRQA - PIRQD */
- { PIRQ1A, PIRQ1A, PIRQ1A, PIRQ1A }, /* 21 - slot 0 */
- };
-
- const long min_idsel = 21, max_idsel = 21, irqs_per_slot = 4;
-
- return PCI_IRQ_TABLE_LOOKUP;
- }
-}
#define ARCADIA_HOST_BRIDGE_IDSEL 17
#define ARCADIA_2ND_BRIDGE_IDSEL 3
@@ -210,50 +124,104 @@ mpc85xx_cds_pcibios_fixup(void)
pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
pci_dev_put(dev);
}
+
+ /* Now map all the PCI irqs */
+ dev = NULL;
+ for_each_pci_dev(dev)
+ pci_read_irq_line(dev);
+}
+
+#ifdef CONFIG_PPC_I8259
+#warning The i8259 PIC support is currently broken
+static void mpc85xx_8259_cascade(unsigned int irq, struct
+ irq_desc *desc, struct pt_regs *regs)
+{
+ unsigned int cascade_irq = i8259_irq(regs);
+
+ if (cascade_irq != NO_IRQ)
+ generic_handle_irq(cascade_irq, regs);
+
+ desc->chip->eoi(irq);
}
+#endif /* PPC_I8259 */
#endif /* CONFIG_PCI */
void __init mpc85xx_cds_pic_init(void)
{
- struct mpic *mpic1;
- phys_addr_t OpenPIC_PAddr;
+ struct mpic *mpic;
+ struct resource r;
+ struct device_node *np = NULL;
+ struct device_node *cascade_node = NULL;
+ int cascade_irq;
- /* Determine the Physical Address of the OpenPIC regs */
- OpenPIC_PAddr = get_immrbase() + MPC85xx_OPENPIC_OFFSET;
+ np = of_find_node_by_type(np, "open-pic");
+
+ if (np == NULL) {
+ printk(KERN_ERR "Could not find open-pic node\n");
+ return;
+ }
- mpic1 = mpic_alloc(OpenPIC_PAddr,
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_ERR "Failed to map mpic register space\n");
+ of_node_put(np);
+ return;
+ }
+
+ mpic = mpic_alloc(np, r.start,
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
- 4, MPC85xx_OPENPIC_IRQ_OFFSET, 0, 250,
- mpc85xx_cds_openpic_initsenses,
- sizeof(mpc85xx_cds_openpic_initsenses), " OpenPIC ");
- BUG_ON(mpic1 == NULL);
- mpic_assign_isu(mpic1, 0, OpenPIC_PAddr + 0x10200);
- mpic_assign_isu(mpic1, 1, OpenPIC_PAddr + 0x10280);
- mpic_assign_isu(mpic1, 2, OpenPIC_PAddr + 0x10300);
- mpic_assign_isu(mpic1, 3, OpenPIC_PAddr + 0x10380);
- mpic_assign_isu(mpic1, 4, OpenPIC_PAddr + 0x10400);
- mpic_assign_isu(mpic1, 5, OpenPIC_PAddr + 0x10480);
- mpic_assign_isu(mpic1, 6, OpenPIC_PAddr + 0x10500);
- mpic_assign_isu(mpic1, 7, OpenPIC_PAddr + 0x10580);
-
- /* dummy mappings to get to 48 */
- mpic_assign_isu(mpic1, 8, OpenPIC_PAddr + 0x10600);
- mpic_assign_isu(mpic1, 9, OpenPIC_PAddr + 0x10680);
- mpic_assign_isu(mpic1, 10, OpenPIC_PAddr + 0x10700);
- mpic_assign_isu(mpic1, 11, OpenPIC_PAddr + 0x10780);
-
- /* External ints */
- mpic_assign_isu(mpic1, 12, OpenPIC_PAddr + 0x10000);
- mpic_assign_isu(mpic1, 13, OpenPIC_PAddr + 0x10080);
- mpic_assign_isu(mpic1, 14, OpenPIC_PAddr + 0x10100);
-
- mpic_init(mpic1);
+ 4, 0, " OpenPIC ");
+ BUG_ON(mpic == NULL);
+
+ /* Return the mpic node */
+ of_node_put(np);
+
+ mpic_assign_isu(mpic, 0, r.start + 0x10200);
+ mpic_assign_isu(mpic, 1, r.start + 0x10280);
+ mpic_assign_isu(mpic, 2, r.start + 0x10300);
+ mpic_assign_isu(mpic, 3, r.start + 0x10380);
+ mpic_assign_isu(mpic, 4, r.start + 0x10400);
+ mpic_assign_isu(mpic, 5, r.start + 0x10480);
+ mpic_assign_isu(mpic, 6, r.start + 0x10500);
+ mpic_assign_isu(mpic, 7, r.start + 0x10580);
+
+ /* Used only for 8548 so far, but no harm in
+ * allocating them for everyone */
+ mpic_assign_isu(mpic, 8, r.start + 0x10600);
+ mpic_assign_isu(mpic, 9, r.start + 0x10680);
+ mpic_assign_isu(mpic, 10, r.start + 0x10700);
+ mpic_assign_isu(mpic, 11, r.start + 0x10780);
+
+ /* External Interrupts */
+ mpic_assign_isu(mpic, 12, r.start + 0x10000);
+ mpic_assign_isu(mpic, 13, r.start + 0x10080);
+ mpic_assign_isu(mpic, 14, r.start + 0x10100);
+
+ mpic_init(mpic);
+
+#ifdef CONFIG_PPC_I8259
+ /* Initialize the i8259 controller */
+ for_each_node_by_type(np, "interrupt-controller")
+ if (device_is_compatible(np, "chrp,iic")) {
+ cascade_node = np;
+ break;
+ }
+
+ if (cascade_node == NULL) {
+ printk(KERN_DEBUG "Could not find i8259 PIC\n");
+ return;
+ }
-#ifdef CONFIG_PCI
- mpic_setup_cascade(PIRQ0A, i8259_irq_cascade, NULL);
+ cascade_irq = irq_of_parse_and_map(cascade_node, 0);
+ if (cascade_irq == NO_IRQ) {
+ printk(KERN_ERR "Failed to map cascade interrupt\n");
+ return;
+ }
- i8259_init(0,0);
-#endif
+ i8259_init(cascade_node, 0);
+ of_node_put(cascade_node);
+
+ set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade);
+#endif /* CONFIG_PPC_I8259 */
}
@@ -298,8 +266,6 @@ #ifdef CONFIG_PCI
add_bridge(np);
ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup;
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = mpc85xx_map_irq;
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
#endif
--
2006_06_07.01.gittree_pull-dirty
^ permalink raw reply related
* [PATCH] Fix IRQ handling on MPC8540 ADS
From: Andy Fleming @ 2006-08-18 1:22 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev
* Fixed IRQ handling for the 85xx ADS boards so it uses the new
generic irq stuff
* Fixed PCI IRQ mapping so it comes from the device tree
Signed-off-by: Andy Fleming <afleming@freescale.com>
---
This patch *really* needs to go in before 2.6.18 is final, else 2.6.18
doesn't build for 85xx.
Thanks,
Andy
arch/powerpc/platforms/85xx/mpc85xx_ads.c | 162 ++++++++++-------------------
1 files changed, 55 insertions(+), 107 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index d0cfcdb..6223409 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -37,79 +37,7 @@ unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
#endif
-/*
- * Internal interrupts are all Level Sensitive, and Positive Polarity
- *
- * Note: Likely, this table and the following function should be
- * obtained and derived from the OF Device Tree.
- */
-static u_char mpc85xx_ads_openpic_initsenses[] __initdata = {
- MPC85XX_INTERNAL_IRQ_SENSES,
- 0x0, /* External 0: */
-#if defined(CONFIG_PCI)
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 1: PCI slot 0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 2: PCI slot 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 3: PCI slot 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* Ext 4: PCI slot 3 */
-#else
- 0x0, /* External 1: */
- 0x0, /* External 2: */
- 0x0, /* External 3: */
- 0x0, /* External 4: */
-#endif
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */
- 0x0, /* External 6: */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */
- 0x0, /* External 8: */
- 0x0, /* External 9: */
- 0x0, /* External 10: */
- 0x0, /* External 11: */
-};
-
#ifdef CONFIG_PCI
-/*
- * interrupt routing
- */
-
-int
-mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
-{
- static char pci_irq_table[][4] =
- /*
- * This is little evil, but works around the fact
- * that revA boards have IDSEL starting at 18
- * and others boards (older) start at 12
- *
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {
- {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 2 */
- {PIRQD, PIRQA, PIRQB, PIRQC},
- {PIRQC, PIRQD, PIRQA, PIRQB},
- {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 5 */
- {0, 0, 0, 0}, /* -- */
- {0, 0, 0, 0}, /* -- */
- {0, 0, 0, 0}, /* -- */
- {0, 0, 0, 0}, /* -- */
- {0, 0, 0, 0}, /* -- */
- {0, 0, 0, 0}, /* -- */
- {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 12 */
- {PIRQD, PIRQA, PIRQB, PIRQC},
- {PIRQC, PIRQD, PIRQA, PIRQB},
- {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 15 */
- {0, 0, 0, 0}, /* -- */
- {0, 0, 0, 0}, /* -- */
- {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 18 */
- {PIRQD, PIRQA, PIRQB, PIRQC},
- {PIRQC, PIRQD, PIRQA, PIRQB},
- {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 21 */
- };
-
- const long min_idsel = 2, max_idsel = 21, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP;
-}
-
int
mpc85xx_exclude_device(u_char bus, u_char devfn)
{
@@ -119,44 +47,63 @@ mpc85xx_exclude_device(u_char bus, u_cha
return PCIBIOS_SUCCESSFUL;
}
+void __init
+mpc85xx_pcibios_fixup(void)
+{
+ struct pci_dev *dev = NULL;
+
+ for_each_pci_dev(dev)
+ pci_read_irq_line(dev);
+}
#endif /* CONFIG_PCI */
void __init mpc85xx_ads_pic_init(void)
{
- struct mpic *mpic1;
- phys_addr_t OpenPIC_PAddr;
-
- /* Determine the Physical Address of the OpenPIC regs */
- OpenPIC_PAddr = get_immrbase() + MPC85xx_OPENPIC_OFFSET;
-
- mpic1 = mpic_alloc(OpenPIC_PAddr,
- MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
- 4, MPC85xx_OPENPIC_IRQ_OFFSET, 0, 250,
- mpc85xx_ads_openpic_initsenses,
- sizeof(mpc85xx_ads_openpic_initsenses),
- " OpenPIC ");
- BUG_ON(mpic1 == NULL);
- mpic_assign_isu(mpic1, 0, OpenPIC_PAddr + 0x10200);
- mpic_assign_isu(mpic1, 1, OpenPIC_PAddr + 0x10280);
- mpic_assign_isu(mpic1, 2, OpenPIC_PAddr + 0x10300);
- mpic_assign_isu(mpic1, 3, OpenPIC_PAddr + 0x10380);
- mpic_assign_isu(mpic1, 4, OpenPIC_PAddr + 0x10400);
- mpic_assign_isu(mpic1, 5, OpenPIC_PAddr + 0x10480);
- mpic_assign_isu(mpic1, 6, OpenPIC_PAddr + 0x10500);
- mpic_assign_isu(mpic1, 7, OpenPIC_PAddr + 0x10580);
-
- /* dummy mappings to get to 48 */
- mpic_assign_isu(mpic1, 8, OpenPIC_PAddr + 0x10600);
- mpic_assign_isu(mpic1, 9, OpenPIC_PAddr + 0x10680);
- mpic_assign_isu(mpic1, 10, OpenPIC_PAddr + 0x10700);
- mpic_assign_isu(mpic1, 11, OpenPIC_PAddr + 0x10780);
-
- /* External ints */
- mpic_assign_isu(mpic1, 12, OpenPIC_PAddr + 0x10000);
- mpic_assign_isu(mpic1, 13, OpenPIC_PAddr + 0x10080);
- mpic_assign_isu(mpic1, 14, OpenPIC_PAddr + 0x10100);
- mpic_init(mpic1);
+ struct mpic *mpic;
+ struct resource r;
+ struct device_node *np = NULL;
+
+ np = of_find_node_by_type(np, "open-pic");
+
+ if (np == NULL) {
+ printk(KERN_ERR "Could not find open-pic node\n");
+ return;
+ }
+
+ if(of_address_to_resource(np, 0, &r)) {
+ printk(KERN_ERR "Could not map mpic register space\n");
+ of_put_node(np);
+ return;
+ }
+
+ mpic = mpic_alloc(np, r.start,
+ MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+ 4, 0, " OpenPIC ");
+ BUG_ON(mpic == NULL);
+ of_put_node(np);
+
+ mpic_assign_isu(mpic, 0, r.start + 0x10200);
+ mpic_assign_isu(mpic, 1, r.start + 0x10280);
+ mpic_assign_isu(mpic, 2, r.start + 0x10300);
+ mpic_assign_isu(mpic, 3, r.start + 0x10380);
+ mpic_assign_isu(mpic, 4, r.start + 0x10400);
+ mpic_assign_isu(mpic, 5, r.start + 0x10480);
+ mpic_assign_isu(mpic, 6, r.start + 0x10500);
+ mpic_assign_isu(mpic, 7, r.start + 0x10580);
+
+ /* Unused on this platform (leave room for 8548) */
+ mpic_assign_isu(mpic, 8, r.start + 0x10600);
+ mpic_assign_isu(mpic, 9, r.start + 0x10680);
+ mpic_assign_isu(mpic, 10, r.start + 0x10700);
+ mpic_assign_isu(mpic, 11, r.start + 0x10780);
+
+ /* External Interrupts */
+ mpic_assign_isu(mpic, 12, r.start + 0x10000);
+ mpic_assign_isu(mpic, 13, r.start + 0x10080);
+ mpic_assign_isu(mpic, 14, r.start + 0x10100);
+
+ mpic_init(mpic);
}
/*
@@ -165,7 +112,9 @@ void __init mpc85xx_ads_pic_init(void)
static void __init mpc85xx_ads_setup_arch(void)
{
struct device_node *cpu;
+#ifdef CONFIG_PCI
struct device_node *np;
+#endif
if (ppc_md.progress)
ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
@@ -186,8 +135,7 @@ #ifdef CONFIG_PCI
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = mpc85xx_map_irq;
+ ppc_md.pcibios_fixup = mpc85xx_pcibios_fixup;
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
#endif
--
2006_06_07.01.gittree_pull-dirty
^ permalink raw reply related
* Re: [PATCH] Directly reference i8259@4d0 nodes in mpc8641_hpcn.dts.
From: Mark A. Greer @ 2006-08-18 0:43 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <1155859761.5803.6.camel@localhost.localdomain>
On Fri, Aug 18, 2006 at 10:09:21AM +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2006-08-17 at 16:20 -0500, Jon Loeliger wrote:
> > Rather than using some hand-coded linux,phandle
> > node references, use DTC's direct node refs ability
> > and let it manage the phandle names instead.
>
> Not 100% sure here but can't we use a label and do &label rather than
> having to copy the full path every time ? Would make things easier :) If
> not, that's probably something to add to dtc...
Isn't linux,phandle basically the label that you speak of, though?
IOW, you may be saying, "No, keep using the linux,phandle".
Just trying to clarify things although I'm not sure that I really am... :)
Mark
^ permalink raw reply
* Re: update: consolidated flat device tree code
From: Michael Ellerman @ 2006-08-18 0:34 UTC (permalink / raw)
To: Hollis Blanchard
Cc: linuxppc-dev, Pantelis Antoniou, Sachin P. Sant,
linuxppc-embedded
In-Reply-To: <1155860626.27466.126.camel@basalt.austin.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 868 bytes --]
On Thu, 2006-08-17 at 19:23 -0500, Hollis Blanchard wrote:
> Changes:
> - converted some ints to "unsigned", since gcc was generating warnings
> and negative lengths don't make sense in the flat data structure.
> - added ft_set_prop(), which doesn't yet resize properties but will in
> the future.
> - added an explicit copyright statement.
>
> Still haven't looked to merge Matt's changes (because I'm busy, the
> current code works for me, and they haven't been accepted in u-boot
> yet).
>
> Current users: Xen
> Future users: Mark's Linux bootwrapper code
> Potential users: kexec, u-boot
.. iSeries bootwrapper code?
--
Michael Ellerman
IBM OzLabs
wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 191 bytes --]
^ permalink raw reply
* Re: update: consolidated flat device tree code
From: Hollis Blanchard @ 2006-08-18 0:29 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Pantelis Antoniou, Sachin P. Sant, linuxppc-embedded
In-Reply-To: <1155860626.27466.126.camel@basalt.austin.ibm.com>
On Thu, 2006-08-17 at 19:23 -0500, Hollis Blanchard wrote:
> Changes:
> - converted some ints to "unsigned", since gcc was generating warnings
> and negative lengths don't make sense in the flat data structure.
> - added ft_set_prop(), which doesn't yet resize properties but will in
> the future.
> - added an explicit copyright statement.
>
> Still haven't looked to merge Matt's changes (because I'm busy, the
> current code works for me, and they haven't been accepted in u-boot
> yet).
>
> Current users: Xen
> Future users: Mark's Linux bootwrapper code
> Potential users: kexec, u-boot
Forgot to add that dtc itself is a potential user of this code.
--
Hollis Blanchard
IBM Linux Technology Center
^ permalink raw reply
* update: consolidated flat device tree code
From: Hollis Blanchard @ 2006-08-18 0:23 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Pantelis Antoniou, Sachin P. Sant, linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 558 bytes --]
Changes:
- converted some ints to "unsigned", since gcc was generating warnings
and negative lengths don't make sense in the flat data structure.
- added ft_set_prop(), which doesn't yet resize properties but will in
the future.
- added an explicit copyright statement.
Still haven't looked to merge Matt's changes (because I'm busy, the
current code works for me, and they haven't been accepted in u-boot
yet).
Current users: Xen
Future users: Mark's Linux bootwrapper code
Potential users: kexec, u-boot
--
Hollis Blanchard
IBM Linux Technology Center
[-- Attachment #2: ft_build.c --]
[-- Type: text/x-csrc, Size: 12119 bytes --]
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*
* Copyright Pantelis Antoniou 2006
* Copyright (C) IBM Corporation 2006
*
* Authors: Pantelis Antoniou <pantelis@embeddedalley.com>
* Hollis Blanchard <hollisb@us.ibm.com>
*/
#include <stddef.h>
#include <string.h>
#include <stdio.h>
#include <asm/errno.h>
#include "ft_build.h"
#define _ALIGN(addr,size) (((addr)+(size)-1)&(~((size)-1)))
static void ft_put_word(struct ft_cxt *cxt, u32 v)
{
if (cxt->overflow) /* do nothing */
return;
/* check for overflow */
if (cxt->p + 4 > cxt->pstr) {
cxt->overflow = 1;
return;
}
*(u32 *) cxt->p = cpu_to_be32(v);
cxt->p += 4;
}
static inline void ft_put_bin(struct ft_cxt *cxt, const void *data, int sz)
{
char *p;
if (cxt->overflow) /* do nothing */
return;
/* next pointer pos */
p = (char *) _ALIGN((unsigned long)cxt->p + sz, 4);
/* check for overflow */
if (p > cxt->pstr) {
cxt->overflow = 1;
return;
}
memcpy(cxt->p, data, sz);
if ((sz & 3) != 0)
memset(cxt->p + sz, 0, 4 - (sz & 3));
cxt->p = p;
}
void ft_begin_node(struct ft_cxt *cxt, const char *name)
{
ft_put_word(cxt, OF_DT_BEGIN_NODE);
ft_put_bin(cxt, name, strlen(name) + 1);
}
void ft_end_node(struct ft_cxt *cxt)
{
ft_put_word(cxt, OF_DT_END_NODE);
}
void ft_nop(struct ft_cxt *cxt)
{
ft_put_word(cxt, OF_DT_NOP);
}
static int lookup_string(struct ft_cxt *cxt, const char *name)
{
char *p;
p = cxt->pstr;
while (p < cxt->pstr_begin) {
if (strcmp(p, (char *)name) == 0)
return p - cxt->p_begin;
p += strlen(p) + 1;
}
return -1;
}
void ft_prop(struct ft_cxt *cxt, const char *name,
const void *data, unsigned int sz)
{
int len, off;
if (cxt->overflow)
return;
len = strlen(name) + 1;
off = lookup_string(cxt, name);
if (off == -1) {
/* check if we have space */
if (cxt->p + 12 + sz + len > cxt->pstr) {
cxt->overflow = 1;
return;
}
cxt->pstr -= len;
memcpy(cxt->pstr, name, len);
off = cxt->pstr - cxt->p_begin;
}
/* now put offset from beginning of *STRUCTURE* */
/* will be fixed up at the end */
ft_put_word(cxt, OF_DT_PROP);
ft_put_word(cxt, sz);
ft_put_word(cxt, off);
ft_put_bin(cxt, data, sz);
}
void ft_prop_str(struct ft_cxt *cxt, const char *name, const char *str)
{
ft_prop(cxt, name, str, strlen(str) + 1);
}
void ft_prop_int(struct ft_cxt *cxt, const char *name, unsigned int val)
{
u32 v = cpu_to_be32((u32) val);
ft_prop(cxt, name, &v, 4);
}
/* start construction of the flat OF tree */
void ft_begin(struct ft_cxt *cxt, void *blob, unsigned int max_size)
{
struct boot_param_header *bph = blob;
u32 off;
/* clear the cxt */
memset(cxt, 0, sizeof(*cxt));
cxt->bph = bph;
cxt->max_size = max_size;
/* zero everything in the header area */
memset(bph, 0, sizeof(*bph));
bph->magic = cpu_to_be32(OF_DT_HEADER);
bph->version = cpu_to_be32(0x10);
bph->last_comp_version = cpu_to_be32(0x10);
/* start pointers */
cxt->pres_begin = (char *) _ALIGN((unsigned long)(bph + 1), 8);
cxt->pres = cxt->pres_begin;
off = (unsigned long)cxt->pres_begin - (unsigned long)bph;
bph->off_mem_rsvmap = cpu_to_be32(off);
((u64 *) cxt->pres)[0] = 0; /* phys = 0, size = 0, terminate */
((u64 *) cxt->pres)[1] = 0;
cxt->p_anchor = cxt->pres + 16; /* over the terminator */
}
/* add a reserver physical area to the rsvmap */
void ft_add_rsvmap(struct ft_cxt *cxt, u64 physaddr, u64 size)
{
((u64 *) cxt->pres)[0] = cpu_to_be64(physaddr); /* phys = 0, size = 0, terminate */
((u64 *) cxt->pres)[1] = cpu_to_be64(size);
cxt->pres += 18; /* advance */
((u64 *) cxt->pres)[0] = 0; /* phys = 0, size = 0, terminate */
((u64 *) cxt->pres)[1] = 0;
/* keep track of size */
cxt->res_size = cxt->pres + 16 - cxt->pres_begin;
cxt->p_anchor = cxt->pres + 16; /* over the terminator */
}
void ft_begin_tree(struct ft_cxt *cxt)
{
cxt->p_begin = cxt->p_anchor;
cxt->pstr_begin = (char *)cxt->bph + cxt->max_size; /* point at the end */
cxt->p = cxt->p_begin;
cxt->pstr = cxt->pstr_begin;
}
int ft_end_tree(struct ft_cxt *cxt)
{
struct boot_param_header *bph = cxt->bph;
int off, sz, sz1;
u32 tag, v;
char *p;
ft_put_word(cxt, OF_DT_END);
if (cxt->overflow)
return -ENOMEM;
/* size of the areas */
cxt->struct_size = cxt->p - cxt->p_begin;
cxt->strings_size = cxt->pstr_begin - cxt->pstr;
/* the offset we must move */
off = (cxt->pstr_begin - cxt->p_begin) - cxt->strings_size;
/* the new strings start */
cxt->pstr_begin = cxt->p_begin + cxt->struct_size;
/* move the whole string area */
memmove(cxt->pstr_begin, cxt->pstr, cxt->strings_size);
/* now perform the fixup of the strings */
p = cxt->p_begin;
while ((tag = be32_to_cpu(*(u32 *) p)) != OF_DT_END) {
p += 4;
if (tag == OF_DT_BEGIN_NODE) {
p = (char *) _ALIGN((unsigned long)p + strlen(p) + 1, 4);
continue;
}
if (tag == OF_DT_END_NODE || tag == OF_DT_NOP)
continue;
if (tag != OF_DT_PROP)
return -EINVAL;
sz = be32_to_cpu(*(u32 *) p);
p += 4;
v = be32_to_cpu(*(u32 *) p);
v -= off;
*(u32 *) p = cpu_to_be32(v); /* move down */
p += 4;
p = (char *) _ALIGN((unsigned long)p + sz, 4);
}
/* fix sizes */
p = (char *)cxt->bph;
sz = (cxt->pstr_begin + cxt->strings_size) - p;
sz1 = _ALIGN(sz, 16); /* align at 16 bytes */
if (sz != sz1)
memset(p + sz, 0, sz1 - sz);
bph->totalsize = cpu_to_be32(sz1);
bph->off_dt_struct = cpu_to_be32(cxt->p_begin - p);
bph->off_dt_strings = cpu_to_be32(cxt->pstr_begin - p);
/* the new strings start */
cxt->pstr_begin = cxt->p_begin + cxt->struct_size;
cxt->pstr = cxt->pstr_begin + cxt->strings_size;
return 0;
}
/**********************************************************************/
static inline int isprint(int c)
{
return c >= 0x20 && c <= 0x7e;
}
static int is_printable_string(const void *data, int len)
{
const char *s = data;
const char *ss;
/* zero length is not */
if (len == 0)
return 0;
/* must terminate with zero */
if (s[len - 1] != '\0')
return 0;
ss = s;
while (*s && isprint(*s))
s++;
/* not zero, or not done yet */
if (*s != '\0' || (s + 1 - ss) < len)
return 0;
return 1;
}
static void print_data(const void *data, int len)
{
int i;
const char *s;
/* no data, don't print */
if (len == 0)
return;
if (is_printable_string(data, len)) {
printf(" = \"%s\"", (char *)data);
return;
}
switch (len) {
case 1: /* byte */
printf(" = <0x%02x>", (*(char *) data) & 0xff);
break;
case 2: /* half-word */
printf(" = <0x%04x>", be16_to_cpu(*(u16 *) data) & 0xffff);
break;
case 4: /* word */
printf(" = <0x%08x>", be32_to_cpu(*(u32 *) data) & 0xffffffffU);
break;
case 8: /* double-word */
printf(" = <0x%16llx>", be64_to_cpu(*(u64 *) data));
break;
default: /* anything else... hexdump */
printf(" = [");
for (i = 0, s = data; i < len; i++)
printf("%02x%s", s[i], i < len - 1 ? " " : "");
printf("]");
break;
}
}
void ft_dump_blob(const void *bphp)
{
const struct boot_param_header *bph = bphp;
const u64 *p_rsvmap = (const u64 *)
((const char *)bph + be32_to_cpu(bph->off_mem_rsvmap));
const u32 *p_struct = (const u32 *)
((const char *)bph + be32_to_cpu(bph->off_dt_struct));
const u32 *p_strings = (const u32 *)
((const char *)bph + be32_to_cpu(bph->off_dt_strings));
u32 tag;
const u32 *p;
const char *s, *t;
int depth, sz, shift;
int i;
u64 addr, size;
if (be32_to_cpu(bph->magic) != OF_DT_HEADER) {
/* not valid tree */
return;
}
depth = 0;
shift = 4;
for (i = 0;; i++) {
addr = be64_to_cpu(p_rsvmap[i * 2]);
size = be64_to_cpu(p_rsvmap[i * 2 + 1]);
if (addr == 0 && size == 0)
break;
printf("/memreserve/ 0x%llx 0x%llx;\n", addr, size);
}
p = p_struct;
while ((tag = be32_to_cpu(*p++)) != OF_DT_END) {
/* printf("tag: 0x%08x (%d)\n", tag, p - p_struct); */
if (tag == OF_DT_BEGIN_NODE) {
s = (const char *)p;
p = (u32 *) _ALIGN((unsigned long)p + strlen(s) + 1, 4);
printf("%*s%s {\n", depth * shift, "", s);
depth++;
continue;
}
if (tag == OF_DT_END_NODE) {
depth--;
printf("%*s};\n", depth * shift, "");
continue;
}
if (tag == OF_DT_NOP) {
printf("%*s[NOP]\n", depth * shift, "");
continue;
}
if (tag != OF_DT_PROP) {
fprintf(stderr, "%*s ** Unknown tag 0x%08x\n",
depth * shift, "", tag);
break;
}
sz = be32_to_cpu(*p++);
s = (const char *)p_strings + be32_to_cpu(*p++);
t = (const char *)p;
p = (const u32 *)_ALIGN((unsigned long)p + sz, 4);
printf("%*s%s", depth * shift, "", s);
print_data(t, sz);
printf(";\n");
}
}
void ft_backtrack_node(struct ft_cxt *cxt)
{
if (be32_to_cpu(*(u32 *) (cxt->p - 4)) != OF_DT_END_NODE)
return; /* XXX only for node */
cxt->p -= 4;
}
/* note that the root node of the blob is "peeled" off */
void ft_merge_blob(struct ft_cxt *cxt, void *blob)
{
struct boot_param_header *bph = (struct boot_param_header *)blob;
u32 *p_struct = (u32 *) ((char *)bph + be32_to_cpu(bph->off_dt_struct));
u32 *p_strings =
(u32 *) ((char *)bph + be32_to_cpu(bph->off_dt_strings));
u32 tag, *p;
char *s, *t;
int depth, sz;
if (be32_to_cpu(*(u32 *) (cxt->p - 4)) != OF_DT_END_NODE)
return; /* XXX only for node */
cxt->p -= 4;
depth = 0;
p = p_struct;
while ((tag = be32_to_cpu(*p++)) != OF_DT_END) {
/* printf("tag: 0x%08x (%d) - %d\n", tag, p - p_struct, depth); */
if (tag == OF_DT_BEGIN_NODE) {
s = (char *)p;
p = (u32 *) _ALIGN((unsigned long)p + strlen(s) + 1, 4);
if (depth++ > 0)
ft_begin_node(cxt, s);
continue;
}
if (tag == OF_DT_END_NODE) {
ft_end_node(cxt);
if (--depth == 0)
break;
continue;
}
if (tag == OF_DT_NOP)
continue;
if (tag != OF_DT_PROP)
break;
sz = be32_to_cpu(*p++);
s = (char *)p_strings + be32_to_cpu(*p++);
t = (char *)p;
p = (u32 *) _ALIGN((unsigned long)p + sz, 4);
ft_prop(cxt, s, t, sz);
}
}
void *ft_get_prop(void *bphp, const char *propname, unsigned int *szp)
{
struct boot_param_header *bph = bphp;
u32 *p_struct =
(u32 *) ((char *)bph + be32_to_cpu(bph->off_dt_struct));
u32 *p_strings =
(u32 *) ((char *)bph + be32_to_cpu(bph->off_dt_strings));
u32 version = be32_to_cpu(bph->version);
u32 tag;
u32 *p;
char *s, *t;
char *ss;
int sz;
static char path[256], prop[256];
path[0] = '\0';
p = p_struct;
while ((tag = be32_to_cpu(*p++)) != OF_DT_END) {
if (tag == OF_DT_BEGIN_NODE) {
s = (char *)p;
p = (u32 *) _ALIGN((unsigned long)p + strlen(s) +
1, 4);
strcat(path, s);
strcat(path, "/");
continue;
}
if (tag == OF_DT_END_NODE) {
path[strlen(path) - 1] = '\0';
ss = strrchr(path, '/');
if (ss != NULL)
ss[1] = '\0';
continue;
}
if (tag == OF_DT_NOP)
continue;
if (tag != OF_DT_PROP)
break;
sz = be32_to_cpu(*p++);
s = (char *)p_strings + be32_to_cpu(*p++);
if (version < 0x10 && sz >= 8)
p = (u32 *) _ALIGN((unsigned long)p, 8);
t = (char *)p;
p = (u32 *) _ALIGN((unsigned long)p + sz, 4);
strcpy(prop, path);
strcat(prop, s);
if (strcmp(prop, propname) == 0) {
*szp = sz;
return t;
}
}
return NULL;
}
int ft_set_prop(void *bphp, const char *propname, const void *val,
unsigned int len)
{
void *prop;
unsigned int proplen;
prop = ft_get_prop(bphp, propname, &proplen);
if (prop == NULL)
return -ENOENT;
if (proplen != len)
/* XXX to be removed when property resize is supported */
return -EINVAL;
memcpy(prop, val, len);
return 0;
}
[-- Attachment #3: ft_build.h --]
[-- Type: text/x-chdr, Size: 4373 bytes --]
/*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
*/
#ifndef FT_BUILD_H
#define FT_BUILD_H
#include <endian.h>
typedef unsigned short u16;
typedef unsigned int u32;
typedef unsigned long long u64;
static inline u16 swab16(u16 x)
{
return (((u16)(x) & (u16)0x00ffU) << 8) |
(((u16)(x) & (u16)0xff00U) >> 8);
}
static inline u32 swab32(u32 x)
{
return (((u32)(x) & (u32)0x000000ffUL) << 24) |
(((u32)(x) & (u32)0x0000ff00UL) << 8) |
(((u32)(x) & (u32)0x00ff0000UL) >> 8) |
(((u32)(x) & (u32)0xff000000UL) >> 24);
}
static inline u64 swab64(u64 x)
{
return (u64)(((u64)(x) & (u64)0x00000000000000ffULL) << 56) |
(u64)(((u64)(x) & (u64)0x000000000000ff00ULL) << 40) |
(u64)(((u64)(x) & (u64)0x0000000000ff0000ULL) << 24) |
(u64)(((u64)(x) & (u64)0x00000000ff000000ULL) << 8) |
(u64)(((u64)(x) & (u64)0x000000ff00000000ULL) >> 8) |
(u64)(((u64)(x) & (u64)0x0000ff0000000000ULL) >> 24) |
(u64)(((u64)(x) & (u64)0x00ff000000000000ULL) >> 40) |
(u64)(((u64)(x) & (u64)0xff00000000000000ULL) >> 56);
}
#if __BYTE_ORDER == __LITTLE_ENDIAN
#define cpu_to_be16(x) swab16(x)
#define be16_to_cpu(x) swab16(x)
#define cpu_to_be32(x) swab32(x)
#define be32_to_cpu(x) swab32(x)
#define cpu_to_be64(x) swab64(x)
#define be64_to_cpu(x) swab64(x)
#else
#define cpu_to_be16(x) (x)
#define be16_to_cpu(x) (x)
#define cpu_to_be32(x) (x)
#define be32_to_cpu(x) (x)
#define cpu_to_be64(x) (x)
#define be64_to_cpu(x) (x)
#endif
/* Definitions used by the flattened device tree */
#define OF_DT_HEADER 0xd00dfeed /* marker */
#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
#define OF_DT_END_NODE 0x2 /* End node */
#define OF_DT_PROP 0x3 /* Property: name off, size, content */
#define OF_DT_NOP 0x4 /* nop */
#define OF_DT_END 0x9
#define OF_DT_VERSION 0x10
struct boot_param_header {
u32 magic; /* magic word OF_DT_HEADER */
u32 totalsize; /* total size of DT block */
u32 off_dt_struct; /* offset to structure */
u32 off_dt_strings; /* offset to strings */
u32 off_mem_rsvmap; /* offset to memory reserve map */
u32 version; /* format version */
u32 last_comp_version; /* last compatible version */
/* version 2 fields below */
u32 boot_cpuid_phys; /* Physical CPU id we're booting on */
/* version 3 fields below */
u32 dt_strings_size; /* size of the DT strings block */
};
struct ft_cxt {
struct boot_param_header *bph;
int max_size; /* maximum size of tree */
int overflow; /* set when this happens */
char *p, *pstr, *pres; /* running pointers */
char *p_begin, *pstr_begin, *pres_begin; /* starting pointers */
char *p_anchor; /* start of constructed area */
int struct_size, strings_size, res_size;
};
void ft_begin_node(struct ft_cxt *cxt, const char *name);
void ft_end_node(struct ft_cxt *cxt);
void ft_begin_tree(struct ft_cxt *cxt);
int ft_end_tree(struct ft_cxt *cxt);
void ft_nop(struct ft_cxt *cxt);
void ft_prop(struct ft_cxt *cxt, const char *name,
const void *data, unsigned int sz);
void ft_prop_str(struct ft_cxt *cxt, const char *name, const char *str);
void ft_prop_int(struct ft_cxt *cxt, const char *name, unsigned int val);
void ft_begin(struct ft_cxt *cxt, void *blob, unsigned int max_size);
void ft_add_rsvmap(struct ft_cxt *cxt, u64 physaddr, u64 size);
void ft_dump_blob(const void *bphp);
void ft_merge_blob(struct ft_cxt *cxt, void *blob);
void *ft_get_prop(void *bphp, const char *propname, unsigned int *szp);
int ft_set_prop(void *bphp, const char *propname, const void *val,
unsigned int len);
#endif
^ permalink raw reply
* Re: [PATCH] Directly reference i8259@4d0 nodes in mpc8641_hpcn.dts.
From: Benjamin Herrenschmidt @ 2006-08-18 0:09 UTC (permalink / raw)
To: Jon Loeliger; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <1155849609.10054.175.camel@cashmere.sps.mot.com>
On Thu, 2006-08-17 at 16:20 -0500, Jon Loeliger wrote:
> Rather than using some hand-coded linux,phandle
> node references, use DTC's direct node refs ability
> and let it manage the phandle names instead.
Not 100% sure here but can't we use a label and do &label rather than
having to copy the full path every time ? Would make things easier :) If
not, that's probably something to add to dtc...
Cheers,
Ben.
> Signed-off-by: Jon Loeliger <jdl@freescale.com>
> ---
>
> On Thu, 2006-08-17 at 13:51, Hollis Blanchard wrote:
> > Doesn't the device tree compiler add linux,phandle properties as needed?
> > In this case that would be when the node is referenced by a
> > "<&/foo/bar/i8259@4d0>" property.
> >
> > On Thu, 2006-08-17 at 12:24 -0500, Jon Loeliger wrote:
> > > Add 'linux,phandle' entry to i8259@4d0 node.
> > >
> > > Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
> > > Signed-off-by: Jon Loeliger <jdl@freescale.com>
> > > ---
>
> Paul,
>
> If you think this is better, please apply this patch
> instead of my previous patch with the subject line:
>
> Patch] Fix the mpc8641_hpcn.dts file.
>
> Thanks,
> jdl
>
>
> arch/powerpc/boot/dts/mpc8641_hpcn.dts | 121 ++++++++++++++++----------------
> 1 files changed, 60 insertions(+), 61 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
> index e832a88..49d85a5 100644
> --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
> +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
> @@ -32,7 +32,6 @@
> bus-frequency = <0>; // From uboot
> clock-frequency = <0>; // From uboot
> 32-bit;
> - linux,boot-cpu;
> };
> PowerPC,8641@1 {
> device_type = "cpu";
> @@ -202,95 +201,95 @@
> interrupt-map-mask = <f800 0 0 7>;
> interrupt-map = <
> /* IDSEL 0x11 */
> - 8800 0 0 1 4d0 3 2
> - 8800 0 0 2 4d0 4 2
> - 8800 0 0 3 4d0 5 2
> - 8800 0 0 4 4d0 6 2
> + 8800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 3 2
> + 8800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 4 2
> + 8800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 5 2
> + 8800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 6 2
>
> /* IDSEL 0x12 */
> - 9000 0 0 1 4d0 4 2
> - 9000 0 0 2 4d0 5 2
> - 9000 0 0 3 4d0 6 2
> - 9000 0 0 4 4d0 3 2
> + 9000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 4 2
> + 9000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 5 2
> + 9000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 6 2
> + 9000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 3 2
>
> /* IDSEL 0x13 */
> - 9800 0 0 1 4d0 0 0
> - 9800 0 0 2 4d0 0 0
> - 9800 0 0 3 4d0 0 0
> - 9800 0 0 4 4d0 0 0
> + 9800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + 9800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + 9800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + 9800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
>
> /* IDSEL 0x14 */
> - a000 0 0 1 4d0 0 0
> - a000 0 0 2 4d0 0 0
> - a000 0 0 3 4d0 0 0
> - a000 0 0 4 4d0 0 0
> + a000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + a000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + a000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + a000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
>
> /* IDSEL 0x15 */
> - a800 0 0 1 4d0 0 0
> - a800 0 0 2 4d0 0 0
> - a800 0 0 3 4d0 0 0
> - a800 0 0 4 4d0 0 0
> + a800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + a800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + a800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + a800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
>
> /* IDSEL 0x16 */
> - b000 0 0 1 4d0 0 0
> - b000 0 0 2 4d0 0 0
> - b000 0 0 3 4d0 0 0
> - b000 0 0 4 4d0 0 0
> + b000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + b000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + b000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + b000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
>
> /* IDSEL 0x17 */
> - b800 0 0 1 4d0 0 0
> - b800 0 0 2 4d0 0 0
> - b800 0 0 3 4d0 0 0
> - b800 0 0 4 4d0 0 0
> + b800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + b800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + b800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + b800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
>
> /* IDSEL 0x18 */
> - c000 0 0 1 4d0 0 0
> - c000 0 0 2 4d0 0 0
> - c000 0 0 3 4d0 0 0
> - c000 0 0 4 4d0 0 0
> + c000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + c000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + c000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + c000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
>
> /* IDSEL 0x19 */
> - c800 0 0 1 4d0 0 0
> - c800 0 0 2 4d0 0 0
> - c800 0 0 3 4d0 0 0
> - c800 0 0 4 4d0 0 0
> + c800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + c800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + c800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + c800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
>
> /* IDSEL 0x1a */
> - d000 0 0 1 4d0 6 2
> - d000 0 0 2 4d0 3 2
> - d000 0 0 3 4d0 4 2
> - d000 0 0 4 4d0 5 2
> + d000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 6 2
> + d000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 3 2
> + d000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 4 2
> + d000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 5 2
>
>
> /* IDSEL 0x1b */
> - d800 0 0 1 4d0 5 2
> - d800 0 0 2 4d0 0 0
> - d800 0 0 3 4d0 0 0
> - d800 0 0 4 4d0 0 0
> + d800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 5 2
> + d800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + d800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + d800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
>
> /* IDSEL 0x1c */
> - e000 0 0 1 4d0 9 2
> - e000 0 0 2 4d0 a 2
> - e000 0 0 3 4d0 c 2
> - e000 0 0 4 4d0 7 2
> + e000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 9 2
> + e000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 a 2
> + e000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 c 2
> + e000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 7 2
>
> /* IDSEL 0x1d */
> - e800 0 0 1 4d0 9 2
> - e800 0 0 2 4d0 a 2
> - e800 0 0 3 4d0 b 2
> - e800 0 0 4 4d0 0 0
> + e800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 9 2
> + e800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 a 2
> + e800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 b 2
> + e800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
>
> /* IDSEL 0x1e */
> - f000 0 0 1 4d0 c 2
> - f000 0 0 2 4d0 0 0
> - f000 0 0 3 4d0 0 0
> - f000 0 0 4 4d0 0 0
> + f000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 c 2
> + f000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + f000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + f000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
>
> /* IDSEL 0x1f */
> - f800 0 0 1 4d0 6 2
> - f800 0 0 2 4d0 0 0
> - f800 0 0 3 4d0 0 0
> - f800 0 0 4 4d0 0 0
> + f800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 6 2
> + f800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + f800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> + f800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
> >;
> i8259@4d0 {
> clock-frequency = <0>;
^ permalink raw reply
* Re: Outstanding Patches Ping
From: Paul Mackerras @ 2006-08-18 0:07 UTC (permalink / raw)
To: Jon Loeliger; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <E1GDhtO-0002Mk-2j@jdl.com>
Jon Loeliger writes:
> > > - 08/09 Offer PCI as a CONFIG choice for PPC_86xx
> >
> > I'll push it to powerpc.git (to go in 2.6.19) shortly, unless you
> > particularly want it and your "Allow MPC8641 HPCN to build with
> > CONFIG_PCI disabled too" patches in 2.6.18.
>
> My preference would be to have them both in 18 if possible.
The "Allow MPC8641 HPCN to build with CONFIG_PCI disabled too" patch
depends on your "Rewrite the PPC 86xx IRQ handling to use Flat Device
Tree" which isn't in the queue for 2.6.18, and doesn't apply for
2.6.18 since it depends on the constifying of get_property.
Paul.
^ permalink raw reply
* Re: latest git: compile error: arch/powerpc/kernel/built-in.o
From: Michael Ellerman @ 2006-08-18 0:01 UTC (permalink / raw)
To: Wolfgang Pfeiffer; +Cc: linux-ppc, Michael Ellerman, Paul Mackerras
In-Reply-To: <20060817120653.GA3440@localhost>
On Thu, 2006-08-17 at 14:06 +0200, Wolfgang Pfeiffer wrote:
> On Thu, Aug 17, 2006 at 04:41:58PM +1000, Paul Mackerras wrote:
> > Wolfgang Pfeiffer writes:
> >
> > > Strange tho' - for me at least - that these patches from about 5 weeks (!)
> > > ago still don't seem to have made it into the current git tree ...
> >
> > 5 weeks ago was a particularly bad time for patches trying to get into
> > the git tree, since I was on vacation and then travelling to OLS. :)
>
> [ ... ]
>
> Michael, Paul, and everyone else being involved:
>
> My apologies for my perhaps too strong wording when I was complaining
> about the delay ... I didn't mean the words as ugly as they actually
> might read ...
No worries, thanks for catching the error and reporting it.
cheers
--
Michael Ellerman
IBM OzLabs
email: michaele@au.ibm.com
stime: ellerman@au1.ibm.com
notes: Michael Ellerman/Australia/IBM
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
^ permalink raw reply
* Re: [PATCH 02/13] IB/ehca: includes
From: Arnd Bergmann @ 2006-08-17 23:44 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linux-kernel, openib-general, RAISCH, HNGUYEN, MEDER
In-Reply-To: <20068171311.X1v1Q4Gk1v3wd7qJ@cisco.com>
T24gVGh1cnNkYXkgMTcgQXVndXN0IDIwMDYgMjI6MTEsIFJvbGFuZCBEcmVpZXIgd3JvdGU6Cj4g
KyAqIElTX0VERUJfT04gLSBDaGVja3MgaWYgZGVidWcgaXMgb24gZm9yIHRoZSBnaXZlbiBsZXZl
bC4KPiArICovCj4gKyNkZWZpbmUgSVNfRURFQl9PTihsZXZlbCkgXAo+ICsoKGVoY2FfZWRlYl9m
aWx0ZXIobGV2ZWwsIEVERUJfSURfVE9fVTMyKERFQl9QUkVGSVgpLCBfX0xJTkVfXykgJiBcCj4g
KyCgMHgxMDAwMDAwMDBMKSA9PSAwKQo+ICsKPiArI2RlZmluZSBFREVCX1BfR0VORVJJQyhsZXZl
bCxpZHN0cmluZyxmb3JtYXQsYXJncy4uLikgXAo+ICtkbyB7IFwKPiAroKCgoKCgoHU2NCBlaGNh
X2VkZWJfZmlsdGVycmVzdWx0ID2goKCgoKCgoKCgoKCgoKCgoKCgoKCgoKCgoKCgoKCgoKCgoKBc
Cj4gK6CgoKCgoKCgoKCgoKCgoGVoY2FfZWRlYl9maWx0ZXIobGV2ZWwsIEVERUJfSURfVE9fVTMy
KERFQl9QUkVGSVgpLCBfX0xJTkVfXyk7XAo+ICugoKCgoKCgaWYgKChlaGNhX2VkZWJfZmlsdGVy
cmVzdWx0ICYgMHgxMDAwMDAwMDBMKSA9PSAwKaCgoKCgoKCgoKCgoKCgoFwKPiAroKCgoKCgoKCg
oKCgoKCgcHJpbnRrKCJQVSUwNHggJTA4eDolcyAiIGlkc3RyaW5nICIgImZvcm1hdCAiXG4iLKCg
oKCgoKBcCj4gK6CgoKCgoKCgoKCgoKCgoCCgIKAgoCBnZXRfcGFjYSgpLT5wYWNhX2luZGV4LCAo
dTMyKShlaGNhX2VkZWJfZmlsdGVycmVzdWx0KSwgXAo+ICugoKCgoKCgoKCgoKCgoKAgoCCgIKAg
X19mdW5jX18sIKAjI2FyZ3MpO6CgoKCgoKCgoKCgoKCgoKCgoKCgoKCgoKCgoKCgoFwKPiArfSB3
aGlsZSAoMSA9PSAwKQoKVGhlc2UgbWFjcm9zIGFyZSByZXNwb25zaWJsZSBmb3IgNjElIG9mIHRo
ZSBvYmplY3QgY29kZSBzaXplIG9mIHlvdXIgbW9kdWxlLgpUaGlzIGlzIGNvbXBsZXRlbHkgaW5z
YW5lLiBQbGVhc2UgZ2V0IHJpZCBvZiB0aGF0IGNyYXAgZW50aXJlbHkgYW5kIHJlcGxhY2UKaXQg
d2l0aCBkZXZfaW5mby9kZXZfZGJnL2Rldl93YXJuIGNhbGxzIHdoZXJlIGFwcHJvcHJpYXRlIQoK
CUFybmQgPD48Cg==
^ permalink raw reply
* Re: [PATCH 13/13] IB/ehca: makefiles/kconfig
From: Arnd Bergmann @ 2006-08-17 23:34 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linux-kernel, openib-general, RAISCH, HNGUYEN, MEDER
In-Reply-To: <20068171311.WDFBWw0F6z9B3Qes@cisco.com>
On Thursday 17 August 2006 22:11, Roland Dreier wrote:
> +
> +CFLAGS += -DEHCA_USE_HCALL -DEHCA_USE_HCALL_KERNEL
This seems really pointless, since you're always defining these
macros to the same value.
Just drop the CFLAGS and remove the code that depends on them
being different.
Arnd <><
^ permalink raw reply
* Re: [PATCH 6/6] bootwrapper: Add support for the sandpoint platform
From: Guennadi Liakhovetski @ 2006-08-17 23:19 UTC (permalink / raw)
To: Mark A. Greer; +Cc: linuxppc-dev
In-Reply-To: <Pine.LNX.4.60.0608172352220.8228@poirot.grange>
On Fri, 18 Aug 2006, Guennadi Liakhovetski wrote:
> On Thu, 17 Aug 2006, Mark A. Greer wrote:
>
> > Depends on what you mean by "__boot__". This is the code needed to
> > prepare things--the flat dev tree in this case--so that the kernel
> > can boot when running the DINK firmware on a sandpoint.
>
> ...after getting some vitamins on irc and re-reading some emails, I
> finally realised what the stuff under boot is for. Expect more confusion
> from me:-)
Ok, I think, now I have an idea what all these wrappers are about:
we want to be able to boot linux from a number of different environments:
OF
various firmwares / boot ROMs / bootloaders with very different
capabilities of running foreign code and different calling conventions
"native" Linux bootloaders like u-Boot, etc.
kexec
...
and the chosen approach is to have a kernel proper common to all these
possibilities, and "wrappers". These wrappers are boot-method and board
specific, are distributed with the kernel, located under
arch/powerpc/boot, get linked with the kernel proper, fdt, with various
compression possibilities...
Have I got it right now? One of the reasons of me having problems to
understand this is that on ARM we just say "to boot kernel you have to
have MMU switched off, registers must contain this and that, you have to
prepare a list of ATAGs, copy the kernel to a certain address, and jump to
it. If you don't do that you cannot run Linux on your system":-)
Thanks
Guennadi
---
Guennadi Liakhovetski
^ permalink raw reply
* Broken Firewire 400/SCSI on ppc Powerbook5,8
From: Wolfgang Pfeiffer @ 2006-08-17 23:03 UTC (permalink / raw)
To: linux1394-devel; +Cc: linuxppc-dev, Stefan Richter
Hi All
Short version first:
The SCSI/FW routines seem to work like a charm with a LSILogic Model/
SYM13FW500-Disk on my old Macintosh titanium-IV laptop, with exactly
the same relatively fresh git-kernel that does not work on the
PowerBook5,8. That is I compiled the kernel on the Apple Powerbook5,8
and installed it on both machines.
SCSI/FW didn't work ever on the new PowerBook5,8.
I'll give you first some error messages for the failing FW disk,
and at the end of this mail you'll find links to technical
documentation for the 2 failng machines (Powerbook5,8 and FW board/disk)
First I load the drivers with this little script:
------------------------------------------
#!/bin/sh -x
/bin/sh -n /home/shorty/scripts/scsi.start.sh && \
modprobe raw1394 && \
modprobe ieee1394 disable_irm=0 disable_nodemgr=1 && \
modprobe ohci1394 && \
modprobe eth1394 && \
modprobe sbp2 max_speed=3 workarounds=0x1 serialize_io=0 && \
sleep 4 && \
chown root.shorty /dev/raw1394
-------------------------------------------
After doing the latter:
-------------------------------
$ sh kernel-factory/git.08102006/linux-2.6/scripts/ver_linux
If some fields are empty or look unusual you may have an old version.
Compare to the current minimal requirements in Documentation/Changes.
Linux debby1-6 2.6.18-rc4-060811-dirty #1 Fri Aug 11 00:16:22 CEST 2006 ppc GNU/
Linux
Gnu C 4.1.2
Gnu make 3.81
binutils 2.17
util-linux 2.12r
mount 2.12r
module-init-tools 3.2.2
e2fsprogs 1.39
pcmcia-cs 3.2.8
Linux C Library 2.3.6
Dynamic linker (ldd) 2.3.6
Procps 3.2.7
Net-tools 1.60
Console-tools 0.2.3
Sh-utils 5.97
udev 093
Modules Loaded sbp2 eth1394 ohci1394 raw1394 ieee1394 bluetooth radeon d
rm nfs nfsd exportfs lockd nfs_acl sunrpc ipv6 therm_adt746x sr_mod cpufreq_powe
rsave cpufreq_performance scsi_mod apm_emu joydev usblp appletouch usbhid snd_ao
a_codec_onyx snd_aoa_fabric_layout snd_aoa pcmcia firmware_class evdev snd_aoa_i
2sbus snd_pcm_oss snd_mixer_oss snd_pcm snd_timer snd_page_alloc snd ide_cd ohci
_hcd yenta_socket sungem sungem_phy cdrom ehci_hcd usbcore rsrc_nonstatic pcmcia
_core pmac_zilog serial_core soundcore snd_aoa_soundbus uninorth_agp agpgart i2c
_powermac
------------------------------
After loading the drivers above the failing kernel says this about the
via FW attached disk:
-----------------------------------
Aug 18 00:24:03 debby1-6 kernel: [38907.611119] ieee1394: Initialized config rom entry `ip1394'
Aug 18 00:24:03 debby1-6 kernel: [38907.628475] ieee1394: raw1394: /dev/raw1394 device initialized
Aug 18 00:24:03 debby1-6 kernel: [38907.692766] PM: Adding info for ieee1394:fw-host0
Aug 18 00:24:03 debby1-6 kernel: [38907.764726] ohci1394: fw-host0: OHCI-1394 1.0 (PCI): IRQ=[40] MMIO=[f5000000-f50007ff] Max Packet=[4096] IR/IT contexts=[8/8]
Aug 18 00:24:03 debby1-6 kernel: [38907.912614] eth1394: eth2: IEEE-1394 IPv4 over 1394 Ethernet (fw-host0)
Aug 18 00:24:04 debby1-6 kernel: [38909.170610] ieee1394: The root node is not cycle master capable; selecting a new root node and resetting...
Aug 18 00:24:05 debby1-6 kernel: [38910.425599] ieee1394: Error parsing configrom for node 0-00:1023
Aug 18 00:24:05 debby1-6 kernel: [38910.425992] PM: Adding info for ieee1394:001451fffe3148be
Aug 18 00:24:05 debby1-6 kernel: [38910.426064] ieee1394: Host added: ID:BUS[0-02:1023] GUID[001451fffe3148be]
Aug 18 00:24:05 debby1-6 kernel: [38910.426209] PM: Adding info for ieee1394:001451fffe3148be-0
-----------------------------------
And gscanbus says this for:
"Unknown
Linux - ohci1394":
--------------------------
SelfID Info
-----------
Physical ID: 2
Link active: Yes
Gap Count: 63
PHY Speed: Unknown
PHY Delay: <=144ns
IRM Capable: Yes
Power Class: -1W
Port 0: Not connected
Port 1: Connected to child node
Port 2: Not connected
Init. reset: Yes
CSR ROM Info
------------
GUID: 0x001451FFFE3148BE
Node Capabilities: 0x000083C0
Vendor ID: 0x00001451
Unit Spec ID: 0x0000005E
Unit SW Version: 0x00000001
Model ID: 0x00000000
Nr. Textual Leafes: 1
Vendor: Unknown
Textual Leafes:
Linux - ohci1394
AV/C Subunits
-------------
N/A
-------------------------
And this for "S400 unknown":
---------------------------------
SelfID Info
-----------
Physical ID: 1
Link active: No
Gap Count: 63
PHY Speed: S400
PHY Delay: <=144ns
IRM Capable: No
Power Class: -1W
Port 0: Connected to parent node
Port 1: Not connected
Port 2: Connected to child node
Init. reset: No
CSR ROM Info
------------
GUID: 0x0000000000000000
Node Capabilities: 0x00000000
Vendor ID: 0x00000000
Unit Spec ID: 0x00000000
Unit SW Version: 0x00000000
Model ID: 0x00000000
Nr. Textual Leafes: 0
Vendor: (null)
Textual Leafes:
AV/C Subunits
-------------
N/A
-----------------------------------
I haven't enabled for the current kernel IEEE1394_VERBOSEDEBUG. I
could recompile it and enable this option if necessary, to provide
more verbose kernel logs.
As to the documentation for the 2 machines, where all this is
happening, first the computer, then the FW board/disk:
*** 1:
The computer:
$ cat /proc/cpuinfo
processor : 0
cpu : 7447A, altivec supported
clock : 1666.666000MHz
revision : 0.5 (pvr 8003 0105)
bogomips : 33.15
timebase : 8320000
platform : PowerMac
machine : PowerBook5,8
motherboard : PowerBook5,8 MacRISC3 Power Macintosh
detected as : 287 (PowerBook G4 15")
pmac flags : 00000019
L2 cache : 512K unified
pmac-generation : NewWorld
Some Apple technical documentation for the Firewire 400/800 ports is here:
http://developer.apple.com/documentation/Hardware/Developer_Notes/Macintosh_CPUs-G4/15inchPowerBookG4/3Input-Output/chapter_4_section_3.html#//apple_ref/doc/uid/TP40003165-CH207-TPXREF105
Start page - if the link above is only a temporary one - seems being
here:
http://developer.apple.com/documentation/Hardware/Developer_Notes/Macintosh_CPUs-G4/15inchPowerBookG4/index.html
*** 2:
The Firewire disk/board:
I don't have reasonable technical docs for the FW board. Here's a
picture of the package for the disk enclosure, with some technical data:
http://www.geocities.com/wolfgangpfeiffer/scsi.case.specs.jpg
This seems to be the board for the disk, inside the enclosure:
Vendor: LSILogic Model: SYM13FW500-Disk Rev: 1.00
I have pictures for the board here:
Disk on the board, top side:
http://wolfgangpfeiffer.com/scsi.top.jpg
Bottomside, with wirings:
http://wolfgangpfeiffer.com/scsi.focussed.flash.jpg
[444 KB]
Similar:
http://www.wolfgangpfeiffer.com/scsi.disk.2.scaled.jpg
[276 KB]
Wirings side again:
http://www.wolfgangpfeiffer.com/scsi.focussed.flash.jpg
[444 KB]
Please let me know if you need more information
Thanks for your time.
Wolfgang
--
Wolfgang Pfeiffer: /ICQ: 286585973/ + + + /AIM: crashinglinux/
http://profiles.yahoo.com/wolfgangpfeiffer
Key ID: E3037113
http://keyserver.mine.nu/pks/lookup?search=0xE3037113&fingerprint=on
^ permalink raw reply
* Re: [PATCH 6/6] bootwrapper: Add support for the sandpoint platform
From: Guennadi Liakhovetski @ 2006-08-17 22:39 UTC (permalink / raw)
To: Mark A. Greer; +Cc: linuxppc-dev
In-Reply-To: <20060817211353.GA1402@mag.az.mvista.com>
On Thu, 17 Aug 2006, Mark A. Greer wrote:
> Depends on what you mean by "__boot__". This is the code needed to
> prepare things--the flat dev tree in this case--so that the kernel
> can boot when running the DINK firmware on a sandpoint.
...after getting some vitamins on irc and re-reading some emails, I
finally realised what the stuff under boot is for. Expect more confusion
from me:-)
Thanks
Guennadi
---
Guennadi Liakhovetski
^ permalink raw reply
* [PATCH] Directly reference i8259@4d0 nodes in mpc8641_hpcn.dts.
From: Jon Loeliger @ 2006-08-17 21:20 UTC (permalink / raw)
To: Hollis Blanchard; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <1155840700.27466.64.camel@basalt.austin.ibm.com>
Rather than using some hand-coded linux,phandle
node references, use DTC's direct node refs ability
and let it manage the phandle names instead.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
---
On Thu, 2006-08-17 at 13:51, Hollis Blanchard wrote:
> Doesn't the device tree compiler add linux,phandle properties as needed?
> In this case that would be when the node is referenced by a
> "<&/foo/bar/i8259@4d0>" property.
>
> On Thu, 2006-08-17 at 12:24 -0500, Jon Loeliger wrote:
> > Add 'linux,phandle' entry to i8259@4d0 node.
> >
> > Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
> > Signed-off-by: Jon Loeliger <jdl@freescale.com>
> > ---
Paul,
If you think this is better, please apply this patch
instead of my previous patch with the subject line:
Patch] Fix the mpc8641_hpcn.dts file.
Thanks,
jdl
arch/powerpc/boot/dts/mpc8641_hpcn.dts | 121 ++++++++++++++++----------------
1 files changed, 60 insertions(+), 61 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index e832a88..49d85a5 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -32,7 +32,6 @@
bus-frequency = <0>; // From uboot
clock-frequency = <0>; // From uboot
32-bit;
- linux,boot-cpu;
};
PowerPC,8641@1 {
device_type = "cpu";
@@ -202,95 +201,95 @@
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x11 */
- 8800 0 0 1 4d0 3 2
- 8800 0 0 2 4d0 4 2
- 8800 0 0 3 4d0 5 2
- 8800 0 0 4 4d0 6 2
+ 8800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 3 2
+ 8800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 4 2
+ 8800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 5 2
+ 8800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 6 2
/* IDSEL 0x12 */
- 9000 0 0 1 4d0 4 2
- 9000 0 0 2 4d0 5 2
- 9000 0 0 3 4d0 6 2
- 9000 0 0 4 4d0 3 2
+ 9000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 4 2
+ 9000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 5 2
+ 9000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 6 2
+ 9000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 3 2
/* IDSEL 0x13 */
- 9800 0 0 1 4d0 0 0
- 9800 0 0 2 4d0 0 0
- 9800 0 0 3 4d0 0 0
- 9800 0 0 4 4d0 0 0
+ 9800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ 9800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ 9800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ 9800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
/* IDSEL 0x14 */
- a000 0 0 1 4d0 0 0
- a000 0 0 2 4d0 0 0
- a000 0 0 3 4d0 0 0
- a000 0 0 4 4d0 0 0
+ a000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ a000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ a000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ a000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
/* IDSEL 0x15 */
- a800 0 0 1 4d0 0 0
- a800 0 0 2 4d0 0 0
- a800 0 0 3 4d0 0 0
- a800 0 0 4 4d0 0 0
+ a800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ a800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ a800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ a800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
/* IDSEL 0x16 */
- b000 0 0 1 4d0 0 0
- b000 0 0 2 4d0 0 0
- b000 0 0 3 4d0 0 0
- b000 0 0 4 4d0 0 0
+ b000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ b000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ b000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ b000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
/* IDSEL 0x17 */
- b800 0 0 1 4d0 0 0
- b800 0 0 2 4d0 0 0
- b800 0 0 3 4d0 0 0
- b800 0 0 4 4d0 0 0
+ b800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ b800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ b800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ b800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
/* IDSEL 0x18 */
- c000 0 0 1 4d0 0 0
- c000 0 0 2 4d0 0 0
- c000 0 0 3 4d0 0 0
- c000 0 0 4 4d0 0 0
+ c000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ c000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ c000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ c000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
/* IDSEL 0x19 */
- c800 0 0 1 4d0 0 0
- c800 0 0 2 4d0 0 0
- c800 0 0 3 4d0 0 0
- c800 0 0 4 4d0 0 0
+ c800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ c800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ c800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ c800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
/* IDSEL 0x1a */
- d000 0 0 1 4d0 6 2
- d000 0 0 2 4d0 3 2
- d000 0 0 3 4d0 4 2
- d000 0 0 4 4d0 5 2
+ d000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 6 2
+ d000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 3 2
+ d000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 4 2
+ d000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 5 2
/* IDSEL 0x1b */
- d800 0 0 1 4d0 5 2
- d800 0 0 2 4d0 0 0
- d800 0 0 3 4d0 0 0
- d800 0 0 4 4d0 0 0
+ d800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 5 2
+ d800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ d800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ d800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
/* IDSEL 0x1c */
- e000 0 0 1 4d0 9 2
- e000 0 0 2 4d0 a 2
- e000 0 0 3 4d0 c 2
- e000 0 0 4 4d0 7 2
+ e000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 9 2
+ e000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 a 2
+ e000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 c 2
+ e000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 7 2
/* IDSEL 0x1d */
- e800 0 0 1 4d0 9 2
- e800 0 0 2 4d0 a 2
- e800 0 0 3 4d0 b 2
- e800 0 0 4 4d0 0 0
+ e800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 9 2
+ e800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 a 2
+ e800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 b 2
+ e800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
/* IDSEL 0x1e */
- f000 0 0 1 4d0 c 2
- f000 0 0 2 4d0 0 0
- f000 0 0 3 4d0 0 0
- f000 0 0 4 4d0 0 0
+ f000 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 c 2
+ f000 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ f000 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ f000 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
/* IDSEL 0x1f */
- f800 0 0 1 4d0 6 2
- f800 0 0 2 4d0 0 0
- f800 0 0 3 4d0 0 0
- f800 0 0 4 4d0 0 0
+ f800 0 0 1 &/soc8641@f8000000/pci@8000/i8259@4d0 6 2
+ f800 0 0 2 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ f800 0 0 3 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
+ f800 0 0 4 &/soc8641@f8000000/pci@8000/i8259@4d0 0 0
>;
i8259@4d0 {
clock-frequency = <0>;
--
2006_06_07.01.gittree_pull-dirty
^ permalink raw reply related
* Re: [PATCH 6/6] bootwrapper: Add support for the sandpoint platform
From: Mark A. Greer @ 2006-08-17 21:18 UTC (permalink / raw)
To: Mark A. Greer; +Cc: linuxppc-dev, Guennadi Liakhovetski
In-Reply-To: <20060817211353.GA1402@mag.az.mvista.com>
On Thu, Aug 17, 2006 at 02:13:53PM -0700, Mark A. Greer wrote:
> prepare things--the flat dev tree in this case--so that the kernel
> can boot when running the DINK firmware on a sandpoint.
I should rephrase this to, "so that the kernel will boot on a system
that has DINK as its firmware."
Mark
^ permalink raw reply
* Re: [PATCH 6/6] bootwrapper: Add support for the sandpoint platform
From: Mark A. Greer @ 2006-08-17 21:13 UTC (permalink / raw)
To: Guennadi Liakhovetski; +Cc: linuxppc-dev
In-Reply-To: <Pine.LNX.4.60.0608172200080.8228@poirot.grange>
On Thu, Aug 17, 2006 at 10:16:16PM +0200, Guennadi Liakhovetski wrote:
> On Wed, 19 Jul 2006, Mark A. Greer wrote:
>
> > This patch adds support for the Freescale Sandpoint platform
> > to the bootwrapper.
Hi Guennadi.
> Mark,
>
> you put sandpoint.c and mpc10x.c under boot... I don't quite understand
> your concept now: you mean this is the code needed to __boot__ sandpoint.
Depends on what you mean by "__boot__". This is the code needed to
prepare things--the flat dev tree in this case--so that the kernel
can boot when running the DINK firmware on a sandpoint.
> Ok. I can also imagine that as soon as the system is up you don't need any
> further specific code - only .init* sections. But - does this mean that
> every platform will now put its support flat under boot?
You need to read <file:Documentation/powerpc/booting-without-of.txt>.
> Or is it a
> special case? Or are there also run-time fixups that you didn't include
> with this patch-series? Also <board>_reset doesn't quite fit under boot,
Yes it does. Follow exit().
> or am I misunderstanding something?
Yes, you're missing the whole point of the patch series...
Did you read "[PATCH 0/6] bootwrapper: arch/powerpc/boot code reorg
patches"?
The intent was not to add kernel support for the sanpoint. The intent
was to solicit comments on a reorg of the bootwrapper code.
Mark
^ permalink raw reply
* Re: [PATCH 4/6] POWERPC: add support of mpc8560 eval board
From: Segher Boessenkool @ 2006-08-17 20:55 UTC (permalink / raw)
To: Andy Fleming; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <6A1F08CA-2FAE-4BE6-82BF-30F35053483C@freescale.com>
>> + pic@40000 {
>> + linux,phandle = <40000>;
>> + interrupt-controller;
>> + #address-cells = <0>;
>> + #interrupt-cells = <2>;
>> + reg = <40000 20100>;
>> + built-in;
>> + device_type = "mpic";
>
> This is wrong. It should be "open-pic";
Not necessarily; if not, it should have "open-pic" somewhere
in the "compatible" property though.
Best might be to have device_type = interrupt-controller,
and put "mpic,open-pic" in the "compatible" property (no
comma but a zero byte...)
Or prefix it with the name of your _exact_ interrupt controller,
even.
Segher
^ permalink raw reply
* Re: [PATCH] fix gettimeofday vs. update_gtod race
From: Nathan Lynch @ 2006-08-17 20:47 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <1155774477.11312.137.camel@localhost.localdomain>
Benjamin Herrenschmidt wrote:
> On Wed, 2006-08-16 at 19:18 -0500, Nathan Lynch wrote:
>
> > No? I didn't find anything about mftb having synchronizing
> > behavior. How should we ensure that temp_varp is assigned before
> > reading the timebase?
>
> I sync an isync would be enough.
I see, thanks.
> > > I need to think about it a bit more closely but what about instead
> > > just check if tb_ticks goes negative, and if yes, just do get_tb()
> > > again ? That might be faster than having a sync in there and should
> > > still be correct.
> >
> > I did try something like that but found that a loop (i.e. multiple
> > get_tb's to "catch up") was necessary.
>
> Hrm... even with an isync ?
No, sorry, I was confusing this with a different bug (cpu
hotplug-related, separate patch for that forthcoming).
^ permalink raw reply
* Re: [openib-general] [PATCH 00/16] IB/ehca: introduction
From: Roland Dreier @ 2006-08-17 20:31 UTC (permalink / raw)
To: openib-general, linux-kernel, linuxppc-dev, RAISCH, HNGUYEN,
MEDER
In-Reply-To: <2006817139.43eVtRoa2IK8yOPl@cisco.com>
Sorry-- my patchbombing script blew up in the middle, and I didn't
restart quite correctly. But I'm pretty sure all 16 patches did make
it out, although the numbering is screwy. The correct series is:
01/16, 02/16, 00/13, 01/13, ..., 13/13
I'm not going to spam everybody and resend to all the lists, but I'm
happy to resend privately to anyone who asks, or you can clone the
git tree to get the series
git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband.git ehca
Thanks,
Roland
^ permalink raw reply
* InfiniBand merge plans for 2.6.19
From: Roland Dreier @ 2006-08-17 20:13 UTC (permalink / raw)
To: linux-kernel, netdev, linuxppc-dev, openib-general
Here's a short summary of what I plan to merge for 2.6.19. Some of
this is already in infiniband.git[1], while some still needs to be
merged up. Highlights:
o iWARP core support[2]. This updates drivers/infiniband to work
with devices that do RDMA over IP/ethernet in addition to
InfiniBand devices. As a first user of this support, I also
plan to merge the amso1100[3] driver for Ammasso RNIC.
I will post this for review one more time after I pull it into
my git tree for last minute cleanups. But if you feel this
iWARP support should not be merged, please let me know why now.
o IBM eHCA driver, which supports IBM pSeries-specific InfiniBand
hardware. This is in the ehca branch of infiniband.git, and I
will post it for review one more time. My feeling is that more
cleanups are certainly possible, but this driver is "good
enough to merge" now and has languished out of tree for long
enough. I'm certainly happy to merge cleanup patches, though.
o mmap()ed userspace work queues for ipath. This is a
performance enhancement for QLogic/PathScale HCAs but it does
touch core stuff in minor ways. Should not be controversial.
o I also have the following minor changes queued in the
for-2.6.19 branch of infiniband.git:
Ishai Rabinovitz:
IB/srp: Add port/device attributes
James Lentini:
IB/mthca: Include the header we really want
Michael S. Tsirkin:
IB/mthca: Don't use privileged UAR for kernel access
IB/ipoib: Fix flush/start xmit race (from code review)
Roland Dreier:
IB/uverbs: Use idr_read_cq() where appropriate
IB/uverbs: Fix lockdep warning when QP is created with 2 CQs
[1] git://git.kernel.org/pub/scm/linux/kernel/git/roland/infiniband.git
[2] http://thread.gmane.org/gmane.linux.network/40903
[3] http://thread.gmane.org/gmane.linux.drivers.openib/28657
^ permalink raw reply
* [PATCH 13/13] IB/ehca: makefiles/kconfig
From: Roland Dreier @ 2006-08-17 20:11 UTC (permalink / raw)
To: openib-general, linux-kernel, linuxppc-dev; +Cc: RAISCH, HNGUYEN, MEDER
In-Reply-To: <20068171311.P1OwgyzMAlKlrkeW@cisco.com>
drivers/infiniband/Kconfig | 1 +
drivers/infiniband/Makefile | 1 +
drivers/infiniband/hw/ehca/Kconfig | 12 ++++++++++++
drivers/infiniband/hw/ehca/Makefile | 18 ++++++++++++++++++
4 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/drivers/infiniband/Kconfig b/drivers/infiniband/Kconfig
index 69a53d4..fd2d528 100644
--- a/drivers/infiniband/Kconfig
+++ b/drivers/infiniband/Kconfig
@@ -36,6 +36,7 @@ config INFINIBAND_ADDR_TRANS
source "drivers/infiniband/hw/mthca/Kconfig"
source "drivers/infiniband/hw/ipath/Kconfig"
+source "drivers/infiniband/hw/ehca/Kconfig"
source "drivers/infiniband/ulp/ipoib/Kconfig"
diff --git a/drivers/infiniband/Makefile b/drivers/infiniband/Makefile
index c7ff58c..893bee0 100644
--- a/drivers/infiniband/Makefile
+++ b/drivers/infiniband/Makefile
@@ -1,6 +1,7 @@
obj-$(CONFIG_INFINIBAND) += core/
obj-$(CONFIG_INFINIBAND_MTHCA) += hw/mthca/
obj-$(CONFIG_IPATH_CORE) += hw/ipath/
+obj-$(CONFIG_INFINIBAND_EHCA) += hw/ehca/
obj-$(CONFIG_INFINIBAND_IPOIB) += ulp/ipoib/
obj-$(CONFIG_INFINIBAND_SRP) += ulp/srp/
obj-$(CONFIG_INFINIBAND_ISER) += ulp/iser/
diff --git a/drivers/infiniband/hw/ehca/Kconfig b/drivers/infiniband/hw/ehca/Kconfig
new file mode 100644
index 0000000..12285d0
--- /dev/null
+++ b/drivers/infiniband/hw/ehca/Kconfig
@@ -0,0 +1,12 @@
+config INFINIBAND_EHCA
+ tristate "eHCA support"
+ depends on IBMEBUS && INFINIBAND
+ ---help---
+ This is a low level device driver for the IBM GX based Host channel
+ adapters (HCAs).
+
+config INFINIBAND_EHCA_SCALING
+ bool "Scaling support (EXPERIMENTAL)"
+ depends on IBMEBUS && INFINIBAND_EHCA && HOTPLUG_CPU && EXPERIMENTAL
+ ---help---
+ eHCA scaling support schedules the CQ callbacks to different CPUs.
diff --git a/drivers/infiniband/hw/ehca/Makefile b/drivers/infiniband/hw/ehca/Makefile
new file mode 100644
index 0000000..70032cf
--- /dev/null
+++ b/drivers/infiniband/hw/ehca/Makefile
@@ -0,0 +1,18 @@
+# Authors: Heiko J Schick <schickhj@de.ibm.com>
+# Christoph Raisch <raisch@de.ibm.com>
+# Joachim Fenkes <fenkes@de.ibm.com>
+#
+# Copyright (c) 2005 IBM Corporation
+#
+# All rights reserved.
+#
+# This source code is distributed under a dual license of GPL v2.0 and OpenIB BSD.
+
+obj-$(CONFIG_INFINIBAND_EHCA) += hcad_mod.o
+
+
+hcad_mod-objs = ehca_main.o ehca_hca.o ehca_mcast.o ehca_pd.o ehca_av.o ehca_eq.o \
+ ehca_cq.o ehca_qp.o ehca_sqp.o ehca_mrmw.o ehca_reqs.o ehca_irq.o \
+ ehca_uverbs.o ipz_pt_fn.o hcp_if.o hcp_phyp.o
+
+CFLAGS += -DEHCA_USE_HCALL -DEHCA_USE_HCALL_KERNEL
--
1.4.1
^ permalink raw reply related
* [PATCH 02/13] IB/ehca: includes
From: Roland Dreier @ 2006-08-17 20:11 UTC (permalink / raw)
To: openib-general, linux-kernel, linuxppc-dev; +Cc: RAISCH, HNGUYEN, MEDER
In-Reply-To: <20068171311.qHSUlh5t6lpV4BeW@cisco.com>
drivers/infiniband/hw/ehca/ehca_iverbs.h | 181 +++++++++++++
drivers/infiniband/hw/ehca/ehca_tools.h | 417 ++++++++++++++++++++++++++++++
2 files changed, 598 insertions(+), 0 deletions(-)
diff --git a/drivers/infiniband/hw/ehca/ehca_iverbs.h b/drivers/infiniband/hw/ehca/ehca_iverbs.h
new file mode 100644
index 0000000..bbdc437
--- /dev/null
+++ b/drivers/infiniband/hw/ehca/ehca_iverbs.h
@@ -0,0 +1,181 @@
+/*
+ * IBM eServer eHCA Infiniband device driver for Linux on POWER
+ *
+ * Function definitions for internal functions
+ *
+ * Authors: Heiko J Schick <schickhj@de.ibm.com>
+ * Dietmar Decker <ddecker@de.ibm.com>
+ *
+ * Copyright (c) 2005 IBM Corporation
+ *
+ * All rights reserved.
+ *
+ * This source code is distributed under a dual license of GPL v2.0 and OpenIB
+ * BSD.
+ *
+ * OpenIB BSD License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials
+ * provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __EHCA_IVERBS_H__
+#define __EHCA_IVERBS_H__
+
+#include "ehca_classes.h"
+
+int ehca_query_device(struct ib_device *ibdev, struct ib_device_attr *props);
+
+int ehca_query_port(struct ib_device *ibdev, u8 port,
+ struct ib_port_attr *props);
+
+int ehca_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 * pkey);
+
+int ehca_query_gid(struct ib_device *ibdev, u8 port, int index,
+ union ib_gid *gid);
+
+int ehca_modify_port(struct ib_device *ibdev, u8 port, int port_modify_mask,
+ struct ib_port_modify *props);
+
+struct ib_pd *ehca_alloc_pd(struct ib_device *device,
+ struct ib_ucontext *context,
+ struct ib_udata *udata);
+
+int ehca_dealloc_pd(struct ib_pd *pd);
+
+struct ib_ah *ehca_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
+
+int ehca_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr);
+
+int ehca_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr);
+
+int ehca_destroy_ah(struct ib_ah *ah);
+
+struct ib_mr *ehca_get_dma_mr(struct ib_pd *pd, int mr_access_flags);
+
+struct ib_mr *ehca_reg_phys_mr(struct ib_pd *pd,
+ struct ib_phys_buf *phys_buf_array,
+ int num_phys_buf,
+ int mr_access_flags, u64 *iova_start);
+
+struct ib_mr *ehca_reg_user_mr(struct ib_pd *pd,
+ struct ib_umem *region,
+ int mr_access_flags, struct ib_udata *udata);
+
+int ehca_rereg_phys_mr(struct ib_mr *mr,
+ int mr_rereg_mask,
+ struct ib_pd *pd,
+ struct ib_phys_buf *phys_buf_array,
+ int num_phys_buf, int mr_access_flags, u64 *iova_start);
+
+int ehca_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr);
+
+int ehca_dereg_mr(struct ib_mr *mr);
+
+struct ib_mw *ehca_alloc_mw(struct ib_pd *pd);
+
+int ehca_bind_mw(struct ib_qp *qp, struct ib_mw *mw,
+ struct ib_mw_bind *mw_bind);
+
+int ehca_dealloc_mw(struct ib_mw *mw);
+
+struct ib_fmr *ehca_alloc_fmr(struct ib_pd *pd,
+ int mr_access_flags,
+ struct ib_fmr_attr *fmr_attr);
+
+int ehca_map_phys_fmr(struct ib_fmr *fmr,
+ u64 *page_list, int list_len, u64 iova);
+
+int ehca_unmap_fmr(struct list_head *fmr_list);
+
+int ehca_dealloc_fmr(struct ib_fmr *fmr);
+
+enum ehca_eq_type {
+ EHCA_EQ = 0, /* Event Queue */
+ EHCA_NEQ /* Notification Event Queue */
+};
+
+int ehca_create_eq(struct ehca_shca *shca, struct ehca_eq *eq,
+ enum ehca_eq_type type, const u32 length);
+
+int ehca_destroy_eq(struct ehca_shca *shca, struct ehca_eq *eq);
+
+void *ehca_poll_eq(struct ehca_shca *shca, struct ehca_eq *eq);
+
+
+struct ib_cq *ehca_create_cq(struct ib_device *device, int cqe,
+ struct ib_ucontext *context,
+ struct ib_udata *udata);
+
+int ehca_destroy_cq(struct ib_cq *cq);
+
+int ehca_resize_cq(struct ib_cq *cq, int cqe, struct ib_udata *udata);
+
+int ehca_poll_cq(struct ib_cq *cq, int num_entries, struct ib_wc *wc);
+
+int ehca_peek_cq(struct ib_cq *cq, int wc_cnt);
+
+int ehca_req_notify_cq(struct ib_cq *cq, enum ib_cq_notify cq_notify);
+
+struct ib_qp *ehca_create_qp(struct ib_pd *pd,
+ struct ib_qp_init_attr *init_attr,
+ struct ib_udata *udata);
+
+int ehca_destroy_qp(struct ib_qp *qp);
+
+int ehca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask);
+
+int ehca_query_qp(struct ib_qp *qp, struct ib_qp_attr *qp_attr,
+ int qp_attr_mask, struct ib_qp_init_attr *qp_init_attr);
+
+int ehca_post_send(struct ib_qp *qp, struct ib_send_wr *send_wr,
+ struct ib_send_wr **bad_send_wr);
+
+int ehca_post_recv(struct ib_qp *qp, struct ib_recv_wr *recv_wr,
+ struct ib_recv_wr **bad_recv_wr);
+
+u64 ehca_define_sqp(struct ehca_shca *shca, struct ehca_qp *ibqp,
+ struct ib_qp_init_attr *qp_init_attr);
+
+int ehca_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
+
+int ehca_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
+
+struct ib_ucontext *ehca_alloc_ucontext(struct ib_device *device,
+ struct ib_udata *udata);
+
+int ehca_dealloc_ucontext(struct ib_ucontext *context);
+
+int ehca_mmap(struct ib_ucontext *context, struct vm_area_struct *vma);
+
+void ehca_poll_eqs(unsigned long data);
+
+int ehca_mmap_nopage(u64 foffset,u64 length,void **mapped,
+ struct vm_area_struct **vma);
+
+int ehca_mmap_register(u64 physical,void **mapped,
+ struct vm_area_struct **vma);
+
+int ehca_munmap(unsigned long addr, size_t len);
+
+#endif
diff --git a/drivers/infiniband/hw/ehca/ehca_tools.h b/drivers/infiniband/hw/ehca/ehca_tools.h
new file mode 100644
index 0000000..783fbb3
--- /dev/null
+++ b/drivers/infiniband/hw/ehca/ehca_tools.h
@@ -0,0 +1,417 @@
+/*
+ * IBM eServer eHCA Infiniband device driver for Linux on POWER
+ *
+ * auxiliary functions
+ *
+ * Authors: Christoph Raisch <raisch@de.ibm.com>
+ * Hoang-Nam Nguyen <hnguyen@de.ibm.com>
+ * Khadija Souissi <souissik@de.ibm.com>
+ * Waleri Fomin <fomin@de.ibm.com>
+ * Heiko J Schick <schickhj@de.ibm.com>
+ *
+ * Copyright (c) 2005 IBM Corporation
+ *
+ * This source code is distributed under a dual license of GPL v2.0 and OpenIB
+ * BSD.
+ *
+ * OpenIB BSD License
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials
+ * provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
+ * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+
+#ifndef EHCA_TOOLS_H
+#define EHCA_TOOLS_H
+
+#include <linux/kernel.h>
+#include <linux/spinlock.h>
+#include <linux/delay.h>
+#include <linux/idr.h>
+#include <linux/kthread.h>
+#include <linux/mm.h>
+#include <linux/mman.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/vmalloc.h>
+#include <linux/version.h>
+#include <linux/notifier.h>
+#include <linux/cpu.h>
+
+#include <asm/abs_addr.h>
+#include <asm/ibmebus.h>
+#include <asm/io.h>
+#include <asm/pgtable.h>
+
+#define EHCA_EDEB_TRACE_MASK_SIZE 32
+extern u8 ehca_edeb_mask[EHCA_EDEB_TRACE_MASK_SIZE];
+#define EDEB_ID_TO_U32(str4) (str4[3] | (str4[2] << 8) | (str4[1] << 16) | \
+ (str4[0] << 24))
+
+static inline u64 ehca_edeb_filter(const u32 level,
+ const u32 id, const u32 line)
+{
+ u64 ret = 0;
+ u32 filenr = 0;
+ u32 filter_level = 9;
+ u32 dynamic_level = 0;
+
+ /*
+ * This is code written for the gcc -O2 optimizer
+ * which should collapse to two single ints.
+ * Filter_level is the first level kicked out by
+ * compiler and means trace everything below 6.
+ */
+
+ if (id == EDEB_ID_TO_U32("ehav")) {
+ filenr = 0x01;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("clas")) {
+ filenr = 0x02;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("cqeq")) {
+ filenr = 0x03;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("shca")) {
+ filenr = 0x05;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("eirq")) {
+ filenr = 0x06;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("lMad")) {
+ filenr = 0x07;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("mcas")) {
+ filenr = 0x08;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("mrmw")) {
+ filenr = 0x09;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("vpd ")) {
+ filenr = 0x0a;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("e_qp")) {
+ filenr = 0x0b;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("uqes")) {
+ filenr = 0x0c;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("PHYP")) {
+ filenr = 0x0d;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("hcpi")) {
+ filenr = 0x0e;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("iptz")) {
+ filenr = 0x0f;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("spta")) {
+ filenr = 0x10;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("simp")) {
+ filenr = 0x11;
+ filter_level = 8;
+ }
+ if (id == EDEB_ID_TO_U32("reqs")) {
+ filenr = 0x12;
+ filter_level = 8;
+ }
+
+ if ((filenr - 1) > sizeof(ehca_edeb_mask)) {
+ filenr = 0;
+ }
+
+ if (filenr == 0) {
+ filter_level = 9;
+ } /* default */
+ ret = filenr * 0x10000 + line;
+ if (filter_level <= level) {
+ return ret | 0x100000000L; /* this is the flag to not trace */
+ }
+ dynamic_level = ehca_edeb_mask[filenr];
+ if (likely(dynamic_level <= level)) {
+ ret = ret | 0x100000000L;
+ };
+ return ret;
+}
+
+#ifdef EHCA_USE_HCALL_KERNEL
+#ifdef CONFIG_PPC_PSERIES
+
+#include <asm/paca.h>
+
+/*
+ * IS_EDEB_ON - Checks if debug is on for the given level.
+ */
+#define IS_EDEB_ON(level) \
+((ehca_edeb_filter(level, EDEB_ID_TO_U32(DEB_PREFIX), __LINE__) & \
+ 0x100000000L) == 0)
+
+#define EDEB_P_GENERIC(level,idstring,format,args...) \
+do { \
+ u64 ehca_edeb_filterresult = \
+ ehca_edeb_filter(level, EDEB_ID_TO_U32(DEB_PREFIX), __LINE__);\
+ if ((ehca_edeb_filterresult & 0x100000000L) == 0) \
+ printk("PU%04x %08x:%s " idstring " "format "\n", \
+ get_paca()->paca_index, (u32)(ehca_edeb_filterresult), \
+ __func__, ##args); \
+} while (1 == 0)
+
+#elif REAL_HCALL
+
+#define EDEB_P_GENERIC(level,idstring,format,args...) \
+do { \
+ u64 ehca_edeb_filterresult = \
+ ehca_edeb_filter(level, EDEB_ID_TO_U32(DEB_PREFIX), __LINE__); \
+ if ((ehca_edeb_filterresult & 0x100000000L) == 0) \
+ printk("%08x:%s " idstring " "format "\n", \
+ (u32)(ehca_edeb_filterresult), \
+ __func__, ##args); \
+} while (1 == 0)
+
+#endif
+#else
+
+#define IS_EDEB_ON(level) (1)
+
+#define EDEB_P_GENERIC(level,idstring,format,args...) \
+do { \
+ printk("%s " idstring " "format "\n", \
+ __func__, ##args); \
+} while (1 == 0)
+
+#endif
+
+/**
+ * EDEB - Trace output macro.
+ * @level: tracelevel
+ * @format: optional format string, use "" if not desired
+ * @args: printf like arguments for trace
+ */
+#define EDEB(level,format,args...) \
+ EDEB_P_GENERIC(level,"",format,##args)
+#define EDEB_ERR(level,format,args...) \
+ EDEB_P_GENERIC(level,"HCAD_ERROR ",format,##args)
+#define EDEB_EN(level,format,args...) \
+ EDEB_P_GENERIC(level,">>>",format,##args)
+#define EDEB_EX(level,format,args...) \
+ EDEB_P_GENERIC(level,"<<<",format,##args)
+
+/**
+ * EDEB_DMP - macro to dump a memory block, whose length is n*8 bytes.
+ * Each line has the following layout:
+ * <format string> adr=X ofs=Y <8 bytes hex> <8 bytes hex>
+ */
+#define EDEB_DMP(level,adr,len,format,args...) \
+ do { \
+ unsigned int x; \
+ unsigned int l = (unsigned int)(len); \
+ unsigned char *deb = (unsigned char*)(adr); \
+ for (x = 0; x < l; x += 16) { \
+ EDEB(level, format " adr=%p ofs=%04x %016lx %016lx", \
+ ##args, deb, x, \
+ *((u64 *)&deb[0]), *((u64 *)&deb[8])); \
+ deb += 16; \
+ } \
+ } while (0)
+
+/* define a bitmask, little endian version */
+#define EHCA_BMASK(pos,length) (((pos)<<16)+(length))
+
+/* define a bitmask, the ibm way... */
+#define EHCA_BMASK_IBM(from,to) (((63-to)<<16)+((to)-(from)+1))
+
+/* internal function, don't use */
+#define EHCA_BMASK_SHIFTPOS(mask) (((mask)>>16)&0xffff)
+
+/* internal function, don't use */
+#define EHCA_BMASK_MASK(mask) (0xffffffffffffffffULL >> ((64-(mask))&0xffff))
+
+/**
+ * EHCA_BMASK_SET - return value shifted and masked by mask
+ * variable|=EHCA_BMASK_SET(MY_MASK,0x4711) ORs the bits in variable
+ * variable&=~EHCA_BMASK_SET(MY_MASK,-1) clears the bits from the mask
+ * in variable
+ */
+#define EHCA_BMASK_SET(mask,value) \
+ ((EHCA_BMASK_MASK(mask) & ((u64)(value)))<<EHCA_BMASK_SHIFTPOS(mask))
+
+/**
+ * EHCA_BMASK_GET - extract a parameter from value by mask
+ */
+#define EHCA_BMASK_GET(mask,value) \
+ ( EHCA_BMASK_MASK(mask)& (((u64)(value))>>EHCA_BMASK_SHIFTPOS(mask)))
+
+#define PARANOIA_MODE
+#ifdef PARANOIA_MODE
+
+#define EHCA_CHECK_ADR_P(adr) \
+ if (unlikely(adr == 0)) { \
+ EDEB_ERR(4, "adr=%p check failed line %i", adr, \
+ __LINE__); \
+ return ERR_PTR(-EFAULT); }
+
+#define EHCA_CHECK_ADR(adr) \
+ if (unlikely(adr == 0)) { \
+ EDEB_ERR(4, "adr=%p check failed line %i", adr, \
+ __LINE__); \
+ return -EFAULT; }
+
+#define EHCA_CHECK_DEVICE_P(device) \
+ if (unlikely(device == 0)) { \
+ EDEB_ERR(4, "device=%p check failed", device); \
+ return ERR_PTR(-EFAULT); }
+
+#define EHCA_CHECK_DEVICE(device) \
+ if (unlikely(device == 0)) { \
+ EDEB_ERR(4, "device=%p check failed", device); \
+ return -EFAULT; }
+
+#define EHCA_CHECK_PD(pd) \
+ if (unlikely(pd == 0)) { \
+ EDEB_ERR(4, "pd=%p check failed", pd); \
+ return -EFAULT; }
+
+#define EHCA_CHECK_PD_P(pd) \
+ if (unlikely(pd == 0)) { \
+ EDEB_ERR(4, "pd=%p check failed", pd); \
+ return ERR_PTR(-EFAULT); }
+
+#define EHCA_CHECK_AV(av) \
+ if (unlikely(av == 0)) { \
+ EDEB_ERR(4, "av=%p check failed", av); \
+ return -EFAULT; }
+
+#define EHCA_CHECK_AV_P(av) \
+ if (unlikely(av == 0)) { \
+ EDEB_ERR(4, "av=%p check failed", av); \
+ return ERR_PTR(-EFAULT); }
+
+#define EHCA_CHECK_CQ(cq) \
+ if (unlikely(cq == 0)) { \
+ EDEB_ERR(4, "cq=%p check failed", cq); \
+ return -EFAULT; }
+
+#define EHCA_CHECK_CQ_P(cq) \
+ if (unlikely(cq == 0)) { \
+ EDEB_ERR(4, "cq=%p check failed", cq); \
+ return ERR_PTR(-EFAULT); }
+
+#define EHCA_CHECK_EQ(eq) \
+ if (unlikely(eq == 0)) { \
+ EDEB_ERR(4, "eq=%p check failed", eq); \
+ return -EFAULT; }
+
+#define EHCA_CHECK_EQ_P(eq) \
+ if (unlikely(eq == 0)) { \
+ EDEB_ERR(4, "eq=%p check failed", eq); \
+ return ERR_PTR(-EFAULT); }
+
+#define EHCA_CHECK_QP(qp) \
+ if (unlikely(qp == 0)) { \
+ EDEB_ERR(4, "qp=%p check failed", qp); \
+ return -EFAULT; }
+
+#define EHCA_CHECK_QP_P(qp) \
+ if (unlikely(qp == 0)) { \
+ EDEB_ERR(4, "qp=%p check failed", qp); \
+ return ERR_PTR(-EFAULT); }
+
+#define EHCA_CHECK_MR(mr) \
+ if (unlikely(mr == 0)) { \
+ EDEB_ERR(4, "mr=%p check failed", mr); \
+ return -EFAULT; }
+
+#define EHCA_CHECK_MR_P(mr) \
+ if (unlikely(mr == 0)) { \
+ EDEB_ERR(4, "mr=%p check failed", mr); \
+ return ERR_PTR(-EFAULT); }
+
+#define EHCA_CHECK_MW(mw) \
+ if (unlikely(mw == 0)) { \
+ EDEB_ERR(4, "mw=%p check failed", mw); \
+ return -EFAULT; }
+
+#define EHCA_CHECK_MW_P(mw) \
+ if (unlikely(mw == 0)) { \
+ EDEB_ERR(4, "mw=%p check failed", mw); \
+ return ERR_PTR(-EFAULT); }
+
+#define EHCA_CHECK_FMR(fmr) \
+ if (unlikely(fmr == 0)) { \
+ EDEB_ERR(4, "fmr=%p check failed", fmr); \
+ return -EFAULT; }
+
+#define EHCA_CHECK_FMR_P(fmr) \
+ if (unlikely(fmr == 0)) { \
+ EDEB_ERR(4, "fmr=%p check failed", fmr); \
+ return ERR_PTR(-EFAULT); }
+
+#define EHCA_REGISTER_PD(device,pd)
+#define EHCA_REGISTER_AV(pd,av)
+#define EHCA_DEREGISTER_PD(PD)
+#define EHCA_DEREGISTER_AV(av)
+#else
+#define EHCA_CHECK_DEVICE_P(device)
+
+#define EHCA_CHECK_PD(pd)
+#define EHCA_REGISTER_PD(device,pd)
+#define EHCA_DEREGISTER_PD(PD)
+#endif
+
+static inline int ehca_adr_bad(void *adr)
+{
+ return !adr;
+}
+
+/* Converts ehca to ib return code */
+static inline int ehca2ib_return_code(u64 ehca_rc)
+{
+ switch (ehca_rc) {
+ case H_SUCCESS:
+ return 0;
+ case H_BUSY:
+ return -EBUSY;
+ case H_NO_MEM:
+ return -ENOMEM;
+ default:
+ return -EINVAL;
+ }
+}
+
+#endif /* EHCA_TOOLS_H */
--
1.4.1
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