* Re: [2.6.19 PATCH 2/7] ehea: pHYP interface
From: Christoph Raisch @ 2006-08-18 16:02 UTC (permalink / raw)
To: Anton Blanchard
Cc: Thomas Q Klein, Jan-Bernd Themann, netdev, linux-kernel,
linux-ppc, Marcus Eder, tklein, Alexey Dobriyan
In-Reply-To: <20060818151340.GB27947@krispykreme>
>
> Hi,
>
> > I asked SO to recount arguments and we've come to a conclusion that
> > there're in fact 19 args not 18 as the name suggests. 19 args is
> > I-N-S-A-N-E.
>
> It will be partially cleaned up by:
>
> http://ozlabs.org/pipermail/linuxppc-dev/2006-July/024556.html
>
> However it doesnt fix the fact someone has architected such a crazy
> interface :(
>
> Anton
well, just as background info, this is the wrapper around
a single assembly instruction which calls system firmware and takes
9 CPU registers for input and 9 CPU registers for output parameters.
This definition by platform architecture won't change in the near future,
but the good news is with Antons change the wrapper will look much nicer.
Gruss / Regards . . . Christoph R
^ permalink raw reply
* Re: [2.6.19 PATCH 3/7] ehea: queue management
From: Arnd Bergmann @ 2006-08-18 16:16 UTC (permalink / raw)
To: linuxppc-dev
Cc: Thomas Q Klein, Jan-Bernd Themann, netdev, linux-kernel,
Christoph Raisch, Marcus Eder, tklein, abergman, Arjan van de Ven
In-Reply-To: <OFC184057C.C58732A2-ONC12571CE.004E5EF6-C12571CE.004ED1D4@de.ibm.com>
On Friday 18 August 2006 16:24, Christoph Raisch wrote:
> And as always in performance tuning... one size fits all unfortunately is
> not the correct answer.
Ah, good. What is the maximum sensible value that you came up with?
> Therefore we'll leave that open to the user as most other new ethernet
> driver did as well.
Sure. The interesting question is whether you want to allow users
to set it to a value that is no longer sensible to do with
__get_free_pages() and requires vmalloc().
Arnd <><
^ permalink raw reply
* Re: Please pull powerpc.git 'merge' branch
From: Greg KH @ 2006-08-18 16:20 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <17637.8568.40692.21510@cargo.ozlabs.ibm.com>
On Fri, Aug 18, 2006 at 12:10:00PM +1000, Paul Mackerras wrote:
> Greg,
>
> Please do:
>
> git pull \
> git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc.git merge
>
> to get the following PowerPC updates for 2.6.18.
Pulled from, and pushed out.
thanks,
greg k-h
^ permalink raw reply
* Re: [PATCH 02/13] IB/ehca: includes
From: Arnd Bergmann @ 2006-08-18 16:21 UTC (permalink / raw)
To: linuxppc-dev
Cc: Christoph Raisch, Hoang-Nam Nguyen, linux-kernel, openib-general,
Marcus Eder
In-Reply-To: <OFED0915E4.3CED6795-ONC12571CE.0053ECB8-C12571CE.0055546A@de.ibm.com>
On Friday 18 August 2006 17:35, Christoph Raisch wrote:
> we'll change these EDEBs to a wrapper around dev_err, dev_dbg and dev_warn
> as it's done in the mthca driver.
>
> ...
>
> Hope that's the "official" way how to implement it in ib drivers.
I guess it would be even better to just use the dev_* macros directly
instead of having your own wrapper. You can do that in both ehca and ehea.
Arnd <><
^ permalink raw reply
* Re: InfiniBand merge plans for 2.6.19
From: Michael S. Tsirkin @ 2006-08-18 16:21 UTC (permalink / raw)
To: Roland Dreier; +Cc: netdev, linux-kernel, openib-general, linuxppc-dev
In-Reply-To: <adawt9786ii.fsf@cisco.com>
Quoting r. Roland Dreier <rdreier@cisco.com>:
> o I also have the following minor changes queued in the
> for-2.6.19 branch of infiniband.git:
Cold you oplease consider IB/mthca: recover from device errors
as well?
--
MST
^ permalink raw reply
* Re: InfiniBand merge plans for 2.6.19
From: Roland Dreier @ 2006-08-18 16:31 UTC (permalink / raw)
To: Michael S. Tsirkin; +Cc: netdev, linux-kernel, openib-general, linuxppc-dev
In-Reply-To: <20060818162135.GA20206@mellanox.co.il>
Michael> Cold you oplease consider IB/mthca: recover from device
Michael> errors as well?
Yes, I will. There's still plenty of time before 2.6.19 opens up.
^ permalink raw reply
* Re: update: consolidated flat device tree code
From: Hollis Blanchard @ 2006-08-18 16:51 UTC (permalink / raw)
To: Pantelis Antoniou, Matthew McClintock; +Cc: linuxppc-dev, linuxppc-embedded
In-Reply-To: <1155860626.27466.126.camel@basalt.austin.ibm.com>
On Thu, 2006-08-17 at 19:23 -0500, Hollis Blanchard wrote:
> - added an explicit copyright statement.
On this subject, it's just been asked that the Xen library containing
this code be relicensed as LGPL (instead of GPL).
Panto, you're the original author of that code. Since we are trying to
make a library, I think LGPL makes sense. Is relicensing OK with you?
(Matt, this would be relevant to your outstanding patches as well.)
--
Hollis Blanchard
IBM Linux Technology Center
^ permalink raw reply
* Re: update: consolidated flat device tree code
From: Pantelis Antoniou @ 2006-08-18 16:52 UTC (permalink / raw)
To: Hollis Blanchard; +Cc: linuxppc-embedded, linuxppc-dev
In-Reply-To: <1155919908.23182.28.camel@basalt.austin.ibm.com>
On 18 =CE=91=CF=85=CE=B3 2006, at 7:51 =CE=9C=CE=9C, Hollis Blanchard =
wrote:
> On Thu, 2006-08-17 at 19:23 -0500, Hollis Blanchard wrote:
>> - added an explicit copyright statement.
>
> On this subject, it's just been asked that the Xen library containing
> this code be relicensed as LGPL (instead of GPL).
>
> Panto, you're the original author of that code. Since we are trying to
> make a library, I think LGPL makes sense. Is relicensing OK with you?
>
> (Matt, this would be relevant to your outstanding patches as well.)
>
> --=20
> Hollis Blanchard
> IBM Linux Technology Center
>
Yes, this is fine.
Please go ahead.
Pantelis
^ permalink raw reply
* Re: [PATCH] Directly reference i8259@4d0 nodes in mpc8641_hpcn.dts.
From: Jon Loeliger @ 2006-08-18 17:32 UTC (permalink / raw)
To: linuxppc-dev@ozlabs.org
In-Reply-To: <1155849609.10054.175.camel@cashmere.sps.mot.com>
On Thu, 2006-08-17 at 16:20, Jon Loeliger wrote:
> Rather than using some hand-coded linux,phandle
> node references, use DTC's direct node refs ability
> and let it manage the phandle names instead.
>
> Signed-off-by: Jon Loeliger <jdl@freescale.com>
> ---
>
> On Thu, 2006-08-17 at 13:51, Hollis Blanchard wrote:
> > Doesn't the device tree compiler add linux,phandle properties as needed?
> > In this case that would be when the node is referenced by a
> > "<&/foo/bar/i8259@4d0>" property.
> >
> > On Thu, 2006-08-17 at 12:24 -0500, Jon Loeliger wrote:
> > > Add 'linux,phandle' entry to i8259@4d0 node.
> > >
> > > Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
> > > Signed-off-by: Jon Loeliger <jdl@freescale.com>
> > > ---
>
> Paul,
>
> If you think this is better, please apply this patch
> instead of my previous patch with the subject line:
>
> Patch] Fix the mpc8641_hpcn.dts file.
>
> Thanks,
> jdl
Paul,
I'll take the application of the original patch,
Fix the mpc8641_hpcn.dts file.
as an indication that this, alternate version should
now be simply dropped!
Thanks,
jdl
^ permalink raw reply
* Re: [2.6.19 PATCH 4/7] ehea: ethtool interface
From: Stephen Hemminger @ 2006-08-18 17:45 UTC (permalink / raw)
To: Thomas Klein
Cc: Thomas Klein, Marcus, Jan-Bernd Themann, netdev, linux-kernel,
Christoph Raisch, linux-ppc, Eder, Alexey Dobriyan
In-Reply-To: <44E5DFA6.7040707@de.ibm.com>
On Fri, 18 Aug 2006 17:41:26 +0200
Thomas Klein <osstklei@de.ibm.com> wrote:
> Hi Alexey,
>
> first of all thanks a lot for the extensive review.
>
>
> Alexey Dobriyan wrote:
> >> + u64 hret = H_HARDWARE;
> >
> > Useless assignment here and everywhere.
> >
>
> Initializing returncodes to errorstate is a cheap way to prevent
> accidentally returning (uninitalized) success returncodes which
> can lead to catastrophic misbehaviour.
That is old thinking. Current compilers do live/dead analysis
and tell you about this at compile time which is better than relying
on default behavior at runtime.
^ permalink raw reply
* Re: [2.6.19 PATCH 5/7] ehea: main header files
From: Michael Neuling @ 2006-08-18 18:03 UTC (permalink / raw)
To: Jan-Bernd Themann
Cc: Thomas Klein, Jan-Bernd Themann, netdev, linux-kernel,
Thomas Klein, linux-ppc, Christoph Raisch, Marcus Eder
In-Reply-To: <200608181334.57701.ossthema@de.ibm.com>
> +static inline void ehea_update_sqa(struct ehea_qp *qp, u16 nr_wqes)
> +{
> + struct h_epa epa = qp->epas.kernel;
> + epa_store_acc(epa, QPTEMM_OFFSET(qpx_sqa),
> + EHEA_BMASK_SET(QPX_SQA_VALUE, nr_wqes));
> +}
> +
> +static inline void ehea_update_rq3a(struct ehea_qp *qp, u16 nr_wqes)
> +{
> + struct h_epa epa = qp->epas.kernel;
> + epa_store_acc(epa, QPTEMM_OFFSET(qpx_rq3a),
> + EHEA_BMASK_SET(QPX_RQ1A_VALUE, nr_wqes));
> +}
> +
> +static inline void ehea_update_rq2a(struct ehea_qp *qp, u16 nr_wqes)
> +{
> + struct h_epa epa = qp->epas.kernel;
> + epa_store_acc(epa, QPTEMM_OFFSET(qpx_rq2a),
> + EHEA_BMASK_SET(QPX_RQ1A_VALUE, nr_wqes));
> +}
> +
> +static inline void ehea_update_rq1a(struct ehea_qp *qp, u16 nr_wqes)
> +{
> + struct h_epa epa = qp->epas.kernel;
> + epa_store_acc(epa, QPTEMM_OFFSET(qpx_rq1a),
> + EHEA_BMASK_SET(QPX_RQ1A_VALUE, nr_wqes));
> +}
> +
> +static inline void ehea_update_feca(struct ehea_cq *cq, u32 nr_cqes)
> +{
> + struct h_epa epa = cq->epas.kernel;
> + epa_store_acc(epa, CQTEMM_OFFSET(cqx_feca),
> + EHEA_BMASK_SET(CQX_FECADDER, nr_cqes));
> +}
> +
> +static inline void ehea_reset_cq_n1(struct ehea_cq *cq)
> +{
> + struct h_epa epa = cq->epas.kernel;
> + epa_store_cq(epa, cqx_n1,
> + EHEA_BMASK_SET(CQX_N1_GENERATE_COMP_EVENT, 1));
> +}
> +
> +static inline void ehea_reset_cq_ep(struct ehea_cq *my_cq)
> +{
> + struct h_epa epa = my_cq->epas.kernel;
> + epa_store_acc(epa, CQTEMM_OFFSET(cqx_ep),
> + EHEA_BMASK_SET(CQX_EP_EVENT_PENDING, 0));
> +}
These are almost identical... I'm sure most (if not all) could be merged
into a single function or #define.
Mikey
^ permalink raw reply
* Re: [PATCH] powerpc: emulate power5 popcntb instruction
From: Will Schmidt @ 2006-08-18 18:11 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <36A1A5C6-5269-4BDA-9F3E-A632B3A627DB@kernel.crashing.org>
In an attempt to make it easier for a power5 optimized app to run on a
power4 or a 970 or random earlier machine, this provides emulation of
the popcntb instruction. Rewritten to use a slicker algorithm as
suggested by Segher. I left a 'tmp' variable in play, as it seemed
cleaner to use tmp than referring to regs->gpr[rs] and [ra] multiple
times within the magic algorithm.
Also tested on power4 with both 32 and 64 userspace this time.
*blush*. :-)
Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com>
---
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 2105767..a0e80dd 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -588,6 +588,8 @@ #define INST_LSWX 0x7c00042a
#define INST_STSWI 0x7c0005aa
#define INST_STSWX 0x7c00052a
+#define INST_POPCNTB 0x7c0000f4
+
static int emulate_string_inst(struct pt_regs *regs, u32 instword)
{
u8 rT = (instword >> 21) & 0x1f;
@@ -656,6 +658,23 @@ static int emulate_string_inst(struct pt
return 0;
}
+static int emulate_popcntb_inst(struct pt_regs *regs, u32 instword)
+{
+ u32 ra,rs;
+ unsigned long tmp;
+
+ ra = (instword >> 16) & 0x1f;
+ rs = (instword >> 21) & 0x1f;
+
+ tmp = regs->gpr[rs];
+ tmp = tmp - ((tmp >> 1) & 0x5555555555555555);
+ tmp = (tmp & 0x3333333333333333) + ((tmp >> 2) & 0x3333333333333333);
+ tmp = (tmp + (tmp >> 4)) & 0x0f0f0f0f0f0f0f0f;
+ regs->gpr[ra] = tmp;
+
+ return 0;
+}
+
static int emulate_instruction(struct pt_regs *regs)
{
u32 instword;
@@ -693,6 +712,11 @@ static int emulate_instruction(struct pt
if ((instword & INST_STRING_GEN_MASK) == INST_STRING)
return emulate_string_inst(regs, instword);
+ /* Emulate the popcntb (Population Count Bytes) instruction. */
+ if ((instword & INST_POPCNTB) == INST_POPCNTB) {
+ return emulate_popcntb_inst(regs, instword);
+ }
+
return -EINVAL;
}
^ permalink raw reply related
* Re: [RFC] MPC8260 SPI driver
From: Mark A. Greer @ 2006-08-18 18:34 UTC (permalink / raw)
To: laurent.pinchart; +Cc: linuxppc-embedded
Laurent,
Should this driver also work on 8247/48/71/72?
If so, renaming 8260 -> 82xx or similar would be nice.
Also, please put patches inline (not as attachments).
Thanks,
Mark
^ permalink raw reply
* Re: [PATCH] Fix IRQ handling on MPC8540 ADS
From: Sergei Shtylyov @ 2006-08-18 18:37 UTC (permalink / raw)
To: Andy Fleming; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <Pine.LNX.4.61.0608172019390.420@ld0175-tx32.am.freescale.net>
Hello.
Andy Fleming wrote:
> * Fixed IRQ handling for the 85xx ADS boards so it uses the new
> generic irq stuff
> * Fixed PCI IRQ mapping so it comes from the device tree
NAK. The kernel doesn't build with this patch. I'm getting this:
CC arch/powerpc/platforms/85xx/mpc85xx_ads.o
arch/powerpc/platforms/85xx/mpc85xx_ads.c: In function `mpc85xx_ads_pic_init':
arch/powerpc/platforms/85xx/mpc85xx_ads.c:76: warning: implicit declaration of
function `of_put_node'
and then finally:
LD .tmp_vmlinux1
arch/powerpc/platforms/built-in.o(.init.text+0x26c): In function
`mpc85xx_ads_pic_init':
arch/powerpc/platforms/85xx/mpc85xx_ads.c:84: undefined reference to `of_put_node'
arch/powerpc/platforms/built-in.o(.init.text+0x404):arch/powerpc/platforms/85xx/mpc85xx_ads.c:76:
undefined reference to `of_put_node'
make: *** [.tmp_vmlinux1] Error 1
There's no such function in the kernel -- it actually aclled
of_node_put(). I can post an updated patch after testing (if it succeeds) if
you like...
> This patch *really* needs to go in before 2.6.18 is final, else 2.6.18
> doesn't build for 85xx.
Looks like it's a bit crude yet to be committed...
> Thanks,
> Andy
WBR, Sergei
^ permalink raw reply
* [PATCH] PURR should use correct cpu feature bit
From: Anton Blanchard @ 2006-08-18 18:48 UTC (permalink / raw)
To: linuxppc-dev, paulus
Now we have a PURR cpu feature bit, we should use it in sysfs code.
Signed-off-by: Anton Blanchard <anton@samba.org>
---
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index fec228c..a8172de 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -231,7 +231,7 @@ #endif
if (cur_cpu_spec->num_pmcs >= 8)
sysdev_create_file(s, &attr_pmc8);
- if (cpu_has_feature(CPU_FTR_SMT))
+ if (cpu_has_feature(CPU_FTR_PURR))
sysdev_create_file(s, &attr_purr);
}
@@ -273,7 +273,7 @@ #endif
if (cur_cpu_spec->num_pmcs >= 8)
sysdev_remove_file(s, &attr_pmc8);
- if (cpu_has_feature(CPU_FTR_SMT))
+ if (cpu_has_feature(CPU_FTR_PURR))
sysdev_remove_file(s, &attr_purr);
}
#endif /* CONFIG_HOTPLUG_CPU */
^ permalink raw reply related
* Re: [PATCH] powerpc: emulate power5 popcntb instruction
From: Arnd Bergmann @ 2006-08-18 19:05 UTC (permalink / raw)
To: linuxppc-dev, will_schmidt; +Cc: Paul Mackerras
In-Reply-To: <1155924687.9659.25.camel@farscape.rchland.ibm.com>
On Friday 18 August 2006 20:11, Will Schmidt wrote:
> +#define INST_POPCNTB 0x7c0000f4
> +
> +=A0=A0=A0=A0=A0=A0=A0/* Emulate the popcntb (Population Count Bytes) ins=
truction. */
> +=A0=A0=A0=A0=A0=A0=A0if ((instword & INST_POPCNTB) =3D=3D INST_POPCNTB) {
> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0return emulate_popcntb_inst=
(regs, instword);
> +=A0=A0=A0=A0=A0=A0=A0}
> +
Is that the right check? The other similar traps check against a
mask of 0x7c0007fe.
Arnd <><
^ permalink raw reply
* Re: [PATCH] Add 85xx DTS files
From: Sergei Shtylyov @ 2006-08-18 19:14 UTC (permalink / raw)
To: Andy Fleming; +Cc: linuxppc-dev
In-Reply-To: <Pine.LNX.4.61.0608172024570.420@ld0175-tx32.am.freescale.net>
Hello.
Andy Fleming wrote:
> Added the DTS files for the 8540 ADS, and the 8555/41/48 CDS
MPC8540ADS file doesn't seem completely correct.
> diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
> new file mode 100644
> index 0000000..88b0ea7
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/mpc8540ads.dts
> @@ -0,0 +1,250 @@
[...]
> + soc8540@e0000000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + #interrupt-cells = <2>;
> + device_type = "soc";
> + ranges = <0 e0000000 00100000>;
> + reg = <e0000000 00100000>; // CCSRBAR 1M
> + bus-frequency = <0>;
> +
> + i2c@3000 {
> + device_type = "i2c";
> + compatible = "fsl-i2c";
> + reg = <3000 100>;
> + interrupts = <1b 2>;
This means active high interrupt, doesn't it? So,
Documentation/powerpc/booting=without-of.txt should be indeed wrong on the
OpenPIC IRQ sense encoding... The kernel doesn't seem to put any attention to
theis field currently though...
> + interrupt-parent = <40000>;
> + dfsrr;
> + };
> +
> + mdio@24520 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + device_type = "mdio";
> + compatible = "gianfar";
> + reg = <24520 20>;
> + linux,phandle = <24520>;
> + ethernet-phy@0 {
> + linux,phandle = <2452000>;
> + interrupt-parent = <40000>;
> + interrupts = <35 3>;
Falling edge?
> + reg = <0>;
> + device_type = "ethernet-phy";
> + };
> + ethernet-phy@1 {
> + linux,phandle = <2452001>;
> + interrupt-parent = <40000>;
> + interrupts = <35 3>;
> + reg = <1>;
> + device_type = "ethernet-phy";
> + };
The board has 2 more PHYs using IRQ54 (0x37).
> + ethernet@26000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + device_type = "network";
> + model = "FEC";
> + compatible = "gianfar";
> + reg = <26000 1000>;
> + local-mac-address = [ 00 E0 0C 00 73 02 ];
> + interrupts = <19 2>;
> + interrupt-parent = <40000>;
> + phy-handle = <2452001>;
> + };
This doesn't seem correct. FEC is served by PHY #3 (Davicom), not PHY #1
(Marvell).
[...]
> + pci@8000 {
> + linux,phandle = <8000>;
> + interrupt-map-mask = <f800 0 0 7>;
> + interrupt-map = <
> +
> + /* IDSEL 0x02 */
> + 1000 0 0 1 40000 31 1
> + 1000 0 0 2 40000 32 1
> + 1000 0 0 3 40000 33 1
> + 1000 0 0 4 40000 34 1
> +
> + /* IDSEL 0x03 */
> + 1800 0 0 1 40000 34 1
> + 1800 0 0 2 40000 31 1
> + 1800 0 0 3 40000 32 1
> + 1800 0 0 4 40000 33 1
> +
> + /* IDSEL 0x04 */
> + 2000 0 0 1 40000 33 1
> + 2000 0 0 2 40000 34 1
> + 2000 0 0 3 40000 31 1
> + 2000 0 0 4 40000 32 1
> +
> + /* IDSEL 0x05 */
> + 2800 0 0 1 40000 32 1
> + 2800 0 0 2 40000 33 1
> + 2800 0 0 3 40000 34 1
> + 2800 0 0 4 40000 31 1
> +
> + /* IDSEL 0x0c */
> + 6000 0 0 1 40000 31 1
> + 6000 0 0 2 40000 32 1
> + 6000 0 0 3 40000 33 1
> + 6000 0 0 4 40000 34 1
> +
> + /* IDSEL 0x0d */
> + 6800 0 0 1 40000 34 1
> + 6800 0 0 2 40000 31 1
> + 6800 0 0 3 40000 32 1
> + 6800 0 0 4 40000 33 1
> +
> + /* IDSEL 0x0e */
> + 7000 0 0 1 40000 33 1
> + 7000 0 0 2 40000 34 1
> + 7000 0 0 3 40000 31 1
> + 7000 0 0 4 40000 32 1
> +
> + /* IDSEL 0x0f */
> + 7800 0 0 1 40000 32 1
> + 7800 0 0 2 40000 33 1
> + 7800 0 0 3 40000 34 1
> + 7800 0 0 4 40000 31 1
> +
> + /* IDSEL 0x12 */
> + 9000 0 0 1 40000 31 1
> + 9000 0 0 2 40000 32 1
> + 9000 0 0 3 40000 33 1
> + 9000 0 0 4 40000 34 1
> +
> + /* IDSEL 0x13 */
> + 9800 0 0 1 40000 34 1
> + 9800 0 0 2 40000 31 1
> + 9800 0 0 3 40000 32 1
> + 9800 0 0 4 40000 33 1
> +
> + /* IDSEL 0x14 */
> + a000 0 0 1 40000 33 1
> + a000 0 0 2 40000 34 1
> + a000 0 0 3 40000 31 1
> + a000 0 0 4 40000 32 1
> +
> + /* IDSEL 0x15 */
> + a800 0 0 1 40000 32 1
> + a800 0 0 2 40000 33 1
> + a800 0 0 3 40000 34 1
> + a800 0 0 4 40000 31 1>;
> + interrupt-parent = <40000>;
> + interrupts = <08 3>;
Hm, why it's falling edge (if it is)? Isn't it an internal IRQ which are
all active high?
> + bus-range = <0 0>;
> + ranges = <02000000 0 80000000 80000000 0 20000000
> + 01000000 0 00000000 e2000000 0 00100000>;
Well, U-Boot sets up 16 MB I/O window, not 1 MB. Or have this changed?
> + clock-frequency = <3f940aa>;
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + #address-cells = <3>;
> + reg = <8000 1000>;
> + compatible = "85xx";
> + device_type = "pci";
> + };
Well, these props should probaby come the first in the node, for clarity...
WBR, Sergei
^ permalink raw reply
* Re: [PATCH 2/4]: powerpc/cell spidernet low watermark patch.
From: Linas Vepstas @ 2006-08-18 19:23 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: Arnd Bergmann, netdev, James K Lewis, linux-kernel, linuxppc-dev,
Jens Osterkamp
In-Reply-To: <1155771820.11312.116.camel@localhost.localdomain>
On Thu, Aug 17, 2006 at 01:43:40AM +0200, Benjamin Herrenschmidt wrote:
>
> Sounds good (without actually looking at the code though :), that was a
> long required improvement to that driver. Also, we should probably look
> into using NAPI polling for tx completion queue as well, no ?
Just for a lark, I tried using NAPI polling, while disabling all TX
interrupts. Performance was a disaster: 8Mbits/sec, fom which I conclude
that the tcp ack packets do not flow back fast enough to allw reliance
on NAPI polling for transmit.
I was able to get as high as 960 Mbits/sec in unusal circumstances,
at 100% cpu usage. Oprofile indicates that the next major improvement
would be to add scatter/gather, which I'll take a shot at next week,
if I don't get interrupted. However, I'm getting interrupted a lot these
days.
--linas
^ permalink raw reply
* Re: [PATCH] powerpc: emulate power5 popcntb instruction
From: Kumar Gala @ 2006-08-18 19:30 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <200608182105.45264.arnd@arndb.de>
On Aug 18, 2006, at 2:05 PM, Arnd Bergmann wrote:
> On Friday 18 August 2006 20:11, Will Schmidt wrote:
>> +#define INST_POPCNTB 0x7c0000f4
>> +
>
>> + /* Emulate the popcntb (Population Count Bytes)
>> instruction. */
>> + if ((instword & INST_POPCNTB) == INST_POPCNTB) {
>> + return emulate_popcntb_inst(regs, instword);
>> + }
>> +
>
> Is that the right check? The other similar traps check against a
> mask of 0x7c0007fe.
I agree with Arnd here, its better to check with a larger mask to
ensure that bits that should be '0' in the minor opcode are.
For example, if you had an instruction that was 0x7c0000f7 it would
match.
- kumar
^ permalink raw reply
* Re: [PATCH] PURR should use correct cpu feature bit
From: Michael Neuling @ 2006-08-18 19:32 UTC (permalink / raw)
To: Anton Blanchard; +Cc: linuxppc-dev, paulus
In-Reply-To: <20060818184821.GC27947@krispykreme>
> Now we have a PURR cpu feature bit, we should use it in sysfs code.
Snap... Paulus has this in his tree for 2.6.19
http://git.kernel.org/git/?p=linux/kernel/git/paulus/powerpc.git;a=commit;h=afd05423e02bc7391a7489b686ba1e166b6e8349
Mikey
^ permalink raw reply
* Re: [PATCH] Fix IRQ handling on MPC8540 ADS
From: Sergei Shtylyov @ 2006-08-18 19:33 UTC (permalink / raw)
To: Andy Fleming; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <44E608F3.4060505@ru.mvista.com>
Hello.
Sergei Shtylyov wrote:
>>* Fixed IRQ handling for the 85xx ADS boards so it uses the new
>> generic irq stuff
>>* Fixed PCI IRQ mapping so it comes from the device tree
> NAK. The kernel doesn't build with this patch. I'm getting this:
> CC arch/powerpc/platforms/85xx/mpc85xx_ads.o
> arch/powerpc/platforms/85xx/mpc85xx_ads.c: In function `mpc85xx_ads_pic_init':
> arch/powerpc/platforms/85xx/mpc85xx_ads.c:76: warning: implicit declaration of
> function `of_put_node'
> and then finally:
> LD .tmp_vmlinux1
> arch/powerpc/platforms/built-in.o(.init.text+0x26c): In function
> `mpc85xx_ads_pic_init':
> arch/powerpc/platforms/85xx/mpc85xx_ads.c:84: undefined reference to `of_put_node'
> arch/powerpc/platforms/built-in.o(.init.text+0x404):arch/powerpc/platforms/85xx/mpc85xx_ads.c:76:
> undefined reference to `of_put_node'
> make: *** [.tmp_vmlinux1] Error 1
>
> There's no such function in the kernel -- it actually aclled
> of_node_put(). I can post an updated patch after testing (if it succeeds) if
> you like...
Alas, the patched kernel didn't boot further than the early startup
messages (after I've updated U-Boot with the correct PIC device type).
>>This patch *really* needs to go in before 2.6.18 is final, else 2.6.18
>>doesn't build for 85xx.
> Looks like it's a bit crude yet to be committed...
Not even compile tested. :-/
WBR, Sergei
^ permalink raw reply
* [PATCH] [POWERPC] Rewrite the PPC 86xx IRQ handling to use Flat Device Tree
From: Jon Loeliger @ 2006-08-18 19:30 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev@ozlabs.org, Jon Loeliger
In-Reply-To: <17637.1235.223857.925995@cargo.ozlabs.ibm.com>
IRQ setup now comes from the Flat Device Tree and use the new generic
IRQ code. Fixed the fsl_soc.c IRQ OF interrupt node parsing.
Removed some unused MPC86xx macro definition.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
(cherry picked from 919fede6edab94cccb3ca8c1c0b32fa62c9369a5 commit)
---
On Thu, 2006-08-17 at 19:07, Paul Mackerras wrote:
> The "Allow MPC8641 HPCN to build with CONFIG_PCI disabled too" patch
> depends on your "Rewrite the PPC 86xx IRQ handling to use Flat Device
> Tree" which isn't in the queue for 2.6.18, and doesn't apply for
> 2.6.18 since it depends on the constifying of get_property.
Paul,
This is the same patch from three weeks ago, cherry-picked out
of your master branch with the constification problem resolved
so that it will apply directly to your merge branch.
Without this patch, 86xx won't even build in 2.6.18 due
to the IRQ new world order.
Thanks,
jdl
arch/powerpc/platforms/86xx/mpc8641_hpcn.h | 32 ---
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 324 +++++++++++++++-------------
arch/powerpc/sysdev/fsl_soc.c | 30 +--
3 files changed, 188 insertions(+), 198 deletions(-)
diff --git a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
index 5d2bcf7..41e554c 100644
--- a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
+++ b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
@@ -16,38 +16,6 @@ #define __MPC8641_HPCN_H__
#include <linux/init.h>
-/* PCI interrupt controller */
-#define PIRQA 3
-#define PIRQB 4
-#define PIRQC 5
-#define PIRQD 6
-#define PIRQ7 7
-#define PIRQE 9
-#define PIRQF 10
-#define PIRQG 11
-#define PIRQH 12
-
-/* PCI-Express memory map */
-#define MPC86XX_PCIE_LOWER_IO 0x00000000
-#define MPC86XX_PCIE_UPPER_IO 0x00ffffff
-
-#define MPC86XX_PCIE_LOWER_MEM 0x80000000
-#define MPC86XX_PCIE_UPPER_MEM 0x9fffffff
-
-#define MPC86XX_PCIE_IO_BASE 0xe2000000
-#define MPC86XX_PCIE_MEM_OFFSET 0x00000000
-
-#define MPC86XX_PCIE_IO_SIZE 0x01000000
-
-#define PCIE1_CFG_ADDR_OFFSET (0x8000)
-#define PCIE1_CFG_DATA_OFFSET (0x8004)
-
-#define PCIE2_CFG_ADDR_OFFSET (0x9000)
-#define PCIE2_CFG_DATA_OFFSET (0x9004)
-
-#define MPC86xx_PCIE_OFFSET PCIE1_CFG_ADDR_OFFSET
-#define MPC86xx_PCIE_SIZE (0x1000)
-
#define MPC86XX_RSTCR_OFFSET (0xe00b0) /* Reset Control Register */
#endif /* __MPC8641_HPCN_H__ */
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index ebae73e..146da30 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -37,6 +37,14 @@ #include <sysdev/fsl_soc.h>
#include "mpc86xx.h"
#include "mpc8641_hpcn.h"
+#undef DEBUG
+
+#ifdef DEBUG
+#define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0)
+#else
+#define DBG(fmt...) do { } while(0)
+#endif
+
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
@@ -44,205 +52,215 @@ unsigned long pci_dram_offset = 0;
#endif
-/*
- * Internal interrupts are all Level Sensitive, and Positive Polarity
- */
-
-static u_char mpc86xx_hpcn_openpic_initsenses[] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 0: Reserved */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 1: MCM */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 2: DDR DRAM */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 3: LBIU */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 4: DMA 0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 5: DMA 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 6: DMA 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 7: DMA 3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 8: PCIE1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 9: PCIE2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 10: Reserved */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 11: Reserved */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 12: DUART2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 13: TSEC 1 Transmit */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 14: TSEC 1 Receive */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 15: TSEC 3 transmit */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 16: TSEC 3 receive */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 17: TSEC 3 error */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 18: TSEC 1 Receive/Transmit Error */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 19: TSEC 2 Transmit */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 20: TSEC 2 Receive */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 21: TSEC 4 transmit */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 22: TSEC 4 receive */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 23: TSEC 4 error */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 24: TSEC 2 Receive/Transmit Error */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 25: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 26: DUART1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 27: I2C */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 28: Performance Monitor */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 29: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 30: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 31: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 32: SRIO error/write-port unit */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 33: SRIO outbound doorbell */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 34: SRIO inbound doorbell */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 35: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 36: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 37: SRIO outbound message unit 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 38: SRIO inbound message unit 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 39: SRIO outbound message unit 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 40: SRIO inbound message unit 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 41: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 42: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 43: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 44: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 45: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 46: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 47: Unused */
- 0x0, /* External 0: */
- 0x0, /* External 1: */
- 0x0, /* External 2: */
- 0x0, /* External 3: */
- 0x0, /* External 4: */
- 0x0, /* External 5: */
- 0x0, /* External 6: */
- 0x0, /* External 7: */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 8: Pixis FPGA */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* External 9: ULI 8259 INTR Cascade */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 10: Quad ETH PHY */
- 0x0, /* External 11: */
- 0x0,
- 0x0,
- 0x0,
- 0x0,
-};
-
+static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc,
+ struct pt_regs *regs)
+{
+ unsigned int cascade_irq = i8259_irq(regs);
+ if (cascade_irq != NO_IRQ)
+ generic_handle_irq(cascade_irq, regs);
+ desc->chip->eoi(irq);
+}
void __init
mpc86xx_hpcn_init_irq(void)
{
struct mpic *mpic1;
+ struct device_node *np, *cascade_node = NULL;
+ int cascade_irq;
phys_addr_t openpic_paddr;
+ np = of_find_node_by_type(NULL, "open-pic");
+ if (np == NULL)
+ return;
+
/* Determine the Physical Address of the OpenPIC regs */
openpic_paddr = get_immrbase() + MPC86xx_OPENPIC_OFFSET;
/* Alloc mpic structure and per isu has 16 INT entries. */
- mpic1 = mpic_alloc(openpic_paddr,
+ mpic1 = mpic_alloc(np, openpic_paddr,
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
- 16, MPC86xx_OPENPIC_IRQ_OFFSET, 0, 250,
- mpc86xx_hpcn_openpic_initsenses,
- sizeof(mpc86xx_hpcn_openpic_initsenses),
+ 16, NR_IRQS - 4,
" MPIC ");
BUG_ON(mpic1 == NULL);
+ mpic_assign_isu(mpic1, 0, openpic_paddr + 0x10000);
+
/* 48 Internal Interrupts */
- mpic_assign_isu(mpic1, 0, openpic_paddr + 0x10200);
- mpic_assign_isu(mpic1, 1, openpic_paddr + 0x10400);
- mpic_assign_isu(mpic1, 2, openpic_paddr + 0x10600);
+ mpic_assign_isu(mpic1, 1, openpic_paddr + 0x10200);
+ mpic_assign_isu(mpic1, 2, openpic_paddr + 0x10400);
+ mpic_assign_isu(mpic1, 3, openpic_paddr + 0x10600);
- /* 16 External interrupts */
- mpic_assign_isu(mpic1, 3, openpic_paddr + 0x10000);
+ /* 16 External interrupts
+ * Moving them from [0 - 15] to [64 - 79]
+ */
+ mpic_assign_isu(mpic1, 4, openpic_paddr + 0x10000);
mpic_init(mpic1);
#ifdef CONFIG_PCI
- mpic_setup_cascade(MPC86xx_IRQ_EXT9, i8259_irq_cascade, NULL);
- i8259_init(0, I8259_OFFSET);
-#endif
-}
+ /* Initialize i8259 controller */
+ for_each_node_by_type(np, "interrupt-controller")
+ if (device_is_compatible(np, "chrp,iic")) {
+ cascade_node = np;
+ break;
+ }
+ if (cascade_node == NULL) {
+ printk(KERN_DEBUG "mpc86xxhpcn: no ISA interrupt controller\n");
+ return;
+ }
+ cascade_irq = irq_of_parse_and_map(cascade_node, 0);
+ if (cascade_irq == NO_IRQ) {
+ printk(KERN_ERR "mpc86xxhpcn: failed to map cascade interrupt");
+ return;
+ }
+ DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq);
+ i8259_init(cascade_node, 0);
+ set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
+#endif
+}
#ifdef CONFIG_PCI
-/*
- * interrupt routing
- */
-int
-mpc86xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
+enum pirq{PIRQA = 8, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH};
+const unsigned char uli1575_irq_route_table[16] = {
+ 0, /* 0: Reserved */
+ 0x8, /* 1: 0b1000 */
+ 0, /* 2: Reserved */
+ 0x2, /* 3: 0b0010 */
+ 0x4, /* 4: 0b0100 */
+ 0x5, /* 5: 0b0101 */
+ 0x7, /* 6: 0b0111 */
+ 0x6, /* 7: 0b0110 */
+ 0, /* 8: Reserved */
+ 0x1, /* 9: 0b0001 */
+ 0x3, /* 10: 0b0011 */
+ 0x9, /* 11: 0b1001 */
+ 0xb, /* 12: 0b1011 */
+ 0, /* 13: Reserved */
+ 0xd, /* 14, 0b1101 */
+ 0xf, /* 15, 0b1111 */
+};
+
+static int __devinit
+get_pci_irq_from_of(struct pci_controller *hose, int slot, int pin)
{
- static char pci_irq_table[][4] = {
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 17 -- PCI Slot 1 */
- {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 18 -- PCI Slot 2 */
- {0, 0, 0, 0}, /* IDSEL 19 */
- {0, 0, 0, 0}, /* IDSEL 20 */
- {0, 0, 0, 0}, /* IDSEL 21 */
- {0, 0, 0, 0}, /* IDSEL 22 */
- {0, 0, 0, 0}, /* IDSEL 23 */
- {0, 0, 0, 0}, /* IDSEL 24 */
- {0, 0, 0, 0}, /* IDSEL 25 */
- {PIRQD, PIRQA, PIRQB, PIRQC}, /* IDSEL 26 -- PCI Bridge*/
- {PIRQC, 0, 0, 0}, /* IDSEL 27 -- LAN */
- {PIRQE, PIRQF, PIRQH, PIRQ7}, /* IDSEL 28 -- USB 1.1 */
- {PIRQE, PIRQF, PIRQG, 0}, /* IDSEL 29 -- Audio & Modem */
- {PIRQH, 0, 0, 0}, /* IDSEL 30 -- LPC & PMU*/
- {PIRQD, 0, 0, 0}, /* IDSEL 31 -- ATA */
- };
-
- const long min_idsel = 17, max_idsel = 31, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET;
+ struct of_irq oirq;
+ u32 laddr[3];
+ struct device_node *hosenode = hose ? hose->arch_data : NULL;
+
+ if (!hosenode) return -EINVAL;
+
+ laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(slot, 0) << 8);
+ laddr[1] = laddr[2] = 0;
+ of_irq_map_raw(hosenode, &pin, laddr, &oirq);
+ DBG("mpc86xx_hpcn: pci irq addr %x, slot %d, pin %d, irq %d\n",
+ laddr[0], slot, pin, oirq.specifier[0]);
+ return oirq.specifier[0];
}
-static void __devinit quirk_ali1575(struct pci_dev *dev)
+static void __devinit quirk_uli1575(struct pci_dev *dev)
{
unsigned short temp;
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
+ unsigned char irq2pin[16];
+ unsigned long pirq_map_word = 0;
+ u32 irq;
+ int i;
/*
- * ALI1575 interrupts route table setup:
+ * ULI1575 interrupts route setup
+ */
+ memset(irq2pin, 0, 16); /* Initialize default value 0 */
+
+ /*
+ * PIRQA -> PIRQD mapping read from OF-tree
+ *
+ * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
+ * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
+ */
+ for (i = 0; i < 4; i++){
+ irq = get_pci_irq_from_of(hose, 17, i + 1);
+ if (irq > 0 && irq < 16)
+ irq2pin[irq] = PIRQA + i;
+ else
+ printk(KERN_WARNING "ULI1575 device"
+ "(slot %d, pin %d) irq %d is invalid.\n",
+ 17, i, irq);
+ }
+
+ /*
+ * PIRQE -> PIRQF mapping set manually
*
* IRQ pin IRQ#
- * PIRQA ---- 3
- * PIRQB ---- 4
- * PIRQC ---- 5
- * PIRQD ---- 6
* PIRQE ---- 9
* PIRQF ---- 10
* PIRQG ---- 11
* PIRQH ---- 12
- *
- * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
- * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
*/
- pci_write_config_dword(dev, 0x48, 0xb9317542);
+ for (i = 0; i < 4; i++) irq2pin[i + 9] = PIRQE + i;
+
+ /* Set IRQ-PIRQ Mapping to ULI1575 */
+ for (i = 0; i < 16; i++)
+ if (irq2pin[i])
+ pirq_map_word |= (uli1575_irq_route_table[i] & 0xf)
+ << ((irq2pin[i] - PIRQA) * 4);
- /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
- pci_write_config_byte(dev, 0x86, 0x0c);
+ /* ULI1575 IRQ mapping conf register default value is 0xb9317542 */
+ DBG("Setup ULI1575 IRQ mapping configuration register value = 0x%x\n",
+ pirq_map_word);
+ pci_write_config_dword(dev, 0x48, pirq_map_word);
- /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
- pci_write_config_byte(dev, 0x87, 0x0d);
+#define ULI1575_SET_DEV_IRQ(slot, pin, reg) \
+ do { \
+ int irq; \
+ irq = get_pci_irq_from_of(hose, slot, pin); \
+ if (irq > 0 && irq < 16) \
+ pci_write_config_byte(dev, reg, irq2pin[irq]); \
+ else \
+ printk(KERN_WARNING "ULI1575 device" \
+ "(slot %d, pin %d) irq %d is invalid.\n", \
+ slot, pin, irq); \
+ } while(0)
- /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
- pci_write_config_byte(dev, 0x88, 0x0f);
+ /* USB 1.1 OHCI controller 1, slot 28, pin 1 */
+ ULI1575_SET_DEV_IRQ(28, 1, 0x86);
- /* USB 2.0 controller, interrupt: PIRQ7 */
- pci_write_config_byte(dev, 0x74, 0x06);
+ /* USB 1.1 OHCI controller 2, slot 28, pin 2 */
+ ULI1575_SET_DEV_IRQ(28, 2, 0x87);
- /* Audio controller, interrupt: PIRQE */
- pci_write_config_byte(dev, 0x8a, 0x0c);
+ /* USB 1.1 OHCI controller 3, slot 28, pin 3 */
+ ULI1575_SET_DEV_IRQ(28, 3, 0x88);
- /* Modem controller, interrupt: PIRQF */
- pci_write_config_byte(dev, 0x8b, 0x0d);
+ /* USB 2.0 controller, slot 28, pin 4 */
+ irq = get_pci_irq_from_of(hose, 28, 4);
+ if (irq >= 0 && irq <=15)
+ pci_write_config_dword(dev, 0x74, uli1575_irq_route_table[irq]);
- /* HD audio controller, interrupt: PIRQG */
- pci_write_config_byte(dev, 0x8c, 0x0e);
+ /* Audio controller, slot 29, pin 1 */
+ ULI1575_SET_DEV_IRQ(29, 1, 0x8a);
- /* Serial ATA interrupt: PIRQD */
- pci_write_config_byte(dev, 0x8d, 0x0b);
+ /* Modem controller, slot 29, pin 2 */
+ ULI1575_SET_DEV_IRQ(29, 2, 0x8b);
- /* SMB interrupt: PIRQH */
- pci_write_config_byte(dev, 0x8e, 0x0f);
+ /* HD audio controller, slot 29, pin 3 */
+ ULI1575_SET_DEV_IRQ(29, 3, 0x8c);
- /* PMU ACPI SCI interrupt: PIRQH */
- pci_write_config_byte(dev, 0x8f, 0x0f);
+ /* SMB interrupt: slot 30, pin 1 */
+ ULI1575_SET_DEV_IRQ(30, 1, 0x8e);
+
+ /* PMU ACPI SCI interrupt: slot 30, pin 2 */
+ ULI1575_SET_DEV_IRQ(30, 2, 0x8f);
+
+ /* Serial ATA interrupt: slot 31, pin 1 */
+ ULI1575_SET_DEV_IRQ(31, 1, 0x8d);
/* Primary PATA IDE IRQ: 14
* Secondary PATA IDE IRQ: 15
*/
- pci_write_config_byte(dev, 0x44, 0x3d);
- pci_write_config_byte(dev, 0x75, 0x0f);
+ pci_write_config_byte(dev, 0x44, 0x30 | uli1575_irq_route_table[14]);
+ pci_write_config_byte(dev, 0x75, uli1575_irq_route_table[15]);
/* Set IRQ14 and IRQ15 to legacy IRQs */
pci_read_config_word(dev, 0x46, &temp);
@@ -264,6 +282,8 @@ static void __devinit quirk_ali1575(stru
*/
outb(0xfa, 0x4d0);
outb(0x1e, 0x4d1);
+
+#undef ULI1575_SET_DEV_IRQ
}
static void __devinit quirk_uli5288(struct pci_dev *dev)
@@ -306,7 +326,7 @@ static void __devinit early_uli5249(stru
dev->class |= 0x1;
}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_uli1575);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);
@@ -337,8 +357,6 @@ #ifdef CONFIG_PCI
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = mpc86xx_map_irq;
ppc_md.pci_exclude_device = mpc86xx_exclude_device;
#endif
@@ -377,6 +395,15 @@ mpc86xx_hpcn_show_cpuinfo(struct seq_fil
}
+void __init mpc86xx_hpcn_pcibios_fixup(void)
+{
+ struct pci_dev *dev = NULL;
+
+ for_each_pci_dev(dev)
+ pci_read_irq_line(dev);
+}
+
+
/*
* Called very early, device-tree isn't unflattened
*/
@@ -431,6 +458,7 @@ define_machine(mpc86xx_hpcn) {
.setup_arch = mpc86xx_hpcn_setup_arch,
.init_IRQ = mpc86xx_hpcn_init_irq,
.show_cpuinfo = mpc86xx_hpcn_show_cpuinfo,
+ .pcibios_fixup = mpc86xx_hpcn_pcibios_fixup,
.get_irq = mpic_get_irq,
.restart = mpc86xx_restart,
.time_init = mpc86xx_time_init,
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 12b6560..ef10bcf 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -85,11 +85,8 @@ static int __init gfar_mdio_of_init(void
mdio_data.irq[k] = -1;
while ((child = of_get_next_child(np, child)) != NULL) {
- if (child->n_intrs) {
- u32 *id =
- (u32 *) get_property(child, "reg", NULL);
- mdio_data.irq[*id] = child->intrs[0].line;
- }
+ u32 *id = get_property(child, "reg", NULL);
+ mdio_data.irq[*id] = irq_of_parse_and_map(child, 0);
}
ret =
@@ -131,6 +128,7 @@ static int __init gfar_of_init(void)
char *model;
void *mac_addr;
phandle *ph;
+ int n_res = 1;
memset(r, 0, sizeof(r));
memset(&gfar_data, 0, sizeof(gfar_data));
@@ -139,8 +137,7 @@ static int __init gfar_of_init(void)
if (ret)
goto err;
- r[1].start = np->intrs[0].line;
- r[1].end = np->intrs[0].line;
+ r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
r[1].flags = IORESOURCE_IRQ;
model = get_property(np, "model", NULL);
@@ -150,19 +147,19 @@ static int __init gfar_of_init(void)
r[1].name = gfar_tx_intr;
r[2].name = gfar_rx_intr;
- r[2].start = np->intrs[1].line;
- r[2].end = np->intrs[1].line;
+ r[2].start = r[2].end = irq_of_parse_and_map(np, 1);
r[2].flags = IORESOURCE_IRQ;
r[3].name = gfar_err_intr;
- r[3].start = np->intrs[2].line;
- r[3].end = np->intrs[2].line;
+ r[3].start = r[3].end = irq_of_parse_and_map(np, 2);
r[3].flags = IORESOURCE_IRQ;
+
+ n_res += 2;
}
gfar_dev =
platform_device_register_simple("fsl-gianfar", i, &r[0],
- np->n_intrs + 1);
+ n_res + 1);
if (IS_ERR(gfar_dev)) {
ret = PTR_ERR(gfar_dev);
@@ -259,8 +256,7 @@ static int __init fsl_i2c_of_init(void)
if (ret)
goto err;
- r[1].start = np->intrs[0].line;
- r[1].end = np->intrs[0].line;
+ r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
r[1].flags = IORESOURCE_IRQ;
i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
@@ -396,8 +392,7 @@ static int __init fsl_usb_of_init(void)
if (ret)
goto err;
- r[1].start = np->intrs[0].line;
- r[1].end = np->intrs[0].line;
+ r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
r[1].flags = IORESOURCE_IRQ;
usb_dev_mph =
@@ -445,8 +440,7 @@ static int __init fsl_usb_of_init(void)
if (ret)
goto unreg_mph;
- r[1].start = np->intrs[0].line;
- r[1].end = np->intrs[0].line;
+ r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
r[1].flags = IORESOURCE_IRQ;
usb_dev_dr =
--
2006_06_07.01.gittree_pull-dirty
^ permalink raw reply related
* Re: [PATCH] powerpc: emulate power5 popcntb instruction
From: Kumar Gala @ 2006-08-18 19:42 UTC (permalink / raw)
To: will_schmidt; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <1155924687.9659.25.camel@farscape.rchland.ibm.com>
>
> +static int emulate_popcntb_inst(struct pt_regs *regs, u32 instword)
> +{
> + u32 ra,rs;
> + unsigned long tmp;
> +
> + ra = (instword >> 16) & 0x1f;
> + rs = (instword >> 21) & 0x1f;
> +
> + tmp = regs->gpr[rs];
> + tmp = tmp - ((tmp >> 1) & 0x5555555555555555);
> + tmp = (tmp & 0x3333333333333333) + ((tmp >> 2) &
> 0x3333333333333333);
> + tmp = (tmp + (tmp >> 4)) & 0x0f0f0f0f0f0f0f0f;
> + regs->gpr[ra] = tmp;
> +
> + return 0;
> +}
This is going to give warnings on ppc32 kernel compiles, maybe
something like:
(unsigned long) 0x5555555555555555ull
- kumar
^ permalink raw reply
* Re: [PATCH] Fix IRQ handling on MPC8540 ADS
From: Andy Fleming @ 2006-08-18 20:48 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <44E608F3.4060505@ru.mvista.com>
On Aug 18, 2006, at 13:37, Sergei Shtylyov wrote:
> Hello.
>
> Andy Fleming wrote:
>> * Fixed IRQ handling for the 85xx ADS boards so it uses the new
>> generic irq stuff
>> * Fixed PCI IRQ mapping so it comes from the device tree
>
> NAK. The kernel doesn't build with this patch. I'm getting this:
>
> CC arch/powerpc/platforms/85xx/mpc85xx_ads.o
> arch/powerpc/platforms/85xx/mpc85xx_ads.c: In function
> `mpc85xx_ads_pic_init':
> arch/powerpc/platforms/85xx/mpc85xx_ads.c:76: warning: implicit
> declaration of
> function `of_put_node'
>
> and then finally:
Argh. In my rush to get these patches out, I neglected to test the
8540 ADS, and forgot that I added a few lines for "robustness". I
will fix and resubmit after testing.
>
> LD .tmp_vmlinux1
> arch/powerpc/platforms/built-in.o(.init.text+0x26c): In function
> `mpc85xx_ads_pic_init':
> arch/powerpc/platforms/85xx/mpc85xx_ads.c:84: undefined reference
> to `of_put_node'
> arch/powerpc/platforms/built-in.o(.init.text+0x404):arch/powerpc/
> platforms/85xx/mpc85xx_ads.c:76: undefined reference to `of_put_node'
> make: *** [.tmp_vmlinux1] Error 1
>
> There's no such function in the kernel -- it actually aclled
> of_node_put(). I can post an updated patch after testing (if it
> succeeds) if you like...
>
>> This patch *really* needs to go in before 2.6.18 is final, else
>> 2.6.18 doesn't build for 85xx.
>
> Looks like it's a bit crude yet to be committed...
Agreed, though it's actually no worse than the current mainline!
>
>> Thanks,
>> Andy
>
> WBR, Sergei
^ permalink raw reply
* Re: [PATCH 2/4]: powerpc/cell spidernet low watermark patch.
From: David Miller @ 2006-08-18 21:25 UTC (permalink / raw)
To: linas; +Cc: arnd, jklewis, linux-kernel, linuxppc-dev, netdev, Jens.Osterkamp
In-Reply-To: <20060818192356.GD26889@austin.ibm.com>
From: linas@austin.ibm.com (Linas Vepstas)
Date: Fri, 18 Aug 2006 14:23:56 -0500
> On Thu, Aug 17, 2006 at 01:43:40AM +0200, Benjamin Herrenschmidt wrote:
> >
> > Sounds good (without actually looking at the code though :), that was a
> > long required improvement to that driver. Also, we should probably look
> > into using NAPI polling for tx completion queue as well, no ?
>
> Just for a lark, I tried using NAPI polling, while disabling all TX
> interrupts. Performance was a disaster: 8Mbits/sec, fom which I conclude
> that the tcp ack packets do not flow back fast enough to allw reliance
> on NAPI polling for transmit.
The idea is to use NAPI polling with TX interrupts disabled.
We're not saying to use the RX interrupt as the trigger for
RX and TX work. Rather, either of RX or TX interrupt will
schedule the NAPI poll.
^ permalink raw reply
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