* [PATCH] General CHRP/MPC5K2 platform support patch
From: Nicolas DET @ 2006-10-25 19:05 UTC (permalink / raw)
To: linuxppc-dev, sl, akpm, Benjamin Herrenschmidt, Sylvain Munaut,
grant.likely, linuxppc-embedded, sha
[-- Attachment #1: Type: text/plain, Size: 2084 bytes --]
This patch add support for MPC52xx/CHRP/OFW platform.
It contains the minimal changes required: platform/chrp/ and the
interrupt controller code.
This one is slightly different than the one I submitted previously.
http://ozlabs.org/pipermail/linuxppc-dev/2006-October/027133.html
* /proc/ppc64/rtas/ I left it for now. It's not really the concern of
this patch.
* mpc5k2_bestcomm.c (& helpers): I've been in contact with others people
using bestcomm and please to see the development was still active. I'm
already using latest code on my board but this is not include in this
patch. Indeed, it needs some changes for ARCH=powerpc. Moreover, we have
a different approach for the tasks. I'll be pleased to work with the
bestcomm folks.
* mpc5k2.c: As far as I understood, using of_platform_device will allow
'smart' of tree parsing. I did not implement it yet.
* mpc5k2_pic.c : The thingy ;-). I moved it into arch/powerpc/sysdev as
suggested. This code is 99% copy/paste from the ARCH=ppc. I added an
irq_host with the appropriate xlate and co. However, I have not done
more as this code has been written by others. I think we should work
together to move to new Linux style irq. I stay ready to test or code
upcoming revision/
* arch/powerpc/platform/*. Here, only small changes has been made. I
added _CHRP_E5K2 (in asm/processor.h), an entry in chrp_names() and the
correct detection in arch/powerpc/platform/setup.c / chrp_setup_arch().
in chrp_init_IRQ(), I set ppc_md.get_irq to mpc52xx_get_irq and call
mpc52xx_init_irq().
* fec driver: I did not wrote it and just made small modification to
make it works with our bestcomm API. However, we will soon you the same.
I think this is out of topic for his patch.
* serial stuff / IBP Freq. As this frequency is MPC52xx specific. I
think it would make sense to add a new func mpc52xx_getipbfreq(void).
The way it would be implemented may depend of the architecture. Our
firmware contains an 'ipb-freq' property in '/builtin/'.
Signed-off-by: Nicolas DET <nd@bplan-gmbh.de>
Signed-off-by: Sven Luther <sl@bplan-gmbh.de>
[-- Attachment #2: chrpmpc52xx_2.6.19-rc3.patch --]
[-- Type: text/plain, Size: 15074 bytes --]
diff -uprN a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
--- a/arch/powerpc/platforms/chrp/setup.c 2006-10-25 19:07:23.000000000 +0200
+++ b/arch/powerpc/platforms/chrp/setup.c 2006-10-25 19:10:18.000000000 +0200
@@ -51,6 +51,7 @@
#include <asm/mpic.h>
#include <asm/rtas.h>
#include <asm/xmon.h>
+#include <asm/mpc52xx.h>
#include "chrp.h"
@@ -101,7 +102,8 @@ static const char *chrp_names[] = {
"Motorola",
"IBM or Longtrail",
"Genesi Pegasos",
- "Total Impact Briq"
+ "Total Impact Briq",
+ "bPlan Efika"
};
void chrp_show_cpuinfo(struct seq_file *m)
@@ -260,6 +262,8 @@ void __init chrp_setup_arch(void)
machine = get_property(root, "model", NULL);
if (machine && strncmp(machine, "Pegasos", 7) == 0) {
_chrp_type = _CHRP_Pegasos;
+ } else if (machine && strncmp(machine, "EFIKA5K2", 8) == 0) {
+ _chrp_type =_CHRP_E5K2;
} else if (machine && strncmp(machine, "IBM", 3) == 0) {
_chrp_type = _CHRP_IBM;
} else if (machine && strncmp(machine, "MOT", 3) == 0) {
@@ -494,6 +498,12 @@ void __init chrp_init_IRQ(void)
#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
struct device_node *kbd;
#endif
+ if (_chrp_type == _CHRP_E5K2) {
+ ppc_md.get_irq = mpc52xx_get_irq;
+ mpc52xx_init_irq();
+ return;
+ }
+
chrp_find_openpic();
chrp_find_8259();
@@ -530,6 +540,9 @@ chrp_init2(void)
chrp_nvram_init();
#endif
+ if (_chrp_type == _CHRP_E5K2)
+ return;
+
request_region(0x20,0x20,"pic1");
request_region(0xa0,0x20,"pic2");
request_region(0x00,0x20,"dma1");
diff -uprN a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h
--- a/include/asm-powerpc/processor.h 2006-10-25 19:07:48.000000000 +0200
+++ b/include/asm-powerpc/processor.h 2006-10-25 19:11:54.000000000 +0200
@@ -33,6 +33,7 @@
#define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */
#define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */
#define _CHRP_briq 0x07 /* TotalImpact's briQ */
+#define _CHRP_E5K2 0x08 /* bPlan's Efika 5k2*/
#if defined(__KERNEL__) && defined(CONFIG_PPC32)
diff -uprN a/include/asm-ppc/mpc52xx.h b/include/asm-ppc/mpc52xx.h
--- a/include/asm-ppc/mpc52xx.h 2006-10-25 19:07:48.000000000 +0200
+++ b/include/asm-ppc/mpc52xx.h 2006-10-25 19:11:55.000000000 +0200
@@ -119,7 +119,7 @@ enum ppc_sys_devices {
#define MPC52xx_SDMA_IRQ_NUM 17
#define MPC52xx_PERP_IRQ_NUM 23
-#define MPC52xx_CRIT_IRQ_BASE 1
+#define MPC52xx_CRIT_IRQ_BASE 0
#define MPC52xx_MAIN_IRQ_BASE (MPC52xx_CRIT_IRQ_BASE + MPC52xx_CRIT_IRQ_NUM)
#define MPC52xx_SDMA_IRQ_BASE (MPC52xx_MAIN_IRQ_BASE + MPC52xx_MAIN_IRQ_NUM)
#define MPC52xx_PERP_IRQ_BASE (MPC52xx_SDMA_IRQ_BASE + MPC52xx_SDMA_IRQ_NUM)
@@ -415,7 +415,7 @@ struct mpc52xx_cdm {
#ifndef __ASSEMBLY__
extern void mpc52xx_init_irq(void);
-extern int mpc52xx_get_irq(void);
+extern unsigned int mpc52xx_get_irq(void);
extern unsigned long mpc52xx_find_end_of_memory(void);
extern void mpc52xx_set_bat(void);
--- a/arch/powerpc/sysdev/mpc52xx_pic.c 1970-01-01 01:00:00.000000000 +0100
+++ b/arch/powerpc/sysdev/mpc52xx_pic.c 2006-10-25 19:17:48.000000000 +0200
@@ -0,0 +1,375 @@
+/*
+ * arch/powerpc/platforms/mpc5k2_pic.c
+ *
+ * Programmable Interrupt Controller functions for the Freescale MPC52xx
+ * embedded CPU.
+ * Modified for CHRP Efika 5K2
+ *
+ * Maintainer : Sylvain Munaut <tnt@246tNt.com>
+ *
+ * Based on (well, mostly copied from) the code from the 2.4 kernel by
+ * Dale Farnsworth <dfarnsworth@mvista.com> and Kent Borg.
+ *
+ * Copyright (C) 2004 Sylvain Munaut <tnt@246tNt.com>
+ * Copyright (C) 2003 Montavista Software, Inc
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+//#define DEBUG
+
+#include <linux/stddef.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/signal.h>
+#include <linux/stddef.h>
+#include <linux/delay.h>
+#include <linux/irq.h>
+
+#include <asm/io.h>
+#include <asm/processor.h>
+#include <asm/system.h>
+#include <asm/irq.h>
+#include <asm/prom.h>
+
+#include <asm/mpc52xx.h>
+
+static struct mpc52xx_intr __iomem *intr;
+static struct mpc52xx_sdma __iomem *sdma;
+
+
+static struct irq_host *mpc52xx_irqhost = NULL;
+
+static void
+mpc52xx_ic_disable(unsigned int virq)
+{
+ u32 val;
+ int irq;
+
+ irq = irq_map[virq].hwirq;
+
+ pr_debug("%s: irq=%d\n", __func__, irq);
+
+ if (irq == MPC52xx_IRQ0) {
+ val = in_be32(&intr->ctrl);
+ val &= ~(1 << 11);
+ out_be32(&intr->ctrl, val);
+ } else if (irq < MPC52xx_IRQ1) {
+ BUG();
+ } else if (irq <= MPC52xx_IRQ3) {
+ val = in_be32(&intr->ctrl);
+ val &= ~(1 << (10 - (irq - MPC52xx_IRQ1)));
+ out_be32(&intr->ctrl, val);
+ } else if (irq < MPC52xx_SDMA_IRQ_BASE) {
+ val = in_be32(&intr->main_mask);
+ val |= 1 << (16 - (irq - MPC52xx_MAIN_IRQ_BASE));
+ out_be32(&intr->main_mask, val);
+ } else if (irq < MPC52xx_PERP_IRQ_BASE) {
+ val = in_be32(&sdma->IntMask);
+ val |= 1 << (irq - MPC52xx_SDMA_IRQ_BASE);
+ out_be32(&sdma->IntMask, val);
+ } else {
+ val = in_be32(&intr->per_mask);
+ val |= 1 << (31 - (irq - MPC52xx_PERP_IRQ_BASE));
+ out_be32(&intr->per_mask, val);
+ }
+}
+
+static void
+mpc52xx_ic_enable(unsigned int virq)
+{
+ u32 val;
+ int irq;
+
+ irq = irq_map[virq].hwirq;
+
+ pr_debug("%s: irq=%d\n", __func__, irq);
+
+ if (irq == MPC52xx_IRQ0) {
+ val = in_be32(&intr->ctrl);
+ val |= 1 << 11;
+ out_be32(&intr->ctrl, val);
+ } else if (irq < MPC52xx_IRQ1) {
+ BUG();
+ } else if (irq <= MPC52xx_IRQ3) {
+ val = in_be32(&intr->ctrl);
+ val |= 1 << (10 - (irq - MPC52xx_IRQ1));
+ out_be32(&intr->ctrl, val);
+ } else if (irq < MPC52xx_SDMA_IRQ_BASE) {
+ val = in_be32(&intr->main_mask);
+ val &= ~(1 << (16 - (irq - MPC52xx_MAIN_IRQ_BASE)));
+ out_be32(&intr->main_mask, val);
+ } else if (irq < MPC52xx_PERP_IRQ_BASE) {
+ val = in_be32(&sdma->IntMask);
+ val &= ~(1 << (irq - MPC52xx_SDMA_IRQ_BASE));
+ out_be32(&sdma->IntMask, val);
+ } else {
+ val = in_be32(&intr->per_mask);
+ val &= ~(1 << (31 - (irq - MPC52xx_PERP_IRQ_BASE)));
+ out_be32(&intr->per_mask, val);
+ }
+}
+
+static void
+mpc52xx_ic_ack(unsigned int virq)
+{
+ u32 val;
+ int irq;
+
+ irq = irq_map[virq].hwirq;
+
+ pr_debug("%s: irq=%d\n", __func__, irq);
+
+ /*
+ * Only some irqs are reset here, others in interrupting hardware.
+ */
+
+ switch (irq) {
+ case MPC52xx_IRQ0:
+ val = in_be32(&intr->ctrl);
+ val |= 0x08000000;
+ out_be32(&intr->ctrl, val);
+ break;
+ case MPC52xx_CCS_IRQ:
+ val = in_be32(&intr->enc_status);
+ val |= 0x00000400;
+ out_be32(&intr->enc_status, val);
+ break;
+ case MPC52xx_IRQ1:
+ val = in_be32(&intr->ctrl);
+ val |= 0x04000000;
+ out_be32(&intr->ctrl, val);
+ break;
+ case MPC52xx_IRQ2:
+ val = in_be32(&intr->ctrl);
+ val |= 0x02000000;
+ out_be32(&intr->ctrl, val);
+ break;
+ case MPC52xx_IRQ3:
+ val = in_be32(&intr->ctrl);
+ val |= 0x01000000;
+ out_be32(&intr->ctrl, val);
+ break;
+ default:
+ if (irq >= MPC52xx_SDMA_IRQ_BASE
+ && irq < (MPC52xx_SDMA_IRQ_BASE + MPC52xx_SDMA_IRQ_NUM)) {
+ out_be32(&sdma->IntPend,
+ 1 << (irq - MPC52xx_SDMA_IRQ_BASE));
+ }
+
+ break;
+ }
+
+}
+
+static void
+mpc52xx_ic_disable_and_ack(unsigned int irq)
+{
+ mpc52xx_ic_disable(irq);
+ mpc52xx_ic_ack(irq);
+}
+
+static void
+mpc52xx_ic_end(unsigned int irq)
+{
+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
+ mpc52xx_ic_enable(irq);
+}
+
+static struct irq_chip mpc52xx_irqchip = {
+ .name = " MPC52xx ",
+ .enable = mpc52xx_ic_enable,
+ .disable = mpc52xx_ic_disable,
+ .ack = mpc52xx_ic_disable_and_ack,
+ .end = mpc52xx_ic_end,
+};
+
+static int mpc52xx_irqhost_match(struct irq_host *h, struct device_node *node)
+{
+ pr_debug("%s: node=%p\n", __func__, node);
+
+ if ( device_is_compatible(node, "mpc52xx-pic") )
+ return 1;
+
+ return device_is_compatible(node, "mpc5200-pic");
+}
+
+
+static int mpc52xx_irqhost_xlate(struct irq_host *h, struct device_node *ct,
+ u32 *intspec, unsigned int intsize,
+ irq_hw_number_t *out_hwirq, unsigned int *out_flags)
+{
+ static unsigned char map_senses[4] = {
+ IRQ_TYPE_LEVEL_HIGH,
+ IRQ_TYPE_EDGE_FALLING,
+ IRQ_TYPE_EDGE_RISING,
+ IRQ_TYPE_LEVEL_LOW,
+ };
+
+ int intrvect_l1;
+ int intrvect_l2;
+ int intrvect_type;
+ int intrvect_linux;
+
+ pr_debug("%s:\n", __func__);
+
+ if (intsize!=3)
+ return -1;
+
+ intrvect_l1 = (int) intspec[0];
+ intrvect_l2 = (int) intspec[1];
+ intrvect_type = (int) intspec[2];
+
+ pr_debug("l1=%d, l2=%d, type=%d\n", intrvect_l1, intrvect_l2, intrvect_type );
+
+ switch(intrvect_l1) {
+ case 0: /* Critical */
+ intrvect_linux = MPC52xx_CRIT_IRQ_BASE;
+ break;
+
+ case 1: /* Main */
+ intrvect_linux = MPC52xx_MAIN_IRQ_BASE;
+ break;
+
+ case 2: /* Periph */
+ intrvect_linux = MPC52xx_PERP_IRQ_BASE;
+ break;
+
+ case 3: /* Bestcomm */
+ intrvect_linux = MPC52xx_SDMA_IRQ_BASE;
+ break;
+
+ default:
+ if ( printk_ratelimit() )
+ printk(KERN_ERR "Wrong L1 interrupt vector (%d)\n", intrvect_l1);
+
+ return -1;
+ }
+
+ intrvect_linux += intrvect_l2;
+
+ pr_debug("return %d\n", intrvect_linux);
+
+ *out_hwirq = intrvect_linux;
+ *out_flags = map_senses[intrvect_type];
+
+ return 0;
+
+}
+
+int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw)
+{
+ pr_debug("%s: v=%d, hw=%d\n", __func__, virq, (int) hw);
+
+ return 0;
+}
+
+void mpc52xx_irqhost_unmap(struct irq_host *h, unsigned int virq)
+{
+ pr_debug("%s: v=%d\n", __func__, virq);
+}
+
+static struct irq_host_ops mpc52xx_irqhost_ops = {
+ .match = mpc52xx_irqhost_match,
+ .xlate = mpc52xx_irqhost_xlate,
+ .map = mpc52xx_irqhost_map,
+ .unmap = mpc52xx_irqhost_unmap,
+};
+
+void __init
+mpc52xx_init_irq(void)
+{
+ int i;
+ u32 intr_ctrl;
+
+
+ /* Remap the necessary zones */
+ intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE);
+ sdma = ioremap(MPC52xx_PA(MPC52xx_SDMA_OFFSET), MPC52xx_SDMA_SIZE);
+
+ if ((intr==NULL) || (sdma==NULL))
+ panic("Can't ioremap PIC/SDMA register or init_irq !");
+
+ /* Disable all interrupt sources. */
+ out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */
+ out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */
+ out_be32(&intr->per_mask, 0x7ffffc00); /* 1 means disabled */
+ out_be32(&intr->main_mask, 0x00010fff); /* 1 means disabled */
+ intr_ctrl = in_be32(&intr->ctrl);
+ intr_ctrl &= 0x00ff0000; /* Keeps IRQ[0-3] config */
+ intr_ctrl |= 0x0f000000 | /* clear IRQ 0-3 */
+ 0x00001000 | /* MEE master external enable */
+ 0x00000000 | /* 0 means disable IRQ 0-3 */
+ 0x00000001; /* CEb route critical normally */
+ out_be32(&intr->ctrl, intr_ctrl);
+
+ /* Zero a bunch of the priority settings. */
+ out_be32(&intr->per_pri1, 0);
+ out_be32(&intr->per_pri2, 0);
+ out_be32(&intr->per_pri3, 0);
+ out_be32(&intr->main_pri1, 0);
+ out_be32(&intr->main_pri2, 0);
+ /* Initialize irq_desc[i].handler's with mpc52xx_ic. */
+ for (i = 0; i < NR_IRQS; i++) {
+ irq_desc[i].chip = &mpc52xx_irqchip;
+ irq_desc[i].status = IRQ_LEVEL;
+
+ }
+
+#define IRQn_MODE(intr_ctrl,irq) (((intr_ctrl) >> (22-(i<<1))) & 0x03)
+ for (i=0 ; i<4 ; i++) {
+ int mode;
+ mode = IRQn_MODE(intr_ctrl,i);
+ if ((mode == 0x1) || (mode == 0x2))
+ irq_desc[i?MPC52xx_IRQ1+i-1:MPC52xx_IRQ0].status = 0;
+ }
+
+ /*
+ * As last step, add an irq host to translate the real
+ * hw irq information provided by the ofw to linux virq
+ */
+
+ mpc52xx_irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 0, &mpc52xx_irqhost_ops, -1);
+ pr_debug("%s: mpc52xx_irqhost =%p\n", __func__, mpc52xx_irqhost );
+}
+
+unsigned int
+mpc52xx_get_irq(void)
+{
+ u32 status;
+ int virq;
+ int irq = NO_IRQ_IGNORE;
+
+ status = in_be32(&intr->enc_status);
+ if (status & 0x00000400)
+ { /* critical */
+ irq = (status >> 8) & 0x3;
+ if (irq == 2) /* high priority peripheral */
+ goto peripheral;
+ irq += MPC52xx_CRIT_IRQ_BASE;
+ } else if (status & 0x00200000)
+ { /* main */
+ irq = (status >> 16) & 0x1f;
+ if (irq == 4) /* low priority peripheral */
+ goto peripheral;
+ irq += MPC52xx_MAIN_IRQ_BASE;
+ } else if (status & 0x20000000)
+ { /* peripheral */
+peripheral:
+ irq = (status >> 24) & 0x1f;
+ if (irq == 0) { /* bestcomm */
+ status = in_be32(&sdma->IntPend);
+ irq = ffs(status) + MPC52xx_SDMA_IRQ_BASE-1;
+ } else
+ irq += MPC52xx_PERP_IRQ_BASE;
+
+ }
+
+ virq = irq_linear_revmap(mpc52xx_irqhost, irq);
+ pr_debug("%s: irq=%d -> %d\n", __func__, irq, virq);
+
+ return virq;
+}
+
--- a/arch/powerpc/sysdev/Makefile 2006-10-25 19:07:24.000000000 +0200
+++ b/arch/powerpc/sysdev/Makefile 2006-10-25 20:33:32.000000000 +0200
@@ -13,6 +13,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_PPC_TODC) += todc.o
obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
+obj-$(CONFIG_PPC_CHRP) += mpc52xx_pic.o
ifeq ($(CONFIG_PPC_MERGE),y)
obj-$(CONFIG_PPC_I8259) += i8259.o
[-- Attachment #3: nd.vcf --]
[-- Type: text/x-vcard, Size: 249 bytes --]
begin:vcard
fn:Nicolas DET ( bplan GmbH )
n:DET;Nicolas
org:bplan GmbH
adr:;;;;;;Germany
email;internet:nd@bplan-gmbh.de
title:Software Entwicklung
tel;work:+49 6171 9187 - 31
x-mozilla-html:FALSE
url:http://www.bplan-gmbh.de
version:2.1
end:vcard
^ permalink raw reply
* Re: [PATCH] Fix eHCA driver compilation for uniprocessor
From: Hoang-Nam Nguyen @ 2006-10-25 19:52 UTC (permalink / raw)
To: Paul Mackerras, Roland Dreier
Cc: linuxppc-dev, Heiko J Schick, Christoph Raisch
In-Reply-To: <17726.62952.416387.74258@cargo.ozlabs.ibm.com>
Hello Paul!
Thanks for this patch!
Roland, not sure if you still need me to make a patch against your git?
Let me know in case of need.
Thanks!
Nam
> The eHCA driver does not compile for a uniprocessor configuration
> (CONFIG_SMP=n), due to H_SUCCESS and other symbols being undefined.
> This fixes it.
>
> Signed-off-by: Paul Mackerras <paulus@samba.org>
> ---
> diff --git a/drivers/infiniband/hw/ehca/ehca_tools.h
b/drivers/infiniband/hw/ehca/ehca_tools.h
> index 809da3e..973c4b5 100644
> --- a/drivers/infiniband/hw/ehca/ehca_tools.h
> +++ b/drivers/infiniband/hw/ehca/ehca_tools.h
> @@ -63,6 +63,7 @@ #include <asm/abs_addr.h>
> #include <asm/ibmebus.h>
> #include <asm/io.h>
> #include <asm/pgtable.h>
> +#include <asm/hvcall.h>
>
> extern int ehca_debug_level;
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* Re: [PATCH] Fix eHCA driver compilation for uniprocessor
From: Roland Dreier @ 2006-10-25 21:10 UTC (permalink / raw)
To: Hoang-Nam Nguyen
Cc: linuxppc-dev, Heiko J Schick, Christoph Raisch, Paul Mackerras
In-Reply-To: <OF6C29FB25.BEB4A4D2-ONC1257212.006CF315-C1257212.006D07FB@de.ibm.com>
> Roland, not sure if you still need me to make a patch against your git?
No, I will queue this for 2.6.19. Thanks.
^ permalink raw reply
* Re: [PATCH] General CHRP/MPC5K2 Platform and drivers support - to comment
From: Paul Mackerras @ 2006-10-25 21:22 UTC (permalink / raw)
To: Matt Sealey; +Cc: linuxppc-dev
In-Reply-To: <453F7832.2020305@genesi-usa.com>
Matt Sealey writes:
> It supports the original processors, G3, G4 etc. as well. Maybe not
> the 601? I'm not sure. All the PowerPC ISA Books are in there and
> information only seems to have been ADDED (or moved to another
> book or been given a new book).
The only 32-bit processors it supports are Book E processors. IBM
removed all the material relating to 32-bit implementations from the
earlier V2.0x architectures, because IBM was no longer interested in
32-bit server processors.
Paul.
^ permalink raw reply
* Re: [PATCH] General CHRP/MPC5K2 Platform and drivers support - to comment
From: Paul Mackerras @ 2006-10-25 21:29 UTC (permalink / raw)
To: Matt Sealey; +Cc: linuxppc-dev
In-Reply-To: <453F8E63.7090907@genesi-usa.com>
Matt Sealey writes:
> Is it time for a PAPR platform? Or is that against the Linux
> anti-marketing-name lobby we have in here?
:) All I would say is that if your platform really is PAPR compliant,
then sure, we could have a papr platform, but don't underestimate the
amount of work it will take to be PAPR compliant. There is a ton of
stuff in there.
Paul.
^ permalink raw reply
* Kernel hangs in console_init()
From: wei.li4 @ 2006-10-25 21:33 UTC (permalink / raw)
To: linuxppc-embedded
Hi All,
I am working on linux 2.6.18-rc2 with my mpc875 demo board, I used
Debugger LEDs to find that kernel stopped in:
while (call < __con_initcall_end) {
(*call)();
call++;
}
which is in console_init() of tty_io.c, what kind of problem could be?
What's the means of 'bctrl' instruction that I found in its assembler?
Thanks,
Wei
^ permalink raw reply
* Re: Please pull powerpc.git 'merge' branch
From: Paul Mackerras @ 2006-10-25 21:34 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev, torvalds
In-Reply-To: <20061025092210.6d208031@localhost.localdomain>
Olof Johansson writes:
> On Wed, 25 Oct 2006 16:26:13 +1000 Paul Mackerras <paulus@samba.org> wrote:
>
> > Jake Moilanen:
> > [POWERPC] Add 970GX cputable entry
>
> I didn't see them fix the head_64.S issue with this patch.
There was no "issue", there was a possible further optimization, but
that's not a reason not to put in the cputable entry in the first
place.
Paul.
^ permalink raw reply
* Re: Please pull powerpc.git 'merge' branch
From: Paul Mackerras @ 2006-10-25 21:37 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, torvalds
In-Reply-To: <6908EBCA-E869-4949-8096-34717733E6C1@kernel.crashing.org>
Kumar Gala writes:
> Can you hold off on the this. The following patch is still under
> discussion and the problem exists on more than just PPC.
The patch that I put in fixes the problem in the situation where it
was found, right? That the problem may exist on other architectures
isn't a reason not to fix it here.
> > Scott Wood:
> > [POWERPC] IPIC: Fix spinlock recursion in set_irq_handler
Paul.
^ permalink raw reply
* Re: [PATCH] General CHRP/MPC5K2 platform support patch
From: Paul Mackerras @ 2006-10-25 21:59 UTC (permalink / raw)
To: Nicolas DET
Cc: akpm, Sylvain Munaut, sl, linuxppc-dev, linuxppc-embedded, sha
In-Reply-To: <453FB582.20802@bplan-gmbh.de>
Nicolas DET writes:
> if (machine && strncmp(machine, "Pegasos", 7) == 0) {
> _chrp_type = _CHRP_Pegasos;
> + } else if (machine && strncmp(machine, "EFIKA5K2", 8) == 0) {
> + _chrp_type =_CHRP_E5K2;
This whole _chrp_type thing, and having to do different things based
on the root-node model property, is really only a workaround for
older machines with inadequate device trees. Decisions about things
like which interrupt controller driver(s) to instantiate should be
taken based on properties in the appropriate device-tree nodes, for
instance the model and compatible properties in the node(s) for the
interrupt controller(s). In fact I'd like to get rid of _chrp_type
completely.
> diff -uprN a/include/asm-ppc/mpc52xx.h b/include/asm-ppc/mpc52xx.h
> --- a/include/asm-ppc/mpc52xx.h 2006-10-25 19:07:48.000000000 +0200
> +++ b/include/asm-ppc/mpc52xx.h 2006-10-25 19:11:55.000000000 +0200
> @@ -119,7 +119,7 @@ enum ppc_sys_devices {
> #define MPC52xx_SDMA_IRQ_NUM 17
> #define MPC52xx_PERP_IRQ_NUM 23
>
> -#define MPC52xx_CRIT_IRQ_BASE 1
> +#define MPC52xx_CRIT_IRQ_BASE 0
What is this going to do to other 52xx users?
Paul.
^ permalink raw reply
* Re: Please pull powerpc.git 'merge' branch
From: Kumar Gala @ 2006-10-25 22:02 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, torvalds
In-Reply-To: <17727.55569.981861.182079@cargo.ozlabs.ibm.com>
On Oct 25, 2006, at 4:37 PM, Paul Mackerras wrote:
> Kumar Gala writes:
>
>> Can you hold off on the this. The following patch is still under
>> discussion and the problem exists on more than just PPC.
>
> The patch that I put in fixes the problem in the situation where it
> was found, right? That the problem may exist on other architectures
> isn't a reason not to fix it here.
Just if we come up with a more general solution. I guess its ok if
we paper tape over it, just didn't want to if we decide the change
should be handled in more generic code.
>
>>> Scott Wood:
>>> [POWERPC] IPIC: Fix spinlock recursion in set_irq_handler
>
> Paul.
^ permalink raw reply
* Re: [PATCH] powerpc: Remove ibmveth "liobn" field
From: Santiago Leon @ 2006-10-25 22:14 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev list, Paul Mackerras
In-Reply-To: <1161749834.22582.36.camel@localhost.localdomain>
Benjamin Herrenschmidt wrote:
> Remove the now unused "liobn" field in ibmveth which also avoids
> having insider knowledge of the iommu table in that driver.
Thanks for cleaning that up.
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Santiago Leon <santil@us.ibm.com>
---
>
> This will avoid this driver from breaking when I change the dma
> mapping code for 2.6.20.
>
> Index: linux-cell/drivers/net/ibmveth.c
> ===================================================================
> --- linux-cell.orig/drivers/net/ibmveth.c 2006-10-23 14:41:38.000000000 +1000
> +++ linux-cell/drivers/net/ibmveth.c 2006-10-25 14:12:05.000000000 +1000
> @@ -50,7 +50,6 @@
> #include <asm/semaphore.h>
> #include <asm/hvcall.h>
> #include <asm/atomic.h>
> -#include <asm/iommu.h>
...
--
Santiago A. Leon
Power Linux Development
IBM Linux Technology Center
^ permalink raw reply
* Re: Please pull powerpc.git 'merge' branch
From: Olof Johansson @ 2006-10-25 22:32 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, torvalds
In-Reply-To: <17727.55399.959132.886705@cargo.ozlabs.ibm.com>
Add check for 970GX for __cpu_preinit_ppc970.
Signed-off-by: Olof Johansson <olof@lixom.net>
---
On Thu, 26 Oct 2006 07:34:31 +1000 Paul Mackerras <paulus@samba.org> wrote:
> There was no "issue", there was a possible further optimization, but
> that's not a reason not to put in the cputable entry in the first
> place.
For the deep nap stuff, yes. But the below was what I meant. Only
really needed on firmware that will never ship with a 970GX chip, but
for correctness sake it should still be in there.
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 645c7f1..d528641 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -1646,6 +1646,8 @@ #endif
cmpwi r0,0x3c /* 970FX */
beq 1f
cmpwi r0,0x44 /* 970MP */
+ beq 1f
+ cmpwi r0,0x45 /* 970GX */
bne 2f
1: bl .__cpu_preinit_ppc970
2:
^ permalink raw reply related
* Re: [PATCH] General CHRP/MPC5K2 platform support patch
From: Grant Likely @ 2006-10-25 22:41 UTC (permalink / raw)
To: Paul Mackerras; +Cc: akpm, linuxppc-embedded, sl, linuxppc-dev, sha
In-Reply-To: <17727.56923.634981.723647@cargo.ozlabs.ibm.com>
On 10/25/06, Paul Mackerras <paulus@samba.org> wrote:
> Nicolas DET writes:
>
> > if (machine && strncmp(machine, "Pegasos", 7) == 0) {
> > _chrp_type = _CHRP_Pegasos;
> > + } else if (machine && strncmp(machine, "EFIKA5K2", 8) == 0) {
> > + _chrp_type =_CHRP_E5K2;
>
> This whole _chrp_type thing, and having to do different things based
> on the root-node model property, is really only a workaround for
> older machines with inadequate device trees. Decisions about things
> like which interrupt controller driver(s) to instantiate should be
> taken based on properties in the appropriate device-tree nodes, for
> instance the model and compatible properties in the node(s) for the
> interrupt controller(s). In fact I'd like to get rid of _chrp_type
> completely.
What are the implications anyway for the bplan board being CHRP vs the
way the rest of the embedded ppcs are set up? Will having this setup
as a CHRP system conflict w/ non-CHRP embedded boards? (I'm assuming
that CHRP requires more capable firmware than u-boot passing in a fdt)
>
> > diff -uprN a/include/asm-ppc/mpc52xx.h b/include/asm-ppc/mpc52xx.h
> > --- a/include/asm-ppc/mpc52xx.h 2006-10-25 19:07:48.000000000 +0200
> > +++ b/include/asm-ppc/mpc52xx.h 2006-10-25 19:11:55.000000000 +0200
> > @@ -119,7 +119,7 @@ enum ppc_sys_devices {
> > #define MPC52xx_SDMA_IRQ_NUM 17
> > #define MPC52xx_PERP_IRQ_NUM 23
> >
> > -#define MPC52xx_CRIT_IRQ_BASE 1
> > +#define MPC52xx_CRIT_IRQ_BASE 0
>
> What is this going to do to other 52xx users?
Shouldn't be a big deal if all drivers use the macros; but as you
pointed out on IRC, the interrupt stuff needs to be reworked for the
interrupt mapping interface anyway
g.
--
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH] General CHRP/MPC5K2 platform support patch
From: Benjamin Herrenschmidt @ 2006-10-25 22:53 UTC (permalink / raw)
To: Nicolas DET
Cc: akpm, Sylvain Munaut, sl, linuxppc-dev, linuxppc-embedded, sha
In-Reply-To: <453FB582.20802@bplan-gmbh.de>
On Wed, 2006-10-25 at 21:05 +0200, Nicolas DET wrote:
In addition to various whitespace damage in the patch...
> + if (_chrp_type == _CHRP_E5K2) {
> + ppc_md.get_irq = mpc52xx_get_irq;
> + mpc52xx_init_irq();
> + return;
> + }
As I wrote, the above should be unnecessary.
> chrp_find_openpic();
> chrp_find_8259();
Just add a
chrp_find_mpc5200pic();
Which will set itself as the default controller and set ppc_md.get_irq
if none have done it before.
> @@ -530,6 +540,9 @@ chrp_init2(void)
> chrp_nvram_init();
> #endif
>
> + if (_chrp_type == _CHRP_E5K2)
> + return;
Why that ? Not that we really need those request_region() anyway, but
it's highly recommended that your firmware doesn't allocate anything in
that "legacy" portion of the IO space anyway, so requesting those
regions will do no harm.
> request_region(0x20,0x20,"pic1");
> request_region(0xa0,0x20,"pic2");
> request_region(0x00,0x20,"dma1");
> +static void
> +mpc52xx_ic_disable(unsigned int virq)
> +{
> + u32 val;
> + int irq;
> +
> + irq = irq_map[virq].hwirq;
You should test if the result is valid just in case you were called with
a bogus irq number
> + pr_debug("%s: irq=%d\n", __func__, irq);
> +
> + if (irq == MPC52xx_IRQ0) {
> + val = in_be32(&intr->ctrl);
> + val &= ~(1 << 11);
> + out_be32(&intr->ctrl, val);
> + } else if (irq < MPC52xx_IRQ1) {
> + BUG();
> + } else if (irq <= MPC52xx_IRQ3) {
> + val = in_be32(&intr->ctrl);
> + val &= ~(1 << (10 - (irq - MPC52xx_IRQ1)));
> + out_be32(&intr->ctrl, val);
> + } else if (irq < MPC52xx_SDMA_IRQ_BASE) {
> + val = in_be32(&intr->main_mask);
> + val |= 1 << (16 - (irq - MPC52xx_MAIN_IRQ_BASE));
> + out_be32(&intr->main_mask, val);
> + } else if (irq < MPC52xx_PERP_IRQ_BASE) {
> + val = in_be32(&sdma->IntMask);
> + val |= 1 << (irq - MPC52xx_SDMA_IRQ_BASE);
> + out_be32(&sdma->IntMask, val);
> + } else {
> + val = in_be32(&intr->per_mask);
> + val |= 1 << (31 - (irq - MPC52xx_PERP_IRQ_BASE));
> + out_be32(&intr->per_mask, val);
> + }
> +}
You may want to chose a different encoding for your HW irqs to make the
above less horrible. For example, have an irq category in some top bits
and the actual bit mask pre-mashed in the bottom bits.
And same comments for enable().
> +static void
> +mpc52xx_ic_disable_and_ack(unsigned int irq)
> +{
> + mpc52xx_ic_disable(irq);
> + mpc52xx_ic_ack(irq);
> +}
You don't need the above. It will be done for you by the core code once
you properly adapt to genirq.
> +static void
> +mpc52xx_ic_end(unsigned int irq)
> +{
> + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
> + mpc52xx_ic_enable(irq);
> +}
The above is not necessary anymore, you need to properly adapt to genirq
which you haven't done yet.
> +static struct irq_chip mpc52xx_irqchip = {
> + .name = " MPC52xx ",
> + .enable = mpc52xx_ic_enable,
> + .disable = mpc52xx_ic_disable,
> + .ack = mpc52xx_ic_disable_and_ack,
> + .end = mpc52xx_ic_end,
> +};
As I said, you haven't properly adapted to genirq. That is
enable -> unmask
disable -> mask
ack stays and doesn't do disable
end is gone
You also need to call set_irq_chip_and_handler(), possibly in your host
map() function to set the right flow handler for your interrupts.
> +static int mpc52xx_irqhost_match(struct irq_host *h, struct device_node *node)
> +{
> + pr_debug("%s: node=%p\n", __func__, node);
> +
> + if ( device_is_compatible(node, "mpc52xx-pic") )
> + return 1;
> +
> + return device_is_compatible(node, "mpc5200-pic");
> +}
You probably need only one of the above statements. It depends on how
the device-tree binding is defined for the MPC52xx which, for the
10000th time, should be done PUBLICALLY
> +int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq, irq_hw_number_t hw)
> +{
> + pr_debug("%s: v=%d, hw=%d\n", __func__, virq, (int) hw);
> +
> + return 0;
> +}
As I said earlier, the above needs to at least set a flow handler. Also,
if you intend to have different flow handlers for edge and level irqs,
then you'll also probably need to implement set_irq_type(). You may want
to look at the IPI driver for that (and beware of the lock problem with
set_irq_type() vs. set_irq_handler(), see the IPIC patch that went on
the list recently)
> + /* Zero a bunch of the priority settings. */
> + out_be32(&intr->per_pri1, 0);
> + out_be32(&intr->per_pri2, 0);
> + out_be32(&intr->per_pri3, 0);
> + out_be32(&intr->main_pri1, 0);
> + out_be32(&intr->main_pri2, 0);
> + /* Initialize irq_desc[i].handler's with mpc52xx_ic. */
> + for (i = 0; i < NR_IRQS; i++) {
> + irq_desc[i].chip = &mpc52xx_irqchip;
> + irq_desc[i].status = IRQ_LEVEL;
> +
> + }
The above should go. With the port to genirq, you get descriptors as
irqs get mapped, from your map callback, which is where you set the chip
and flow handler.
You should also never completley override status like that. Just or-in
the bits you need. Look at what other PICs in arch/powerpc do.
> +#define IRQn_MODE(intr_ctrl,irq) (((intr_ctrl) >> (22-(i<<1))) & 0x03)
> + for (i=0 ; i<4 ; i++) {
> + int mode;
> + mode = IRQn_MODE(intr_ctrl,i);
> + if ((mode == 0x1) || (mode == 0x2))
> + irq_desc[i?MPC52xx_IRQ1+i-1:MPC52xx_IRQ0].status = 0;
> + }
What is the above about ?
> + /*
> + * As last step, add an irq host to translate the real
> + * hw irq information provided by the ofw to linux virq
> + */
> +
> + mpc52xx_irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, 0, &mpc52xx_irqhost_ops, -1);
> + pr_debug("%s: mpc52xx_irqhost =%p\n", __func__, mpc52xx_irqhost );
> +}
Ususally we do that first but heh, it doesn't really matter. However:
passing a count of 0 when creating a linear revmap is totally bogus (in
fact, I'm surprised your code works).
Also, as far as the invalid irq is concerned, you should probably define
it using a symbolic constant (properly typed) so you can use it
elsewhere in the code to test the result of the revmap functions among
others.
> +unsigned int
> +mpc52xx_get_irq(void)
> +{
> + u32 status;
> + int virq;
> + int irq = NO_IRQ_IGNORE;
> +
> + status = in_be32(&intr->enc_status);
> + if (status & 0x00000400)
> + { /* critical */
> + irq = (status >> 8) & 0x3;
> + if (irq == 2) /* high priority peripheral */
> + goto peripheral;
> + irq += MPC52xx_CRIT_IRQ_BASE;
> + } else if (status & 0x00200000)
> + { /* main */
> + irq = (status >> 16) & 0x1f;
> + if (irq == 4) /* low priority peripheral */
> + goto peripheral;
> + irq += MPC52xx_MAIN_IRQ_BASE;
> + } else if (status & 0x20000000)
> + { /* peripheral */
> +peripheral:
> + irq = (status >> 24) & 0x1f;
> + if (irq == 0) { /* bestcomm */
> + status = in_be32(&sdma->IntPend);
> + irq = ffs(status) + MPC52xx_SDMA_IRQ_BASE-1;
> + } else
> + irq += MPC52xx_PERP_IRQ_BASE;
> +
> + }
> +
> + virq = irq_linear_revmap(mpc52xx_irqhost, irq);
> + pr_debug("%s: irq=%d -> %d\n", __func__, irq, virq);
> +
> + return virq;
> +}
I'm surprised the revmap is working at all... considering the issues you
have above. You are lucky but things should be fixed anyway.
> --- a/arch/powerpc/sysdev/Makefile 2006-10-25 19:07:24.000000000 +0200
> +++ b/arch/powerpc/sysdev/Makefile 2006-10-25 20:33:32.000000000 +0200
> @@ -13,6 +13,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
> obj-$(CONFIG_PPC_TODC) += todc.o
> obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
> obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
> +obj-$(CONFIG_PPC_CHRP) += mpc52xx_pic.o
That's not the proper way to do it. Instead, define an invisible
CONFIG_MPC52xx_PIC and have the chrp platform select it.
> ifeq ($(CONFIG_PPC_MERGE),y)
> obj-$(CONFIG_PPC_I8259) += i8259.o
Ben.
^ permalink raw reply
* Re: [PATCH] General CHRP/MPC5K2 platform support patch
From: Benjamin Herrenschmidt @ 2006-10-25 22:59 UTC (permalink / raw)
To: Grant Likely
Cc: akpm, linuxppc-embedded, sl, linuxppc-dev, Paul Mackerras, sha
In-Reply-To: <528646bc0610251541s21bb45f1t6fc911778d5084@mail.gmail.com>
> What are the implications anyway for the bplan board being CHRP vs the
> way the rest of the embedded ppcs are set up? Will having this setup
> as a CHRP system conflict w/ non-CHRP embedded boards? (I'm assuming
> that CHRP requires more capable firmware than u-boot passing in a fdt)
Not really :) The main thing they "buy" by going CHRP is that they use
RTAS for PCI config space access and thus don't have to write the host
bridge code. Since their firmware initializes everything properly, there
is little need for non-generic platform code and that sort of generic
platform code is what CHRP provides.
With the device-tree thingy done properly nowadays, there should be
little difference between platforms unless you end up dealing with
really special things.
There should be no conflict with non-CHRP boards using the MPC5200 chip
provided they do things right which is what I've been advocating so far.
That includes making sure everybody agrees on the format of the MPC5200
specific bits in the device-tree:
- Format of the interrupt cells (they have come up upon my suggestion
to a 3-cell based format (could probably be compressed a bit but heh)
and that should be documented publically)
- Binding (set of required properties and their definitions) for on
chip devices, and more specifically, for representing the bestcomm and
the links between devices and associated bestcomm tasks.
If the above is properly agreed upon, then the code for dealing with
MPC5200 specific devices will purely rely on those bits, and thus should
be useable from whatever platform it's included in, wether it's CHRP, or
something else.
Unfortunately, at this point, Nicolas seems to be unwilling to open up
his device-tree publically.
Ben.
^ permalink raw reply
* Re: [PATCH] General CHRP/MPC5K2 platform support patch
From: Grant Likely @ 2006-10-25 23:01 UTC (permalink / raw)
To: Nicolas DET; +Cc: akpm, sl, linuxppc-dev, linuxppc-embedded, sha
In-Reply-To: <453FB582.20802@bplan-gmbh.de>
Thanks Nicolas, I'll dig through the PIC code tonight. I'm really not
sure about the implications of this being a CHRP board vs. the
Lite5200 using u-boot. ie. Should the Lite5200 also be a CHRP
platform? Does u-boot provide enough capability (this is where my
ignorance about CHRP shines through)
Cheers,
g.
On 10/25/06, Nicolas DET <nd@bplan-gmbh.de> wrote:
> * mpc5k2.c: As far as I understood, using of_platform_device will allow
> 'smart' of tree parsing. I did not implement it yet.
>
> * mpc5k2_pic.c : The thingy ;-). I moved it into arch/powerpc/sysdev as
> suggested. This code is 99% copy/paste from the ARCH=ppc. I added an
> irq_host with the appropriate xlate and co. However, I have not done
> more as this code has been written by others. I think we should work
> together to move to new Linux style irq. I stay ready to test or code
> upcoming revision/
Why change the naming scheme from mpc52xx to mpc5k3? All other
freescale supports follow the mpcXXxxx scheme.
>
> * arch/powerpc/platform/*. Here, only small changes has been made. I
> added _CHRP_E5K2 (in asm/processor.h), an entry in chrp_names() and the
> correct detection in arch/powerpc/platform/setup.c / chrp_setup_arch().
> in chrp_init_IRQ(), I set ppc_md.get_irq to mpc52xx_get_irq and call
> mpc52xx_init_irq().
>
> * serial stuff / IBP Freq. As this frequency is MPC52xx specific. I
> think it would make sense to add a new func mpc52xx_getipbfreq(void).
> The way it would be implemented may depend of the architecture. Our
> firmware contains an 'ipb-freq' property in '/builtin/'.
>
> diff -uprN a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
> --- a/arch/powerpc/platforms/chrp/setup.c 2006-10-25 19:07:23.000000000 +0200
> +++ b/arch/powerpc/platforms/chrp/setup.c 2006-10-25 19:10:18.000000000 +0200
> @@ -101,7 +102,8 @@ static const char *chrp_names[] = {
> "Motorola",
> "IBM or Longtrail",
> "Genesi Pegasos",
> - "Total Impact Briq"
> + "Total Impact Briq",
> + "bPlan Efika"
> };
I agree w/ Paul... the chrp_type stuff is stinky. :)
> @@ -494,6 +498,12 @@ void __init chrp_init_IRQ(void)
> #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
> struct device_node *kbd;
> #endif
> + if (_chrp_type == _CHRP_E5K2) {
> + ppc_md.get_irq = mpc52xx_get_irq;
> + mpc52xx_init_irq();
> + return;
> + }
> +
> chrp_find_openpic();
> chrp_find_8259();
Also, this only covers one 52xx board and does not match the
convention in this function. Shouldn't this instead call a new
function "chrp_find_mpc52xx_pic()?
>
> @@ -530,6 +540,9 @@ chrp_init2(void)
> chrp_nvram_init();
> #endif
>
> + if (_chrp_type == _CHRP_E5K2)
> + return;
> +
> request_region(0x20,0x20,"pic1");
> request_region(0xa0,0x20,"pic2");
> request_region(0x00,0x20,"dma1");
There's got to be a better way to go about this. If all the
request_regions are not required by all CHRP platforms, then they
should be enclosed by an if{} block. Just bailing from the function
does not seem to be a good idea to me. For example, at the end of
chrp_init2() there is a progress method called (if enabled). Bailing
out prevents that progress message. (not a big issue, but I'm looking
a convention consistency here)
> diff -uprN a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h
> --- a/include/asm-powerpc/processor.h 2006-10-25 19:07:48.000000000 +0200
> +++ b/include/asm-powerpc/processor.h 2006-10-25 19:11:54.000000000 +0200
> @@ -33,6 +33,7 @@
> #define _CHRP_IBM 0x05 /* IBM chrp, the longtrail and longtrail 2 */
> #define _CHRP_Pegasos 0x06 /* Genesi/bplan's Pegasos and Pegasos2 */
> #define _CHRP_briq 0x07 /* TotalImpact's briQ */
> +#define _CHRP_E5K2 0x08 /* bPlan's Efika 5k2*/
Ick. :)
> diff -uprN a/include/asm-ppc/mpc52xx.h b/include/asm-ppc/mpc52xx.h
> --- a/include/asm-ppc/mpc52xx.h 2006-10-25 19:07:48.000000000 +0200
> +++ b/include/asm-ppc/mpc52xx.h 2006-10-25 19:11:55.000000000 +0200
> @@ -119,7 +119,7 @@ enum ppc_sys_devices {
> #define MPC52xx_SDMA_IRQ_NUM 17
> #define MPC52xx_PERP_IRQ_NUM 23
>
> -#define MPC52xx_CRIT_IRQ_BASE 1
> +#define MPC52xx_CRIT_IRQ_BASE 0
> #define MPC52xx_MAIN_IRQ_BASE (MPC52xx_CRIT_IRQ_BASE + MPC52xx_CRIT_IRQ_NUM)
> #define MPC52xx_SDMA_IRQ_BASE (MPC52xx_MAIN_IRQ_BASE + MPC52xx_MAIN_IRQ_NUM)
> #define MPC52xx_PERP_IRQ_BASE (MPC52xx_SDMA_IRQ_BASE + MPC52xx_SDMA_IRQ_NUM)
Just curious... why?
> --- a/arch/powerpc/sysdev/mpc52xx_pic.c 1970-01-01 01:00:00.000000000 +0100
> +++ b/arch/powerpc/sysdev/mpc52xx_pic.c 2006-10-25 19:17:48.000000000 +0200
I'll skip commenting on PIC stuff as I'm still working through how it
all works myself. It still needs to be worked out if we go to a two
level interrupt # table in the device tree (interrupt_cells=3) and
where they will be mapped back into Linux IRQ numbers.
> --- a/arch/powerpc/sysdev/Makefile 2006-10-25 19:07:24.000000000 +0200
> +++ b/arch/powerpc/sysdev/Makefile 2006-10-25 20:33:32.000000000 +0200
> @@ -13,6 +13,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
> obj-$(CONFIG_PPC_TODC) += todc.o
> obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
> obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
> +obj-$(CONFIG_PPC_CHRP) += mpc52xx_pic.o
>
> ifeq ($(CONFIG_PPC_MERGE),y)
> obj-$(CONFIG_PPC_I8259) += i8259.o
>
>
>
>
--
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH] General CHRP/MPC5K2 platform support patch
From: Benjamin Herrenschmidt @ 2006-10-25 23:06 UTC (permalink / raw)
To: Grant Likely; +Cc: akpm, sl, linuxppc-dev, linuxppc-embedded, sha
In-Reply-To: <528646bc0610251601l171eb05k73e1af1c3391ae8@mail.gmail.com>
On Wed, 2006-10-25 at 17:01 -0600, Grant Likely wrote:
> Thanks Nicolas, I'll dig through the PIC code tonight. I'm really not
> sure about the implications of this being a CHRP board vs. the
> Lite5200 using u-boot. ie. Should the Lite5200 also be a CHRP
> platform? Does u-boot provide enough capability (this is where my
> ignorance about CHRP shines through)
Bah, if you have no RTAS, don't bother being CHRP.
> > * serial stuff / IBP Freq. As this frequency is MPC52xx specific. I
> > think it would make sense to add a new func mpc52xx_getipbfreq(void).
> > The way it would be implemented may depend of the architecture. Our
> > firmware contains an 'ipb-freq' property in '/builtin/'.
BTW. I forgot to comment on the above in my previous mail... As I said,
there should be no such thing. Instead, the IPB freq should be in the
device-tree.
^ permalink raw reply
* Re: [PATCH] General CHRP/MPC5K2 platform support patch
From: Sven Luther @ 2006-10-25 23:13 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: akpm, linuxppc-embedded, sl, linuxppc-dev, sven, sha
In-Reply-To: <1161817576.22582.142.camel@localhost.localdomain>
On Thu, Oct 26, 2006 at 09:06:16AM +1000, Benjamin Herrenschmidt wrote:
> > > * serial stuff / IBP Freq. As this frequency is MPC52xx specific. I
> > > think it would make sense to add a new func mpc52xx_getipbfreq(void).
> > > The way it would be implemented may depend of the architecture. Our
> > > firmware contains an 'ipb-freq' property in '/builtin/'.
>
> BTW. I forgot to comment on the above in my previous mail... As I said,
> there should be no such thing. Instead, the IPB freq should be in the
> device-tree.
Euh, how is this different from having our "firmware contains an 'ipb-freq'
property in '/builtin/'". There is no an ipb-freq property in the device tree,
so you need a function to be able to get it from the the device tree, which i
believe what is proposed here.
Friendly,
Sven Luther
^ permalink raw reply
* Re: [Cbe-oss-dev] [PATCH 12/16] cell: add temperature to SPU and CPU sysfs entries
From: Benjamin Herrenschmidt @ 2006-10-25 23:19 UTC (permalink / raw)
To: Heiko Carstens
Cc: linuxppc-dev, cbe-oss-dev, Arnd Bergmann, arnd, linux-kernel
In-Reply-To: <20061025080048.GB7090@osiris.boeblingen.de.ibm.com>
On Wed, 2006-10-25 at 10:00 +0200, Heiko Carstens wrote:
> On Tue, Oct 24, 2006 at 06:31:25PM +0200, arnd@arndb.de wrote:
>
> > + * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
>
> IBM Corp. instead of IBM DE? 2006?
>
> > +static int __init thermal_init(void)
> > +{
> > + init_default_values();
> > +
> > + spu_add_sysdev_attr_group(&spu_attribute_group);
> > + cpu_add_sysdev_attr_group(&ppe_attribute_group);
> > +
> > + return 0;
> > +}
>
> Same here: check for errors on spu_add_sysdev_attr_group and
> cpu_add_sysdev_attr_group.
>
> > +static void __exit thermal_exit(void)
> > +{
> > + spu_remove_sysdev_attr_group(&spu_attribute_group);
> > + cpu_remove_sysdev_attr_group(&ppe_attribute_group);
>
> Will crash if cpu_add_sysdev_attr_group failed...
Which is a total PITA. If this is the case, then we should modify the
add calls to at least initialize enough fields before they can fail for
the remove calls not to crash. You don't want to keep track precisely of
what file was added and what not and test all of that in your exit code
path, it's just insane.
Ben.
^ permalink raw reply
* [POWERPC] Round up bootwrapper alloc size for vmlinux to page size
From: Mark A. Greer @ 2006-10-25 23:36 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
The powerpc kernel linker script, arch/powerpc/kernel/vmlinux.lds.S,
aligns '_end' up to a page boundary. However, the bootwrapper
does not round up the size of the area that it allocates to gunzip
the kernel into. This leaves space between '__bss_stop' and '_end'
where the bootwrapper could allocate other things (e.g., space for
a flattened device tree). This patch rounds up the allocation size
to a multiple of the page size to match '_end' and prevent the latent
bug.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
---
main.c | 2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
---
diff --git a/arch/powerpc/boot/main.c b/arch/powerpc/boot/main.c
index 4184974..234bb5b 100644
--- a/arch/powerpc/boot/main.c
+++ b/arch/powerpc/boot/main.c
@@ -198,7 +198,7 @@ static void prep_kernel(unsigned long *a
* be claimed (it will be zero'd by the kernel itself)
*/
printf("Allocating 0x%lx bytes for kernel ...\n\r", vmlinux.memsize);
- vmlinux.addr = (unsigned long)malloc(vmlinux.memsize);
+ vmlinux.addr = (unsigned long)malloc(_ALIGN(vmlinux.memsize, 4096));
if (vmlinux.addr == 0) {
printf("Can't allocate memory for kernel image !\n\r");
exit();
^ permalink raw reply related
* [POWERPC] 32-bit early_init() should zero from __bss_start to __bss_stop only
From: Mark A. Greer @ 2006-10-25 23:36 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Currently, early_init() in setup_32.c zeroes from '_bss_start' to '_end'.
It should only zero from '__bss_start' to '__bss_stop'. This patch does that.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
---
setup_32.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletion(-)
---
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index a4c2964..c682e9a 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -95,7 +95,8 @@ unsigned long __init early_init(unsigned
/* First zero the BSS -- use memset_io, some platforms don't have
* caches on yet */
- memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, _end - __bss_start);
+ memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
+ __bss_stop - __bss_start);
/*
* Identify the CPU type and fix up code sections
^ permalink raw reply related
* Re: [POWERPC] 32-bit early_init() should zero from __bss_start to __bss_stop only
From: Benjamin Herrenschmidt @ 2006-10-26 0:06 UTC (permalink / raw)
To: Mark A. Greer; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <20061025233649.GB17461@mag.az.mvista.com>
On Wed, 2006-10-25 at 16:36 -0700, Mark A. Greer wrote:
> Currently, early_init() in setup_32.c zeroes from '_bss_start' to '_end'.
> It should only zero from '__bss_start' to '__bss_stop'. This patch does that.
>
> Signed-off-by: Mark A. Greer <mgreer@mvista.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>
> setup_32.c | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletion(-)
> ---
>
> diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
> index a4c2964..c682e9a 100644
> --- a/arch/powerpc/kernel/setup_32.c
> +++ b/arch/powerpc/kernel/setup_32.c
> @@ -95,7 +95,8 @@ unsigned long __init early_init(unsigned
>
> /* First zero the BSS -- use memset_io, some platforms don't have
> * caches on yet */
> - memset_io((void __iomem *)PTRRELOC(&__bss_start), 0, _end - __bss_start);
> + memset_io((void __iomem *)PTRRELOC(&__bss_start), 0,
> + __bss_stop - __bss_start);
>
> /*
> * Identify the CPU type and fix up code sections
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* System ACE driver - for 2.6 kernel - need help to understand xsa_thread
From: agnel juni @ 2006-10-26 0:31 UTC (permalink / raw)
To: Ameet Patil; +Cc: linuxppc-embedded
In-Reply-To: <45311FE5.3080400@cs.york.ac.uk>
[-- Attachment #1: Type: text/plain, Size: 1363 bytes --]
Hello all
I am trying to understand the parameters that are sent through "cur_req" function used in funtion xsa_thread in System ACE driver.
In xsa_thread function in the System ACE driver ,
In 2.4 kernel:
--------------------
while ((stat = cur_req(&SysAce, sector,
CURRENT->current_nr_sectors,
CURRENT->buffer)) == XST_DEVICE_BUSY)
xsa_short_delay();
Where as in 2.6 kernel this is changed to
---------------------------------------------------------------
for(i = xsa_cur_req->current_nr_sectors; i > 0; i-=2){
xsa_device.req_done = 1;
while ((stat = cur_req(&SysAce, sector,
2,
buffer)) == XST_DEVICE_BUSY)
xsa_short_delay();
#endif
Ameet , could you help me understand the impact of the parameters, especailly the 3rd paramter which is hardcoded in 2.6 kernel.It would be great if you could clarify this in regard to 'mount' command.
Thanks in advance
Junita
---------------------------------
Find out what India is talking about on - Yahoo! Answers India
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[-- Attachment #2: Type: text/html, Size: 2932 bytes --]
^ permalink raw reply
* [PATCH 1/3] Constify compat_get_bitmap argument
From: Stephen Rothwell @ 2006-10-26 3:26 UTC (permalink / raw)
To: LKML; +Cc: ppc-dev, paulus, ak, linux-mm
This means we can call it when the bitmap we want to fetch is declared
const.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
include/linux/compat.h | 2 +-
kernel/compat.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
This is headed towards getting sys_migrate_pages wired up for powerpc.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
diff --git a/include/linux/compat.h b/include/linux/compat.h
index f4ebf96..f155319 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -196,7 +196,7 @@ #define BITS_PER_COMPAT_LONG (8*sizeo
#define BITS_TO_COMPAT_LONGS(bits) \
(((bits)+BITS_PER_COMPAT_LONG-1)/BITS_PER_COMPAT_LONG)
-long compat_get_bitmap(unsigned long *mask, compat_ulong_t __user *umask,
+long compat_get_bitmap(unsigned long *mask, const compat_ulong_t __user *umask,
unsigned long bitmap_size);
long compat_put_bitmap(compat_ulong_t __user *umask, unsigned long *mask,
unsigned long bitmap_size);
diff --git a/kernel/compat.c b/kernel/compat.c
index 75573e5..d4898aa 100644
--- a/kernel/compat.c
+++ b/kernel/compat.c
@@ -678,7 +678,7 @@ int get_compat_sigevent(struct sigevent
? -EFAULT : 0;
}
-long compat_get_bitmap(unsigned long *mask, compat_ulong_t __user *umask,
+long compat_get_bitmap(unsigned long *mask, const compat_ulong_t __user *umask,
unsigned long bitmap_size)
{
int i, j;
--
1.4.3.2
^ permalink raw reply related
* [PATCH 2/3] Create compat_sys_migrate_pages
From: Stephen Rothwell @ 2006-10-26 3:33 UTC (permalink / raw)
To: LKML; +Cc: ppc-dev, paulus, ak, linux-mm
In-Reply-To: <20061026132659.2ff90dd1.sfr@canb.auug.org.au>
This is needed on bigendian 64bit architectures. The obvious way to do
this (taking the other compat_ routines in this file as examples) is to
use compat_alloc_user_space and copy the bitmasks back there, however you
cannot call compat_alloc_user_space twice for a single system call and
this method saves two copies of the bitmasks.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
mm/mempolicy.c | 107 ++++++++++++++++++++++++++++++++++++++++++++++++-------
1 files changed, 93 insertions(+), 14 deletions(-)
Maybe the other compat routines in here should be converted to use
compat_get_nodes as well.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
diff --git a/mm/mempolicy.c b/mm/mempolicy.c
index 617fb31..65c0281 100644
--- a/mm/mempolicy.c
+++ b/mm/mempolicy.c
@@ -854,6 +854,58 @@ static int get_nodes(nodemask_t *nodes,
return 0;
}
+#ifdef CONFIG_COMPAT
+static int compat_get_nodes(nodemask_t *nodes,
+ const compat_ulong_t __user *nmask, unsigned long maxnode)
+{
+ unsigned long k;
+ unsigned long nlongs;
+ unsigned long nbits = maxnode - 1;
+ compat_ulong_t endmask;
+
+ if (maxnode == 0)
+ return -EINVAL;
+ nodes_clear(*nodes);
+ if (nbits == 0 || !nmask)
+ return 0;
+ if (nbits > PAGE_SIZE * BITS_PER_BYTE)
+ return -EINVAL;
+
+ nlongs = BITS_TO_COMPAT_LONGS(nbits);
+ if ((nbits % BITS_PER_COMPAT_LONG) == 0)
+ endmask = (compat_ulong_t)~0;
+ else
+ endmask = ((compat_ulong_t)1 <<
+ (nbits % BITS_PER_COMPAT_LONG)) - 1;
+
+ /* When the user specified more nodes than supported just check
+ if the non supported part is all zero. */
+ if (nbits > MAX_NUMNODES) {
+ if (nlongs > PAGE_SIZE / sizeof(compat_ulong_t))
+ return -EINVAL;
+ for (k = BITS_TO_COMPAT_LONGS(MAX_NUMNODES); k < nlongs; k++) {
+ compat_ulong_t t;
+
+ if (get_user(t, nmask + k))
+ return -EFAULT;
+ if (k == (nlongs - 1)) {
+ if (t & endmask)
+ return -EINVAL;
+ } else if (t)
+ return -EINVAL;
+ }
+ nbits = MAX_NUMNODES;
+ endmask = ~0;
+ }
+
+ if (compat_get_bitmap(nodes_addr(*nodes), nmask, nbits))
+ return -EFAULT;
+ if (nbits % BITS_PER_COMPAT_LONG)
+ nodes_addr(*nodes)[BITS_TO_COMPAT_LONGS(nbits) - 1] &= endmask;
+ return 0;
+}
+#endif /* CONFIG_COMPAT */
+
/* Copy a kernel node mask to user space */
static int copy_nodes_to_user(unsigned long __user *mask, unsigned long maxnode,
nodemask_t *nodes)
@@ -900,25 +952,13 @@ asmlinkage long sys_set_mempolicy(int mo
return do_set_mempolicy(mode, &nodes);
}
-asmlinkage long sys_migrate_pages(pid_t pid, unsigned long maxnode,
- const unsigned long __user *old_nodes,
- const unsigned long __user *new_nodes)
+static long internal_migrate_pages(pid_t pid, nodemask_t *old, nodemask_t *new)
{
struct mm_struct *mm;
struct task_struct *task;
- nodemask_t old;
- nodemask_t new;
nodemask_t task_nodes;
int err;
- err = get_nodes(&old, old_nodes, maxnode);
- if (err)
- return err;
-
- err = get_nodes(&new, new_nodes, maxnode);
- if (err)
- return err;
-
/* Find the mm_struct */
read_lock(&tasklist_lock);
task = pid ? find_task_by_pid(pid) : current;
@@ -963,6 +1003,25 @@ out:
return err;
}
+asmlinkage long sys_migrate_pages(pid_t pid, unsigned long maxnode,
+ const unsigned long __user *old_nodes,
+ const unsigned long __user *new_nodes)
+{
+ nodemask_t old;
+ nodemask_t new;
+ int err;
+
+ err = get_nodes(&old, old_nodes, maxnode);
+ if (err)
+ return err;
+
+ err = get_nodes(&new, new_nodes, maxnode);
+ if (err)
+ return err;
+
+ return internal_migrate_pages(pid, old, new);
+}
+
/* Retrieve NUMA policy */
asmlinkage long sys_get_mempolicy(int __user *policy,
@@ -1067,7 +1126,27 @@ asmlinkage long compat_sys_mbind(compat_
return sys_mbind(start, len, mode, nm, nr_bits+1, flags);
}
-#endif
+asmlinkage long compat_sys_migrate_pages(compat_pid_t pid,
+ compat_ulong_t maxnode,
+ const compat_ulong_t __user *old_nodes,
+ const compat_ulong_t __user *new_nodes)
+{
+ nodemask_t old;
+ nodemask_t new;
+ int err;
+
+ err = get_nodes(&old, old_nodes, maxnode);
+ if (err)
+ return err;
+
+ err = get_nodes(&new, new_nodes, maxnode);
+ if (err)
+ return err;
+
+ return internal_migrate_pages(pid, old, new);
+}
+
+#endif /* CONFIG_COMPAT */
/* Return effective policy for a VMA */
static struct mempolicy * get_vma_policy(struct task_struct *task,
--
1.4.3.2
^ permalink raw reply related
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