* [PATCH 10/10] zImage wrapper for Ebony
From: David Gibson @ 2007-04-18 6:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070418063517.GB29312@localhost.localdomain>
This patch adds support for building a zImage wrapper suitable for the
Ebony (440GP) evaluation board. This supports booting both from uboot
(old versions which don't supply a flattened device tree) and IBM
Openbios (aka "treeboot").
Signed-off-by: David Gibson <dwg@au1.ibm.com>
---
arch/powerpc/boot/Makefile | 26 +++++++
arch/powerpc/boot/dcr.h | 85 +++++++++++++++++++++++++
arch/powerpc/boot/ebony.c | 149 +++++++++++++++++++++++++++++++++++++++++++++
arch/powerpc/boot/mktree.c | 10 +--
arch/powerpc/boot/wrapper | 33 +++++++++
5 files changed, 296 insertions(+), 7 deletions(-)
Index: working-2.6/arch/powerpc/boot/Makefile
===================================================================
--- working-2.6.orig/arch/powerpc/boot/Makefile 2007-04-18 14:42:52.000000000 +1000
+++ working-2.6/arch/powerpc/boot/Makefile 2007-04-18 14:43:14.000000000 +1000
@@ -43,7 +43,7 @@ $(addprefix $(obj)/,$(zlib) main.o): $(a
src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
ns16550.c serial.c simple_alloc.c div64.S util.S \
gunzip_util.c elf_util.c $(zlib) devtree.c
-src-plat := of.c
+src-plat := of.c ebony.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -95,6 +95,12 @@ $(patsubst %.S,%.o, $(filter %.S, $(src-
$(obj)/wrapper.a: $(obj-wlib) FORCE
$(call if_changed,bootar)
+quiet_cmd_dtc = DTC $@
+ cmd_dtc = $(dtc) -O dtb -o $@ -b 0 -V 16 $<
+
+$(obj)/%.dtb: $(srctree)/$(src)/dts/%.dts
+ $(call if_changed,dtc)
+
hostprogs-y := addnote addRamDisk hack-coff mktree
targets += $(patsubst $(obj)/%,%,$(obj-boot) wrapper.a)
@@ -105,6 +111,8 @@ wrapper :=$(srctree)/$(src)/wrapper
wrapperbits := $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree) \
$(wrapper) FORCE
+dtc := dtc
+
#############
# Bits for building various flavours of zImage
@@ -129,6 +137,7 @@ image-$(CONFIG_PPC_CELLEB) += zImage.ps
image-$(CONFIG_PPC_CHRP) += zImage.chrp
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
image-$(CONFIG_PPC_PMAC) += zImage.pmac
+image-$(CONFIG_EBONY) += zImage.ebony-elf zImage.ebony uImage.ebony
image-$(CONFIG_DEFAULT_UIMAGE) += uImage
# For 32-bit powermacs, build the COFF and miboot images
@@ -159,6 +168,21 @@ $(obj)/zImage.ps3: vmlinux
$(obj)/zImage.initrd.ps3: vmlinux
@echo " WARNING zImage.initrd.ps3 not supported (yet)"
+$(obj)/zImage.ebony-elf: vmlinux $(wrapperbits) $(obj)/ebony.dtb
+ $(call if_changed,wrap,ebony,,$(obj)/ebony.dtb)
+
+$(obj)/zImage.initrd.ebony-elf: vmlinux $(wrapperbits) $(obj)/ebony.dtb $(obj)/ramdisk.image.gz
+ $(call if_changed,wrap,ebony,,$(obj)/ebony.dtb,$(obj)/ramdisk.img.gz)
+
+$(obj)/zImage.ebony: vmlinux $(wrapperbits) $(obj)/ebony.dtb $(obj)/mktree
+ $(call if_changed,wrap,ebony-tree,,$(obj)/ebony.dtb)
+
+$(obj)/zImage.initrd.ebony: vmlinux $(wrapperbits) $(obj)/ebony.dtb $(obj)/mktree
+ $(call if_changed,wrap,ebony-tree,,$(obj)/ebony.dtb,$(obj)/ramdisk.img.gz)
+
+$(obj)/uImage.ebony: vmlinux $(wrapperbits) $(obj)/ebony.dtb
+ $(call if_changed,wrap,ebony-uboot,,$(obj)/ebony.dtb)
+
$(obj)/uImage: vmlinux $(wrapperbits)
$(call if_changed,wrap,uboot)
Index: working-2.6/arch/powerpc/boot/ebony.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/boot/ebony.c 2007-04-18 14:42:58.000000000 +1000
@@ -0,0 +1,149 @@
+/*
+ * Copyright 2007 David Gibson, IBM Corporation.
+ *
+ * Based on earlier code:
+ * Copyright (C) Paul Mackerras 1997.
+ * Copyright 2002-2005 MontaVista Software Inc.
+ * Copyright (c) 2003, 2004 Zultys Technologies
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <stdarg.h>
+#include <stddef.h>
+#include "types.h"
+#include "elf.h"
+#include "string.h"
+#include "stdio.h"
+#include "page.h"
+#include "ops.h"
+#include "reg.h"
+#include "dcr.h"
+
+extern char _start[];
+extern char _end[];
+extern char _dtb_start[];
+extern char _dtb_end[];
+
+BSS_STACK(4096);
+
+#define OPENBIOS_MAC_BASE 0xfffffe0c
+#define OPENBIOS_MAC_OFFSET 0xc
+
+/* Read the 44x memory controller to get size of system memory. */
+static void ibm44x_fixup_memsize(void)
+{
+ int i;
+ unsigned long memsize, bank_config;
+
+ memsize = 0;
+ for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) {
+ mtdcr(DCRN_SDRAM0_CFGADDR, sdram_bxcr[i]);
+ bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
+
+ if (bank_config & SDRAM_CONFIG_BANK_ENABLE)
+ memsize += SDRAM_CONFIG_BANK_SIZE(bank_config);
+ }
+
+ dt_fixup_memory(0, memsize);
+}
+
+/* Calculate 440GP clocks */
+void ibm440gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
+{
+ u32 sys0 = mfdcr(DCRN_CPC0_SYS0);
+ u32 cr0 = mfdcr(DCRN_CPC0_CR0);
+ u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
+ u32 opdv = CPC0_SYS0_OPDV(sys0);
+ u32 epdv = CPC0_SYS0_EPDV(sys0);
+
+ if (sys0 & CPC0_SYS0_BYPASS) {
+ /* Bypass system PLL */
+ cpu = plb = sysclk;
+ } else {
+ if (sys0 & CPC0_SYS0_EXTSL)
+ /* PerClk */
+ m = CPC0_SYS0_FWDVB(sys0) * opdv * epdv;
+ else
+ /* CPU clock */
+ m = CPC0_SYS0_FBDV(sys0) * CPC0_SYS0_FWDVA(sys0);
+ cpu = sysclk * m / CPC0_SYS0_FWDVA(sys0);
+ plb = sysclk * m / CPC0_SYS0_FWDVB(sys0);
+ }
+
+ opb = plb / opdv;
+ ebc = opb / epdv;
+
+ /* FIXME: Check if this is for all 440GP, or just Ebony */
+ if ((mfpvr() & 0xf0000fff) == 0x40000440)
+ /* Rev. B 440GP, use external system clock */
+ tb = sysclk;
+ else
+ /* Rev. C 440GP, errata force us to use internal clock */
+ tb = cpu;
+
+ if (cr0 & CPC0_CR0_U0EC)
+ /* External UART clock */
+ uart0 = ser_clk;
+ else
+ /* Internal UART clock */
+ uart0 = plb / CPC0_CR0_UDIV(cr0);
+
+ if (cr0 & CPC0_CR0_U1EC)
+ /* External UART clock */
+ uart1 = ser_clk;
+ else
+ /* Internal UART clock */
+ uart1 = plb / CPC0_CR0_UDIV(cr0);
+
+ printf("PPC440GP: SysClk = %dMHz (%x)\n\r",
+ (sysclk + 500000) / 1000000, sysclk);
+
+ dt_fixup_cpu_clocks(cpu, tb, 0);
+
+ dt_fixup_clock("/plb", plb);
+ dt_fixup_clock("/plb/opb", opb);
+ dt_fixup_clock("/plb/opb/ebc", ebc);
+ dt_fixup_clock("/plb/opb/serial@40000200", uart0);
+ dt_fixup_clock("/plb/opb/serial@40000300", uart1);
+}
+
+static void ebony_fixups(void)
+{
+ // FIXME: sysclk should be derived by reading the FPGA registers
+ unsigned long sysclk = 33000000;
+
+ ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
+ ibm44x_fixup_memsize();
+ dt_fixup_mac_addresses((u8 *)OPENBIOS_MAC_BASE,
+ (u8 *)(OPENBIOS_MAC_BASE + OPENBIOS_MAC_OFFSET));
+}
+
+#define SPRN_DBCR0 0x134
+#define DBCR0_RST_SYSTEM 0x30000000
+
+static void ebony_exit(void)
+{
+ unsigned long tmp;
+
+ asm volatile (
+ "mfspr %0,%1\n"
+ "oris %0,%0,%2@h\n"
+ "mtspr %1,%0"
+ : "=&r"(tmp) : "i"(SPRN_DBCR0), "i"(DBCR0_RST_SYSTEM)
+ );
+
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5)
+{
+ u32 heapsize = 0x8000000 - (u32)_end; /* 128M */
+
+ platform_ops.fixups = ebony_fixups;
+ platform_ops.exit = ebony_exit;
+ simple_alloc_init(_end, heapsize, 32, 64);
+ ft_init(_dtb_start, 0, 32);
+ serial_console_init();
+}
Index: working-2.6/arch/powerpc/boot/wrapper
===================================================================
--- working-2.6.orig/arch/powerpc/boot/wrapper 2007-04-18 14:40:39.000000000 +1000
+++ working-2.6/arch/powerpc/boot/wrapper 2007-04-18 14:42:58.000000000 +1000
@@ -141,6 +141,12 @@ miboot|uboot)
ksection=image
isection=initrd
;;
+*-tree)
+ platformo=$object/"${platform%%-tree}".o
+ ;;
+*-uboot)
+ platformo=$object/"${platform%%-uboot}".o
+ ;;
esac
vmz="$tmpdir/`basename \"$kernel\"`.$ext"
@@ -216,4 +222,31 @@ pmaccoff)
${CROSS}objcopy -O aixcoff-rs6000 --set-start "$entry" "$ofile"
$object/hack-coff "$ofile"
;;
+*-tree)
+ mv "$ofile" "$ofile.elf"
+ entry=`objdump -f "$ofile.elf" | grep '^start address ' | \
+ cut -d' ' -f3`
+ $object/mktree "$ofile.elf" "$ofile" 0x00400000 "$entry"
+ if [ -z "$cacheit" ]; then
+ rm -f "$ofile.elf"
+ fi
+ exit 0
+ ;;
+*-uboot)
+ mv "$ofile" "$ofile.elf"
+ version=`${CROSS}strings "$kernel" | grep '^Linux version [-0-9.]' | \
+ cut -d' ' -f3`
+ if [ -n "$version" ]; then
+ version="-n Linux-$version"
+ fi
+ entry=`objdump -f "$ofile.elf" | grep '^start address ' | \
+ cut -d' ' -f3`
+ ${CROSS}objcopy -O binary "$ofile.elf" "$ofile.bin"
+ mkimage -A ppc -O linux -T kernel -C none -a 0x00400000 -e $entry \
+ $version -d "$ofile.bin" "$ofile"
+ if [ -z "$cacheit" ]; then
+ rm -f "$ofile.elf" "$ofile.bin"
+ fi
+ exit 0
+ ;;
esac
Index: working-2.6/arch/powerpc/boot/mktree.c
===================================================================
--- working-2.6.orig/arch/powerpc/boot/mktree.c 2007-01-24 12:01:17.000000000 +1100
+++ working-2.6/arch/powerpc/boot/mktree.c 2007-04-18 14:42:58.000000000 +1000
@@ -46,8 +46,8 @@ int main(int argc, char *argv[])
struct stat st;
boot_block_t bt;
- if (argc < 3) {
- fprintf(stderr, "usage: %s <zImage-file> <boot-image> [entry-point]\n",argv[0]);
+ if (argc < 5) {
+ fprintf(stderr, "usage: %s <zImage-file> <boot-image> <load address> <entry point>\n",argv[0]);
exit(1);
}
@@ -61,10 +61,8 @@ int main(int argc, char *argv[])
bt.bb_magic = htonl(0x0052504F);
/* If we have the optional entry point parameter, use it */
- if (argc == 4)
- bt.bb_dest = bt.bb_entry_point = htonl(strtoul(argv[3], NULL, 0));
- else
- bt.bb_dest = bt.bb_entry_point = htonl(0x500000);
+ bt.bb_dest = htonl(strtoul(argv[3], NULL, 0));
+ bt.bb_entry_point = htonl(strtoul(argv[4], NULL, 0));
/* We know these from the linker command.
* ...and then move it up into memory a little more so the
Index: working-2.6/arch/powerpc/boot/dcr.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/boot/dcr.h 2007-04-18 14:42:58.000000000 +1000
@@ -0,0 +1,85 @@
+#ifndef _PPC_BOOT_DCR_H_
+#define _PPC_BOOT_DCR_H_
+
+#define mfdcr(rn) \
+ ({ \
+ unsigned long rval; \
+ asm volatile("mfdcr %0,%1" : "=r"(rval) : "i"(rn)); \
+ rval; \
+ })
+#define mtdcr(rn, val) \
+ asm volatile("mtdcr %0,%1" : : "i"(rn), "r"(val))
+
+/* 440GP/440GX SDRAM controller DCRs */
+#define DCRN_SDRAM0_CFGADDR 0x010
+#define DCRN_SDRAM0_CFGDATA 0x011
+
+#define SDRAM0_B0CR 0x40
+#define SDRAM0_B1CR 0x44
+#define SDRAM0_B2CR 0x48
+#define SDRAM0_B3CR 0x4c
+
+static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2CR, SDRAM0_B3CR };
+
+#define SDRAM_CONFIG_BANK_ENABLE 0x00000001
+#define SDRAM_CONFIG_SIZE_MASK 0x000e0000
+#define SDRAM_CONFIG_BANK_SIZE(reg) \
+ (0x00400000 << ((reg & SDRAM_CONFIG_SIZE_MASK) >> 17))
+
+/* 440GP Clock, PM, chip control */
+#define DCRN_CPC0_SR 0x0b0
+#define DCRN_CPC0_ER 0x0b1
+#define DCRN_CPC0_FR 0x0b2
+#define DCRN_CPC0_SYS0 0x0e0
+#define CPC0_SYS0_TUNE 0xffc00000
+#define CPC0_SYS0_FBDV_MASK 0x003c0000
+#define CPC0_SYS0_FBDV(reg) \
+ ((((((reg) & CPC0_SYS0_FBDV_MASK) >> 18) - 1) & 0xf) + 1)
+#define CPC0_SYS0_FWDVA_MASK 0x00038000
+#define CPC0_SYS0_FWDVA(reg) \
+ (8 - (((reg) & CPC0_SYS0_FWDVA_MASK) >> 15))
+#define CPC0_SYS0_FWDVB_MASK 0x00007000
+#define CPC0_SYS0_FWDVB(reg) \
+ (8 - (((reg) & CPC0_SYS0_FWDVB_MASK) >> 12))
+#define CPC0_SYS0_OPDV_MASK 0x00000c00
+#define CPC0_SYS0_OPDV(reg) \
+ ((((reg) & CPC0_SYS0_OPDV_MASK) >> 10) + 1)
+#define CPC0_SYS0_EPDV_MASK 0x00000300
+#define CPC0_SYS0_EPDV(reg) \
+ ((((reg) & CPC0_SYS0_EPDV_MASK) >> 8) + 1)
+#define CPC0_SYS0_EXTSL 0x00000080
+#define CPC0_SYS0_RW_MASK 0x00000060
+#define CPC0_SYS0_RL 0x00000010
+#define CPC0_SYS0_ZMIISL_MASK 0x0000000c
+#define CPC0_SYS0_BYPASS 0x00000002
+#define CPC0_SYS0_NTO1 0x00000001
+#define DCRN_CPC0_SYS1 0x0e1
+#define DCRN_CPC0_CUST0 0x0e2
+#define DCRN_CPC0_CUST1 0x0e3
+#define DCRN_CPC0_STRP0 0x0e4
+#define DCRN_CPC0_STRP1 0x0e5
+#define DCRN_CPC0_STRP2 0x0e6
+#define DCRN_CPC0_STRP3 0x0e7
+#define DCRN_CPC0_GPIO 0x0e8
+#define DCRN_CPC0_PLB 0x0e9
+#define DCRN_CPC0_CR1 0x0ea
+#define DCRN_CPC0_CR0 0x0eb
+#define CPC0_CR0_SWE 0x80000000
+#define CPC0_CR0_CETE 0x40000000
+#define CPC0_CR0_U1FCS 0x20000000
+#define CPC0_CR0_U0DTE 0x10000000
+#define CPC0_CR0_U0DRE 0x08000000
+#define CPC0_CR0_U0DC 0x04000000
+#define CPC0_CR0_U1DTE 0x02000000
+#define CPC0_CR0_U1DRE 0x01000000
+#define CPC0_CR0_U1DC 0x00800000
+#define CPC0_CR0_U0EC 0x00400000
+#define CPC0_CR0_U1EC 0x00200000
+#define CPC0_CR0_UDIV_MASK 0x001f0000
+#define CPC0_CR0_UDIV(reg) \
+ ((((reg) & CPC0_CR0_UDIV_MASK) >> 16) + 1)
+#define DCRN_CPC0_MIRQ0 0x0ec
+#define DCRN_CPC0_MIRQ1 0x0ed
+#define DCRN_CPC0_JTAGID 0x0ef
+
+#endif /* _PPC_BOOT_DCR_H_ */
^ permalink raw reply
* [PATCH 9/10] Add device tree for Ebony
From: David Gibson @ 2007-04-18 6:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070418063517.GB29312@localhost.localdomain>
Add a device tree for the Ebony evaluation board (440GP based). This
tree is not complete or finalized. This tree needs a very recent
version of dtc to process.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
---
arch/powerpc/boot/dts/ebony.dts | 295 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 295 insertions(+)
Index: working-2.6/arch/powerpc/boot/dts/ebony.dts
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/boot/dts/ebony.dts 2007-03-21 13:23:48.000000000 +1100
@@ -0,0 +1,295 @@
+/*
+ * Device Tree Source for IBM Ebony
+ *
+ * Copyright (c) 2006, 2007 IBM Corp.
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
+ *
+ * FIXME: Draft only!
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ *
+ * To build:
+ * dtc -I dts -O asm -o ebony.S -b 0 -V 16 ebony.dts
+ * dtc -I dts -O dtb -o ebony.dtb -b 0 -V 16 ebony.dts
+ */
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ model = "Ebony";
+ compatible = "Ebony";
+ dcr-parent = <&/cpus/PowerPC,440GP@0>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,440GP@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <0>; // Filled in by zImage
+ timebase-frequency = <0>; // Filled in by zImage
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <0>;
+ d-cache-size = <0>;
+ dcr-controller;
+ dcr-access-method = "native";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0 0>; // Filled in by zImage
+ };
+
+ UIC0: interrupt-controller0 {
+ device_type = "ibm,uic";
+ compatible = "ibm,uic-440gp", "ibm,uic";
+ interrupt-controller;
+ cell-index = <0>;
+ dcr-reg = <0c0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+
+ };
+
+ UIC1: interrupt-controller1 {
+ device_type = "ibm,uic";
+ compatible = "ibm,uic-440gp", "ibm,uic";
+ interrupt-controller;
+ cell-index = <1>;
+ dcr-reg = <0d0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <1e 4 1f 4>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ CPC0: cpc {
+ device_type = "ibm,cpc";
+ compatible = "ibm,cpc-440gp";
+ dcr-reg = <0b0 003 0e0 010>;
+ // FIXME: anything else?
+ };
+
+ plb {
+ device_type = "ibm,plb";
+ compatible = "ibm,plb-440gp", "ibm,plb4";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; // Filled in by zImage
+
+ SDRAM0: sdram {
+ device_type = "memory-controller";
+ compatible = "ibm,sdram-440gp", "ibm,sdram";
+ dcr-reg = <010 2>;
+ // FIXME: anything else?
+ };
+
+ DMA0: dma {
+ // FIXME: ???
+ device_type = "ibm,dma-4xx";
+ compatible = "ibm,dma-440gp", "ibm,dma-4xx";
+ dcr-reg = <100 027>;
+ };
+
+ MAL0: mcmal {
+ device_type = "mcmal-dma";
+ compatible = "ibm,mcmal-440gp", "ibm,mcmal";
+ dcr-reg = <180 62>;
+ num-tx-chans = <4>;
+ num-rx-chans = <4>;
+ interrupt-parent = <&MAL0>;
+ interrupts = <0 1 2 3 4>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
+ /*RXEOB*/ 1 &UIC0 b 4
+ /*SERR*/ 2 &UIC1 0 4
+ /*TXDE*/ 3 &UIC1 1 4
+ /*RXDE*/ 4 &UIC1 2 4>;
+ interrupt-map-mask = <ffffffff>;
+ };
+
+ POB0: opb {
+ device_type = "ibm,opb";
+ compatible = "ibm,opb-440gp", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* Wish there was a nicer way of specifying a full 32-bit
+ range */
+ ranges = <00000000 1 00000000 80000000
+ 80000000 1 80000000 80000000>;
+ dcr-reg = <090 00b>;
+ interrupt-parent = <&UIC1>;
+ interrupts = <7 4>;
+ clock-frequency = <0>; // Filled in by zImage
+
+ EBC0: ebc {
+ device_type = "ibm,ebc";
+ compatible = "ibm,ebc-440gp";
+ dcr-reg = <012 2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ clock-frequency = <0>; // Filled in by zImage
+ ranges = <0 00000000 fff00000 100000
+ 1 00000000 48000000 100000
+ 2 00000000 ff800000 400000
+ 3 00000000 48200000 100000
+ 7 00000000 48300000 100000>;
+ interrupts = <5 4>;
+ interrupt-parent = <&UIC1>;
+
+ flash@0,0 {
+ device_type = "flash";
+ reg = <0 0 80000>;
+ };
+
+ ds1743@1,0 {
+ /* NVRAM & RTC */
+ device_type = "nvram";
+ compatible = "ds1743";
+ reg = <1 0 2000>;
+ };
+ flash@2,0 {
+ device_type = "flash";
+ reg = <2 0 400000>;
+ };
+
+ ir@3,0 {
+ reg = <3 0 10>;
+ };
+
+ fpga@7,0 {
+ compatible = "Ebony-FPGA";
+ reg = <7 0 10>;
+ };
+ };
+
+ UART0: serial@40000200 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <40000200 8>;
+ virtual-reg = <e0000200>;
+ clock-frequency = <A8C000>;
+ current-speed = <2580>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <0 4>;
+ };
+
+ UART1: serial@40000300 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <40000300 8>;
+ virtual-reg = <e0000300>;
+ clock-frequency = <A8C000>;
+ current-speed = <2580>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <1 4>;
+ };
+
+ IIC0: i2c@40000400 {
+ /* FIXME */
+ device_type = "i2c";
+ compatible = "ibm,iic-440gp", "ibm,iic";
+ reg = <40000400 14>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <2 4>;
+ };
+ IIC1: i2c@40000500 {
+ /* FIXME */
+ device_type = "i2c";
+ compatible = "ibm,iic-440gp", "ibm,iic";
+ reg = <40000500 14>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <3 4>;
+ };
+
+ GPIO0: gpio@40000700 {
+ /* FIXME */
+ device_type = "gpio";
+ compatible = "ibm,gpio-440gp";
+ reg = <40000700 20>;
+ };
+
+ ZMII0: emac-zmii@40000780 {
+ device_type = "emac-zmii";
+ compatible = "ibm,zmii-440gp", "ibm,zmii";
+ reg = <40000780 c>;
+ };
+
+ EMAC0: ethernet@40000800 {
+ linux,network-index = <0>;
+ device_type = "network";
+ compatible = "ibm,emac-440gp", "ibm,emac";
+ interrupt-parent = <&UIC1>;
+ interrupts = <1c 4 1d 4>;
+ reg = <40000800 70>;
+ local-mac-address = [000000000000]; // Filled in by zImage
+ mal-device = <&MAL0>;
+ mal-tx-channel = <0 1>;
+ mal-rx-channel = <0>;
+ cell-index = <0>;
+ max-frame-size = <5dc>;
+ rx-fifo-size = <1000>;
+ tx-fifo-size = <800>;
+ phy-mode = "rmii";
+ phy-map = <00000001>;
+ zmii-device = <&ZMII0>;
+ zmii-channel = <0>;
+ };
+ EMAC1: ethernet@40000900 {
+ linux,network-index = <1>;
+ device_type = "network";
+ compatible = "ibm,emac-440gp", "ibm,emac";
+ interrupt-parent = <&UIC1>;
+ interrupts = <1e 4 1f 4>;
+ reg = <40000900 70>;
+ local-mac-address = [000000000000]; // Filled in by zImage
+ mal-device = <&MAL0>;
+ mal-tx-channel = <2 3>;
+ mal-rx-channel = <1>;
+ cell-index = <1>;
+ max-frame-size = <5dc>;
+ rx-fifo-size = <1000>;
+ tx-fifo-size = <800>;
+ phy-mode = "rmii";
+ phy-map = <00000001>;
+ zmii-device = <&ZMII0>;
+ zmii-channel = <1>;
+ };
+
+
+ GPT0: gpt@40000a00 {
+ /* FIXME */
+ reg = <40000a00 d4>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <12 4 13 4 14 4 15 4 16 4>;
+ };
+
+ };
+
+ PCIX0: pci@1234 {
+ device_type = "pci";
+ /* FIXME */
+ reg = <2 0ec00000 8
+ 2 0ec80000 f0
+ 2 0ec80100 fc>;
+ };
+ };
+
+ chosen {
+ linux,stdout-path = "/plb/opb/serial@40000200";
+ linux,initrd-start = <0>; /* FIXME */
+ linux,initrd-end = <0>;
+ bootargs = "";
+ };
+};
+
^ permalink raw reply
* [PATCH 8/10] Early serial debug support for PPC44x
From: David Gibson @ 2007-04-18 6:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070418063517.GB29312@localhost.localdomain>
This patch adds support for early serial debugging via the built in
port on IBM/AMCC PowerPC 44x CPUs. It uses a bolted TLB entry in
address space 1 for the UART's mapping, allowing robust debugging both
before and after the initialization of the MMU.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
---
arch/powerpc/Kconfig.debug | 22 ++++++++++++++++++----
arch/powerpc/kernel/head_44x.S | 34 +++++++++++++---------------------
arch/powerpc/kernel/of_platform.c | 1 -
arch/powerpc/kernel/udbg.c | 3 +++
arch/powerpc/kernel/udbg_16550.c | 23 +++++++++++++++++++++++
arch/powerpc/platforms/4xx/44x.h | 2 ++
arch/powerpc/platforms/4xx/misc_44x.S | 31 +++++++++++++++++++++++++++++++
include/asm-powerpc/mmu-44x/mmu.h | 7 ++++++-
include/asm-powerpc/udbg.h | 1 +
9 files changed, 97 insertions(+), 27 deletions(-)
Index: working-2.6/arch/powerpc/Kconfig.debug
===================================================================
--- working-2.6.orig/arch/powerpc/Kconfig.debug 2007-04-18 14:24:58.000000000 +1000
+++ working-2.6/arch/powerpc/Kconfig.debug 2007-04-18 14:25:13.000000000 +1000
@@ -130,10 +130,6 @@ config BOOTX_TEXT
Say Y here to see progress messages from the boot firmware in text
mode. Requires either BootX or Open Firmware.
-config SERIAL_TEXT_DEBUG
- bool "Support for early boot texts over serial port"
- depends on 4xx
-
config PPC_EARLY_DEBUG
bool "Early debugging (dangerous)"
@@ -198,6 +194,24 @@ config PPC_EARLY_DEBUG_BEAT
help
Select this to enable early debugging for Celleb with Beat.
+config PPC_EARLY_DEBUG_44x
+ bool "Early serial debugging for IBM/AMCC 44x CPUs"
+ depends on 44x
+ select PPC_UDBG_16550
+ help
+ Select this to enable early debugging for IBM 44x chips via the
+ inbuilt serial port.
+
endchoice
+config PPC_EARLY_DEBUG_44x_PHYSLOW
+ hex "Low 32 bits of early debug UART physical address"
+ depends PPC_EARLY_DEBUG_44x
+ default "0x40000200"
+
+config PPC_EARLY_DEBUG_44x_PHYSHIGH
+ hex "EPRN of early debug UART physical address"
+ depends PPC_EARLY_DEBUG_44x
+ default "0x1"
+
endmenu
Index: working-2.6/arch/powerpc/kernel/head_44x.S
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/head_44x.S 2007-04-18 14:24:59.000000000 +1000
+++ working-2.6/arch/powerpc/kernel/head_44x.S 2007-04-18 14:25:03.000000000 +1000
@@ -172,36 +172,28 @@ skpinv: addi r4,r4,1 /* Increment */
isync
4:
-#ifdef CONFIG_SERIAL_TEXT_DEBUG
- /*
- * Add temporary UART mapping for early debug.
- * We can map UART registers wherever we want as long as they don't
- * interfere with other system mappings (e.g. with pinned entries).
- * For an example of how we handle this - see ocotea.h. --ebs
- */
+#ifdef CONFIG_PPC_EARLY_DEBUG_44x
+ /* Add UART mapping for early debug. */
+
/* pageid fields */
- lis r3,UART0_IO_BASE@h
- ori r3,r3,PPC44x_TLB_VALID | PPC44x_TLB_4K
+ lis r3,PPC44x_EARLY_DEBUG_VIRTADDR@h
+ ori r3,r3,PPC44x_TLB_VALID|PPC44x_TLB_TS|PPC44x_TLB_64K
/* xlat fields */
- lis r4,UART0_PHYS_IO_BASE@h /* RPN depends on SoC */
-#ifndef CONFIG_440EP
- ori r4,r4,0x0001 /* ERPN is 1 for second 4GB page */
-#endif
+ lis r4,CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW@h
+ ori r4,r4,CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH
/* attrib fields */
- li r5,0
- ori r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_I | PPC44x_TLB_G)
-
- li r0,0 /* TLB slot 0 */
+ li r5,(PPC44x_TLB_SW|PPC44x_TLB_SR|PPC44x_TLB_I|PPC44x_TLB_G)
+ li r0,62 /* TLB slot 0 */
- tlbwe r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */
- tlbwe r4,r0,PPC44x_TLB_XLAT /* Load the translation fields */
- tlbwe r5,r0,PPC44x_TLB_ATTRIB /* Load the attrib/access fields */
+ tlbwe r3,r0,PPC44x_TLB_PAGEID
+ tlbwe r4,r0,PPC44x_TLB_XLAT
+ tlbwe r5,r0,PPC44x_TLB_ATTRIB
/* Force context change */
isync
-#endif /* CONFIG_SERIAL_TEXT_DEBUG */
+#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
/* Establish the interrupt vector offsets */
SET_IVOR(0, CriticalInput);
Index: working-2.6/arch/powerpc/kernel/udbg_16550.c
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/udbg_16550.c 2007-04-16 10:04:20.000000000 +1000
+++ working-2.6/arch/powerpc/kernel/udbg_16550.c 2007-04-18 14:25:03.000000000 +1000
@@ -191,3 +191,26 @@ void udbg_init_pas_realmode(void)
udbg_getc_poll = NULL;
}
#endif /* CONFIG_PPC_MAPLE */
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_44x
+#include <platforms/4xx/44x.h>
+
+static void udbg_44x_as1_putc(char c)
+{
+ if (udbg_comport) {
+ while ((as1_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
+ /* wait for idle */;
+ as1_writeb(c, &udbg_comport->thr); eieio();
+ if (c == '\n')
+ udbg_44x_as1_putc('\r');
+ }
+}
+
+void __init udbg_init_44x_as1(void)
+{
+ udbg_comport =
+ (volatile struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR;
+
+ udbg_putc = udbg_44x_as1_putc;
+}
+#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
Index: working-2.6/include/asm-powerpc/mmu-44x/mmu.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/mmu-44x/mmu.h 2007-04-18 14:24:59.000000000 +1000
+++ working-2.6/include/asm-powerpc/mmu-44x/mmu.h 2007-04-18 14:25:03.000000000 +1000
@@ -69,7 +69,12 @@ typedef struct {
#define PPC44x_PIN_SHIFT 28
#define PPC_PIN_SIZE (1 << PPC44x_PIN_SHIFT)
+#ifndef CONFIG_PPC_EARLY_DEBUG_44x
#define PPC44x_EARLY_TLBS 1
+#else
+#define PPC44x_EARLY_TLBS 2
+#define PPC44x_EARLY_DEBUG_VIRTADDR (ASM_CONST(0xf0000000) \
+ | (ASM_CONST(CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW) & 0xffff))
+#endif
#endif /* _ASM_POWERPC_MMU_44X_MMU_H_ */
-
Index: working-2.6/arch/powerpc/kernel/udbg.c
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/udbg.c 2007-02-15 10:05:18.000000000 +1100
+++ working-2.6/arch/powerpc/kernel/udbg.c 2007-04-18 14:25:03.000000000 +1000
@@ -51,6 +51,9 @@ void __init udbg_early_init(void)
udbg_init_pas_realmode();
#elif defined(CONFIG_BOOTX_TEXT)
udbg_init_btext();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_44x)
+ /* PPC44x debug */
+ udbg_init_44x_as1();
#endif
}
Index: working-2.6/include/asm-powerpc/udbg.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/udbg.h 2007-02-15 10:05:19.000000000 +1100
+++ working-2.6/include/asm-powerpc/udbg.h 2007-04-18 14:25:03.000000000 +1000
@@ -47,6 +47,7 @@ extern void __init udbg_init_rtas_panel(
extern void __init udbg_init_rtas_console(void);
extern void __init udbg_init_debug_beat(void);
extern void __init udbg_init_btext(void);
+extern void __init udbg_init_44x_as1(void);
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_UDBG_H */
Index: working-2.6/arch/powerpc/kernel/of_platform.c
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/of_platform.c 2007-04-18 14:24:58.000000000 +1000
+++ working-2.6/arch/powerpc/kernel/of_platform.c 2007-04-18 14:25:03.000000000 +1000
@@ -29,7 +29,6 @@
#include <asm/ppc-pci.h>
#include <asm/atomic.h>
-
/*
* The list of OF IDs below is used for matching bus types in the
* system whose devices are to be exposed as of_platform_devices.
Index: working-2.6/arch/powerpc/platforms/4xx/misc_44x.S
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/4xx/misc_44x.S 2007-04-18 14:24:59.000000000 +1000
+++ working-2.6/arch/powerpc/platforms/4xx/misc_44x.S 2007-04-18 14:25:03.000000000 +1000
@@ -15,6 +15,37 @@
.text
/*
+ * Do an IO access in AS1
+ */
+_GLOBAL(as1_readb)
+ mfmsr r7
+ ori r0,r7,MSR_DS
+ sync
+ mtmsr r0
+ sync
+ isync
+ lbz r3,0(r3)
+ sync
+ mtmsr r7
+ sync
+ isync
+ blr
+
+_GLOBAL(as1_writeb)
+ mfmsr r7
+ ori r0,r7,MSR_DS
+ sync
+ mtmsr r0
+ sync
+ isync
+ stb r3,0(r4)
+ sync
+ mtmsr r7
+ sync
+ isync
+ blr
+
+/*
* void ppc44x_reset_system(char *cmd)
*
* At present, this routine just applies a system reset.
Index: working-2.6/arch/powerpc/platforms/4xx/44x.h
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/4xx/44x.h 2007-04-18 14:24:59.000000000 +1000
+++ working-2.6/arch/powerpc/platforms/4xx/44x.h 2007-04-18 14:25:03.000000000 +1000
@@ -1,6 +1,8 @@
#ifndef __POWERPC_PLATFORMS_4XX_44X_H
#define __POWERPC_PLATFORMS_4XX_44X_H
+extern u8 as1_readb(volatile u8 __iomem *addr);
+extern void as1_writeb(u8 data, volatile u8 __iomem *addr);
extern void ppc44x_reset_system(char *cmd);
#endif /* __POWERPC_PLATFORMS_4XX_44X_H */
^ permalink raw reply
* [PATCH 7/10] Support for Ebony in arch/powerpc
From: David Gibson @ 2007-04-18 6:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070418063517.GB29312@localhost.localdomain>
This patch adds platform support code for the Ebony (440GP) evaluation
board.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
---
arch/powerpc/configs/ebony_defconfig | 886 ++++++++++++++++++++++++++++++++++
arch/powerpc/kernel/head_44x.S | 10
arch/powerpc/platforms/4xx/44x.h | 7
arch/powerpc/platforms/4xx/Makefile | 3
arch/powerpc/platforms/4xx/ebony.c | 72 ++
arch/powerpc/platforms/4xx/misc_44x.S | 25
6 files changed, 992 insertions(+), 11 deletions(-)
Index: working-2.6/arch/powerpc/platforms/4xx/Makefile
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/4xx/Makefile 2006-12-08 10:42:48.000000000 +1100
+++ working-2.6/arch/powerpc/platforms/4xx/Makefile 2007-03-21 15:03:03.000000000 +1100
@@ -1 +1,2 @@
-# empty makefile so make clean works
\ No newline at end of file
+obj-$(CONFIG_EBONY) := ebony.o
+obj-$(CONFIG_44x) += misc_44x.o
\ No newline at end of file
Index: working-2.6/arch/powerpc/platforms/4xx/ebony.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/platforms/4xx/ebony.c 2007-03-21 15:06:11.000000000 +1100
@@ -0,0 +1,72 @@
+/*
+ * Ebony board specific routines
+ *
+ * Matt Porter <mporter@kernel.crashing.org>
+ * Copyright 2002-2005 MontaVista Software Inc.
+ *
+ * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
+ * Copyright (c) 2003-2005 Zultys Technologies
+ *
+ * Rewritten and ported to the merged powerpc tree:
+ * Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/init.h>
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+#include <asm/of_platform.h>
+
+#include "44x.h"
+
+static struct of_device_id ebony_of_bus[] = {
+ { .type = "ibm,plb", },
+ { .type = "ibm,opb", },
+ {},
+};
+
+static int __init ebony_device_probe(void)
+{
+ if (! machine_is(ebony))
+ return 0;
+
+ of_platform_bus_probe(NULL, ebony_of_bus, NULL);
+
+ return 0;
+}
+device_initcall(ebony_device_probe);
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init ebony_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (!of_flat_dt_is_compatible(root, "Ebony"))
+ return 0;
+
+ return 1;
+}
+
+static void __init ebony_setup_arch(void)
+{
+}
+
+define_machine(ebony) {
+ .name = "Ebony",
+ .probe = ebony_probe,
+ .setup_arch = ebony_setup_arch,
+ .progress = udbg_progress,
+ .init_IRQ = uic_init_tree,
+ .get_irq = uic_get_irq,
+ .restart = ppc44x_reset_system,
+ .calibrate_decr = generic_calibrate_decr,
+};
Index: working-2.6/arch/powerpc/configs/ebony_defconfig
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/configs/ebony_defconfig 2007-03-21 15:03:03.000000000 +1100
@@ -0,0 +1,886 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.20-powerpc-emac-new-20070212.diff
+# Wed Feb 28 15:24:15 2007
+#
+# CONFIG_PPC64 is not set
+CONFIG_PPC32=y
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+# CONFIG_PPC_UDBG_16550 is not set
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+
+#
+# Processor support
+#
+# CONFIG_CLASSIC32 is not set
+# CONFIG_PPC_82xx is not set
+# CONFIG_PPC_83xx is not set
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_86xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+CONFIG_44x=y
+# CONFIG_E200 is not set
+CONFIG_PPC_DCR_NATIVE=y
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_PPC_DCR=y
+CONFIG_BOOKE=y
+CONFIG_PTE_64BIT=y
+CONFIG_PHYS_64BIT=y
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_IPC_NS is not set
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_UTS_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+
+#
+# Block layer
+#
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_4xx=y
+
+#
+# AMCC 44x options
+#
+CONFIG_EBONY=y
+CONFIG_440GP=y
+# CONFIG_MPIC is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_MATH_EMULATION=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+# CONFIG_PC_KEYBOARD is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_RESOURCES_64BIT=y
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_PROC_DEVICETREE=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE=""
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+# CONFIG_PCIEPORTBUS is not set
+# CONFIG_PCI_DEBUG is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# PCI Hotplug Support
+#
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x01000000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+
+#
+# Memory Technology Devices (MTD)
+#
+# CONFIG_MTD is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+# CONFIG_PNPACPI is not set
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=35000
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# Misc devices
+#
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_NETLINK is not set
+
+#
+# Serial ATA (prod) and Parallel ATA (experimental) drivers
+#
+# CONFIG_ATA is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+# CONFIG_MD is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+# CONFIG_MAC_EMUMOUSEBTN is not set
+# CONFIG_WINDFARM is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# PHY device support
+#
+
+#
+# Ethernet (10 or 100Mbit)
+#
+# CONFIG_NET_ETHERNET is not set
+CONFIG_IBM_NEW_EMAC=y
+CONFIG_IBM_NEW_EMAC_RXB=128
+CONFIG_IBM_NEW_EMAC_TXB=64
+CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32
+CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256
+CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0
+# CONFIG_IBM_NEW_EMAC_DEBUG is not set
+CONFIG_IBM_NEW_EMAC_ZMII=y
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+# CONFIG_SERIAL_8250_PCI is not set
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_RSA is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+# CONFIG_WATCHDOG is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+
+#
+# I2C support
+#
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+
+#
+# Dallas's 1-wire bus
+#
+# CONFIG_W1 is not set
+
+#
+# Hardware Monitoring support
+#
+# CONFIG_HWMON is not set
+# CONFIG_HWMON_VID is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+
+#
+# Graphics support
+#
+# CONFIG_FIRMWARE_EDID is not set
+# CONFIG_FB is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+# CONFIG_USB is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
+# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
+#
+
+#
+# Real Time Clock
+#
+# CONFIG_RTC_CLASS is not set
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Auxiliary Display support
+#
+
+#
+# Virtualization
+#
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+
+#
+# Instrumentation Support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+# CONFIG_DEBUG_BUGVERBOSE is not set
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+CONFIG_DEBUGGER=y
+# CONFIG_KGDB is not set
+# CONFIG_XMON is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_BOOTX_TEXT is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=y
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Hardware crypto devices
+#
Index: working-2.6/arch/powerpc/platforms/4xx/44x.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/platforms/4xx/44x.h 2007-03-21 15:06:03.000000000 +1100
@@ -0,0 +1,7 @@
+#ifndef __POWERPC_PLATFORMS_4XX_44X_H
+#define __POWERPC_PLATFORMS_4XX_44X_H
+
+extern void ppc44x_reset_system(char *cmd);
+
+#endif /* __POWERPC_PLATFORMS_4XX_44X_H */
+
Index: working-2.6/arch/powerpc/platforms/4xx/misc_44x.S
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/platforms/4xx/misc_44x.S 2007-03-21 15:06:03.000000000 +1100
@@ -0,0 +1,25 @@
+/*
+ * This file contains miscellaneous low-level functions for PPC 44x.
+ * Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+
+#include <asm/reg.h>
+#include <asm/ppc_asm.h>
+
+ .text
+
+/*
+ * void ppc44x_reset_system(char *cmd)
+ *
+ * At present, this routine just applies a system reset.
+ */
+_GLOBAL(ppc44x_reset_system)
+ mfspr r13,SPRN_DBCR0
+ oris r13,r13,DBCR0_RST_SYSTEM@h
+ mtspr SPRN_DBCR0,r13
Index: working-2.6/arch/powerpc/kernel/head_44x.S
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/head_44x.S 2007-03-21 15:03:03.000000000 +1100
+++ working-2.6/arch/powerpc/kernel/head_44x.S 2007-03-21 15:06:03.000000000 +1100
@@ -709,16 +709,6 @@ _GLOBAL(giveup_fpu)
blr
#endif
-/*
- * extern void abort(void)
- *
- * At present, this routine just applies a system reset.
- */
-_GLOBAL(abort)
- mfspr r13,SPRN_DBCR0
- oris r13,r13,DBCR0_RST_SYSTEM@h
- mtspr SPRN_DBCR0,r13
-
_GLOBAL(set_context)
#ifdef CONFIG_BDI_SWITCH
^ permalink raw reply
* [PATCH 6/10] Port 44x MMU definitions to ARCH=powerpc
From: David Gibson @ 2007-04-18 6:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070418063517.GB29312@localhost.localdomain>
This patch moves the mmu.h definitions which are still relevant for
ARCH=powerpc from include/asm-ppc/mmu.h to their own file,
include/asm-powerpc/mmu_44x.h. The new file is included from
asm-powerpc/mmu.h, and a couple of other tweaks to correct mmu
definitions for 44x are made.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
---
arch/powerpc/kernel/head_44x.S | 4 -
arch/powerpc/mm/44x_mmu.c | 81 +++++++-------------------------------
arch/powerpc/mm/mmu_decl.h | 2
include/asm-powerpc/mmu-44x/mmu.h | 75 +++++++++++++++++++++++++++++++++++
include/asm-powerpc/mmu.h | 11 ++++-
5 files changed, 105 insertions(+), 68 deletions(-)
Index: working-2.6/include/asm-powerpc/mmu.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/mmu.h 2007-02-09 09:57:55.000000000 +1100
+++ working-2.6/include/asm-powerpc/mmu.h 2007-04-16 10:32:48.000000000 +1000
@@ -2,8 +2,15 @@
#define _ASM_POWERPC_MMU_H_
#ifdef __KERNEL__
-#ifndef CONFIG_PPC64
-#include <asm-ppc/mmu.h>
+#if defined(CONFIG_44x)
+/* 44x-style software loaded TLB */
+# include <asm/mmu-44x/mmu.h>
+#elif !defined(CONFIG_PPC64)
+/* Other 32-bit.
+ *
+ * FIXME: split up the other 32-bit MMU types, and revise for
+ * arch/powerpc */
+# include <asm-ppc/mmu.h>
#else
/*
Index: working-2.6/arch/powerpc/mm/44x_mmu.c
===================================================================
--- working-2.6.orig/arch/powerpc/mm/44x_mmu.c 2006-12-08 10:42:48.000000000 +1100
+++ working-2.6/arch/powerpc/mm/44x_mmu.c 2007-04-16 10:32:48.000000000 +1000
@@ -24,73 +24,35 @@
*
*/
-#include <linux/signal.h>
-#include <linux/sched.h>
-#include <linux/kernel.h>
-#include <linux/errno.h>
-#include <linux/string.h>
-#include <linux/types.h>
-#include <linux/ptrace.h>
-#include <linux/mman.h>
-#include <linux/mm.h>
-#include <linux/swap.h>
-#include <linux/stddef.h>
-#include <linux/vmalloc.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/highmem.h>
-
-#include <asm/pgalloc.h>
-#include <asm/prom.h>
-#include <asm/io.h>
-#include <asm/mmu_context.h>
-#include <asm/pgtable.h>
#include <asm/mmu.h>
-#include <asm/uaccess.h>
-#include <asm/smp.h>
-#include <asm/bootx.h>
-#include <asm/machdep.h>
-#include <asm/setup.h>
#include "mmu_decl.h"
-extern char etext[], _stext[];
-
/* Used by the 44x TLB replacement exception handler.
* Just needed it declared someplace.
*/
-unsigned int tlb_44x_index = 0;
-unsigned int tlb_44x_hwater = 62;
+unsigned int tlb_44x_index; /* = 0 */
+unsigned int tlb_44x_hwater = PPC44x_TLB_SIZE - 1 - PPC44x_EARLY_TLBS;
/*
* "Pins" a 256MB TLB entry in AS0 for kernel lowmem
*/
-static void __init
-ppc44x_pin_tlb(int slot, unsigned int virt, unsigned int phys)
+static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
{
- unsigned long attrib = 0;
-
- __asm__ __volatile__("\
- clrrwi %2,%2,10\n\
- ori %2,%2,%4\n\
- clrrwi %1,%1,10\n\
- li %0,0\n\
- ori %0,%0,%5\n\
- tlbwe %2,%3,%6\n\
- tlbwe %1,%3,%7\n\
- tlbwe %0,%3,%8"
+ __asm__ __volatile__(
+ "tlbwe %2,%3,%4\n"
+ "tlbwe %1,%3,%5\n"
+ "tlbwe %0,%3,%6\n"
:
- : "r" (attrib), "r" (phys), "r" (virt), "r" (slot),
- "i" (PPC44x_TLB_VALID | PPC44x_TLB_256M),
- "i" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
+ : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
+ "r" (phys),
+ "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M),
+ "r" (tlb_44x_hwater--), /* slot for this TLB entry */
"i" (PPC44x_TLB_PAGEID),
"i" (PPC44x_TLB_XLAT),
"i" (PPC44x_TLB_ATTRIB));
}
-/*
- * MMU_init_hw does the chip-specific initialization of the MMU hardware.
- */
void __init MMU_init_hw(void)
{
flush_instruction_cache();
@@ -98,22 +60,13 @@ void __init MMU_init_hw(void)
unsigned long __init mmu_mapin_ram(void)
{
- unsigned int pinned_tlbs = 1;
- int i;
+ unsigned long addr;
- /* Determine number of entries necessary to cover lowmem */
- pinned_tlbs = (unsigned int)
- (_ALIGN(total_lowmem, PPC_PIN_SIZE) >> PPC44x_PIN_SHIFT);
-
- /* Write upper watermark to save location */
- tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs;
-
- /* If necessary, set additional pinned TLBs */
- if (pinned_tlbs > 1)
- for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) {
- unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC_PIN_SIZE;
- ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr);
- }
+ /* Pin in enough TLBs to cover any lowmem not covered by the
+ * initial 256M mapping established in head_44x.S */
+ for (addr = PPC_PIN_SIZE; addr < total_lowmem;
+ addr += PPC_PIN_SIZE)
+ ppc44x_pin_tlb(addr + PAGE_OFFSET, addr);
return total_lowmem;
}
Index: working-2.6/arch/powerpc/mm/mmu_decl.h
===================================================================
--- working-2.6.orig/arch/powerpc/mm/mmu_decl.h 2007-04-16 10:04:20.000000000 +1000
+++ working-2.6/arch/powerpc/mm/mmu_decl.h 2007-04-16 10:32:48.000000000 +1000
@@ -39,8 +39,10 @@ extern int __map_without_bats;
extern unsigned long ioremap_base;
extern unsigned int rtas_data, rtas_size;
+#ifdef CONFIG_CLASSIC32
extern PTE *Hash, *Hash_end;
extern unsigned long Hash_size, Hash_mask;
+#endif /* CONFIG_CLASSIC32 */
extern unsigned int num_tlbcam_entries;
#endif
Index: working-2.6/arch/powerpc/kernel/head_44x.S
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/head_44x.S 2007-02-14 10:58:22.000000000 +1100
+++ working-2.6/arch/powerpc/kernel/head_44x.S 2007-04-16 10:32:48.000000000 +1000
@@ -120,8 +120,8 @@ skpinv: addi r4,r4,1 /* Increment */
* Configure and load pinned entry into TLB slot 63.
*/
- lis r3,KERNELBASE@h /* Load the kernel virtual address */
- ori r3,r3,KERNELBASE@l
+ lis r3,PAGE_OFFSET@h
+ ori r3,r3,PAGE_OFFSET@l
/* Kernel is at the base of RAM */
li r4, 0 /* Load the kernel physical address */
Index: working-2.6/include/asm-powerpc/mmu-44x/mmu.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/include/asm-powerpc/mmu-44x/mmu.h 2007-04-16 10:32:48.000000000 +1000
@@ -0,0 +1,75 @@
+#ifndef _ASM_POWERPC_MMU_44X_MMU_H_
+#define _ASM_POWERPC_MMU_44X_MMU_H_
+
+/*
+ * PPC440 support
+ */
+#define PPC44x_MMUCR_TID 0x000000ff
+#define PPC44x_MMUCR_STS 0x00010000
+
+#define PPC44x_TLB_PAGEID 0
+#define PPC44x_TLB_XLAT 1
+#define PPC44x_TLB_ATTRIB 2
+
+/* Page identification fields */
+#define PPC44x_TLB_EPN_MASK 0xfffffc00 /* Effective Page Number */
+#define PPC44x_TLB_VALID 0x00000200 /* Valid flag */
+#define PPC44x_TLB_TS 0x00000100 /* Translation address space */
+#define PPC44x_TLB_1K 0x00000000 /* Page sizes */
+#define PPC44x_TLB_4K 0x00000010
+#define PPC44x_TLB_16K 0x00000020
+#define PPC44x_TLB_64K 0x00000030
+#define PPC44x_TLB_256K 0x00000040
+#define PPC44x_TLB_1M 0x00000050
+#define PPC44x_TLB_16M 0x00000070
+#define PPC44x_TLB_256M 0x00000090
+
+/* Translation fields */
+#define PPC44x_TLB_RPN_MASK 0xfffffc00 /* Real Page Number */
+#define PPC44x_TLB_ERPN_MASK 0x0000000f
+
+/* Storage attribute and access control fields */
+#define PPC44x_TLB_ATTR_MASK 0x0000ff80
+#define PPC44x_TLB_U0 0x00008000 /* User 0 */
+#define PPC44x_TLB_U1 0x00004000 /* User 1 */
+#define PPC44x_TLB_U2 0x00002000 /* User 2 */
+#define PPC44x_TLB_U3 0x00001000 /* User 3 */
+#define PPC44x_TLB_W 0x00000800 /* Caching is write-through */
+#define PPC44x_TLB_I 0x00000400 /* Caching is inhibited */
+#define PPC44x_TLB_M 0x00000200 /* Memory is coherent */
+#define PPC44x_TLB_G 0x00000100 /* Memory is guarded */
+#define PPC44x_TLB_E 0x00000080 /* Memory is guarded */
+
+#define PPC44x_TLB_PERM_MASK 0x0000003f
+#define PPC44x_TLB_UX 0x00000020 /* User execution */
+#define PPC44x_TLB_UW 0x00000010 /* User write */
+#define PPC44x_TLB_UR 0x00000008 /* User read */
+#define PPC44x_TLB_SX 0x00000004 /* Super execution */
+#define PPC44x_TLB_SW 0x00000002 /* Super write */
+#define PPC44x_TLB_SR 0x00000001 /* Super read */
+
+/* Number of TLB entries */
+#define PPC44x_TLB_SIZE 64
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned long long phys_addr_t;
+
+extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t);
+#define PHYS_FMT "%16Lx"
+
+typedef struct {
+ unsigned long id;
+ unsigned long vdso_base;
+} mm_context_t;
+
+#endif /* !__ASSEMBLY__ */
+
+/* TLB entry offset/size used for pinning kernel lowmem */
+#define PPC44x_PIN_SHIFT 28
+#define PPC_PIN_SIZE (1 << PPC44x_PIN_SHIFT)
+
+#define PPC44x_EARLY_TLBS 1
+
+#endif /* _ASM_POWERPC_MMU_44X_MMU_H_ */
+
^ permalink raw reply
* [PATCH 5/10] Add arch/powerpc driver for UIC, PPC4xx interrupt controller
From: David Gibson @ 2007-04-18 6:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070418063517.GB29312@localhost.localdomain>
This patch adds a driver to arch/powerpc/sysdev for the UIC, the
on-chip interrupt controller from IBM/AMCC 4xx chips. It uses the new
irq host mapping infrastructure.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
---
arch/powerpc/sysdev/Makefile | 1
arch/powerpc/sysdev/uic.c | 342 +++++++++++++++++++++++++++++++++++++++++++
include/asm-powerpc/uic.h | 23 ++
3 files changed, 366 insertions(+)
Index: working-2.6/arch/powerpc/sysdev/uic.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/sysdev/uic.c 2007-04-18 14:11:16.000000000 +1000
@@ -0,0 +1,342 @@
+/*
+ * arch/powerpc/sysdev/uic.c
+ *
+ * IBM PowerPC 4xx Universal Interrupt Controller
+ *
+ * Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/slab.h>
+#include <linux/stddef.h>
+#include <linux/sched.h>
+#include <linux/signal.h>
+#include <linux/sysdev.h>
+#include <linux/device.h>
+#include <linux/bootmem.h>
+#include <linux/spinlock.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/dcr.h>
+
+#define NR_UIC_INTS 32
+
+#define UIC_SR 0x0
+#define UIC_ER 0x2
+#define UIC_CR 0x3
+#define UIC_PR 0x4
+#define UIC_TR 0x5
+#define UIC_MSR 0x6
+#define UIC_VR 0x7
+#define UIC_VCR 0x8
+
+#define uic_irq_to_hw(virq) (irq_map[virq].hwirq)
+
+struct uic *primary_uic;
+
+struct uic {
+ int index;
+ int dcrbase;
+
+ spinlock_t lock;
+
+ /* The remapper for this UIC */
+ struct irq_host *irqhost;
+
+ /* For secondary UICs, the cascade interrupt's irqaction */
+ struct irqaction cascade;
+
+ /* The device node of the interrupt controller */
+ struct device_node *of_node;
+};
+
+static void uic_unmask_irq(unsigned int virq)
+{
+ struct uic *uic = get_irq_chip_data(virq);
+ unsigned int src = uic_irq_to_hw(virq);
+ unsigned long flags;
+ u32 er;
+
+ spin_lock_irqsave(&uic->lock, flags);
+ er = mfdcr(uic->dcrbase + UIC_ER);
+ er |= 1 << (31 - src);
+ mtdcr(uic->dcrbase + UIC_ER, er);
+ spin_unlock_irqrestore(&uic->lock, flags);
+}
+
+static void uic_mask_irq(unsigned int virq)
+{
+ struct uic *uic = get_irq_chip_data(virq);
+ unsigned int src = uic_irq_to_hw(virq);
+ unsigned long flags;
+ u32 er;
+
+ spin_lock_irqsave(&uic->lock, flags);
+ er = mfdcr(uic->dcrbase + UIC_ER);
+ er &= ~(1 << (31 - src));
+ mtdcr(uic->dcrbase + UIC_ER, er);
+ spin_unlock_irqrestore(&uic->lock, flags);
+}
+
+static void uic_ack_irq(unsigned int virq)
+{
+ struct uic *uic = get_irq_chip_data(virq);
+ unsigned int src = uic_irq_to_hw(virq);
+ unsigned long flags;
+
+ spin_lock_irqsave(&uic->lock, flags);
+ mtdcr(uic->dcrbase + UIC_SR, 1 << (31-src));
+ spin_unlock_irqrestore(&uic->lock, flags);
+}
+
+static int uic_set_irq_type(unsigned int virq, unsigned int flow_type)
+{
+ struct uic *uic = get_irq_chip_data(virq);
+ unsigned int src = uic_irq_to_hw(virq);
+ struct irq_desc *desc = get_irq_desc(virq);
+ unsigned long flags;
+ int trigger, polarity;
+ u32 tr, pr, mask;
+
+ switch (flow_type & IRQ_TYPE_SENSE_MASK) {
+ case IRQ_TYPE_NONE:
+ uic_mask_irq(virq);
+ return 0;
+
+ case IRQ_TYPE_EDGE_RISING:
+ trigger = 1; polarity = 1;
+ break;
+ case IRQ_TYPE_EDGE_FALLING:
+ trigger = 1; polarity = 0;
+ break;
+ case IRQ_TYPE_LEVEL_HIGH:
+ trigger = 0; polarity = 1;
+ break;
+ case IRQ_TYPE_LEVEL_LOW:
+ trigger = 0; polarity = 0;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ mask = ~(1 << (31 - src));
+
+ spin_lock_irqsave(&uic->lock, flags);
+ tr = mfdcr(uic->dcrbase + UIC_TR);
+ pr = mfdcr(uic->dcrbase + UIC_PR);
+ tr = (tr & mask) | (trigger << (31-src));
+ pr = (pr & mask) | (polarity << (31-src));
+
+ mtdcr(uic->dcrbase + UIC_PR, pr);
+ mtdcr(uic->dcrbase + UIC_TR, tr);
+
+ desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
+ desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
+ if (trigger)
+ desc->status |= IRQ_LEVEL;
+
+ spin_unlock_irqrestore(&uic->lock, flags);
+
+ return 0;
+}
+
+static struct irq_chip uic_irq_chip = {
+ .typename = " UIC ",
+ .unmask = uic_unmask_irq,
+ .mask = uic_mask_irq,
+/* .mask_ack = uic_mask_irq_and_ack, */
+ .ack = uic_ack_irq,
+ .set_type = uic_set_irq_type,
+};
+
+static int uic_host_match(struct irq_host *h, struct device_node *node)
+{
+ struct uic *uic = h->host_data;
+ return uic->of_node == node;
+}
+
+static int uic_host_map(struct irq_host *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ struct uic *uic = h->host_data;
+
+ set_irq_chip_data(virq, uic);
+ /* Despite the name, handle_level_irq() works for both level
+ * and edge irqs on UIC. FIXME: check this is correct */
+ set_irq_chip_and_handler(virq, &uic_irq_chip, handle_level_irq);
+
+ /* Set default irq type */
+ set_irq_type(virq, IRQ_TYPE_NONE);
+
+ return 0;
+}
+
+static int uic_host_xlate(struct irq_host *h, struct device_node *ct,
+ u32 *intspec, unsigned int intsize,
+ irq_hw_number_t *out_hwirq, unsigned int *out_type)
+
+{
+ /* UIC intspecs must have 2 cells */
+ BUG_ON(intsize != 2);
+ *out_hwirq = intspec[0];
+ *out_type = intspec[1];
+ return 0;
+}
+
+static struct irq_host_ops uic_host_ops = {
+ .match = uic_host_match,
+ .map = uic_host_map,
+ .xlate = uic_host_xlate,
+};
+
+irqreturn_t uic_cascade(int virq, void *data)
+{
+ struct uic *uic = data;
+ u32 msr;
+ int src;
+ int subvirq;
+
+ msr = mfdcr(uic->dcrbase + UIC_MSR);
+ src = 32 - ffs(msr);
+
+ subvirq = irq_linear_revmap(uic->irqhost, src);
+ generic_handle_irq(subvirq);
+
+ return IRQ_HANDLED;
+}
+
+static struct uic * __init uic_init_one(struct device_node *node)
+{
+ struct uic *uic;
+ const u32 *indexp, *dcrreg;
+ int len;
+
+ BUG_ON(! device_is_compatible(node, "ibm,uic"));
+
+ uic = alloc_bootmem(sizeof(*uic));
+ if (! uic)
+ return NULL; /* FIXME: panic? */
+
+ memset(uic, 0, sizeof(*uic));
+ spin_lock_init(&uic->lock);
+ uic->of_node = of_node_get(node);
+ indexp = get_property(node, "cell-index", &len);
+ if (!indexp || (len != sizeof(u32))) {
+ printk(KERN_ERR "uic: Device node %s has missing or invalid "
+ "cell-index property\n", node->full_name);
+ return NULL;
+ }
+ uic->index = *indexp;
+
+ dcrreg = get_property(node, "dcr-reg", &len);
+ if (!dcrreg || (len != 2*sizeof(u32))) {
+ printk(KERN_ERR "uic: Device node %s has missing or invalid "
+ "dcr-reg property\n", node->full_name);
+ return NULL;
+ }
+ uic->dcrbase = *dcrreg;
+
+ uic->irqhost = irq_alloc_host(IRQ_HOST_MAP_LINEAR, NR_UIC_INTS,
+ &uic_host_ops, -1);
+ if (! uic->irqhost) {
+ of_node_put(node);
+ return NULL; /* FIXME: panic? */
+ }
+
+ uic->irqhost->host_data = uic;
+
+ /* Start with all interrupts disabled, level and non-critical */
+ mtdcr(uic->dcrbase + UIC_ER, 0);
+ mtdcr(uic->dcrbase + UIC_CR, 0);
+ mtdcr(uic->dcrbase + UIC_TR, 0);
+ /* Clear any pending interrupts, in case the firmware left some */
+ mtdcr(uic->dcrbase + UIC_SR, 0xffffffff);
+
+ printk ("UIC%d (%d IRQ sources) at DCR 0x%x\n", uic->index,
+ NR_UIC_INTS, uic->dcrbase);
+
+ return uic;
+}
+
+void __init uic_init_tree(void)
+{
+ struct device_node *np;
+ struct uic *uic;
+ const u32 *interrupts;
+
+ /* First locate and initialize the top-level UIC */
+
+ np = of_find_compatible_node(NULL, NULL, "ibm,uic");
+ while (np) {
+ interrupts = get_property(np, "interrupts", NULL);
+ if (! interrupts)
+ break;
+
+ np = of_find_compatible_node(np, NULL, "ibm,uic");
+ }
+
+ BUG_ON(!np); /* uic_init_tree() assumes there's a UIC as the
+ * top-level interrupt controller */
+ primary_uic = uic_init_one(np);
+ if (! primary_uic)
+ panic("Unable to initialize primary UIC %s\n", np->full_name);
+
+ irq_set_default_host(primary_uic->irqhost);
+ of_node_put(np);
+
+ /* The scan again for cascaded UICs */
+ np = of_find_compatible_node(NULL, NULL, "ibm,uic");
+ while (np) {
+ interrupts = get_property(np, "interrupts", NULL);
+ if (interrupts) {
+ /* Secondary UIC */
+ int cascade_virq;
+ int ret;
+
+ uic = uic_init_one(np);
+ if (! uic)
+ panic("Unable to initialize a secondary UIC %s\n",
+ np->full_name);
+
+ cascade_virq = irq_of_parse_and_map(np, 0);
+
+ uic->cascade.handler = uic_cascade;
+ uic->cascade.name = "UIC cascade";
+ uic->cascade.dev_id = uic;
+
+ ret = setup_irq(cascade_virq, &uic->cascade);
+ if (ret)
+ printk(KERN_ERR "Failed to setup_irq(%d) for "
+ "UIC%d cascade\n", cascade_virq,
+ uic->index);
+
+ /* FIXME: setup critical cascade?? */
+ }
+
+ np = of_find_compatible_node(np, NULL, "ibm,uic");
+ }
+}
+
+/* Return an interrupt vector or NO_IRQ if no interrupt is pending. */
+unsigned int uic_get_irq(void)
+{
+ u32 msr;
+ int src;
+
+ BUG_ON(! primary_uic);
+
+ msr = mfdcr(primary_uic->dcrbase + UIC_MSR);
+ src = 32 - ffs(msr);
+
+ return irq_linear_revmap(primary_uic->irqhost, src);
+}
Index: working-2.6/arch/powerpc/sysdev/Makefile
===================================================================
--- working-2.6.orig/arch/powerpc/sysdev/Makefile 2007-04-16 10:04:20.000000000 +1000
+++ working-2.6/arch/powerpc/sysdev/Makefile 2007-04-18 12:06:33.000000000 +1000
@@ -21,6 +21,7 @@ obj-$(CONFIG_PM) += timer.o
ifeq ($(CONFIG_PPC_MERGE),y)
obj-$(CONFIG_PPC_I8259) += i8259.o
obj-$(CONFIG_PPC_83xx) += ipic.o
+obj-$(CONFIG_4xx) += uic.o
endif
# Temporary hack until we have migrated to asm-powerpc
Index: working-2.6/include/asm-powerpc/uic.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/include/asm-powerpc/uic.h 2007-04-18 12:06:33.000000000 +1000
@@ -0,0 +1,23 @@
+/*
+ * include/asm-powerpc/uic.h
+ *
+ * IBM PPC4xx UIC external definitions and structure.
+ *
+ * Maintainer: David Gibson <dwg@au1.ibm.com>
+ * Copyright 2007 IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#ifndef _ASM_POWERPC_UIC_H
+#define _ASM_POWERPC_UIC_H
+
+#ifdef __KERNEL__
+
+extern void __init uic_init_tree(void);
+extern unsigned int uic_get_irq(void);
+
+#endif /* __KERNEL__ */
+#endif /* _ASM_POWERPC_UIC_H */
^ permalink raw reply
* [PATCH 4/10] Re-organize Kconfig code for 4xx in arch/powerpc
From: David Gibson @ 2007-04-18 6:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070418063517.GB29312@localhost.localdomain>
Now that we always take a device tree in arch/powerpc, there's no good
reason not to allow a single kernel to support multiple embedded 4xx
boards - the correct platform code can be selected based on the device
tree information.
Therefore, this patch re-arranges the 4xx Kconfig code to allow this.
In addition we:
- use "select" instead of depends to configure the correct
config options for specific 4xx CPUs and workarounds, which
makes the information about specific boards and CPUs less
scattered.
- Some old, unused (in arch/powerpc) config options are
removed: WANT_EARLY_SERIAL, IBM_OCP, etc.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
---
arch/powerpc/platforms/4xx/Kconfig | 378 ++++++++++++++-----------------------
1 file changed, 153 insertions(+), 225 deletions(-)
Index: working-2.6/arch/powerpc/platforms/4xx/Kconfig
===================================================================
--- working-2.6.orig/arch/powerpc/platforms/4xx/Kconfig 2007-02-21 11:20:50.000000000 +1100
+++ working-2.6/arch/powerpc/platforms/4xx/Kconfig 2007-02-21 11:25:43.000000000 +1100
@@ -3,278 +3,206 @@ config 4xx
depends on 40x || 44x
default y
-config WANT_EARLY_SERIAL
+config BOOKE
bool
- select SERIAL_8250
- default n
-
-menu "AMCC 4xx options"
- depends on 4xx
-
-choice
- prompt "Machine Type"
- depends on 40x
- default WALNUT
-
-config BUBINGA
- bool "Bubinga"
- select WANT_EARLY_SERIAL
- help
- This option enables support for the IBM 405EP evaluation board.
-
-config CPCI405
- bool "CPCI405"
- help
- This option enables support for the CPCI405 board.
-
-config EP405
- bool "EP405/EP405PC"
- help
- This option enables support for the EP405/EP405PC boards.
-
-config REDWOOD_5
- bool "Redwood-5"
- help
- This option enables support for the IBM STB04 evaluation board.
-
-config REDWOOD_6
- bool "Redwood-6"
- help
- This option enables support for the IBM STBx25xx evaluation board.
-
-config SYCAMORE
- bool "Sycamore"
- help
- This option enables support for the IBM PPC405GPr evaluation board.
-
-config WALNUT
- bool "Walnut"
- help
- This option enables support for the IBM PPC405GP evaluation board.
-
-config XILINX_ML300
- bool "Xilinx-ML300"
- help
- This option enables support for the Xilinx ML300 evaluation board.
-
-endchoice
-
-choice
- prompt "Machine Type"
depends on 44x
- default EBONY
-
-config BAMBOO
- bool "Bamboo"
- select WANT_EARLY_SERIAL
- help
- This option enables support for the IBM PPC440EP evaluation board.
-
-config EBONY
- bool "Ebony"
- select WANT_EARLY_SERIAL
- help
- This option enables support for the IBM PPC440GP evaluation board.
-
-config LUAN
- bool "Luan"
- select WANT_EARLY_SERIAL
- help
- This option enables support for the IBM PPC440SP evaluation board.
-
-config OCOTEA
- bool "Ocotea"
- select WANT_EARLY_SERIAL
- help
- This option enables support for the IBM PPC440GX evaluation board.
+ default y
-endchoice
+menu "AMCC 40x options"
+ depends on 40x
-config EP405PC
- bool "EP405PC Support"
- depends on EP405
+#config BUBINGA
+# bool "Bubinga"
+# depends on 40x
+# default n
+# select 405EP
+# help
+# This option enables support for the IBM 405EP evaluation board.
+
+#config CPCI405
+# bool "CPCI405"
+# depends on 40x
+# default n
+# select 405GP
+# help
+# This option enables support for the CPCI405 board.
+
+#config EP405
+# bool "EP405/EP405PC"
+# depends on 40x
+# default n
+# select 405GP
+# help
+# This option enables support for the EP405/EP405PC boards.
+
+#config EP405PC
+# bool "EP405PC Support"
+# depends on EP405
+# default y
+# help
+# This option enables support for the extra features of the EP405PC board.
+
+#config REDWOOD_5
+# bool "Redwood-5"
+# depends on 40x
+# default n
+# select STB03xxx
+# help
+# This option enables support for the IBM STB04 evaluation board.
+
+#config REDWOOD_6
+# bool "Redwood-6"
+# depends on 40x
+# default n
+# select STB03xxx
+# help
+# This option enables support for the IBM STBx25xx evaluation board.
+
+#config SYCAMORE
+# bool "Sycamore"
+# depends on 40x
+# default n
+# select 405GPR
+# help
+# This option enables support for the IBM PPC405GPr evaluation board.
+
+#config WALNUT
+# bool "Walnut"
+# depends on 40x
+# default y
+# select 405GP
+# help
+# This option enables support for the IBM PPC405GP evaluation board.
+
+#config XILINX_ML300
+# bool "Xilinx-ML300"
+# depends on 40x
+# default y
+# select VIRTEX_II_PRO
+# help
+# This option enables support for the Xilinx ML300 evaluation board.
+endmenu
-# It's often necessary to know the specific 4xx processor type.
-# Fortunately, it is impled (so far) from the board type, so we
-# don't need to ask more redundant questions.
+# 40x specific CPU modules, selected based on the board above.
config NP405H
bool
- depends on ASH
- default y
+ #depends on ASH
-config 440EP
+# OAK doesn't exist but wanted to keep this around for any future 403GCX boards
+config 403GCX
bool
- depends on BAMBOO
- select PPC_FPU
- default y
+ #depends on OAK
+ select IBM405_ERR51
-config 440GP
+config 405GP
bool
- depends on EBONY
- default y
+ select IBM405_ERR77
+ select IBM405_ERR51
-config 440GX
+config 405EP
bool
- depends on OCOTEA
- default y
-config 440SP
+config 405GPR
bool
- depends on LUAN
- default y
-config 440
+config VIRTEX_II_PRO
bool
- depends on 440GP || 440SP || 440EP
- default y
+ select IBM405_ERR77
+ select IBM405_ERR51
-config 440A
+config STB03xxx
bool
- depends on 440GX
- default y
+ select IBM405_ERR77
+ select IBM405_ERR51
-config IBM440EP_ERR42
- bool
- depends on 440EP
- default y
+# 40x errata/workaround config symbols, selected by the CPU models above
# All 405-based cores up until the 405GPR and 405EP have this errata.
config IBM405_ERR77
bool
- depends on 40x && !403GCX && !405GPR && !405EP
- default y
# All 40x-based cores, up until the 405GPR and 405EP have this errata.
config IBM405_ERR51
bool
- depends on 40x && !405GPR && !405EP
- default y
-config BOOKE
- bool
+menu "AMCC 44x options"
depends on 44x
- default y
-config IBM_OCP
- bool
- depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
- default y
+#config BAMBOO
+# bool "Bamboo"
+# depends on 44x
+# default n
+# select 440EP
+# help
+# This option enables support for the IBM PPC440EP evaluation board.
-config XILINX_OCP
- bool
- depends on XILINX_ML300
- default y
-
-config IBM_EMAC4
- bool
- depends on 440GX || 440SP
- default y
-
-config BIOS_FIXUP
- bool
- depends on BUBINGA || EP405 || SYCAMORE || WALNUT
- default y
-
-# OAK doesn't exist but wanted to keep this around for any future 403GCX boards
-config 403GCX
- bool
- depends on OAK
- default y
-
-config 405EP
- bool
- depends on BUBINGA
- default y
-
-config 405GP
- bool
- depends on CPCI405 || EP405 || WALNUT
- default y
-
-config 405GPR
- bool
- depends on SYCAMORE
- default y
-
-config VIRTEX_II_PRO
- bool
- depends on XILINX_ML300
- default y
-
-config STB03xxx
- bool
- depends on REDWOOD_5 || REDWOOD_6
- default y
-
-config EMBEDDEDBOOT
- bool
- depends on EP405 || XILINX_ML300
+config EBONY
+ bool "Ebony"
+ depends on 44x
default y
+ select 440GP
+ help
+ This option enables support for the IBM PPC440GP evaluation board.
-config IBM_OPENBIOS
- bool
- depends on ASH || BUBINGA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
- default y
+#config LUAN
+# bool "Luan"
+# depends on 44x
+# default n
+# select 440SP
+# help
+# This option enables support for the IBM PPC440SP evaluation board.
+
+#config OCOTEA
+# bool "Ocotea"
+# depends on 44x
+# default n
+# select 440GX
+# help
+# This option enables support for the IBM PPC440GX evaluation board.
-config PPC4xx_DMA
- bool "PPC4xx DMA controller support"
- depends on 4xx
+endmenu
-config PPC4xx_EDMA
+# 44x specific CPU modules, selected based on the board above.
+config 440EP
bool
- depends on !STB03xxx && PPC4xx_DMA
- default y
+ select PPC_FPU
+ select IBM440EP_ERR42
-config PPC_GEN550
+config 440GP
bool
- depends on 4xx
- default y
-
-choice
- prompt "TTYS0 device and default console"
- depends on 40x
- default UART0_TTYS0
-
-config UART0_TTYS0
- bool "UART0"
-
-config UART0_TTYS1
- bool "UART1"
+ select IBM_NEW_EMAC_ZMII
-endchoice
-
-config SERIAL_SICC
- bool "SICC Serial port support"
- depends on STB03xxx
-
-config UART1_DFLT_CONSOLE
+config 440GX
bool
- depends on SERIAL_SICC && UART0_TTYS1
- default y
-config SERIAL_SICC_CONSOLE
+config 440SP
bool
- depends on SERIAL_SICC && UART0_TTYS1
- default y
-endmenu
-
-menu "IBM 40x options"
- depends on 40x
-
-config SERIAL_SICC
- bool "SICC Serial port"
- depends on STB03xxx
-
-config UART1_DFLT_CONSOLE
+config 440A
bool
- depends on SERIAL_SICC && UART0_TTYS1
+ depends on 440GX
default y
-config SERIAL_SICC_CONSOLE
+# 44x errata/workaround config symbols, selected by the CPU models above
+config IBM440EP_ERR42
bool
- depends on SERIAL_SICC && UART0_TTYS1
- default y
-endmenu
+#config XILINX_OCP
+# bool
+# depends on XILINX_ML300
+# default y
+
+#config BIOS_FIXUP
+# bool
+# depends on BUBINGA || EP405 || SYCAMORE || WALNUT
+# default y
+
+#config PPC4xx_DMA
+# bool "PPC4xx DMA controller support"
+# depends on 4xx
+
+#config PPC4xx_EDMA
+# bool
+# depends on !STB03xxx && PPC4xx_DMA
+# default y
^ permalink raw reply
* [PATCH 3/10] Use resource_size_t for serial port IO addresses
From: David Gibson @ 2007-04-18 6:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070418063517.GB29312@localhost.localdomain>
At present, various parts of the serial code use unsigned long to
define resource addresses. This is a problem, because some 32-bit
platforms have physical addresses larger than 32-bits, and have mmio
serial uarts located above the 4GB point.
This patch changes the type of mapbase in both struct uart_port and
struct plat_serial8250_port to resource_size_t, which can be
configured to be 64 bits on such platforms. The mapbase in
serial_struct can't safely be changed, because that structure is user
visible.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
---
drivers/serial/8250.c | 5 +++--
drivers/serial/8250_early.c | 16 +++++++++-------
drivers/serial/serial_core.c | 9 +++++----
include/linux/serial_8250.h | 2 +-
include/linux/serial_core.h | 2 +-
5 files changed, 19 insertions(+), 15 deletions(-)
Index: working-2.6/include/linux/serial_core.h
===================================================================
--- working-2.6.orig/include/linux/serial_core.h 2007-02-19 11:07:42.000000000 +1100
+++ working-2.6/include/linux/serial_core.h 2007-02-19 11:07:43.000000000 +1100
@@ -273,7 +273,7 @@ struct uart_port {
const struct uart_ops *ops;
unsigned int custom_divisor;
unsigned int line; /* port index */
- unsigned long mapbase; /* for ioremap */
+ resource_size_t mapbase; /* for ioremap */
struct device *dev; /* parent device */
unsigned char hub6; /* this should be in the 8250 driver */
unsigned char unused[3];
Index: working-2.6/drivers/serial/serial_core.c
===================================================================
--- working-2.6.orig/drivers/serial/serial_core.c 2007-02-19 11:07:42.000000000 +1100
+++ working-2.6/drivers/serial/serial_core.c 2007-02-19 11:07:43.000000000 +1100
@@ -633,7 +633,7 @@ static int uart_get_info(struct uart_sta
tmp.hub6 = port->hub6;
tmp.io_type = port->iotype;
tmp.iomem_reg_shift = port->regshift;
- tmp.iomem_base = (void *)port->mapbase;
+ tmp.iomem_base = (void *)(unsigned long)port->mapbase;
if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
return -EFAULT;
@@ -1673,10 +1673,11 @@ static int uart_line_info(char *buf, str
return 0;
mmio = port->iotype >= UPIO_MEM;
- ret = sprintf(buf, "%d: uart:%s %s%08lX irq:%d",
+ ret = sprintf(buf, "%d: uart:%s %s%08llX irq:%d",
port->line, uart_type(port),
mmio ? "mmio:0x" : "port:",
- mmio ? port->mapbase : (unsigned long) port->iobase,
+ mmio ? (unsigned long long)port->mapbase
+ : (unsigned long long) port->iobase,
port->irq);
if (port->type == PORT_UNKNOWN) {
@@ -2069,7 +2070,7 @@ uart_report_port(struct uart_driver *drv
case UPIO_AU:
case UPIO_TSI:
snprintf(address, sizeof(address),
- "MMIO 0x%lx", port->mapbase);
+ "MMIO 0x%llx", (unsigned long long)port->mapbase);
break;
default:
strlcpy(address, "*unknown*", sizeof(address));
Index: working-2.6/drivers/serial/8250_early.c
===================================================================
--- working-2.6.orig/drivers/serial/8250_early.c 2007-02-19 11:07:40.000000000 +1100
+++ working-2.6/drivers/serial/8250_early.c 2007-02-19 11:07:43.000000000 +1100
@@ -145,8 +145,9 @@ static int __init parse_options(struct e
port->mapbase = simple_strtoul(options + 5, &options, 0);
port->membase = ioremap(port->mapbase, mapsize);
if (!port->membase) {
- printk(KERN_ERR "%s: Couldn't ioremap 0x%lx\n",
- __FUNCTION__, port->mapbase);
+ printk(KERN_ERR "%s: Couldn't ioremap 0x%llx\n",
+ __FUNCTION__,
+ (unsigned long long)port->mapbase);
return -ENOMEM;
}
mmio = 1;
@@ -168,9 +169,10 @@ static int __init parse_options(struct e
device->baud);
}
- printk(KERN_INFO "Early serial console at %s 0x%lx (options '%s')\n",
+ printk(KERN_INFO "Early serial console at %s 0x%llx (options '%s')\n",
mmio ? "MMIO" : "I/O port",
- mmio ? port->mapbase : (unsigned long) port->iobase,
+ mmio ? (unsigned long long) port->mapbase
+ : (unsigned long long) port->iobase,
device->options);
return 0;
}
@@ -236,10 +238,10 @@ static int __init early_uart_console_swi
mmio = (port->iotype == UPIO_MEM);
line = serial8250_start_console(port, device->options);
if (line < 0)
- printk("No ttyS device at %s 0x%lx for console\n",
+ printk("No ttyS device at %s 0x%llx for console\n",
mmio ? "MMIO" : "I/O port",
- mmio ? port->mapbase :
- (unsigned long) port->iobase);
+ mmio ? (unsigned long long) port->mapbase
+ : (unsigned long long) port->iobase);
unregister_console(&early_uart_console);
if (mmio)
Index: working-2.6/include/linux/serial_8250.h
===================================================================
--- working-2.6.orig/include/linux/serial_8250.h 2007-02-19 11:07:40.000000000 +1100
+++ working-2.6/include/linux/serial_8250.h 2007-02-19 11:07:43.000000000 +1100
@@ -20,7 +20,7 @@
struct plat_serial8250_port {
unsigned long iobase; /* io base address */
void __iomem *membase; /* ioremap cookie or NULL */
- unsigned long mapbase; /* resource base */
+ resource_size_t mapbase; /* resource base */
unsigned int irq; /* interrupt number */
unsigned int uartclk; /* UART clock rate */
unsigned char regshift; /* register shift */
Index: working-2.6/drivers/serial/8250.c
===================================================================
--- working-2.6.orig/drivers/serial/8250.c 2007-02-19 11:07:40.000000000 +1100
+++ working-2.6/drivers/serial/8250.c 2007-02-19 11:07:43.000000000 +1100
@@ -2550,8 +2550,9 @@ static int __devinit serial8250_probe(st
ret = serial8250_register_port(&port);
if (ret < 0) {
dev_err(&dev->dev, "unable to register port at index %d "
- "(IO%lx MEM%lx IRQ%d): %d\n", i,
- p->iobase, p->mapbase, p->irq, ret);
+ "(IO%lx MEM%llx IRQ%d): %d\n", i,
+ p->iobase, (unsigned long long)p->mapbase,
+ p->irq, ret);
}
}
return 0;
^ permalink raw reply
* [PATCH 2/10] Define FIXED_PORT flag for serial_core
From: David Gibson @ 2007-04-18 6:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070418063517.GB29312@localhost.localdomain>
At present, the serial core always allows setserial in userspace to
change the port address, irq and base clock of any serial port. That
makes sense for legacy ISA ports, but not for (say) embedded ns16550
compatible serial ports at peculiar addresses. In these cases, the
kernel code configuring the ports must know exactly where they are,
and their clocking arrangements (which can be unusual on embedded
boards). It doesn't make sense for userspace to change these
settings.
Therefore, this patch defines a UPF_FIXED_PORT flag for the uart_port
structure. If this flag is set when the serial port is configured,
any attempts to alter the port's type, io address, irq or base clock
with setserial are ignored.
In addition this patch uses the new flag for on-chip serial ports
probed in arch/powerpc/kernel/legacy_serial.c, and for other
hard-wired serial ports probed by drivers/serial/of_serial.c.
Signed-off-by: David Gibson <dwg@au1.ibm.com>
---
arch/powerpc/kernel/legacy_serial.c | 3 ++-
drivers/serial/of_serial.c | 3 ++-
drivers/serial/serial_core.c | 22 +++++++++++++---------
include/linux/serial_core.h | 1 +
4 files changed, 18 insertions(+), 11 deletions(-)
Index: working-2.6/drivers/serial/serial_core.c
===================================================================
--- working-2.6.orig/drivers/serial/serial_core.c 2007-02-19 11:05:32.000000000 +1100
+++ working-2.6/drivers/serial/serial_core.c 2007-02-20 11:38:08.000000000 +1100
@@ -672,19 +672,21 @@ static int uart_set_info(struct uart_sta
*/
mutex_lock(&state->mutex);
- change_irq = new_serial.irq != port->irq;
+ change_irq = !(port->flags & UPF_FIXED_PORT)
+ && new_serial.irq != port->irq;
/*
* Since changing the 'type' of the port changes its resource
* allocations, we should treat type changes the same as
* IO port changes.
*/
- change_port = new_port != port->iobase ||
- (unsigned long)new_serial.iomem_base != port->mapbase ||
- new_serial.hub6 != port->hub6 ||
- new_serial.io_type != port->iotype ||
- new_serial.iomem_reg_shift != port->regshift ||
- new_serial.type != port->type;
+ change_port = !(port->flags & UPF_FIXED_PORT)
+ && (new_port != port->iobase ||
+ (unsigned long)new_serial.iomem_base != port->mapbase ||
+ new_serial.hub6 != port->hub6 ||
+ new_serial.io_type != port->iotype ||
+ new_serial.iomem_reg_shift != port->regshift ||
+ new_serial.type != port->type);
old_flags = port->flags;
new_flags = new_serial.flags;
@@ -796,8 +798,10 @@ static int uart_set_info(struct uart_sta
}
}
- port->irq = new_serial.irq;
- port->uartclk = new_serial.baud_base * 16;
+ if (change_irq)
+ port->irq = new_serial.irq;
+ if (! (port->flags & UPF_FIXED_PORT))
+ port->uartclk = new_serial.baud_base * 16;
port->flags = (port->flags & ~UPF_CHANGE_MASK) |
(new_flags & UPF_CHANGE_MASK);
port->custom_divisor = new_serial.custom_divisor;
Index: working-2.6/include/linux/serial_core.h
===================================================================
--- working-2.6.orig/include/linux/serial_core.h 2007-02-19 11:05:32.000000000 +1100
+++ working-2.6/include/linux/serial_core.h 2007-02-20 11:38:08.000000000 +1100
@@ -260,6 +260,7 @@ struct uart_port {
#define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
+#define UPF_FIXED_PORT ((__force upf_t) (1 << 29))
#define UPF_DEAD ((__force upf_t) (1 << 30))
#define UPF_IOREMAP ((__force upf_t) (1 << 31))
Index: working-2.6/arch/powerpc/kernel/legacy_serial.c
===================================================================
--- working-2.6.orig/arch/powerpc/kernel/legacy_serial.c 2007-02-15 10:05:18.000000000 +1100
+++ working-2.6/arch/powerpc/kernel/legacy_serial.c 2007-02-20 10:50:16.000000000 +1100
@@ -115,7 +115,8 @@ static int __init add_legacy_soc_port(st
{
u64 addr;
const u32 *addrp;
- upf_t flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ;
+ upf_t flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ
+ | UPF_FIXED_PORT;
struct device_node *tsi = of_get_parent(np);
/* We only support ports that have a clock frequency properly
Index: working-2.6/drivers/serial/of_serial.c
===================================================================
--- working-2.6.orig/drivers/serial/of_serial.c 2007-02-20 11:38:16.000000000 +1100
+++ working-2.6/drivers/serial/of_serial.c 2007-02-20 11:38:30.000000000 +1100
@@ -48,7 +48,8 @@ static int __devinit of_platform_serial_
port->iotype = UPIO_MEM;
port->type = type;
port->uartclk = *clk;
- port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP;
+ port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
+ | UPF_FIXED_PORT;
port->dev = &ofdev->dev;
port->custom_divisor = *clk / (16 * (*spd));
^ permalink raw reply
* [PATCH 1/10] Fix breakage caused by tlb flush batch changes
From: David Gibson @ 2007-04-18 6:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070418063517.GB29312@localhost.localdomain>
BenH's commit a741e67969577163a4cfc78d7fd2753219087ef1 in powerpc.git,
although (AFAICT) only intended to affect ppc64, also has side-effects
which break 44x. I think 40x, 8xx and Freescale Book E are also
affected, though I haven't tested them.
The problem lies in unconditionally removing flush_tlb_pending() from
the versions of flush_tlb_mm(), flush_tlb_range() and
flush_tlb_kernel_range() used on ppc64 - which are also used the
embedded platforms mentioned above.
The patch below restores the necessary flushes and fixes the breakage
for 44x. They should also fix any breakage for the other platforms,
but again I haven't tested those.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
include/asm-powerpc/tlbflush.h | 9 +++++++++
1 file changed, 9 insertions(+)
Index: working-2.6/include/asm-powerpc/tlbflush.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/tlbflush.h 2007-04-18 15:45:12.000000000 +1000
+++ working-2.6/include/asm-powerpc/tlbflush.h 2007-04-18 15:55:21.000000000 +1000
@@ -104,6 +104,9 @@ extern void update_mmu_cache(struct vm_a
static inline void flush_tlb_mm(struct mm_struct *mm)
{
+#ifndef CONFIG_PPC64
+ flush_tlb_pending();
+#endif
}
static inline void flush_tlb_page(struct vm_area_struct *vma,
@@ -125,11 +128,17 @@ static inline void flush_tlb_page_nohash
static inline void flush_tlb_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end)
{
+#ifndef CONFIG_PPC64
+ flush_tlb_pending();
+#endif
}
static inline void flush_tlb_kernel_range(unsigned long start,
unsigned long end)
{
+#ifndef CONFIG_PPC64
+ flush_tlb_pending();
+#endif
}
#else /* 6xx, 7xx, 7xxx cpus */
^ permalink raw reply
* [0/10] Latest Ebony (440GP) support series
From: David Gibson @ 2007-04-18 6:35 UTC (permalink / raw)
To: linuxppc-dev
Aplogies for the truncated series last time around. Here is my
current Ebony (440GP) patch series, updated to reflect the pile of
bootwrapper patches which have been merged into powerpc.git.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* [PATCH] [5/5] [v2] pasemi: GPIO MDIO of_platform driver
From: Olof Johansson @ 2007-04-18 6:39 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev, arnd
In-Reply-To: <20070416063139.GC20319@lixom.net>
MDIO driver for PHY's connected via GPIO as on the PA Semi Electra
eval board.
Signed-off-by: Olof Johansson <olof@lixom.net>
--
Changed: Removed hack to probe the device, and added the compatible =
"sdc" of platform probe.
Index: powerpc/arch/powerpc/platforms/pasemi/gpio_mdio.c
===================================================================
--- /dev/null
+++ powerpc/arch/powerpc/platforms/pasemi/gpio_mdio.c
@@ -0,0 +1,339 @@
+/*
+ * Copyright (C) 2006-2007 PA Semi, Inc
+ *
+ * Author: Olof Johansson, PA Semi
+ *
+ * Maintained by: Olof Johansson <olof@lixom.net>
+ *
+ * Based on drivers/net/fs_enet/mii-bitbang.c.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+#include <asm/of_platform.h>
+
+#define DELAY 1
+
+static void __iomem *gpio_regs;
+
+struct gpio_priv {
+ int mdc_pin;
+ int mdio_pin;
+};
+
+#define MDC_PIN(bus) (((struct gpio_priv *)bus->priv)->mdc_pin)
+#define MDIO_PIN(bus) (((struct gpio_priv *)bus->priv)->mdio_pin)
+
+static inline void mdio_lo(struct mii_bus *bus)
+{
+ out_le32(gpio_regs+0x10, 1 << MDIO_PIN(bus));
+}
+
+static inline void mdio_hi(struct mii_bus *bus)
+{
+ out_le32(gpio_regs, 1 << MDIO_PIN(bus));
+}
+
+static inline void mdc_lo(struct mii_bus *bus)
+{
+ out_le32(gpio_regs+0x10, 1 << MDC_PIN(bus));
+}
+
+static inline void mdc_hi(struct mii_bus *bus)
+{
+ out_le32(gpio_regs, 1 << MDC_PIN(bus));
+}
+
+static inline void mdio_active(struct mii_bus *bus)
+{
+ out_le32(gpio_regs+0x20, (1 << MDC_PIN(bus)) | (1 << MDIO_PIN(bus)));
+}
+
+static inline void mdio_tristate(struct mii_bus *bus)
+{
+ out_le32(gpio_regs+0x30, (1 << MDIO_PIN(bus)));
+}
+
+static inline int mdio_read(struct mii_bus *bus)
+{
+ return !!(in_le32(gpio_regs+0x40) & (1 << MDIO_PIN(bus)));
+}
+
+static void clock_out(struct mii_bus *bus, int bit)
+{
+ if (bit)
+ mdio_hi(bus);
+ else
+ mdio_lo(bus);
+ udelay(DELAY);
+ mdc_hi(bus);
+ udelay(DELAY);
+ mdc_lo(bus);
+}
+
+/* Utility to send the preamble, address, and register (common to read and write). */
+static void bitbang_pre(struct mii_bus *bus, int read, u8 addr, u8 reg)
+{
+ int i;
+
+ /* CFE uses a really long preamble (40 bits). We'll do the same. */
+ mdio_active(bus);
+ for (i = 0; i < 40; i++) {
+ clock_out(bus, 1);
+ }
+
+ /* send the start bit (01) and the read opcode (10) or write (10) */
+ clock_out(bus, 0);
+ clock_out(bus, 1);
+
+ clock_out(bus, read);
+ clock_out(bus, !read);
+
+ /* send the PHY address */
+ for (i = 0; i < 5; i++) {
+ clock_out(bus, (addr & 0x10) != 0);
+ addr <<= 1;
+ }
+
+ /* send the register address */
+ for (i = 0; i < 5; i++) {
+ clock_out(bus, (reg & 0x10) != 0);
+ reg <<= 1;
+ }
+}
+
+static int gpio_mdio_read(struct mii_bus *bus, int phy_id, int location)
+{
+ u16 rdreg;
+ int ret, i;
+ u8 addr = phy_id & 0xff;
+ u8 reg = location & 0xff;
+
+ bitbang_pre(bus, 1, addr, reg);
+
+ /* tri-state our MDIO I/O pin so we can read */
+ mdio_tristate(bus);
+ udelay(DELAY);
+ mdc_hi(bus);
+ udelay(DELAY);
+ mdc_lo(bus);
+
+ /* read 16 bits of register data, MSB first */
+ rdreg = 0;
+ for (i = 0; i < 16; i++) {
+ mdc_lo(bus);
+ udelay(DELAY);
+ mdc_hi(bus);
+ udelay(DELAY);
+ mdc_lo(bus);
+ udelay(DELAY);
+ rdreg <<= 1;
+ rdreg |= mdio_read(bus);
+ }
+
+ mdc_hi(bus);
+ udelay(DELAY);
+ mdc_lo(bus);
+ udelay(DELAY);
+
+ ret = rdreg;
+
+ return ret;
+}
+
+static int gpio_mdio_write(struct mii_bus *bus, int phy_id, int location, u16 val)
+{
+ int i;
+
+ u8 addr = phy_id & 0xff;
+ u8 reg = location & 0xff;
+ u16 value = val & 0xffff;
+
+ bitbang_pre(bus, 0, addr, reg);
+
+ /* send the turnaround (10) */
+ mdc_lo(bus);
+ mdio_hi(bus);
+ udelay(DELAY);
+ mdc_hi(bus);
+ udelay(DELAY);
+ mdc_lo(bus);
+ mdio_lo(bus);
+ udelay(DELAY);
+ mdc_hi(bus);
+ udelay(DELAY);
+
+ /* write 16 bits of register data, MSB first */
+ for (i = 0; i < 16; i++) {
+ mdc_lo(bus);
+ if (value & 0x8000)
+ mdio_hi(bus);
+ else
+ mdio_lo(bus);
+ udelay(DELAY);
+ mdc_hi(bus);
+ udelay(DELAY);
+ value <<= 1;
+ }
+
+ /*
+ * Tri-state the MDIO line.
+ */
+ mdio_tristate(bus);
+ mdc_lo(bus);
+ udelay(DELAY);
+ mdc_hi(bus);
+ udelay(DELAY);
+ return 0;
+}
+
+static int gpio_mdio_reset(struct mii_bus *bus)
+{
+ /*nothing here - dunno how to reset it*/
+ return 0;
+}
+
+
+static int __devinit gpio_mdio_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct device *dev = &ofdev->dev;
+ struct device_node *np = ofdev->node;
+ struct device_node *gpio_np;
+ struct mii_bus *new_bus;
+ struct resource res;
+ struct gpio_priv *priv;
+ const unsigned int *prop;
+ int err = 0;
+ int i;
+
+ gpio_np = of_find_compatible_node(NULL, "gpio", "1682m-gpio");
+
+ if (!gpio_np)
+ return -ENODEV;
+
+ err = of_address_to_resource(gpio_np, 0, &res);
+ of_node_put(gpio_np);
+
+ if (err)
+ return -EINVAL;
+
+ if (!gpio_regs)
+ gpio_regs = ioremap(res.start, 0x100);
+
+ if (!gpio_regs)
+ return -EPERM;
+
+ priv = kzalloc(sizeof(struct gpio_priv), GFP_KERNEL);
+ if (priv == NULL)
+ return -ENOMEM;
+
+ new_bus = kzalloc(sizeof(struct mii_bus), GFP_KERNEL);
+
+ if (new_bus == NULL)
+ return -ENOMEM;
+
+ new_bus->name = "pasemi gpio mdio bus",
+ new_bus->read = &gpio_mdio_read,
+ new_bus->write = &gpio_mdio_write,
+ new_bus->reset = &gpio_mdio_reset,
+
+ prop = get_property(np, "reg", NULL);
+ new_bus->id = *prop;
+ new_bus->priv = priv;
+
+ new_bus->phy_mask = 0;
+
+ new_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
+ for(i = 0; i < PHY_MAX_ADDR; ++i)
+ new_bus->irq[i] = irq_create_mapping(NULL, 10);
+
+
+ prop = get_property(np, "mdc-pin", NULL);
+ priv->mdc_pin = *prop;
+
+ prop = get_property(np, "mdio-pin", NULL);
+ priv->mdio_pin = *prop;
+
+ new_bus->dev = dev;
+ dev_set_drvdata(dev, new_bus);
+
+ err = mdiobus_register(new_bus);
+
+ if (0 != err) {
+ printk(KERN_ERR "%s: Cannot register as MDIO bus, err %d\n",
+ new_bus->name, err);
+ goto bus_register_fail;
+ }
+
+ return 0;
+
+bus_register_fail:
+ kfree(new_bus);
+
+ return err;
+}
+
+
+static int gpio_mdio_remove(struct of_device *dev)
+{
+ struct mii_bus *bus = dev_get_drvdata(&dev->dev);
+
+ mdiobus_unregister(bus);
+
+ dev_set_drvdata(&dev->dev, NULL);
+
+ kfree(bus->priv);
+ bus->priv = NULL;
+ kfree(bus);
+
+ return 0;
+}
+
+static struct of_device_id gpio_mdio_match[] =
+{
+ {
+ .compatible = "gpio-mdio",
+ },
+ {},
+};
+
+static struct of_platform_driver gpio_mdio_driver =
+{
+ .name = "gpio-mdio-bitbang",
+ .match_table = gpio_mdio_match,
+ .probe = gpio_mdio_probe,
+ .remove = gpio_mdio_remove,
+};
+
+int gpio_mdio_init(void)
+{
+ return of_register_platform_driver(&gpio_mdio_driver);
+}
+
+void gpio_mdio_exit(void)
+{
+ of_unregister_platform_driver(&gpio_mdio_driver);
+}
+device_initcall(gpio_mdio_init);
+
Index: powerpc/arch/powerpc/platforms/pasemi/Makefile
===================================================================
--- powerpc.orig/arch/powerpc/platforms/pasemi/Makefile
+++ powerpc/arch/powerpc/platforms/pasemi/Makefile
@@ -1,3 +1,3 @@
-obj-y += setup.o pci.o time.o idle.o powersave.o iommu.o
+obj-y += setup.o pci.o time.o idle.o powersave.o iommu.o gpio_mdio.o
obj-$(CONFIG_PPC_PASEMI_CPUFREQ) += cpufreq.o
Index: powerpc/arch/powerpc/platforms/pasemi/setup.c
===================================================================
--- powerpc.orig/arch/powerpc/platforms/pasemi/setup.c
+++ powerpc/arch/powerpc/platforms/pasemi/setup.c
@@ -209,6 +209,20 @@ static void __init pas_init_early(void)
iommu_init_early_pasemi();
}
+static struct of_device_id pasemi_bus_ids[] = {
+ { .type = "sdc", },
+ {},
+};
+
+static int __init pasemi_publish_devices(void)
+{
+ /* Publish OF platform devices for southbridge IOs */
+ of_platform_bus_probe(NULL, pasemi_bus_ids, NULL);
+
+ return 0;
+}
+device_initcall(pasemi_publish_devices);
+
/*
* Called very early, MMU is off, device-tree isn't unflattened
^ permalink raw reply
* [PATCH] [4/5] [v2] pasemi: PA6T oprofile support
From: Olof Johansson @ 2007-04-18 6:38 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev, anton
In-Reply-To: <20070416063015.GB20319@lixom.net>
Oprofile support for PA6T, kernel side.
Also rename the PA6T_SPRN.* defines to SPRN_PA6T.*.
Signed-off-by: Olof Johansson <olof@lixom.net>
--
Changed: Fixed some redundant defines and unneeded include file.
Index: powerpc/arch/powerpc/kernel/cputable.c
===================================================================
--- powerpc.orig/arch/powerpc/kernel/cputable.c
+++ powerpc/arch/powerpc/kernel/cputable.c
@@ -389,6 +389,8 @@ static struct cpu_spec cpu_specs[] = {
.pmc_type = PPC_PMC_PA6T,
.cpu_setup = __setup_cpu_pa6t,
.cpu_restore = __restore_cpu_pa6t,
+ .oprofile_cpu_type = "ppc64/pa6t",
+ .oprofile_type = PPC_OPROFILE_PA6T,
.platform = "pa6t",
},
{ /* default match */
Index: powerpc/arch/powerpc/kernel/sysfs.c
===================================================================
--- powerpc.orig/arch/powerpc/kernel/sysfs.c
+++ powerpc/arch/powerpc/kernel/sysfs.c
@@ -189,12 +189,12 @@ SYSFS_PMCSETUP(purr, SPRN_PURR);
SYSFS_PMCSETUP(spurr, SPRN_SPURR);
SYSFS_PMCSETUP(dscr, SPRN_DSCR);
-SYSFS_PMCSETUP(pa6t_pmc0, PA6T_SPRN_PMC0);
-SYSFS_PMCSETUP(pa6t_pmc1, PA6T_SPRN_PMC1);
-SYSFS_PMCSETUP(pa6t_pmc2, PA6T_SPRN_PMC2);
-SYSFS_PMCSETUP(pa6t_pmc3, PA6T_SPRN_PMC3);
-SYSFS_PMCSETUP(pa6t_pmc4, PA6T_SPRN_PMC4);
-SYSFS_PMCSETUP(pa6t_pmc5, PA6T_SPRN_PMC5);
+SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
+SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
+SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
+SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
+SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
+SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
static SYSDEV_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
Index: powerpc/arch/powerpc/oprofile/op_model_pa6t.c
===================================================================
--- /dev/null
+++ powerpc/arch/powerpc/oprofile/op_model_pa6t.c
@@ -0,0 +1,234 @@
+/*
+ * Copyright (C) 2006-2007 PA Semi, Inc
+ *
+ * Author: Shashi Rao, PA Semi
+ *
+ * Maintained by: Olof Johansson <olof@lixom.net>
+ *
+ * Based on arch/powerpc/oprofile/op_model_power4.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/oprofile.h>
+#include <linux/init.h>
+#include <linux/smp.h>
+#include <linux/percpu.h>
+#include <asm/processor.h>
+#include <asm/cputable.h>
+#include <asm/oprofile_impl.h>
+#include <asm/reg.h>
+
+static unsigned char oprofile_running;
+
+/* mmcr values are set in pa6t_reg_setup, used in pa6t_cpu_setup */
+static u64 mmcr0_val;
+static u64 mmcr1_val;
+
+/* inited in pa6t_reg_setup */
+static u64 reset_value[OP_MAX_COUNTER];
+
+static inline u64 ctr_read(unsigned int i)
+{
+ switch (i) {
+ case 0:
+ return mfspr(SPRN_PA6T_PMC0);
+ case 1:
+ return mfspr(SPRN_PA6T_PMC1);
+ case 2:
+ return mfspr(SPRN_PA6T_PMC2);
+ case 3:
+ return mfspr(SPRN_PA6T_PMC3);
+ case 4:
+ return mfspr(SPRN_PA6T_PMC4);
+ case 5:
+ return mfspr(SPRN_PA6T_PMC5);
+ default:
+ printk(KERN_ERR "ctr_read called with bad arg %u\n", i);
+ return 0;
+ }
+}
+
+static inline void ctr_write(unsigned int i, u64 val)
+{
+ switch (i) {
+ case 0:
+ mtspr(SPRN_PA6T_PMC0, val);
+ break;
+ case 1:
+ mtspr(SPRN_PA6T_PMC1, val);
+ break;
+ case 2:
+ mtspr(SPRN_PA6T_PMC2, val);
+ break;
+ case 3:
+ mtspr(SPRN_PA6T_PMC3, val);
+ break;
+ case 4:
+ mtspr(SPRN_PA6T_PMC4, val);
+ break;
+ case 5:
+ mtspr(SPRN_PA6T_PMC5, val);
+ break;
+ default:
+ printk(KERN_ERR "ctr_write called with bad arg %u\n", i);
+ break;
+ }
+}
+
+
+/* precompute the values to stuff in the hardware registers */
+static void pa6t_reg_setup(struct op_counter_config *ctr,
+ struct op_system_config *sys,
+ int num_ctrs)
+{
+ int pmc;
+
+ /*
+ * adjust the mmcr0.en[0-5] and mmcr0.inten[0-5] values obtained from the
+ * event_mappings file by turning off the counters that the user doesn't
+ * care about
+ *
+ * setup user and kernel profiling
+ */
+ for (pmc = 0; pmc < cur_cpu_spec->num_pmcs; pmc++)
+ if (!ctr[pmc].enabled) {
+ sys->mmcr0 &= ~(0x1UL << pmc);
+ sys->mmcr0 &= ~(0x1UL << (pmc+12));
+ pr_debug("turned off counter %u\n", pmc);
+ }
+
+ if (sys->enable_kernel)
+ sys->mmcr0 |= PA6T_MMCR0_SUPEN | PA6T_MMCR0_HYPEN;
+ else
+ sys->mmcr0 &= ~(PA6T_MMCR0_SUPEN | PA6T_MMCR0_HYPEN);
+
+ if (sys->enable_user)
+ sys->mmcr0 |= PA6T_MMCR0_PREN;
+ else
+ sys->mmcr0 &= ~PA6T_MMCR0_PREN;
+
+ /*
+ * The performance counter event settings are given in the mmcr0 and
+ * mmcr1 values passed from the user in the op_system_config
+ * structure (sys variable).
+ */
+ mmcr0_val = sys->mmcr0;
+ mmcr1_val = sys->mmcr1;
+ pr_debug("mmcr0_val inited to %016lx\n", sys->mmcr0);
+ pr_debug("mmcr1_val inited to %016lx\n", sys->mmcr1);
+
+ for (pmc = 0; pmc < cur_cpu_spec->num_pmcs; pmc++) {
+ /* counters are 40 bit. Move to cputable at some point? */
+ reset_value[pmc] = (0x1UL << 39) - ctr[pmc].count;
+ pr_debug("reset_value for pmc%u inited to 0x%lx\n",
+ pmc, reset_value[pmc]);
+ }
+}
+
+/* configure registers on this cpu */
+static void pa6t_cpu_setup(struct op_counter_config *ctr)
+{
+ u64 mmcr0 = mmcr0_val;
+ u64 mmcr1 = mmcr1_val;
+
+ /* Default is all PMCs off */
+ mmcr0 &= ~(0x3FUL);
+ mtspr(SPRN_PA6T_MMCR0, mmcr0);
+
+ /* program selected programmable events in */
+ mtspr(SPRN_PA6T_MMCR1, mmcr1);
+
+ pr_debug("setup on cpu %d, mmcr0 %016lx\n", smp_processor_id(),
+ mfspr(SPRN_PA6T_MMCR0));
+ pr_debug("setup on cpu %d, mmcr1 %016lx\n", smp_processor_id(),
+ mfspr(SPRN_PA6T_MMCR1));
+}
+
+static void pa6t_start(struct op_counter_config *ctr)
+{
+ int i;
+
+ /* Hold off event counting until rfid */
+ u64 mmcr0 = mmcr0_val | PA6T_MMCR0_HANDDIS;
+
+ for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
+ if (ctr[i].enabled)
+ ctr_write(i, reset_value[i]);
+ else
+ ctr_write(i, 0UL);
+
+ mtspr(SPRN_PA6T_MMCR0, mmcr0);
+
+ oprofile_running = 1;
+
+ pr_debug("start on cpu %d, mmcr0 %lx\n", smp_processor_id(), mmcr0);
+}
+
+static void pa6t_stop(void)
+{
+ u64 mmcr0;
+
+ /* freeze counters */
+ mmcr0 = mfspr(SPRN_PA6T_MMCR0);
+ mmcr0 |= PA6T_MMCR0_FCM0;
+ mtspr(SPRN_PA6T_MMCR0, mmcr0);
+
+ oprofile_running = 0;
+
+ pr_debug("stop on cpu %d, mmcr0 %lx\n", smp_processor_id(), mmcr0);
+}
+
+/* handle the perfmon overflow vector */
+static void pa6t_handle_interrupt(struct pt_regs *regs,
+ struct op_counter_config *ctr)
+{
+ unsigned long pc = mfspr(SPRN_PA6T_SIAR);
+ int is_kernel = is_kernel_addr(pc);
+ u64 val;
+ int i;
+ u64 mmcr0;
+
+ /* disable perfmon counting until rfid */
+ mmcr0 = mfspr(SPRN_PA6T_MMCR0);
+ mtspr(SPRN_PA6T_MMCR0, mmcr0 | PA6T_MMCR0_HANDDIS);
+
+ /* Record samples. We've got one global bit for whether a sample
+ * was taken, so add it for any counter that triggered overflow.
+ */
+ for (i = 0; i < cur_cpu_spec->num_pmcs; i++) {
+ val = ctr_read(i);
+ if (val & (0x1UL << 39)) { /* Overflow bit set */
+ if (oprofile_running && ctr[i].enabled) {
+ if (mmcr0 & PA6T_MMCR0_SIARLOG)
+ oprofile_add_ext_sample(pc, regs, i, is_kernel);
+ ctr_write(i, reset_value[i]);
+ } else {
+ ctr_write(i, 0UL);
+ }
+ }
+ }
+
+ /* Restore mmcr0 to a good known value since the PMI changes it */
+ mmcr0 = mmcr0_val | PA6T_MMCR0_HANDDIS;
+ mtspr(SPRN_PA6T_MMCR0, mmcr0);
+}
+
+struct op_powerpc_model op_model_pa6t = {
+ .reg_setup = pa6t_reg_setup,
+ .cpu_setup = pa6t_cpu_setup,
+ .start = pa6t_start,
+ .stop = pa6t_stop,
+ .handle_interrupt = pa6t_handle_interrupt,
+};
Index: powerpc/include/asm-powerpc/cputable.h
===================================================================
--- powerpc.orig/include/asm-powerpc/cputable.h
+++ powerpc/include/asm-powerpc/cputable.h
@@ -48,6 +48,7 @@ enum powerpc_oprofile_type {
PPC_OPROFILE_G4 = 3,
PPC_OPROFILE_BOOKE = 4,
PPC_OPROFILE_CELL = 5,
+ PPC_OPROFILE_PA6T = 6,
};
enum powerpc_pmc_type {
Index: powerpc/include/asm-powerpc/reg.h
===================================================================
--- powerpc.orig/include/asm-powerpc/reg.h
+++ powerpc/include/asm-powerpc/reg.h
@@ -469,12 +469,68 @@
#define SPRN_SIAR 780
#define SPRN_SDAR 781
-#define PA6T_SPRN_PMC0 787
-#define PA6T_SPRN_PMC1 788
-#define PA6T_SPRN_PMC2 789
-#define PA6T_SPRN_PMC3 790
-#define PA6T_SPRN_PMC4 791
-#define PA6T_SPRN_PMC5 792
+#define SPRN_PA6T_MMCR0 795
+#define PA6T_MMCR0_EN0 0x0000000000000001UL
+#define PA6T_MMCR0_EN1 0x0000000000000002UL
+#define PA6T_MMCR0_EN2 0x0000000000000004UL
+#define PA6T_MMCR0_EN3 0x0000000000000008UL
+#define PA6T_MMCR0_EN4 0x0000000000000010UL
+#define PA6T_MMCR0_EN5 0x0000000000000020UL
+#define PA6T_MMCR0_SUPEN 0x0000000000000040UL
+#define PA6T_MMCR0_PREN 0x0000000000000080UL
+#define PA6T_MMCR0_HYPEN 0x0000000000000100UL
+#define PA6T_MMCR0_FCM0 0x0000000000000200UL
+#define PA6T_MMCR0_FCM1 0x0000000000000400UL
+#define PA6T_MMCR0_INTGEN 0x0000000000000800UL
+#define PA6T_MMCR0_INTEN0 0x0000000000001000UL
+#define PA6T_MMCR0_INTEN1 0x0000000000002000UL
+#define PA6T_MMCR0_INTEN2 0x0000000000004000UL
+#define PA6T_MMCR0_INTEN3 0x0000000000008000UL
+#define PA6T_MMCR0_INTEN4 0x0000000000010000UL
+#define PA6T_MMCR0_INTEN5 0x0000000000020000UL
+#define PA6T_MMCR0_DISCNT 0x0000000000040000UL
+#define PA6T_MMCR0_UOP 0x0000000000080000UL
+#define PA6T_MMCR0_TRG 0x0000000000100000UL
+#define PA6T_MMCR0_TRGEN 0x0000000000200000UL
+#define PA6T_MMCR0_TRGREG 0x0000000001600000UL
+#define PA6T_MMCR0_SIARLOG 0x0000000002000000UL
+#define PA6T_MMCR0_SDARLOG 0x0000000004000000UL
+#define PA6T_MMCR0_PROEN 0x0000000008000000UL
+#define PA6T_MMCR0_PROLOG 0x0000000010000000UL
+#define PA6T_MMCR0_DAMEN2 0x0000000020000000UL
+#define PA6T_MMCR0_DAMEN3 0x0000000040000000UL
+#define PA6T_MMCR0_DAMEN4 0x0000000080000000UL
+#define PA6T_MMCR0_DAMEN5 0x0000000100000000UL
+#define PA6T_MMCR0_DAMSEL2 0x0000000200000000UL
+#define PA6T_MMCR0_DAMSEL3 0x0000000400000000UL
+#define PA6T_MMCR0_DAMSEL4 0x0000000800000000UL
+#define PA6T_MMCR0_DAMSEL5 0x0000001000000000UL
+#define PA6T_MMCR0_HANDDIS 0x0000002000000000UL
+#define PA6T_MMCR0_PCTEN 0x0000004000000000UL
+#define PA6T_MMCR0_SOCEN 0x0000008000000000UL
+#define PA6T_MMCR0_SOCMOD 0x0000010000000000UL
+
+#define SPRN_PA6T_MMCR1 798
+#define PA6T_MMCR1_ES2 0x00000000000000ffUL
+#define PA6T_MMCR1_ES3 0x000000000000ff00UL
+#define PA6T_MMCR1_ES4 0x0000000000ff0000UL
+#define PA6T_MMCR1_ES5 0x00000000ff000000UL
+
+#define SPRN_PA6T_SIAR 780
+#define SPRN_PA6T_UPMC0 771
+#define SPRN_PA6T_UPMC1 772
+#define SPRN_PA6T_UPMC2 773
+#define SPRN_PA6T_UPMC3 774
+#define SPRN_PA6T_UPMC4 775
+#define SPRN_PA6T_UPMC5 776
+#define SPRN_PA6T_UMMCR0 779
+#define SPRN_PA6T_UMMCR1 782
+#define SPRN_PA6T_PMC0 787
+#define SPRN_PA6T_PMC1 788
+#define SPRN_PA6T_PMC2 789
+#define SPRN_PA6T_PMC3 790
+#define SPRN_PA6T_PMC4 791
+#define SPRN_PA6T_PMC5 792
#else /* 32-bit */
#define SPRN_MMCR0 952 /* Monitor Mode Control Register 0 */
Index: powerpc/include/asm-powerpc/pmc.h
===================================================================
--- powerpc.orig/include/asm-powerpc/pmc.h
+++ powerpc/include/asm-powerpc/pmc.h
@@ -30,6 +30,7 @@ void release_pmc_hardware(void);
#ifdef CONFIG_PPC64
void power4_enable_pmcs(void);
+void pasemi_enable_pmcs(void);
#endif
#endif /* __KERNEL__ */
Index: powerpc/arch/powerpc/oprofile/common.c
===================================================================
--- powerpc.orig/arch/powerpc/oprofile/common.c
+++ powerpc/arch/powerpc/oprofile/common.c
@@ -160,6 +160,9 @@ int __init oprofile_arch_init(struct opr
case PPC_OPROFILE_POWER4:
model = &op_model_power4;
break;
+ case PPC_OPROFILE_PA6T:
+ model = &op_model_pa6t;
+ break;
#endif
#ifdef CONFIG_6xx
case PPC_OPROFILE_G4:
Index: powerpc/arch/powerpc/oprofile/Makefile
===================================================================
--- powerpc.orig/arch/powerpc/oprofile/Makefile
+++ powerpc/arch/powerpc/oprofile/Makefile
@@ -12,6 +12,6 @@ DRIVER_OBJS := $(addprefix ../../../driv
oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
oprofile-$(CONFIG_PPC_CELL_NATIVE) += op_model_cell.o
-oprofile-$(CONFIG_PPC64) += op_model_rs64.o op_model_power4.o
+oprofile-$(CONFIG_PPC64) += op_model_rs64.o op_model_power4.o op_model_pa6t.o
oprofile-$(CONFIG_FSL_BOOKE) += op_model_fsl_booke.o
oprofile-$(CONFIG_6xx) += op_model_7450.o
Index: powerpc/include/asm-powerpc/oprofile_impl.h
===================================================================
--- powerpc.orig/include/asm-powerpc/oprofile_impl.h
+++ powerpc/include/asm-powerpc/oprofile_impl.h
@@ -57,6 +57,8 @@ extern struct op_powerpc_model op_model_
extern struct op_powerpc_model op_model_power4;
extern struct op_powerpc_model op_model_7450;
extern struct op_powerpc_model op_model_cell;
+extern struct op_powerpc_model op_model_pa6t;
+
/* All the classic PPC parts use these */
static inline unsigned int classic_ctr_read(unsigned int i)
^ permalink raw reply
* Fix breakage caused by tlb flush batch changes
From: David Gibson @ 2007-04-18 6:19 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
BenH's commit a741e67969577163a4cfc78d7fd2753219087ef1 in powerpc.git,
although (AFAICT) only intended to affect ppc64, also has side-effects
which break 44x. I think 40x, 8xx and Freescale Book E are also
affected, though I haven't tested them.
The problem lies in unconditionally removing flush_tlb_pending() from
the versions of flush_tlb_mm(), flush_tlb_range() and
flush_tlb_kernel_range() used on ppc64 - which are also used the
embedded platforms mentioned above.
The patch below restores the necessary flushes and fixes the breakage
for 44x. They should also fix any breakage for the other platforms,
but again I haven't tested those.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Index: working-2.6/include/asm-powerpc/tlbflush.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/tlbflush.h 2007-04-18 15:45:12.000000000 +1000
+++ working-2.6/include/asm-powerpc/tlbflush.h 2007-04-18 15:55:21.000000000 +1000
@@ -104,6 +104,9 @@ extern void update_mmu_cache(struct vm_a
static inline void flush_tlb_mm(struct mm_struct *mm)
{
+#ifndef CONFIG_PPC64
+ flush_tlb_pending();
+#endif
}
static inline void flush_tlb_page(struct vm_area_struct *vma,
@@ -125,11 +128,17 @@ static inline void flush_tlb_page_nohash
static inline void flush_tlb_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end)
{
+#ifndef CONFIG_PPC64
+ flush_tlb_pending();
+#endif
}
static inline void flush_tlb_kernel_range(unsigned long start,
unsigned long end)
{
+#ifndef CONFIG_PPC64
+ flush_tlb_pending();
+#endif
}
#else /* 6xx, 7xx, 7xxx cpus */
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH] Emulate more instructions in software
From: Kumar Gala @ 2007-04-18 6:11 UTC (permalink / raw)
To: ananth; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <20070418055638.GA16650@in.ibm.com>
On Apr 18, 2007, at 12:56 AM, Ananth N Mavinakayanahalli wrote:
> Emulate a few more instructions in software - especially useful during
> singlestepping (xmon/kprobes).
>
> Instructions emulated with this patch are mfcr/mtcr rX, mfxer/mtxer
> rX,
> mflr/mtlr rX, mfctr/mtctr rX and mr rA,rB.
>
>
> Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
When do we actually need to emulate any of these instructions? I
don't see why single stepping would effect the ability to execute
these instructions.
- k
^ permalink raw reply
* Re: [PATCH 1/2] hvc_console polling mode timer backoff
From: Michael Ellerman @ 2007-04-18 6:09 UTC (permalink / raw)
To: will_schmidt; +Cc: ppcdev, Paul Mackerras
In-Reply-To: <1176821087.28514.145.camel@farscape.rchland.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 3068 bytes --]
On Tue, 2007-04-17 at 09:44 -0500, Will Schmidt wrote:
> Paulus, I think this is ready to go, please apply, thanks.
>
>
>
> Add a back-off mechanism to hvc_console's polling logic. This change
> drops the timers/second ratio from ~90 to ~1/2 while the console is
> idle.
> This change is most noticeable when watching /proc/timer_stats output.
>
> This only affects when the hvc_console is running in poll mode, i.e.
> power4 and cell systems.
>
> I've tested on Power4, Michael Ellerman has both contributed to the
> patch and tested on cell.
>
> Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com>
> cc: Michael Ellerman <michael@ellerman.id.au>
That should probably be:
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
cheers
> ---
> diff --git a/drivers/char/hvc_console.c b/drivers/char/hvc_console.c
> index a0a88aa..fc9bc77 100644
> --- a/drivers/char/hvc_console.c
> +++ b/drivers/char/hvc_console.c
> @@ -47,8 +47,6 @@ #include "hvc_console.h"
> #define HVC_MAJOR 229
> #define HVC_MINOR 0
>
> -#define TIMEOUT (10)
> -
> /*
> * Wait this long per iteration while trying to push buffered data to the
> * hypervisor before allowing the tty to complete a close operation.
> @@ -550,6 +548,18 @@ static int hvc_chars_in_buffer(struct tt
> return hp->n_outbuf;
> }
>
> +/*
> + * timeout will vary between the MIN and MAX values defined here. By default
> + * and during console activity we will use a default MIN_TIMEOUT of 10. When
> + * the console is idle, we increase the timeout value on each pass through
> + * msleep until we reach the max. This may be noticeable as a brief (average
> + * one second) delay on the console before the console responds to input when
> + * there has been no input for some time.
> + */
> +#define MIN_TIMEOUT (10)
> +#define MAX_TIMEOUT (2000)
> +static u32 timeout = MIN_TIMEOUT;
> +
> #define HVC_POLL_READ 0x00000001
> #define HVC_POLL_WRITE 0x00000002
>
> @@ -642,9 +652,14 @@ #endif /* CONFIG_MAGIC_SYSRQ */
> bail:
> spin_unlock_irqrestore(&hp->lock, flags);
>
> - if (read_total)
> + if (read_total) {
> + /* Activity is occurring, so reset the polling backoff value to
> + a minimum for performance. */
> + timeout = MIN_TIMEOUT;
> +
> tty_flip_buffer_push(tty);
> -
> + }
> +
> return poll_mask;
> }
>
> @@ -688,8 +703,12 @@ int khvcd(void *unused)
> if (!hvc_kicked) {
> if (poll_mask == 0)
> schedule();
> - else
> - msleep_interruptible(TIMEOUT);
> + else {
> + if (timeout < MAX_TIMEOUT)
> + timeout += (timeout >> 6) + 1;
> +
> + msleep_interruptible(timeout);
> + }
> }
> __set_current_state(TASK_RUNNING);
> } while (!kthread_should_stop());
>
>
>
>
--
Michael Ellerman
OzLabs, IBM Australia Development Lab
wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* [PATCH] [5/5] [v2] pasemi_mac: use local-mac-address
From: Olof Johansson @ 2007-04-18 6:27 UTC (permalink / raw)
To: jgarzik; +Cc: netdev, linuxppc-dev
In-Reply-To: <20070418062451.GA11308@lixom.net>
Use local-mac-address in the device tree instead. Fall back to mac-address
for older firmware.
Signed-off-by: Olof Johansson <olof@lixom.net>
Index: powerpc/drivers/net/pasemi_mac.c
===================================================================
--- powerpc.orig/drivers/net/pasemi_mac.c
+++ powerpc/drivers/net/pasemi_mac.c
@@ -74,7 +74,12 @@ static int pasemi_get_mac_addr(struct pa
return -ENOENT;
}
- maddr = get_property(dn, "mac-address", NULL);
+ maddr = get_property(dn, "local-mac-address", NULL);
+
+ /* Fall back to mac-address for older firmware */
+ if (maddr == NULL)
+ maddr = get_property(dn, "mac-address", NULL);
+
if (maddr == NULL) {
dev_warn(&pdev->dev,
"no mac address in device tree, not configuring\n");
^ permalink raw reply
* [PATCH] [4/5] [v2] pasemi_mac: phy support
From: Olof Johansson @ 2007-04-18 6:27 UTC (permalink / raw)
To: jgarzik; +Cc: netdev, linuxppc-dev
In-Reply-To: <20070418062451.GA11308@lixom.net>
PHY support for pasemi_mac. Also add msg_enable flags for future
disablement of the link messages.
Signed-off-by: Olof Johansson <olof@lixom.net>
Index: powerpc/drivers/net/pasemi_mac.c
===================================================================
--- powerpc.orig/drivers/net/pasemi_mac.c
+++ powerpc/drivers/net/pasemi_mac.c
@@ -594,6 +592,110 @@ static irqreturn_t pasemi_mac_tx_intr(in
return IRQ_HANDLED;
}
+static void pasemi_adjust_link(struct net_device *dev)
+{
+ struct pasemi_mac *mac = netdev_priv(dev);
+ int msg;
+ unsigned int flags;
+ unsigned int new_flags;
+
+ if (!mac->phydev->link) {
+ /* If no link, MAC speed settings don't matter. Just report
+ * link down and return.
+ */
+ if (mac->link && netif_msg_link(mac))
+ printk(KERN_INFO "%s: Link is down.\n", dev->name);
+
+ netif_carrier_off(dev);
+ mac->link = 0;
+
+ return;
+ } else
+ netif_carrier_on(dev);
+
+ pci_read_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, &flags);
+ new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M);
+
+ if (!mac->phydev->duplex)
+ new_flags |= PAS_MAC_CFG_PCFG_HD;
+
+ switch (mac->phydev->speed) {
+ case 1000:
+ new_flags |= PAS_MAC_CFG_PCFG_SPD_1G;
+ break;
+ case 100:
+ new_flags |= PAS_MAC_CFG_PCFG_SPD_100M;
+ break;
+ case 10:
+ new_flags |= PAS_MAC_CFG_PCFG_SPD_10M;
+ break;
+ default:
+ printk("Unsupported speed %d\n", mac->phydev->speed);
+ }
+
+ /* Print on link or speed/duplex change */
+ msg = mac->link != mac->phydev->link || flags != new_flags;
+
+ mac->duplex = mac->phydev->duplex;
+ mac->speed = mac->phydev->speed;
+ mac->link = mac->phydev->link;
+
+ if (new_flags != flags)
+ pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, new_flags);
+
+ if (msg && netif_msg_link(mac))
+ printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
+ dev->name, mac->speed, mac->duplex ? "full" : "half");
+}
+
+static int pasemi_mac_phy_init(struct net_device *dev)
+{
+ struct pasemi_mac *mac = netdev_priv(dev);
+ struct device_node *dn, *phy_dn;
+ struct phy_device *phydev;
+ unsigned int phy_id;
+ const phandle *ph;
+ const unsigned int *prop;
+ struct resource r;
+ int ret;
+
+ dn = pci_device_to_OF_node(mac->pdev);
+ ph = get_property(dn, "phy-handle", NULL);
+ if (!ph)
+ return -ENODEV;
+ phy_dn = of_find_node_by_phandle(*ph);
+
+ prop = get_property(phy_dn, "reg", NULL);
+ ret = of_address_to_resource(phy_dn->parent, 0, &r);
+ if (ret)
+ goto err;
+
+ phy_id = *prop;
+ snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
+
+ of_node_put(phy_dn);
+
+ mac->link = 0;
+ mac->speed = 0;
+ mac->duplex = -1;
+
+ phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
+
+ if (IS_ERR(phydev)) {
+ printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
+ return PTR_ERR(phydev);
+ }
+
+ mac->phydev = phydev;
+
+ return 0;
+
+err:
+ of_node_put(phy_dn);
+ return -ENODEV;
+}
+
+
static int pasemi_mac_open(struct net_device *dev)
{
struct pasemi_mac *mac = netdev_priv(dev);
@@ -667,6 +769,13 @@ static int pasemi_mac_open(struct net_de
pasemi_mac_replenish_rx_ring(dev);
+ ret = pasemi_mac_phy_init(dev);
+ /* Some configs don't have PHYs (XAUI etc), so don't complain about
+ * failed init due to -ENODEV.
+ */
+ if (ret && ret != -ENODEV)
+ dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
+
netif_start_queue(dev);
netif_poll_enable(dev);
@@ -697,6 +806,9 @@ static int pasemi_mac_open(struct net_de
goto out_rx_int;
}
+ if (mac->phydev)
+ phy_start(mac->phydev);
+
return 0;
out_rx_int:
@@ -720,6 +832,11 @@ static int pasemi_mac_close(struct net_d
unsigned int stat;
int retries;
+ if (mac->phydev) {
+ phy_stop(mac->phydev);
+ phy_disconnect(mac->phydev);
+ }
+
netif_stop_queue(dev);
/* Clean out any pending buffers */
@@ -1013,6 +1130,9 @@ pasemi_mac_probe(struct pci_dev *pdev, c
mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
+ /* Enable most messages by default */
+ mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
+
err = register_netdev(dev);
if (err) {
Index: powerpc/drivers/net/pasemi_mac.h
===================================================================
--- powerpc.orig/drivers/net/pasemi_mac.h
+++ powerpc/drivers/net/pasemi_mac.h
@@ -24,6 +24,7 @@
#include <linux/ethtool.h>
#include <linux/netdevice.h>
#include <linux/spinlock.h>
+#include <linux/phy.h>
struct pasemi_mac_txring {
spinlock_t lock;
@@ -54,6 +55,7 @@ struct pasemi_mac {
struct pci_dev *pdev;
struct pci_dev *dma_pdev;
struct pci_dev *iob_pdev;
+ struct phy_device *phydev;
struct net_device_stats stats;
/* Pointer to the cacheable per-channel status registers */
@@ -75,6 +77,12 @@ struct pasemi_mac {
struct pasemi_mac_rxring *rx;
unsigned long tx_irq;
unsigned long rx_irq;
+ int link;
+ int speed;
+ int duplex;
+
+ unsigned int msg_enable;
+ char phy_id[BUS_ID_SIZE];
};
/* Software status descriptor (desc_info) */
Index: powerpc/drivers/net/Kconfig
===================================================================
--- powerpc.orig/drivers/net/Kconfig
+++ powerpc/drivers/net/Kconfig
@@ -2490,6 +2490,7 @@ config NETXEN_NIC
config PASEMI_MAC
tristate "PA Semi 1/10Gbit MAC"
depends on PPC64 && PCI
+ select PHYLIB
help
This driver supports the on-chip 1/10Gbit Ethernet controller on
PA Semi's PWRficient line of chips.
^ permalink raw reply
* [PATCH] [3/5] [v2] pasemi_mac: cleanups and rx performance improvements
From: Olof Johansson @ 2007-04-18 6:26 UTC (permalink / raw)
To: jgarzik; +Cc: netdev, linuxppc-dev
In-Reply-To: <20070418062451.GA11308@lixom.net>
NAPI fixes and cleanups for pasemi_mac:
* Timer changes/fixes
* Abstract out the rx intr restart to a separate function
* Similar function for tx intr to reset to a known clear state even if
firmware used the same interface
* Add a copy-break and recycle the SKB in the driver for small
packets
* Other minor changes to rx path
Signed-off-by: Olof Johansson <olof@lixom.net>
Index: powerpc/drivers/net/pasemi_mac.c
===================================================================
--- powerpc.orig/drivers/net/pasemi_mac.c
+++ powerpc/drivers/net/pasemi_mac.c
@@ -61,12 +61,6 @@
#define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
-/* XXXOJN these should come out of the device tree some day */
-#define PAS_DMA_CAP_BASE 0xe00d0040
-#define PAS_DMA_CAP_SIZE 0x100
-#define PAS_DMA_COM_BASE 0xe00d0100
-#define PAS_DMA_COM_SIZE 0x100
-
static struct pasdma_status *dma_status;
static int pasemi_get_mac_addr(struct pasemi_mac *mac)
@@ -279,8 +273,8 @@ static void pasemi_mac_free_rx_resources
for (i = 0; i < RX_RING_SIZE; i++) {
info = &RX_DESC_INFO(mac, i);
dp = &RX_DESC(mac, i);
- if (info->dma) {
- if (info->skb) {
+ if (info->skb) {
+ if (info->dma) {
pci_unmap_single(mac->dma_pdev,
info->dma,
info->skb->len,
@@ -311,84 +305,122 @@ static void pasemi_mac_replenish_rx_ring
struct pasemi_mac *mac = netdev_priv(dev);
unsigned int i;
int start = mac->rx->next_to_fill;
- unsigned int count;
+ unsigned int limit, count;
- count = (mac->rx->next_to_clean + RX_RING_SIZE -
+ limit = (mac->rx->next_to_clean + RX_RING_SIZE -
mac->rx->next_to_fill) & (RX_RING_SIZE - 1);
/* Check to see if we're doing first-time setup */
if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
- count = RX_RING_SIZE;
+ limit = RX_RING_SIZE;
- if (count <= 0)
+ if (limit <= 0)
return;
- for (i = start; i < start + count; i++) {
+ i = start;
+
+ for (count = limit; count; count--) {
struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
u64 *buff = &RX_BUFF(mac, i);
struct sk_buff *skb;
dma_addr_t dma;
- skb = dev_alloc_skb(BUF_SIZE);
+ /* skb might still be in there for recycle on short receives */
+ if (info->skb)
+ skb = info->skb;
+ else
+ skb = dev_alloc_skb(BUF_SIZE);
- if (!skb) {
- count = i - start;
+ if (unlikely(!skb))
break;
- }
skb->dev = dev;
dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
PCI_DMA_FROMDEVICE);
- if (dma_mapping_error(dma)) {
+ if (unlikely(dma_mapping_error(dma))) {
dev_kfree_skb_irq(info->skb);
- count = i - start;
break;
}
info->skb = skb;
info->dma = dma;
*buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
+ i++;
}
wmb();
pci_write_config_dword(mac->dma_pdev,
PAS_DMA_RXCHAN_INCR(mac->dma_rxch),
- count);
+ limit - count);
pci_write_config_dword(mac->dma_pdev,
PAS_DMA_RXINT_INCR(mac->dma_if),
- count);
+ limit - count);
+
+ mac->rx->next_to_fill += limit - count;
+}
+
+static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
+{
+ unsigned int reg, stat;
+ /* Re-enable packet count interrupts: finally
+ * ack the packet count interrupt we got in rx_intr.
+ */
+
+ pci_read_config_dword(mac->iob_pdev,
+ PAS_IOB_DMA_RXCH_STAT(mac->dma_rxch),
+ &stat);
+
+ reg = PAS_IOB_DMA_RXCH_RESET_PCNT(stat & PAS_IOB_DMA_RXCH_STAT_CNTDEL_M) |
+ PAS_IOB_DMA_RXCH_RESET_PINTC;
+
+ pci_write_config_dword(mac->iob_pdev,
+ PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch),
+ reg);
+}
+
+static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
+{
+ unsigned int reg, stat;
- mac->rx->next_to_fill += count;
+ /* Re-enable packet count interrupts */
+ pci_read_config_dword(mac->iob_pdev,
+ PAS_IOB_DMA_TXCH_STAT(mac->dma_txch), &stat);
+
+ reg = PAS_IOB_DMA_TXCH_RESET_PCNT(stat & PAS_IOB_DMA_TXCH_STAT_CNTDEL_M) |
+ PAS_IOB_DMA_TXCH_RESET_PINTC;
+
+ pci_write_config_dword(mac->iob_pdev,
+ PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
}
+
static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
{
- unsigned int i;
- int start, count;
+ unsigned int n;
+ int count;
+ struct pas_dma_xct_descr *dp;
+ struct pasemi_mac_buffer *info;
+ struct sk_buff *skb;
+ unsigned int i, len;
+ u64 macrx;
+ dma_addr_t dma;
spin_lock(&mac->rx->lock);
- start = mac->rx->next_to_clean;
- count = 0;
-
- for (i = start; i < (start + RX_RING_SIZE) && count < limit; i++) {
- struct pas_dma_xct_descr *dp;
- struct pasemi_mac_buffer *info;
- struct sk_buff *skb;
- unsigned int j, len;
- dma_addr_t dma;
+ n = mac->rx->next_to_clean;
+ for (count = limit; count; count--) {
rmb();
- dp = &RX_DESC(mac, i);
+ dp = &RX_DESC(mac, n);
- if (!(dp->macrx & XCT_MACRX_O))
- break;
+ macrx = dp->macrx;
- count++;
+ if (!(macrx & XCT_MACRX_O))
+ break;
info = NULL;
@@ -400,29 +432,42 @@ static int pasemi_mac_clean_rx(struct pa
*/
dma = (dp->ptr & XCT_PTR_ADDR_M);
- for (j = start; j < (start + RX_RING_SIZE); j++) {
- info = &RX_DESC_INFO(mac, j);
+ for (i = n; i < (n + RX_RING_SIZE); i++) {
+ info = &RX_DESC_INFO(mac, i);
if (info->dma == dma)
break;
}
- BUG_ON(!info);
- BUG_ON(info->dma != dma);
+ skb = info->skb;
+ info->dma = 0;
- pci_unmap_single(mac->dma_pdev, info->dma, info->skb->len,
+ pci_unmap_single(mac->dma_pdev, dma, skb->len,
PCI_DMA_FROMDEVICE);
- skb = info->skb;
+ len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
- len = (dp->macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
+ if (len < 256) {
+ struct sk_buff *new_skb =
+ netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
+ if (new_skb) {
+ skb_reserve(new_skb, NET_IP_ALIGN);
+ memcpy(new_skb->data - NET_IP_ALIGN,
+ skb->data - NET_IP_ALIGN,
+ len + NET_IP_ALIGN);
+ /* save the skb in buffer_info as good */
+ skb = new_skb;
+ }
+ /* else just continue with the old one */
+ } else
+ info->skb = NULL;
skb_put(skb, len);
skb->protocol = eth_type_trans(skb, mac->netdev);
- if ((dp->macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK) {
+ if ((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK) {
skb->ip_summed = CHECKSUM_COMPLETE;
- skb->csum = (dp->macrx & XCT_MACRX_CSUM_M) >>
+ skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
XCT_MACRX_CSUM_S;
} else
skb->ip_summed = CHECKSUM_NONE;
@@ -432,13 +477,13 @@ static int pasemi_mac_clean_rx(struct pa
netif_receive_skb(skb);
- info->dma = 0;
- info->skb = NULL;
dp->ptr = 0;
dp->macrx = 0;
+
+ n++;
}
- mac->rx->next_to_clean += count;
+ mac->rx->next_to_clean += limit - count;
pasemi_mac_replenish_rx_ring(mac->netdev);
spin_unlock(&mac->rx->lock);
@@ -496,18 +541,28 @@ static irqreturn_t pasemi_mac_rx_intr(in
struct pasemi_mac *mac = netdev_priv(dev);
unsigned int reg;
- if (!(*mac->rx_status & PAS_STATUS_INT))
+ if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
return IRQ_NONE;
- netif_rx_schedule(dev);
- pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
- PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0));
+ if (*mac->rx_status & PAS_STATUS_ERROR)
+ printk("rx_status reported error\n");
- reg = PAS_IOB_DMA_RXCH_RESET_PINTC | PAS_IOB_DMA_RXCH_RESET_SINTC |
- PAS_IOB_DMA_RXCH_RESET_DINTC;
+ /* Don't reset packet count so it won't fire again but clear
+ * all others.
+ */
+
+ pci_read_config_dword(mac->dma_pdev, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), ®);
+
+ reg = 0;
+ if (*mac->rx_status & PAS_STATUS_SOFT)
+ reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
+ if (*mac->rx_status & PAS_STATUS_ERROR)
+ reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
if (*mac->rx_status & PAS_STATUS_TIMER)
reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
+ netif_rx_schedule(dev);
+
pci_write_config_dword(mac->iob_pdev,
PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
@@ -521,14 +576,17 @@ static irqreturn_t pasemi_mac_tx_intr(in
struct pasemi_mac *mac = netdev_priv(dev);
unsigned int reg;
- if (!(*mac->tx_status & PAS_STATUS_INT))
+ if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
return IRQ_NONE;
pasemi_mac_clean_tx(mac);
- reg = PAS_IOB_DMA_TXCH_RESET_PINTC | PAS_IOB_DMA_TXCH_RESET_SINTC;
- if (*mac->tx_status & PAS_STATUS_TIMER)
- reg |= PAS_IOB_DMA_TXCH_RESET_TINTC;
+ reg = PAS_IOB_DMA_TXCH_RESET_PINTC;
+
+ if (*mac->tx_status & PAS_STATUS_SOFT)
+ reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
+ if (*mac->tx_status & PAS_STATUS_ERROR)
+ reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch),
reg);
@@ -564,10 +622,18 @@ static int pasemi_mac_open(struct net_de
flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
- PAS_IOB_DMA_RXCH_CFG_CNTTH(30));
+ PAS_IOB_DMA_RXCH_CFG_CNTTH(1));
+
+ pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
+ PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
+ /* Clear out any residual packet count state from firmware */
+ pasemi_mac_restart_rx_intr(mac);
+ pasemi_mac_restart_tx_intr(mac);
+
+ /* 0xffffff is max value, about 16ms */
pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
- PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(1000000));
+ PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
pci_write_config_dword(mac->pdev, PAS_MAC_CFG_PCFG, flags);
@@ -586,7 +652,7 @@ static int pasemi_mac_open(struct net_de
/* enable rx if */
pci_write_config_dword(mac->dma_pdev,
PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
- PAS_DMA_RXINT_RCMDSTA_EN);
+ PAS_DMA_RXINT_RCMDSTA_EN|PAS_DMA_RXINT_RCMDSTA_MBT);
/* enable rx channel */
pci_write_config_dword(mac->dma_pdev,
@@ -836,18 +902,18 @@ static int pasemi_mac_poll(struct net_de
pkts = pasemi_mac_clean_rx(mac, limit);
+ dev->quota -= pkts;
+ *budget -= pkts;
+
if (pkts < limit) {
/* all done, no more packets present */
netif_rx_complete(dev);
- /* re-enable receive interrupts */
- pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_COM_TIMEOUTCFG,
- PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(1000000));
+ pasemi_mac_restart_rx_intr(mac);
+
return 0;
} else {
/* used up our quantum, so reschedule */
- dev->quota -= pkts;
- *budget -= pkts;
return 1;
}
}
Index: powerpc/drivers/net/pasemi_mac.h
===================================================================
--- powerpc.orig/drivers/net/pasemi_mac.h
+++ powerpc/drivers/net/pasemi_mac.h
@@ -195,11 +195,15 @@ enum {
#define PAS_DMA_RXINT_RCMDSTA(i) (0x200+(i)*_PAS_DMA_RXINT_STRIDE)
#define PAS_DMA_RXINT_RCMDSTA_EN 0x00000001
#define PAS_DMA_RXINT_RCMDSTA_ST 0x00000002
-#define PAS_DMA_RXINT_RCMDSTA_OO 0x00000100
-#define PAS_DMA_RXINT_RCMDSTA_BP 0x00000200
-#define PAS_DMA_RXINT_RCMDSTA_DR 0x00000400
+#define PAS_DMA_RXINT_RCMDSTA_MBT 0x00000008
+#define PAS_DMA_RXINT_RCMDSTA_MDR 0x00000010
+#define PAS_DMA_RXINT_RCMDSTA_MOO 0x00000020
+#define PAS_DMA_RXINT_RCMDSTA_MBP 0x00000040
#define PAS_DMA_RXINT_RCMDSTA_BT 0x00000800
-#define PAS_DMA_RXINT_RCMDSTA_TB 0x00001000
+#define PAS_DMA_RXINT_RCMDSTA_DR 0x00001000
+#define PAS_DMA_RXINT_RCMDSTA_OO 0x00002000
+#define PAS_DMA_RXINT_RCMDSTA_BP 0x00004000
+#define PAS_DMA_RXINT_RCMDSTA_TB 0x00008000
#define PAS_DMA_RXINT_RCMDSTA_ACT 0x00010000
#define PAS_DMA_RXINT_RCMDSTA_DROPS_M 0xfffe0000
#define PAS_DMA_RXINT_RCMDSTA_DROPS_S 17
@@ -299,6 +303,7 @@ enum {
#define PAS_STATUS_DCNT_S 16
#define PAS_STATUS_BPCNT_M 0x0000ffff00000000ull
#define PAS_STATUS_BPCNT_S 32
+#define PAS_STATUS_CAUSE_M 0xf000000000000000ull
#define PAS_STATUS_TIMER 0x1000000000000000ull
#define PAS_STATUS_ERROR 0x2000000000000000ull
#define PAS_STATUS_SOFT 0x4000000000000000ull
^ permalink raw reply
* [PATCH] [2/5] [v2] pasemi_mac: irq mapping changes
From: Olof Johansson @ 2007-04-18 6:25 UTC (permalink / raw)
To: jgarzik; +Cc: netdev, linuxppc-dev
In-Reply-To: <20070418062451.GA11308@lixom.net>
Fixes for ethernet IRQ mapping, to be done in the driver instead of in
the platform setup code.
Signed-off-by: Olof Johansson <olof@lixom.net>
Index: powerpc/arch/powerpc/platforms/pasemi/pci.c
===================================================================
--- powerpc.orig/arch/powerpc/platforms/pasemi/pci.c
+++ powerpc/arch/powerpc/platforms/pasemi/pci.c
@@ -163,19 +163,6 @@ static void __init pas_fixup_phb_resourc
}
-void __devinit pas_pci_irq_fixup(struct pci_dev *dev)
-{
- /* DMA is special, 84 interrupts (128 -> 211), all but 128
- * need to be mapped by hand here.
- */
- if (dev->vendor == 0x1959 && dev->device == 0xa007) {
- int i;
- for (i = 129; i < 212; i++)
- irq_create_mapping(NULL, i);
- }
-}
-
-
void __init pas_pci_init(void)
{
struct device_node *np, *root;
Index: powerpc/arch/powerpc/platforms/pasemi/setup.c
===================================================================
--- powerpc.orig/arch/powerpc/platforms/pasemi/setup.c
+++ powerpc/arch/powerpc/platforms/pasemi/setup.c
@@ -240,5 +240,4 @@ define_machine(pas) {
.check_legacy_ioport = pas_check_legacy_ioport,
.progress = pas_progress,
.machine_check_exception = pas_machine_check_handler,
- .pci_irq_fixup = pas_pci_irq_fixup,
};
Index: powerpc/drivers/net/pasemi_mac.c
===================================================================
--- powerpc.orig/drivers/net/pasemi_mac.c
+++ powerpc/drivers/net/pasemi_mac.c
@@ -33,6 +33,8 @@
#include <linux/tcp.h>
#include <net/checksum.h>
+#include <asm/irq.h>
+
#include "pasemi_mac.h"
@@ -537,6 +539,7 @@ static irqreturn_t pasemi_mac_tx_intr(in
static int pasemi_mac_open(struct net_device *dev)
{
struct pasemi_mac *mac = netdev_priv(dev);
+ int base_irq;
unsigned int flags;
int ret;
@@ -600,28 +603,37 @@ static int pasemi_mac_open(struct net_de
netif_start_queue(dev);
netif_poll_enable(dev);
- ret = request_irq(mac->dma_pdev->irq + mac->dma_txch,
- &pasemi_mac_tx_intr, IRQF_DISABLED,
+ /* Interrupts are a bit different for our DMA controller: While
+ * it's got one a regular PCI device header, the interrupt there
+ * is really the base of the range it's using. Each tx and rx
+ * channel has it's own interrupt source.
+ */
+
+ base_irq = virq_to_hw(mac->dma_pdev->irq);
+
+ mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
+ mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
+
+ ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
mac->tx->irq_name, dev);
if (ret) {
dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
- mac->dma_pdev->irq + mac->dma_txch, ret);
+ base_irq + mac->dma_txch, ret);
goto out_tx_int;
}
- ret = request_irq(mac->dma_pdev->irq + 20 + mac->dma_rxch,
- &pasemi_mac_rx_intr, IRQF_DISABLED,
+ ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
mac->rx->irq_name, dev);
if (ret) {
dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
- mac->dma_pdev->irq + 20 + mac->dma_rxch, ret);
+ base_irq + 20 + mac->dma_rxch, ret);
goto out_rx_int;
}
return 0;
out_rx_int:
- free_irq(mac->dma_pdev->irq + mac->dma_txch, dev);
+ free_irq(mac->tx_irq, dev);
out_tx_int:
netif_poll_disable(dev);
netif_stop_queue(dev);
@@ -705,8 +717,8 @@ static int pasemi_mac_close(struct net_d
pci_write_config_dword(mac->dma_pdev,
PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
- free_irq(mac->dma_pdev->irq + mac->dma_txch, dev);
- free_irq(mac->dma_pdev->irq + 20 + mac->dma_rxch, dev);
+ free_irq(mac->tx_irq, dev);
+ free_irq(mac->rx_irq, dev);
/* Free resources */
pasemi_mac_free_rx_resources(dev);
Index: powerpc/drivers/net/pasemi_mac.h
===================================================================
--- powerpc.orig/drivers/net/pasemi_mac.h
+++ powerpc/drivers/net/pasemi_mac.h
@@ -73,6 +73,8 @@ struct pasemi_mac {
struct pasemi_mac_txring *tx;
struct pasemi_mac_rxring *rx;
+ unsigned long tx_irq;
+ unsigned long rx_irq;
};
/* Software status descriptor (desc_info) */
^ permalink raw reply
* [PATCH] [0/5] [v2] pasemi_mac: minor bugfixes
From: Olof Johansson @ 2007-04-18 6:25 UTC (permalink / raw)
To: jgarzik; +Cc: netdev, linuxppc-dev
In-Reply-To: <20070418062451.GA11308@lixom.net>
Ethernet bugfixes:
* Move the was_full/wake_queue logic from tx_intr to clean_tx
* Fix polarity in checks in pasemi_mac_close
Signed-off-by: Olof Johansson <olof@lixom.net>
Index: linux-2.6/drivers/net/pasemi_mac.c
===================================================================
--- linux-2.6.orig/drivers/net/pasemi_mac.c
+++ linux-2.6/drivers/net/pasemi_mac.c
@@ -451,9 +451,12 @@ static int pasemi_mac_clean_tx(struct pa
struct pas_dma_xct_descr *dp;
int start, count;
int flags;
+ int was_full;
spin_lock_irqsave(&mac->tx->lock, flags);
+ was_full = mac->tx->next_to_clean - mac->tx->next_to_use == TX_RING_SIZE;
+
start = mac->tx->next_to_clean;
count = 0;
@@ -478,6 +481,9 @@ static int pasemi_mac_clean_tx(struct pa
mac->tx->next_to_clean += count;
spin_unlock_irqrestore(&mac->tx->lock, flags);
+ if (was_full)
+ netif_wake_queue(mac->netdev);
+
return count;
}
@@ -512,9 +518,6 @@ static irqreturn_t pasemi_mac_tx_intr(in
struct net_device *dev = data;
struct pasemi_mac *mac = netdev_priv(dev);
unsigned int reg;
- int was_full;
-
- was_full = mac->tx->next_to_clean - mac->tx->next_to_use == TX_RING_SIZE;
if (!(*mac->tx_status & PAS_STATUS_INT))
return IRQ_NONE;
@@ -528,9 +531,6 @@ static irqreturn_t pasemi_mac_tx_intr(in
pci_write_config_dword(mac->iob_pdev, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch),
reg);
- if (was_full)
- netif_wake_queue(dev);
-
return IRQ_HANDLED;
}
@@ -662,40 +665,37 @@ static int pasemi_mac_close(struct net_d
pci_read_config_dword(mac->dma_pdev,
PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
&stat);
- if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
+ if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
break;
cond_resched();
}
- if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)) {
+ if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
- }
for (retries = 0; retries < MAX_RETRIES; retries++) {
pci_read_config_dword(mac->dma_pdev,
PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
&stat);
- if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
+ if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
break;
cond_resched();
}
- if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)) {
+ if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
- }
for (retries = 0; retries < MAX_RETRIES; retries++) {
pci_read_config_dword(mac->dma_pdev,
PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
&stat);
- if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
+ if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
break;
cond_resched();
}
- if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT)) {
+ if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
- }
/* Then, disable the channel. This must be done separately from
* stopping, since you can't disable when active.
^ permalink raw reply
* [PATCH] [0/5] [v2] pasemi_mac: fixes and enhancements
From: Olof Johansson @ 2007-04-18 6:24 UTC (permalink / raw)
To: jgarzik; +Cc: netdev, linuxppc-dev
In-Reply-To: <20070416061654.GB19783@lixom.net>
Hi,
The five following patches contain a number of fixes and improvements
of the pasemi_mac driver:
1/5: A couple of minor bugfixes.
2/5: Move the IRQ mapping from the PCI layer under our platform, to
the driver.
3/5: A rather large patch with various NAPI/performance-related fixes
and enhancements.
4/5: phy support
5/5: use local-mac-address instead of mac-address if available.
(Changes from last time: Added 5/5, changes to 2/5 to use virq_to_hw()).
-Olof
^ permalink raw reply
* [PATCH] kprobes: eliminate sstep exception if instruction can be emulated
From: Ananth N Mavinakayanahalli @ 2007-04-18 5:57 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
For cases when probes are placed on instructions that can be emulated,
don't take the single-step exception.
Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
---
arch/powerpc/kernel/kprobes.c | 36 +++++++++++++++++++++++++++++++++++-
include/asm-powerpc/kprobes.h | 5 +++++
2 files changed, 40 insertions(+), 1 deletion(-)
Index: linux-2.6.21-rc7/arch/powerpc/kernel/kprobes.c
===================================================================
--- linux-2.6.21-rc7.orig/arch/powerpc/kernel/kprobes.c
+++ linux-2.6.21-rc7/arch/powerpc/kernel/kprobes.c
@@ -59,12 +59,14 @@ int __kprobes arch_prepare_kprobe(struct
}
if (!ret) {
- memcpy(p->ainsn.insn, p->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t));
+ memcpy(p->ainsn.insn, p->addr,
+ MAX_INSN_SIZE * sizeof(kprobe_opcode_t));
p->opcode = *p->addr;
flush_icache_range((unsigned long)p->ainsn.insn,
(unsigned long)p->ainsn.insn + sizeof(kprobe_opcode_t));
}
+ p->ainsn.boostable = 0;
return ret;
}
@@ -232,6 +234,38 @@ static int __kprobes kprobe_handler(stru
return 1;
ss_probe:
+ if (p->ainsn.boostable >= 0) {
+ unsigned int insn = *p->ainsn.insn;
+
+ /* regs->nip is also adjusted if emulate_step returns 1 */
+ ret = emulate_step(regs, insn);
+ if (ret > 0) {
+ /*
+ * Once this instruction has been boosted
+ * successfully, set the boostable flag
+ */
+ if (unlikely(p->ainsn.boostable == 0))
+ p->ainsn.boostable = 1;
+
+ if (p->post_handler)
+ p->post_handler(p, regs, 0);
+
+ kcb->kprobe_status = KPROBE_HIT_SSDONE;
+ reset_current_kprobe();
+ preempt_enable_no_resched();
+ return 1;
+ } else if (ret < 0) {
+ /*
+ * We don't allow kprobes on mtmsr(d)/rfi(d), etc.
+ * So, we should never get here... but, its still
+ * good to catch them, just in case...
+ */
+ printk("Can't step on instruction %x\n", insn);
+ BUG();
+ } else if (ret == 0)
+ /* This instruction can't be boosted */
+ p->ainsn.boostable = -1;
+ }
prepare_singlestep(p, regs);
kcb->kprobe_status = KPROBE_HIT_SS;
return 1;
Index: linux-2.6.21-rc7/include/asm-powerpc/kprobes.h
===================================================================
--- linux-2.6.21-rc7.orig/include/asm-powerpc/kprobes.h
+++ linux-2.6.21-rc7/include/asm-powerpc/kprobes.h
@@ -87,6 +87,11 @@ extern void arch_remove_kprobe(struct kp
struct arch_specific_insn {
/* copy of original instruction */
kprobe_opcode_t *insn;
+ /*
+ * Set in kprobes code, initially to 0. If the instruction can be
+ * eumulated, this is set to 1, if not, to -1.
+ */
+ int boostable;
};
struct prev_kprobe {
^ permalink raw reply
* [PATCH] Emulate more instructions in software
From: Ananth N Mavinakayanahalli @ 2007-04-18 5:56 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Emulate a few more instructions in software - especially useful during
singlestepping (xmon/kprobes).
Instructions emulated with this patch are mfcr/mtcr rX, mfxer/mtxer rX,
mflr/mtlr rX, mfctr/mtctr rX and mr rA,rB.
Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
---
arch/powerpc/lib/sstep.c | 45 ++++++++++++++++++++++++++++++++++++++++++++-
1 files changed, 44 insertions(+), 1 deletion(-)
Index: linux-2.6.21-rc7/arch/powerpc/lib/sstep.c
===================================================================
--- linux-2.6.21-rc7.orig/arch/powerpc/lib/sstep.c
+++ linux-2.6.21-rc7/arch/powerpc/lib/sstep.c
@@ -54,7 +54,7 @@ static int __kprobes branch_taken(unsign
*/
int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
{
- unsigned int opcode, rd;
+ unsigned int opcode, rs, rb, rd, spr;
unsigned long int imm;
opcode = instr >> 26;
@@ -152,6 +152,49 @@ int __kprobes emulate_step(struct pt_reg
regs->nip &= 0xffffffffUL;
return 1;
#endif
+ case 0x26: /* mfcr */
+ regs->gpr[rd] = regs->ccr;
+ regs->gpr[rd] &= 0xffffffffUL;
+ goto mtspr_out;
+ case 0x2a6: /* mfspr */
+ spr = (instr >> 11) & 0x3ff;
+ switch (spr) {
+ case 0x20: /* mfxer */
+ regs->gpr[rd] = regs->xer;
+ regs->gpr[rd] &= 0xffffffffUL;
+ goto mtspr_out;
+ case 0x100: /* mflr */
+ regs->gpr[rd] = regs->link;
+ goto mtspr_out;
+ case 0x120: /* mfctr */
+ regs->gpr[rd] = regs->ctr;
+ goto mtspr_out;
+ }
+ break;
+ case 0x378: /* orx */
+ rs = (instr >> 21) & 0x1f;
+ rb = (instr >> 11) & 0x1f;
+ if (rs == rb) { /* mr */
+ rd = (instr >> 16) & 0x1f;
+ regs->gpr[rd] = regs->gpr[rs];
+ goto mtspr_out;
+ }
+ break;
+ case 0x3a6: /* mtspr */
+ spr = (instr >> 11) & 0x3ff;
+ switch (spr) {
+ case 0x20: /* mtxer */
+ regs->xer = (regs->gpr[rd] & 0xffffffffUL);
+ goto mtspr_out;
+ case 0x100: /* mtlr */
+ regs->link = regs->gpr[rd];
+ goto mtspr_out;
+ case 0x120: /* mtctr */
+ regs->ctr = regs->gpr[rd];
+mtspr_out:
+ regs->nip += 4;
+ return 1;
+ }
}
}
return 0;
^ permalink raw reply
* ramdisk - machine check exception
From: Siva Prasad @ 2007-04-18 4:15 UTC (permalink / raw)
To: linuxppc-dev, linuxppc-embedded
Hi,
I am getting Machine Check exception due to the following scenario.
I am trying to use ramdisk for the file system with physical memory from
0x40000000 (instead of the regular 0x00000000). Of course this starts
the run_init_process with ramdisk_execute_command ("/init"). This
eventually calls load_elf_binary -> padzero -> __clear_user(addr, size).
This addr value for __clear_user came in as 0x101b2f98, accessing which
I got the exception.
Now my question is, why am I getting 0x101b2f98. I tried to do some
research and found that this is coming from elf_phdata->p_vaddr
(0x10000000) from routine load_elf_binary. This just kernel_read's from
file pointer of "/init", which I don't completely understand. Shouldn't
this value be greater than 0xc0000000. Where is this value coming from?
Also I don't understand how this would work even in regular memory
systems starting at 0x00000000, as MMU is enabled and mapped to
0xc0000000.
Appreciate any help.
Thanks
Siva
^ permalink raw reply
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