* Re: [PATCH 10/10] zImage wrapper for Ebony
From: Scott Wood @ 2007-04-18 16:14 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070418063626.E6AADDDE3B@ozlabs.org>
On Wed, Apr 18, 2007 at 04:36:26PM +1000, David Gibson wrote:
> Index: working-2.6/arch/powerpc/boot/wrapper
> ===================================================================
> --- working-2.6.orig/arch/powerpc/boot/wrapper 2007-04-18 14:40:39.000000000 +1000
> +++ working-2.6/arch/powerpc/boot/wrapper 2007-04-18 14:42:58.000000000 +1000
> @@ -141,6 +141,12 @@ miboot|uboot)
> ksection=image
> isection=initrd
> ;;
> +*-tree)
> + platformo=$object/"${platform%%-tree}".o
> + ;;
> +*-uboot)
> + platformo=$object/"${platform%%-uboot}".o
> + ;;
> esac
Perhaps we should have separate platform file and image type arguments,
so the wrapper doesn't have to do this sort of manipulation?
> +*-uboot)
> + mv "$ofile" "$ofile.elf"
> + version=`${CROSS}strings "$kernel" | grep '^Linux version [-0-9.]' | \
> + cut -d' ' -f3`
> + if [ -n "$version" ]; then
> + version="-n Linux-$version"
> + fi
> + entry=`objdump -f "$ofile.elf" | grep '^start address ' | \
> + cut -d' ' -f3`
Should be ${CROSS}objdump. Plus, it'd be nice to factor out the version
and entry determination so that it isn't repeated for each image type
(the cuImage patch does this for version).
-Scott
^ permalink raw reply
* Re: [PATCH] Emulate more instructions in software
From: Kumar Gala @ 2007-04-18 16:23 UTC (permalink / raw)
To: ananth; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <20070418071349.GA11729@in.ibm.com>
On Apr 18, 2007, at 2:13 AM, Ananth N Mavinakayanahalli wrote:
> On Wed, Apr 18, 2007 at 01:11:00AM -0500, Kumar Gala wrote:
>>
>> On Apr 18, 2007, at 12:56 AM, Ananth N Mavinakayanahalli wrote:
>>
>>> Emulate a few more instructions in software - especially useful
>>> during
>>> singlestepping (xmon/kprobes).
>>>
>>> Instructions emulated with this patch are mfcr/mtcr rX, mfxer/mtxer
>>> rX,
>>> mflr/mtlr rX, mfctr/mtctr rX and mr rA,rB.
>>>
>>>
>>> Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
>>
>> When do we actually need to emulate any of these instructions? I
>> don't see why single stepping would effect the ability to execute
>> these instructions.
>
> In cases when these instructions are kprobed, it'd be possible to
> eliminate the single step exception as we can emulate them.
>
> Most usecases of kprobes are at function entry and in most cases, the
> instruction at function entry is mflr r0, which can be emulated. So
> you
> can get rid of one exception and get a nice speedup too. My other
> patch
> did just this.
Makes sense, how about wrapping the emulation of those instructions
in a #if defined(CONFIG_KPROBES) || defined(CONFIG_XMON). Plus
adding a comment about these instructions just be emulated for
singlestepping performance and not because they are missing on some
platform.
Also, do you really see that many mfxer/mtxer. I'd expect them to be
rare.
- k
^ permalink raw reply
* Re: [PATCH] Emulate more instructions in software
From: Kumar Gala @ 2007-04-18 16:25 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <AABC623A-916D-4522-8119-9C1D8A22722A@kernel.crashing.org>
On Apr 18, 2007, at 11:23 AM, Kumar Gala wrote:
>
> On Apr 18, 2007, at 2:13 AM, Ananth N Mavinakayanahalli wrote:
>
>> On Wed, Apr 18, 2007 at 01:11:00AM -0500, Kumar Gala wrote:
>>>
>>> On Apr 18, 2007, at 12:56 AM, Ananth N Mavinakayanahalli wrote:
>>>
>>>> Emulate a few more instructions in software - especially useful
>>>> during
>>>> singlestepping (xmon/kprobes).
>>>>
>>>> Instructions emulated with this patch are mfcr/mtcr rX, mfxer/mtxer
>>>> rX,
>>>> mflr/mtlr rX, mfctr/mtctr rX and mr rA,rB.
>>>>
>>>>
>>>> Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
>>>
>>> When do we actually need to emulate any of these instructions? I
>>> don't see why single stepping would effect the ability to execute
>>> these instructions.
>>
>> In cases when these instructions are kprobed, it'd be possible to
>> eliminate the single step exception as we can emulate them.
>>
>> Most usecases of kprobes are at function entry and in most cases, the
>> instruction at function entry is mflr r0, which can be emulated. So
>> you
>> can get rid of one exception and get a nice speedup too. My other
>> patch
>> did just this.
>
> Makes sense, how about wrapping the emulation of those instructions
> in a #if defined(CONFIG_KPROBES) || defined(CONFIG_XMON). Plus
> adding a comment about these instructions just be emulated for
> singlestepping performance and not because they are missing on some
> platform.
Ignore this, I see this code is in lib/sstep.c not the main emulation
path.
> Also, do you really see that many mfxer/mtxer. I'd expect them to be
> rare.
>
> - k
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* Re: [PATCH 1/2] hvc_console polling mode timer backoff
From: Linas Vepstas @ 2007-04-18 19:22 UTC (permalink / raw)
To: Will Schmidt; +Cc: ppcdev, Paul Mackerras
In-Reply-To: <1176821087.28514.145.camel@farscape.rchland.ibm.com>
On Tue, Apr 17, 2007 at 09:44:46AM -0500, Will Schmidt wrote:
>
> Add a back-off mechanism to hvc_console's polling logic. This change
Acked-by: Linas Vepstas <linas@austin.ibm.com>
--linas
^ permalink raw reply
* Re: [PATCH 1/4 v2] powerpc: document max-speed and interface-type properties
From: Kim Phillips @ 2007-04-18 21:48 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: linuxppc-dev
In-Reply-To: <524e7cf7aec7be8289ab2f99df8a0776@kernel.crashing.org>
On Wed, 18 Apr 2007 12:34:27 +0200
Segher Boessenkool <segher@kernel.crashing.org> wrote:
> >>> sorry, I disagree; for me, a compatible entry in the PHY node would
> >>> look
> >>> something like "marvell"
> >>
> >> which would be completely wrong
> >>
> > that depends on what degree the manufacturer's PHYs are compatible.
>
> No, if all there PHYs are compatible (and you have some
> guarantee that all there future PHYs will be as well!)
> it should read "marvell-phy" (or better, "MRVL,ethernet-phy"
> or something similar).
>
> >>> or "m88e11x1".
> >>
> >> It should be something like "m88e11x1\0m88e1xxx\0rgmii" instead.
> >
> > m88e11x1 implies rgmii, including all the other interfaces the PHY
> > supports (gmii, mii, tbi, etc.).
>
> If you don't put the less-specific entries there, only clients
> (OSes) that know about the exact name can use that PHY. So if
> there is a minor upgrade of you board and it has a m88e11x2
> instead, your OS needs an update to work with your new device
> tree. Not an ideal situation.
>
> > ..but I'm not interested in specifying what interfaces the PHY
> > supports.
>
> But you *have* to. The device tree describes the hardware,
> it is not a configuration file for Linux to use as it sees fit.
not for the purposes of this patch; ucc_geth passes interface_type, a
property of the board describing the connection between the MAC and PHY
(not a list of what connection types the PHY is capable of) to the
phylib, and the phylib is left to probe, identify, and configure the PHY
appropriately.
>
> >>>> max-speed of connection = min(max-speed of enet, max-speed
> >>>> of PHY) -- and both of those are implied by their respective
> >>>> "compatible" properties.
> >>>
> >>> Again, max-speed is exclusively for configuring the UCC itself,
> >>> regardless of the connection speed.
> >>
> >> If that is really true, and the value of that property
> >> has nothing to do with the MAC<->PHY data channel, it should
> >> have a different (not that generic) name.
> >
> > can you elaborate on why, including an example of what you'd think
> > would
> > be a better one?
>
> Very generic names should only be used by very generic bindings.
it's intentionally generic; UCCs are Universal Communications
Controllers and implement many communications protocols.
> If a very specific device binding (like yours) uses a property
> name like that, there is a high chance it will clash with a more
> generic binding it uses (PCI, ethernet, network, ...) -- perhaps
> with a *future* version of such a binding.
>
I'm sure future versions will be able to adjust accordingly :)
> Also, it isn't a great name /an sich/: "max-speed" -- maximum
> speed of what?
>
? it's fine - it's in the context of a communications device.
Can you come up with something better?
Kim
^ permalink raw reply
* Re: [PATCH: dtc] Improve -S handling
From: David Gibson @ 2007-04-19 0:18 UTC (permalink / raw)
To: Jerry Van Baren; +Cc: linuxppc-dev, jdl, Jerry Van Baren
In-Reply-To: <46260EB6.6010506@smiths-aerospace.com>
On Wed, Apr 18, 2007 at 08:27:34AM -0400, Jerry Van Baren wrote:
> David Gibson wrote:
> > On Wed, Apr 18, 2007 at 01:05:28PM +1000, David Gibson wrote:
> >> On Tue, Apr 17, 2007 at 10:05:35PM -0400, Jerry Van Baren wrote:
> >>> If the user requests extra space, pad out the blob (previously the unused
> >>> data was undefined).
> >>>
> >>> Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
> >>> ---
> >>>
> >>> Hi Jon, David, Milton,
> >>>
> >>> This improves the -S option to pad out the blob with zeros when the user
> >>> asks for extra space.
> >> Comment below
> >>> diff --git a/flattree.c b/flattree.c
> >>> index 151d16e..d2ee0dc 100644
> >>> --- a/flattree.c
> >>> +++ b/flattree.c
> >>> @@ -310,6 +310,7 @@ static struct data flatten_reserve_list(struct reserve_info *reservelist,
> >>>
> >>> return d;
> >>> }
> >>> +
> >>> static void make_bph(struct boot_param_header *bph,
> >>> struct version_info *vi,
> >>> int reservesize, int dtsize, int strsize,
> >>> @@ -358,12 +359,15 @@ void dt_to_blob(FILE *f, struct boot_info *bi, int version,
> >>> {
> >>> struct version_info *vi = NULL;
> >>> int i;
> >>> + int size;
> >>> struct data dtbuf = empty_data;
> >>> struct data strbuf = empty_data;
> >>> struct data reservebuf;
> >>> struct boot_param_header bph;
> >>> struct reserve_entry termre = {.address = 0, .size = 0};
> >>>
> >>> + size = 0;
> >>> +
> >
> > Oh, also, you shouldn't need this new variable to track the size.
> > Just use whatever expression we used to use for totalsize before we
> > forced it out to the minimum size.
>
> It was simpler that way. Much simpler. With the calculated version, I
> had to know the header size and re-calculate all the alignment gaps.
> Ugly and nasty (respectively and collectively).
Hrm.. but we already did all that calculation in make_bph().
Here's a revised idea: with -S, instead of overriding the totalsize
header field directly in make_bph(), instead revert that function to
always computing the "natural minimum" size of the blob. Then do the
-S handling in dt_to_blob() instead: compute the number of padding
bytes necessary from make_bph()'s totalsize value, then overwrite the
totalsize field with the expanded value.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH 10/10] zImage wrapper for Ebony
From: David Gibson @ 2007-04-19 1:13 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20070418161441.GA8129@ld0162-tx32.am.freescale.net>
On Wed, Apr 18, 2007 at 11:14:41AM -0500, Scott Wood wrote:
> On Wed, Apr 18, 2007 at 04:36:26PM +1000, David Gibson wrote:
> > Index: working-2.6/arch/powerpc/boot/wrapper
> > ===================================================================
> > --- working-2.6.orig/arch/powerpc/boot/wrapper 2007-04-18 14:40:39.000000000 +1000
> > +++ working-2.6/arch/powerpc/boot/wrapper 2007-04-18 14:42:58.000000000 +1000
> > @@ -141,6 +141,12 @@ miboot|uboot)
> > ksection=image
> > isection=initrd
> > ;;
> > +*-tree)
> > + platformo=$object/"${platform%%-tree}".o
> > + ;;
> > +*-uboot)
> > + platformo=$object/"${platform%%-uboot}".o
> > + ;;
> > esac
>
> Perhaps we should have separate platform file and image type arguments,
> so the wrapper doesn't have to do this sort of manipulation?
Well, yes. That was kind of what I was getting at in my long message
about there being 3 parameters to the wrapping process. However,
because the platform and image type are a long way from orthogonal
parameters, it's not immediately obvious how to implement such a
scheme well.
> > +*-uboot)
> > + mv "$ofile" "$ofile.elf"
> > + version=`${CROSS}strings "$kernel" | grep '^Linux version [-0-9.]' | \
> > + cut -d' ' -f3`
> > + if [ -n "$version" ]; then
> > + version="-n Linux-$version"
> > + fi
> > + entry=`objdump -f "$ofile.elf" | grep '^start address ' | \
> > + cut -d' ' -f3`
>
> Should be ${CROSS}objdump. Plus, it'd be nice to factor out the version
> and entry determination so that it isn't repeated for each image type
> (the cuImage patch does this for version).
Ah, yes done. The lack of ${CROSS} came from the pmaccoff handling,
which also has this error.
Revised patch below:
zImage wrapper for Ebony
This patch adds support for building a zImage wrapper suitable for the
Ebony (440GP) evaluation board. This supports booting both from uboot
(old versions which don't supply a flattened device tree) and IBM
Openbios (aka "treeboot").
Signed-off-by: David Gibson <dwg@au1.ibm.com>
Index: working-2.6/arch/powerpc/boot/Makefile
===================================================================
--- working-2.6.orig/arch/powerpc/boot/Makefile 2007-04-19 10:59:58.000000000 +1000
+++ working-2.6/arch/powerpc/boot/Makefile 2007-04-19 10:59:58.000000000 +1000
@@ -43,7 +43,7 @@ $(addprefix $(obj)/,$(zlib) main.o): $(a
src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
ns16550.c serial.c simple_alloc.c div64.S util.S \
gunzip_util.c elf_util.c $(zlib) devtree.c
-src-plat := of.c
+src-plat := of.c ebony.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -95,6 +95,12 @@ $(patsubst %.S,%.o, $(filter %.S, $(src-
$(obj)/wrapper.a: $(obj-wlib) FORCE
$(call if_changed,bootar)
+quiet_cmd_dtc = DTC $@
+ cmd_dtc = $(dtc) -O dtb -o $@ -b 0 -V 16 $<
+
+$(obj)/%.dtb: $(srctree)/$(src)/dts/%.dts
+ $(call if_changed,dtc)
+
hostprogs-y := addnote addRamDisk hack-coff mktree
targets += $(patsubst $(obj)/%,%,$(obj-boot) wrapper.a)
@@ -105,6 +111,8 @@ wrapper :=$(srctree)/$(src)/wrapper
wrapperbits := $(extra-y) $(addprefix $(obj)/,addnote hack-coff mktree) \
$(wrapper) FORCE
+dtc := dtc
+
#############
# Bits for building various flavours of zImage
@@ -129,6 +137,7 @@ image-$(CONFIG_PPC_CELLEB) += zImage.ps
image-$(CONFIG_PPC_CHRP) += zImage.chrp
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
image-$(CONFIG_PPC_PMAC) += zImage.pmac
+image-$(CONFIG_EBONY) += zImage.ebony-elf zImage.ebony uImage.ebony
image-$(CONFIG_DEFAULT_UIMAGE) += uImage
# For 32-bit powermacs, build the COFF and miboot images
@@ -159,6 +168,21 @@ $(obj)/zImage.ps3: vmlinux
$(obj)/zImage.initrd.ps3: vmlinux
@echo " WARNING zImage.initrd.ps3 not supported (yet)"
+$(obj)/zImage.ebony-elf: vmlinux $(wrapperbits) $(obj)/ebony.dtb
+ $(call if_changed,wrap,ebony,,$(obj)/ebony.dtb)
+
+$(obj)/zImage.initrd.ebony-elf: vmlinux $(wrapperbits) $(obj)/ebony.dtb $(obj)/ramdisk.image.gz
+ $(call if_changed,wrap,ebony,,$(obj)/ebony.dtb,$(obj)/ramdisk.img.gz)
+
+$(obj)/zImage.ebony: vmlinux $(wrapperbits) $(obj)/ebony.dtb $(obj)/mktree
+ $(call if_changed,wrap,ebony-tree,,$(obj)/ebony.dtb)
+
+$(obj)/zImage.initrd.ebony: vmlinux $(wrapperbits) $(obj)/ebony.dtb $(obj)/mktree
+ $(call if_changed,wrap,ebony-tree,,$(obj)/ebony.dtb,$(obj)/ramdisk.img.gz)
+
+$(obj)/uImage.ebony: vmlinux $(wrapperbits) $(obj)/ebony.dtb
+ $(call if_changed,wrap,ebony-uboot,,$(obj)/ebony.dtb)
+
$(obj)/uImage: vmlinux $(wrapperbits)
$(call if_changed,wrap,uboot)
Index: working-2.6/arch/powerpc/boot/ebony.c
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/boot/ebony.c 2007-04-19 10:59:58.000000000 +1000
@@ -0,0 +1,149 @@
+/*
+ * Copyright 2007 David Gibson, IBM Corporation.
+ *
+ * Based on earlier code:
+ * Copyright (C) Paul Mackerras 1997.
+ * Copyright 2002-2005 MontaVista Software Inc.
+ * Copyright (c) 2003, 2004 Zultys Technologies
+
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <stdarg.h>
+#include <stddef.h>
+#include "types.h"
+#include "elf.h"
+#include "string.h"
+#include "stdio.h"
+#include "page.h"
+#include "ops.h"
+#include "reg.h"
+#include "dcr.h"
+
+extern char _start[];
+extern char _end[];
+extern char _dtb_start[];
+extern char _dtb_end[];
+
+BSS_STACK(4096);
+
+#define OPENBIOS_MAC_BASE 0xfffffe0c
+#define OPENBIOS_MAC_OFFSET 0xc
+
+/* Read the 44x memory controller to get size of system memory. */
+static void ibm44x_fixup_memsize(void)
+{
+ int i;
+ unsigned long memsize, bank_config;
+
+ memsize = 0;
+ for (i = 0; i < ARRAY_SIZE(sdram_bxcr); i++) {
+ mtdcr(DCRN_SDRAM0_CFGADDR, sdram_bxcr[i]);
+ bank_config = mfdcr(DCRN_SDRAM0_CFGDATA);
+
+ if (bank_config & SDRAM_CONFIG_BANK_ENABLE)
+ memsize += SDRAM_CONFIG_BANK_SIZE(bank_config);
+ }
+
+ dt_fixup_memory(0, memsize);
+}
+
+/* Calculate 440GP clocks */
+void ibm440gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
+{
+ u32 sys0 = mfdcr(DCRN_CPC0_SYS0);
+ u32 cr0 = mfdcr(DCRN_CPC0_CR0);
+ u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
+ u32 opdv = CPC0_SYS0_OPDV(sys0);
+ u32 epdv = CPC0_SYS0_EPDV(sys0);
+
+ if (sys0 & CPC0_SYS0_BYPASS) {
+ /* Bypass system PLL */
+ cpu = plb = sysclk;
+ } else {
+ if (sys0 & CPC0_SYS0_EXTSL)
+ /* PerClk */
+ m = CPC0_SYS0_FWDVB(sys0) * opdv * epdv;
+ else
+ /* CPU clock */
+ m = CPC0_SYS0_FBDV(sys0) * CPC0_SYS0_FWDVA(sys0);
+ cpu = sysclk * m / CPC0_SYS0_FWDVA(sys0);
+ plb = sysclk * m / CPC0_SYS0_FWDVB(sys0);
+ }
+
+ opb = plb / opdv;
+ ebc = opb / epdv;
+
+ /* FIXME: Check if this is for all 440GP, or just Ebony */
+ if ((mfpvr() & 0xf0000fff) == 0x40000440)
+ /* Rev. B 440GP, use external system clock */
+ tb = sysclk;
+ else
+ /* Rev. C 440GP, errata force us to use internal clock */
+ tb = cpu;
+
+ if (cr0 & CPC0_CR0_U0EC)
+ /* External UART clock */
+ uart0 = ser_clk;
+ else
+ /* Internal UART clock */
+ uart0 = plb / CPC0_CR0_UDIV(cr0);
+
+ if (cr0 & CPC0_CR0_U1EC)
+ /* External UART clock */
+ uart1 = ser_clk;
+ else
+ /* Internal UART clock */
+ uart1 = plb / CPC0_CR0_UDIV(cr0);
+
+ printf("PPC440GP: SysClk = %dMHz (%x)\n\r",
+ (sysclk + 500000) / 1000000, sysclk);
+
+ dt_fixup_cpu_clocks(cpu, tb, 0);
+
+ dt_fixup_clock("/plb", plb);
+ dt_fixup_clock("/plb/opb", opb);
+ dt_fixup_clock("/plb/opb/ebc", ebc);
+ dt_fixup_clock("/plb/opb/serial@40000200", uart0);
+ dt_fixup_clock("/plb/opb/serial@40000300", uart1);
+}
+
+static void ebony_fixups(void)
+{
+ // FIXME: sysclk should be derived by reading the FPGA registers
+ unsigned long sysclk = 33000000;
+
+ ibm440gp_fixup_clocks(sysclk, 6 * 1843200);
+ ibm44x_fixup_memsize();
+ dt_fixup_mac_addresses((u8 *)OPENBIOS_MAC_BASE,
+ (u8 *)(OPENBIOS_MAC_BASE + OPENBIOS_MAC_OFFSET));
+}
+
+#define SPRN_DBCR0 0x134
+#define DBCR0_RST_SYSTEM 0x30000000
+
+static void ebony_exit(void)
+{
+ unsigned long tmp;
+
+ asm volatile (
+ "mfspr %0,%1\n"
+ "oris %0,%0,%2@h\n"
+ "mtspr %1,%0"
+ : "=&r"(tmp) : "i"(SPRN_DBCR0), "i"(DBCR0_RST_SYSTEM)
+ );
+
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5)
+{
+ u32 heapsize = 0x8000000 - (u32)_end; /* 128M */
+
+ platform_ops.fixups = ebony_fixups;
+ platform_ops.exit = ebony_exit;
+ simple_alloc_init(_end, heapsize, 32, 64);
+ ft_init(_dtb_start, 0, 32);
+ serial_console_init();
+}
Index: working-2.6/arch/powerpc/boot/wrapper
===================================================================
--- working-2.6.orig/arch/powerpc/boot/wrapper 2007-04-19 10:59:55.000000000 +1000
+++ working-2.6/arch/powerpc/boot/wrapper 2007-04-19 11:08:24.000000000 +1000
@@ -141,6 +141,12 @@ miboot|uboot)
ksection=image
isection=initrd
;;
+*-tree)
+ platformo=$object/"${platform%%-tree}".o
+ ;;
+*-uboot)
+ platformo=$object/"${platform%%-uboot}".o
+ ;;
esac
vmz="$tmpdir/`basename \"$kernel\"`.$ext"
@@ -160,16 +166,18 @@ fi
vmz="$vmz$gzip"
+# Pull the version string out of the kernel, which some platforms need
+version=`${CROSS}strings "$kernel" | grep '^Linux version [-0-9.]' | \
+ cut -d' ' -f3`
+if [ -n "$version" ]; then
+ uboot_version="-n Linux-$version"
+fi
+
case "$platform" in
uboot)
rm -f "$ofile"
- version=`${CROSS}strings "$kernel" | grep '^Linux version [-0-9.]' | \
- cut -d' ' -f3`
- if [ -n "$version" ]; then
- version="-n Linux-$version"
- fi
mkimage -A ppc -O linux -T kernel -C gzip -a 00000000 -e 00000000 \
- $version -d "$vmz" "$ofile"
+ $uboot_version -d "$vmz" "$ofile"
if [ -z "$cacheit" ]; then
rm -f "$vmz"
fi
@@ -205,15 +213,34 @@ if [ "$platform" != "miboot" ]; then
rm $tmp
fi
+# Some platforms need to know the zImage's entry point
+entry=`${CROSS}objdump -f "$ofile" | grep '^start address ' | cut -d' ' -f3`
+
# post-processing needed for some platforms
case "$platform" in
pseries|chrp)
$object/addnote "$ofile"
;;
pmaccoff)
- entry=`objdump -f "$ofile" | grep '^start address ' | \
- cut -d' ' -f3`
${CROSS}objcopy -O aixcoff-rs6000 --set-start "$entry" "$ofile"
$object/hack-coff "$ofile"
;;
+*-tree)
+ mv "$ofile" "$ofile.elf"
+ $object/mktree "$ofile.elf" "$ofile" 0x00400000 "$entry"
+ if [ -z "$cacheit" ]; then
+ rm -f "$ofile.elf"
+ fi
+ exit 0
+ ;;
+*-uboot)
+ mv "$ofile" "$ofile.elf"
+ ${CROSS}objcopy -O binary "$ofile.elf" "$ofile.bin"
+ mkimage -A ppc -O linux -T kernel -C none -a 0x00400000 -e $entry \
+ $uboot_version -d "$ofile.bin" "$ofile"
+ if [ -z "$cacheit" ]; then
+ rm -f "$ofile.elf" "$ofile.bin"
+ fi
+ exit 0
+ ;;
esac
Index: working-2.6/arch/powerpc/boot/mktree.c
===================================================================
--- working-2.6.orig/arch/powerpc/boot/mktree.c 2007-01-24 12:01:17.000000000 +1100
+++ working-2.6/arch/powerpc/boot/mktree.c 2007-04-19 10:59:58.000000000 +1000
@@ -46,8 +46,8 @@ int main(int argc, char *argv[])
struct stat st;
boot_block_t bt;
- if (argc < 3) {
- fprintf(stderr, "usage: %s <zImage-file> <boot-image> [entry-point]\n",argv[0]);
+ if (argc < 5) {
+ fprintf(stderr, "usage: %s <zImage-file> <boot-image> <load address> <entry point>\n",argv[0]);
exit(1);
}
@@ -61,10 +61,8 @@ int main(int argc, char *argv[])
bt.bb_magic = htonl(0x0052504F);
/* If we have the optional entry point parameter, use it */
- if (argc == 4)
- bt.bb_dest = bt.bb_entry_point = htonl(strtoul(argv[3], NULL, 0));
- else
- bt.bb_dest = bt.bb_entry_point = htonl(0x500000);
+ bt.bb_dest = htonl(strtoul(argv[3], NULL, 0));
+ bt.bb_entry_point = htonl(strtoul(argv[4], NULL, 0));
/* We know these from the linker command.
* ...and then move it up into memory a little more so the
Index: working-2.6/arch/powerpc/boot/dcr.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/arch/powerpc/boot/dcr.h 2007-04-19 10:59:58.000000000 +1000
@@ -0,0 +1,85 @@
+#ifndef _PPC_BOOT_DCR_H_
+#define _PPC_BOOT_DCR_H_
+
+#define mfdcr(rn) \
+ ({ \
+ unsigned long rval; \
+ asm volatile("mfdcr %0,%1" : "=r"(rval) : "i"(rn)); \
+ rval; \
+ })
+#define mtdcr(rn, val) \
+ asm volatile("mtdcr %0,%1" : : "i"(rn), "r"(val))
+
+/* 440GP/440GX SDRAM controller DCRs */
+#define DCRN_SDRAM0_CFGADDR 0x010
+#define DCRN_SDRAM0_CFGDATA 0x011
+
+#define SDRAM0_B0CR 0x40
+#define SDRAM0_B1CR 0x44
+#define SDRAM0_B2CR 0x48
+#define SDRAM0_B3CR 0x4c
+
+static const unsigned long sdram_bxcr[] = { SDRAM0_B0CR, SDRAM0_B1CR, SDRAM0_B2CR, SDRAM0_B3CR };
+
+#define SDRAM_CONFIG_BANK_ENABLE 0x00000001
+#define SDRAM_CONFIG_SIZE_MASK 0x000e0000
+#define SDRAM_CONFIG_BANK_SIZE(reg) \
+ (0x00400000 << ((reg & SDRAM_CONFIG_SIZE_MASK) >> 17))
+
+/* 440GP Clock, PM, chip control */
+#define DCRN_CPC0_SR 0x0b0
+#define DCRN_CPC0_ER 0x0b1
+#define DCRN_CPC0_FR 0x0b2
+#define DCRN_CPC0_SYS0 0x0e0
+#define CPC0_SYS0_TUNE 0xffc00000
+#define CPC0_SYS0_FBDV_MASK 0x003c0000
+#define CPC0_SYS0_FBDV(reg) \
+ ((((((reg) & CPC0_SYS0_FBDV_MASK) >> 18) - 1) & 0xf) + 1)
+#define CPC0_SYS0_FWDVA_MASK 0x00038000
+#define CPC0_SYS0_FWDVA(reg) \
+ (8 - (((reg) & CPC0_SYS0_FWDVA_MASK) >> 15))
+#define CPC0_SYS0_FWDVB_MASK 0x00007000
+#define CPC0_SYS0_FWDVB(reg) \
+ (8 - (((reg) & CPC0_SYS0_FWDVB_MASK) >> 12))
+#define CPC0_SYS0_OPDV_MASK 0x00000c00
+#define CPC0_SYS0_OPDV(reg) \
+ ((((reg) & CPC0_SYS0_OPDV_MASK) >> 10) + 1)
+#define CPC0_SYS0_EPDV_MASK 0x00000300
+#define CPC0_SYS0_EPDV(reg) \
+ ((((reg) & CPC0_SYS0_EPDV_MASK) >> 8) + 1)
+#define CPC0_SYS0_EXTSL 0x00000080
+#define CPC0_SYS0_RW_MASK 0x00000060
+#define CPC0_SYS0_RL 0x00000010
+#define CPC0_SYS0_ZMIISL_MASK 0x0000000c
+#define CPC0_SYS0_BYPASS 0x00000002
+#define CPC0_SYS0_NTO1 0x00000001
+#define DCRN_CPC0_SYS1 0x0e1
+#define DCRN_CPC0_CUST0 0x0e2
+#define DCRN_CPC0_CUST1 0x0e3
+#define DCRN_CPC0_STRP0 0x0e4
+#define DCRN_CPC0_STRP1 0x0e5
+#define DCRN_CPC0_STRP2 0x0e6
+#define DCRN_CPC0_STRP3 0x0e7
+#define DCRN_CPC0_GPIO 0x0e8
+#define DCRN_CPC0_PLB 0x0e9
+#define DCRN_CPC0_CR1 0x0ea
+#define DCRN_CPC0_CR0 0x0eb
+#define CPC0_CR0_SWE 0x80000000
+#define CPC0_CR0_CETE 0x40000000
+#define CPC0_CR0_U1FCS 0x20000000
+#define CPC0_CR0_U0DTE 0x10000000
+#define CPC0_CR0_U0DRE 0x08000000
+#define CPC0_CR0_U0DC 0x04000000
+#define CPC0_CR0_U1DTE 0x02000000
+#define CPC0_CR0_U1DRE 0x01000000
+#define CPC0_CR0_U1DC 0x00800000
+#define CPC0_CR0_U0EC 0x00400000
+#define CPC0_CR0_U1EC 0x00200000
+#define CPC0_CR0_UDIV_MASK 0x001f0000
+#define CPC0_CR0_UDIV(reg) \
+ ((((reg) & CPC0_CR0_UDIV_MASK) >> 16) + 1)
+#define DCRN_CPC0_MIRQ0 0x0ec
+#define DCRN_CPC0_MIRQ1 0x0ed
+#define DCRN_CPC0_JTAGID 0x0ef
+
+#endif /* _PPC_BOOT_DCR_H_ */
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH 10/10] zImage wrapper for Ebony
From: Paul Mackerras @ 2007-04-19 1:42 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, David Gibson
In-Reply-To: <20070418161441.GA8129@ld0162-tx32.am.freescale.net>
Scott Wood writes:
> Perhaps we should have separate platform file and image type arguments,
> so the wrapper doesn't have to do this sort of manipulation?
I would have no problem with an extra argument to select between
different image types available for a given platform, as long as there
is a sensible default for each platform.
Paul.
^ permalink raw reply
* Re: [PATCH: dtc] Improve -S handling
From: David Gibson @ 2007-04-19 1:42 UTC (permalink / raw)
To: Jerry Van Baren; +Cc: linuxppc-dev, jdl, Jerry Van Baren
In-Reply-To: <46260CE3.7030503@smiths-aerospace.com>
On Wed, Apr 18, 2007 at 08:19:47AM -0400, Jerry Van Baren wrote:
> David Gibson wrote:
> > On Tue, Apr 17, 2007 at 10:05:35PM -0400, Jerry Van Baren wrote:
> >> If the user requests extra space, pad out the blob (previously the unused
> >> data was undefined).
> >>
> >> Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
> >> ---
> >>
> >> Hi Jon, David, Milton,
> >>
> >> This improves the -S option to pad out the blob with zeros when the user
> >> asks for extra space.
> >
> > Comment below
> >> diff --git a/flattree.c b/flattree.c
> >> index 151d16e..d2ee0dc 100644
> >> --- a/flattree.c
> >> +++ b/flattree.c
> >> @@ -310,6 +310,7 @@ static struct data flatten_reserve_list(struct reserve_info *reservelist,
> >>
> >> return d;
> >> }
> >> +
> >> static void make_bph(struct boot_param_header *bph,
> >> struct version_info *vi,
> >> int reservesize, int dtsize, int strsize,
> >> @@ -358,12 +359,15 @@ void dt_to_blob(FILE *f, struct boot_info *bi, int version,
> >> {
> >> struct version_info *vi = NULL;
> >> int i;
> >> + int size;
> >> struct data dtbuf = empty_data;
> >> struct data strbuf = empty_data;
> >> struct data reservebuf;
> >> struct boot_param_header bph;
> >> struct reserve_entry termre = {.address = 0, .size = 0};
> >>
> >> + size = 0;
> >> +
> >> for (i = 0; i < ARRAY_SIZE(version_table); i++) {
> >> if (version_table[i].version == version)
> >> vi = &version_table[i];
> >> @@ -384,10 +388,13 @@ void dt_to_blob(FILE *f, struct boot_info *bi, int version,
> >> boot_cpuid_phys);
> >>
> >> fwrite(&bph, vi->hdr_size, 1, f);
> >> + size += vi->hdr_size;
> >>
> >> /* Align the reserve map to an 8 byte boundary */
> >> - for (i = vi->hdr_size; i < be32_to_cpu(bph.off_mem_rsvmap); i++)
> >> + for (i = vi->hdr_size; i < be32_to_cpu(bph.off_mem_rsvmap); i++) {
> >> fputc(0, f);
> >> + size += 1;
> >> + }
> >>
> >> /*
> >> * Reserve map entries.
> >> @@ -396,9 +403,27 @@ void dt_to_blob(FILE *f, struct boot_info *bi, int version,
> >> */
> >> fwrite(reservebuf.val, reservebuf.len, 1, f);
> >> fwrite(&termre, sizeof(termre), 1, f);
> >> + size += reservebuf.len + sizeof(termre);
> >>
> >> fwrite(dtbuf.val, dtbuf.len, 1, f);
> >> fwrite(strbuf.val, strbuf.len, 1, f);
> >> + size += dtbuf.len + strbuf.len;
> >> +
> >> + /*
> >> + * If the user asked for more space than is used, pad it out.
> >> + */
> >> + if (minsize > 0) {
> >> + int padlen = minsize - size;
> >> +
> >> + if (padlen > 0) {
> >> + char *zeroes = calloc(padlen, 1);
> >> +
> >> + if (zeroes != NULL) {
> >> + fwrite(zeroes, padlen, 1, f);
> >> + free(zeroes);
> >> + }
> >> + }
> >> + }
> >
> > Hrm, rather than all this explicit calloc() mangling, I'd prefer we
> > use our existing struct data stuff. Use data_append_zeroes() on
> > empty_data to generate your buffer of padding.
> >
> >> if (ferror(f))
> >> die("Error writing device tree blob: %s\n", strerror(errno));
> >> @@ -504,6 +529,14 @@ void dt_to_asm(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys)
> >>
> >> emit_label(f, symprefix, "blob_end");
> >>
> >> + /*
> >> + * If the user asked for more space than is used, pad it out.
> >> + */
> >> + if (minsize > 0) {
> >> + fprintf(f, "\t.space\t%d - (%s_blob_end - %s_blob_start), 0\n",
> >> + minsize, symprefix, symprefix);
> >> + }
> >> +
> >> data_free(strbuf);
> >> }
>
> Hi David,
>
> I started down the data_append_zeroes() path and had to back up and take
> the branch less traveled ;-). The problem is that data_append_zeros()
> appends the data to a "struct data" and I don't want to add zeros
> internally to any of the existing pieces parts since the extra space is
> external, not internal to the existing parts.
>
> I suppose I could create a new "struct data zeroes" and use
> data_append_zeroes() to create zeros in it, write that out, and then
> free it, but I fail to see how that is better than simply calloc()ing a
> bunch of zeros and writing _that_ out.
Hrm. I suppose. Though I do notice that your code will silently omit
the padding if the calloc() fails.
> P.S. David: I cannot send email to your dropbear.id.au address from
> home, one of our ISPs apparently has the other blackballed. I mention
> this just so you know I'm not intentionally cutting you out of the To: list.
Eck. That's a pain.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* [PATCH: dtc take 2] Assemble the blob in memory before writing it out.
From: Jerry Van Baren @ 2007-04-19 1:59 UTC (permalink / raw)
To: linuxppc-dev, u-boot-users, jdl
This makes padding out the blob if the user requested extra size much
easer. The assembly and writing to the file is more straight forward too.
Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
---
Hi David, Jon,
I wasn't happy with David's suggestion on the -S handling. I also wasn't
all that wild about how the blob was assembled and then written to the
file piecemeal with "ad-hoc" alignment padding. I realized I could fix
both by assembling the blob in memory as a "struct data" and then write
the whole thing out in one fell swoop.
Makes it a lot simpler and cleaner to my eyes.
Hope y'all agree,
gvb
flattree.c | 82 +++++++++++++++++++++++++++++++++++-------------------------
1 files changed, 48 insertions(+), 34 deletions(-)
diff --git a/flattree.c b/flattree.c
index 151d16e..caff758 100644
--- a/flattree.c
+++ b/flattree.c
@@ -310,6 +310,7 @@ static struct data flatten_reserve_list(struct reserve_info *reservelist,
return d;
}
+
static void make_bph(struct boot_param_header *bph,
struct version_info *vi,
int reservesize, int dtsize, int strsize,
@@ -332,19 +333,8 @@ static void make_bph(struct boot_param_header *bph,
bph->off_dt_struct = cpu_to_be32(reserve_off + reservesize);
bph->off_dt_strings = cpu_to_be32(reserve_off + reservesize
+ dtsize);
- bph->totalsize = reserve_off + reservesize + dtsize + strsize;
- if (minsize > 0) {
- if (bph->totalsize >= minsize) {
- if (quiet < 1)
- fprintf(stderr,
- "Warning: blob size %d >= minimum size %d\n",
- bph->totalsize, minsize);
+ bph->totalsize = cpu_to_be32(reserve_off + reservesize + dtsize + strsize);
- } else
- bph->totalsize = minsize;
- }
- bph->totalsize = cpu_to_be32(bph->totalsize);
-
if (vi->flags & FTF_BOOTCPUID)
bph->boot_cpuid_phys = cpu_to_be32(boot_cpuid_phys);
if (vi->flags & FTF_STRTABSIZE)
@@ -358,11 +348,11 @@ void dt_to_blob(FILE *f, struct boot_info *bi, int version,
{
struct version_info *vi = NULL;
int i;
- struct data dtbuf = empty_data;
- struct data strbuf = empty_data;
- struct data reservebuf;
+ struct data blob = empty_data;
+ struct data reservebuf = empty_data;
+ struct data dtbuf = empty_data;
+ struct data strbuf = empty_data;
struct boot_param_header bph;
- struct reserve_entry termre = {.address = 0, .size = 0};
for (i = 0; i < ARRAY_SIZE(version_table); i++) {
if (version_table[i].version == version)
@@ -371,9 +361,6 @@ void dt_to_blob(FILE *f, struct boot_info *bi, int version,
if (!vi)
die("Unknown device tree blob version %d\n", version);
- dtbuf = empty_data;
- strbuf = empty_data;
-
flatten_tree(bi->dt, &bin_emitter, &dtbuf, &strbuf, vi);
bin_emit_cell(&dtbuf, OF_DT_END);
@@ -383,28 +370,46 @@ void dt_to_blob(FILE *f, struct boot_info *bi, int version,
make_bph(&bph, vi, reservebuf.len, dtbuf.len, strbuf.len,
boot_cpuid_phys);
- fwrite(&bph, vi->hdr_size, 1, f);
-
- /* Align the reserve map to an 8 byte boundary */
- for (i = vi->hdr_size; i < be32_to_cpu(bph.off_mem_rsvmap); i++)
- fputc(0, f);
+ /*
+ * Assemble the blob: start with the header, add with alignment
+ * the reserve buffer, add the reserve map terminating zeroes,
+ * the device tree itself, and finally the strings.
+ */
+ blob = data_append_data(blob, &bph, sizeof(bph));
+ blob = data_append_align(blob, 8);
+ blob = data_merge(blob, reservebuf);
+ blob = data_append_zeroes(blob, sizeof(struct reserve_entry));
+ blob = data_merge(blob, dtbuf);
+ blob = data_merge(blob, strbuf);
/*
- * Reserve map entries.
- * Each entry is an (address, size) pair of u64 values.
- * Always supply a zero-sized temination entry.
+ * If the user asked for more space than is used, pad out the blob.
*/
- fwrite(reservebuf.val, reservebuf.len, 1, f);
- fwrite(&termre, sizeof(termre), 1, f);
+ if (minsize > 0) {
+ int padlen = minsize - be32_to_cpu(bph.totalsize);
+
+fprintf(stderr, "minsize = %d, totalsize = %d, padlen = %d\n", minsize, be32_to_cpu(bph.totalsize), padlen);
+ if (padlen > 0) {
+ blob = data_append_zeroes(blob, padlen);
+ bph.totalsize = cpu_to_be32(minsize);
+ } else {
+ if (quiet < 1)
+ fprintf(stderr,
+ "Warning: blob size %d >= minimum size %d\n",
+ be32_to_cpu(bph.totalsize), minsize);
+ }
+ }
- fwrite(dtbuf.val, dtbuf.len, 1, f);
- fwrite(strbuf.val, strbuf.len, 1, f);
+ fwrite(blob.val, blob.len, 1, f);
if (ferror(f))
die("Error writing device tree blob: %s\n", strerror(errno));
- data_free(dtbuf);
- data_free(strbuf);
+ /*
+ * data_merge() frees the right-hand element so only the blob
+ * remains to be freed.
+ */
+ data_free(blob);
}
static void dump_stringtable_asm(FILE *f, struct data strbuf)
@@ -447,7 +452,7 @@ void dt_to_asm(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys)
emit_label(f, symprefix, "blob_start");
emit_label(f, symprefix, "header");
fprintf(f, "\t.long\tOF_DT_HEADER /* magic */\n");
- fprintf(f, "\t.long\t_%s_blob_end - _%s_blob_start /* totalsize */\n",
+ fprintf(f, "\t.long\t_%s_blob_abs_end - _%s_blob_start /* totalsize */\n",
symprefix, symprefix);
fprintf(f, "\t.long\t_%s_struct_start - _%s_blob_start /* off_dt_struct */\n",
symprefix, symprefix);
@@ -504,6 +509,15 @@ void dt_to_asm(FILE *f, struct boot_info *bi, int version, int boot_cpuid_phys)
emit_label(f, symprefix, "blob_end");
+ /*
+ * If the user asked for more space than is used, pad it out.
+ */
+ if (minsize > 0) {
+ fprintf(f, "\t.space\t%d - (_%s_blob_end - _%s_blob_start), 0\n",
+ minsize, symprefix, symprefix);
+ }
+ emit_label(f, symprefix, "blob_abs_end");
+
data_free(strbuf);
}
--
1.4.4.4
^ permalink raw reply related
* Re: [PATCH: dtc take 2] Assemble the blob in memory before writing it out.
From: David Gibson @ 2007-04-19 2:05 UTC (permalink / raw)
To: Jerry Van Baren; +Cc: linuxppc-dev, jdl, u-boot-users
In-Reply-To: <20070419015951.GA9339@dellserver.lan>
On Wed, Apr 18, 2007 at 09:59:51PM -0400, Jerry Van Baren wrote:
> This makes padding out the blob if the user requested extra size much
> easer. The assembly and writing to the file is more straight forward too.
>
> Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
> ---
>
> Hi David, Jon,
>
> I wasn't happy with David's suggestion on the -S handling. I also wasn't
> all that wild about how the blob was assembled and then written to the
> file piecemeal with "ad-hoc" alignment padding. I realized I could fix
> both by assembling the blob in memory as a "struct data" and then write
> the whole thing out in one fell swoop.
>
> Makes it a lot simpler and cleaner to my eyes.
I like it. (In fact my original suggestion about using
data_append_zeroes() was based on a mistaken vague notion that we
already did it this way).
Acked-by: David Gibson <david@gibson.dropbear.id.au>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH 4/10] Re-organize Kconfig code for 4xx in arch/powerpc
From: David Gibson @ 2007-04-19 2:59 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Mackerras
In-Reply-To: <20070418063626.4E05CDDE3B@ozlabs.org>
Paul, I think this one is ready to merge, providing it doesn't
conflict with anything in-progress in Kumar's Kconfig cleanup work.
Kumar, can you comment?
On Wed, Apr 18, 2007 at 04:36:26PM +1000, David Gibson wrote:
> Now that we always take a device tree in arch/powerpc, there's no good
> reason not to allow a single kernel to support multiple embedded 4xx
> boards - the correct platform code can be selected based on the device
> tree information.
>
> Therefore, this patch re-arranges the 4xx Kconfig code to allow this.
> In addition we:
> - use "select" instead of depends to configure the correct
> config options for specific 4xx CPUs and workarounds, which
> makes the information about specific boards and CPUs less
> scattered.
> - Some old, unused (in arch/powerpc) config options are
> removed: WANT_EARLY_SERIAL, IBM_OCP, etc.
>
> Signed-off-by: David Gibson <dwg@au1.ibm.com>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH] Emulate more instructions in software
From: Ananth N Mavinakayanahalli @ 2007-04-19 4:17 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <1C486ED7-75EA-4DF7-820B-4ADDDC4CFA5E@kernel.crashing.org>
On Wed, Apr 18, 2007 at 11:25:55AM -0500, Kumar Gala wrote:
>
> On Apr 18, 2007, at 11:23 AM, Kumar Gala wrote:
>
> >
> >On Apr 18, 2007, at 2:13 AM, Ananth N Mavinakayanahalli wrote:
> >
> >>On Wed, Apr 18, 2007 at 01:11:00AM -0500, Kumar Gala wrote:
> >>>
> >>>On Apr 18, 2007, at 12:56 AM, Ananth N Mavinakayanahalli wrote:
> >>>
> >>>>Emulate a few more instructions in software - especially useful
> >>>>during
> >>>>singlestepping (xmon/kprobes).
> >>>>
> >>>>Instructions emulated with this patch are mfcr/mtcr rX, mfxer/mtxer
> >>>>rX,
> >>>>mflr/mtlr rX, mfctr/mtctr rX and mr rA,rB.
> >>>>
> >>>>
> >>>>Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
> >>>
> >>>When do we actually need to emulate any of these instructions? I
> >>>don't see why single stepping would effect the ability to execute
> >>>these instructions.
> >>
> >>In cases when these instructions are kprobed, it'd be possible to
> >>eliminate the single step exception as we can emulate them.
> >>
> >>Most usecases of kprobes are at function entry and in most cases, the
> >>instruction at function entry is mflr r0, which can be emulated. So
> >>you
> >>can get rid of one exception and get a nice speedup too. My other
> >>patch
> >>did just this.
> >
> >Makes sense, how about wrapping the emulation of those instructions
> >in a #if defined(CONFIG_KPROBES) || defined(CONFIG_XMON). Plus
> >adding a comment about these instructions just be emulated for
> >singlestepping performance and not because they are missing on some
> >platform.
>
> Ignore this, I see this code is in lib/sstep.c not the main emulation
> path.
>
> >Also, do you really see that many mfxer/mtxer. I'd expect them to be
> >rare.
Right. In fact, there were none in the .o files I checked. I put the
code for it for completeness wrt registers exposed by pt_regs.
Ananth
^ permalink raw reply
* [PATCH] kexec-tools ppc64: add --reuseinitrd option
From: Michael Neuling @ 2007-04-19 4:29 UTC (permalink / raw)
To: kexec; +Cc: linuxppc-dev, horms, Fastboot mailing list, miltonm
In-Reply-To: <12001.1176881167@neuling.org>
Add a --reuseinitrd option so that initrds saved using the
retain_initrd kernel option can be reused on the kexec boot.
Signed-off-by: Michael Neuling <mikey@neuling.org>
---
Horms: This fixes comments from Milton. Also adds sanity checks to make
sure the old initrd was retained, and that another initrd/ramdisk is not
being specified at the same time.
fastboot is dead... love live kexec! Yay :-)
kexec/arch/ppc64/fs2dt.c | 36 +++++++++++++++++++++++++++---------
kexec/arch/ppc64/kexec-elf-ppc64.c | 9 +++++++++
kexec/arch/ppc64/kexec-ppc64.c | 1 +
kexec/arch/ppc64/kexec-ppc64.h | 1 +
4 files changed, 38 insertions(+), 9 deletions(-)
Index: kexec-tools-testing/kexec/arch/ppc64/fs2dt.c
===================================================================
--- kexec-tools-testing.orig/kexec/arch/ppc64/fs2dt.c
+++ kexec-tools-testing/kexec/arch/ppc64/fs2dt.c
@@ -66,11 +66,11 @@ void reserve(unsigned long long where, u
}
/* look for properties we need to reserve memory space for */
-static void checkprop(char *name, unsigned *data)
+static void checkprop(char *name, unsigned *data, int len)
{
- static unsigned long long base, size;
+ static unsigned long long base, size, end;
- if ((data == NULL) && (base || size))
+ if ((data == NULL) && (base || size || end))
die("unrecoverable error: no property data");
else if (!strcmp(name, "linux,rtas-base"))
base = *data;
@@ -79,11 +79,24 @@ static void checkprop(char *name, unsign
else if (!strcmp(name, "rtas-size") ||
!strcmp(name, "linux,tce-size"))
size = *data;
+ else if (reuse_initrd && !strcmp(name, "linux,initrd-start"))
+ if (len == 8)
+ base = *(unsigned long long *) data;
+ else
+ base = *data;
+ else if (reuse_initrd && !strcmp(name, "linux,initrd-end"))
+ end = *(unsigned long long *) data;
+ if (size && end)
+ die("unrecoverable error: size and end set at same time\n");
if (base && size) {
reserve(base, size);
base = size = 0;
}
+ if (base && end) {
+ reserve(base, end-base);
+ base = end = 0;
+ }
}
/*
@@ -213,10 +226,11 @@ static void putprops(char *fn, struct di
continue;
/* This property will be created/modified later in putnode()
- * So ignore it.
+ * So ignore it, unless we are reusing the initrd.
*/
- if (!strcmp(dp->d_name, "linux,initrd-start") ||
- !strcmp(dp->d_name, "linux,initrd-end"))
+ if ((!strcmp(dp->d_name, "linux,initrd-start") ||
+ !strcmp(dp->d_name, "linux,initrd-end")) &&
+ !reuse_initrd)
continue;
if (! S_ISREG(statbuf.st_mode))
@@ -241,7 +255,7 @@ static void putprops(char *fn, struct di
die("unrecoverable error: could not read \"%s\": %s\n",
pathname, strerror(errno));
- checkprop(fn, dt);
+ checkprop(fn, dt, len);
/* Get the cmdline from the device-tree and modify it */
if (!strcmp(dp->d_name, "bootargs")) {
@@ -249,6 +263,10 @@ static void putprops(char *fn, struct di
char temp_cmdline[COMMAND_LINE_SIZE] = { "" };
char *param = NULL;
cmd_len = strlen(local_cmdline);
+ if (reuse_initrd &&
+ (strstr((char *)dt, "retain_initrd") == NULL))
+ die("unrecoverable error: current boot didn't "
+ "retain the initrd for reuse.\n");
if (cmd_len != 0) {
param = strstr(local_cmdline, "crashkernel=");
if (param)
@@ -282,7 +300,7 @@ static void putprops(char *fn, struct di
}
fn[0] = '\0';
- checkprop(pathname, NULL);
+ checkprop(pathname, NULL, 0);
}
/*
@@ -343,7 +361,7 @@ static void putnode(void)
putprops(dn, namelist, numlist);
/* Add initrd entries to the second kernel */
- if (initrd_base && !strcmp(basename,"/chosen/")) {
+ if (initrd_base && !strcmp(basename,"/chosen/") && !reuse_initrd) {
int len = 8;
unsigned long long initrd_end;
*dt++ = 3;
Index: kexec-tools-testing/kexec/arch/ppc64/kexec-elf-ppc64.c
===================================================================
--- kexec-tools-testing.orig/kexec/arch/ppc64/kexec-elf-ppc64.c
+++ kexec-tools-testing/kexec/arch/ppc64/kexec-elf-ppc64.c
@@ -43,6 +43,7 @@
#define BOOTLOADER_VERSION VERSION
unsigned long initrd_base, initrd_size;
+unsigned char reuse_initrd = 0;
int create_flatten_tree(struct kexec_info *, unsigned char **, unsigned long *,
char *);
@@ -95,6 +96,7 @@ int elf_ppc64_load(int argc, char **argv
#define OPT_RAMDISK (OPT_ARCH_MAX+1)
#define OPT_DEVICETREEBLOB (OPT_ARCH_MAX+2)
#define OPT_ARGS_IGNORE (OPT_ARCH_MAX+3)
+#define OPT_REUSE_INITRD (OPT_ARCH_MAX+4)
static const struct option options[] = {
KEXEC_ARCH_OPTIONS
@@ -104,6 +106,7 @@ int elf_ppc64_load(int argc, char **argv
{ "initrd", 1, NULL, OPT_RAMDISK },
{ "devicetreeblob", 1, NULL, OPT_DEVICETREEBLOB },
{ "args-linux", 0, NULL, OPT_ARGS_IGNORE },
+ { "reuseinitrd", 0, NULL, OPT_REUSE_INITRD },
{ 0, 0, NULL, 0 },
};
@@ -139,6 +142,9 @@ int elf_ppc64_load(int argc, char **argv
break;
case OPT_ARGS_IGNORE:
break;
+ case OPT_REUSE_INITRD:
+ reuse_initrd = 1;
+ break;
}
}
@@ -148,6 +154,9 @@ int elf_ppc64_load(int argc, char **argv
else
fprintf(stdout, "Warning: append= option is not passed. Using the first kernel root partition\n");
+ if (ramdisk && reuse_initrd)
+ die("Can't specify --ramdisk or --initrd with --reuseinitrd\n");
+
setup_memory_ranges(info->kexec_flags);
/* Need to append some command line parameters internally in case of
Index: kexec-tools-testing/kexec/arch/ppc64/kexec-ppc64.c
===================================================================
--- kexec-tools-testing.orig/kexec/arch/ppc64/kexec-ppc64.c
+++ kexec-tools-testing/kexec/arch/ppc64/kexec-ppc64.c
@@ -635,6 +635,7 @@ void arch_usage(void)
fprintf(stderr, " --ramdisk=<filename> Initial RAM disk.\n");
fprintf(stderr, " --initrd=<filename> same as --ramdisk.\n");
fprintf(stderr, " --devicetreeblob=<filename> Specify device tree blob file.\n");
+ fprintf(stderr, " --reuseinitrd Reuse the current initrd in memory.\n");
fprintf(stderr, " --elf64-core-headers Prepare core headers in ELF64 format\n");
}
Index: kexec-tools-testing/kexec/arch/ppc64/kexec-ppc64.h
===================================================================
--- kexec-tools-testing.orig/kexec/arch/ppc64/kexec-ppc64.h
+++ kexec-tools-testing/kexec/arch/ppc64/kexec-ppc64.h
@@ -16,6 +16,7 @@ void reserve(unsigned long long where, u
extern unsigned long initrd_base, initrd_size;
extern int max_memory_ranges;
+extern unsigned char reuse_initrd;
/* boot block version 2 as defined by the linux kernel */
struct bootblock {
^ permalink raw reply
* RFC: powerpc: Start splitting up mmu.h by MMU type
From: David Gibson @ 2007-04-19 6:54 UTC (permalink / raw)
To: linuxppc-dev
This patch makes a start to sorting out the tangled mess of MMU
related header files in asm-powerpc, and weaning arch/powerpc off the
remaining asm-ppc headers it uses.
Specifically it splits the ppc64 specific (or more strictly, the
64-bit hash table specific) parts of asm-powerpc/mmu.h into its own
file, asm-powerpc/mmu-hash64/mmu.h. Similarly, PowerPC 44x
definitions are taken from asm-ppc/mmu.h, trimmed down for use in
arch/powerpc and place in their own file, asm-powerpc/mmu-44x/mmu.h.
mmu.h definitions for other 32-bit MMU types remain in asm-ppc/mmu.h
for now, but should be likewise split into their own files.
Index: working-2.6/include/asm-powerpc/mmu.h
===================================================================
--- working-2.6.orig/include/asm-powerpc/mmu.h 2007-02-09 09:57:55.000000000 +1100
+++ working-2.6/include/asm-powerpc/mmu.h 2007-04-19 15:06:52.000000000 +1000
@@ -2,407 +2,17 @@
#define _ASM_POWERPC_MMU_H_
#ifdef __KERNEL__
-#ifndef CONFIG_PPC64
-#include <asm-ppc/mmu.h>
+#if defined(CONFIG_PPC64)
+/* 64-bit classic hash table MMU */
+# include <asm/mmu-hash64/mmu.h>
+#elif defined(CONFIG_44x)
+/* 44x-style software loaded TLB */
+# include <asm/mmu-44x/mmu.h>
#else
-
-/*
- * PowerPC memory management structures
- *
- * Dave Engebretsen & Mike Corrigan <{engebret|mikejc}@us.ibm.com>
- * PPC64 rework.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <asm/asm-compat.h>
-#include <asm/page.h>
-
-/*
- * Segment table
- */
-
-#define STE_ESID_V 0x80
-#define STE_ESID_KS 0x20
-#define STE_ESID_KP 0x10
-#define STE_ESID_N 0x08
-
-#define STE_VSID_SHIFT 12
-
-/* Location of cpu0's segment table */
-#define STAB0_PAGE 0x6
-#define STAB0_OFFSET (STAB0_PAGE << 12)
-#define STAB0_PHYS_ADDR (STAB0_OFFSET + PHYSICAL_START)
-
-#ifndef __ASSEMBLY__
-extern char initial_stab[];
-#endif /* ! __ASSEMBLY */
-
-/*
- * SLB
- */
-
-#define SLB_NUM_BOLTED 3
-#define SLB_CACHE_ENTRIES 8
-
-/* Bits in the SLB ESID word */
-#define SLB_ESID_V ASM_CONST(0x0000000008000000) /* valid */
-
-/* Bits in the SLB VSID word */
-#define SLB_VSID_SHIFT 12
-#define SLB_VSID_B ASM_CONST(0xc000000000000000)
-#define SLB_VSID_B_256M ASM_CONST(0x0000000000000000)
-#define SLB_VSID_B_1T ASM_CONST(0x4000000000000000)
-#define SLB_VSID_KS ASM_CONST(0x0000000000000800)
-#define SLB_VSID_KP ASM_CONST(0x0000000000000400)
-#define SLB_VSID_N ASM_CONST(0x0000000000000200) /* no-execute */
-#define SLB_VSID_L ASM_CONST(0x0000000000000100)
-#define SLB_VSID_C ASM_CONST(0x0000000000000080) /* class */
-#define SLB_VSID_LP ASM_CONST(0x0000000000000030)
-#define SLB_VSID_LP_00 ASM_CONST(0x0000000000000000)
-#define SLB_VSID_LP_01 ASM_CONST(0x0000000000000010)
-#define SLB_VSID_LP_10 ASM_CONST(0x0000000000000020)
-#define SLB_VSID_LP_11 ASM_CONST(0x0000000000000030)
-#define SLB_VSID_LLP (SLB_VSID_L|SLB_VSID_LP)
-
-#define SLB_VSID_KERNEL (SLB_VSID_KP)
-#define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS|SLB_VSID_C)
-
-#define SLBIE_C (0x08000000)
-
-/*
- * Hash table
- */
-
-#define HPTES_PER_GROUP 8
-
-#define HPTE_V_AVPN_SHIFT 7
-#define HPTE_V_AVPN ASM_CONST(0xffffffffffffff80)
-#define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT)
-#define HPTE_V_COMPARE(x,y) (!(((x) ^ (y)) & HPTE_V_AVPN))
-#define HPTE_V_BOLTED ASM_CONST(0x0000000000000010)
-#define HPTE_V_LOCK ASM_CONST(0x0000000000000008)
-#define HPTE_V_LARGE ASM_CONST(0x0000000000000004)
-#define HPTE_V_SECONDARY ASM_CONST(0x0000000000000002)
-#define HPTE_V_VALID ASM_CONST(0x0000000000000001)
-
-#define HPTE_R_PP0 ASM_CONST(0x8000000000000000)
-#define HPTE_R_TS ASM_CONST(0x4000000000000000)
-#define HPTE_R_RPN_SHIFT 12
-#define HPTE_R_RPN ASM_CONST(0x3ffffffffffff000)
-#define HPTE_R_FLAGS ASM_CONST(0x00000000000003ff)
-#define HPTE_R_PP ASM_CONST(0x0000000000000003)
-#define HPTE_R_N ASM_CONST(0x0000000000000004)
-#define HPTE_R_C ASM_CONST(0x0000000000000080)
-#define HPTE_R_R ASM_CONST(0x0000000000000100)
-
-/* Values for PP (assumes Ks=0, Kp=1) */
-/* pp0 will always be 0 for linux */
-#define PP_RWXX 0 /* Supervisor read/write, User none */
-#define PP_RWRX 1 /* Supervisor read/write, User read */
-#define PP_RWRW 2 /* Supervisor read/write, User read/write */
-#define PP_RXRX 3 /* Supervisor read, User read */
-
-#ifndef __ASSEMBLY__
-
-typedef struct {
- unsigned long v;
- unsigned long r;
-} hpte_t;
-
-extern hpte_t *htab_address;
-extern unsigned long htab_size_bytes;
-extern unsigned long htab_hash_mask;
-
-/*
- * Page size definition
- *
- * shift : is the "PAGE_SHIFT" value for that page size
- * sllp : is a bit mask with the value of SLB L || LP to be or'ed
- * directly to a slbmte "vsid" value
- * penc : is the HPTE encoding mask for the "LP" field:
- *
- */
-struct mmu_psize_def
-{
- unsigned int shift; /* number of bits */
- unsigned int penc; /* HPTE encoding */
- unsigned int tlbiel; /* tlbiel supported for that page size */
- unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */
- unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */
-};
-
-#endif /* __ASSEMBLY__ */
-
-/*
- * The kernel use the constants below to index in the page sizes array.
- * The use of fixed constants for this purpose is better for performances
- * of the low level hash refill handlers.
- *
- * A non supported page size has a "shift" field set to 0
- *
- * Any new page size being implemented can get a new entry in here. Whether
- * the kernel will use it or not is a different matter though. The actual page
- * size used by hugetlbfs is not defined here and may be made variable
- */
-
-#define MMU_PAGE_4K 0 /* 4K */
-#define MMU_PAGE_64K 1 /* 64K */
-#define MMU_PAGE_64K_AP 2 /* 64K Admixed (in a 4K segment) */
-#define MMU_PAGE_1M 3 /* 1M */
-#define MMU_PAGE_16M 4 /* 16M */
-#define MMU_PAGE_16G 5 /* 16G */
-#define MMU_PAGE_COUNT 6
-
-#ifndef __ASSEMBLY__
-
-/*
- * The current system page sizes
- */
-extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
-extern int mmu_linear_psize;
-extern int mmu_virtual_psize;
-extern int mmu_vmalloc_psize;
-extern int mmu_io_psize;
-
-/*
- * If the processor supports 64k normal pages but not 64k cache
- * inhibited pages, we have to be prepared to switch processes
- * to use 4k pages when they create cache-inhibited mappings.
- * If this is the case, mmu_ci_restrictions will be set to 1.
- */
-extern int mmu_ci_restrictions;
-
-#ifdef CONFIG_HUGETLB_PAGE
-/*
- * The page size index of the huge pages for use by hugetlbfs
- */
-extern int mmu_huge_psize;
-
-#endif /* CONFIG_HUGETLB_PAGE */
-
-/*
- * This function sets the AVPN and L fields of the HPTE appropriately
- * for the page size
- */
-static inline unsigned long hpte_encode_v(unsigned long va, int psize)
-{
- unsigned long v =
- v = (va >> 23) & ~(mmu_psize_defs[psize].avpnm);
- v <<= HPTE_V_AVPN_SHIFT;
- if (psize != MMU_PAGE_4K)
- v |= HPTE_V_LARGE;
- return v;
-}
-
-/*
- * This function sets the ARPN, and LP fields of the HPTE appropriately
- * for the page size. We assume the pa is already "clean" that is properly
- * aligned for the requested page size
- */
-static inline unsigned long hpte_encode_r(unsigned long pa, int psize)
-{
- unsigned long r;
-
- /* A 4K page needs no special encoding */
- if (psize == MMU_PAGE_4K)
- return pa & HPTE_R_RPN;
- else {
- unsigned int penc = mmu_psize_defs[psize].penc;
- unsigned int shift = mmu_psize_defs[psize].shift;
- return (pa & ~((1ul << shift) - 1)) | (penc << 12);
- }
- return r;
-}
-
-/*
- * This hashes a virtual address for a 256Mb segment only for now
- */
-
-static inline unsigned long hpt_hash(unsigned long va, unsigned int shift)
-{
- return ((va >> 28) & 0x7fffffffffUL) ^ ((va & 0x0fffffffUL) >> shift);
-}
-
-extern int __hash_page_4K(unsigned long ea, unsigned long access,
- unsigned long vsid, pte_t *ptep, unsigned long trap,
- unsigned int local);
-extern int __hash_page_64K(unsigned long ea, unsigned long access,
- unsigned long vsid, pte_t *ptep, unsigned long trap,
- unsigned int local);
-struct mm_struct;
-extern int hash_huge_page(struct mm_struct *mm, unsigned long access,
- unsigned long ea, unsigned long vsid, int local,
- unsigned long trap);
-
-extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
- unsigned long pstart, unsigned long mode,
- int psize);
-
-extern void htab_initialize(void);
-extern void htab_initialize_secondary(void);
-extern void hpte_init_native(void);
-extern void hpte_init_lpar(void);
-extern void hpte_init_iSeries(void);
-extern void hpte_init_beat(void);
-
-extern void stabs_alloc(void);
-extern void slb_initialize(void);
-extern void slb_flush_and_rebolt(void);
-extern void stab_initialize(unsigned long stab);
-
-#endif /* __ASSEMBLY__ */
-
-/*
- * VSID allocation
- *
- * We first generate a 36-bit "proto-VSID". For kernel addresses this
- * is equal to the ESID, for user addresses it is:
- * (context << 15) | (esid & 0x7fff)
- *
- * The two forms are distinguishable because the top bit is 0 for user
- * addresses, whereas the top two bits are 1 for kernel addresses.
- * Proto-VSIDs with the top two bits equal to 0b10 are reserved for
- * now.
- *
- * The proto-VSIDs are then scrambled into real VSIDs with the
- * multiplicative hash:
- *
- * VSID = (proto-VSID * VSID_MULTIPLIER) % VSID_MODULUS
- * where VSID_MULTIPLIER = 268435399 = 0xFFFFFC7
- * VSID_MODULUS = 2^36-1 = 0xFFFFFFFFF
- *
- * This scramble is only well defined for proto-VSIDs below
- * 0xFFFFFFFFF, so both proto-VSID and actual VSID 0xFFFFFFFFF are
- * reserved. VSID_MULTIPLIER is prime, so in particular it is
- * co-prime to VSID_MODULUS, making this a 1:1 scrambling function.
- * Because the modulus is 2^n-1 we can compute it efficiently without
- * a divide or extra multiply (see below).
- *
- * This scheme has several advantages over older methods:
- *
- * - We have VSIDs allocated for every kernel address
- * (i.e. everything above 0xC000000000000000), except the very top
- * segment, which simplifies several things.
- *
- * - We allow for 15 significant bits of ESID and 20 bits of
- * context for user addresses. i.e. 8T (43 bits) of address space for
- * up to 1M contexts (although the page table structure and context
- * allocation will need changes to take advantage of this).
- *
- * - The scramble function gives robust scattering in the hash
- * table (at least based on some initial results). The previous
- * method was more susceptible to pathological cases giving excessive
- * hash collisions.
- */
-/*
- * WARNING - If you change these you must make sure the asm
- * implementations in slb_allocate (slb_low.S), do_stab_bolted
- * (head.S) and ASM_VSID_SCRAMBLE (below) are changed accordingly.
- *
- * You'll also need to change the precomputed VSID values in head.S
- * which are used by the iSeries firmware.
- */
-
-#define VSID_MULTIPLIER ASM_CONST(200730139) /* 28-bit prime */
-#define VSID_BITS 36
-#define VSID_MODULUS ((1UL<<VSID_BITS)-1)
-
-#define CONTEXT_BITS 19
-#define USER_ESID_BITS 16
-
-#define USER_VSID_RANGE (1UL << (USER_ESID_BITS + SID_SHIFT))
-
-/*
- * This macro generates asm code to compute the VSID scramble
- * function. Used in slb_allocate() and do_stab_bolted. The function
- * computed is: (protovsid*VSID_MULTIPLIER) % VSID_MODULUS
- *
- * rt = register continaing the proto-VSID and into which the
- * VSID will be stored
- * rx = scratch register (clobbered)
- *
- * - rt and rx must be different registers
- * - The answer will end up in the low 36 bits of rt. The higher
- * bits may contain other garbage, so you may need to mask the
- * result.
- */
-#define ASM_VSID_SCRAMBLE(rt, rx) \
- lis rx,VSID_MULTIPLIER@h; \
- ori rx,rx,VSID_MULTIPLIER@l; \
- mulld rt,rt,rx; /* rt = rt * MULTIPLIER */ \
- \
- srdi rx,rt,VSID_BITS; \
- clrldi rt,rt,(64-VSID_BITS); \
- add rt,rt,rx; /* add high and low bits */ \
- /* Now, r3 == VSID (mod 2^36-1), and lies between 0 and \
- * 2^36-1+2^28-1. That in particular means that if r3 >= \
- * 2^36-1, then r3+1 has the 2^36 bit set. So, if r3+1 has \
- * the bit clear, r3 already has the answer we want, if it \
- * doesn't, the answer is the low 36 bits of r3+1. So in all \
- * cases the answer is the low 36 bits of (r3 + ((r3+1) >> 36))*/\
- addi rx,rt,1; \
- srdi rx,rx,VSID_BITS; /* extract 2^36 bit */ \
- add rt,rt,rx
-
-
-#ifndef __ASSEMBLY__
-
-typedef unsigned long mm_context_id_t;
-
-typedef struct {
- mm_context_id_t id;
- u16 user_psize; /* page size index */
- u16 sllp; /* SLB entry page size encoding */
-#ifdef CONFIG_HUGETLB_PAGE
- u16 low_htlb_areas, high_htlb_areas;
+/* Other 32-bit. FIXME: split up the other 32-bit MMU types, and
+ * revise for arch/powerpc */
+# include <asm-ppc/mmu.h>
#endif
- unsigned long vdso_base;
-} mm_context_t;
-
-
-static inline unsigned long vsid_scramble(unsigned long protovsid)
-{
-#if 0
- /* The code below is equivalent to this function for arguments
- * < 2^VSID_BITS, which is all this should ever be called
- * with. However gcc is not clever enough to compute the
- * modulus (2^n-1) without a second multiply. */
- return ((protovsid * VSID_MULTIPLIER) % VSID_MODULUS);
-#else /* 1 */
- unsigned long x;
-
- x = protovsid * VSID_MULTIPLIER;
- x = (x >> VSID_BITS) + (x & VSID_MODULUS);
- return (x + ((x+1) >> VSID_BITS)) & VSID_MODULUS;
-#endif /* 1 */
-}
-
-/* This is only valid for addresses >= KERNELBASE */
-static inline unsigned long get_kernel_vsid(unsigned long ea)
-{
- return vsid_scramble(ea >> SID_SHIFT);
-}
-
-/* This is only valid for user addresses (which are below 2^41) */
-static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
-{
- return vsid_scramble((context << USER_ESID_BITS)
- | (ea >> SID_SHIFT));
-}
-
-#define VSID_SCRAMBLE(pvsid) (((pvsid) * VSID_MULTIPLIER) % VSID_MODULUS)
-#define KERNEL_VSID(ea) VSID_SCRAMBLE(GET_ESID(ea))
-
-/* Physical address used by some IO functions */
-typedef unsigned long phys_addr_t;
-
-
-#endif /* __ASSEMBLY */
-#endif /* CONFIG_PPC64 */
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_MMU_H_ */
Index: working-2.6/include/asm-powerpc/mmu-44x/mmu.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/include/asm-powerpc/mmu-44x/mmu.h 2007-04-19 15:27:16.000000000 +1000
@@ -0,0 +1,75 @@
+#ifndef _ASM_POWERPC_MMU_44X_MMU_H_
+#define _ASM_POWERPC_MMU_44X_MMU_H_
+
+/*
+ * PPC440 support
+ */
+#define PPC44x_MMUCR_TID 0x000000ff
+#define PPC44x_MMUCR_STS 0x00010000
+
+#define PPC44x_TLB_PAGEID 0
+#define PPC44x_TLB_XLAT 1
+#define PPC44x_TLB_ATTRIB 2
+
+/* Page identification fields */
+#define PPC44x_TLB_EPN_MASK 0xfffffc00 /* Effective Page Number */
+#define PPC44x_TLB_VALID 0x00000200 /* Valid flag */
+#define PPC44x_TLB_TS 0x00000100 /* Translation address space */
+#define PPC44x_TLB_1K 0x00000000 /* Page sizes */
+#define PPC44x_TLB_4K 0x00000010
+#define PPC44x_TLB_16K 0x00000020
+#define PPC44x_TLB_64K 0x00000030
+#define PPC44x_TLB_256K 0x00000040
+#define PPC44x_TLB_1M 0x00000050
+#define PPC44x_TLB_16M 0x00000070
+#define PPC44x_TLB_256M 0x00000090
+
+/* Translation fields */
+#define PPC44x_TLB_RPN_MASK 0xfffffc00 /* Real Page Number */
+#define PPC44x_TLB_ERPN_MASK 0x0000000f
+
+/* Storage attribute and access control fields */
+#define PPC44x_TLB_ATTR_MASK 0x0000ff80
+#define PPC44x_TLB_U0 0x00008000 /* User 0 */
+#define PPC44x_TLB_U1 0x00004000 /* User 1 */
+#define PPC44x_TLB_U2 0x00002000 /* User 2 */
+#define PPC44x_TLB_U3 0x00001000 /* User 3 */
+#define PPC44x_TLB_W 0x00000800 /* Caching is write-through */
+#define PPC44x_TLB_I 0x00000400 /* Caching is inhibited */
+#define PPC44x_TLB_M 0x00000200 /* Memory is coherent */
+#define PPC44x_TLB_G 0x00000100 /* Memory is guarded */
+#define PPC44x_TLB_E 0x00000080 /* Memory is guarded */
+
+#define PPC44x_TLB_PERM_MASK 0x0000003f
+#define PPC44x_TLB_UX 0x00000020 /* User execution */
+#define PPC44x_TLB_UW 0x00000010 /* User write */
+#define PPC44x_TLB_UR 0x00000008 /* User read */
+#define PPC44x_TLB_SX 0x00000004 /* Super execution */
+#define PPC44x_TLB_SW 0x00000002 /* Super write */
+#define PPC44x_TLB_SR 0x00000001 /* Super read */
+
+/* Number of TLB entries */
+#define PPC44x_TLB_SIZE 64
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned long long phys_addr_t;
+
+extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t);
+#define PHYS_FMT "%16Lx"
+
+typedef struct {
+ unsigned long id;
+ unsigned long vdso_base;
+} mm_context_t;
+
+#endif /* !__ASSEMBLY__ */
+
+/* TLB entry offset/size used for pinning kernel lowmem */
+#define PPC44x_PIN_SHIFT 28
+#define PPC_PIN_SIZE (1 << PPC44x_PIN_SHIFT)
+
+#define PPC44x_EARLY_TLBS 1
+
+#endif /* _ASM_POWERPC_MMU_44X_MMU_H_ */
+
Index: working-2.6/include/asm-powerpc/mmu-hash64/mmu.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ working-2.6/include/asm-powerpc/mmu-hash64/mmu.h 2007-04-19 15:19:17.000000000 +1000
@@ -0,0 +1,399 @@
+#ifndef _ASM_POWERPC_MMU_HASH64_MMU_H_
+#define _ASM_POWERPC_MMU_HASH64_MMU_H_
+/*
+ * PowerPC64 memory management structures
+ *
+ * Dave Engebretsen & Mike Corrigan <{engebret|mikejc}@us.ibm.com>
+ * PPC64 rework.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <asm/asm-compat.h>
+#include <asm/page.h>
+
+/*
+ * Segment table
+ */
+
+#define STE_ESID_V 0x80
+#define STE_ESID_KS 0x20
+#define STE_ESID_KP 0x10
+#define STE_ESID_N 0x08
+
+#define STE_VSID_SHIFT 12
+
+/* Location of cpu0's segment table */
+#define STAB0_PAGE 0x6
+#define STAB0_OFFSET (STAB0_PAGE << 12)
+#define STAB0_PHYS_ADDR (STAB0_OFFSET + PHYSICAL_START)
+
+#ifndef __ASSEMBLY__
+extern char initial_stab[];
+#endif /* ! __ASSEMBLY */
+
+/*
+ * SLB
+ */
+
+#define SLB_NUM_BOLTED 3
+#define SLB_CACHE_ENTRIES 8
+
+/* Bits in the SLB ESID word */
+#define SLB_ESID_V ASM_CONST(0x0000000008000000) /* valid */
+
+/* Bits in the SLB VSID word */
+#define SLB_VSID_SHIFT 12
+#define SLB_VSID_B ASM_CONST(0xc000000000000000)
+#define SLB_VSID_B_256M ASM_CONST(0x0000000000000000)
+#define SLB_VSID_B_1T ASM_CONST(0x4000000000000000)
+#define SLB_VSID_KS ASM_CONST(0x0000000000000800)
+#define SLB_VSID_KP ASM_CONST(0x0000000000000400)
+#define SLB_VSID_N ASM_CONST(0x0000000000000200) /* no-execute */
+#define SLB_VSID_L ASM_CONST(0x0000000000000100)
+#define SLB_VSID_C ASM_CONST(0x0000000000000080) /* class */
+#define SLB_VSID_LP ASM_CONST(0x0000000000000030)
+#define SLB_VSID_LP_00 ASM_CONST(0x0000000000000000)
+#define SLB_VSID_LP_01 ASM_CONST(0x0000000000000010)
+#define SLB_VSID_LP_10 ASM_CONST(0x0000000000000020)
+#define SLB_VSID_LP_11 ASM_CONST(0x0000000000000030)
+#define SLB_VSID_LLP (SLB_VSID_L|SLB_VSID_LP)
+
+#define SLB_VSID_KERNEL (SLB_VSID_KP)
+#define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS|SLB_VSID_C)
+
+#define SLBIE_C (0x08000000)
+
+/*
+ * Hash table
+ */
+
+#define HPTES_PER_GROUP 8
+
+#define HPTE_V_AVPN_SHIFT 7
+#define HPTE_V_AVPN ASM_CONST(0xffffffffffffff80)
+#define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT)
+#define HPTE_V_COMPARE(x,y) (!(((x) ^ (y)) & HPTE_V_AVPN))
+#define HPTE_V_BOLTED ASM_CONST(0x0000000000000010)
+#define HPTE_V_LOCK ASM_CONST(0x0000000000000008)
+#define HPTE_V_LARGE ASM_CONST(0x0000000000000004)
+#define HPTE_V_SECONDARY ASM_CONST(0x0000000000000002)
+#define HPTE_V_VALID ASM_CONST(0x0000000000000001)
+
+#define HPTE_R_PP0 ASM_CONST(0x8000000000000000)
+#define HPTE_R_TS ASM_CONST(0x4000000000000000)
+#define HPTE_R_RPN_SHIFT 12
+#define HPTE_R_RPN ASM_CONST(0x3ffffffffffff000)
+#define HPTE_R_FLAGS ASM_CONST(0x00000000000003ff)
+#define HPTE_R_PP ASM_CONST(0x0000000000000003)
+#define HPTE_R_N ASM_CONST(0x0000000000000004)
+#define HPTE_R_C ASM_CONST(0x0000000000000080)
+#define HPTE_R_R ASM_CONST(0x0000000000000100)
+
+/* Values for PP (assumes Ks=0, Kp=1) */
+/* pp0 will always be 0 for linux */
+#define PP_RWXX 0 /* Supervisor read/write, User none */
+#define PP_RWRX 1 /* Supervisor read/write, User read */
+#define PP_RWRW 2 /* Supervisor read/write, User read/write */
+#define PP_RXRX 3 /* Supervisor read, User read */
+
+#ifndef __ASSEMBLY__
+
+typedef struct {
+ unsigned long v;
+ unsigned long r;
+} hpte_t;
+
+extern hpte_t *htab_address;
+extern unsigned long htab_size_bytes;
+extern unsigned long htab_hash_mask;
+
+/*
+ * Page size definition
+ *
+ * shift : is the "PAGE_SHIFT" value for that page size
+ * sllp : is a bit mask with the value of SLB L || LP to be or'ed
+ * directly to a slbmte "vsid" value
+ * penc : is the HPTE encoding mask for the "LP" field:
+ *
+ */
+struct mmu_psize_def
+{
+ unsigned int shift; /* number of bits */
+ unsigned int penc; /* HPTE encoding */
+ unsigned int tlbiel; /* tlbiel supported for that page size */
+ unsigned long avpnm; /* bits to mask out in AVPN in the HPTE */
+ unsigned long sllp; /* SLB L||LP (exact mask to use in slbmte) */
+};
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * The kernel use the constants below to index in the page sizes array.
+ * The use of fixed constants for this purpose is better for performances
+ * of the low level hash refill handlers.
+ *
+ * A non supported page size has a "shift" field set to 0
+ *
+ * Any new page size being implemented can get a new entry in here. Whether
+ * the kernel will use it or not is a different matter though. The actual page
+ * size used by hugetlbfs is not defined here and may be made variable
+ */
+
+#define MMU_PAGE_4K 0 /* 4K */
+#define MMU_PAGE_64K 1 /* 64K */
+#define MMU_PAGE_64K_AP 2 /* 64K Admixed (in a 4K segment) */
+#define MMU_PAGE_1M 3 /* 1M */
+#define MMU_PAGE_16M 4 /* 16M */
+#define MMU_PAGE_16G 5 /* 16G */
+#define MMU_PAGE_COUNT 6
+
+#ifndef __ASSEMBLY__
+
+/*
+ * The current system page sizes
+ */
+extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
+extern int mmu_linear_psize;
+extern int mmu_virtual_psize;
+extern int mmu_vmalloc_psize;
+extern int mmu_io_psize;
+
+/*
+ * If the processor supports 64k normal pages but not 64k cache
+ * inhibited pages, we have to be prepared to switch processes
+ * to use 4k pages when they create cache-inhibited mappings.
+ * If this is the case, mmu_ci_restrictions will be set to 1.
+ */
+extern int mmu_ci_restrictions;
+
+#ifdef CONFIG_HUGETLB_PAGE
+/*
+ * The page size index of the huge pages for use by hugetlbfs
+ */
+extern int mmu_huge_psize;
+
+#endif /* CONFIG_HUGETLB_PAGE */
+
+/*
+ * This function sets the AVPN and L fields of the HPTE appropriately
+ * for the page size
+ */
+static inline unsigned long hpte_encode_v(unsigned long va, int psize)
+{
+ unsigned long v =
+ v = (va >> 23) & ~(mmu_psize_defs[psize].avpnm);
+ v <<= HPTE_V_AVPN_SHIFT;
+ if (psize != MMU_PAGE_4K)
+ v |= HPTE_V_LARGE;
+ return v;
+}
+
+/*
+ * This function sets the ARPN, and LP fields of the HPTE appropriately
+ * for the page size. We assume the pa is already "clean" that is properly
+ * aligned for the requested page size
+ */
+static inline unsigned long hpte_encode_r(unsigned long pa, int psize)
+{
+ unsigned long r;
+
+ /* A 4K page needs no special encoding */
+ if (psize == MMU_PAGE_4K)
+ return pa & HPTE_R_RPN;
+ else {
+ unsigned int penc = mmu_psize_defs[psize].penc;
+ unsigned int shift = mmu_psize_defs[psize].shift;
+ return (pa & ~((1ul << shift) - 1)) | (penc << 12);
+ }
+ return r;
+}
+
+/*
+ * This hashes a virtual address for a 256Mb segment only for now
+ */
+
+static inline unsigned long hpt_hash(unsigned long va, unsigned int shift)
+{
+ return ((va >> 28) & 0x7fffffffffUL) ^ ((va & 0x0fffffffUL) >> shift);
+}
+
+extern int __hash_page_4K(unsigned long ea, unsigned long access,
+ unsigned long vsid, pte_t *ptep, unsigned long trap,
+ unsigned int local);
+extern int __hash_page_64K(unsigned long ea, unsigned long access,
+ unsigned long vsid, pte_t *ptep, unsigned long trap,
+ unsigned int local);
+struct mm_struct;
+extern int hash_huge_page(struct mm_struct *mm, unsigned long access,
+ unsigned long ea, unsigned long vsid, int local,
+ unsigned long trap);
+
+extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
+ unsigned long pstart, unsigned long mode,
+ int psize);
+
+extern void htab_initialize(void);
+extern void htab_initialize_secondary(void);
+extern void hpte_init_native(void);
+extern void hpte_init_lpar(void);
+extern void hpte_init_iSeries(void);
+extern void hpte_init_beat(void);
+
+extern void stabs_alloc(void);
+extern void slb_initialize(void);
+extern void slb_flush_and_rebolt(void);
+extern void stab_initialize(unsigned long stab);
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * VSID allocation
+ *
+ * We first generate a 36-bit "proto-VSID". For kernel addresses this
+ * is equal to the ESID, for user addresses it is:
+ * (context << 15) | (esid & 0x7fff)
+ *
+ * The two forms are distinguishable because the top bit is 0 for user
+ * addresses, whereas the top two bits are 1 for kernel addresses.
+ * Proto-VSIDs with the top two bits equal to 0b10 are reserved for
+ * now.
+ *
+ * The proto-VSIDs are then scrambled into real VSIDs with the
+ * multiplicative hash:
+ *
+ * VSID = (proto-VSID * VSID_MULTIPLIER) % VSID_MODULUS
+ * where VSID_MULTIPLIER = 268435399 = 0xFFFFFC7
+ * VSID_MODULUS = 2^36-1 = 0xFFFFFFFFF
+ *
+ * This scramble is only well defined for proto-VSIDs below
+ * 0xFFFFFFFFF, so both proto-VSID and actual VSID 0xFFFFFFFFF are
+ * reserved. VSID_MULTIPLIER is prime, so in particular it is
+ * co-prime to VSID_MODULUS, making this a 1:1 scrambling function.
+ * Because the modulus is 2^n-1 we can compute it efficiently without
+ * a divide or extra multiply (see below).
+ *
+ * This scheme has several advantages over older methods:
+ *
+ * - We have VSIDs allocated for every kernel address
+ * (i.e. everything above 0xC000000000000000), except the very top
+ * segment, which simplifies several things.
+ *
+ * - We allow for 15 significant bits of ESID and 20 bits of
+ * context for user addresses. i.e. 8T (43 bits) of address space for
+ * up to 1M contexts (although the page table structure and context
+ * allocation will need changes to take advantage of this).
+ *
+ * - The scramble function gives robust scattering in the hash
+ * table (at least based on some initial results). The previous
+ * method was more susceptible to pathological cases giving excessive
+ * hash collisions.
+ */
+/*
+ * WARNING - If you change these you must make sure the asm
+ * implementations in slb_allocate (slb_low.S), do_stab_bolted
+ * (head.S) and ASM_VSID_SCRAMBLE (below) are changed accordingly.
+ *
+ * You'll also need to change the precomputed VSID values in head.S
+ * which are used by the iSeries firmware.
+ */
+
+#define VSID_MULTIPLIER ASM_CONST(200730139) /* 28-bit prime */
+#define VSID_BITS 36
+#define VSID_MODULUS ((1UL<<VSID_BITS)-1)
+
+#define CONTEXT_BITS 19
+#define USER_ESID_BITS 16
+
+#define USER_VSID_RANGE (1UL << (USER_ESID_BITS + SID_SHIFT))
+
+/*
+ * This macro generates asm code to compute the VSID scramble
+ * function. Used in slb_allocate() and do_stab_bolted. The function
+ * computed is: (protovsid*VSID_MULTIPLIER) % VSID_MODULUS
+ *
+ * rt = register continaing the proto-VSID and into which the
+ * VSID will be stored
+ * rx = scratch register (clobbered)
+ *
+ * - rt and rx must be different registers
+ * - The answer will end up in the low 36 bits of rt. The higher
+ * bits may contain other garbage, so you may need to mask the
+ * result.
+ */
+#define ASM_VSID_SCRAMBLE(rt, rx) \
+ lis rx,VSID_MULTIPLIER@h; \
+ ori rx,rx,VSID_MULTIPLIER@l; \
+ mulld rt,rt,rx; /* rt = rt * MULTIPLIER */ \
+ \
+ srdi rx,rt,VSID_BITS; \
+ clrldi rt,rt,(64-VSID_BITS); \
+ add rt,rt,rx; /* add high and low bits */ \
+ /* Now, r3 == VSID (mod 2^36-1), and lies between 0 and \
+ * 2^36-1+2^28-1. That in particular means that if r3 >= \
+ * 2^36-1, then r3+1 has the 2^36 bit set. So, if r3+1 has \
+ * the bit clear, r3 already has the answer we want, if it \
+ * doesn't, the answer is the low 36 bits of r3+1. So in all \
+ * cases the answer is the low 36 bits of (r3 + ((r3+1) >> 36))*/\
+ addi rx,rt,1; \
+ srdi rx,rx,VSID_BITS; /* extract 2^36 bit */ \
+ add rt,rt,rx
+
+
+#ifndef __ASSEMBLY__
+
+typedef unsigned long mm_context_id_t;
+
+typedef struct {
+ mm_context_id_t id;
+ u16 user_psize; /* page size index */
+ u16 sllp; /* SLB entry page size encoding */
+#ifdef CONFIG_HUGETLB_PAGE
+ u16 low_htlb_areas, high_htlb_areas;
+#endif
+ unsigned long vdso_base;
+} mm_context_t;
+
+
+static inline unsigned long vsid_scramble(unsigned long protovsid)
+{
+#if 0
+ /* The code below is equivalent to this function for arguments
+ * < 2^VSID_BITS, which is all this should ever be called
+ * with. However gcc is not clever enough to compute the
+ * modulus (2^n-1) without a second multiply. */
+ return ((protovsid * VSID_MULTIPLIER) % VSID_MODULUS);
+#else /* 1 */
+ unsigned long x;
+
+ x = protovsid * VSID_MULTIPLIER;
+ x = (x >> VSID_BITS) + (x & VSID_MODULUS);
+ return (x + ((x+1) >> VSID_BITS)) & VSID_MODULUS;
+#endif /* 1 */
+}
+
+/* This is only valid for addresses >= KERNELBASE */
+static inline unsigned long get_kernel_vsid(unsigned long ea)
+{
+ return vsid_scramble(ea >> SID_SHIFT);
+}
+
+/* This is only valid for user addresses (which are below 2^41) */
+static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
+{
+ return vsid_scramble((context << USER_ESID_BITS)
+ | (ea >> SID_SHIFT));
+}
+
+#define VSID_SCRAMBLE(pvsid) (((pvsid) * VSID_MULTIPLIER) % VSID_MODULUS)
+#define KERNEL_VSID(ea) VSID_SCRAMBLE(GET_ESID(ea))
+
+/* Physical address used by some IO functions */
+typedef unsigned long phys_addr_t;
+
+#endif /* __ASSEMBLY */
+
+#endif /* _ASM_POWERPC_MMU_HASH64_MMU_H_ */
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* [PATCH 1/7] Rip out the existing powerpc msi stubs
From: Michael Ellerman @ 2007-04-19 7:35 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linux-pci
Rip out the existing powerpc msi stubs. These were the start of an
implementation based on ppc_md calls, but were never used in mainline.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
---
arch/powerpc/kernel/irq.c | 27 ---------------------------
include/asm-powerpc/machdep.h | 5 -----
2 files changed, 32 deletions(-)
Index: msi-new/arch/powerpc/kernel/irq.c
===================================================================
--- msi-new.orig/arch/powerpc/kernel/irq.c
+++ msi-new/arch/powerpc/kernel/irq.c
@@ -947,33 +947,6 @@ arch_initcall(irq_late_init);
#endif /* CONFIG_PPC_MERGE */
-#ifdef CONFIG_PCI_MSI
-int pci_enable_msi(struct pci_dev * pdev)
-{
- if (ppc_md.enable_msi)
- return ppc_md.enable_msi(pdev);
- else
- return -1;
-}
-EXPORT_SYMBOL(pci_enable_msi);
-
-void pci_disable_msi(struct pci_dev * pdev)
-{
- if (ppc_md.disable_msi)
- ppc_md.disable_msi(pdev);
-}
-EXPORT_SYMBOL(pci_disable_msi);
-
-void pci_scan_msi_device(struct pci_dev *dev) {}
-int pci_enable_msix(struct pci_dev* dev, struct msix_entry *entries, int nvec) {return -1;}
-void pci_disable_msix(struct pci_dev *dev) {}
-void msi_remove_pci_irq_vectors(struct pci_dev *dev) {}
-void pci_no_msi(void) {}
-EXPORT_SYMBOL(pci_enable_msix);
-EXPORT_SYMBOL(pci_disable_msix);
-
-#endif
-
#ifdef CONFIG_PPC64
static int __init setup_noirqdistrib(char *str)
{
Index: msi-new/include/asm-powerpc/machdep.h
===================================================================
--- msi-new.orig/include/asm-powerpc/machdep.h
+++ msi-new/include/asm-powerpc/machdep.h
@@ -243,11 +243,6 @@ struct machdep_calls {
*/
void (*machine_kexec)(struct kimage *image);
#endif /* CONFIG_KEXEC */
-
-#ifdef CONFIG_PCI_MSI
- int (*enable_msi)(struct pci_dev *pdev);
- void (*disable_msi)(struct pci_dev *pdev);
-#endif /* CONFIG_PCI_MSI */
};
extern void power4_idle(void);
^ permalink raw reply
* [PATCH 2/7] Powerpc MSI infrastructure
From: Michael Ellerman @ 2007-04-19 7:35 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linux-pci
In-Reply-To: <1176968125.531108.326168797246.qpush@cradle>
This patch provides the architecture specific hooks to support MSI on
powerpc. We implement the newly added arch_setup_msi_irqs() and
arch_teardown_msi_irqs(), and then delegate to ppc_md routines.
Platforms that don't implement MSI will leave the ppc_md calls blank,
arch_msi_check_device() will detect this and return ENOSYS. Drivers
should detect this error and continue to use LSI.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/kernel/Makefile | 1 +
arch/powerpc/kernel/msi.c | 38 ++++++++++++++++++++++++++++++++++++++
include/asm-powerpc/machdep.h | 6 ++++++
4 files changed, 46 insertions(+)
Index: msi-new/arch/powerpc/Kconfig
===================================================================
--- msi-new.orig/arch/powerpc/Kconfig
+++ msi-new/arch/powerpc/Kconfig
@@ -662,6 +662,7 @@ config PCI
&& !PPC_85xx && !PPC_86xx
default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS
default PCI_QSPAN if !4xx && !CPM2 && 8xx
+ select ARCH_SUPPORTS_MSI
help
Find out whether your system includes a PCI bus. PCI is the name of
a bus system, i.e. the way the CPU talks to the other stuff inside
Index: msi-new/arch/powerpc/kernel/Makefile
===================================================================
--- msi-new.orig/arch/powerpc/kernel/Makefile
+++ msi-new/arch/powerpc/kernel/Makefile
@@ -66,6 +66,7 @@ obj-$(CONFIG_MODULES) += $(module-y)
pci64-$(CONFIG_PPC64) += pci_64.o pci_dn.o
pci32-$(CONFIG_PPC32) := pci_32.o
obj-$(CONFIG_PCI) += $(pci64-y) $(pci32-y)
+obj-$(CONFIG_PCI_MSI) += msi.o
kexec-$(CONFIG_PPC64) := machine_kexec_64.o
kexec-$(CONFIG_PPC32) := machine_kexec_32.o
obj-$(CONFIG_KEXEC) += machine_kexec.o crash.o $(kexec-y)
Index: msi-new/arch/powerpc/kernel/msi.c
===================================================================
--- /dev/null
+++ msi-new/arch/powerpc/kernel/msi.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2006-2007, Michael Ellerman, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/msi.h>
+
+#include <asm/machdep.h>
+
+int arch_msi_check_device(struct pci_dev* dev, int nvec, int type)
+{
+ if (ppc_md.msi_check_device) {
+ pr_debug("msi: Using platform check routine.\n");
+ return ppc_md.msi_check_device(dev, nvec, type);
+ }
+
+ if (!ppc_md.setup_msi_irqs || !ppc_md.teardown_msi_irqs) {
+ pr_debug("msi: Platform doesn't provide MSI callbacks.\n");
+ return -ENOSYS;
+ }
+
+ return 0;
+}
+
+int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+ return ppc_md.setup_msi_irqs(dev, nvec, type);
+}
+
+void arch_teardown_msi_irqs(struct pci_dev *dev)
+{
+ return ppc_md.teardown_msi_irqs(dev);
+}
Index: msi-new/include/asm-powerpc/machdep.h
===================================================================
--- msi-new.orig/include/asm-powerpc/machdep.h
+++ msi-new/include/asm-powerpc/machdep.h
@@ -115,6 +115,12 @@ struct machdep_calls {
/* To setup PHBs when using automatic OF platform driver for PCI */
int (*pci_setup_phb)(struct pci_controller *host);
+#ifdef CONFIG_PCI_MSI
+ int (*msi_check_device)(struct pci_dev* dev, int nvec, int type);
+ int (*setup_msi_irqs)(struct pci_dev *dev, int nvec, int type);
+ void (*teardown_msi_irqs)(struct pci_dev *dev);
+#endif
+
void (*restart)(char *cmd);
void (*power_off)(void);
void (*halt)(void);
^ permalink raw reply
* [PATCH 3/7] RTAS MSI implementation
From: Michael Ellerman @ 2007-04-19 7:35 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linux-pci
In-Reply-To: <1176968125.531108.326168797246.qpush@cradle>
Implements MSI support via RTAS. For now we assumes that if the required
RTAS tokens for MSI are present, then we want to use the RTAS MSI
routines.
When RTAS is managing MSIs for us, it will/may enable MSI on devices that
support it by default. This is contrary to the Linux model where a device
is in LSI mode until the driver requests MSIs.
To remedy this we add a pci_irq_fixup call, which disables MSI if they've
been assigned by firmware and the device also supports LSI. Devices that
don't support LSI at all will be left as is, drivers are still expected
to call pci_enable_msi() before using the device.
At the moment there is no pci_irq_fixup on pSeries, so we can just set it
unconditionally. If other platforms use the RTAS MSI backend they'll need
to check that still holds.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
---
arch/powerpc/platforms/pseries/Makefile | 1
arch/powerpc/platforms/pseries/msi.c | 266 ++++++++++++++++++++++++++++++++
2 files changed, 267 insertions(+)
Index: msi-new/arch/powerpc/platforms/pseries/Makefile
===================================================================
--- msi-new.orig/arch/powerpc/platforms/pseries/Makefile
+++ msi-new/arch/powerpc/platforms/pseries/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_SCANLOG) += scanlog.o
obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o
obj-$(CONFIG_KEXEC) += kexec.o
obj-$(CONFIG_PCI) += pci.o pci_dlpar.o
+obj-$(CONFIG_PCI_MSI) += msi.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug-cpu.o
Index: msi-new/arch/powerpc/platforms/pseries/msi.c
===================================================================
--- /dev/null
+++ msi-new/arch/powerpc/platforms/pseries/msi.c
@@ -0,0 +1,266 @@
+/*
+ * Copyright 2006 Jake Moilanen <moilanen@austin.ibm.com>, IBM Corp.
+ * Copyright 2006 Michael Ellerman, IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ */
+
+#include <linux/device.h>
+#include <linux/irq.h>
+#include <linux/msi.h>
+
+#include <asm/rtas.h>
+#include <asm/hw_irq.h>
+#include <asm/ppc-pci.h>
+
+static int query_token, change_token;
+
+#define RTAS_QUERY_FN 0
+#define RTAS_CHANGE_FN 1
+#define RTAS_RESET_FN 2
+#define RTAS_CHANGE_MSI_FN 3
+#define RTAS_CHANGE_MSIX_FN 4
+
+static struct pci_dn *get_pdn(struct pci_dev *pdev)
+{
+ struct device_node *dn;
+ struct pci_dn *pdn;
+
+ dn = pci_device_to_OF_node(pdev);
+ if (!dn) {
+ dev_dbg(&pdev->dev, "rtas_msi: No OF device node\n");
+ return NULL;
+ }
+
+ pdn = PCI_DN(dn);
+ if (!pdn) {
+ dev_dbg(&pdev->dev, "rtas_msi: No PCI DN\n");
+ return NULL;
+ }
+
+ return pdn;
+}
+
+/* RTAS Helpers */
+
+static int rtas_change_msi(struct pci_dn *pdn, u32 func, u32 num_irqs)
+{
+ u32 addr, seq_num, rtas_ret[3];
+ unsigned long buid;
+ int rc;
+
+ addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
+ buid = pdn->phb->buid;
+
+ seq_num = 1;
+ do {
+ if (func == RTAS_CHANGE_MSI_FN || func == RTAS_CHANGE_MSIX_FN)
+ rc = rtas_call(change_token, 6, 4, rtas_ret, addr,
+ BUID_HI(buid), BUID_LO(buid),
+ func, num_irqs, seq_num);
+ else
+ rc = rtas_call(change_token, 6, 3, rtas_ret, addr,
+ BUID_HI(buid), BUID_LO(buid),
+ func, num_irqs, seq_num);
+
+ seq_num = rtas_ret[1];
+ } while (rtas_busy_delay(rc));
+
+ if (rc == 0) /* Success */
+ rc = rtas_ret[0];
+
+ pr_debug("rtas_msi: ibm,change_msi(func=%d,num=%d) = (%d)\n",
+ func, num_irqs, rc);
+
+ return rc;
+}
+
+static void rtas_disable_msi(struct pci_dev *pdev)
+{
+ struct pci_dn *pdn;
+
+ pdn = get_pdn(pdev);
+ if (!pdn)
+ return;
+
+ if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0) != 0)
+ pr_debug("rtas_msi: Setting MSIs to 0 failed!\n");
+}
+
+static int rtas_query_irq_number(struct pci_dn *pdn, int offset)
+{
+ u32 addr, rtas_ret[2];
+ unsigned long buid;
+ int rc;
+
+ addr = rtas_config_addr(pdn->busno, pdn->devfn, 0);
+ buid = pdn->phb->buid;
+
+ do {
+ rc = rtas_call(query_token, 4, 3, rtas_ret, addr,
+ BUID_HI(buid), BUID_LO(buid), offset);
+ } while (rtas_busy_delay(rc));
+
+ if (rc) {
+ pr_debug("rtas_msi: error (%d) querying source number\n", rc);
+ return rc;
+ }
+
+ return rtas_ret[0];
+}
+
+static void rtas_teardown_msi_irqs(struct pci_dev *pdev)
+{
+ struct msi_desc *entry;
+
+ list_for_each_entry(entry, &pdev->msi_list, list) {
+ set_irq_msi(entry->irq, NULL);
+ irq_dispose_mapping(entry->irq);
+ }
+
+ rtas_disable_msi(pdev);
+}
+
+static int check_req_msi(struct pci_dev *pdev, int nvec)
+{
+ struct device_node *dn;
+ struct pci_dn *pdn;
+ const u32 *req_msi;
+
+ pdn = get_pdn(pdev);
+ if (!pdn)
+ return -ENODEV;
+
+ dn = pdn->node;
+
+ req_msi = of_get_property(dn, "ibm,req#msi", NULL);
+ if (!req_msi) {
+ pr_debug("rtas_msi: No ibm,req#msi on %s\n", dn->full_name);
+ return -ENOENT;
+ }
+
+ if (*req_msi < nvec) {
+ pr_debug("rtas_msi: ibm,req#msi requests < %d MSIs\n", nvec);
+ return -ENOSPC;
+ }
+
+ return 0;
+}
+
+static int rtas_msi_check_device(struct pci_dev *pdev, int nvec, int type)
+{
+ if (type == PCI_CAP_ID_MSIX)
+ pr_debug("rtas_msi: MSI-X untested, trying anyway.\n");
+
+ return check_req_msi(pdev, nvec);
+}
+
+static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
+{
+ struct pci_dn *pdn;
+ int hwirq, virq, i, rc;
+ struct msi_desc *entry;
+
+ pdn = get_pdn(pdev);
+ if (!pdn)
+ return -ENODEV;
+
+ /*
+ * Try the new more explicit firmware interface, if that fails fall
+ * back to the old interface. The old interface is known to never
+ * return MSI-Xs.
+ */
+ if (type == PCI_CAP_ID_MSI) {
+ rc = rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, nvec);
+
+ if (rc != nvec) {
+ pr_debug("rtas_msi: trying the old firmware call.\n");
+ rc = rtas_change_msi(pdn, RTAS_CHANGE_FN, nvec);
+ }
+ } else
+ rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec);
+
+ if (rc != nvec) {
+ pr_debug("rtas_msi: rtas_change_msi() failed\n");
+
+ /*
+ * In case of an error it's not clear whether the device is
+ * left with MSI enabled or not, so we explicitly disable.
+ */
+ goto out_free;
+ }
+
+ i = 0;
+ list_for_each_entry(entry, &pdev->msi_list, list) {
+ hwirq = rtas_query_irq_number(pdn, i);
+ if (hwirq < 0) {
+ rc = hwirq;
+ pr_debug("rtas_msi: error (%d) getting hwirq\n", rc);
+ goto out_free;
+ }
+
+ virq = irq_create_mapping(NULL, hwirq);
+
+ if (virq == NO_IRQ) {
+ pr_debug("rtas_msi: Failed mapping hwirq %d\n", hwirq);
+ rc = -ENOSPC;
+ goto out_free;
+ }
+
+ dev_dbg(&pdev->dev, "rtas_msi: allocated virq %d\n", virq);
+ set_irq_msi(virq, entry);
+ unmask_msi_irq(virq);
+ }
+
+ return 0;
+
+ out_free:
+ rtas_teardown_msi_irqs(pdev);
+ return rc;
+}
+
+static void rtas_msi_pci_irq_fixup(struct pci_dev *pdev)
+{
+ /* No LSI -> leave MSIs (if any) configured */
+ if (pdev->irq == NO_IRQ) {
+ dev_dbg(&pdev->dev, "rtas_msi: no LSI, nothing to do.\n");
+ return;
+ }
+
+ /* No MSI -> MSIs can't have been assigned by fw, leave LSI */
+ if (check_req_msi(pdev, 1)) {
+ dev_dbg(&pdev->dev, "rtas_msi: no req#msi, nothing to do.\n");
+ return;
+ }
+
+ dev_dbg(&pdev->dev, "rtas_msi: disabling existing MSI.\n");
+ rtas_disable_msi(pdev);
+}
+
+static int rtas_msi_init(void)
+{
+ query_token = rtas_token("ibm,query-interrupt-source-number");
+ change_token = rtas_token("ibm,change-msi");
+
+ if ((query_token == RTAS_UNKNOWN_SERVICE) ||
+ (change_token == RTAS_UNKNOWN_SERVICE)) {
+ pr_debug("rtas_msi: no RTAS tokens, no MSI support.\n");
+ return -1;
+ }
+
+ pr_debug("rtas_msi: Registering RTAS MSI callbacks.\n");
+
+ ppc_md.setup_msi_irqs = rtas_setup_msi_irqs;
+ ppc_md.teardown_msi_irqs = rtas_teardown_msi_irqs;
+ ppc_md.msi_check_device = rtas_msi_check_device;
+
+ WARN_ON(ppc_md.pci_irq_fixup);
+ ppc_md.pci_irq_fixup = rtas_msi_pci_irq_fixup;
+
+ return 0;
+}
+arch_initcall(rtas_msi_init);
^ permalink raw reply
* [PATCH 4/7] Tell Phyp we support MSI
From: Michael Ellerman @ 2007-04-19 7:35 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linux-pci
In-Reply-To: <1176968125.531108.326168797246.qpush@cradle>
Tell Phyp we support MSI via the client architecture support mechanism.
Signed-off-by: Jake Moilanen <moilanen@austin.ibm.com>
---
arch/powerpc/kernel/prom_init.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
Index: msi-new/arch/powerpc/kernel/prom_init.c
===================================================================
--- msi-new.orig/arch/powerpc/kernel/prom_init.c
+++ msi-new/arch/powerpc/kernel/prom_init.c
@@ -635,6 +635,12 @@ static void __init early_cmdline_parse(v
/* ibm,dynamic-reconfiguration-memory property supported */
#define OV5_DRCONF_MEMORY 0x20
#define OV5_LARGE_PAGES 0x10 /* large pages supported */
+/* PCIe/MSI support. Without MSI full PCIe is not supported */
+#ifdef CONFIG_PCI_MSI
+#define OV5_MSI 0x01 /* PCIe/MSI support */
+#else
+#define OV5_MSI 0x00
+#endif /* CONFIG_PCI_MSI */
/*
* The architecture vector has an array of PVR mask/value pairs,
@@ -679,7 +685,7 @@ static unsigned char ibm_architecture_ve
/* option vector 5: PAPR/OF options */
3 - 2, /* length */
0, /* don't ignore, don't halt */
- OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY,
+ OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY | OV5_MSI,
};
/* Old method - ELF header with PT_NOTE sections */
^ permalink raw reply
* [PATCH 5/7] Enable MSI mappings for MPIC
From: Michael Ellerman @ 2007-04-19 7:35 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linux-pci
In-Reply-To: <1176968125.531108.326168797246.qpush@cradle>
On some Apple machines the HT MSI mappings are not enabled by firmware, so
we need to do it by hand.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
---
arch/powerpc/sysdev/mpic.c | 45 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
Index: msi-new/arch/powerpc/sysdev/mpic.c
===================================================================
--- msi-new.orig/arch/powerpc/sysdev/mpic.c
+++ msi-new/arch/powerpc/sysdev/mpic.c
@@ -379,6 +379,50 @@ static void mpic_shutdown_ht_interrupt(s
spin_unlock_irqrestore(&mpic->fixup_lock, flags);
}
+#ifdef CONFIG_PCI_MSI
+static void __init mpic_scan_ht_msi(struct mpic *mpic, u8 __iomem *devbase,
+ unsigned int devfn)
+{
+ u8 __iomem *base;
+ u8 pos, flags;
+ u64 addr = 0;
+
+ for (pos = readb(devbase + PCI_CAPABILITY_LIST); pos != 0;
+ pos = readb(devbase + pos + PCI_CAP_LIST_NEXT)) {
+ u8 id = readb(devbase + pos + PCI_CAP_LIST_ID);
+ if (id == PCI_CAP_ID_HT) {
+ id = readb(devbase + pos + 3);
+ if ((id & HT_5BIT_CAP_MASK) == HT_CAPTYPE_MSI_MAPPING)
+ break;
+ }
+ }
+
+ if (pos == 0)
+ return;
+
+ base = devbase + pos;
+
+ flags = readb(base + HT_MSI_FLAGS);
+ if (!(flags & HT_MSI_FLAGS_FIXED)) {
+ addr = readl(base + HT_MSI_ADDR_LO) & HT_MSI_ADDR_LO_MASK;
+ addr = addr | ((u64)readl(base + HT_MSI_ADDR_HI) << 32);
+ }
+
+ printk(KERN_DEBUG "mpic: - HT:%02x.%x %s MSI mapping found @ 0x%lx\n",
+ PCI_SLOT(devfn), PCI_FUNC(devfn),
+ flags & HT_MSI_FLAGS_ENABLE ? "enabled" : "disabled", addr);
+
+ if (!(flags & HT_MSI_FLAGS_ENABLE))
+ writeb(flags | HT_MSI_FLAGS_ENABLE, base + HT_MSI_FLAGS);
+}
+#else
+static void __init mpic_scan_ht_msi(struct mpic *mpic, u8 __iomem *devbase,
+ unsigned int devfn)
+{
+ return;
+}
+#endif
+
static void __init mpic_scan_ht_pic(struct mpic *mpic, u8 __iomem *devbase,
unsigned int devfn, u32 vdid)
{
@@ -470,6 +514,7 @@ static void __init mpic_scan_ht_pics(str
goto next;
mpic_scan_ht_pic(mpic, devbase, devfn, l);
+ mpic_scan_ht_msi(mpic, devbase, devfn);
next:
/* next device, if function 0 */
^ permalink raw reply
* [PATCH 6/7] MPIC MSI allocator
From: Michael Ellerman @ 2007-04-19 7:35 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linux-pci
In-Reply-To: <1176968125.531108.326168797246.qpush@cradle>
To support MSI on MPIC we need a way to reserve and allocate hardware irq
numbers, this patch implements an allocator for that.
New firmware platforms must define a "msi-available-ranges" property on their
MPIC node for MSI to work. For BROKEN_U3 we do a best-guess setup.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
---
arch/powerpc/sysdev/Makefile | 5 -
arch/powerpc/sysdev/mpic.c | 4
arch/powerpc/sysdev/mpic.h | 24 +++++
arch/powerpc/sysdev/mpic_msi.c | 175 +++++++++++++++++++++++++++++++++++++++++
include/asm-powerpc/mpic.h | 11 ++
5 files changed, 218 insertions(+), 1 deletion(-)
Index: msi-new/arch/powerpc/sysdev/Makefile
===================================================================
--- msi-new.orig/arch/powerpc/sysdev/Makefile
+++ msi-new/arch/powerpc/sysdev/Makefile
@@ -2,7 +2,10 @@ ifeq ($(CONFIG_PPC64),y)
EXTRA_CFLAGS += -mno-minimal-toc
endif
-obj-$(CONFIG_MPIC) += mpic.o
+mpic-obj-y := mpic.o
+mpic-obj-$(CONFIG_PCI_MSI) += mpic_msi.o
+obj-$(CONFIG_MPIC) += $(mpic-obj-y)
+
obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o
obj-$(CONFIG_PPC_MPC106) += grackle.o
obj-$(CONFIG_PPC_DCR) += dcr.o
Index: msi-new/arch/powerpc/sysdev/mpic.c
===================================================================
--- msi-new.orig/arch/powerpc/sysdev/mpic.c
+++ msi-new/arch/powerpc/sysdev/mpic.c
@@ -36,6 +36,8 @@
#include <asm/mpic.h>
#include <asm/smp.h>
+#include "mpic.h"
+
#ifdef DEBUG
#define DBG(fmt...) printk(fmt)
#else
@@ -879,6 +881,8 @@ static int mpic_host_map(struct irq_host
if (hw >= mpic->irq_count)
return -EINVAL;
+ mpic_msi_reserve_hwirq(mpic, hw);
+
/* Default chip */
chip = &mpic->hc_irq;
Index: msi-new/arch/powerpc/sysdev/mpic.h
===================================================================
--- /dev/null
+++ msi-new/arch/powerpc/sysdev/mpic.h
@@ -0,0 +1,24 @@
+#ifndef _POWERPC_SYSDEV_MPIC_H
+#define _POWERPC_SYSDEV_MPIC_H
+
+/*
+ * Copyright 2006-2007, Michael Ellerman, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ */
+
+#ifdef CONFIG_PCI_MSI
+extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq);
+#else
+static inline void mpic_msi_reserve_hwirq(struct mpic *mpic,
+ irq_hw_number_t hwirq)
+{
+ return;
+}
+#endif
+
+#endif /* _POWERPC_SYSDEV_MPIC_H */
Index: msi-new/arch/powerpc/sysdev/mpic_msi.c
===================================================================
--- /dev/null
+++ msi-new/arch/powerpc/sysdev/mpic_msi.c
@@ -0,0 +1,175 @@
+/*
+ * Copyright 2006-2007, Michael Ellerman, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ */
+
+#include <linux/irq.h>
+#include <linux/bootmem.h>
+#include <linux/bitmap.h>
+#include <linux/msi.h>
+#include <asm/mpic.h>
+#include <asm/prom.h>
+#include <asm/hw_irq.h>
+#include <asm/ppc-pci.h>
+
+
+static void __mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq)
+{
+ pr_debug("mpic: reserving hwirq 0x%lx\n", hwirq);
+ bitmap_allocate_region(mpic->hwirq_bitmap, hwirq, 0);
+}
+
+void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq)
+{
+ unsigned long flags;
+
+ /* The mpic calls this even when there is no allocator setup */
+ if (!mpic->hwirq_bitmap)
+ return;
+
+ spin_lock_irqsave(&mpic->bitmap_lock, flags);
+ __mpic_msi_reserve_hwirq(mpic, hwirq);
+ spin_unlock_irqrestore(&mpic->bitmap_lock, flags);
+}
+
+irq_hw_number_t mpic_msi_alloc_hwirqs(struct mpic *mpic, int num)
+{
+ unsigned long flags;
+ int offset, order = fls(num) - 1;
+
+ spin_lock_irqsave(&mpic->bitmap_lock, flags);
+ /*
+ * This is fast, but stricter than we need. We might want to add
+ * a fallback routine which does a linear search with no alignment.
+ */
+ offset = bitmap_find_free_region(mpic->hwirq_bitmap, mpic->irq_count,
+ order);
+ spin_unlock_irqrestore(&mpic->bitmap_lock, flags);
+
+ pr_debug("mpic: allocated 0x%x (2^%d) at offset 0x%x\n",
+ num, order, offset);
+
+ return offset;
+}
+
+void mpic_msi_free_hwirqs(struct mpic *mpic, int offset, int num)
+{
+ unsigned long flags;
+ int order = fls(num) - 1;
+
+ pr_debug("mpic: freeing 0x%x (2^%d) at offset 0x%x\n",
+ num, order, offset);
+
+ spin_lock_irqsave(&mpic->bitmap_lock, flags);
+ bitmap_release_region(mpic->hwirq_bitmap, offset, order);
+ spin_unlock_irqrestore(&mpic->bitmap_lock, flags);
+}
+
+#ifdef CONFIG_MPIC_BROKEN_U3
+static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic)
+{
+ irq_hw_number_t hwirq;
+ struct irq_host_ops *ops = mpic->irqhost->ops;
+ struct device_node *np;
+ int flags, index, i;
+ struct of_irq oirq;
+
+ pr_debug("mpic: found U3, guessing msi allocator setup\n");
+
+ /* Reserve source numbers we know are reserved in the HW */
+ for (i = 0; i < 8; i++) __mpic_msi_reserve_hwirq(mpic, i);
+ for (i = 42; i < 46; i++) __mpic_msi_reserve_hwirq(mpic, i);
+ for (i = 100; i < 105; i++) __mpic_msi_reserve_hwirq(mpic, i);
+
+ np = NULL;
+ while ((np = of_find_all_nodes(np))) {
+ pr_debug("mpic: mapping hwirqs for %s\n", np->full_name);
+
+ index = 0;
+ while (of_irq_map_one(np, index++, &oirq) == 0) {
+ ops->xlate(mpic->irqhost, NULL, oirq.specifier,
+ oirq.size, &hwirq, &flags);
+ __mpic_msi_reserve_hwirq(mpic, hwirq);
+ }
+ }
+
+ return 0;
+}
+#else
+static int mpic_msi_reserve_u3_hwirqs(struct mpic *mpic) { return -1; }
+#endif
+
+static int mpic_msi_reserve_dt_hwirqs(struct mpic *mpic)
+{
+ int i, len;
+ const u32 *p;
+
+ p = of_get_property(mpic->of_node, "msi-available-ranges", &len);
+ if (!p) {
+ pr_debug("mpic: no msi-available-ranges property found on %s\n",
+ mpic->of_node->full_name);
+ return -ENODEV;
+ }
+
+ if (len % 8 != 0) {
+ printk(KERN_WARNING "mpic: Malformed msi-available-ranges "
+ "property on %s\n", mpic->of_node->full_name);
+ return -EINVAL;
+ }
+
+ bitmap_allocate_region(mpic->hwirq_bitmap, 0,
+ fls(mpic->irq_count) - 1);
+
+ /* Format is: (<u32 start> <u32 count>)+ */
+ len /= sizeof(u32);
+ for (i = 0; i < len / 2; i++, p += 2)
+ mpic_msi_free_hwirqs(mpic, *p, *(p + 1));
+
+ return 0;
+}
+
+int mpic_msi_init_allocator(struct mpic *mpic)
+{
+ int rc, size;
+
+ BUG_ON(mpic->hwirq_bitmap);
+ spin_lock_init(&mpic->bitmap_lock);
+
+ size = mpic->irq_count / 8;
+ pr_debug("mpic: allocator bitmap size is 0x%x bytes\n", size);
+
+ if (mem_init_done)
+ mpic->hwirq_bitmap = kmalloc(size, GFP_KERNEL);
+ else
+ mpic->hwirq_bitmap = alloc_bootmem(size);
+
+ if (!mpic->hwirq_bitmap) {
+ pr_debug("mpic: ENOMEM allocating allocator bitmap!\n");
+ return -ENOMEM;
+ }
+
+ memset(mpic->hwirq_bitmap, 0, size);
+
+ rc = mpic_msi_reserve_dt_hwirqs(mpic);
+ if (rc) {
+ if (mpic->flags & MPIC_BROKEN_U3)
+ rc = mpic_msi_reserve_u3_hwirqs(mpic);
+
+ if (rc)
+ goto out_free;
+ }
+
+ return 0;
+
+ out_free:
+ if (mem_init_done)
+ kfree(mpic->hwirq_bitmap);
+
+ mpic->hwirq_bitmap = NULL;
+ return rc;
+}
Index: msi-new/include/asm-powerpc/mpic.h
===================================================================
--- msi-new.orig/include/asm-powerpc/mpic.h
+++ msi-new/include/asm-powerpc/mpic.h
@@ -292,6 +292,11 @@ struct mpic
u32 *hw_set;
#endif
+#ifdef CONFIG_PCI_MSI
+ spinlock_t bitmap_lock;
+ unsigned long *hwirq_bitmap;
+#endif
+
/* link */
struct mpic *next;
};
@@ -440,5 +445,11 @@ void mpic_set_clk_ratio(struct mpic *mpi
/* Enable/Disable EPIC serial interrupt mode */
void mpic_set_serial_int(struct mpic *mpic, int enable);
+#ifdef CONFIG_PCI_MSI
+extern int mpic_msi_init_allocator(struct mpic *mpic);
+extern irq_hw_number_t mpic_msi_alloc_hwirqs(struct mpic *mpic, int num);
+extern void mpic_msi_free_hwirqs(struct mpic *mpic, int offset, int num);
+#endif
+
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_MPIC_H */
^ permalink raw reply
* [PATCH 7/7] MPIC MSI backend
From: Michael Ellerman @ 2007-04-19 7:35 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linux-pci
In-Reply-To: <1176968125.531108.326168797246.qpush@cradle>
MPIC MSI backend. Based on code from Segher, heavily hacked by me.
Renamed to mpic_htmsi, as it only deals with MSI over Hypertransport.
We need our own irq_chip so that we can do MSI masking/unmasking on
the device itself. We also need to mask explicitly on shutdown to make
sure we don't get bitten by lazy-disable semantics.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
---
arch/powerpc/sysdev/Makefile | 1
arch/powerpc/sysdev/mpic.c | 14 +-
arch/powerpc/sysdev/mpic.h | 9 +
arch/powerpc/sysdev/mpic_htmsi.c | 185 +++++++++++++++++++++++++++++++++++++++
4 files changed, 203 insertions(+), 6 deletions(-)
Index: msi-new/arch/powerpc/sysdev/Makefile
===================================================================
--- msi-new.orig/arch/powerpc/sysdev/Makefile
+++ msi-new/arch/powerpc/sysdev/Makefile
@@ -4,6 +4,7 @@ endif
mpic-obj-y := mpic.o
mpic-obj-$(CONFIG_PCI_MSI) += mpic_msi.o
+mpic-obj-$(CONFIG_PCI_MSI) += mpic_htmsi.o
obj-$(CONFIG_MPIC) += $(mpic-obj-y)
obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o
Index: msi-new/arch/powerpc/sysdev/mpic.c
===================================================================
--- msi-new.orig/arch/powerpc/sysdev/mpic.c
+++ msi-new/arch/powerpc/sysdev/mpic.c
@@ -606,7 +606,7 @@ static irqreturn_t mpic_ipi_action(int i
*/
-static void mpic_unmask_irq(unsigned int irq)
+void mpic_unmask_irq(unsigned int irq)
{
unsigned int loops = 100000;
struct mpic *mpic = mpic_from_irq(irq);
@@ -626,7 +626,7 @@ static void mpic_unmask_irq(unsigned int
} while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK);
}
-static void mpic_mask_irq(unsigned int irq)
+void mpic_mask_irq(unsigned int irq)
{
unsigned int loops = 100000;
struct mpic *mpic = mpic_from_irq(irq);
@@ -647,7 +647,7 @@ static void mpic_mask_irq(unsigned int i
} while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK));
}
-static void mpic_end_irq(unsigned int irq)
+void mpic_end_irq(unsigned int irq)
{
struct mpic *mpic = mpic_from_irq(irq);
@@ -780,7 +780,7 @@ static unsigned int mpic_type_to_vecpri(
}
}
-static int mpic_set_irq_type(unsigned int virq, unsigned int flow_type)
+int mpic_set_irq_type(unsigned int virq, unsigned int flow_type)
{
struct mpic *mpic = mpic_from_irq(virq);
unsigned int src = mpic_irq_to_hw(virq);
@@ -1191,8 +1191,10 @@ void __init mpic_init(struct mpic *mpic)
/* Do the HT PIC fixups on U3 broken mpic */
DBG("MPIC flags: %x\n", mpic->flags);
- if ((mpic->flags & MPIC_BROKEN_U3) && (mpic->flags & MPIC_PRIMARY))
- mpic_scan_ht_pics(mpic);
+ if ((mpic->flags & MPIC_BROKEN_U3) && (mpic->flags & MPIC_PRIMARY)) {
+ mpic_scan_ht_pics(mpic);
+ mpic_htmsi_init(mpic);
+ }
for (i = 0; i < mpic->num_sources; i++) {
/* start with vector = source number, and masked */
Index: msi-new/arch/powerpc/sysdev/mpic.h
===================================================================
--- msi-new.orig/arch/powerpc/sysdev/mpic.h
+++ msi-new/arch/powerpc/sysdev/mpic.h
@@ -11,14 +11,23 @@
*
*/
+#include <linux/irq.h>
+
#ifdef CONFIG_PCI_MSI
extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq);
+extern int mpic_htmsi_init(struct mpic *mpic);
#else
static inline void mpic_msi_reserve_hwirq(struct mpic *mpic,
irq_hw_number_t hwirq)
{
return;
}
+static inline int mpic_htmsi_init(struct mpic *mpic) { return -1; }
#endif
+extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type);
+extern void mpic_end_irq(unsigned int irq);
+extern void mpic_mask_irq(unsigned int irq);
+extern void mpic_unmask_irq(unsigned int irq);
+
#endif /* _POWERPC_SYSDEV_MPIC_H */
Index: msi-new/arch/powerpc/sysdev/mpic_htmsi.c
===================================================================
--- /dev/null
+++ msi-new/arch/powerpc/sysdev/mpic_htmsi.c
@@ -0,0 +1,185 @@
+/*
+ * Copyright 2006, Segher Boessenkool, IBM Corporation.
+ * Copyright 2006-2007, Michael Ellerman, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ */
+
+#include <linux/irq.h>
+#include <linux/bootmem.h>
+#include <linux/msi.h>
+#include <asm/mpic.h>
+#include <asm/prom.h>
+#include <asm/hw_irq.h>
+#include <asm/ppc-pci.h>
+
+#include "mpic.h"
+
+/* A bit ugly, can we get this from the pci_dev somehow? */
+static struct mpic *msi_mpic;
+
+static void mpic_htmsi_mask_irq(unsigned int irq)
+{
+ mask_msi_irq(irq);
+ mpic_mask_irq(irq);
+}
+
+static void mpic_htmsi_unmask_irq(unsigned int irq)
+{
+ mpic_unmask_irq(irq);
+ unmask_msi_irq(irq);
+}
+
+static struct irq_chip mpic_htmsi_chip = {
+ .shutdown = mpic_htmsi_mask_irq,
+ .mask = mpic_htmsi_mask_irq,
+ .unmask = mpic_htmsi_unmask_irq,
+ .eoi = mpic_end_irq,
+ .set_type = mpic_set_irq_type,
+ .typename = "MPIC-HTMSI",
+};
+
+static u64 read_ht_magic_addr(struct pci_dev *pdev, unsigned int pos)
+{
+ u8 flags;
+ u32 tmp;
+ u64 addr;
+
+ pci_read_config_byte(pdev, pos + HT_MSI_FLAGS, &flags);
+
+ if (flags & HT_MSI_FLAGS_FIXED)
+ return HT_MSI_FIXED_ADDR;
+
+ pci_read_config_dword(pdev, pos + HT_MSI_ADDR_LO, &tmp);
+ addr = tmp & HT_MSI_ADDR_LO_MASK;
+ pci_read_config_dword(pdev, pos + HT_MSI_ADDR_HI, &tmp);
+ addr = addr | ((u64)tmp << 32);
+
+ return addr;
+}
+
+static u64 find_ht_magic_addr(struct pci_dev *pdev)
+{
+ struct pci_bus *bus;
+ unsigned int pos;
+
+ for (bus = pdev->bus; bus; bus = bus->parent) {
+ pos = pci_find_ht_capability(bus->self, HT_CAPTYPE_MSI_MAPPING);
+ if (pos)
+ return read_ht_magic_addr(bus->self, pos);
+ }
+
+ return 0;
+}
+
+static int htmsi_msi_check_device(struct pci_dev *pdev, int nvec, int type)
+{
+ if (type == PCI_CAP_ID_MSIX)
+ pr_debug("htmsi: MSI-X untested, trying anyway.\n");
+
+ /* If we can't find a magic address then MSI ain't gonna work */
+ if (find_ht_magic_addr(pdev) == 0) {
+ pr_debug("htmsi: no magic address found for %s\n",
+ pci_name(pdev));
+ return -ENXIO;
+ }
+
+ return 0;
+}
+
+static void htmsi_teardown_msi_irqs(struct pci_dev *pdev)
+{
+ struct msi_desc *entry;
+
+ list_for_each_entry(entry, &pdev->msi_list, list) {
+ if (entry->irq == NO_IRQ)
+ continue;
+
+ set_irq_msi(entry->irq, NULL);
+ mpic_msi_free_hwirqs(msi_mpic, virq_to_hw(entry->irq), 1);
+ irq_dispose_mapping(entry->irq);
+ }
+
+ return;
+}
+
+static void htmsi_compose_msi_msg(struct pci_dev *pdev, int virq,
+ struct msi_msg *msg)
+{
+ u64 addr;
+
+ addr = find_ht_magic_addr(pdev);
+ msg->address_lo = addr & 0xFFFFFFFF;
+ msg->address_hi = addr >> 32;
+ msg->data = virq_to_hw(virq);
+
+ pr_debug("htmsi: allocated virq 0x%x (hw 0x%lx) at address 0x%lx\n",
+ virq, virq_to_hw(virq), addr);
+}
+
+static int htmsi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
+{
+ irq_hw_number_t hwirq;
+ int rc;
+ unsigned int virq;
+ struct msi_desc *entry;
+ struct msi_msg msg;
+
+ list_for_each_entry(entry, &pdev->msi_list, list) {
+ hwirq = mpic_msi_alloc_hwirqs(msi_mpic, 1);
+ if (hwirq < 0) {
+ rc = hwirq;
+ pr_debug("htmsi: failed allocating hwirq\n");
+ goto out_free;
+ }
+
+ virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
+ if (virq == NO_IRQ) {
+ pr_debug("htmsi: failed mapping hwirq 0x%lx\n", hwirq);
+ mpic_msi_free_hwirqs(msi_mpic, hwirq, 1);
+ rc = -ENOSPC;
+ goto out_free;
+ }
+
+ set_irq_msi(virq, entry);
+ set_irq_chip(virq, &mpic_htmsi_chip);
+ set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
+
+ htmsi_compose_msi_msg(pdev, virq, &msg);
+ write_msi_msg(virq, &msg);
+
+ hwirq++;
+ }
+
+ return 0;
+
+ out_free:
+ htmsi_teardown_msi_irqs(pdev);
+ return rc;
+}
+
+int mpic_htmsi_init(struct mpic *mpic)
+{
+ int rc;
+
+ rc = mpic_msi_init_allocator(mpic);
+ if (rc) {
+ pr_debug("htmsi: Error allocating bitmap!\n");
+ return rc;
+ }
+
+ pr_debug("htmsi: Registering MPIC MSI callbacks.\n");
+
+ BUG_ON(msi_mpic);
+ msi_mpic = mpic;
+
+ ppc_md.setup_msi_irqs = htmsi_setup_msi_irqs;
+ ppc_md.teardown_msi_irqs = htmsi_teardown_msi_irqs;
+ ppc_md.msi_check_device = htmsi_msi_check_device;
+
+ return 0;
+}
^ permalink raw reply
* Re: Using Linux 2.6.19 with Xilinx ML405
From: David H. Lynch Jr. @ 2007-04-19 6:28 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <878xd8qnir.fsf@sleipner.barco.com>
>
> PM> Do you know if I can use it for early serial in the same way as an
> PM> 8250?
>
> Unfortunately not. I started working on some patches for this some
> months ago, but got stalled doing other stuff. I doubt it will get
> integrated before the move to arch/powerpc.
>
I posted working early serial patches as part of an earlier uartlite
driver (not PK's)
http://ozlabs.org/pipermail/linuxppc-embedded/2006-January/021545.html
The patch is a single big patch with compete board support for the Pico
E12 cards,
but it includes complete boot2bash uartlite support, including early serial.
The uartlite code much more closely follows the 8250 code.
The early serial portions probably would work asis with PK's driver.
Though I can't confirm that as PK's driver does not work on my hardware.
A newer version of the same big patch is at
http://www.picocomputing.com/software/files/Installers/coLinux/Pico-2.6.patch.bz2
When I have more time and am more proficient with git I will likely break
it up into individual pieces.
--
Dave Lynch DLA Systems
Software Development: Embedded Linux
717.627.3770 dhlii@dlasys.net http://www.dlasys.net
fax: 1.253.369.9244 Cell: 1.717.587.7774
Over 25 years' experience in platforms, languages, and technologies too numerous to list.
"Any intelligent fool can make things bigger and more complex... It takes a touch of genius - and a lot of courage to move in the opposite direction."
Albert Einstein
^ permalink raw reply
* Re: [PATCH] Fix interrupt distribution in ppc970
From: Mohan Kumar M @ 2007-04-19 11:52 UTC (permalink / raw)
To: Michael Ellerman
Cc: ppcdev, Paul Mackerras, Anton Blanchard, Milton Miller, fastboot
In-Reply-To: <1176254201.4815.14.camel@concordia.ozlabs.ibm.com>
On Wed, Apr 11, 2007 at 11:16:41AM +1000, Michael Ellerman wrote:
> On Tue, 2007-04-10 at 11:59 -0500, Milton Miller wrote:
> >
> > This means we are doing population counts of two masks, when we really
> > just care that they are the same. How about using
> > cpus_equal(cpu_online_mask, cpu_present_mask)?
>
> Yep that's sensible.
>
> > This shows how close these two functions are. The difference is
> > what happens when cpus_empty is true -- we default in one and
> > ignore in the other.
> >
> > How about adding another arg to get_server, that says to fail
> > or default for the empty case, with failure being -1?
> >
> > I'll try to code this up, but it might be a day or two until i get
> > the time.
I modified the patch based on suggestions given by Milton and Mike.
Milton is this patch okay?
Tested on 2.6.21-rc7.
=====
It is observed that in some PPC970 based machines, When the kernel is
booted with maxcpus=1, interrupts were distributed to non online cpus
also. So a condition is included to check whether the cpu online
map and cpu present map are equal or not. If they are equal
default_distrib_server is used as the interrupt server otherwise
default_server(ie boot cpu) is used as the interrupt server.
In addition to this, if an interrupt is assigned to a specific cpu (ie
smp affinity) and if that cpu is not online, the earlier code used to
return the default_distrib_server as interrupt server. This patch
introduces an additional parameter to the get_irq function ie
strict_check, based on this parameter, if the cpu is not online either
default_distrib_server or -1 is returned.
Cc: Milton Miller <miltonm@bga.com>,
Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Mohan Kumar M <mohan@in.ibm.com>
---
arch/powerpc/platforms/pseries/xics.c | 25 ++++++++++++++++---------
1 file changed, 16 insertions(+), 9 deletions(-)
Index: linux-2.6.21-rc4/arch/powerpc/platforms/pseries/xics.c
===================================================================
--- linux-2.6.21-rc4.orig/arch/powerpc/platforms/pseries/xics.c
+++ linux-2.6.21-rc4/arch/powerpc/platforms/pseries/xics.c
@@ -156,9 +156,9 @@ static inline void lpar_qirr_info(int n_
#ifdef CONFIG_SMP
-static int get_irq_server(unsigned int virq)
+static int get_irq_server(unsigned int virq, unsigned int strict_check)
{
- unsigned int server;
+ int server;
/* For the moment only implement delivery to all cpus or one cpu */
cpumask_t cpumask = irq_desc[virq].affinity;
cpumask_t tmp = CPU_MASK_NONE;
@@ -167,21 +167,25 @@ static int get_irq_server(unsigned int v
return default_server;
if (cpus_equal(cpumask, CPU_MASK_ALL)) {
- server = default_distrib_server;
+ if (cpus_equal(cpu_online_map, cpu_present_map))
+ server = default_distrib_server;
+ else
+ server = default_server;
} else {
cpus_and(tmp, cpu_online_map, cpumask);
- if (cpus_empty(tmp))
+ if (cpus_empty(tmp) && !strict_check)
server = default_distrib_server;
+ else if(cpus_empty(tmp) && strict_check)
+ server = -1;
else
server = get_hard_smp_processor_id(first_cpu(tmp));
}
return server;
-
}
#else
-static int get_irq_server(unsigned int virq)
+static int get_irq_server(unsigned int virq, unsigned int strict_check)
{
return default_server;
}
@@ -192,7 +196,7 @@ static void xics_unmask_irq(unsigned int
{
unsigned int irq;
int call_status;
- unsigned int server;
+ int server;
pr_debug("xics: unmask virq %d\n", virq);
@@ -201,7 +205,7 @@ static void xics_unmask_irq(unsigned int
if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
return;
- server = get_irq_server(virq);
+ server = get_irq_server(virq, 0);
call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
DEFAULT_PRIORITY);
@@ -415,7 +419,10 @@ static void xics_set_affinity(unsigned i
/* For the moment only implement delivery to all cpus or one cpu */
if (cpus_equal(cpumask, CPU_MASK_ALL)) {
- newmask = default_distrib_server;
+ if (cpus_equal(cpu_online_map, cpu_present_map))
+ newmask = default_distrib_server;
+ else
+ newmask = default_server;
} else {
cpus_and(tmp, cpu_online_map, cpumask);
if (cpus_empty(tmp))
^ permalink raw reply
* Re: RFC: powerpc: Start splitting up mmu.h by MMU type
From: Kumar Gala @ 2007-04-19 12:11 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070419065430.GA5862@localhost.localdomain>
On Apr 19, 2007, at 1:54 AM, David Gibson wrote:
> This patch makes a start to sorting out the tangled mess of MMU
> related header files in asm-powerpc, and weaning arch/powerpc off the
> remaining asm-ppc headers it uses.
>
> Specifically it splits the ppc64 specific (or more strictly, the
> 64-bit hash table specific) parts of asm-powerpc/mmu.h into its own
> file, asm-powerpc/mmu-hash64/mmu.h. Similarly, PowerPC 44x
> definitions are taken from asm-ppc/mmu.h, trimmed down for use in
> arch/powerpc and place in their own file, asm-powerpc/mmu-44x/mmu.h.
>
> mmu.h definitions for other 32-bit MMU types remain in asm-ppc/mmu.h
> for now, but should be likewise split into their own files.
I asked this before, but why the need for a separate directory per
mmu type? why not just include/asm-powerpc/mmu-44x.h?
- k
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