* [PATCH 8/13] powerpc: Create Marvell mv64x60 I2C platform_data
From: Mark A. Greer @ 2007-05-12 0:56 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20070512004605.GA2808@mag.az.mvista.com>
From: Dale Farnsworth <dale@farnsworth.org>
This patch creates platform_device entries for the Marvell mv64x60
I2C ports, based on information contained in device tree.
This driver (like the other mv64x60 drivers) are unusual in that it
works on both the MIPS and PowerPC architectures. Because of that,
the drivers do not support the normal PowerPC of_platform_bus_type.
They support platform_bus_type instead.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
arch/powerpc/sysdev/mv64x60_dev.c | 74 +++++++++++++++++++++++++++-
1 file changed, 72 insertions(+), 2 deletions(-)
Index: linux-2.6-powerpc-df/arch/powerpc/sysdev/mv64x60_dev.c
===================================================================
--- linux-2.6-powerpc-df.orig/arch/powerpc/sysdev/mv64x60_dev.c
+++ linux-2.6-powerpc-df/arch/powerpc/sysdev/mv64x60_dev.c
@@ -323,14 +323,80 @@ error:
return err;
}
+/*
+ * Create mv64x60_i2c platform devices
+ */
+static int __init mv64x60_i2c_device_setup(struct device_node *np, int id)
+{
+ struct resource r[2];
+ struct platform_device *pdev;
+ struct mv64xxx_i2c_pdata pdata;
+ const unsigned int *prop;
+ int err;
+
+ memset(r, 0, sizeof(r));
+
+ err = of_address_to_resource(np, 0, &r[0]);
+ if (err)
+ return err;
+
+ of_irq_to_resource(np, 0, &r[1]);
+
+ memset(&pdata, 0, sizeof(pdata));
+
+ prop = of_get_property(np, "freq_m", NULL);
+ if (!prop)
+ return -ENODEV;
+ pdata.freq_m = *prop;
+
+ prop = of_get_property(np, "freq_n", NULL);
+ if (!prop)
+ return -ENODEV;
+ pdata.freq_n = *prop;
+
+ prop = of_get_property(np, "timeout", NULL);
+ if (prop)
+ pdata.timeout = *prop;
+ else
+ pdata.timeout = 1000; /* 1 second */
+
+ prop = of_get_property(np, "retries", NULL);
+ if (prop)
+ pdata.retries = *prop;
+ else
+ pdata.retries = 1;
+
+ pdev = platform_device_alloc(MV64XXX_I2C_CTLR_NAME, id);
+ if (!pdev)
+ return -ENOMEM;
+
+ err = platform_device_add_resources(pdev, r, 2);
+ if (err)
+ goto error;
+
+ err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+ if (err)
+ goto error;
+
+ err = platform_device_add(pdev);
+ if (err)
+ goto error;
+
+ return 0;
+
+error:
+ platform_device_put(pdev);
+ return err;
+}
+
static int __init mv64x60_device_setup(void)
{
struct device_node *np = NULL;
int id;
int err;
- for (id = 0;
- (np = of_find_compatible_node(np, "serial", "marvell,mpsc")); id++)
+ for (id = 0;
+ (np = of_find_compatible_node(np, "serial", "marvell,mpsc")); id++)
if ((err = mv64x60_mpsc_device_setup(np, id)))
goto error;
@@ -339,6 +404,12 @@ static int __init mv64x60_device_setup(v
if ((err = mv64x60_eth_device_setup(np, id)))
goto error;
+ for (id = 0;
+ (np = of_find_compatible_node(np, "i2c", "marvell,mv64x60-i2c"));
+ id++)
+ if ((err = mv64x60_i2c_device_setup(np, id)))
+ goto error;
+
return 0;
error:
^ permalink raw reply
* [PATCH 7/13] powerpc: Create Marvell mv64x60 ethernet platform_data
From: Mark A. Greer @ 2007-05-12 0:56 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20070512004605.GA2808@mag.az.mvista.com>
From: Dale Farnsworth <dale@farnsworth.org>
This patch creates platform_device entries for the Marvell mv64x60
ethernet controller ports, based on information contained in the
device tree.
This driver (like the other mv64x60 drivers) are unusual in that it
works on both the MIPS and PowerPC architectures. Because of that,
the drivers do not support the normal PowerPC of_platform_bus_type.
They support platform_bus_type instead.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
arch/powerpc/sysdev/mv64x60_dev.c | 127 ++++++++++++++++++++++++++++
drivers/net/Kconfig | 2
2 files changed, 128 insertions(+), 1 deletion(-)
Index: linux-2.6-powerpc-df/arch/powerpc/sysdev/mv64x60_dev.c
===================================================================
--- linux-2.6-powerpc-df.orig/arch/powerpc/sysdev/mv64x60_dev.c
+++ linux-2.6-powerpc-df/arch/powerpc/sysdev/mv64x60_dev.c
@@ -201,6 +201,128 @@ error:
return err;
}
+/*
+ * Create mv64x60_eth platform devices
+ */
+static int __init eth_register_shared_pdev(struct device_node *np)
+{
+ struct platform_device *pdev;
+ struct resource r[1];
+ int err;
+
+ np = of_get_parent(np);
+ if (!np)
+ return -ENODEV;
+
+ err = of_address_to_resource(np, 0, &r[0]);
+ of_node_put(np);
+ if (err)
+ return err;
+
+ pdev = platform_device_register_simple(MV643XX_ETH_SHARED_NAME, 0,
+ r, 1);
+ if (IS_ERR(pdev))
+ return PTR_ERR(pdev);
+
+ return 0;
+}
+
+static int __init mv64x60_eth_device_setup(struct device_node *np, int id)
+{
+ struct resource r[1];
+ struct mv643xx_eth_platform_data pdata;
+ struct platform_device *pdev;
+ struct device_node *phy;
+ const u8 *mac_addr;
+ const int *prop;
+ const phandle *ph;
+ int err;
+
+ /* only register the shared platform device the first time through */
+ if (id == 0 && (err = eth_register_shared_pdev(np)))
+ return err;;
+
+ memset(r, 0, sizeof(r));
+ of_irq_to_resource(np, 0, &r[0]);
+
+ memset(&pdata, 0, sizeof(pdata));
+
+ prop = of_get_property(np, "block-index", NULL);
+ if (!prop)
+ return -ENODEV;
+ pdata.port_number = *prop;
+
+ mac_addr = of_get_mac_address(np);
+ if (mac_addr)
+ memcpy(pdata.mac_addr, mac_addr, 6);
+
+ prop = of_get_property(np, "speed", NULL);
+ if (prop)
+ pdata.speed = *prop;
+
+ prop = of_get_property(np, "tx_queue_size", NULL);
+ if (prop)
+ pdata.tx_queue_size = *prop;
+
+ prop = of_get_property(np, "rx_queue_size", NULL);
+ if (prop)
+ pdata.rx_queue_size = *prop;
+
+ prop = of_get_property(np, "tx_sram_addr", NULL);
+ if (prop)
+ pdata.tx_sram_addr = *prop;
+
+ prop = of_get_property(np, "tx_sram_size", NULL);
+ if (prop)
+ pdata.tx_sram_size = *prop;
+
+ prop = of_get_property(np, "rx_sram_addr", NULL);
+ if (prop)
+ pdata.rx_sram_addr = *prop;
+
+ prop = of_get_property(np, "rx_sram_size", NULL);
+ if (prop)
+ pdata.rx_sram_size = *prop;
+
+ ph = of_get_property(np, "phy", NULL);
+ if (!ph)
+ return -ENODEV;
+
+ phy = of_find_node_by_phandle(*ph);
+ if (phy == NULL)
+ return -ENODEV;
+
+ prop = of_get_property(phy, "reg", NULL);
+ if (prop) {
+ pdata.force_phy_addr = 1;
+ pdata.phy_addr = *prop;
+ }
+
+ of_node_put(phy);
+
+ pdev = platform_device_alloc(MV643XX_ETH_NAME, pdata.port_number);
+ if (!pdev)
+ return -ENOMEM;
+
+ err = platform_device_add_resources(pdev, r, 1);
+ if (err)
+ goto error;
+
+ err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+ if (err)
+ goto error;
+
+ err = platform_device_add(pdev);
+ if (err)
+ goto error;
+
+ return 0;
+
+error:
+ platform_device_put(pdev);
+ return err;
+}
+
static int __init mv64x60_device_setup(void)
{
struct device_node *np = NULL;
@@ -212,6 +334,13 @@ static int __init mv64x60_device_setup(v
if ((err = mv64x60_mpsc_device_setup(np, id)))
goto error;
+ for (id = 0;
+ (np = of_find_compatible_node(np, "network",
+ "marvell,mv64x60-eth"));
+ id++)
+ if ((err = mv64x60_eth_device_setup(np, id)))
+ goto error;
+
return 0;
error:
Index: linux-2.6-powerpc-df/drivers/net/Kconfig
===================================================================
--- linux-2.6-powerpc-df.orig/drivers/net/Kconfig
+++ linux-2.6-powerpc-df/drivers/net/Kconfig
@@ -2299,7 +2299,7 @@ config UGETH_TX_ON_DEMAND
config MV643XX_ETH
tristate "MV-643XX Ethernet support"
- depends on MOMENCO_OCELOT_C || MOMENCO_JAGUAR_ATX || MV64360 || MOMENCO_OCELOT_3 || (PPC_MULTIPLATFORM && PPC32)
+ depends on MOMENCO_OCELOT_C || MOMENCO_JAGUAR_ATX || MV64360 || MV64X60 || MOMENCO_OCELOT_3 || (PPC_MULTIPLATFORM && PPC32)
select MII
help
This driver supports the gigabit Ethernet on the Marvell MV643XX
^ permalink raw reply
* [PATCH 6/13] powerpc: Create Marvell mv64x60 MPSC (serial) platform_data
From: Mark A. Greer @ 2007-05-12 0:55 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20070512004605.GA2808@mag.az.mvista.com>
From: Dale Farnsworth <dale@farnsworth.org>
This patch creates platform_device entries for the Marvell mv64x60
MPSC (multi-protocol serial controller) ports, based on information
contained in the device tree.
This driver (like the other mv64x60 drivers) are unusual in that it
works on both the MIPS and PowerPC architectures. Because of that,
the drivers do not support the normal PowerPC of_platform_bus_type.
They support platform_bus_type instead.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
---
arch/powerpc/platforms/embedded6xx/Kconfig | 3
arch/powerpc/sysdev/Makefile | 2
arch/powerpc/sysdev/mv64x60_dev.c | 221 +++++++++++++++++++
3 files changed, 225 insertions(+), 1 deletion(-)
Index: linux-2.6-powerpc-df/arch/powerpc/sysdev/mv64x60_dev.c
===================================================================
--- /dev/null
+++ linux-2.6-powerpc-df/arch/powerpc/sysdev/mv64x60_dev.c
@@ -0,0 +1,221 @@
+/*
+ * Platform device setup for Marvell mv64360/mv64460 host bridges (Discovery)
+ *
+ * Author: Dale Farnsworth <dale@farnsworth.org>
+ *
+ * 2007 (c) MontaVista, Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/mv643xx.h>
+#include <linux/platform_device.h>
+
+#include <asm/prom.h>
+
+/*
+ * These functions provide the necessary setup for the mv64x60 drivers.
+ * These drivers are unusual in that they work on both the MIPS and PowerPC
+ * architectures. Because of that, the drivers do not support the normal
+ * PowerPC of_platform_bus_type. They support platform_bus_type instead.
+ */
+
+/*
+ * Create MPSC platform devices
+ */
+static int __init mv64x60_mpsc_register_shared_pdev(struct device_node *np)
+{
+ struct platform_device *pdev;
+ struct resource r[2];
+ struct mpsc_shared_pdata pdata;
+ const phandle *ph;
+ struct device_node *mpscrouting, *mpscintr;
+ int err;
+
+ ph = of_get_property(np, "mpscrouting", NULL);
+ mpscrouting = of_find_node_by_phandle(*ph);
+ if (!mpscrouting)
+ return -ENODEV;
+
+ err = of_address_to_resource(mpscrouting, 0, &r[0]);
+ of_node_put(mpscrouting);
+ if (err)
+ return err;
+
+ ph = of_get_property(np, "mpscintr", NULL);
+ mpscintr = of_find_node_by_phandle(*ph);
+ if (!mpscintr)
+ return -ENODEV;
+
+ err = of_address_to_resource(mpscintr, 0, &r[1]);
+ of_node_put(mpscintr);
+ if (err)
+ return err;
+
+ memset(&pdata, 0, sizeof(pdata));
+
+ pdev = platform_device_alloc(MPSC_SHARED_NAME, 0);
+ if (!pdev)
+ return -ENOMEM;
+
+ err = platform_device_add_resources(pdev, r, 2);
+ if (err)
+ goto error;
+
+ err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+ if (err)
+ goto error;
+
+ err = platform_device_add(pdev);
+ if (err)
+ goto error;
+
+ return 0;
+
+error:
+ platform_device_put(pdev);
+ return err;
+}
+
+
+static int __init mv64x60_mpsc_device_setup(struct device_node *np, int id)
+{
+ struct resource r[5];
+ struct mpsc_pdata pdata;
+ struct platform_device *pdev;
+ const unsigned int *prop;
+ const phandle *ph;
+ struct device_node *sdma, *brg;
+ int err;
+ int port_number;
+
+ /* only register the shared platform device the first time through */
+ if (id == 0 && (err = mv64x60_mpsc_register_shared_pdev(np)))
+ return err;
+
+ memset(r, 0, sizeof(r));
+
+ err = of_address_to_resource(np, 0, &r[0]);
+ if (err)
+ return err;
+
+ of_irq_to_resource(np, 0, &r[4]);
+
+ ph = of_get_property(np, "sdma", NULL);
+ sdma = of_find_node_by_phandle(*ph);
+ if (!sdma)
+ return -ENODEV;
+
+ of_irq_to_resource(sdma, 0, &r[3]);
+ err = of_address_to_resource(sdma, 0, &r[1]);
+ of_node_put(sdma);
+ if (err)
+ return err;
+
+ ph = of_get_property(np, "brg", NULL);
+ brg = of_find_node_by_phandle(*ph);
+ if (!brg)
+ return -ENODEV;
+
+ err = of_address_to_resource(brg, 0, &r[2]);
+ of_node_put(brg);
+ if (err)
+ return err;
+
+ prop = of_get_property(np, "block-index", NULL);
+ if (!prop)
+ return -ENODEV;
+ port_number = *(int *)prop;
+
+ memset(&pdata, 0, sizeof(pdata));
+
+ pdata.cache_mgmt = 1; /* All current revs need this set */
+
+ prop = of_get_property(np, "max_idle", NULL);
+ if (prop)
+ pdata.max_idle = *prop;
+
+ prop = of_get_property(brg, "current-speed", NULL);
+ if (prop)
+ pdata.default_baud = *prop;
+
+ /* Default is 8 bits, no parity, no flow control */
+ pdata.default_bits = 8;
+ pdata.default_parity = 'n';
+ pdata.default_flow = 'n';
+
+ prop = of_get_property(np, "chr_1", NULL);
+ if (prop)
+ pdata.chr_1_val = *prop;
+
+ prop = of_get_property(np, "chr_2", NULL);
+ if (prop)
+ pdata.chr_2_val = *prop;
+
+ prop = of_get_property(np, "chr_10", NULL);
+ if (prop)
+ pdata.chr_10_val = *prop;
+
+ prop = of_get_property(np, "mpcr", NULL);
+ if (prop)
+ pdata.mpcr_val = *prop;
+
+ prop = of_get_property(brg, "bcr", NULL);
+ if (prop)
+ pdata.bcr_val = *prop;
+
+ pdata.brg_can_tune = 1; /* All current revs need this set */
+
+ prop = of_get_property(brg, "clock-src", NULL);
+ if (prop)
+ pdata.brg_clk_src = *prop;
+
+ prop = of_get_property(brg, "clock-frequency", NULL);
+ if (prop)
+ pdata.brg_clk_freq = *prop;
+
+ pdev = platform_device_alloc(MPSC_CTLR_NAME, port_number);
+ if (!pdev)
+ return -ENOMEM;
+
+ err = platform_device_add_resources(pdev, r, 5);
+ if (err)
+ goto error;
+
+ err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+ if (err)
+ goto error;
+
+ err = platform_device_add(pdev);
+ if (err)
+ goto error;
+
+ return 0;
+
+error:
+ platform_device_put(pdev);
+ return err;
+}
+
+static int __init mv64x60_device_setup(void)
+{
+ struct device_node *np = NULL;
+ int id;
+ int err;
+
+ for (id = 0;
+ (np = of_find_compatible_node(np, "serial", "marvell,mpsc")); id++)
+ if ((err = mv64x60_mpsc_device_setup(np, id)))
+ goto error;
+
+ return 0;
+
+error:
+ of_node_put(np);
+ return err;
+}
+arch_initcall(mv64x60_device_setup);
Index: linux-2.6-powerpc-df/arch/powerpc/sysdev/Makefile
===================================================================
--- linux-2.6-powerpc-df.orig/arch/powerpc/sysdev/Makefile
+++ linux-2.6-powerpc-df/arch/powerpc/sysdev/Makefile
@@ -14,7 +14,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCIE) += fsl_pcie.o
obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
-obj-$(CONFIG_MV64X60) += mv64x60_pic.o
+obj-$(CONFIG_MV64X60) += mv64x60_pic.o mv64x60_dev.o
# contains only the suspend handler for time
obj-$(CONFIG_PM) += timer.o
Index: linux-2.6-powerpc-df/arch/powerpc/platforms/embedded6xx/Kconfig
===================================================================
--- linux-2.6-powerpc-df.orig/arch/powerpc/platforms/embedded6xx/Kconfig
+++ linux-2.6-powerpc-df/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -38,6 +38,9 @@ config MPC10X_BRIDGE
select PPC_INDIRECT_PCI
default y
+config MV64X60
+ bool
+
config MPC10X_OPENPIC
bool
depends on LINKSTATION
^ permalink raw reply
* [PATCH 5/13] powerpc: Add interrupt support for Marvell mv64x60 chips
From: Mark A. Greer @ 2007-05-12 0:55 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20070512004605.GA2808@mag.az.mvista.com>
From: Dale Farnsworth <dale@farnsworth.org>
There are 3 interrupt groups each with its own status/mask registers.
We use a separate struct irq_chip for each interrupt group and handle
interrupts in two stages or levels: level 1 selects the appropriate
struct irq_chip, and level 2 selects individual interrupts within
that irq_chip.
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
---
arch/powerpc/sysdev/Makefile | 1
arch/powerpc/sysdev/mv64x60.h | 9
arch/powerpc/sysdev/mv64x60_pic.c | 305 ++++++++++++++++++++++++++++
3 files changed, 315 insertions(+)
Index: linux-2.6-powerpc-df/arch/powerpc/sysdev/mv64x60_pic.c
===================================================================
--- /dev/null
+++ linux-2.6-powerpc-df/arch/powerpc/sysdev/mv64x60_pic.c
@@ -0,0 +1,305 @@
+/*
+ * Interrupt handling for Marvell mv64360/mv64460 host bridges (Discovery)
+ *
+ * Author: Dale Farnsworth <dale@farnsworth.org>
+ *
+ * 2007 (c) MontaVista, Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+
+#include <asm/byteorder.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/irq.h>
+
+#include "mv64x60.h"
+
+/* Interrupt Controller Interface Registers */
+#define MV64X60_IC_MAIN_CAUSE_LO 0x0004
+#define MV64X60_IC_MAIN_CAUSE_HI 0x000c
+#define MV64X60_IC_CPU0_INTR_MASK_LO 0x0014
+#define MV64X60_IC_CPU0_INTR_MASK_HI 0x001c
+#define MV64X60_IC_CPU0_SELECT_CAUSE 0x0024
+
+#define MV64X60_HIGH_GPP_GROUPS 0x0f000000
+#define MV64X60_SELECT_CAUSE_HIGH 0x40000000
+
+/* General Purpose Pins Controller Interface Registers */
+#define MV64x60_GPP_INTR_CAUSE 0x0008
+#define MV64x60_GPP_INTR_MASK 0x000c
+
+#define MV64x60_LEVEL1_LOW 0
+#define MV64x60_LEVEL1_HIGH 1
+#define MV64x60_LEVEL1_GPP 2
+
+#define MV64x60_LEVEL1_MASK 0x00000060
+#define MV64x60_LEVEL1_OFFSET 5
+
+#define MV64x60_LEVEL2_MASK 0x0000001f
+
+#define MV64x60_NUM_IRQS 96
+
+static DEFINE_SPINLOCK(mv64x60_lock);
+
+static void __iomem *mv64x60_irq_reg_base;
+static void __iomem *mv64x60_gpp_reg_base;
+
+/*
+ * Interrupt Controller Handling
+ *
+ * The interrupt controller handles three groups of interrupts:
+ * main low: IRQ0-IRQ31
+ * main high: IRQ32-IRQ63
+ * gpp: IRQ64-IRQ95
+ *
+ * This code handles interrupts in two levels. Level 1 selects the
+ * interrupt group, and level 2 selects an IRQ within that group.
+ * Each group has its own irq_chip structure.
+ */
+
+static u32 mv64x60_cached_low_mask;
+static u32 mv64x60_cached_high_mask = MV64X60_HIGH_GPP_GROUPS;
+static u32 mv64x60_cached_gpp_mask;
+
+static struct irq_host *mv64x60_irq_host;
+
+/*
+ * mv64x60_chip_low functions
+ */
+
+static void mv64x60_mask_low(unsigned int virq)
+{
+ int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+ unsigned long flags;
+
+ spin_lock_irqsave(&mv64x60_lock, flags);
+ mv64x60_cached_low_mask &= ~(1 << level2);
+ out_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO,
+ mv64x60_cached_low_mask);
+ spin_unlock_irqrestore(&mv64x60_lock, flags);
+ (void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO);
+}
+
+static void mv64x60_unmask_low(unsigned int virq)
+{
+ int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+ unsigned long flags;
+
+ spin_lock_irqsave(&mv64x60_lock, flags);
+ mv64x60_cached_low_mask |= 1 << level2;
+ out_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO,
+ mv64x60_cached_low_mask);
+ spin_unlock_irqrestore(&mv64x60_lock, flags);
+ (void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO);
+}
+
+static struct irq_chip mv64x60_chip_low = {
+ .name = "mv64x60_low",
+ .mask = mv64x60_mask_low,
+ .mask_ack = mv64x60_mask_low,
+ .unmask = mv64x60_unmask_low,
+};
+
+/*
+ * mv64x60_chip_high functions
+ */
+
+static void mv64x60_mask_high(unsigned int virq)
+{
+ int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+ unsigned long flags;
+
+ spin_lock_irqsave(&mv64x60_lock, flags);
+ mv64x60_cached_high_mask &= ~(1 << level2);
+ out_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI,
+ mv64x60_cached_high_mask);
+ spin_unlock_irqrestore(&mv64x60_lock, flags);
+ (void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI);
+}
+
+static void mv64x60_unmask_high(unsigned int virq)
+{
+ int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+ unsigned long flags;
+
+ spin_lock_irqsave(&mv64x60_lock, flags);
+ mv64x60_cached_high_mask |= 1 << level2;
+ out_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI,
+ mv64x60_cached_high_mask);
+ spin_unlock_irqrestore(&mv64x60_lock, flags);
+ (void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI);
+}
+
+static struct irq_chip mv64x60_chip_high = {
+ .name = "mv64x60_high",
+ .mask = mv64x60_mask_high,
+ .mask_ack = mv64x60_mask_high,
+ .unmask = mv64x60_unmask_high,
+};
+
+/*
+ * mv64x60_chip_gpp functions
+ */
+
+static void mv64x60_mask_gpp(unsigned int virq)
+{
+ int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+ unsigned long flags;
+
+ spin_lock_irqsave(&mv64x60_lock, flags);
+ mv64x60_cached_gpp_mask &= ~(1 << level2);
+ out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK,
+ mv64x60_cached_gpp_mask);
+ spin_unlock_irqrestore(&mv64x60_lock, flags);
+ (void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK);
+}
+
+static void mv64x60_mask_ack_gpp(unsigned int virq)
+{
+ int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+ unsigned long flags;
+
+ spin_lock_irqsave(&mv64x60_lock, flags);
+ mv64x60_cached_gpp_mask &= ~(1 << level2);
+ out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK,
+ mv64x60_cached_gpp_mask);
+ out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_CAUSE,
+ ~(1 << level2));
+ spin_unlock_irqrestore(&mv64x60_lock, flags);
+ (void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_CAUSE);
+}
+
+static void mv64x60_unmask_gpp(unsigned int virq)
+{
+ int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+ unsigned long flags;
+
+ spin_lock_irqsave(&mv64x60_lock, flags);
+ mv64x60_cached_gpp_mask |= 1 << level2;
+ out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK,
+ mv64x60_cached_gpp_mask);
+ spin_unlock_irqrestore(&mv64x60_lock, flags);
+ (void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK);
+}
+
+static struct irq_chip mv64x60_chip_gpp = {
+ .name = "mv64x60_gpp",
+ .mask = mv64x60_mask_gpp,
+ .mask_ack = mv64x60_mask_ack_gpp,
+ .unmask = mv64x60_unmask_gpp,
+};
+
+/*
+ * mv64x60_host_ops functions
+ */
+
+static int mv64x60_host_match(struct irq_host *h, struct device_node *np)
+{
+ return mv64x60_irq_host->host_data == np;
+}
+
+static struct irq_chip *mv64x60_chips[] = {
+ [MV64x60_LEVEL1_LOW] = &mv64x60_chip_low,
+ [MV64x60_LEVEL1_HIGH] = &mv64x60_chip_high,
+ [MV64x60_LEVEL1_GPP] = &mv64x60_chip_gpp,
+};
+
+static int mv64x60_host_map(struct irq_host *h, unsigned int virq,
+ irq_hw_number_t hwirq)
+{
+ int level1;
+
+ get_irq_desc(virq)->status |= IRQ_LEVEL;
+
+ level1 = (hwirq & MV64x60_LEVEL1_MASK) >> MV64x60_LEVEL1_OFFSET;
+ BUG_ON(level1 > MV64x60_LEVEL1_GPP);
+ set_irq_chip_and_handler(virq, mv64x60_chips[level1], handle_level_irq);
+
+ return 0;
+}
+
+static struct irq_host_ops mv64x60_host_ops = {
+ .match = mv64x60_host_match,
+ .map = mv64x60_host_map,
+};
+
+/*
+ * Global functions
+ */
+
+void __init mv64x60_init_irq(void)
+{
+ struct device_node *np;
+ phys_addr_t paddr;
+ unsigned int size;
+ const unsigned int *reg;
+ unsigned long flags;
+
+ np = of_find_compatible_node(NULL, NULL, "marvell,mv64x60-gpp");
+ reg = of_get_property(np, "reg", &size);
+ paddr = of_translate_address(np, reg);
+ mv64x60_gpp_reg_base = ioremap(paddr, reg[1]);
+ of_node_put(np);
+
+ np = of_find_compatible_node(NULL, NULL, "marvell,mv64x60-pic");
+ reg = of_get_property(np, "reg", &size);
+ paddr = of_translate_address(np, reg);
+ of_node_put(np);
+ mv64x60_irq_reg_base = ioremap(paddr, reg[1]);
+
+ mv64x60_irq_host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, MV64x60_NUM_IRQS,
+ &mv64x60_host_ops, MV64x60_NUM_IRQS);
+
+ mv64x60_irq_host->host_data = np;
+
+ spin_lock_irqsave(&mv64x60_lock, flags);
+ out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK,
+ mv64x60_cached_gpp_mask);
+ out_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO,
+ mv64x60_cached_low_mask);
+ out_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI,
+ mv64x60_cached_high_mask);
+
+ out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_CAUSE, 0);
+ out_le32(mv64x60_irq_reg_base + MV64X60_IC_MAIN_CAUSE_LO, 0);
+ out_le32(mv64x60_irq_reg_base + MV64X60_IC_MAIN_CAUSE_HI, 0);
+ spin_unlock_irqrestore(&mv64x60_lock, flags);
+}
+
+unsigned int mv64x60_get_irq(void)
+{
+ u32 cause;
+ int level1;
+ irq_hw_number_t hwirq;
+ int virq = NO_IRQ;
+
+ cause = in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_SELECT_CAUSE);
+ if (cause & MV64X60_SELECT_CAUSE_HIGH) {
+ cause &= mv64x60_cached_high_mask;
+ level1 = MV64x60_LEVEL1_HIGH;
+ if (cause & MV64X60_HIGH_GPP_GROUPS) {
+ cause = in_le32(mv64x60_gpp_reg_base +
+ MV64x60_GPP_INTR_CAUSE);
+ cause &= mv64x60_cached_gpp_mask;
+ level1 = MV64x60_LEVEL1_GPP;
+ }
+ } else {
+ cause &= mv64x60_cached_low_mask;
+ level1 = MV64x60_LEVEL1_LOW;
+ }
+ if (cause) {
+ hwirq = (level1 << MV64x60_LEVEL1_OFFSET) | __ilog2(cause);
+ virq = irq_linear_revmap(mv64x60_irq_host, hwirq);
+ }
+
+ return virq;
+}
Index: linux-2.6-powerpc-df/arch/powerpc/sysdev/mv64x60.h
===================================================================
--- /dev/null
+++ linux-2.6-powerpc-df/arch/powerpc/sysdev/mv64x60.h
@@ -0,0 +1,9 @@
+#ifndef __MV64X60_H__
+#define __MV64X60_H__
+
+#include <linux/init.h>
+
+extern void __init mv64x60_init_irq(void);
+extern unsigned int mv64x60_get_irq(void);
+
+#endif /* __MV64X60_H__ */
Index: linux-2.6-powerpc-df/arch/powerpc/sysdev/Makefile
===================================================================
--- linux-2.6-powerpc-df.orig/arch/powerpc/sysdev/Makefile
+++ linux-2.6-powerpc-df/arch/powerpc/sysdev/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCIE) += fsl_pcie.o
obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
+obj-$(CONFIG_MV64X60) += mv64x60_pic.o
# contains only the suspend handler for time
obj-$(CONFIG_PM) += timer.o
^ permalink raw reply
* [PATCH 4/13] powerpc: Add bootwrapper support for Marvell/mv64x60 I2C
From: Mark A. Greer @ 2007-05-12 0:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20070512004605.GA2808@mag.az.mvista.com>
Some platforms support a variety processor modules with no method of
determining which exact processor module is being used except by
examining Vital Product Data (VPD). The modules may have different
amounts of memory, clock frequencies, etc. so reading the VPD becomes
necessary to correctly set properties in the device tree before its
passed to the kernel.
Often the VPD is stored in I2C EEPROMs so an I2C driver becomes necessary.
This I2C driver is for the I2C controller that's embedded on the Marvel
mv64x60 line of host bridges.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
---
arch/powerpc/boot/Makefile | 2
arch/powerpc/boot/mv64x60_i2c.c | 206 ++++++++++++++++++++++++++++++
2 files changed, 207 insertions(+), 1 deletion(-)
Index: powerpc/arch/powerpc/boot/mv64x60_i2c.c
===================================================================
--- /dev/null
+++ powerpc/arch/powerpc/boot/mv64x60_i2c.c
@@ -0,0 +1,206 @@
+/*
+ * Bootloader version of the i2c driver for the MV64x60.
+ *
+ * Author: Dale Farnsworth <dfarnsworth@mvista.com>
+ * Maintained by: Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2003, 2007 (c) MontaVista, Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program is
+ * licensed "as is" without any warranty of any kind, whether express or
+ * implied.
+ */
+
+#include <stdarg.h>
+#include <stddef.h>
+#include "types.h"
+#include "elf.h"
+#include "page.h"
+#include "string.h"
+#include "stdio.h"
+#include "io.h"
+#include "ops.h"
+#include "mv64x60.h"
+
+extern void udelay(long);
+
+/* Register defines */
+#define MV64x60_I2C_REG_SLAVE_ADDR 0x00
+#define MV64x60_I2C_REG_DATA 0x04
+#define MV64x60_I2C_REG_CONTROL 0x08
+#define MV64x60_I2C_REG_STATUS 0x0c
+#define MV64x60_I2C_REG_BAUD 0x0c
+#define MV64x60_I2C_REG_EXT_SLAVE_ADDR 0x10
+#define MV64x60_I2C_REG_SOFT_RESET 0x1c
+
+#define MV64x60_I2C_CONTROL_ACK 0x04
+#define MV64x60_I2C_CONTROL_IFLG 0x08
+#define MV64x60_I2C_CONTROL_STOP 0x10
+#define MV64x60_I2C_CONTROL_START 0x20
+#define MV64x60_I2C_CONTROL_TWSIEN 0x40
+#define MV64x60_I2C_CONTROL_INTEN 0x80
+
+#define MV64x60_I2C_STATUS_BUS_ERR 0x00
+#define MV64x60_I2C_STATUS_MAST_START 0x08
+#define MV64x60_I2C_STATUS_MAST_REPEAT_START 0x10
+#define MV64x60_I2C_STATUS_MAST_WR_ADDR_ACK 0x18
+#define MV64x60_I2C_STATUS_MAST_WR_ADDR_NO_ACK 0x20
+#define MV64x60_I2C_STATUS_MAST_WR_ACK 0x28
+#define MV64x60_I2C_STATUS_MAST_WR_NO_ACK 0x30
+#define MV64x60_I2C_STATUS_MAST_LOST_ARB 0x38
+#define MV64x60_I2C_STATUS_MAST_RD_ADDR_ACK 0x40
+#define MV64x60_I2C_STATUS_MAST_RD_ADDR_NO_ACK 0x48
+#define MV64x60_I2C_STATUS_MAST_RD_DATA_ACK 0x50
+#define MV64x60_I2C_STATUS_MAST_RD_DATA_NO_ACK 0x58
+#define MV64x60_I2C_STATUS_MAST_WR_ADDR_2_ACK 0xd0
+#define MV64x60_I2C_STATUS_MAST_WR_ADDR_2_NO_ACK 0xd8
+#define MV64x60_I2C_STATUS_MAST_RD_ADDR_2_ACK 0xe0
+#define MV64x60_I2C_STATUS_MAST_RD_ADDR_2_NO_ACK 0xe8
+#define MV64x60_I2C_STATUS_NO_STATUS 0xf8
+
+static u8 *ctlr_base;
+
+static int mv64x60_i2c_wait_for_status(int wanted)
+{
+ int i;
+ int status;
+
+ for (i=0; i<1000; i++) {
+ udelay(10);
+ status = in_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_STATUS))
+ & 0xff;
+ if (status == wanted)
+ return status;
+ }
+ return -status;
+}
+
+static int mv64x60_i2c_control(int control, int status)
+{
+ out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_CONTROL), control & 0xff);
+ return mv64x60_i2c_wait_for_status(status);
+}
+
+static int mv64x60_i2c_read_byte(int control, int status)
+{
+ out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_CONTROL), control & 0xff);
+ if (mv64x60_i2c_wait_for_status(status) < 0)
+ return -1;
+ return in_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_DATA)) & 0xff;
+}
+
+static int mv64x60_i2c_write_byte(int data, int control, int status)
+{
+ out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_DATA), data & 0xff);
+ out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_CONTROL), control & 0xff);
+ return mv64x60_i2c_wait_for_status(status);
+}
+
+int mv64x60_i2c_read(u32 devaddr, u8 *buf, u32 offset, u32 offset_size,
+ u32 count)
+{
+ int i;
+ int data;
+ int control;
+ int status;
+
+ if (ctlr_base == NULL)
+ return -1;
+
+ /* send reset */
+ out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_SOFT_RESET), 0);
+ out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_SLAVE_ADDR), 0);
+ out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_EXT_SLAVE_ADDR), 0);
+ out_le32((u32 *)(ctlr_base + MV64x60_I2C_REG_BAUD), (4 << 3) | 0x4);
+
+ if (mv64x60_i2c_control(MV64x60_I2C_CONTROL_TWSIEN,
+ MV64x60_I2C_STATUS_NO_STATUS) < 0)
+ return -1;
+
+ /* send start */
+ control = MV64x60_I2C_CONTROL_START | MV64x60_I2C_CONTROL_TWSIEN;
+ status = MV64x60_I2C_STATUS_MAST_START;
+ if (mv64x60_i2c_control(control, status) < 0)
+ return -1;
+
+ /* select device for writing */
+ data = devaddr & ~0x1;
+ control = MV64x60_I2C_CONTROL_TWSIEN;
+ status = MV64x60_I2C_STATUS_MAST_WR_ADDR_ACK;
+ if (mv64x60_i2c_write_byte(data, control, status) < 0)
+ return -1;
+
+ /* send offset of data */
+ control = MV64x60_I2C_CONTROL_TWSIEN;
+ status = MV64x60_I2C_STATUS_MAST_WR_ACK;
+ if (offset_size > 1) {
+ if (mv64x60_i2c_write_byte(offset >> 8, control, status) < 0)
+ return -1;
+ }
+ if (mv64x60_i2c_write_byte(offset, control, status) < 0)
+ return -1;
+
+ /* resend start */
+ control = MV64x60_I2C_CONTROL_START | MV64x60_I2C_CONTROL_TWSIEN;
+ status = MV64x60_I2C_STATUS_MAST_REPEAT_START;
+ if (mv64x60_i2c_control(control, status) < 0)
+ return -1;
+
+ /* select device for reading */
+ data = devaddr | 0x1;
+ control = MV64x60_I2C_CONTROL_TWSIEN;
+ status = MV64x60_I2C_STATUS_MAST_RD_ADDR_ACK;
+ if (mv64x60_i2c_write_byte(data, control, status) < 0)
+ return -1;
+
+ /* read all but last byte of data */
+ control = MV64x60_I2C_CONTROL_ACK | MV64x60_I2C_CONTROL_TWSIEN;
+ status = MV64x60_I2C_STATUS_MAST_RD_DATA_ACK;
+
+ for (i=1; i<count; i++) {
+ data = mv64x60_i2c_read_byte(control, status);
+ if (data < 0) {
+ printf("errors on iteration %d\n", i);
+ return -1;
+ }
+ *buf++ = data;
+ }
+
+ /* read last byte of data */
+ control = MV64x60_I2C_CONTROL_TWSIEN;
+ status = MV64x60_I2C_STATUS_MAST_RD_DATA_NO_ACK;
+ data = mv64x60_i2c_read_byte(control, status);
+ if (data < 0)
+ return -1;
+ *buf++ = data;
+
+ /* send stop */
+ control = MV64x60_I2C_CONTROL_STOP | MV64x60_I2C_CONTROL_TWSIEN;
+ status = MV64x60_I2C_STATUS_NO_STATUS;
+ if (mv64x60_i2c_control(control, status) < 0)
+ return -1;
+
+ return count;
+}
+
+int mv64x60_i2c_open(void)
+{
+ u32 v;
+ void *devp;
+
+ devp = finddevice("/mv64x60/i2c");
+ if (devp == NULL)
+ goto err_out;
+ if (getprop(devp, "virtual-reg", &v, sizeof(v)) != sizeof(v))
+ goto err_out;
+
+ ctlr_base = (u8 *)v;
+ return 0;
+
+err_out:
+ return -1;
+}
+
+void mv64x60_i2c_close(void)
+{
+ ctlr_base = NULL;
+}
Index: powerpc/arch/powerpc/boot/Makefile
===================================================================
--- powerpc.orig/arch/powerpc/boot/Makefile
+++ powerpc/arch/powerpc/boot/Makefile
@@ -43,7 +43,7 @@ $(addprefix $(obj)/,$(zlib) gunzip_util.
src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
ns16550.c serial.c simple_alloc.c div64.S util.S \
gunzip_util.c elf_util.c $(zlib) devtree.c \
- 44x.c ebony.c mv64x60.c mpsc.c
+ 44x.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c
src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
cuboot-ebony.c treeboot-ebony.c
src-boot := $(src-wlib) $(src-plat) empty.c
^ permalink raw reply
* [PATCH 3/13] powerpc: Add bootwrapper support for Marvell MPSC
From: Mark A. Greer @ 2007-05-12 0:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20070512004605.GA2808@mag.az.mvista.com>
The bootwrapper requires a serial driver to allow cmdline editing
and information reporting on the console. This driver is required
by platforms that boot a zImage and use the MPSC for the console.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
---
arch/powerpc/boot/Makefile | 2
arch/powerpc/boot/mpsc.c | 170 +++++++++++++++++++++++++++++++++++
arch/powerpc/boot/ops.h | 1
arch/powerpc/boot/serial.c | 2
4 files changed, 174 insertions(+), 1 deletion(-)
Index: powerpc/arch/powerpc/boot/mpsc.c
===================================================================
--- /dev/null
+++ powerpc/arch/powerpc/boot/mpsc.c
@@ -0,0 +1,170 @@
+/*
+ * MPSC/UART driver for the Marvell mv64360, mv64460, ...
+ *
+ * Author: Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2007 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <stdarg.h>
+#include <stddef.h>
+#include "types.h"
+#include "string.h"
+#include "stdio.h"
+#include "io.h"
+#include "ops.h"
+
+extern void udelay(long delay);
+
+#define MPSC_CHR_1 0x000c
+
+#define MPSC_CHR_2 0x0010
+#define MPSC_CHR_2_TA (1<<7)
+#define MPSC_CHR_2_TCS (1<<9)
+#define MPSC_CHR_2_RA (1<<23)
+#define MPSC_CHR_2_CRD (1<<25)
+#define MPSC_CHR_2_EH (1<<31)
+
+#define MPSC_CHR_4 0x0018
+#define MPSC_CHR_4_Z (1<<29)
+
+#define MPSC_CHR_5 0x001c
+#define MPSC_CHR_5_CTL1_INTR (1<<12)
+#define MPSC_CHR_5_CTL1_VALID (1<<15)
+
+#define MPSC_CHR_10 0x0030
+
+#define MPSC_INTR_CAUSE 0x0000
+#define MPSC_INTR_CAUSE_RCC (1<<6)
+#define MPSC_INTR_MASK 0x0080
+
+#define SDMA_SDCM 0x0008
+#define SDMA_SDCM_AR (1<<15)
+#define SDMA_SDCM_AT (1<<31)
+
+static volatile char *mpsc_base;
+static volatile char *mpscintr_base;
+static u32 chr1, chr2;
+
+static int mpsc_open(void)
+{
+ chr1 = in_le32((u32 *)(mpsc_base + MPSC_CHR_1)) & 0x00ff0000;
+ chr2 = in_le32((u32 *)(mpsc_base + MPSC_CHR_2)) & ~(MPSC_CHR_2_TA
+ | MPSC_CHR_2_TCS | MPSC_CHR_2_RA | MPSC_CHR_2_CRD
+ | MPSC_CHR_2_EH);
+ out_le32((u32 *)(mpsc_base + MPSC_CHR_4), MPSC_CHR_4_Z);
+ out_le32((u32 *)(mpsc_base + MPSC_CHR_5),
+ MPSC_CHR_5_CTL1_INTR | MPSC_CHR_5_CTL1_VALID);
+ out_le32((u32 *)(mpsc_base + MPSC_CHR_2), chr2 | MPSC_CHR_2_EH);
+ return 0;
+}
+
+static void mpsc_putc(unsigned char c)
+{
+ while (in_le32((u32 *)(mpsc_base + MPSC_CHR_2)) & MPSC_CHR_2_TCS);
+
+ out_le32((u32 *)(mpsc_base + MPSC_CHR_1), chr1 | c);
+ out_le32((u32 *)(mpsc_base + MPSC_CHR_2), chr2 | MPSC_CHR_2_TCS);
+}
+
+static unsigned char mpsc_getc(void)
+{
+ u32 cause = 0;
+ unsigned char c;
+
+ while (!(cause & MPSC_INTR_CAUSE_RCC))
+ cause = in_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE));
+
+ c = in_8((u8 *)(mpsc_base + MPSC_CHR_10 + 2));
+ out_8((u8 *)(mpsc_base + MPSC_CHR_10 + 2), c);
+ out_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE),
+ cause & ~MPSC_INTR_CAUSE_RCC);
+
+ return c;
+}
+
+static u8 mpsc_tstc(void)
+{
+ return (u8)((in_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE))
+ & MPSC_INTR_CAUSE_RCC) != 0);
+}
+
+static void mpsc_stop_dma(volatile char *sdma_base)
+{
+ out_le32((u32 *)(mpsc_base + MPSC_CHR_2),MPSC_CHR_2_TA | MPSC_CHR_2_RA);
+ out_le32((u32 *)(sdma_base + SDMA_SDCM), SDMA_SDCM_AR | SDMA_SDCM_AT);
+
+ while ((in_le32((u32 *)(sdma_base + SDMA_SDCM))
+ & (SDMA_SDCM_AR | SDMA_SDCM_AT)) != 0)
+ udelay(100);
+}
+
+static volatile char *mpsc_get_virtreg_of_phandle(void *devp, char *prop)
+{
+ void *v;
+ int n;
+
+ n = getprop(devp, prop, &v, sizeof(v));
+ if (n != sizeof(v))
+ goto err_out;
+
+ devp = find_node_by_linuxphandle((u32)v);
+ if (devp == NULL)
+ goto err_out;
+
+ n = getprop(devp, "virtual-reg", &v, sizeof(v));
+ if (n == sizeof(v))
+ return v;
+
+err_out:
+ return NULL;
+}
+
+int mpsc_console_init(void *devp, struct serial_console_data *scdp)
+{
+ void *v;
+ int n, reg_set;
+ volatile char *sdma_base;
+
+ n = getprop(devp, "virtual-reg", &v, sizeof(v));
+ if (n != sizeof(v))
+ goto err_out;
+ mpsc_base = v;
+
+ sdma_base = mpsc_get_virtreg_of_phandle(devp, "sdma");
+ if (sdma_base == NULL)
+ goto err_out;
+
+ mpscintr_base = mpsc_get_virtreg_of_phandle(devp, "mpscintr");
+ if (mpscintr_base == NULL)
+ goto err_out;
+
+ n = getprop(devp, "block-index", &v, sizeof(v));
+ if (n != sizeof(v))
+ goto err_out;
+ reg_set = (int)v;
+
+ mpscintr_base += (reg_set == 0) ? 0x4 : 0xc;
+
+ /* Make sure the mpsc ctlrs are shutdown */
+ out_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE), 0);
+ out_le32((u32 *)(mpscintr_base + MPSC_INTR_CAUSE), 0);
+ out_le32((u32 *)(mpscintr_base + MPSC_INTR_MASK), 0);
+ out_le32((u32 *)(mpscintr_base + MPSC_INTR_MASK), 0);
+
+ mpsc_stop_dma(sdma_base);
+
+ scdp->open = mpsc_open;
+ scdp->putc = mpsc_putc;
+ scdp->getc = mpsc_getc;
+ scdp->tstc = mpsc_tstc;
+ scdp->close = NULL;
+
+ return 0;
+
+err_out:
+ return -1;
+}
Index: powerpc/arch/powerpc/boot/serial.c
===================================================================
--- powerpc.orig/arch/powerpc/boot/serial.c
+++ powerpc/arch/powerpc/boot/serial.c
@@ -125,6 +125,8 @@ int serial_console_init(void)
if (!strcmp(compat, "ns16550"))
rc = ns16550_console_init(devp, &serial_cd);
+ else if (!strcmp(compat, "marvell,mpsc"))
+ rc = mpsc_console_init(devp, &serial_cd);
/* Add other serial console driver calls here */
Index: powerpc/arch/powerpc/boot/Makefile
===================================================================
--- powerpc.orig/arch/powerpc/boot/Makefile
+++ powerpc/arch/powerpc/boot/Makefile
@@ -43,7 +43,7 @@ $(addprefix $(obj)/,$(zlib) gunzip_util.
src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
ns16550.c serial.c simple_alloc.c div64.S util.S \
gunzip_util.c elf_util.c $(zlib) devtree.c \
- 44x.c ebony.c mv64x60.c
+ 44x.c ebony.c mv64x60.c mpsc.c
src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
cuboot-ebony.c treeboot-ebony.c
src-boot := $(src-wlib) $(src-plat) empty.c
Index: powerpc/arch/powerpc/boot/ops.h
===================================================================
--- powerpc.orig/arch/powerpc/boot/ops.h
+++ powerpc/arch/powerpc/boot/ops.h
@@ -79,6 +79,7 @@ void start(void);
int ft_init(void *dt_blob, unsigned int max_size, unsigned int max_find_device);
int serial_console_init(void);
int ns16550_console_init(void *devp, struct serial_console_data *scdp);
+int mpsc_console_init(void *devp, struct serial_console_data *scdp);
void *simple_alloc_init(char *base, unsigned long heap_size,
unsigned long granularity, unsigned long max_allocs);
extern void flush_cache(void *, unsigned long);
^ permalink raw reply
* [PATCH 2/13] powerpc: Add bootwrapper support for Marvell/mv64x60 hostbridge
From: Mark A. Greer @ 2007-05-12 0:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20070512004605.GA2808@mag.az.mvista.com>
The mv64x60 host bridge has many windows between its various components
(cpu, system memory, ethernet ctlr, MPSC, DMA ctlr, PCI MEM, PCI I/O).
Unfortunately, the firmware on some of mv64x60-based platforms do not
properly or completely configure those windows (e.g., MPSC->system memory
windows not configured or CPU->PCI MEM space not configured).
So, the missing configuration needs to be done in either the bootwrapper
or in the kernel. To keep the kernel as clean as possible, it is done
in the bootwrapper. Note that I/O controller configuration is NOT being
done, its only the windows to allow the I/O controllers and other components
to access memory, etc. that is being done--drivers assume that their
controllers can already access system memory).
Table of routines and the windows they configure:
mv64x60_config_ctlr_windows() ENET->System Memory
MPSC->System Memory
IDMA->System Memory
mv64x60_config_pci_windows() PCI MEM->System Memory
PCI I/O->Bridge's Registers
mv64x60_config_cpu2pci_window() CPU->PCI MEM
CPU->PCI I/O
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
---
arch/powerpc/boot/Makefile | 2
arch/powerpc/boot/mv64x60.c | 581 ++++++++++++++++++++++++++++++++++
arch/powerpc/boot/mv64x60.h | 70 ++++
3 files changed, 652 insertions(+), 1 deletion(-)
Index: powerpc/arch/powerpc/boot/mv64x60.c
===================================================================
--- /dev/null
+++ powerpc/arch/powerpc/boot/mv64x60.c
@@ -0,0 +1,581 @@
+/*
+ * Marvell hostbridge routines
+ *
+ * Author: Mark A. Greer <source@mvista.com>
+ *
+ * 2004, 2005, 2007 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <stdarg.h>
+#include <stddef.h>
+#include "types.h"
+#include "elf.h"
+#include "page.h"
+#include "string.h"
+#include "stdio.h"
+#include "io.h"
+#include "ops.h"
+#include "mv64x60.h"
+
+#define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07))
+
+#define MV64x60_CPU2MEM_WINDOWS 4
+#define MV64x60_CPU2MEM_0_BASE 0x0008
+#define MV64x60_CPU2MEM_0_SIZE 0x0010
+#define MV64x60_CPU2MEM_1_BASE 0x0208
+#define MV64x60_CPU2MEM_1_SIZE 0x0210
+#define MV64x60_CPU2MEM_2_BASE 0x0018
+#define MV64x60_CPU2MEM_2_SIZE 0x0020
+#define MV64x60_CPU2MEM_3_BASE 0x0218
+#define MV64x60_CPU2MEM_3_SIZE 0x0220
+
+#define MV64x60_ENET2MEM_BAR_ENABLE 0x2290
+#define MV64x60_ENET2MEM_0_BASE 0x2200
+#define MV64x60_ENET2MEM_0_SIZE 0x2204
+#define MV64x60_ENET2MEM_1_BASE 0x2208
+#define MV64x60_ENET2MEM_1_SIZE 0x220c
+#define MV64x60_ENET2MEM_2_BASE 0x2210
+#define MV64x60_ENET2MEM_2_SIZE 0x2214
+#define MV64x60_ENET2MEM_3_BASE 0x2218
+#define MV64x60_ENET2MEM_3_SIZE 0x221c
+#define MV64x60_ENET2MEM_4_BASE 0x2220
+#define MV64x60_ENET2MEM_4_SIZE 0x2224
+#define MV64x60_ENET2MEM_5_BASE 0x2228
+#define MV64x60_ENET2MEM_5_SIZE 0x222c
+#define MV64x60_ENET2MEM_ACC_PROT_0 0x2294
+#define MV64x60_ENET2MEM_ACC_PROT_1 0x2298
+#define MV64x60_ENET2MEM_ACC_PROT_2 0x229c
+
+#define MV64x60_MPSC2MEM_BAR_ENABLE 0xf250
+#define MV64x60_MPSC2MEM_0_BASE 0xf200
+#define MV64x60_MPSC2MEM_0_SIZE 0xf204
+#define MV64x60_MPSC2MEM_1_BASE 0xf208
+#define MV64x60_MPSC2MEM_1_SIZE 0xf20c
+#define MV64x60_MPSC2MEM_2_BASE 0xf210
+#define MV64x60_MPSC2MEM_2_SIZE 0xf214
+#define MV64x60_MPSC2MEM_3_BASE 0xf218
+#define MV64x60_MPSC2MEM_3_SIZE 0xf21c
+#define MV64x60_MPSC_0_REMAP 0xf240
+#define MV64x60_MPSC_1_REMAP 0xf244
+#define MV64x60_MPSC2MEM_ACC_PROT_0 0xf254
+#define MV64x60_MPSC2MEM_ACC_PROT_1 0xf258
+#define MV64x60_MPSC2REGS_BASE 0xf25c
+
+#define MV64x60_IDMA2MEM_BAR_ENABLE 0x0a80
+#define MV64x60_IDMA2MEM_0_BASE 0x0a00
+#define MV64x60_IDMA2MEM_0_SIZE 0x0a04
+#define MV64x60_IDMA2MEM_1_BASE 0x0a08
+#define MV64x60_IDMA2MEM_1_SIZE 0x0a0c
+#define MV64x60_IDMA2MEM_2_BASE 0x0a10
+#define MV64x60_IDMA2MEM_2_SIZE 0x0a14
+#define MV64x60_IDMA2MEM_3_BASE 0x0a18
+#define MV64x60_IDMA2MEM_3_SIZE 0x0a1c
+#define MV64x60_IDMA2MEM_4_BASE 0x0a20
+#define MV64x60_IDMA2MEM_4_SIZE 0x0a24
+#define MV64x60_IDMA2MEM_5_BASE 0x0a28
+#define MV64x60_IDMA2MEM_5_SIZE 0x0a2c
+#define MV64x60_IDMA2MEM_6_BASE 0x0a30
+#define MV64x60_IDMA2MEM_6_SIZE 0x0a34
+#define MV64x60_IDMA2MEM_7_BASE 0x0a38
+#define MV64x60_IDMA2MEM_7_SIZE 0x0a3c
+#define MV64x60_IDMA2MEM_ACC_PROT_0 0x0a70
+#define MV64x60_IDMA2MEM_ACC_PROT_1 0x0a74
+#define MV64x60_IDMA2MEM_ACC_PROT_2 0x0a78
+#define MV64x60_IDMA2MEM_ACC_PROT_3 0x0a7c
+
+#define MV64x60_PCI_ACC_CNTL_WINDOWS 6
+#define MV64x60_PCI0_PCI_DECODE_CNTL 0x0d3c
+#define MV64x60_PCI1_PCI_DECODE_CNTL 0x0dbc
+
+#define MV64x60_PCI0_BAR_ENABLE 0x0c3c
+#define MV64x60_PCI02MEM_0_SIZE 0x0c08
+#define MV64x60_PCI0_ACC_CNTL_0_BASE_LO 0x1e00
+#define MV64x60_PCI0_ACC_CNTL_0_BASE_HI 0x1e04
+#define MV64x60_PCI0_ACC_CNTL_0_SIZE 0x1e08
+#define MV64x60_PCI0_ACC_CNTL_1_BASE_LO 0x1e10
+#define MV64x60_PCI0_ACC_CNTL_1_BASE_HI 0x1e14
+#define MV64x60_PCI0_ACC_CNTL_1_SIZE 0x1e18
+#define MV64x60_PCI0_ACC_CNTL_2_BASE_LO 0x1e20
+#define MV64x60_PCI0_ACC_CNTL_2_BASE_HI 0x1e24
+#define MV64x60_PCI0_ACC_CNTL_2_SIZE 0x1e28
+#define MV64x60_PCI0_ACC_CNTL_3_BASE_LO 0x1e30
+#define MV64x60_PCI0_ACC_CNTL_3_BASE_HI 0x1e34
+#define MV64x60_PCI0_ACC_CNTL_3_SIZE 0x1e38
+#define MV64x60_PCI0_ACC_CNTL_4_BASE_LO 0x1e40
+#define MV64x60_PCI0_ACC_CNTL_4_BASE_HI 0x1e44
+#define MV64x60_PCI0_ACC_CNTL_4_SIZE 0x1e48
+#define MV64x60_PCI0_ACC_CNTL_5_BASE_LO 0x1e50
+#define MV64x60_PCI0_ACC_CNTL_5_BASE_HI 0x1e54
+#define MV64x60_PCI0_ACC_CNTL_5_SIZE 0x1e58
+
+#define MV64x60_PCI1_BAR_ENABLE 0x0cbc
+#define MV64x60_PCI12MEM_0_SIZE 0x0c88
+#define MV64x60_PCI1_ACC_CNTL_0_BASE_LO 0x1e80
+#define MV64x60_PCI1_ACC_CNTL_0_BASE_HI 0x1e84
+#define MV64x60_PCI1_ACC_CNTL_0_SIZE 0x1e88
+#define MV64x60_PCI1_ACC_CNTL_1_BASE_LO 0x1e90
+#define MV64x60_PCI1_ACC_CNTL_1_BASE_HI 0x1e94
+#define MV64x60_PCI1_ACC_CNTL_1_SIZE 0x1e98
+#define MV64x60_PCI1_ACC_CNTL_2_BASE_LO 0x1ea0
+#define MV64x60_PCI1_ACC_CNTL_2_BASE_HI 0x1ea4
+#define MV64x60_PCI1_ACC_CNTL_2_SIZE 0x1ea8
+#define MV64x60_PCI1_ACC_CNTL_3_BASE_LO 0x1eb0
+#define MV64x60_PCI1_ACC_CNTL_3_BASE_HI 0x1eb4
+#define MV64x60_PCI1_ACC_CNTL_3_SIZE 0x1eb8
+#define MV64x60_PCI1_ACC_CNTL_4_BASE_LO 0x1ec0
+#define MV64x60_PCI1_ACC_CNTL_4_BASE_HI 0x1ec4
+#define MV64x60_PCI1_ACC_CNTL_4_SIZE 0x1ec8
+#define MV64x60_PCI1_ACC_CNTL_5_BASE_LO 0x1ed0
+#define MV64x60_PCI1_ACC_CNTL_5_BASE_HI 0x1ed4
+#define MV64x60_PCI1_ACC_CNTL_5_SIZE 0x1ed8
+
+#define MV64x60_CPU2PCI_SWAP_NONE 0x01000000
+
+#define MV64x60_CPU2PCI0_IO_BASE 0x0048
+#define MV64x60_CPU2PCI0_IO_SIZE 0x0050
+#define MV64x60_CPU2PCI0_IO_REMAP 0x00f0
+#define MV64x60_CPU2PCI0_MEM_0_BASE 0x0058
+#define MV64x60_CPU2PCI0_MEM_0_SIZE 0x0060
+#define MV64x60_CPU2PCI0_MEM_0_REMAP_LO 0x00f8
+#define MV64x60_CPU2PCI0_MEM_0_REMAP_HI 0x0320
+
+#define MV64x60_CPU2PCI1_IO_BASE 0x0090
+#define MV64x60_CPU2PCI1_IO_SIZE 0x0098
+#define MV64x60_CPU2PCI1_IO_REMAP 0x0108
+#define MV64x60_CPU2PCI1_MEM_0_BASE 0x00a0
+#define MV64x60_CPU2PCI1_MEM_0_SIZE 0x00a8
+#define MV64x60_CPU2PCI1_MEM_0_REMAP_LO 0x0110
+#define MV64x60_CPU2PCI1_MEM_0_REMAP_HI 0x0340
+
+struct mv64x60_mem_win {
+ u32 hi;
+ u32 lo;
+ u32 size;
+};
+
+struct mv64x60_pci_win {
+ u32 fcn;
+ u32 hi;
+ u32 lo;
+ u32 size;
+};
+
+/* PCI config access routines */
+struct {
+ u32 addr;
+ u32 data;
+} static mv64x60_pci_cfgio[2] = {
+ { /* hose 0 */
+ .addr = 0xcf8,
+ .data = 0xcfc,
+ },
+ { /* hose 1 */
+ .addr = 0xc78,
+ .data = 0xc7c,
+ }
+};
+
+u32 mv64x60_cfg_read(u8 *bridge_base, u8 hose, u8 bus, u8 devfn, u8 offset)
+{
+ out_le32((u32 *)(bridge_base + mv64x60_pci_cfgio[hose].addr),
+ (1 << 31) | (bus << 16) | (devfn << 8) | offset);
+ return in_le32((u32 *)(bridge_base + mv64x60_pci_cfgio[hose].data));
+}
+
+void mv64x60_cfg_write(u8 *bridge_base, u8 hose, u8 bus, u8 devfn, u8 offset,
+ u32 val)
+{
+ out_le32((u32 *)(bridge_base + mv64x60_pci_cfgio[hose].addr),
+ (1 << 31) | (bus << 16) | (devfn << 8) | offset);
+ out_le32((u32 *)(bridge_base + mv64x60_pci_cfgio[hose].data), val);
+}
+
+/* I/O ctlr -> system memory setup */
+static struct mv64x60_mem_win mv64x60_cpu2mem[MV64x60_CPU2MEM_WINDOWS] = {
+ {
+ .lo = MV64x60_CPU2MEM_0_BASE,
+ .size = MV64x60_CPU2MEM_0_SIZE,
+ },
+ {
+ .lo = MV64x60_CPU2MEM_1_BASE,
+ .size = MV64x60_CPU2MEM_1_SIZE,
+ },
+ {
+ .lo = MV64x60_CPU2MEM_2_BASE,
+ .size = MV64x60_CPU2MEM_2_SIZE,
+ },
+ {
+ .lo = MV64x60_CPU2MEM_3_BASE,
+ .size = MV64x60_CPU2MEM_3_SIZE,
+ },
+};
+
+static struct mv64x60_mem_win mv64x60_enet2mem[MV64x60_CPU2MEM_WINDOWS] = {
+ {
+ .lo = MV64x60_ENET2MEM_0_BASE,
+ .size = MV64x60_ENET2MEM_0_SIZE,
+ },
+ {
+ .lo = MV64x60_ENET2MEM_1_BASE,
+ .size = MV64x60_ENET2MEM_1_SIZE,
+ },
+ {
+ .lo = MV64x60_ENET2MEM_2_BASE,
+ .size = MV64x60_ENET2MEM_2_SIZE,
+ },
+ {
+ .lo = MV64x60_ENET2MEM_3_BASE,
+ .size = MV64x60_ENET2MEM_3_SIZE,
+ },
+};
+
+static struct mv64x60_mem_win mv64x60_mpsc2mem[MV64x60_CPU2MEM_WINDOWS] = {
+ {
+ .lo = MV64x60_MPSC2MEM_0_BASE,
+ .size = MV64x60_MPSC2MEM_0_SIZE,
+ },
+ {
+ .lo = MV64x60_MPSC2MEM_1_BASE,
+ .size = MV64x60_MPSC2MEM_1_SIZE,
+ },
+ {
+ .lo = MV64x60_MPSC2MEM_2_BASE,
+ .size = MV64x60_MPSC2MEM_2_SIZE,
+ },
+ {
+ .lo = MV64x60_MPSC2MEM_3_BASE,
+ .size = MV64x60_MPSC2MEM_3_SIZE,
+ },
+};
+
+static struct mv64x60_mem_win mv64x60_idma2mem[MV64x60_CPU2MEM_WINDOWS] = {
+ {
+ .lo = MV64x60_IDMA2MEM_0_BASE,
+ .size = MV64x60_IDMA2MEM_0_SIZE,
+ },
+ {
+ .lo = MV64x60_IDMA2MEM_1_BASE,
+ .size = MV64x60_IDMA2MEM_1_SIZE,
+ },
+ {
+ .lo = MV64x60_IDMA2MEM_2_BASE,
+ .size = MV64x60_IDMA2MEM_2_SIZE,
+ },
+ {
+ .lo = MV64x60_IDMA2MEM_3_BASE,
+ .size = MV64x60_IDMA2MEM_3_SIZE,
+ },
+};
+
+static u32 mv64x60_dram_selects[MV64x60_CPU2MEM_WINDOWS] = {0xe,0xd,0xb,0x7};
+
+/*
+ * ENET, MPSC, and IDMA ctlrs on the MV64x60 have separate windows that
+ * must be set up so that the respective ctlr can access system memory.
+ * Configure them to be same as cpu->memory windows.
+ */
+void mv64x60_config_ctlr_windows(u8 *bridge_base, u8 *bridge_pbase,
+ u8 is_coherent)
+{
+ u32 i, base, size, enables, prot = 0, snoop_bits = 0;
+
+ /* Disable ctlr->mem windows */
+ out_le32((u32 *)(bridge_base + MV64x60_ENET2MEM_BAR_ENABLE), 0x3f);
+ out_le32((u32 *)(bridge_base + MV64x60_MPSC2MEM_BAR_ENABLE), 0xf);
+ out_le32((u32 *)(bridge_base + MV64x60_ENET2MEM_BAR_ENABLE), 0xff);
+
+ if (is_coherent)
+ snoop_bits = 0x2 << 12; /* Writeback */
+
+ enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)) & 0xf;
+
+ for (i=0; i<MV64x60_CPU2MEM_WINDOWS; i++) {
+ if (enables & (1 << i)) /* Set means disabled */
+ continue;
+
+ base = in_le32((u32 *)(bridge_base + mv64x60_cpu2mem[i].lo))
+ << 16;
+ base |= snoop_bits | (mv64x60_dram_selects[i] << 8);
+ size = in_le32((u32 *)(bridge_base + mv64x60_cpu2mem[i].size))
+ << 16;
+ prot |= (0x3 << (i << 1)); /* RW access */
+
+ out_le32((u32 *)(bridge_base + mv64x60_enet2mem[i].lo), base);
+ out_le32((u32 *)(bridge_base + mv64x60_enet2mem[i].size), size);
+ out_le32((u32 *)(bridge_base + mv64x60_mpsc2mem[i].lo), base);
+ out_le32((u32 *)(bridge_base + mv64x60_mpsc2mem[i].size), size);
+ out_le32((u32 *)(bridge_base + mv64x60_idma2mem[i].lo), base);
+ out_le32((u32 *)(bridge_base + mv64x60_idma2mem[i].size), size);
+ }
+
+ out_le32((u32 *)(bridge_base + MV64x60_ENET2MEM_ACC_PROT_0), prot);
+ out_le32((u32 *)(bridge_base + MV64x60_ENET2MEM_ACC_PROT_1), prot);
+ out_le32((u32 *)(bridge_base + MV64x60_ENET2MEM_ACC_PROT_2), prot);
+ out_le32((u32 *)(bridge_base + MV64x60_MPSC2MEM_ACC_PROT_0), prot);
+ out_le32((u32 *)(bridge_base + MV64x60_MPSC2MEM_ACC_PROT_1), prot);
+ out_le32((u32 *)(bridge_base + MV64x60_IDMA2MEM_ACC_PROT_0), prot);
+ out_le32((u32 *)(bridge_base + MV64x60_IDMA2MEM_ACC_PROT_1), prot);
+ out_le32((u32 *)(bridge_base + MV64x60_IDMA2MEM_ACC_PROT_2), prot);
+ out_le32((u32 *)(bridge_base + MV64x60_IDMA2MEM_ACC_PROT_3), prot);
+
+ /* Set mpsc->bridge's reg window to the bridge's internal registers. */
+ out_le32((u32 *)(bridge_base + MV64x60_MPSC2REGS_BASE),
+ (u32)bridge_pbase);
+
+ out_le32((u32 *)(bridge_base + MV64x60_ENET2MEM_BAR_ENABLE), enables);
+ out_le32((u32 *)(bridge_base + MV64x60_MPSC2MEM_BAR_ENABLE), enables);
+ out_le32((u32 *)(bridge_base + MV64x60_IDMA2MEM_BAR_ENABLE), enables);
+}
+
+/* PCI MEM -> system memory, et. al. setup */
+static struct mv64x60_pci_win mv64x60_pci2mem[2] = {
+ { /* hose 0 */
+ .fcn = 0,
+ .hi = 0x14,
+ .lo = 0x10,
+ .size = MV64x60_PCI02MEM_0_SIZE,
+ },
+ { /* hose 1 */
+ .fcn = 0,
+ .hi = 0x94,
+ .lo = 0x90,
+ .size = MV64x60_PCI12MEM_0_SIZE,
+ },
+};
+
+static struct
+mv64x60_mem_win mv64x60_pci_acc[2][MV64x60_PCI_ACC_CNTL_WINDOWS] = {
+ { /* hose 0 */
+ {
+ .hi = MV64x60_PCI0_ACC_CNTL_0_BASE_HI,
+ .lo = MV64x60_PCI0_ACC_CNTL_0_BASE_LO,
+ .size = MV64x60_PCI0_ACC_CNTL_0_SIZE,
+ },
+ {
+ .hi = MV64x60_PCI0_ACC_CNTL_1_BASE_HI,
+ .lo = MV64x60_PCI0_ACC_CNTL_1_BASE_LO,
+ .size = MV64x60_PCI0_ACC_CNTL_1_SIZE,
+ },
+ {
+ .hi = MV64x60_PCI0_ACC_CNTL_2_BASE_HI,
+ .lo = MV64x60_PCI0_ACC_CNTL_2_BASE_LO,
+ .size = MV64x60_PCI0_ACC_CNTL_2_SIZE,
+ },
+ {
+ .hi = MV64x60_PCI0_ACC_CNTL_3_BASE_HI,
+ .lo = MV64x60_PCI0_ACC_CNTL_3_BASE_LO,
+ .size = MV64x60_PCI0_ACC_CNTL_3_SIZE,
+ },
+ },
+ { /* hose 1 */
+ {
+ .hi = MV64x60_PCI1_ACC_CNTL_0_BASE_HI,
+ .lo = MV64x60_PCI1_ACC_CNTL_0_BASE_LO,
+ .size = MV64x60_PCI1_ACC_CNTL_0_SIZE,
+ },
+ {
+ .hi = MV64x60_PCI1_ACC_CNTL_1_BASE_HI,
+ .lo = MV64x60_PCI1_ACC_CNTL_1_BASE_LO,
+ .size = MV64x60_PCI1_ACC_CNTL_1_SIZE,
+ },
+ {
+ .hi = MV64x60_PCI1_ACC_CNTL_2_BASE_HI,
+ .lo = MV64x60_PCI1_ACC_CNTL_2_BASE_LO,
+ .size = MV64x60_PCI1_ACC_CNTL_2_SIZE,
+ },
+ {
+ .hi = MV64x60_PCI1_ACC_CNTL_3_BASE_HI,
+ .lo = MV64x60_PCI1_ACC_CNTL_3_BASE_LO,
+ .size = MV64x60_PCI1_ACC_CNTL_3_SIZE,
+ },
+ },
+};
+
+static struct mv64x60_mem_win mv64x60_pci2reg[2] = {
+ {
+ .hi = 0x24,
+ .lo = 0x20,
+ .size = 0,
+ },
+ {
+ .hi = 0xa4,
+ .lo = 0xa0,
+ .size = 0,
+ },
+};
+
+/* Only need to use 1 window (per hose) to get access to all of system memory */
+void mv64x60_config_pci_windows(u8 *bridge_base, u8 *bridge_pbase, u8 hose,
+ u8 bus, u32 mem_size, u32 acc_bits)
+{
+ u32 i, offset, bar_enable, enables;
+
+ /* Disable all windows but PCI MEM -> Bridge's regs window */
+ enables = ~(1 << 9);
+ bar_enable = hose ? MV64x60_PCI1_BAR_ENABLE : MV64x60_PCI0_BAR_ENABLE;
+ out_le32((u32 *)(bridge_base + bar_enable), enables);
+
+ for (i=0; i<MV64x60_PCI_ACC_CNTL_WINDOWS; i++)
+ out_le32((u32 *)(bridge_base + mv64x60_pci_acc[hose][i].lo), 0);
+
+ /* If mem_size is 0, leave windows disabled */
+ if (mem_size == 0)
+ return;
+
+ /* Cause automatic updates of PCI remap regs */
+ offset = hose ?
+ MV64x60_PCI1_PCI_DECODE_CNTL : MV64x60_PCI0_PCI_DECODE_CNTL;
+ i = in_le32((u32 *)(bridge_base + offset));
+ out_le32((u32 *)(bridge_base + offset), i & ~0x1);
+
+ mem_size = (mem_size - 1) & 0xfffff000;
+
+ /* Map PCI MEM addr 0 -> System Mem addr 0 */
+ mv64x60_cfg_write(bridge_base, hose, bus,
+ PCI_DEVFN(0, mv64x60_pci2mem[hose].fcn),
+ mv64x60_pci2mem[hose].hi, 0);
+ mv64x60_cfg_write(bridge_base, hose, bus,
+ PCI_DEVFN(0, mv64x60_pci2mem[hose].fcn),
+ mv64x60_pci2mem[hose].lo, 0);
+ out_le32((u32 *)(bridge_base + mv64x60_pci2mem[hose].size),mem_size);
+
+ acc_bits |= MV64x60_PCI_ACC_CNTL_ENABLE;
+ out_le32((u32 *)(bridge_base + mv64x60_pci_acc[hose][0].hi), 0);
+ out_le32((u32 *)(bridge_base + mv64x60_pci_acc[hose][0].lo), acc_bits);
+ out_le32((u32 *)(bridge_base + mv64x60_pci_acc[hose][0].size),mem_size);
+
+ /* Set PCI MEM->bridge's reg window to where they are in CPU mem map */
+ i = (u32)bridge_base;
+ i &= 0xffff0000;
+ i |= (0x2 << 1);
+ mv64x60_cfg_write(bridge_base, hose, bus, PCI_DEVFN(0,0),
+ mv64x60_pci2reg[hose].hi, 0);
+ mv64x60_cfg_write(bridge_base, hose, bus, PCI_DEVFN(0,0),
+ mv64x60_pci2reg[hose].lo, i);
+
+ enables &= ~0x1; /* Enable PCI MEM -> System Mem window 0 */
+ out_le32((u32 *)(bridge_base + bar_enable), enables);
+}
+
+/* CPU -> PCI I/O & MEM setup */
+struct mv64x60_cpu2pci_win mv64x60_cpu2pci_io[2] = {
+ { /* hose 0 */
+ .lo = MV64x60_CPU2PCI0_IO_BASE,
+ .size = MV64x60_CPU2PCI0_IO_SIZE,
+ .remap_hi = 0,
+ .remap_lo = MV64x60_CPU2PCI0_IO_REMAP,
+ },
+ { /* hose 1 */
+ .lo = MV64x60_CPU2PCI1_IO_BASE,
+ .size = MV64x60_CPU2PCI1_IO_SIZE,
+ .remap_hi = 0,
+ .remap_lo = MV64x60_CPU2PCI1_IO_REMAP,
+ },
+};
+
+struct mv64x60_cpu2pci_win mv64x60_cpu2pci_mem[2] = {
+ { /* hose 0 */
+ .lo = MV64x60_CPU2PCI0_MEM_0_BASE,
+ .size = MV64x60_CPU2PCI0_MEM_0_SIZE,
+ .remap_hi = MV64x60_CPU2PCI0_MEM_0_REMAP_HI,
+ .remap_lo = MV64x60_CPU2PCI0_MEM_0_REMAP_LO,
+ },
+ { /* hose 1 */
+ .lo = MV64x60_CPU2PCI1_MEM_0_BASE,
+ .size = MV64x60_CPU2PCI1_MEM_0_SIZE,
+ .remap_hi = MV64x60_CPU2PCI1_MEM_0_REMAP_HI,
+ .remap_lo = MV64x60_CPU2PCI1_MEM_0_REMAP_LO,
+ },
+};
+
+/* Only need to set up 1 window to pci mem space */
+void mv64x60_config_cpu2pci_window(u8 *bridge_base, u8 hose, u32 pci_base_hi,
+ u32 pci_base_lo, u32 cpu_base, u32 size,
+ struct mv64x60_cpu2pci_win *offset_tbl)
+{
+ cpu_base >>= 16;
+ cpu_base |= MV64x60_CPU2PCI_SWAP_NONE;
+ out_le32((u32 *)(bridge_base + offset_tbl[hose].lo), cpu_base);
+
+ if (offset_tbl[hose].remap_hi != 0)
+ out_le32((u32 *)(bridge_base + offset_tbl[hose].remap_hi),
+ pci_base_hi);
+ out_le32((u32 *)(bridge_base + offset_tbl[hose].remap_lo),
+ pci_base_lo >> 16);
+
+ size = (size - 1) >> 16;
+ out_le32((u32 *)(bridge_base + offset_tbl[hose].size), size);
+}
+
+/* Read mem ctlr to get the amount of mem in system */
+u32 mv64x60_get_mem_size(u8 *bridge_base)
+{
+ u32 enables, i, v;
+ u32 mem = 0;
+
+ enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)) & 0xf;
+
+ for (i=0; i<MV64x60_CPU2MEM_WINDOWS; i++)
+ if (!(enables & (1<<i))) {
+ v = in_le32((u32*)(bridge_base
+ + mv64x60_cpu2mem[i].size));
+ v = ((v & 0xffff) + 1) << 16;
+ mem += v;
+ }
+
+ return mem;
+}
+
+/* Get physical address of bridge's registers */
+u8 *mv64x60_get_bridge_pbase(void)
+{
+ u32 v[2];
+ void *devp;
+
+ devp = finddevice("/mv64x60");
+ if (devp == NULL)
+ goto err_out;
+ if (getprop(devp, "reg", v, sizeof(v)) != sizeof(v))
+ goto err_out;
+
+ return (u8 *)v[0];
+
+err_out:
+ return 0;
+}
+
+/* Get virtual address of bridge's registers */
+u8 *mv64x60_get_bridge_base(void)
+{
+ u32 v;
+ void *devp;
+
+ devp = finddevice("/mv64x60");
+ if (devp == NULL)
+ goto err_out;
+ if (getprop(devp, "virtual-reg", &v, sizeof(v)) != sizeof(v))
+ goto err_out;
+
+ return (u8 *)v;
+
+err_out:
+ return 0;
+}
+
+u8 mv64x60_is_coherent(void)
+{
+ u32 v;
+ void *devp;
+
+ devp = finddevice("/");
+ if (devp == NULL)
+ return 1; /* Assume coherency on */
+
+ if (getprop(devp, "coherency-off", &v, sizeof(v)) < 0)
+ return 1; /* Coherency on */
+ else
+ return 0;
+}
Index: powerpc/arch/powerpc/boot/mv64x60.h
===================================================================
--- /dev/null
+++ powerpc/arch/powerpc/boot/mv64x60.h
@@ -0,0 +1,70 @@
+/*
+ * Author: Mark A. Greer <source@mvista.com>
+ *
+ * 2007 (c) MontaVista Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#ifndef _PPC_BOOT_MV64x60_H_
+#define _PPC_BOOT_MV64x60_H_
+
+#define MV64x60_CPU_BAR_ENABLE 0x0278
+
+#define MV64x60_PCI_ACC_CNTL_ENABLE (1<<0)
+#define MV64x60_PCI_ACC_CNTL_REQ64 (1<<1)
+#define MV64x60_PCI_ACC_CNTL_SNOOP_NONE 0x00000000
+#define MV64x60_PCI_ACC_CNTL_SNOOP_WT 0x00000004
+#define MV64x60_PCI_ACC_CNTL_SNOOP_WB 0x00000008
+#define MV64x60_PCI_ACC_CNTL_SNOOP_MASK 0x0000000c
+#define MV64x60_PCI_ACC_CNTL_ACCPROT (1<<4)
+#define MV64x60_PCI_ACC_CNTL_WRPROT (1<<5)
+#define MV64x60_PCI_ACC_CNTL_SWAP_BYTE 0x00000000
+#define MV64x60_PCI_ACC_CNTL_SWAP_NONE 0x00000040
+#define MV64x60_PCI_ACC_CNTL_SWAP_BYTE_WORD 0x00000080
+#define MV64x60_PCI_ACC_CNTL_SWAP_WORD 0x000000c0
+#define MV64x60_PCI_ACC_CNTL_SWAP_MASK 0x000000c0
+#define MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES 0x00000000
+#define MV64x60_PCI_ACC_CNTL_MBURST_64_BYTES 0x00000100
+#define MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES 0x00000200
+#define MV64x60_PCI_ACC_CNTL_MBURST_MASK 0x00000300
+#define MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES 0x00000000
+#define MV64x60_PCI_ACC_CNTL_RDSIZE_64_BYTES 0x00000400
+#define MV64x60_PCI_ACC_CNTL_RDSIZE_128_BYTES 0x00000800
+#define MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES 0x00000c00
+#define MV64x60_PCI_ACC_CNTL_RDSIZE_MASK 0x00000c00
+
+struct mv64x60_cpu2pci_win {
+ u32 lo;
+ u32 size;
+ u32 remap_hi;
+ u32 remap_lo;
+};
+
+extern struct mv64x60_cpu2pci_win mv64x60_cpu2pci_io[2];
+extern struct mv64x60_cpu2pci_win mv64x60_cpu2pci_mem[2];
+
+u32 mv64x60_cfg_read(u8 *bridge_base, u8 hose, u8 bus, u8 devfn,
+ u8 offset);
+void mv64x60_cfg_write(u8 *bridge_base, u8 hose, u8 bus, u8 devfn,
+ u8 offset, u32 val);
+
+void mv64x60_config_ctlr_windows(u8 *bridge_base, u8 *bridge_pbase,
+ u8 is_coherent);
+void mv64x60_config_pci_windows(u8 *bridge_base, u8 *bridge_pbase, u8 hose,
+ u8 bus, u32 mem_size, u32 acc_bits);
+void mv64x60_config_cpu2pci_window(u8 *bridge_base, u8 hose, u32 pci_base_hi,
+ u32 pci_base_lo, u32 cpu_base, u32 size,
+ struct mv64x60_cpu2pci_win *offset_tbl);
+u32 mv64x60_get_mem_size(u8 *bridge_base);
+u8 *mv64x60_get_bridge_pbase(void);
+u8 *mv64x60_get_bridge_base(void);
+u8 mv64x60_is_coherent(void);
+
+int mv64x60_i2c_open(void);
+int mv64x60_i2c_read(u32 devaddr, u8 *buf, u32 offset, u32 offset_size,
+ u32 count);
+void mv64x60_i2c_close(void);
+
+#endif /* _PPC_BOOT_MV64x60_H_ */
Index: powerpc/arch/powerpc/boot/Makefile
===================================================================
--- powerpc.orig/arch/powerpc/boot/Makefile
+++ powerpc/arch/powerpc/boot/Makefile
@@ -43,7 +43,7 @@ $(addprefix $(obj)/,$(zlib) gunzip_util.
src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c flatdevtree_misc.c \
ns16550.c serial.c simple_alloc.c div64.S util.S \
gunzip_util.c elf_util.c $(zlib) devtree.c \
- 44x.c ebony.c
+ 44x.c ebony.c mv64x60.c
src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
cuboot-ebony.c treeboot-ebony.c
src-boot := $(src-wlib) $(src-plat) empty.c
^ permalink raw reply
* [PATCH 1/13] powerpc: Add Makefile rules to wrap dts file in zImage
From: Mark A. Greer @ 2007-05-12 0:53 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20070512004605.GA2808@mag.az.mvista.com>
Add 'zImage.dts' and 'zImage.dts_initrd' build rules that automatically
compile and wrap a dts file from arch/powerpc/boot/dts into the zImage file.
The resulting zImage will be arch/powerpc/boot/zImage.dts.<platform> and
arch/powerpc/boot/zImage.dts_initrd.<platform>, respectively.
Having separate rules allows the user to choose whether to include a device
tree--and which device tree--at build time. This is useful when one Makefile
target builds a zImage that runs on several platforms except for differing
device trees. By just setting CONFIG_DEVICE_TREE and running "make zImage.dts"
the exact zImage you want is built without Makefile bloat or manually running
the wrapper script.
The dts file is expected to be arch/powerpc/boot/dts/$(CONFIG_DEVICE_TREE)
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
---
arch/powerpc/Makefile | 2 +-
arch/powerpc/boot/Makefile | 25 ++++++++++++++++++++++++-
2 files changed, 25 insertions(+), 2 deletions(-)
Index: powerpc/arch/powerpc/boot/Makefile
===================================================================
--- powerpc.orig/arch/powerpc/boot/Makefile
+++ powerpc/arch/powerpc/boot/Makefile
@@ -154,9 +154,27 @@ targets += $(image-y) $(initrd-y)
$(addprefix $(obj)/, $(initrd-y)): $(obj)/ramdisk.image.gz
+dts- := $(patsubst zImage%, zImage.dts%, $(image-n) $(image-))
+dts-y := $(patsubst zImage%, zImage.dts%, $(image-y))
+dts-y := $(filter-out $(image-y), $(dts-y))
+targets += $(image-y) $(dts-y)
+
+dts_initrd- := $(patsubst zImage%, zImage.dts_initrd%, $(image-n) $(image-))
+dts_initrd-y := $(patsubst zImage%, zImage.dts_initrd%, $(image-y))
+dts_initrd-y := $(filter-out $(image-y), $(dts_initrd-y))
+targets += $(image-y) $(dts_initrd-y)
+
+$(addprefix $(obj)/, $(dts_initrd-y)): $(obj)/ramdisk.image.gz
+
# Don't put the ramdisk on the pattern rule; when its missing make will try
# the pattern rule with less dependencies that also matches (even with the
# hard dependency listed).
+$(obj)/zImage.dts_initrd.%: vmlinux $(wrapperbits) $(dts) $(obj)/ramdisk.image.gz
+ $(call if_changed,wrap,$*,$(dts),,$(obj)/ramdisk.image.gz)
+
+$(obj)/zImage.dts.%: vmlinux $(wrapperbits) $(dts)
+ $(call if_changed,wrap,$*,$(dts))
+
$(obj)/zImage.initrd.%: vmlinux $(wrapperbits)
$(call if_changed,wrap,$*,,,$(obj)/ramdisk.image.gz)
@@ -195,13 +213,18 @@ $(obj)/zImage: $(addprefix $(obj)/, $(i
@rm -f $@; ln $< $@
$(obj)/zImage.initrd: $(addprefix $(obj)/, $(initrd-y))
@rm -f $@; ln $< $@
+$(obj)/zImage.dts: $(addprefix $(obj)/, $(dts-y))
+ @rm -f $@; ln $< $@
+$(obj)/zImage.dts_initrd: $(addprefix $(obj)/, $(dts_initrd-y))
+ @rm -f $@; ln $< $@
+
install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
sh -x $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" vmlinux System.map "$(INSTALL_PATH)" $<
# anything not in $(targets)
clean-files += $(image-) $(initrd-) zImage zImage.initrd cuImage.* \
- treeImage.*
+ treeImage.* zImage.dts zImage.dts_initrd
# clean up files cached by wrapper
clean-kernel := vmlinux.strip vmlinux.bin
Index: powerpc/arch/powerpc/Makefile
===================================================================
--- powerpc.orig/arch/powerpc/Makefile
+++ powerpc/arch/powerpc/Makefile
@@ -148,7 +148,7 @@ all: $(KBUILD_IMAGE)
CPPFLAGS_vmlinux.lds := -Upowerpc
-BOOT_TARGETS = zImage zImage.initrd uImage
+BOOT_TARGETS = zImage zImage.initrd zImage.dts zImage.dts_initrd uImage
PHONY += $(BOOT_TARGETS)
^ permalink raw reply
* [PATCH 0/13] powerpc: Add support for Marvell/mv64x60 and prpmc2800
From: Mark A. Greer @ 2007-05-12 0:46 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Latest respin of these patches. Should address all comments except David's
comment about the '$(obj)/zImage.dts:' rules. I will address those next
week but if I get this out now, it may get in to 2.6.22. :)
Thanks,
Mark
^ permalink raw reply
* Re: [PATCH] spelling fixes: arch/powerpc/
From: Paul Mackerras @ 2007-05-12 0:09 UTC (permalink / raw)
To: Simon Arlott; +Cc: linuxppc-dev, trivial, Linux Kernel Mailing List
In-Reply-To: <4644C734.3000303@simon.arlott.org.uk>
Simon Arlott writes:
> Spelling fixes in arch/powerpc/.
> - /* Retreive CPU related informations from the flat tree
> + /* Retreive CPU related information from the flat tree
^^
You missed one. :)
> - /* Clear the freeze bit, and reenable the interrupt.
> + /* Clear the freeze bit, and re-enable the interrupt.
reenable -> re-enable is a bit marginal, but OK.
> /* Ok, now let's get cracking. You may ask me why I just didn't match
> * the iic host from the iic OF node, but that way I'm still compatible
> - * with really really old old firmwares for which we don't have a node
> + * with really really old old firmware for which we don't have a node
I think "firmwares" here was meaning to imply there were more than one
instance or release of firmware which had the property described, and
your change loses that.
> - * differenciate them all and since that hack was there for a long
> + * differentiate them all and since that hack was there for a long
I haven't been too strict about the Franglais in the past, but OK. :)
Paul.
^ permalink raw reply
* [patch] powerpc: use __used attribute
From: David Rientjes @ 2007-05-11 23:29 UTC (permalink / raw)
To: Paul Mackerras; +Cc: Tom Rini, linuxppc-dev
Use the newly introduced __used attribute instead of the deprecated
__attribute_used__. Functionally the same.
Cc: Tom Rini <trini@kernel.crashing.org>
Signed-off-by: David Rientjes <rientjes@google.com>
---
arch/powerpc/boot/Makefile | 2 +-
arch/powerpc/kernel/sysfs.c | 2 +-
arch/powerpc/oprofile/op_model_power4.c | 6 +++---
3 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -54,7 +54,7 @@ obj-wlib := $(addsuffix .o, $(basename $(addprefix $(obj)/, $(src-wlib))))
obj-plat := $(addsuffix .o, $(basename $(addprefix $(obj)/, $(src-plat))))
quiet_cmd_copy_zlib = COPY $@
- cmd_copy_zlib = sed "s@__attribute_used__@@;s@<linux/\([^>]\+\).*@\"\1\"@" $< > $@
+ cmd_copy_zlib = sed "s@__used@@;s@<linux/\([^>]\+\).*@\"\1\"@" $< > $@
quiet_cmd_copy_zlibheader = COPY $@
cmd_copy_zlibheader = sed "s@<linux/\([^>]\+\).*@\"\1\"@" $< > $@
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -158,7 +158,7 @@ static ssize_t show_##NAME(struct sys_device *dev, char *buf) \
unsigned long val = run_on_cpu(cpu->sysdev.id, read_##NAME, 0); \
return sprintf(buf, "%lx\n", val); \
} \
-static ssize_t __attribute_used__ \
+static ssize_t __used \
store_##NAME(struct sys_device *dev, const char *buf, size_t count) \
{ \
struct cpu *cpu = container_of(dev, struct cpu, sysdev); \
diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c
--- a/arch/powerpc/oprofile/op_model_power4.c
+++ b/arch/powerpc/oprofile/op_model_power4.c
@@ -165,15 +165,15 @@ static void power4_stop(void)
}
/* Fake functions used by canonicalize_pc */
-static void __attribute_used__ hypervisor_bucket(void)
+static void __used hypervisor_bucket(void)
{
}
-static void __attribute_used__ rtas_bucket(void)
+static void __used rtas_bucket(void)
{
}
-static void __attribute_used__ kernel_unknown_bucket(void)
+static void __used kernel_unknown_bucket(void)
{
}
^ permalink raw reply
* Re: 83xx: requesting external interrupts
From: Kumar Gala @ 2007-05-11 20:37 UTC (permalink / raw)
To: bwarren; +Cc: linuxppc-embedded
In-Reply-To: <1178915365.9018.44.camel@saruman.qstreams.net>
On May 11, 2007, at 3:29 PM, Ben Warren wrote:
> On Fri, 2007-05-11 at 15:15 -0500, Kumar Gala wrote:
>
>>
>> I assume you're code doesn't look exactly like this. You'll need to
>> use the virq in the request_irq()... its most likely just random luck
>> if things are working and you aren't using the virq returned from
>> irq_create_mapping()
>>
>> (Well its more than random luck, its because most 83xx systems only
>> have one PIC and this hw_irq # == virq)
>>
>> - k
>
> In the code that registers the ISR I do this:
>
> virq = irq_find_mapping(NULL, MY_IRQ);
> request_irq(virq ...)
>
> Since I only have one interrupt controller, host is NULL, right?
Should be ok. I've been doing the irq_create_mapping() in _init_IRQ
() and saving off the return.
- k
^ permalink raw reply
* Re: [PATCH] spelling fixes: arch/powerpc/
From: Geoff Levand @ 2007-05-11 20:32 UTC (permalink / raw)
To: Simon Arlott; +Cc: linuxppc-dev, trivial, Linux Kernel Mailing List
In-Reply-To: <4644C734.3000303@simon.arlott.org.uk>
Simon Arlott wrote:
> Spelling fixes in arch/powerpc/.
>
> Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
> arch/powerpc/platforms/ps3/interrupt.c | 2 +-
> arch/powerpc/platforms/ps3/mm.c | 6 +++---
> arch/powerpc/platforms/ps3/os-area.c | 4 ++--
> arch/powerpc/platforms/ps3/platform.h | 4 ++--
Acked-by: Geoff Levand <geoffrey.levand@am.sony.com>
^ permalink raw reply
* Re: 83xx: requesting external interrupts
From: Ben Warren @ 2007-05-11 20:29 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-embedded
In-Reply-To: <C873B42C-ABE7-4265-9EF5-15EBA9525324@kernel.crashing.org>
On Fri, 2007-05-11 at 15:15 -0500, Kumar Gala wrote:
>
> I assume you're code doesn't look exactly like this. You'll need to
> use the virq in the request_irq()... its most likely just random luck
> if things are working and you aren't using the virq returned from
> irq_create_mapping()
>
> (Well its more than random luck, its because most 83xx systems only
> have one PIC and this hw_irq # == virq)
>
> - k
In the code that registers the ISR I do this:
virq = irq_find_mapping(NULL, MY_IRQ);
request_irq(virq ...)
Since I only have one interrupt controller, host is NULL, right?
regards,
Ben
^ permalink raw reply
* Re: 83xx: requesting external interrupts
From: Kumar Gala @ 2007-05-11 20:15 UTC (permalink / raw)
To: bwarren; +Cc: linuxppc-embedded
In-Reply-To: <1178892748.9018.13.camel@saruman.qstreams.net>
On May 11, 2007, at 9:12 AM, Ben Warren wrote:
> Alex,
>
> On Fri, 2007-05-11 at 10:29 +0100, Alex Zeffertt wrote:
>> Hi,
>>
>> Thanks for your reply Ben, but I think my problem is slightly
>> different. It is not
>> that the sense (high/low/rising/falling) of the interrupt is
>> wrong, but that the
>> kernel will not allow me to register the handler.
>>
>> I've changed my code to:
>>
>> struct device_node *np = of_find_node_by_type(NULL, "ipic");
>> struct irq_host *host = irq_find_host(np);
>> int rc;
>>
>> unsigned int virq = irq_find_mapping(host, 5);
>> set_irq_type(virq, IRQ_TYPE_EDGE_FALLING);
>> rc = request_irq(virq, mpc832xemds_phy_interrupt,
>> IRQF_SHARED, "pm5384", dev);
>>
>> but the last line still returns a non-zero error code.
>>
>> Is there a new way of requesting to install a handler for external
>> interrupts? I
>> can't find any powerpc examples in the kernel tree....
>>
> Sorry, I missed a bit of the implementation. You need to register the
> IRQs before attempting to attach an ISR. Here's some sample code that
> works for me. You'll probably need different IRQs, based on what your
> board does:
>
> /* All external IRQs + Generic timer IRQs must be initialized by
> BSP */
> const int bsp_irqs[] = {48, 17, 18, 19, 20, 21, 22, 23, 90, 78, 84,
> 72};
>
> Add this to your BSP IRQ init code (void __init xxx_init_IRQs())
>
>
> for (i=0;i<sizeof(bsp_irqs)/sizeof(bsp_irqs[0]);i++)
> virq = irq_create_mapping(NULL, bsp_irqs[i]);
I assume you're code doesn't look exactly like this. You'll need to
use the virq in the request_irq()... its most likely just random luck
if things are working and you aren't using the virq returned from
irq_create_mapping()
(Well its more than random luck, its because most 83xx systems only
have one PIC and this hw_irq # == virq)
- k
^ permalink raw reply
* [PATCH] spelling fixes: arch/ppc/
From: Simon Arlott @ 2007-05-11 19:42 UTC (permalink / raw)
To: Linux Kernel Mailing List, linuxppc-dev, trivial
Spelling fixes in arch/ppc/.
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
arch/ppc/4xx_io/serial_sicc.c | 10 +++++-----
arch/ppc/8xx_io/commproc.c | 2 +-
arch/ppc/8xx_io/fec.c | 2 +-
arch/ppc/boot/lib/vreset.c | 2 +-
arch/ppc/boot/simple/m8xx_tty.c | 2 +-
arch/ppc/boot/simple/misc-embedded.c | 2 +-
arch/ppc/boot/simple/mpc52xx_tty.c | 2 +-
arch/ppc/boot/simple/mv64x60_tty.c | 2 +-
arch/ppc/boot/simple/rw4/stb.h | 2 +-
arch/ppc/kernel/traps.c | 4 ++--
arch/ppc/mm/init.c | 2 +-
arch/ppc/platforms/4xx/bubinga.c | 2 +-
arch/ppc/platforms/4xx/ep405.c | 2 +-
arch/ppc/platforms/4xx/ibmnp405h.h | 2 +-
arch/ppc/platforms/4xx/sycamore.c | 2 +-
arch/ppc/platforms/4xx/walnut.c | 2 +-
arch/ppc/platforms/ev64360.c | 2 +-
arch/ppc/platforms/hdpu.c | 2 +-
arch/ppc/platforms/katana.c | 2 +-
arch/ppc/platforms/mbx.h | 2 +-
arch/ppc/platforms/mvme5100.h | 2 +-
arch/ppc/platforms/pplus.h | 2 +-
arch/ppc/platforms/prep_pci.c | 22 +++++++++++-----------
arch/ppc/platforms/prep_setup.c | 6 +++---
arch/ppc/platforms/prpmc750.h | 2 +-
arch/ppc/platforms/radstone_ppc7d.c | 2 +-
arch/ppc/platforms/sandpoint.c | 8 ++++----
arch/ppc/syslib/harrier.c | 2 +-
arch/ppc/syslib/hawk_common.c | 4 ++--
arch/ppc/syslib/m82xx_pci.c | 2 +-
arch/ppc/syslib/mpc10x_common.c | 4 ++--
arch/ppc/syslib/mpc52xx_setup.c | 2 +-
arch/ppc/syslib/mpc8xx_devices.c | 2 +-
arch/ppc/syslib/mv64x60.c | 10 +++++-----
arch/ppc/syslib/ocp.c | 2 +-
arch/ppc/syslib/ppc403_pic.c | 2 +-
arch/ppc/syslib/ppc405_pci.c | 2 +-
arch/ppc/syslib/ppc4xx_dma.c | 2 +-
arch/ppc/syslib/ppc85xx_rio.c | 4 ++--
arch/ppc/syslib/xilinx_pic.c | 2 +-
40 files changed, 67 insertions(+), 67 deletions(-)
diff --git a/arch/ppc/4xx_io/serial_sicc.c b/arch/ppc/4xx_io/serial_sicc.c
index e354839..efa0a56 100644
--- a/arch/ppc/4xx_io/serial_sicc.c
+++ b/arch/ppc/4xx_io/serial_sicc.c
@@ -3,7 +3,7 @@
*
* Based on drivers/char/serial_amba.c, by ARM Ltd.
*
- * Copyright 2001 IBM Crop.
+ * Copyright 2001 IBM Corp.
* Author: IBM China Research Lab
* Yudong Yang <yangyud@cn.ibm.com>
* Yi Ge <geyi@cn.ibm.com>
@@ -155,16 +155,16 @@
/* serial port transmit command register */
-#define _TxCR_ET_MASK 0x80 /* transmiter enable mask */
+#define _TxCR_ET_MASK 0x80 /* transmitter enable mask */
#define _TxCR_DME_MASK 0x60 /* dma mode mask */
#define _TxCR_TIE_MASK 0x10 /* empty interrupt enable mask */
#define _TxCR_EIE_MASK 0x08 /* error interrupt enable mask */
#define _TxCR_SPE_MASK 0x04 /* stop/pause mask */
#define _TxCR_TB_MASK 0x02 /* transmit break mask */
-#define _TxCR_ET_ENABLE _TxCR_ET_MASK /* transmiter enabled */
-#define _TxCR_DME_DISABLE 0x00 /* transmiter disabled, TBR intr disabled */
-#define _TxCR_DME_TBR 0x20 /* transmiter disabled, TBR intr enabled */
+#define _TxCR_ET_ENABLE _TxCR_ET_MASK /* transmitter enabled */
+#define _TxCR_DME_DISABLE 0x00 /* transmitter disabled, TBR intr disabled */
+#define _TxCR_DME_TBR 0x20 /* transmitter disabled, TBR intr enabled */
#define _TxCR_DME_CHAN_2 0x40 /* dma enabled, destination chann 2 */
#define _TxCR_DME_CHAN_3 0x60 /* dma enabled, destination chann 3 */
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c
index e2c6210..7088428 100644
--- a/arch/ppc/8xx_io/commproc.c
+++ b/arch/ppc/8xx_io/commproc.c
@@ -144,7 +144,7 @@ m8xx_cpm_reset(void)
/* Set SDMA Bus Request priority 5.
* On 860T, this also enables FEC priority 6. I am not sure
- * this is what we realy want for some applications, but the
+ * this is what we really want for some applications, but the
* manual recommends it.
* Bit 25, FAM can also be set to use FEC aggressive mode (860T).
*/
diff --git a/arch/ppc/8xx_io/fec.c b/arch/ppc/8xx_io/fec.c
index 57a9a61..d38335d 100644
--- a/arch/ppc/8xx_io/fec.c
+++ b/arch/ppc/8xx_io/fec.c
@@ -1878,7 +1878,7 @@ fec_restart(struct net_device *dev, int duplex)
bdp--;
bdp->cbd_sc |= BD_SC_WRAP;
- /* ...and the same for transmmit.
+ /* ...and the same for transmit.
*/
bdp = fep->tx_bd_base;
for (i=0; i<TX_RING_SIZE; i++) {
diff --git a/arch/ppc/boot/lib/vreset.c b/arch/ppc/boot/lib/vreset.c
index 463ba00..98539e9 100644
--- a/arch/ppc/boot/lib/vreset.c
+++ b/arch/ppc/boot/lib/vreset.c
@@ -518,7 +518,7 @@ setTextRegs(struct VgaRegs *svp)
outb(0x3c6, 0xff); /* MASK */
for ( i = 0; i < 0x10; i++)
- writeAttr(i, AC[i], 0); /* pallete */
+ writeAttr(i, AC[i], 0); /* palette */
writeAttr(0x10, 0x0c, 0); /* text mode */
writeAttr(0x11, 0x00, 0); /* overscan color (border) */
writeAttr(0x12, 0x0f, 0); /* plane enable */
diff --git a/arch/ppc/boot/simple/m8xx_tty.c b/arch/ppc/boot/simple/m8xx_tty.c
index cacc40f..ea615d8 100644
--- a/arch/ppc/boot/simple/m8xx_tty.c
+++ b/arch/ppc/boot/simple/m8xx_tty.c
@@ -1,7 +1,7 @@
/* Minimal serial functions needed to send messages out the serial
* port on the MBX console.
*
- * The MBX uxes SMC1 for the serial port. We reset the port and use
+ * The MBX uses SMC1 for the serial port. We reset the port and use
* only the first BD that EPPC-Bug set up as a character FIFO.
*
* Later versions (at least 1.4, maybe earlier) of the MBX EPPC-Bug
diff --git a/arch/ppc/boot/simple/misc-embedded.c b/arch/ppc/boot/simple/misc-embedded.c
index 10219ee..8a08ad3 100644
--- a/arch/ppc/boot/simple/misc-embedded.c
+++ b/arch/ppc/boot/simple/misc-embedded.c
@@ -136,7 +136,7 @@ load_kernel(unsigned long load_addr, int num_words, unsigned long cksum, bd_t *b
/*
* We link ourself to an arbitrary low address. When we run, we
- * relocate outself to that address. __image_being points to
+ * relocate ourself to that address. __image_being points to
* the part of the image where the zImage is. -- Tom
*/
zimage_start = (char *)(unsigned long)(&__image_begin);
diff --git a/arch/ppc/boot/simple/mpc52xx_tty.c b/arch/ppc/boot/simple/mpc52xx_tty.c
index 7b5924c..6955891 100644
--- a/arch/ppc/boot/simple/mpc52xx_tty.c
+++ b/arch/ppc/boot/simple/mpc52xx_tty.c
@@ -33,7 +33,7 @@ static struct mpc52xx_psc __iomem *psc =
* rtc. We read the decrementer change during one rtc tick
* and multiply by 4 to get the system bus clock frequency. Since a
* rtc tick is one seconds, and that's pretty long, we change the rtc
- * dividers temporarly to set them 64x faster ;)
+ * dividers temporarily to set them 64x faster ;)
*/
static int
mpc52xx_ipbfreq(void)
diff --git a/arch/ppc/boot/simple/mv64x60_tty.c b/arch/ppc/boot/simple/mv64x60_tty.c
index 781e040..8a73578 100644
--- a/arch/ppc/boot/simple/mv64x60_tty.c
+++ b/arch/ppc/boot/simple/mv64x60_tty.c
@@ -338,7 +338,7 @@ serial_tstc(unsigned long com_port)
rdp = &rd[com_port][cur_rd[com_port]];
- /* Go thru rcv desc's until empty looking for one with data (no error)*/
+ /* Go through rcv descs until empty looking for one with data (no error)*/
while (((rdp->cmd_stat & SDMA_DESC_CMDSTAT_O) == 0) &&
(loop_count++ < RX_NUM_DESC)) {
diff --git a/arch/ppc/boot/simple/rw4/stb.h b/arch/ppc/boot/simple/rw4/stb.h
index fd98ee0..9afa5ab 100644
--- a/arch/ppc/boot/simple/rw4/stb.h
+++ b/arch/ppc/boot/simple/rw4/stb.h
@@ -88,7 +88,7 @@
/*----------------------------------------------------------------------------+
| STB tasks, task stack sizes, and task priorities. The actual task priority
| is 1 more than the specified number since priority 0 is reserved (system
-| internaly adds 1 to supplied priority number).
+| internally adds 1 to supplied priority number).
+----------------------------------------------------------------------------*/
#define STB_IDLE_TASK_SS (5* 1024)
#define STB_IDLE_TASK_PRIO 0
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index 810f7aa..aea100b 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -577,7 +577,7 @@ void program_check_exception(struct pt_regs *regs)
* ESR_DST (!?) or 0. In the process of chasing this with the
* hardware people - not sure if it can happen on any illegal
* instruction or only on FP instructions, whether there is a
- * pattern to occurences etc. -dgibson 31/Mar/2003 */
+ * pattern to occurrences etc. -dgibson 31/Mar/2003 */
if (!(reason & REASON_TRAP) && do_mathemu(regs) == 0) {
emulate_single_step(regs);
return;
@@ -860,7 +860,7 @@ void SPEFloatingPointException(struct pt_regs *regs)
spefscr = current->thread.spefscr;
fpexc_mode = current->thread.fpexc_mode;
- /* Hardware does not neccessarily set sticky
+ /* Hardware does not necessarily set sticky
* underflow/overflow/invalid flags */
if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
code = FPE_FLTOVF;
diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c
index c374e53..390dd19 100644
--- a/arch/ppc/mm/init.c
+++ b/arch/ppc/mm/init.c
@@ -48,7 +48,7 @@
#include "mmu_decl.h"
#if defined(CONFIG_KERNEL_START_BOOL) || defined(CONFIG_LOWMEM_SIZE_BOOL)
-/* The ammount of lowmem must be within 0xF0000000 - KERNELBASE. */
+/* The amount of lowmem must be within 0xF0000000 - KERNELBASE. */
#if (CONFIG_LOWMEM_SIZE > (0xF0000000 - KERNELBASE))
#error "You must adjust CONFIG_LOWMEM_SIZE or CONFIG_START_KERNEL"
#endif
diff --git a/arch/ppc/platforms/4xx/bubinga.c b/arch/ppc/platforms/4xx/bubinga.c
index 75857b3..1a7f075 100644
--- a/arch/ppc/platforms/4xx/bubinga.c
+++ b/arch/ppc/platforms/4xx/bubinga.c
@@ -197,7 +197,7 @@ bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
hose->first_busno, PCI_SLOT(hose->first_busno),
PCI_FUNC(hose->first_busno), bar, bar_response);
}
- /* end work arround */
+ /* end workaround */
#ifdef DEBUG
printk("PCI bridge regs after fixup \n");
diff --git a/arch/ppc/platforms/4xx/ep405.c b/arch/ppc/platforms/4xx/ep405.c
index e5adf9b..5aa2950 100644
--- a/arch/ppc/platforms/4xx/ep405.c
+++ b/arch/ppc/platforms/4xx/ep405.c
@@ -130,7 +130,7 @@ bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
hose->first_busno, PCI_SLOT(hose->first_busno),
PCI_FUNC(hose->first_busno), bar, bar_response);
}
- /* end work arround */
+ /* end workaround */
#endif
}
diff --git a/arch/ppc/platforms/4xx/ibmnp405h.h b/arch/ppc/platforms/4xx/ibmnp405h.h
index 4aa8821..08a6a77 100644
--- a/arch/ppc/platforms/4xx/ibmnp405h.h
+++ b/arch/ppc/platforms/4xx/ibmnp405h.h
@@ -80,7 +80,7 @@
#define DCRN_CPMFR_BASE 0x0B9
#define DCRN_CPMER_BASE 0x0B8
-/* CPM Clocking & Power Mangement defines */
+/* CPM Clocking & Power Management defines */
#define IBM_CPM_PCI 0x40000000 /* PCI */
#define IBM_CPM_EMAC2 0x20000000 /* EMAC 2 MII */
#define IBM_CPM_EMAC3 0x04000000 /* EMAC 3 MII */
diff --git a/arch/ppc/platforms/4xx/sycamore.c b/arch/ppc/platforms/4xx/sycamore.c
index c47493e..8689f3e 100644
--- a/arch/ppc/platforms/4xx/sycamore.c
+++ b/arch/ppc/platforms/4xx/sycamore.c
@@ -225,7 +225,7 @@ bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
hose->first_busno, PCI_SLOT(hose->first_busno),
PCI_FUNC(hose->first_busno), bar, bar_response);
}
- /* end work arround */
+ /* end workaround */
#ifdef DEBUG
printk("PCI bridge regs after fixup \n");
diff --git a/arch/ppc/platforms/4xx/walnut.c b/arch/ppc/platforms/4xx/walnut.c
index f414d2d..2f97723 100644
--- a/arch/ppc/platforms/4xx/walnut.c
+++ b/arch/ppc/platforms/4xx/walnut.c
@@ -200,7 +200,7 @@ bios_fixup(struct pci_controller *hose, struct pcil0_regs *pcip)
hose->first_busno, PCI_SLOT(hose->first_busno),
PCI_FUNC(hose->first_busno), bar, bar_response);
}
- /* end work arround */
+ /* end work around */
#ifdef DEBUG
printk("PCI bridge regs after fixup \n");
diff --git a/arch/ppc/platforms/ev64360.c b/arch/ppc/platforms/ev64360.c
index f87e06f..f8baf05 100644
--- a/arch/ppc/platforms/ev64360.c
+++ b/arch/ppc/platforms/ev64360.c
@@ -473,7 +473,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
* are non-zero, then we should use the board info from the bd_t
* structure and the cmdline pointed to by r6 instead of the
* information from birecs, if any. Otherwise, use the information
- * from birecs as discovered by the preceeding call to
+ * from birecs as discovered by the preceding call to
* parse_bootinfo(). This rule should work with both PPCBoot, which
* uses a bd_t board info structure, and the kernel boot wrapper,
* which uses birecs.
diff --git a/arch/ppc/platforms/hdpu.c b/arch/ppc/platforms/hdpu.c
index d809e17..ca5de13 100644
--- a/arch/ppc/platforms/hdpu.c
+++ b/arch/ppc/platforms/hdpu.c
@@ -144,7 +144,7 @@ static void __init hdpu_setup_peripherals(void)
/* Enable pipelining */
mv64x60_set_bits(&bh, MV64x60_CPU_CONFIG, (1 << 13));
- /* Enable Snoop Pipelineing */
+ /* Enable Snoop Pipelining */
mv64x60_set_bits(&bh, MV64360_D_UNIT_CONTROL_HIGH, (1 << 24));
/*
diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c
index 720f8b3..c289e9f 100644
--- a/arch/ppc/platforms/katana.c
+++ b/arch/ppc/platforms/katana.c
@@ -880,7 +880,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
* are non-zero, then we should use the board info from the bd_t
* structure and the cmdline pointed to by r6 instead of the
* information from birecs, if any. Otherwise, use the information
- * from birecs as discovered by the preceeding call to
+ * from birecs as discovered by the preceding call to
* parse_bootinfo(). This rule should work with both PPCBoot, which
* uses a bd_t board info structure, and the kernel boot wrapper,
* which uses birecs.
diff --git a/arch/ppc/platforms/mbx.h b/arch/ppc/platforms/mbx.h
index fe81ca4..1cf36fa 100644
--- a/arch/ppc/platforms/mbx.h
+++ b/arch/ppc/platforms/mbx.h
@@ -37,7 +37,7 @@ typedef struct bd_info {
/* Memory map for the MBX as configured by EPPC-Bug. We could reprogram
* The SIU and PCI bridge, and try to use larger MMU pages, but the
- * performance gain is not measureable and it certainly complicates the
+ * performance gain is not measurable and it certainly complicates the
* generic MMU model.
*
* In a effort to minimize memory usage for embedded applications, any
diff --git a/arch/ppc/platforms/mvme5100.h b/arch/ppc/platforms/mvme5100.h
index 9e2a09e..fbb5495 100644
--- a/arch/ppc/platforms/mvme5100.h
+++ b/arch/ppc/platforms/mvme5100.h
@@ -69,7 +69,7 @@
#define STD_COM_FLAGS ASYNC_BOOT_AUTOCONF
-/* All UART IRQ's are wire-OR'd to one MPIC IRQ */
+/* All UART IRQs are wire-OR'd to one MPIC IRQ */
#define STD_SERIAL_PORT_DFNS \
{ 0, BASE_BAUD, MVME5100_SERIAL_1, \
MVME5100_SERIAL_IRQ, \
diff --git a/arch/ppc/platforms/pplus.h b/arch/ppc/platforms/pplus.h
index a07cbbd..a4bbaa8 100644
--- a/arch/ppc/platforms/pplus.h
+++ b/arch/ppc/platforms/pplus.h
@@ -18,7 +18,7 @@
#include <asm/io.h>
/*
- * Due to limiations imposed by legacy hardware (primaryily IDE controllers),
+ * Due to limitations imposed by legacy hardware (primarily IDE controllers),
* the PPLUS boards operate using a PReP address map.
*
* From Processor (physical) -> PCI:
diff --git a/arch/ppc/platforms/prep_pci.c b/arch/ppc/platforms/prep_pci.c
index c627ba4..1df3150 100644
--- a/arch/ppc/platforms/prep_pci.c
+++ b/arch/ppc/platforms/prep_pci.c
@@ -589,9 +589,9 @@ static unsigned char prep_pci_intpins[4][4] =
{ 4, 1, 2, 3}, /* Buses 3, 7, 11 ... */
};
-/* We have to turn on LEVEL mode for changed IRQ's */
-/* All PCI IRQ's need to be level mode, so this should be something
- * other than hard-coded as well... IRQ's are individually mappable
+/* We have to turn on LEVEL mode for changed IRQs */
+/* All PCI IRQs need to be level mode, so this should be something
+ * other than hard-coded as well... IRQs are individually mappable
* to either edge or level.
*/
@@ -923,8 +923,8 @@ prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi)
Motherboard_map_name = "IBM 6015/7020 (Sandalfoot/Sandalbow)";
Motherboard_map = ibm6015_pci_IRQ_map;
Motherboard_routes = ibm6015_pci_IRQ_routes;
- *irq_edge_mask_lo = 0x00; /* irq's 0-7 all edge-triggered */
- *irq_edge_mask_hi = 0xA0; /* irq's 13, 15 level-triggered */
+ *irq_edge_mask_lo = 0x00; /* IRQs 0-7 all edge-triggered */
+ *irq_edge_mask_hi = 0xA0; /* IRQs 13, 15 level-triggered */
}
void __init
@@ -933,8 +933,8 @@ prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi)
Motherboard_map_name = "IBM Thinkpad 850/860";
Motherboard_map = Nobis_pci_IRQ_map;
Motherboard_routes = Nobis_pci_IRQ_routes;
- *irq_edge_mask_lo = 0x00; /* irq's 0-7 all edge-triggered */
- *irq_edge_mask_hi = 0xA0; /* irq's 13, 15 level-triggered */
+ *irq_edge_mask_lo = 0x00; /* IRQs 0-7 all edge-triggered */
+ *irq_edge_mask_hi = 0xA0; /* IRQs 13, 15 level-triggered */
}
void __init
@@ -943,8 +943,8 @@ prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi)
Motherboard_map_name = "IBM 7248, PowerSeries 830/850 (Carolina)";
Motherboard_map = ibm8xx_pci_IRQ_map;
Motherboard_routes = ibm8xx_pci_IRQ_routes;
- *irq_edge_mask_lo = 0x00; /* irq's 0-7 all edge-triggered */
- *irq_edge_mask_hi = 0xA4; /* irq's 10, 13, 15 level-triggered */
+ *irq_edge_mask_lo = 0x00; /* IRQs 0-7 all edge-triggered */
+ *irq_edge_mask_hi = 0xA4; /* IRQs 10, 13, 15 level-triggered */
}
void __init
@@ -954,8 +954,8 @@ prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi)
Motherboard_map = ibm43p_pci_IRQ_map;
Motherboard_routes = ibm43p_pci_IRQ_routes;
Motherboard_non0 = ibm43p_pci_map_non0;
- *irq_edge_mask_lo = 0x00; /* irq's 0-7 all edge-triggered */
- *irq_edge_mask_hi = 0xA0; /* irq's 13, 15 level-triggered */
+ *irq_edge_mask_lo = 0x00; /* IRQs 0-7 all edge-triggered */
+ *irq_edge_mask_hi = 0xA0; /* IRQs 13, 15 level-triggered */
}
void __init
diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c
index f166299..6f21110 100644
--- a/arch/ppc/platforms/prep_setup.c
+++ b/arch/ppc/platforms/prep_setup.c
@@ -593,7 +593,7 @@ static void __init prep_init_sound(void)
PPC_DEVICE *audiodevice = NULL;
/*
- * Get the needed resource informations from residual data.
+ * Get the needed resource information from residual data.
*
*/
if (have_residual_data)
@@ -632,9 +632,9 @@ static void __init prep_init_sound(void)
}
/*
- * Find a way to push these informations to the cs4232 driver
+ * Find a way to push this information to the cs4232 driver
* Give it out with printk, when not in cmd_line?
- * Append it to cmd_line and boot_command_line?
+ * Append it to cmd_line and boot_command_line?
* Format is cs4232=io,irq,dma,dma2
*/
}
diff --git a/arch/ppc/platforms/prpmc750.h b/arch/ppc/platforms/prpmc750.h
index 4c7adcc..c4dcff0 100644
--- a/arch/ppc/platforms/prpmc750.h
+++ b/arch/ppc/platforms/prpmc750.h
@@ -16,7 +16,7 @@
#define __ASM_PRPMC750_H__
/*
- * Due to limiations imposed by legacy hardware (primaryily IDE controllers),
+ * Due to limitations imposed by legacy hardware (primarily IDE controllers),
* the PrPMC750 carrier board operates using a PReP address map.
*
* From Processor (physical) -> PCI:
diff --git a/arch/ppc/platforms/radstone_ppc7d.c b/arch/ppc/platforms/radstone_ppc7d.c
index 13d70ab..b558607 100644
--- a/arch/ppc/platforms/radstone_ppc7d.c
+++ b/arch/ppc/platforms/radstone_ppc7d.c
@@ -1371,7 +1371,7 @@ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
* are non-zero, then we should use the board info from the bd_t
* structure and the cmdline pointed to by r6 instead of the
* information from birecs, if any. Otherwise, use the information
- * from birecs as discovered by the preceeding call to
+ * from birecs as discovered by the preceding call to
* parse_bootinfo(). This rule should work with both PPCBoot, which
* uses a bd_t board info structure, and the kernel boot wrapper,
* which uses birecs.
diff --git a/arch/ppc/platforms/sandpoint.c b/arch/ppc/platforms/sandpoint.c
index a76002a..3352fae 100644
--- a/arch/ppc/platforms/sandpoint.c
+++ b/arch/ppc/platforms/sandpoint.c
@@ -54,7 +54,7 @@
*
*
* Motorola has finally released a version of DINK32 that correctly
- * (seemingly) initalizes the memory controller correctly, regardless
+ * (seemingly) initializes the memory controller correctly, regardless
* of the amount of memory in the system. Once a method of determining
* what version of DINK initializes the system for us, if applicable, is
* found, we can hopefully stop hardcoding 32MB of RAM.
@@ -473,7 +473,7 @@ sandpoint_request_io(void)
arch_initcall(sandpoint_request_io);
/*
- * Interrupt setup and service. Interrrupts on the Sandpoint come
+ * Interrupt setup and service. Interrupts on the Sandpoint come
* from the four PCI slots plus the 8259 in the Winbond Super I/O (SIO).
* The 8259 is cascaded from EPIC IRQ0, IRQ1-4 map to PCI slots 1-4,
* IDE is on EPIC 7 and 8.
@@ -505,7 +505,7 @@ sandpoint_find_end_of_memory(void)
if (bp->bi_memsize)
return bp->bi_memsize;
- /* DINK32 13.0 correctly initalizes things, so iff you use
+ /* DINK32 13.0 correctly initializes things, so iff you use
* this you _should_ be able to change this instead of a
* hardcoded value. */
#if 0
@@ -677,7 +677,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
* are non-zero, then we should use the board info from the bd_t
* structure and the cmdline pointed to by r6 instead of the
* information from birecs, if any. Otherwise, use the information
- * from birecs as discovered by the preceeding call to
+ * from birecs as discovered by the preceding call to
* parse_bootinfo(). This rule should work with both PPCBoot, which
* uses a bd_t board info structure, and the kernel boot wrapper,
* which uses birecs.
diff --git a/arch/ppc/syslib/harrier.c b/arch/ppc/syslib/harrier.c
index c1583f4..45b797b 100644
--- a/arch/ppc/syslib/harrier.c
+++ b/arch/ppc/syslib/harrier.c
@@ -210,7 +210,7 @@ harrier_init(struct pci_controller *hose,
* This assumes that PPCBug has initialized the memory controller (SMC)
* on the Harrier correctly (i.e., it does no sanity checking).
* It also assumes that the memory base registers are set to configure the
- * memory as contigous starting with "RAM A BASE", "RAM B BASE", etc.
+ * memory as contiguous starting with "RAM A BASE", "RAM B BASE", etc.
* however, RAM base registers can be skipped (e.g. A, B, C are set,
* D is skipped but E is set is okay).
*/
diff --git a/arch/ppc/syslib/hawk_common.c b/arch/ppc/syslib/hawk_common.c
index c5bf16b..86821d8 100644
--- a/arch/ppc/syslib/hawk_common.c
+++ b/arch/ppc/syslib/hawk_common.c
@@ -165,7 +165,7 @@ hawk_init(struct pci_controller *hose,
processor_pci_mem_start +
hose->mem_space.start) | 0x0);
- /* Map MPIC into vitual memory */
+ /* Map MPIC into virtual memory */
OpenPIC_Addr = ioremap(processor_mpic_base, HAWK_MPIC_SIZE);
return 0;
@@ -176,7 +176,7 @@ hawk_init(struct pci_controller *hose,
* This assumes that PPCBug has initialized the memory controller (SMC)
* on the Falcon/HAWK correctly (i.e., it does no sanity checking).
* It also assumes that the memory base registers are set to configure the
- * memory as contigous starting with "RAM A BASE", "RAM B BASE", etc.
+ * memory as contiguous starting with "RAM A BASE", "RAM B BASE", etc.
* however, RAM base registers can be skipped (e.g. A, B, C are set,
* D is skipped but E is set is okay).
*/
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c
index e3b586b..fe860d5 100644
--- a/arch/ppc/syslib/m82xx_pci.c
+++ b/arch/ppc/syslib/m82xx_pci.c
@@ -197,7 +197,7 @@ pq2ads_setup_pci(struct pci_controller *hose)
CPM high 0b0000
CPM middle 0b0001
CPM low 0b0010
- PCI reguest 0b0011
+ PCI request 0b0011
Reserved 0b0100
Reserved 0b0101
Internal Core 0b0110
diff --git a/arch/ppc/syslib/mpc10x_common.c b/arch/ppc/syslib/mpc10x_common.c
index 2fc7c41..437a294 100644
--- a/arch/ppc/syslib/mpc10x_common.c
+++ b/arch/ppc/syslib/mpc10x_common.c
@@ -432,7 +432,7 @@ mpc10x_bridge_init(struct pci_controller *hose,
phys_eumb_base);
}
- /* IRQ's are determined at runtime */
+ /* IRQs are determined at runtime */
ppc_sys_platform_devices[MPC10X_IIC1].resource[1].start = MPC10X_I2C_IRQ;
ppc_sys_platform_devices[MPC10X_IIC1].resource[1].end = MPC10X_I2C_IRQ;
ppc_sys_platform_devices[MPC10X_DMA0].resource[1].start = MPC10X_DMA0_IRQ;
@@ -646,7 +646,7 @@ void __init mpc10x_set_openpic(void)
openpic_set_sources(EPIC_IRQ_BASE, 3, OpenPIC_Addr + 0x11020);
/* Skip reserved space and map Message Unit Interrupt (I2O) */
openpic_set_sources(EPIC_IRQ_BASE + 3, 1, OpenPIC_Addr + 0x110C0);
- /* Skip reserved space and map Serial Interupts */
+ /* Skip reserved space and map Serial Interrupts */
openpic_set_sources(EPIC_IRQ_BASE + 4, 2, OpenPIC_Addr + 0x11120);
openpic_init(NUM_8259_INTERRUPTS);
diff --git a/arch/ppc/syslib/mpc52xx_setup.c b/arch/ppc/syslib/mpc52xx_setup.c
index 80c6090..ecfa2c0 100644
--- a/arch/ppc/syslib/mpc52xx_setup.c
+++ b/arch/ppc/syslib/mpc52xx_setup.c
@@ -252,7 +252,7 @@ mpc52xx_setup_cpu(void)
out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
/* Disable XLB pipelining */
- /* (cfr errate 292. We could do this only just before ATA PIO
+ /* (cfr errata 292. We could do this only just before ATA PIO
transaction and re-enable it after ...) */
out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS);
diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c
index 31fb565..c05ac87 100644
--- a/arch/ppc/syslib/mpc8xx_devices.c
+++ b/arch/ppc/syslib/mpc8xx_devices.c
@@ -21,7 +21,7 @@
#include <asm/irq.h>
#include <asm/ppc_sys.h>
-/* We use offsets for IORESOURCE_MEM to do not set dependences at compile time.
+/* We use offsets for IORESOURCE_MEM to do not set dependencies at compile time.
* They will get fixed up by mach_mpc8xx_fixup
*/
diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c
index a6f8b68..8485a68 100644
--- a/arch/ppc/syslib/mv64x60.c
+++ b/arch/ppc/syslib/mv64x60.c
@@ -490,7 +490,7 @@ static struct platform_device *mv64x60_pd_devs[] __initdata = {
/*
* mv64x60_init()
*
- * Initialze the bridge based on setting passed in via 'si'. The bridge
+ * Initialize the bridge based on setting passed in via 'si'. The bridge
* handle, 'bh', will be set so that it can be used to make subsequent
* calls to routines in this file.
*/
@@ -1704,7 +1704,7 @@ gt64260_disable_all_windows(struct mv64x60_handle *bh,
/*
* gt64260a_chip_specific_init()
*
- * Implement errata work arounds for the GT64260A.
+ * Implement errata workarounds for the GT64260A.
*/
static void __init
gt64260a_chip_specific_init(struct mv64x60_handle *bh,
@@ -1776,7 +1776,7 @@ gt64260a_chip_specific_init(struct mv64x60_handle *bh,
/*
* gt64260b_chip_specific_init()
*
- * Implement errata work arounds for the GT64260B.
+ * Implement errata workarounds for the GT64260B.
*/
static void __init
gt64260b_chip_specific_init(struct mv64x60_handle *bh,
@@ -2316,7 +2316,7 @@ mv64360_set_mpsc2regs_window(struct mv64x60_handle *bh, u32 base)
/*
* mv64360_chip_specific_init()
*
- * Implement errata work arounds for the MV64360.
+ * Implement errata workarounds for the MV64360.
*/
static void __init
mv64360_chip_specific_init(struct mv64x60_handle *bh,
@@ -2336,7 +2336,7 @@ mv64360_chip_specific_init(struct mv64x60_handle *bh,
/*
* mv64460_chip_specific_init()
*
- * Implement errata work arounds for the MV64460.
+ * Implement errata workarounds for the MV64460.
*/
static void __init
mv64460_chip_specific_init(struct mv64x60_handle *bh,
diff --git a/arch/ppc/syslib/ocp.c b/arch/ppc/syslib/ocp.c
index 50c5562..491fe9a 100644
--- a/arch/ppc/syslib/ocp.c
+++ b/arch/ppc/syslib/ocp.c
@@ -27,7 +27,7 @@
* device model. The devices on the OCP bus are seeded by an
* an initial OCP device array created by the arch-specific
* Device entries can be added/removed/modified through OCP
- * helper functions to accomodate system and board-specific
+ * helper functions to accommodate system and board-specific
* parameters commonly found in embedded systems. OCP also
* provides a standard method for devices to describe extended
* attributes about themselves to the system. A standard access
diff --git a/arch/ppc/syslib/ppc403_pic.c b/arch/ppc/syslib/ppc403_pic.c
index 607ebd1..c3b7b8b 100644
--- a/arch/ppc/syslib/ppc403_pic.c
+++ b/arch/ppc/syslib/ppc403_pic.c
@@ -112,7 +112,7 @@ ppc4xx_pic_init(void)
/*
* Disable all external interrupts until they are
- * explicity requested.
+ * explicitly requested.
*/
ppc_cached_irq_mask[0] = 0;
diff --git a/arch/ppc/syslib/ppc405_pci.c b/arch/ppc/syslib/ppc405_pci.c
index d6d838b..9e90356 100644
--- a/arch/ppc/syslib/ppc405_pci.c
+++ b/arch/ppc/syslib/ppc405_pci.c
@@ -137,7 +137,7 @@ ppc4xx_find_bridges(void)
hose_a->pci_mem_offset = 0;
/* Setup bridge memory/IO ranges & resources
- * TODO: Handle firmwares setting up a legacy ISA mem base
+ * TODO: Handle firmware setting up a legacy ISA mem base
*/
hose_a->io_space.start = PPC405_PCI_LOWER_IO;
hose_a->io_space.end = PPC405_PCI_UPPER_IO;
diff --git a/arch/ppc/syslib/ppc4xx_dma.c b/arch/ppc/syslib/ppc4xx_dma.c
index 1eef4ff..bd30186 100644
--- a/arch/ppc/syslib/ppc4xx_dma.c
+++ b/arch/ppc/syslib/ppc4xx_dma.c
@@ -241,7 +241,7 @@ ppc4xx_set_dma_count(unsigned int dmanr, unsigned int count)
}
/*
- * Returns the number of bytes left to be transfered.
+ * Returns the number of bytes left to be transferred.
* After a DMA transfer, this should return zero.
* Reading this while a DMA transfer is still in progress will return
* unpredictable results.
diff --git a/arch/ppc/syslib/ppc85xx_rio.c b/arch/ppc/syslib/ppc85xx_rio.c
index 2b09780..af2425e 100644
--- a/arch/ppc/syslib/ppc85xx_rio.c
+++ b/arch/ppc/syslib/ppc85xx_rio.c
@@ -349,7 +349,7 @@ EXPORT_SYMBOL_GPL(rio_hw_add_outb_message);
* @dev_instance: Pointer to interrupt-specific data
*
* Handles outbound message interrupts. Executes a register outbound
- * mailbox event handler and acks the interrupt occurence.
+ * mailbox event handler and acks the interrupt occurrence.
*/
static irqreturn_t
mpc85xx_rio_tx_handler(int irq, void *dev_instance)
@@ -516,7 +516,7 @@ void rio_close_outb_mbox(struct rio_mport *mport, int mbox)
* @dev_instance: Pointer to interrupt-specific data
*
* Handles inbound message interrupts. Executes a registered inbound
- * mailbox event handler and acks the interrupt occurence.
+ * mailbox event handler and acks the interrupt occurrence.
*/
static irqreturn_t
mpc85xx_rio_rx_handler(int irq, void *dev_instance)
diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c
index 6fd4cdb..3b82333 100644
--- a/arch/ppc/syslib/xilinx_pic.c
+++ b/arch/ppc/syslib/xilinx_pic.c
@@ -130,7 +130,7 @@ ppc4xx_pic_init(void)
/*
* Disable all external interrupts until they are
- * explicity requested.
+ * explicitly requested.
*/
intc_out_be32(intc + IER, 0);
--
1.5.0.1
--
Simon Arlott
^ permalink raw reply related
* [PATCH] spelling fixes: arch/powerpc/
From: Simon Arlott @ 2007-05-11 19:42 UTC (permalink / raw)
To: Linux Kernel Mailing List, linuxppc-dev, trivial
Spelling fixes in arch/powerpc/.
Signed-off-by: Simon Arlott <simon@fire.lp0.eu>
---
arch/powerpc/boot/treeboot-ebony.c | 2 +-
arch/powerpc/kernel/irq.c | 8 ++++----
arch/powerpc/kernel/legacy_serial.c | 2 +-
arch/powerpc/kernel/nvram_64.c | 2 +-
arch/powerpc/kernel/of_platform.c | 8 ++++----
arch/powerpc/kernel/prom.c | 6 +++---
arch/powerpc/kernel/rtas-proc.c | 2 +-
arch/powerpc/kernel/rtas.c | 2 +-
arch/powerpc/kernel/setup_64.c | 8 ++++----
arch/powerpc/kernel/signal_32.c | 2 +-
arch/powerpc/kernel/signal_64.c | 2 +-
arch/powerpc/kernel/traps.c | 4 ++--
arch/powerpc/kernel/udbg_16550.c | 2 +-
arch/powerpc/math-emu/op-common.h | 2 +-
arch/powerpc/math-emu/sfp-machine.h | 4 ++--
arch/powerpc/mm/hugetlbpage.c | 2 +-
arch/powerpc/mm/numa.c | 2 +-
arch/powerpc/oprofile/op_model_7450.c | 4 ++--
arch/powerpc/oprofile/op_model_cell.c | 8 ++++----
arch/powerpc/oprofile/op_model_fsl_booke.c | 2 +-
arch/powerpc/platforms/52xx/mpc52xx_common.c | 2 +-
arch/powerpc/platforms/52xx/mpc52xx_pci.c | 4 ++--
arch/powerpc/platforms/52xx/mpc52xx_pm.c | 2 +-
arch/powerpc/platforms/cell/spider-pic.c | 12 ++++++------
arch/powerpc/platforms/cell/spufs/lscsa_alloc.c | 2 +-
arch/powerpc/platforms/cell/spufs/spu_restore.c | 2 +-
arch/powerpc/platforms/cell/spufs/switch.c | 4 ++--
arch/powerpc/platforms/celleb/pci.c | 4 ++--
arch/powerpc/platforms/celleb/scc_epci.c | 6 +++---
arch/powerpc/platforms/celleb/scc_uhc.c | 2 +-
arch/powerpc/platforms/powermac/feature.c | 4 ++--
arch/powerpc/platforms/powermac/pfunc_base.c | 2 +-
arch/powerpc/platforms/powermac/setup.c | 4 ++--
arch/powerpc/platforms/ps3/interrupt.c | 2 +-
arch/powerpc/platforms/ps3/mm.c | 6 +++---
arch/powerpc/platforms/ps3/os-area.c | 4 ++--
arch/powerpc/platforms/ps3/platform.h | 4 ++--
arch/powerpc/platforms/pseries/eeh.c | 4 ++--
arch/powerpc/platforms/pseries/eeh_driver.c | 2 +-
arch/powerpc/sysdev/commproc.c | 2 +-
arch/powerpc/sysdev/dart_iommu.c | 2 +-
arch/powerpc/sysdev/mpic.c | 2 +-
42 files changed, 76 insertions(+), 76 deletions(-)
diff --git a/arch/powerpc/boot/treeboot-ebony.c b/arch/powerpc/boot/treeboot-ebony.c
index 8436a9c..1e3d24e 100644
--- a/arch/powerpc/boot/treeboot-ebony.c
+++ b/arch/powerpc/boot/treeboot-ebony.c
@@ -3,7 +3,7 @@
*
* Author: David Gibson <david@gibson.dropbear.id.au>
*
- * Copyright 2007 David Gibson, IBM Corporatio.
+ * Copyright 2007 David Gibson, IBM Corporation.
* Based on cuboot-83xx.c, which is:
* Copyright (c) 2007 Freescale Semiconductor, Inc.
*
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 9ed4931..861a288 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -15,7 +15,7 @@
* 2 of the License, or (at your option) any later version.
*
* This file contains the code used by various IRQ handling routines:
- * asking for different IRQ's should be done through these routines
+ * asking for different IRQs should be done through these routines
* instead of just grabbing them. Thus setups with different IRQ numbers
* shouldn't result in any weird surprises, and installing new handlers
* should be easier.
@@ -481,7 +481,7 @@ struct irq_host *irq_alloc_host(unsigned int revmap_type,
/* Legacy flags are left to default at this point,
* one can then use irq_create_mapping() to
- * explicitely change them
+ * explicitly change them
*/
ops->map(host, i, i);
}
@@ -599,7 +599,7 @@ unsigned int irq_create_mapping(struct irq_host *host,
pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq);
- /* Look for default host if nececssary */
+ /* Look for default host if necessary */
if (host == NULL)
host = irq_default_host;
if (host == NULL) {
@@ -771,7 +771,7 @@ unsigned int irq_find_mapping(struct irq_host *host,
unsigned int i;
unsigned int hint = hwirq % irq_virq_count;
- /* Look for default host if nececssary */
+ /* Look for default host if necessary */
if (host == NULL)
host = irq_default_host;
if (host == NULL)
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index cea8045..8653b33 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -498,7 +498,7 @@ arch_initcall(serial_dev_init);
/*
* This is called very early, as part of console_init() (typically just after
- * time_init()). This function is respondible for trying to find a good
+ * time_init()). This function is responsible for trying to find a good
* default console on serial ports. It tries to match the open firmware
* default output with one of the available serial console drivers, either
* one of the platform serial ports that have been probed earlier by
diff --git a/arch/powerpc/kernel/nvram_64.c b/arch/powerpc/kernel/nvram_64.c
index f9676f5..dd3de45 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -431,7 +431,7 @@ static int nvram_create_os_partition(void)
* 4.) Will first try getting a chunk that will satisfy the maximum
* error log size (NVRAM_MAX_REQ).
* 5.) If the max chunk cannot be allocated then try finding a chunk
- * that will satisfy the minum needed (NVRAM_MIN_REQ).
+ * that will satisfy the minimum needed (NVRAM_MIN_REQ).
*/
static int nvram_setup_partition(void)
{
diff --git a/arch/powerpc/kernel/of_platform.c b/arch/powerpc/kernel/of_platform.c
index 84c34d9..2279a6f 100644
--- a/arch/powerpc/kernel/of_platform.c
+++ b/arch/powerpc/kernel/of_platform.c
@@ -259,8 +259,8 @@ EXPORT_SYMBOL(of_platform_device_create);
/**
* of_platform_bus_create - Create an OF device for a bus node and all its
- * children. Optionally recursively instanciate matching busses.
- * @bus: device node of the bus to instanciate
+ * children. Optionally recursively instantiate matching busses.
+ * @bus: device node of the bus to instantiate
* @matches: match table, NULL to use the default, OF_NO_DEEP_PROBE to
* disallow recursive creation of child busses
*/
@@ -296,7 +296,7 @@ static int of_platform_bus_create(struct device_node *bus,
* @matches: match table, NULL to use the default
* @parent: parent to hook devices from, NULL for toplevel
*
- * Note that children of the provided root are not instanciated as devices
+ * Note that children of the provided root are not instantiated as devices
* unless the specified root itself matches the bus list and is not NULL.
*/
@@ -429,7 +429,7 @@ static int __devinit of_pci_phb_probe(struct of_device *dev,
/* Setup IO space.
* This will not work properly for ISA IOs, something needs to be done
- * about it if we ever generalize that way of probing PCI brigdes
+ * about it if we ever generalize that way of probing PCI bridges
*/
pci_setup_phb_io_dynamic(phb, 0);
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index caef555..def6585 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -95,7 +95,7 @@ static inline char *find_flat_dt_string(u32 offset)
/**
* This function is used to scan the flattened device-tree, it is
- * used to extract the memory informations at boot before we can
+ * used to extract the memory information at boot before we can
* unflatten the tree
*/
int __init of_scan_flat_dt(int (*it)(unsigned long node,
@@ -1000,7 +1000,7 @@ void __init early_init_devtree(void *params)
of_scan_flat_dt(early_init_dt_scan_rtas, NULL);
#endif
- /* Retrieve various informations from the /chosen node of the
+ /* Retrieve various information from the /chosen node of the
* device-tree, including the platform type, initrd location and
* size, TCE reserve, and more ...
*/
@@ -1032,7 +1032,7 @@ void __init early_init_devtree(void *params)
DBG("Scanning CPUs ...\n");
- /* Retreive CPU related informations from the flat tree
+ /* Retreive CPU related information from the flat tree
* (altivec support, boot CPU ID, ...)
*/
of_scan_flat_dt(early_init_dt_scan_cpus, NULL);
diff --git a/arch/powerpc/kernel/rtas-proc.c b/arch/powerpc/kernel/rtas-proc.c
index 190b7ed..41d0dfe 100644
--- a/arch/powerpc/kernel/rtas-proc.c
+++ b/arch/powerpc/kernel/rtas-proc.c
@@ -717,7 +717,7 @@ static void check_location(struct seq_file *m, const char *c)
/*
* Format:
* ${LETTER}${NUMBER}[[-/]${LETTER}${NUMBER} [ ... ] ]
- * the '.' may be an abbrevation
+ * the '.' may be an abbreviation
*/
static void check_location_string(struct seq_file *m, const char *c)
{
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 2147807..54b9e2a 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -819,7 +819,7 @@ asmlinkage int ppc_rtas(struct rtas_args __user *uargs)
/*
* Call early during boot, before mem init or bootmem, to retrieve the RTAS
- * informations from the device-tree and allocate the RMO buffer for userland
+ * information from the device-tree and allocate the RMO buffer for userland
* accesses.
*/
void __init rtas_initialize(void)
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 6018178..fce0e0c 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -271,7 +271,7 @@ void smp_release_cpus(void)
* Initialize some remaining members of the ppc64_caches and systemcfg
* structures
* (at least until we get rid of them completely). This is mostly some
- * cache informations about the CPU that will be used by cache flush
+ * cache information about the CPU that will be used by cache flush
* routines and/or provided to userland
*/
static void __init initialize_cache_info(void)
@@ -293,7 +293,7 @@ static void __init initialize_cache_info(void)
u32 size, lsize;
const char *dc, *ic;
- /* Then read cache informations */
+ /* Then read cache information */
if (machine_is(powermac)) {
dc = "d-cache-block-size";
ic = "i-cache-block-size";
@@ -364,7 +364,7 @@ void __init setup_system(void)
unflatten_device_tree();
/*
- * Fill the ppc64_caches & systemcfg structures with informations
+ * Fill the ppc64_caches & systemcfg structures with information
* retrieved from the device-tree.
*/
initialize_cache_info();
@@ -489,7 +489,7 @@ static void __init emergency_stack_init(void)
/*
* Called into from start_kernel, after lock_kernel has been called.
- * Initializes bootmem, which is unsed to manage page allocation until
+ * Initializes bootmem, which is used to manage page allocation until
* mem_init is called.
*/
void __init setup_arch(char **cmdline_p)
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index dd1dca5..1f05b2e 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -1199,7 +1199,7 @@ no_signal:
#ifdef CONFIG_PPC64
/*
- * Reenable the DABR before delivering the signal to
+ * Re-enable the DABR before delivering the signal to
* user space. The DABR will have been cleared if it
* triggered inside the kernel.
*/
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 1ce0ae3..9b0c38f 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -530,7 +530,7 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs)
syscall_restart(regs, &ka);
/*
- * Reenable the DABR before delivering the signal to
+ * Re-enable the DABR before delivering the signal to
* user space. The DABR will have been cleared if it
* triggered inside the kernel.
*/
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index bf6445a..e6e71df 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -794,7 +794,7 @@ void __kprobes program_check_exception(struct pt_regs *regs)
* ESR_DST (!?) or 0. In the process of chasing this with the
* hardware people - not sure if it can happen on any illegal
* instruction or only on FP instructions, whether there is a
- * pattern to occurences etc. -dgibson 31/Mar/2003 */
+ * pattern to occurrences etc. -dgibson 31/Mar/2003 */
switch (do_mathemu(regs)) {
case 0:
emulate_single_step(regs);
@@ -1048,7 +1048,7 @@ void SPEFloatingPointException(struct pt_regs *regs)
spefscr = current->thread.spefscr;
fpexc_mode = current->thread.fpexc_mode;
- /* Hardware does not neccessarily set sticky
+ /* Hardware does not necessarily set sticky
* underflow/overflow/invalid flags */
if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
code = FPE_FLTOVF;
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index 7afab5b..d0bbd95 100644
--- a/arch/powerpc/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
@@ -1,5 +1,5 @@
/*
- * udbg for for NS16550 compatable serial ports
+ * udbg for for NS16550 compatible serial ports
*
* Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
*
diff --git a/arch/powerpc/math-emu/op-common.h b/arch/powerpc/math-emu/op-common.h
index afb82b6..ac93fec 100644
--- a/arch/powerpc/math-emu/op-common.h
+++ b/arch/powerpc/math-emu/op-common.h
@@ -3,7 +3,7 @@
_FP_FRAC_DECL_##wc(X)
/*
- * Finish truely unpacking a native fp value by classifying the kind
+ * Finish truly unpacking a native fp value by classifying the kind
* of fp value and normalizing both the exponent and the fraction.
*/
diff --git a/arch/powerpc/math-emu/sfp-machine.h b/arch/powerpc/math-emu/sfp-machine.h
index 4b17d83..fe7bb33 100644
--- a/arch/powerpc/math-emu/sfp-machine.h
+++ b/arch/powerpc/math-emu/sfp-machine.h
@@ -290,8 +290,8 @@ extern int fp_pack_ds(void *, long, unsigned long, unsigned long, long, long);
/* asm fragments for mul and div */
-/* umul_ppmm(high_prod, low_prod, multipler, multiplicand) multiplies two
- * UWtype integers MULTIPLER and MULTIPLICAND, and generates a two UWtype
+/* umul_ppmm(high_prod, low_prod, multiplier, multiplicand) multiplies two
+ * UWtype integers MULTIPLIER and MULTIPLICAND, and generates a two UWtype
* word product in HIGH_PROD and LOW_PROD.
*/
#define umul_ppmm(ph, pl, m0, m1) \
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 92a1b16..98cc17b 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -482,7 +482,7 @@ repeat:
hpte_group = ((hash & htab_hash_mask) *
HPTES_PER_GROUP) & ~0x7UL;
- /* clear HPTE slot informations in new PTE */
+ /* clear HPTE slot information in new PTE */
new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HASHPTE;
/* Add in WIMG bits */
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index de45aa8..26875e0 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -275,7 +275,7 @@ static int __cpuinit cpu_numa_callback(struct notifier_block *nfb,
* Returns the size the region should have to enforce the memory limit.
* This will either be the original value of size, a truncated value,
* or zero. If the returned value of size is 0 the region should be
- * discarded as it lies wholy above the memory limit.
+ * discarded as it lies wholly above the memory limit.
*/
static unsigned long __init numa_enforce_memory_limit(unsigned long start,
unsigned long size)
diff --git a/arch/powerpc/oprofile/op_model_7450.c b/arch/powerpc/oprofile/op_model_7450.c
index 5d1bbaf..d75063b 100644
--- a/arch/powerpc/oprofile/op_model_7450.c
+++ b/arch/powerpc/oprofile/op_model_7450.c
@@ -93,7 +93,7 @@ static void fsl7450_cpu_setup(struct op_counter_config *ctr)
#define NUM_CTRS 6
-/* Configures the global settings for the countes on all CPUs. */
+/* Configures the global settings for the counters on all CPUs. */
static void fsl7450_reg_setup(struct op_counter_config *ctr,
struct op_system_config *sys,
int num_ctrs)
@@ -191,7 +191,7 @@ static void fsl7450_handle_interrupt(struct pt_regs *regs,
}
/* The freeze bit was set by the interrupt. */
- /* Clear the freeze bit, and reenable the interrupt.
+ /* Clear the freeze bit, and re-enable the interrupt.
* The counters won't actually start until the rfi clears
* the PMM bit */
pmc_start_ctrs();
diff --git a/arch/powerpc/oprofile/op_model_cell.c b/arch/powerpc/oprofile/op_model_cell.c
index c29293b..d94388c 100644
--- a/arch/powerpc/oprofile/op_model_cell.c
+++ b/arch/powerpc/oprofile/op_model_cell.c
@@ -112,7 +112,7 @@ static DEFINE_PER_CPU(unsigned long[NR_PHYS_CTRS], pmc_values);
static struct pmc_cntrl_data pmc_cntrl[NUM_THREADS][NR_PHYS_CTRS];
-/* Interpetation of hdw_thread:
+/* Interpretation of hdw_thread:
* 0 - even virtual cpus 0, 2, 4,...
* 1 - odd virtual cpus 1, 3, 5, ...
*/
@@ -189,7 +189,7 @@ static void pm_rtas_activate_signals(u32 node, u32 count)
/* There is no debug setup required for the cycles event.
* Note that only events in the same group can be used.
* Otherwise, there will be conflicts in correctly routing
- * the signals on the debug bus. It is the responsiblity
+ * the signals on the debug bus. It is the responsibility
* of the OProfile user tool to check the events are in
* the same group.
*/
@@ -705,7 +705,7 @@ cell_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr)
*/
spin_lock_irqsave(&virt_cntr_lock, flags);
- /* Need to disable and reenable the performance counters
+ /* Need to disable and re-enable the performance counters
* to get the desired behavior from the hardware. This
* is hardware specific.
*/
@@ -733,7 +733,7 @@ cell_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr)
}
/* The counters were frozen by the interrupt.
- * Reenable the interrupt and restart the counters.
+ * Re-enable the interrupt and restart the counters.
* If there was a race between the interrupt handler and
* the virtual counter routine. The virutal counter
* routine may have cleared the interrupts. Hence must
diff --git a/arch/powerpc/oprofile/op_model_fsl_booke.c b/arch/powerpc/oprofile/op_model_fsl_booke.c
index 2267eb8..d2e1c39 100644
--- a/arch/powerpc/oprofile/op_model_fsl_booke.c
+++ b/arch/powerpc/oprofile/op_model_fsl_booke.c
@@ -351,7 +351,7 @@ static void fsl_booke_handle_interrupt(struct pt_regs *regs,
}
/* The freeze bit was set by the interrupt. */
- /* Clear the freeze bit, and reenable the interrupt.
+ /* Clear the freeze bit, and re-enable the interrupt.
* The counters won't actually start until the rfi clears
* the PMM bit */
pmc_start_ctrs(1);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c
index 2dd415f..5ba3425 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -106,7 +106,7 @@ mpc52xx_setup_cpu(void)
out_be32(&xlb->master_priority, 0x11111111);
/* Disable XLB pipelining */
- /* (cfr errate 292. We could do this only just before ATA PIO
+ /* (cfr errata 292. We could do this only just before ATA PIO
transaction and re-enable it afterwards ...) */
out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_PLDIS);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index 34d34a2..a7eebeb 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -101,7 +101,7 @@ struct mpc52xx_pci {
/* ======================================================================== */
-/* PCI configuration acess */
+/* PCI configuration access */
/* ======================================================================== */
static int
@@ -311,7 +311,7 @@ mpc52xx_pci_setup(struct pci_controller *hose,
tmp = in_be32(&pci_regs->gscr);
#if 0
- /* Reset the exteral bus ( internal PCI controller is NOT resetted ) */
+ /* Reset the exteral bus ( internal PCI controller is NOT reset ) */
/* Not necessary and can be a bad thing if for example the bootloader
is displaying a splash screen or ... Just left here for
documentation purpose if anyone need it */
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pm.c b/arch/powerpc/platforms/52xx/mpc52xx_pm.c
index fd40044..f3c5d87 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pm.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pm.c
@@ -160,7 +160,7 @@ int mpc52xx_pm_enter(suspend_state_t state)
/* restart jiffies */
wakeup_decrementer();
- /* reenable interrupts in PIC */
+ /* re-enable interrupts in PIC */
out_be32(&intr->main_mask, intr_main_mask);
return 0;
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index 05f4b3d..6365428 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -228,13 +228,13 @@ static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc)
desc->chip->eoi(irq);
}
-/* For hooking up the cascace we have a problem. Our device-tree is
+/* For hooking up the cascade we have a problem. Our device-tree is
* crap and we don't know on which BE iic interrupt we are hooked on at
* least not the "standard" way. We can reconstitute it based on two
- * informations though: which BE node we are connected to and wether
- * we are connected to IOIF0 or IOIF1. Right now, we really only care
- * about the IBM cell blade and we know that its firmware gives us an
- * interrupt-map property which is pretty strange.
+ * pieces of information though: which BE node we are connected to and
+ * whether we are connected to IOIF0 or IOIF1. Right now, we really only
+ * care about the IBM cell blade and we know that its firmware gives us
+ * an interrupt-map property which is pretty strange.
*/
static unsigned int __init spider_find_cascade_and_node(struct spider_pic *pic)
{
@@ -283,7 +283,7 @@ static unsigned int __init spider_find_cascade_and_node(struct spider_pic *pic)
/* Ok, now let's get cracking. You may ask me why I just didn't match
* the iic host from the iic OF node, but that way I'm still compatible
- * with really really old old firmwares for which we don't have a node
+ * with really really old old firmware for which we don't have a node
*/
/* Manufacture an IIC interrupt number of class 2 */
virq = irq_create_mapping(NULL,
diff --git a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
index f4b3c05..90963c1 100644
--- a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
+++ b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
@@ -88,7 +88,7 @@ int spu_alloc_lscsa(struct spu_state *csa)
*/
for (i = 0; i < SPU_LSCSA_NUM_BIG_PAGES; i++) {
/* XXX This is likely to fail, we should use a special pool
- * similiar to what hugetlbfs does.
+ * similar to what hugetlbfs does.
*/
csa->lscsa_pages[i] = alloc_pages(GFP_KERNEL,
SPU_64K_PAGE_ORDER);
diff --git a/arch/powerpc/platforms/cell/spufs/spu_restore.c b/arch/powerpc/platforms/cell/spufs/spu_restore.c
index 0bf723d..c74a7a0 100644
--- a/arch/powerpc/platforms/cell/spufs/spu_restore.c
+++ b/arch/powerpc/platforms/cell/spufs/spu_restore.c
@@ -284,7 +284,7 @@ static inline void restore_complete(void)
exit_instrs[3] = BR_INSTR;
break;
default:
- /* SPU_Status[R]=1. No additonal instructions. */
+ /* SPU_Status[R]=1. No additional instructions. */
break;
}
spu_sync();
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c
index 71a0b41..ce42a35 100644
--- a/arch/powerpc/platforms/cell/spufs/switch.c
+++ b/arch/powerpc/platforms/cell/spufs/switch.c
@@ -8,11 +8,11 @@
* Host-side part of SPU context switch sequence outlined in
* Synergistic Processor Element, Book IV.
*
- * A fully premptive switch of an SPE is very expensive in terms
+ * A fully preemptive switch of an SPE is very expensive in terms
* of time and system resources. SPE Book IV indicates that SPE
* allocation should follow a "serially reusable device" model,
* in which the SPE is assigned a task until it completes. When
- * this is not possible, this sequence may be used to premptively
+ * this is not possible, this sequence may be used to preemptively
* save, and then later (optionally) restore the context of a
* program executing on an SPE.
*
diff --git a/arch/powerpc/platforms/celleb/pci.c b/arch/powerpc/platforms/celleb/pci.c
index d1adf34..af6add2 100644
--- a/arch/powerpc/platforms/celleb/pci.c
+++ b/arch/powerpc/platforms/celleb/pci.c
@@ -169,7 +169,7 @@ static int celleb_fake_pci_read_config(struct pci_bus *bus,
unsigned int devno = devfn >> 3;
unsigned int fn = devfn & 0x7;
- /* allignment check */
+ /* alignment check */
BUG_ON(where % size);
pr_debug(" fake read: bus=0x%x, ", bus->number);
@@ -200,7 +200,7 @@ static int celleb_fake_pci_write_config(struct pci_bus *bus,
unsigned int devno = devfn >> 3;
unsigned int fn = devfn & 0x7;
- /* allignment check */
+ /* alignment check */
BUG_ON(where % size);
node = (struct device_node *)bus->sysdata;
diff --git a/arch/powerpc/platforms/celleb/scc_epci.c b/arch/powerpc/platforms/celleb/scc_epci.c
index fb23d53..058adb5 100644
--- a/arch/powerpc/platforms/celleb/scc_epci.c
+++ b/arch/powerpc/platforms/celleb/scc_epci.c
@@ -161,7 +161,7 @@ static int celleb_epci_read_config(struct pci_bus *bus,
struct device_node *node;
struct pci_controller *hose;
- /* allignment check */
+ /* alignment check */
BUG_ON(where % size);
node = (struct device_node *)bus->sysdata;
@@ -224,7 +224,7 @@ static int celleb_epci_write_config(struct pci_bus *bus,
struct device_node *node;
struct pci_controller *hose;
- /* allignment check */
+ /* alignment check */
BUG_ON(where % size);
node = (struct device_node *)bus->sysdata;
@@ -378,7 +378,7 @@ static int __devinit celleb_epci_init(struct pci_controller *hose)
val |= SCC_EPCI_CNTOPT_O2PMB;
out_be32(reg, val);
- /* XXX: temporay: set registers for address conversion setup */
+ /* XXX: temporary: set registers for address conversion setup */
reg = epci_base + SCC_EPCI_CNF10_REG;
out_be32(reg, 0x80000008);
reg = epci_base + SCC_EPCI_CNF14_REG;
diff --git a/arch/powerpc/platforms/celleb/scc_uhc.c b/arch/powerpc/platforms/celleb/scc_uhc.c
index a7c548b..b59c38a 100644
--- a/arch/powerpc/platforms/celleb/scc_uhc.c
+++ b/arch/powerpc/platforms/celleb/scc_uhc.c
@@ -36,7 +36,7 @@ static inline int uhc_clkctrl_ready(u32 val)
}
/*
- * UHC(usb host controler) enable function.
+ * UHC(usb host controller) enable function.
* affect to both of OHCI and EHCI core module.
*/
static void enable_scc_uhc(struct pci_dev *dev)
diff --git a/arch/powerpc/platforms/powermac/feature.c b/arch/powerpc/platforms/powermac/feature.c
index f29705f..183c70e 100644
--- a/arch/powerpc/platforms/powermac/feature.c
+++ b/arch/powerpc/platforms/powermac/feature.c
@@ -460,7 +460,7 @@ static long heathrow_sound_enable(struct device_node *node, long param,
unsigned long flags;
/* B&W G3 and Yikes don't support that properly (the
- * sound appear to never come back after beeing shut down).
+ * sound appear to never come back after being shut down).
*/
if (pmac_mb.model_id == PMAC_TYPE_YOSEMITE ||
pmac_mb.model_id == PMAC_TYPE_YIKES)
@@ -2750,7 +2750,7 @@ set_initial_features(void)
* but I'm not too sure it was audited for side-effects on other
* ohare based machines...
* Since I still have difficulties figuring the right way to
- * differenciate them all and since that hack was there for a long
+ * differentiate them all and since that hack was there for a long
* time, I'll keep it around
*/
if (macio_chips[0].type == macio_ohare) {
diff --git a/arch/powerpc/platforms/powermac/pfunc_base.c b/arch/powerpc/platforms/powermac/pfunc_base.c
index 45d54b9..1857134 100644
--- a/arch/powerpc/platforms/powermac/pfunc_base.c
+++ b/arch/powerpc/platforms/powermac/pfunc_base.c
@@ -280,7 +280,7 @@ static int unin_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask)
spin_lock_irqsave(&feature_lock, flags);
/* This is fairly bogus in darwin, but it should work for our needs
- * implemeted that way:
+ * implemented that way:
*/
UN_OUT(offset, (UN_IN(offset) & ~mask) | (value & mask));
spin_unlock_irqrestore(&feature_lock, flags);
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index a410bc7..1d9f13f 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -616,7 +616,7 @@ static int __init pmac_probe(void)
* On U3, the DART (iommu) must be allocated now since it
* has an impact on htab_initialize (due to the large page it
* occupies having to be broken up so the DART itself is not
- * part of the cacheable linar mapping
+ * part of the cacheable linear mapping
*/
alloc_dart_table();
@@ -683,7 +683,7 @@ static void pmac_cpu_die(void)
/*
* during the path that leads here preemption is disabled,
- * reenable it now so that when coming up preempt count is
+ * re-enable it now so that when coming up preempt count is
* zero correctly
*/
preempt_enable();
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
index 9da82c2..b4cd3b3 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -315,7 +315,7 @@ int ps3_send_event_locally(unsigned int virq)
* @virq: The assigned Linux virq.
*
* An event irq represents a virtual device interrupt. The interrupt_id
- * coresponds to the software interrupt number.
+ * corresponds to the software interrupt number.
*/
int ps3_sb_event_receive_port_setup(enum ps3_cpu_binding cpu,
diff --git a/arch/powerpc/platforms/ps3/mm.c b/arch/powerpc/platforms/ps3/mm.c
index f8a3e20..1b97195 100644
--- a/arch/powerpc/platforms/ps3/mm.c
+++ b/arch/powerpc/platforms/ps3/mm.c
@@ -360,7 +360,7 @@ static void _dma_dump_region(const struct ps3_dma_region *r, const char* func,
* @bus_addr: Starting ioc bus address of the area to map.
* @len: Length in bytes of the area to map.
* @link: A struct list_head used with struct ps3_dma_region.chunk_list, the
- * list of all chuncks owned by the region.
+ * list of all chunks owned by the region.
*
* This implementation uses a very simple dma page manager
* based on the dma_chunk structure. This scheme assumes
@@ -655,7 +655,7 @@ int dma_unmap_area(struct ps3_dma_region *r, unsigned long bus_addr,
}
/**
- * dma_region_create_linear - Setup a linear dma maping for a device.
+ * dma_region_create_linear - Setup a linear dma mapping for a device.
* @r: Pointer to a struct ps3_dma_region.
*
* This routine creates an HV dma region for the device and maps all available
@@ -725,7 +725,7 @@ static int dma_region_free_linear(struct ps3_dma_region *r)
* @bus_addr: A pointer to return the starting ioc bus address of the area to
* map.
*
- * This routine just returns the coresponding bus address. Actual mapping
+ * This routine just returns the corresponding bus address. Actual mapping
* occurs in dma_region_create_linear().
*/
diff --git a/arch/powerpc/platforms/ps3/os-area.c b/arch/powerpc/platforms/ps3/os-area.c
index 5c3da08..0eb23c1 100644
--- a/arch/powerpc/platforms/ps3/os-area.c
+++ b/arch/powerpc/platforms/ps3/os-area.c
@@ -111,9 +111,9 @@ struct os_area_params {
/**
* struct saved_params - Static working copies of data from the 'Other OS' area.
*
- * For the convinience of the guest, the HV makes a copy of the 'Other OS' area
+ * For the convenience of the guest, the HV makes a copy of the 'Other OS' area
* in flash to a high address in the boot memory region and then puts that RAM
- * address and the byte count into the repository for retreval by the guest.
+ * address and the byte count into the repository for retrieval by the guest.
* We copy the data we want into a static variable and allow the memory setup
* by the HV to be claimed by the lmb manager.
*/
diff --git a/arch/powerpc/platforms/ps3/platform.h b/arch/powerpc/platforms/ps3/platform.h
index ca04f03..7d5fb6f 100644
--- a/arch/powerpc/platforms/ps3/platform.h
+++ b/arch/powerpc/platforms/ps3/platform.h
@@ -200,8 +200,8 @@ int ps3_repository_read_boot_dat_info(u64 *lpar_addr, unsigned int *size);
/**
* enum spu_resource_type - Type of spu resource.
- * @spu_resource_type_shared: Logical spu is shared with other partions.
- * @spu_resource_type_exclusive: Logical spu is not shared with other partions.
+ * @spu_resource_type_shared: Logical spu is shared with other partitions.
+ * @spu_resource_type_exclusive: Logical spu is not shared with other partitions.
*
* Returned by ps3_repository_read_spu_resource_id().
*/
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 093438b..f63eba5 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -60,7 +60,7 @@
* with EEH.
*
* Ideally, a PCI device driver, when suspecting that an isolation
- * event has occured (e.g. by reading 0xff's), will then ask EEH
+ * event has occurred (e.g. by reading 0xff's), will then ask EEH
* whether this is the case, and then take appropriate steps to
* reset the PCI slot, the PCI device, and then resume operations.
* However, until that day, the checking is done here, with the
@@ -816,7 +816,7 @@ void eeh_restore_bars(struct pci_dn *pdn)
*
* Save the values of the device bars. Unlike the restore
* routine, this routine is *not* recursive. This is because
- * PCI devices are added individuallly; but, for the restore,
+ * PCI devices are added individually; but, for the restore,
* an entire slot is reset at a time.
*/
static void eeh_save_bars(struct pci_dn *pdn)
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c b/arch/powerpc/platforms/pseries/eeh_driver.c
index f07d849..048fd14 100644
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -242,7 +242,7 @@ static void eeh_report_failure(struct pci_dev *dev, void *userdata)
* to the isolated slot. A non-null value will
* cause all devices under the bus to be removed
* and then re-added.
- * @pe_dn: pointer to a "Partionable Endpoint" device node.
+ * @pe_dn: pointer to a "Partitionable Endpoint" device node.
* This is the top-level structure on which pci
* bus resets can be performed.
*/
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index 9b4fafd..9fe7678 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -216,7 +216,7 @@ void cpm_reset(void)
/* Set SDMA Bus Request priority 5.
* On 860T, this also enables FEC priority 6. I am not sure
- * this is what we realy want for some applications, but the
+ * this is what we really want for some applications, but the
* manual recommends it.
* Bit 25, FAM can also be set to use FEC aggressive mode (860T).
*/
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index a1d2042..885feeb 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -159,7 +159,7 @@ static void dart_build(struct iommu_table *tbl, long index,
dp = ((unsigned int*)tbl->it_base) + index;
- /* On U3, all memory is contigous, so we can move this
+ /* On U3, all memory is contiguous, so we can move this
* out of the loop.
*/
l = npages;
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 4fd2bec..f4b0a0d 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -2,7 +2,7 @@
* arch/powerpc/kernel/mpic.c
*
* Driver for interrupt controllers following the OpenPIC standard, the
- * common implementation beeing IBM's MPIC. This driver also can deal
+ * common implementation being IBM's MPIC. This driver also can deal
* with various broken implementations of this HW.
*
* Copyright (C) 2004 Benjamin Herrenschmidt, IBM Corp.
--
1.5.0.1
--
Simon Arlott
^ permalink raw reply related
* [DTC PATCH] Remove overreaching semantic tests.
From: Scott Wood @ 2007-05-11 17:55 UTC (permalink / raw)
To: linuxppc-dev
Now that there are more usage models than "complete device tree in the
DTS" and "minimally device-tree aware u-boot that still needs zeroed out
properties to fill in", many of the checks that dtc performs are no
longer appropriate, since the nodes and properties in question can be
added at runtime.
Note that -f is *not* an alternative, as that suppresses all checks. I
still want it to check for things that are present but wrong; I just
don't want it complaining about things that aren't there at all.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
I wouldn't be opposed to keeping these tests around if there were a
command line option that cleanly separates the errors/warnings into
classes such as structural, semantic-missing, semantic-broken, etc.
livetree.c | 127 ------------------------------------------------------------
1 files changed, 0 insertions(+), 127 deletions(-)
diff --git a/livetree.c b/livetree.c
index ce73f50..492713b 100644
--- a/livetree.c
+++ b/livetree.c
@@ -153,14 +153,6 @@ struct reserve_info *add_reserve_entry(struct reserve_info *list,
* Tree accessor functions
*/
-static char *get_unitname(struct node *node)
-{
- if (node->name[node->basenamelen] == '\0')
- return "";
- else
- return node->name + node->basenamelen + 1;
-}
-
static struct property *get_property(struct node *node, char *propname)
{
struct property *prop;
@@ -465,122 +457,6 @@ static int check_structure(struct node *tree)
(propname), (node)->fullpath); \
} while (0)
-static int check_root(struct node *root)
-{
- struct property *prop;
- int ok = 1;
-
- CHECK_HAVE_STRING(root, "model");
-
- CHECK_HAVE(root, "#address-cells");
- CHECK_HAVE(root, "#size-cells");
-
- CHECK_HAVE_WARN(root, "compatible");
-
- return ok;
-}
-
-static int check_cpus(struct node *root, int outversion, int boot_cpuid_phys)
-{
- struct node *cpus, *cpu;
- struct property *prop;
- struct node *bootcpu = NULL;
- int ok = 1;
-
- cpus = get_subnode(root, "cpus");
- if (! cpus) {
- ERRMSG("Missing /cpus node\n");
- return 0;
- }
-
- CHECK_HAVE_WARN(cpus, "#address-cells");
- CHECK_HAVE_WARN(cpus, "#size-cells");
-
- for_each_child(cpus, cpu) {
- CHECK_HAVE_STREQ(cpu, "device_type", "cpu");
-
- if (cpu->addr_cells != 1)
- DO_ERR("%s has bad #address-cells value %d (should be 1)\n",
- cpu->fullpath, cpu->addr_cells);
- if (cpu->size_cells != 0)
- DO_ERR("%s has bad #size-cells value %d (should be 0)\n",
- cpu->fullpath, cpu->size_cells);
-
- CHECK_HAVE_ONECELL(cpu, "reg");
- if (prop) {
- cell_t unitnum;
- char *eptr;
-
- unitnum = strtol(get_unitname(cpu), &eptr, 16);
- if (*eptr) {
- WARNMSG("%s has bad format unit name %s (should be CPU number\n",
- cpu->fullpath, get_unitname(cpu));
- } else if (unitnum != propval_cell(prop)) {
- WARNMSG("%s unit name \"%s\" does not match \"reg\" property <%x>\n",
- cpu->fullpath, get_unitname(cpu),
- propval_cell(prop));
- }
- }
-
-/* CHECK_HAVE_ONECELL(cpu, "d-cache-line-size"); */
-/* CHECK_HAVE_ONECELL(cpu, "i-cache-line-size"); */
- CHECK_HAVE_ONECELL(cpu, "d-cache-size");
- CHECK_HAVE_ONECELL(cpu, "i-cache-size");
-
- CHECK_HAVE_WARN_ONECELL(cpu, "clock-frequency");
- CHECK_HAVE_WARN_ONECELL(cpu, "timebase-frequency");
-
- prop = get_property(cpu, "linux,boot-cpu");
- if (prop) {
- if (prop->val.len)
- WARNMSG("\"linux,boot-cpu\" property in %s is non-empty\n",
- cpu->fullpath);
- if (bootcpu)
- DO_ERR("Multiple boot cpus (%s and %s)\n",
- bootcpu->fullpath, cpu->fullpath);
- else
- bootcpu = cpu;
- }
- }
-
- if (outversion < 2) {
- if (! bootcpu)
- WARNMSG("No cpu has \"linux,boot-cpu\" property\n");
- } else {
- if (bootcpu)
- WARNMSG("\"linux,boot-cpu\" property is deprecated in blob version 2 or higher\n");
- if (boot_cpuid_phys == 0xfeedbeef)
- WARNMSG("physical boot CPU not set. Use -b option to set\n");
- }
-
- return ok;
-}
-
-static int check_memory(struct node *root)
-{
- struct node *mem;
- struct property *prop;
- int nnodes = 0;
- int ok = 1;
-
- for_each_child(root, mem) {
- if (! strneq(mem->name, "memory", mem->basenamelen))
- continue;
-
- nnodes++;
-
- CHECK_HAVE_STREQ(mem, "device_type", "memory");
- CHECK_HAVE(mem, "reg");
- }
-
- if (nnodes == 0) {
- ERRMSG("No memory nodes\n");
- return 0;
- }
-
- return ok;
-}
-
static int check_chosen(struct node *root)
{
struct node *chosen;
@@ -748,9 +624,6 @@ int check_device_tree(struct node *dt, int outversion, int boot_cpuid_phys)
if (! ok)
return 0;
- ok = ok && check_root(dt);
- ok = ok && check_cpus(dt, outversion, boot_cpuid_phys);
- ok = ok && check_memory(dt);
ok = ok && check_chosen(dt);
if (! ok)
return 0;
--
1.5.0.3
^ permalink raw reply related
* [PATCH] U-boot passes the initrd as start/end, not start/size.
From: Scott Wood @ 2007-05-11 17:52 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/cuboot-83xx.c | 2 +-
arch/powerpc/boot/cuboot-85xx.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/cuboot-83xx.c b/arch/powerpc/boot/cuboot-83xx.c
index 6cbc20a..9af554e 100644
--- a/arch/powerpc/boot/cuboot-83xx.c
+++ b/arch/powerpc/boot/cuboot-83xx.c
@@ -57,7 +57,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
memcpy(&bd, (bd_t *)r3, sizeof(bd));
loader_info.initrd_addr = r4;
- loader_info.initrd_size = r4 ? r5 : 0;
+ loader_info.initrd_size = r4 ? r5 - r4 : 0;
loader_info.cmdline = (char *)r6;
loader_info.cmdline_len = r7 - r6;
diff --git a/arch/powerpc/boot/cuboot-85xx.c b/arch/powerpc/boot/cuboot-85xx.c
index f88ba00..e256031 100644
--- a/arch/powerpc/boot/cuboot-85xx.c
+++ b/arch/powerpc/boot/cuboot-85xx.c
@@ -58,7 +58,7 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
memcpy(&bd, (bd_t *)r3, sizeof(bd));
loader_info.initrd_addr = r4;
- loader_info.initrd_size = r4 ? r5 : 0;
+ loader_info.initrd_size = r4 ? r5 - r4 : 0;
loader_info.cmdline = (char *)r6;
loader_info.cmdline_len = r7 - r6;
--
1.5.0.3
^ permalink raw reply related
* [PATCH] Remove ft_ordered from flatdevtree.c
From: Becky Bruce @ 2007-05-11 17:49 UTC (permalink / raw)
To: linuxppc-dev
AFAICT, nobody is using this function, and it causes a build warning
to be generated. This patch cleans that up by removing the function
and the commented-out code that calls it.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
---
If anybody has a good reason that this code has been left in, yell!
I'm not *dying* to remove it, but the build warning is annoying.
I've asked around, in email, and on IRC, and not gotten anything
interesting as a response. If someone wants to keep the code around
for some reason, we can comment it out instead to drop the warning.
arch/powerpc/boot/flatdevtree.c | 18 ------------------
1 files changed, 0 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/boot/flatdevtree.c b/arch/powerpc/boot/flatdevtree.c
index d00fbd9..eba2ddc 100644
--- a/arch/powerpc/boot/flatdevtree.c
+++ b/arch/powerpc/boot/flatdevtree.c
@@ -134,20 +134,6 @@ static char *ft_next(struct ft_cxt *cxt, char *p, struct ft_atom *ret)
#define HDR_SIZE _ALIGN(sizeof(struct boot_param_header), 8)
#define EXPAND_INCR 1024 /* alloc this much extra when expanding */
-/* See if the regions are in the standard order and non-overlapping */
-static int ft_ordered(struct ft_cxt *cxt)
-{
- char *p = (char *)cxt->bph + HDR_SIZE;
- enum ft_rgn_id r;
-
- for (r = FT_RSVMAP; r <= FT_STRINGS; ++r) {
- if (p > cxt->rgn[r].start)
- return 0;
- p = cxt->rgn[r].start + cxt->rgn[r].size;
- }
- return p <= (char *)cxt->bph + cxt->max_size;
-}
-
/* Copy the tree to a newly-allocated region and put things in order */
static int ft_reorder(struct ft_cxt *cxt, int nextra)
{
@@ -573,10 +559,6 @@ int ft_open(struct ft_cxt *cxt, void *blob, unsigned int max_size,
cxt->rgn[FT_STRUCT].size = struct_size(cxt);
cxt->rgn[FT_STRINGS].start = blob + be32_to_cpu(bph->off_dt_strings);
cxt->rgn[FT_STRINGS].size = be32_to_cpu(bph->dt_strings_size);
- /* Leave as '0' to force first ft_make_space call to do a ft_reorder
- * and move dt to an area allocated by realloc.
- cxt->isordered = ft_ordered(cxt);
- */
cxt->p = cxt->rgn[FT_STRUCT].start;
cxt->str_anchor = cxt->rgn[FT_STRINGS].start;
--
1.5.0.3
^ permalink raw reply related
* Re: [RFC] cell: saving spus information for kexec crash
From: Arnd Bergmann @ 2007-05-11 17:48 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Andre Detsch, Anton Blanchard, cbe-oss-dev
In-Reply-To: <20070511172233.GA14587@kryten>
On Friday 11 May 2007, Anton Blanchard wrote:
> > This patch adds support for investigating spus information after a
> > kernel crash event, through kdump vmcore file.
> > Implementation is based on xmon code, but the new functionality was
> > kept independent.
>
> This brings up a point: it looks like kdump doesnt capture the FP and
> altivec regs. Could be important for some bugs.
Yes, and there are more things that might be worth adding:
- SLB contents (as noticed by Luke Browning)
- some SPRs
- state of some device drivers
We have briefly discussed the idea of having generic notifiers into
which arbitrary subsystems can register, but unless we have more than
one or two users, it's probably not worth it.
> This brings up yet another point, it looks like our userspace core dumps
> dont capture altivec or SPU state.
Actually, the userspace core dumps do capture the SPU state as of 2.6.21,
thanks to the work of Dwayne McConnell :-)
Arnd <><
^ permalink raw reply
* [patch] PS3: update ps3_defconfig
From: Geoff Levand @ 2007-05-11 17:42 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Update ps3_defconfig.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
---
arch/powerpc/configs/ps3_defconfig | 167 ++++++++++++++-----------------------
1 file changed, 64 insertions(+), 103 deletions(-)
--- ps3-linux-dev.orig/arch/powerpc/configs/ps3_defconfig
+++ ps3-linux-dev/arch/powerpc/configs/ps3_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.21
-# Mon Apr 30 12:03:35 2007
+# Fri May 11 10:16:27 2007
#
CONFIG_PPC64=y
CONFIG_64BIT=y
@@ -40,6 +40,7 @@ CONFIG_PPC_FPU=y
# CONFIG_PPC_OF_PLATFORM_PCI is not set
CONFIG_ALTIVEC=y
CONFIG_PPC_STD_MMU=y
+# CONFIG_PPC_MM_SLICES is not set
CONFIG_VIRT_CPU_ACCOUNTING=y
CONFIG_SMP=y
CONFIG_NR_CPUS=2
@@ -67,6 +68,7 @@ CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_UTS_NS is not set
# CONFIG_AUDIT is not set
# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=17
# CONFIG_CPUSETS is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
@@ -87,12 +89,13 @@ CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SHMEM=y
-CONFIG_SLAB=y
CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
-# CONFIG_SLOB is not set
#
# Loadable module support
@@ -213,6 +216,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
CONFIG_RESOURCES_64BIT=y
CONFIG_ZONE_DMA_FLAG=1
CONFIG_ARCH_MEMORY_PROBE=y
+# CONFIG_PPC_HAS_HASH_64K is not set
# CONFIG_PPC_64K_PAGES is not set
# CONFIG_SCHED_SMT is not set
CONFIG_PROC_DEVICETREE=y
@@ -229,15 +233,12 @@ CONFIG_ZONE_DMA=y
CONFIG_GENERIC_ISA_DMA=y
# CONFIG_PCI is not set
# CONFIG_PCI_DOMAINS is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
#
# PCCARD (PCMCIA/CardBus) support
#
# CONFIG_PCCARD is not set
-
-#
-# PCI Hotplug Support
-#
CONFIG_KERNEL_START=0xc000000000000000
#
@@ -363,7 +364,9 @@ CONFIG_BT_HCIUSB_SCO=y
#
# CONFIG_CFG80211 is not set
CONFIG_WIRELESS_EXT=y
+# CONFIG_MAC80211 is not set
# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
#
# Device Drivers
@@ -414,6 +417,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
#
# Misc devices
#
+# CONFIG_BLINK is not set
#
# ATA/ATAPI/MFM/RLL support
@@ -447,6 +451,7 @@ CONFIG_CHR_DEV_SG=m
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
+CONFIG_SCSI_WAIT_SCAN=m
#
# SCSI Transports
@@ -473,25 +478,7 @@ CONFIG_CHR_DEV_SG=m
# Multi-device support (RAID and LVM)
#
# CONFIG_MD is not set
-
-#
-# Fusion MPT device support
-#
-# CONFIG_FUSION is not set
-
-#
-# IEEE 1394 (FireWire) support
-#
-
-#
-# I2O device support
-#
-
-#
-# Macintosh device drivers
-#
-# CONFIG_MAC_EMUMOUSEBTN is not set
-# CONFIG_WINDFARM is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
#
# Network device support
@@ -519,6 +506,7 @@ CONFIG_MII=m
#
# Ethernet (10000 Mbit)
#
+CONFIG_MLX4_DEBUG=y
#
# Token Ring devices
@@ -531,6 +519,25 @@ CONFIG_MII=m
# CONFIG_WLAN_80211 is not set
#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+CONFIG_USB_PEGASUS=m
+# CONFIG_USB_RTL8150 is not set
+CONFIG_USB_USBNET_MII=m
+CONFIG_USB_USBNET=m
+# CONFIG_USB_NET_CDCETHER is not set
+# CONFIG_USB_NET_DM9601 is not set
+# CONFIG_USB_NET_GL620A is not set
+# CONFIG_USB_NET_NET1080 is not set
+# CONFIG_USB_NET_PLUSB is not set
+CONFIG_USB_NET_MCS7830=m
+# CONFIG_USB_NET_RNDIS_HOST is not set
+# CONFIG_USB_NET_CDC_SUBSET is not set
+# CONFIG_USB_NET_ZAURUS is not set
+
+#
# Wan interfaces
#
# CONFIG_WAN is not set
@@ -575,6 +582,7 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
# CONFIG_INPUT_TOUCHSCREEN is not set
# CONFIG_INPUT_MISC is not set
@@ -609,15 +617,10 @@ CONFIG_LEGACY_PTY_COUNT=16
# IPMI
#
# CONFIG_IPMI_HANDLER is not set
-
-#
-# Watchdog Cards
-#
# CONFIG_WATCHDOG is not set
# CONFIG_HW_RANDOM is not set
CONFIG_GEN_RTC=y
# CONFIG_GEN_RTC_X is not set
-# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HANGCHECK_TIMER is not set
@@ -626,10 +629,6 @@ CONFIG_GEN_RTC=y
# TPM devices
#
# CONFIG_TCG_TPM is not set
-
-#
-# I2C support
-#
# CONFIG_I2C is not set
#
@@ -642,12 +641,7 @@ CONFIG_GEN_RTC=y
# Dallas's 1-wire bus
#
# CONFIG_W1 is not set
-
-#
-# Hardware Monitoring support
-#
# CONFIG_HWMON is not set
-# CONFIG_HWMON_VID is not set
#
# Multifunction device drivers
@@ -669,12 +663,23 @@ CONFIG_GEN_RTC=y
# Graphics support
#
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB_DDC is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
+# CONFIG_FB_SYS_FILLRECT is not set
+# CONFIG_FB_SYS_COPYAREA is not set
+# CONFIG_FB_SYS_IMAGEBLIT is not set
+# CONFIG_FB_SYS_FOPS is not set
+CONFIG_FB_DEFERRED_IO=y
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
@@ -702,10 +707,6 @@ CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
# CONFIG_FONTS is not set
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
-
-#
-# Logo configuration
-#
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
@@ -768,6 +769,20 @@ CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
#
+# USB Input Devices
+#
+CONFIG_USB_HID=m
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+
+#
# USB support
#
CONFIG_USB_ARCH_HAS_HCD=y
@@ -827,56 +842,10 @@ CONFIG_USB_STORAGE=m
# CONFIG_USB_LIBUSUAL is not set
#
-# USB Input Devices
-#
-CONFIG_USB_HID=m
-# CONFIG_USB_HIDINPUT_POWERBOOK is not set
-# CONFIG_HID_FF is not set
-# CONFIG_USB_HIDDEV is not set
-
-#
-# USB HID Boot Protocol drivers
-#
-# CONFIG_USB_KBD is not set
-# CONFIG_USB_MOUSE is not set
-# CONFIG_USB_AIPTEK is not set
-# CONFIG_USB_WACOM is not set
-# CONFIG_USB_ACECAD is not set
-# CONFIG_USB_KBTAB is not set
-# CONFIG_USB_POWERMATE is not set
-# CONFIG_USB_TOUCHSCREEN is not set
-# CONFIG_USB_YEALINK is not set
-# CONFIG_USB_XPAD is not set
-# CONFIG_USB_ATI_REMOTE is not set
-# CONFIG_USB_ATI_REMOTE2 is not set
-# CONFIG_USB_KEYSPAN_REMOTE is not set
-# CONFIG_USB_APPLETOUCH is not set
-# CONFIG_USB_GTCO is not set
-
-#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
-
-#
-# USB Network Adapters
-#
-# CONFIG_USB_CATC is not set
-# CONFIG_USB_KAWETH is not set
-CONFIG_USB_PEGASUS=m
-# CONFIG_USB_RTL8150 is not set
-CONFIG_USB_USBNET_MII=m
-CONFIG_USB_USBNET=m
-# CONFIG_USB_NET_CDCETHER is not set
-# CONFIG_USB_NET_DM9601 is not set
-# CONFIG_USB_NET_GL620A is not set
-# CONFIG_USB_NET_NET1080 is not set
-# CONFIG_USB_NET_PLUSB is not set
-CONFIG_USB_NET_MCS7830=m
-# CONFIG_USB_NET_RNDIS_HOST is not set
-# CONFIG_USB_NET_CDC_SUBSET is not set
-# CONFIG_USB_NET_ZAURUS is not set
CONFIG_USB_MON=y
#
@@ -920,10 +889,6 @@ CONFIG_USB_MON=y
# USB Gadget Support
#
# CONFIG_USB_GADGET is not set
-
-#
-# MMC/SD Card support
-#
# CONFIG_MMC is not set
#
@@ -966,14 +931,6 @@ CONFIG_USB_MON=y
#
#
-# Auxiliary Display support
-#
-
-#
-# Virtualization
-#
-
-#
# File systems
#
CONFIG_EXT2_FS=m
@@ -1071,6 +1028,7 @@ CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
+# CONFIG_SUNRPC_BIND34 is not set
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_RPCSEC_GSS_SPKM3 is not set
# CONFIG_SMB_FS is not set
@@ -1148,11 +1106,13 @@ CONFIG_NLS_ISO8859_1=y
CONFIG_BITREVERSE=y
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_LIBCRC32C is not set
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
#
# Instrumentation Support
@@ -1171,7 +1131,6 @@ CONFIG_ENABLE_MUST_CHECK=y
# CONFIG_HEADERS_CHECK is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
-CONFIG_LOG_BUF_SHIFT=17
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
@@ -1205,6 +1164,7 @@ CONFIG_PPC_EARLY_DEBUG=y
# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set
# CONFIG_PPC_EARLY_DEBUG_BEAT is not set
+# CONFIG_PPC_EARLY_DEBUG_44x is not set
#
# Security options
@@ -1234,6 +1194,7 @@ CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_CRYPTD is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_BLOWFISH is not set
^ permalink raw reply
* [patch] PS3: Fix request_irq warning
From: Geoff Levand @ 2007-05-11 17:41 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Fix compiler warning:
ps3/smp.c:122: warning: ignoring return value of 'request_irq'
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
---
arch/powerpc/platforms/ps3/smp.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
--- ps3-linux-dev.orig/arch/powerpc/platforms/ps3/smp.c
+++ ps3-linux-dev/arch/powerpc/platforms/ps3/smp.c
@@ -118,9 +118,11 @@ static void __init ps3_smp_setup_cpu(int
DBG("%s:%d: (%d, %d) => virq %u\n",
__func__, __LINE__, cpu, i, virqs[i]);
+ result = request_irq(virqs[i], ipi_function_handler,
+ IRQF_DISABLED, names[i], (void*)(long)i);
- request_irq(virqs[i], ipi_function_handler, IRQF_DISABLED,
- names[i], (void*)(long)i);
+ if (result)
+ virqs[i] = NO_IRQ;
}
ps3_register_ipi_debug_brk(cpu, virqs[PPC_MSG_DEBUGGER_BREAK]);
^ permalink raw reply
* Re: [PATCH] [POWERPC] trivial ps3 fixups
From: Geoff Levand @ 2007-05-11 17:38 UTC (permalink / raw)
To: paulus; +Cc: Stephen Rothwell, ppc-dev
In-Reply-To: <20070511154244.34ad81e6.sfr@canb.auug.org.au>
Stephen Rothwell wrote:
> Fixes warnings:
>
> arch/powerpc/platforms/ps3/system-bus.c: In function 'ps3_map_sg':
> arch/powerpc/platforms/ps3/system-bus.c:278: warning: unused variable 'i'
> arch/powerpc/platforms/ps3/system-bus.c:277: warning: unused variable 'dev'
> arch/powerpc/platforms/ps3/setup.c:103: warning: 'prealloc' defined but not used
>
> Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Geoff Levand <geoffrey.levand@am.sony.com>
^ permalink raw reply
* Using kprobes [was Re: [PATCH] Performance Stats: Kernel patch
From: Linas Vepstas @ 2007-05-11 17:23 UTC (permalink / raw)
To: Andrew Morton; +Cc: Maxim Uvarov, dada1, pavel, wli, linuxppc-dev
In-Reply-To: <20070510111242.dd42adae.akpm@linux-foundation.org>
On Thu, May 10, 2007 at 11:12:42AM -0700, Andrew Morton wrote:
>
> I don't think the syscall-counting feature has a future, sorry. Perhaps
> you could do something like hooking it up on-demand by insertion of a kprobe,
> dunno.
This is an interesting point. I've started fiddling with (a wrapper
around) kprobes that allows me to pick any subroutine symbol in System.map,
and then get an event whenever that subroutine gets called. Its pretty
slick, and allows me to gather data on certain unusual events in the
kernel. (I'm not using this for performance monitoring, I'm trying to
do RAS).
It makes a lot of sense to me to have a generic kprobe extension, where
you could give it a list of subroutine names, and it'll collect stats
on the number of times that the routine was called. Some user-space thingy
could poll for those stats, or you could put them in /sys or wherever.
Its more complicted than just instriumenting syscalls, but a lot more
useful, I would think ...
--linas
^ permalink raw reply
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