* [PATCH 2/5 v2] Add RapidIO sector to the MPC8641HPCN board dts file.
From: Zhang Wei @ 2007-06-27 8:35 UTC (permalink / raw)
To: mporter; +Cc: linuxppc-dev, paulus, linux-kernel
In-Reply-To: <11829333481977-git-send-email-wei.zhang@freescale.com>
Add RapidIO sector to the MPC8641HPCN board dts file.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
---
arch/powerpc/boot/dts/mpc8641_hpcn.dts | 13 +++++++++++++
1 files changed, 13 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 04626b1..abc9ff3 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -329,6 +329,19 @@
>;
};
+ srio@c0000 {
+ compatible = "fsl,rapidio-delta";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ reg = <c0000 20000>;
+ ranges = <0 0 c0000000 20000000>;
+ interrupt-parent = <&mpic>;
+ /* err_irq bell_outb_irq bell_inb_irq
+ msg1_tx_irq msg1_rx_irq
+ msg2_tx_irq msg2_rx_irq */
+ interrupts = <30 2 31 2 32 2 35 2 36 2 37 2 38 2>;
+ };
+
mpic: pic@40000 {
clock-frequency = <0>;
interrupt-controller;
--
1.5.1
^ permalink raw reply related
* [PATCH 4/5 v2] Add RapidIO support to powerpc architecture.
From: Zhang Wei @ 2007-06-27 8:35 UTC (permalink / raw)
To: mporter; +Cc: linuxppc-dev, paulus, linux-kernel
In-Reply-To: <1182933348216-git-send-email-wei.zhang@freescale.com>
This patch adds the RapidIO support to the powerpc architecture.
Some files are moved from ppc. OF-tree and OF-device supports are added.
New silicons such as MPC8548, MPC8641 with serial RapidIO controller are
all supported.
Memory driver hardware operations are added.
Global mport variables are changed to master port private variables.
Multi master ports are supported.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
---
arch/powerpc/Kconfig | 8 +
arch/powerpc/kernel/Makefile | 1 +
arch/powerpc/kernel/rio.c | 64 ++
arch/powerpc/sysdev/Makefile | 1 +
arch/powerpc/sysdev/fsl_rio.c | 1455 +++++++++++++++++++++++++++++++++++++++++
arch/powerpc/sysdev/fsl_rio.h | 20 +
6 files changed, 1549 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/kernel/rio.c
create mode 100644 arch/powerpc/sysdev/fsl_rio.c
create mode 100644 arch/powerpc/sysdev/fsl_rio.h
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index e683668..a41aaac 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -742,6 +742,14 @@ source "drivers/pci/Kconfig"
source "drivers/pcmcia/Kconfig"
+config RAPIDIO
+ bool "RapidIO support" if MPC8540 || MPC8560 || MPC8641 || MPC8548
+ help
+ If you say Y here, the kernel will include drivers and
+ infrastructure code to support RapidIO interconnect devices.
+
+source "drivers/rapidio/Kconfig"
+
source "drivers/pci/hotplug/Kconfig"
endmenu
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 3e779f0..9ed2367 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -69,6 +69,7 @@ pci64-$(CONFIG_PPC64) += pci_64.o pci_dn.o
pci32-$(CONFIG_PPC32) := pci_32.o
obj-$(CONFIG_PCI) += $(pci64-y) $(pci32-y)
obj-$(CONFIG_PCI_MSI) += msi.o
+obj-$(CONFIG_RAPIDIO) += rio.o
kexec-$(CONFIG_PPC64) := machine_kexec_64.o
kexec-$(CONFIG_PPC32) := machine_kexec_32.o
obj-$(CONFIG_KEXEC) += machine_kexec.o crash.o $(kexec-y)
diff --git a/arch/powerpc/kernel/rio.c b/arch/powerpc/kernel/rio.c
new file mode 100644
index 0000000..8d41e93
--- /dev/null
+++ b/arch/powerpc/kernel/rio.c
@@ -0,0 +1,64 @@
+/*
+ * RapidIO PowerPC support
+ *
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ * Zhang Wei <wei.zhang@freescale.com>, Jun 2007
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * New RapidIO peer-to-peer network initialize with of-device supoort.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/rio.h>
+
+#include <asm/rio.h>
+#include <asm/of_device.h>
+#include <asm/of_platform.h>
+
+#include <../sysdev/fsl_rio.h>
+
+
+/* The probe function for RapidIO peer-to-peer network.
+ */
+static int __devinit of_rio_rpn_probe(struct of_device *dev,
+ const struct of_device_id *match)
+{
+ int rc;
+ printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n",
+ dev->node->full_name);
+
+ rc = fsl_rio_setup(dev);
+ if (rc)
+ goto out;
+
+ /* Enumerate all registered ports */
+ rc = rio_init_mports();
+out:
+ return rc;
+};
+
+static struct of_device_id of_rio_rpn_ids[] = {
+ {
+ .compatible = "fsl,rapidio-delta",
+ },
+ {},
+};
+
+static struct of_platform_driver of_rio_rpn_driver = {
+ .name = "of-rio",
+ .match_table = of_rio_rpn_ids,
+ .probe = of_rio_rpn_probe,
+};
+
+static __init int of_rio_rpn_init(void)
+{
+ return of_register_platform_driver(&of_rio_rpn_driver);
+}
+
+subsys_initcall(of_rio_rpn_init);
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index c3ce0bd..5d6d66b 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_U3_DART) += dart_iommu.o
obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCIE) += fsl_pcie.o
+obj-$(CONFIG_RAPIDIO) += fsl_rio.o
obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
mv64x60-$(CONFIG_PCI) += mv64x60_pci.o
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
new file mode 100644
index 0000000..1608138
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -0,0 +1,1455 @@
+/*
+ * PowerPC RapidIO support
+ *
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ * Zhang Wei <wei.zhang@freescale.com>, Jun 2007
+ *
+ * Copyright 2005 MontaVista Software, Inc.
+ * Matt Porter <mporter@kernel.crashing.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * Changelog:
+ * Jun 2007 Zhang Wei <wei.zhang@freescale.com>
+ * - This file is moved from arch/ppc/ppc85xx_rio.c. And the OF-tree support
+ * is added. New silicons such as MPC8548, MPC8641 are all supported.
+ * Memory driver hardware operations are added.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/rio.h>
+#include <linux/rio_drv.h>
+
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/of_device.h>
+#include <asm/of_platform.h>
+#include "fsl_soc.h"
+
+/* RapidIO definition irq, which read from OF-tree */
+#define IRQ_RIO_BELL(m) (((struct rio_priv *)(m->priv))->bellirq)
+#define IRQ_RIO_TX(m) (((struct rio_priv *)(m->priv))->txirq)
+#define IRQ_RIO_RX(m) (((struct rio_priv *)(m->priv))->rxirq)
+
+#define ERR(fmt, arg...) \
+ printk(KERN_ERR "RIO %s: " fmt, __FUNCTION__, ## arg)
+#define INFO(fmt...) printk(KERN_INFO "RIO: " fmt)
+#define IS_64BIT_RES ((sizeof(resource_size_t) == 8) ? 1 : 0)
+
+#define RIO_ATMU_REGS_OFFSET 0x10c00
+#define RIO_P_MSG_REGS_OFFSET 0x11000
+#define RIO_S_MSG_REGS_OFFSET 0x13000
+#define RIO_ESCSR 0x158
+#define RIO_CCSR 0x15c
+#define RIO_ISR_AACR 0x10120
+#define RIO_ISR_AACR_AA 0x1 /* Accept All ID */
+#define RIO_MAINT_WIN_SIZE 0x400000
+#define RIO_DBELL_WIN_SIZE 0x1000
+#define RIO_MAX_INB_ATMU 4
+#define RIO_MAX_OUTB_ATMU 8
+#define RIO_INB_ATMU_REGS_OFFSET 0x10de0
+#define RIO_ATMU_EN_MASK 0x80000000
+
+#define RIO_NREAD 0x4
+#define RIO_NWRITE 0x4
+#define RIO_NWRITE_R 0x5
+#define RIO_NREAD_R 0x5
+
+#define RIO_MSG_OMR_MUI 0x00000002
+#define RIO_MSG_OSR_TE 0x00000080
+#define RIO_MSG_OSR_QOI 0x00000020
+#define RIO_MSG_OSR_QFI 0x00000010
+#define RIO_MSG_OSR_MUB 0x00000004
+#define RIO_MSG_OSR_EOMI 0x00000002
+#define RIO_MSG_OSR_QEI 0x00000001
+
+#define RIO_MSG_IMR_MI 0x00000002
+#define RIO_MSG_ISR_TE 0x00000080
+#define RIO_MSG_ISR_QFI 0x00000010
+#define RIO_MSG_ISR_DIQI 0x00000001
+
+#define RIO_MSG_DESC_SIZE 32
+#define RIO_MSG_BUFFER_SIZE 4096
+#define RIO_MIN_TX_RING_SIZE 2
+#define RIO_MAX_TX_RING_SIZE 2048
+#define RIO_MIN_RX_RING_SIZE 2
+#define RIO_MAX_RX_RING_SIZE 2048
+
+#define DOORBELL_DMR_DI 0x00000002
+#define DOORBELL_DSR_TE 0x00000080
+#define DOORBELL_DSR_QFI 0x00000010
+#define DOORBELL_DSR_DIQI 0x00000001
+#define DOORBELL_TID_OFFSET 0x02
+#define DOORBELL_SID_OFFSET 0x04
+#define DOORBELL_INFO_OFFSET 0x06
+
+#define DOORBELL_MESSAGE_SIZE 0x08
+#define DBELL_SID(x) (*(u16 *)(x + DOORBELL_SID_OFFSET))
+#define DBELL_TID(x) (*(u16 *)(x + DOORBELL_TID_OFFSET))
+#define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET))
+
+struct rio_atmu_regs {
+ u32 rowtar;
+ u32 rowtear;
+ u32 rowbar;
+ u32 pad2;
+ u32 rowar;
+ u32 pad3[3];
+};
+
+struct rio_inb_atmu_regs {
+ u32 riwtar;
+ u32 pad1;
+ u32 riwbar;
+ u32 pad2;
+ u32 riwar;
+ u32 pad3[3];
+};
+
+struct rio_msg_regs {
+ u32 omr;
+ u32 osr;
+ u32 pad1;
+ u32 odqdpar;
+ u32 pad2;
+ u32 osar;
+ u32 odpr;
+ u32 odatr;
+ u32 odcr;
+ u32 pad3;
+ u32 odqepar;
+ u32 pad4[13];
+ u32 imr;
+ u32 isr;
+ u32 pad5;
+ u32 ifqdpar;
+ u32 pad6;
+ u32 ifqepar;
+ u32 pad7[226];
+ u32 odmr;
+ u32 odsr;
+ u32 res0[4];
+ u32 oddpr;
+ u32 oddatr;
+ u32 res1[3];
+ u32 odretcr;
+ u32 res2[12];
+ u32 dmr;
+ u32 dsr;
+ u32 pad8;
+ u32 dqdpar;
+ u32 pad9;
+ u32 dqepar;
+ u32 pad10[26];
+ u32 pwmr;
+ u32 pwsr;
+ u32 pad11;
+ u32 pwqbar;
+};
+
+struct rio_tx_desc {
+ u32 res1;
+ u32 saddr;
+ u32 dport;
+ u32 dattr;
+ u32 res2;
+ u32 res3;
+ u32 dwcnt;
+ u32 res4;
+};
+
+struct rio_dbell_ring {
+ void *virt;
+ dma_addr_t phys;
+};
+
+struct rio_msg_tx_ring {
+ void *virt;
+ dma_addr_t phys;
+ void *virt_buffer[RIO_MAX_TX_RING_SIZE];
+ dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE];
+ int tx_slot;
+ int size;
+ void *dev_id;
+};
+
+struct rio_msg_rx_ring {
+ void *virt;
+ dma_addr_t phys;
+ void *virt_buffer[RIO_MAX_RX_RING_SIZE];
+ int rx_slot;
+ int size;
+ void *dev_id;
+};
+
+struct rio_priv {
+ volatile void __iomem *regs_win;
+ volatile struct rio_atmu_regs __iomem *atmu_regs;
+ volatile struct rio_atmu_regs __iomem *maint_atmu_regs;
+ volatile struct rio_atmu_regs __iomem *dbell_atmu_regs;
+ volatile void __iomem *dbell_win;
+ volatile void __iomem *maint_win;
+ volatile struct rio_msg_regs __iomem *msg_regs;
+ struct rio_dbell_ring dbell_ring;
+ struct rio_msg_tx_ring msg_tx_ring;
+ struct rio_msg_rx_ring msg_rx_ring;
+ int bellirq;
+ int txirq;
+ int rxirq;
+};
+
+/**
+ * fsl_rio_doorbell_send - Send a PowerPC doorbell message
+ * @index: ID of RapidIO interface
+ * @destid: Destination ID of target device
+ * @data: 16-bit info field of RapidIO doorbell message
+ *
+ * Sends a PowerPC doorbell message. Returns %0 on success or
+ * %-EINVAL on failure.
+ */
+static int fsl_rio_doorbell_send(struct rio_mport *mport, int index, u16 destid, u16 data)
+{
+ struct rio_priv *priv = mport->priv;
+ pr_debug("fsl_doorbell_send: index %d destid 0x%04x data 0x%04x\n",
+ index, destid, data);
+
+ switch (mport->phy_type) {
+ case RIO_PHY_SERIAL:
+ /* In the later version silicons, such as MPC8548, MPC8641,
+ * below operations is must be.
+ */
+ out_be32(&priv->msg_regs->odmr, 0x00000000);
+ out_be32(&priv->msg_regs->odretcr, 0x00000004);
+ out_be32(&priv->msg_regs->oddpr, destid << 16);
+ out_be32(&priv->msg_regs->oddatr,data );
+ out_be32(&priv->msg_regs->odmr, 0x00000001);
+ break;
+ case RIO_PHY_PARALLEL:
+ out_be32(&priv->dbell_atmu_regs->rowtar, destid << 22);
+ out_be16(priv->dbell_win, data);
+ break;
+ }
+
+ return 0;
+}
+
+/**
+ * fsl_local_config_read - Generate a PowerPC local config space read
+ * @index: ID of RapdiIO interface
+ * @offset: Offset into configuration space
+ * @len: Length (in bytes) of the maintenance transaction
+ * @data: Value to be read into
+ *
+ * Generates a PowerPC local configuration space read. Returns %0 on
+ * success or %-EINVAL on failure.
+ */
+static int fsl_local_config_read(struct rio_mport *mport, int index, u32 offset, int len, u32 * data)
+{
+ struct rio_priv *priv = mport->priv;
+ pr_debug("fsl_local_config_read: index %d offset 0x%08x\n", index,
+ offset);
+ *data = in_be32(priv->regs_win + offset);
+
+ return 0;
+}
+
+/**
+ * fsl_local_config_write - Generate a PowerPC local config space write
+ * @index: ID of RapdiIO interface
+ * @offset: Offset into configuration space
+ * @len: Length (in bytes) of the maintenance transaction
+ * @data: Value to be written
+ *
+ * Generates a PowerPC local configuration space write. Returns %0 on
+ * success or %-EINVAL on failure.
+ */
+static int fsl_local_config_write(struct rio_mport *mport, int index, u32 offset, int len, u32 data)
+{
+ struct rio_priv *priv = mport->priv;
+ pr_debug("fsl_local_config_write: index %d offset 0x%08x data 0x%08x\n",
+ index, offset, data);
+ out_be32(priv->regs_win + offset, data);
+
+ return 0;
+}
+
+/**
+ * fsl_rio_config_read - Generate a PowerPC read maintenance transaction
+ * @index: ID of RapdiIO interface
+ * @destid: Destination ID of transaction
+ * @hopcount: Number of hops to target device
+ * @offset: Offset into configuration space
+ * @len: Length (in bytes) of the maintenance transaction
+ * @val: Location to be read into
+ *
+ * Generates a PowerPC read maintenance transaction. Returns %0 on
+ * success or %-EINVAL on failure.
+ */
+static int fsl_rio_config_read(struct rio_mport *mport, int index, u16 destid,
+ u8 hopcount, u32 offset, int len, u32 * val)
+{
+ void *data;
+ struct rio_priv *priv = mport->priv;
+
+ pr_debug("fsl_rio_config_read: index %d destid %d hopcount %d "
+ "offset 0x%08x len %d\n",
+ index, destid, hopcount, offset, len);
+ out_be32(&priv->maint_atmu_regs->rowtar,
+ ((destid & 0x3ff) << 22) | (hopcount << 12)
+ | ((offset & ~0x3) >> 9));
+ out_be32(&priv->maint_atmu_regs->rowtear, (destid & 0xfc00) >> 10);
+
+ data = priv->maint_win + offset;
+ switch (len) {
+ case 1:
+ *val = in_8(data);
+ break;
+ case 2:
+ *val = in_be16(data);
+ break;
+ default:
+ *val = in_be32(data);
+ break;
+ }
+
+ return 0;
+}
+
+/**
+ * fsl_rio_config_write - Generate a PowerPC write maintenance transaction
+ * @index: ID of RapdiIO interface
+ * @destid: Destination ID of transaction
+ * @hopcount: Number of hops to target device
+ * @offset: Offset into configuration space
+ * @len: Length (in bytes) of the maintenance transaction
+ * @val: Value to be written
+ *
+ * Generates an PowerPC write maintenance transaction. Returns %0 on
+ * success or %-EINVAL on failure.
+ */
+static int fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
+ u8 hopcount, u32 offset, int len, u32 val)
+{
+ void *data;
+ struct rio_priv *priv = mport->priv;
+ pr_debug("fsl_rio_config_write: index %d destid %d hopcount %d"
+ "offset 0x%08x len %d val 0x%08x\n",
+ index, destid, hopcount, offset, len, val);
+ out_be32(&priv->maint_atmu_regs->rowtar,
+ ((destid & 0x3ff) << 22) | (hopcount << 12)
+ | ((offset & ~0x3) >> 9));
+ out_be32(&priv->maint_atmu_regs->rowtear, (destid & 0xfc00) >> 10);
+
+ data = priv->maint_win + offset;
+ switch (len) {
+ case 1:
+ out_8(data, val);
+ break;
+ case 2:
+ out_be16(data, val);
+ break;
+ default:
+ out_be32(data, val);
+ break;
+ }
+
+ return 0;
+}
+
+/**
+ * fsl_rio_map_inb_mem -- Mapping inbound memory region.
+ * @lstart: Local memory space start address.
+ * @rstart: RapidIO space start address.
+ * @size: The mapping region size.
+ * @flags: Flags for mapping. 0 for using default flags.
+ *
+ * Return: 0 -- Success.
+ *
+ * This function will create the inbound mapping
+ * from rstart to lstart.
+ */
+static int fsl_rio_map_inb_mem(struct rio_mport *mport, resource_size_t lstart,
+ resource_size_t rstart, resource_size_t size,
+ u32 flags)
+{
+ int i;
+ struct rio_priv *priv = mport->priv;
+ volatile struct rio_inb_atmu_regs __iomem *inbatmu =
+ (struct rio_inb_atmu_regs *)
+ (priv->regs_win + RIO_INB_ATMU_REGS_OFFSET) - 1;
+ int size_ffs;
+ resource_size_t align;
+
+ if (flags == 0)
+ flags = (RIO_NREAD_R << 4) | RIO_NWRITE_R;
+
+ align = (size < 0x1000) ? 0x1000 : 1 << (__ilog2(size - 1) + 1);
+
+ /* Align the size */
+ if ((lstart + size) > (_ALIGN_DOWN(lstart, align) + align)) {
+ size_ffs = __ffs(_ALIGN_DOWN(lstart + size - 1, align));
+ size = 1 << (size_ffs + (((_ALIGN_DOWN(lstart, 1 << size_ffs) +
+ (1 << size_ffs)) < (lstart + size)) ? 1 : 0));
+ } else
+ size = align;
+
+ if ((lstart & (size - 1)) != (rstart & (size - 1))) {
+ ERR("The local address 0x%x can not be aligned to the same size"
+ " 0x%x with the RapidIO space address 0x%x!\n", lstart,
+ size, rstart);
+ return -EINVAL;
+ }
+
+ /* Search for free inbound ATMU */
+ for (i = 1;
+ (i <= RIO_MAX_INB_ATMU) && (inbatmu->riwar & RIO_ATMU_EN_MASK);
+ i++, inbatmu--)
+ ;
+
+ if (i > RIO_MAX_INB_ATMU) {
+ ERR("No free inbound ATMU!\n");
+ return -EBUSY;
+ }
+ out_be32(&inbatmu->riwtar, ((IS_64BIT_RES ? (lstart >> 32)
+ & 0xf : 0) << 20) | ((lstart >> 12) & 0xfffff));
+ out_be32(&inbatmu->riwbar, ((IS_64BIT_RES ? (rstart >> 32)
+ & 0x3 : 0) << 20) | ((rstart >> 12) & 0xfffff));
+ out_be32(&inbatmu->riwar, 0x80000000 | (0xf << 20)
+ | ((flags & 0xff) << 12)
+ | (__ilog2(size) - 1));
+ return 0;
+}
+
+/**
+ * fsl_rio_map_outb_mem -- Mapping outbound memory region.
+ * @lstart: Local memory space start address.
+ * @rstart: RapidIO space start address.
+ * @size: The mapping region size.
+ * @tid: The target RapidIO device id.
+ * @flags: Flags for mapping. 0 for using default flags.
+ *
+ * Return: 0 -- Success.
+ *
+ * This function will create the outbound mapping
+ * from lstart to rstart.
+ */
+static int fsl_rio_map_outb_mem(struct rio_mport *mport, resource_size_t lstart,
+ resource_size_t rstart, resource_size_t size,
+ u16 tid, u32 flags)
+{
+ int i;
+ struct rio_priv *priv = mport->priv;
+ volatile struct rio_atmu_regs __iomem *outbatmu =
+ (struct rio_atmu_regs *)
+ (priv->regs_win + RIO_ATMU_REGS_OFFSET) + 1;
+ int size_ffs;
+ resource_size_t align;
+
+ if (flags == 0)
+ flags = (RIO_NREAD << 4) | RIO_NWRITE_R;
+
+ align = (size < 0x1000) ? 0x1000 : 1 << (__ilog2(size - 1) + 1);
+
+ /* Align the size */
+ if ((lstart + size) > (_ALIGN_DOWN(lstart, align) + align)) {
+ size_ffs = __ffs(_ALIGN_DOWN(lstart + size - 1, align));
+ size = 1 << (size_ffs + (((_ALIGN_DOWN(lstart, 1 << size_ffs) +
+ (1 << size_ffs)) < (lstart + size)) ? 1 : 0));
+ } else
+ size = align;
+
+ if ((lstart & (size - 1)) != (rstart & (size - 1))) {
+ ERR("The local address 0x%x can not be aligned to the same size"
+ " 0x%x with the RapidIO space address 0x%x!\n", lstart,
+ size, rstart);
+ return -EINVAL;
+ }
+
+ /* Search for free outbound ATMU */
+ for (i = 1;
+ (i <= RIO_MAX_OUTB_ATMU) && (outbatmu->rowar & RIO_ATMU_EN_MASK);
+ i++, outbatmu++)
+ ;
+
+ if (i > RIO_MAX_OUTB_ATMU) {
+ ERR("No free outbound ATMU!\n");
+ return -EBUSY;
+ }
+ out_be32(&outbatmu->rowtar, ((tid & 0x3ff) << 22)
+ | ((IS_64BIT_RES ? (rstart >> 32) & 0x3 : 0) << 20)
+ | ((rstart >> 12) & 0xfffff));
+ if (mport->phy_type == RIO_PHY_SERIAL)
+ out_be32(&outbatmu->rowtear, tid >> 10);
+ out_be32(&outbatmu->rowbar, ((IS_64BIT_RES ?
+ (lstart >> 32) & 0xf : 0) << 20)
+ | ((lstart >> 12) & 0xfffff));
+ out_be32(&outbatmu->rowar, 0x80000000
+ | ((flags & 0xff) << 12)
+ | (__ilog2(size) - 1));
+ return 0;
+}
+
+/**
+ * fsl_rio_unmap_inb_mem -- Unmapping inbound memory region.
+ * @lstart: Local memory space start address.
+ */
+static void fsl_rio_unmap_inb_mem(struct rio_mport *mport, resource_size_t lstart)
+{
+ int i;
+ struct rio_priv *priv = mport->priv;
+ volatile struct rio_inb_atmu_regs __iomem *inbatmu = (struct rio_inb_atmu_regs *)
+ (priv->regs_win + RIO_INB_ATMU_REGS_OFFSET) - 1;
+
+ /* Search for inbound ATMU */
+ for (i = 1; i <= RIO_MAX_INB_ATMU ; i++, inbatmu--) {
+ u32 tar = ((IS_64BIT_RES ? (lstart >> 32) & 0xf : 0) << 20)
+ | ((lstart >> 12) & 0xfffff);
+ if (inbatmu->riwtar == tar) {
+ out_be32(&inbatmu->riwar, ~(RIO_ATMU_EN_MASK));
+ return;
+ }
+ }
+}
+
+/**
+ * fsl_rio_unmap_inb_mem -- Unmapping outbound memory region.
+ * @lstart: Local memory space start address.
+ */
+static void fsl_rio_unmap_outb_mem(struct rio_mport *mport, resource_size_t lstart)
+{
+ int i;
+ struct rio_priv *priv = mport->priv;
+ volatile struct rio_atmu_regs __iomem *outbatmu = (struct rio_atmu_regs *)
+ (priv->regs_win + RIO_ATMU_REGS_OFFSET) + 1;
+
+ /* Search for outbound ATMU */
+ for (i = 1; i <= RIO_MAX_OUTB_ATMU ; i++, outbatmu++) {
+ u32 bar = ((IS_64BIT_RES ? (lstart >> 32) & 0xf : 0) << 20)
+ | ((lstart >> 12) & 0xfffff);
+ if (outbatmu->rowbar == bar) {
+ out_be32(&outbatmu->rowar, ~(RIO_ATMU_EN_MASK));
+ return;
+ }
+ }
+}
+
+/**
+ * rio_hw_add_outb_message - Add message to the PowerPC outbound message queue
+ * @mport: Master port with outbound message queue
+ * @rdev: Target of outbound message
+ * @mbox: Outbound mailbox
+ * @buffer: Message to add to outbound queue
+ * @len: Length of message
+ *
+ * Adds the @buffer message to the PowerPC outbound message queue. Returns
+ * %0 on success or %-EINVAL on failure.
+ */
+int rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev,
+ int mbox, void *buffer, size_t len)
+{
+ struct rio_priv *priv = mport->priv;
+ struct rio_tx_desc *desc =
+ (struct rio_tx_desc *)priv->msg_tx_ring.virt + priv->msg_tx_ring.tx_slot;
+ int ret = 0;
+
+ pr_debug("RIO: rio_hw_add_outb_message(): "
+ "destid 0x%04x mbox %d buffer %p len 0x%08x\n",
+ rdev->destid, mbox, buffer, len);
+
+ if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
+ ret = -EINVAL;
+ goto out;
+ }
+
+ /* Copy and clear rest of buffer */
+ memcpy(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot], buffer, len);
+ if (len < (RIO_MAX_MSG_SIZE - 4))
+ memset(priv->msg_tx_ring.virt_buffer[priv->msg_tx_ring.tx_slot]
+ + len, 0, RIO_MAX_MSG_SIZE - len);
+
+ switch(mport->phy_type) {
+ case RIO_PHY_SERIAL:
+ /* Set mbox field for message, and set destid */
+ desc->dport = (rdev->destid << 16) | ( mbox & 0x3);
+
+ /* Enable EOMI interrupt and priority */
+ desc->dattr = 0x28000000;
+
+ /* Set mbox field for message */
+ desc->dport = mbox & 0x3;
+ break;
+ case RIO_PHY_PARALLEL:
+ /* Enable EOMI interrupt, set priority, and set destid */
+ desc->dattr = 0x28000000 | (rdev->destid << 2);
+ break;
+ }
+
+ /* Set transfer size aligned to next power of 2 (in double words) */
+ desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len);
+
+ /* Set snooping and source buffer address */
+ desc->saddr = 0x00000004 | priv->msg_tx_ring.phys_buffer[priv->msg_tx_ring.tx_slot];
+
+ /* Increment enqueue pointer */
+ setbits32(&priv->msg_regs->omr, RIO_MSG_OMR_MUI);
+
+ /* Go to next descriptor */
+ if (++priv->msg_tx_ring.tx_slot == priv->msg_tx_ring.size)
+ priv->msg_tx_ring.tx_slot = 0;
+
+ out:
+ return ret;
+}
+
+EXPORT_SYMBOL_GPL(rio_hw_add_outb_message);
+
+/**
+ * fsl_rio_tx_handler - PowerPC outbound message interrupt handler
+ * @irq: Linux interrupt number
+ * @dev_instance: Pointer to interrupt-specific data
+ *
+ * Handles outbound message interrupts. Executes a register outbound
+ * mailbox event handler and acks the interrupt occurence.
+ */
+static irqreturn_t fsl_rio_tx_handler(int irq, void *dev_instance)
+{
+ int osr;
+ struct rio_mport *port = (struct rio_mport *)dev_instance;
+ struct rio_priv *priv = port->priv;
+
+ osr = in_be32(&priv->msg_regs->osr);
+
+ if (unlikely(osr & RIO_MSG_OSR_TE)) {
+ pr_info("RIO: outbound message transmission error\n");
+ out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_TE);
+ goto out;
+ }
+
+ if (unlikely(osr & RIO_MSG_OSR_QOI)) {
+ pr_info("RIO: outbound message queue overflow\n");
+ out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_QOI);
+ goto out;
+ }
+
+ if (osr & RIO_MSG_OSR_EOMI) {
+ u32 dqp = in_be32(&priv->msg_regs->odqdpar);
+ int slot = (dqp - priv->msg_tx_ring.phys) >> 5;
+ port->outb_msg[0].mcback(port, priv->msg_tx_ring.dev_id, -1, slot);
+
+ /* Ack the end-of-message interrupt */
+ out_be32(&priv->msg_regs->osr, RIO_MSG_OSR_EOMI);
+ }
+
+ out:
+ return IRQ_HANDLED;
+}
+
+/**
+ * rio_open_outb_mbox - Initialize PowerPC outbound mailbox
+ * @mport: Master port implementing the outbound message unit
+ * @dev_id: Device specific pointer to pass on event
+ * @mbox: Mailbox to open
+ * @entries: Number of entries in the outbound mailbox ring
+ *
+ * Initializes buffer ring, request the outbound message interrupt,
+ * and enables the outbound message unit. Returns %0 on success and
+ * %-EINVAL or %-ENOMEM on failure.
+ */
+int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
+{
+ int i, j, rc = 0;
+ struct rio_priv *priv = mport->priv;
+
+ if ((entries < RIO_MIN_TX_RING_SIZE) ||
+ (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) {
+ rc = -EINVAL;
+ goto out;
+ }
+
+ /* Initialize shadow copy ring */
+ priv->msg_tx_ring.dev_id = dev_id;
+ priv->msg_tx_ring.size = entries;
+
+ for (i = 0; i < priv->msg_tx_ring.size; i++) {
+ priv->msg_tx_ring.virt_buffer[i] =
+ dma_alloc_coherent(NULL, RIO_MSG_BUFFER_SIZE,
+ &priv->msg_tx_ring.phys_buffer[i],
+ GFP_KERNEL);
+ if (!priv->msg_tx_ring.virt_buffer[i]) {
+ rc = -ENOMEM;
+ for (j = 0; j < priv->msg_tx_ring.size; j++)
+ if (priv->msg_tx_ring.virt_buffer[j])
+ dma_free_coherent(NULL,
+ RIO_MSG_BUFFER_SIZE,
+ priv->msg_tx_ring.
+ virt_buffer[j],
+ priv->msg_tx_ring.
+ phys_buffer[j]);
+ goto out;
+ }
+ }
+
+ /* Initialize outbound message descriptor ring */
+ priv->msg_tx_ring.virt = dma_alloc_coherent(NULL,
+ priv->msg_tx_ring.size *
+ RIO_MSG_DESC_SIZE,
+ &priv->msg_tx_ring.phys,
+ GFP_KERNEL);
+ if (!priv->msg_tx_ring.virt) {
+ rc = -ENOMEM;
+ goto out_dma;
+ }
+ priv->msg_tx_ring.tx_slot = 0;
+
+ /* Point dequeue/enqueue pointers at first entry in ring */
+ out_be32(&priv->msg_regs->odqdpar, priv->msg_tx_ring.phys);
+ out_be32(&priv->msg_regs->odqepar, priv->msg_tx_ring.phys);
+
+ /* Configure for snooping */
+ out_be32(&priv->msg_regs->osar, 0x00000004);
+
+ /* Clear interrupt status */
+ out_be32(&priv->msg_regs->osr, 0x000000b3);
+
+ /* Hook up outbound message handler */
+ rc = request_irq(IRQ_RIO_TX(mport), fsl_rio_tx_handler, 0, "msg_tx",
+ mport);
+ if (rc < 0)
+ goto out_irq;
+
+ /*
+ * Configure outbound message unit
+ * Snooping
+ * Interrupts (all enabled, except QEIE)
+ * Chaining mode
+ * Disable
+ */
+ out_be32(&priv->msg_regs->omr, 0x00100220);
+
+ /* Set number of entries */
+ setbits32(&priv->msg_regs->omr,
+ ((get_bitmask_order(entries) - 2) << 12));
+
+ /* Now enable the unit */
+ setbits32(&priv->msg_regs->omr, 0x1);
+
+ out:
+ return rc;
+
+ out_irq:
+ dma_free_coherent(NULL, priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
+ priv->msg_tx_ring.virt, priv->msg_tx_ring.phys);
+
+ out_dma:
+ for (i = 0; i < priv->msg_tx_ring.size; i++)
+ dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
+ priv->msg_tx_ring.virt_buffer[i],
+ priv->msg_tx_ring.phys_buffer[i]);
+
+ return rc;
+}
+
+/**
+ * rio_close_outb_mbox - Shut down PowerPC outbound mailbox
+ * @mport: Master port implementing the outbound message unit
+ * @mbox: Mailbox to close
+ *
+ * Disables the outbound message unit, free all buffers, and
+ * frees the outbound message interrupt.
+ */
+void rio_close_outb_mbox(struct rio_mport *mport, int mbox)
+{
+ struct rio_priv *priv = mport->priv;
+ /* Disable inbound message unit */
+ out_be32(&priv->msg_regs->omr, 0);
+
+ /* Free ring */
+ dma_free_coherent(NULL, priv->msg_tx_ring.size * RIO_MSG_DESC_SIZE,
+ priv->msg_tx_ring.virt, priv->msg_tx_ring.phys);
+
+ /* Free interrupt */
+ free_irq(IRQ_RIO_TX(mport), mport);
+}
+
+/**
+ * fsl_rio_rx_handler - PowerPC inbound message interrupt handler
+ * @irq: Linux interrupt number
+ * @dev_instance: Pointer to interrupt-specific data
+ *
+ * Handles inbound message interrupts. Executes a registered inbound
+ * mailbox event handler and acks the interrupt occurence.
+ */
+static irqreturn_t fsl_rio_rx_handler(int irq, void *dev_instance)
+{
+ int isr;
+ struct rio_mport *port = (struct rio_mport *)dev_instance;
+ struct rio_priv *priv = port->priv;
+
+ isr = in_be32(&priv->msg_regs->isr);
+
+ if (unlikely(isr & RIO_MSG_ISR_TE)) {
+ pr_info("RIO: inbound message reception error\n");
+ out_be32(&priv->msg_regs->isr, RIO_MSG_ISR_TE);
+ goto out;
+ }
+
+ /* XXX Need to check/dispatch until queue empty */
+ if (isr & RIO_MSG_ISR_DIQI) {
+ /*
+ * We implement *only* mailbox 0, but can receive messages
+ * for any mailbox/letter to that mailbox destination. So,
+ * make the callback with an unknown/invalid mailbox number
+ * argument.
+ */
+ port->inb_msg[0].mcback(port, priv->msg_rx_ring.dev_id, -1, -1);
+
+ /* Ack the queueing interrupt */
+ out_be32(&priv->msg_regs->isr, RIO_MSG_ISR_DIQI);
+ }
+
+ out:
+ return IRQ_HANDLED;
+}
+
+/**
+ * rio_open_inb_mbox - Initialize PowerPC inbound mailbox
+ * @mport: Master port implementing the inbound message unit
+ * @dev_id: Device specific pointer to pass on event
+ * @mbox: Mailbox to open
+ * @entries: Number of entries in the inbound mailbox ring
+ *
+ * Initializes buffer ring, request the inbound message interrupt,
+ * and enables the inbound message unit. Returns %0 on success
+ * and %-EINVAL or %-ENOMEM on failure.
+ */
+int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
+{
+ int i, rc = 0;
+ struct rio_priv *priv = mport->priv;
+
+ if ((entries < RIO_MIN_RX_RING_SIZE) ||
+ (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) {
+ rc = -EINVAL;
+ goto out;
+ }
+
+ /* Initialize client buffer ring */
+ priv->msg_rx_ring.dev_id = dev_id;
+ priv->msg_rx_ring.size = entries;
+ priv->msg_rx_ring.rx_slot = 0;
+ for (i = 0; i < priv->msg_rx_ring.size; i++)
+ priv->msg_rx_ring.virt_buffer[i] = NULL;
+
+ /* Initialize inbound message ring */
+ priv->msg_rx_ring.virt = dma_alloc_coherent(NULL,
+ priv->msg_rx_ring.size *
+ RIO_MAX_MSG_SIZE,
+ &priv->msg_rx_ring.phys,
+ GFP_KERNEL);
+ if (!priv->msg_rx_ring.virt) {
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ /* Point dequeue/enqueue pointers at first entry in ring */
+ out_be32(&priv->msg_regs->ifqdpar, (u32) priv->msg_rx_ring.phys);
+ out_be32(&priv->msg_regs->ifqepar, (u32) priv->msg_rx_ring.phys);
+
+ /* Clear interrupt status */
+ out_be32(&priv->msg_regs->isr, 0x00000091);
+
+ /* Hook up inbound message handler */
+ rc = request_irq(IRQ_RIO_RX(mport), fsl_rio_rx_handler, 0,
+ "msg_rx", mport);
+ if (rc < 0) {
+ dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
+ priv->msg_tx_ring.virt_buffer[i],
+ priv->msg_tx_ring.phys_buffer[i]);
+ goto out;
+ }
+
+ /*
+ * Configure inbound message unit:
+ * Snooping
+ * 4KB max message size
+ * Unmask all interrupt sources
+ * Disable
+ */
+ out_be32(&priv->msg_regs->imr, 0x001b0060);
+
+ /* Set number of queue entries */
+ setbits32(&priv->msg_regs->imr,
+ ((get_bitmask_order(entries) - 2) << 12));
+
+ /* Now enable the unit */
+ setbits32(&priv->msg_regs->imr, 0x1);
+
+ out:
+ return rc;
+}
+
+/**
+ * rio_close_inb_mbox - Shut down PowerPC inbound mailbox
+ * @mport: Master port implementing the inbound message unit
+ * @mbox: Mailbox to close
+ *
+ * Disables the inbound message unit, free all buffers, and
+ * frees the inbound message interrupt.
+ */
+void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
+{
+ struct rio_priv *priv = mport->priv;
+ /* Disable inbound message unit */
+ out_be32(&priv->msg_regs->imr, 0);
+
+ /* Free ring */
+ dma_free_coherent(NULL, priv->msg_rx_ring.size * RIO_MAX_MSG_SIZE,
+ priv->msg_rx_ring.virt, priv->msg_rx_ring.phys);
+
+ /* Free interrupt */
+ free_irq(IRQ_RIO_RX(mport), mport);
+}
+
+/**
+ * rio_hw_add_inb_buffer - Add buffer to the PowerPC inbound message queue
+ * @mport: Master port implementing the inbound message unit
+ * @mbox: Inbound mailbox number
+ * @buf: Buffer to add to inbound queue
+ *
+ * Adds the @buf buffer to the PowerPC inbound message queue. Returns
+ * %0 on success or %-EINVAL on failure.
+ */
+int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
+{
+ int rc = 0;
+ struct rio_priv *priv = mport->priv;
+
+ pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
+ priv->msg_rx_ring.rx_slot);
+
+ if (unlikely(priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot])) {
+ ERR("error adding inbound buffer %d, buffer exists\n",
+ priv->msg_rx_ring.rx_slot);
+ rc = -EINVAL;
+ goto out;
+ }
+
+ priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot] = buf;
+ if (++priv->msg_rx_ring.rx_slot == priv->msg_rx_ring.size)
+ priv->msg_rx_ring.rx_slot = 0;
+
+ out:
+ return rc;
+}
+
+EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer);
+
+/**
+ * rio_hw_get_inb_message - Fetch inbound message from the PowerPC message unit
+ * @mport: Master port implementing the inbound message unit
+ * @mbox: Inbound mailbox number
+ *
+ * Gets the next available inbound message from the inbound message queue.
+ * A pointer to the message is returned on success or NULL on failure.
+ */
+void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox)
+{
+ u32 phys_buf;
+ void *virt_buf = NULL;
+ void *buf = NULL;
+ int buf_idx;
+ struct rio_priv *priv = mport->priv;
+
+ phys_buf = in_be32(&priv->msg_regs->ifqdpar);
+
+ /* If no more messages, then bail out */
+ if (phys_buf == in_be32(&priv->msg_regs->ifqepar))
+ goto out2;
+
+ virt_buf = priv->msg_rx_ring.virt + (phys_buf - priv->msg_rx_ring.phys);
+ buf_idx = (phys_buf - priv->msg_rx_ring.phys) / RIO_MAX_MSG_SIZE;
+ buf = priv->msg_rx_ring.virt_buffer[buf_idx];
+
+ if (unlikely(!buf)) {
+ ERR("inbound message copy failed, no buffers\n");
+ goto out1;
+ }
+
+ /* Copy max message size, caller is expected to allocate that big */
+ memcpy(buf, virt_buf, RIO_MAX_MSG_SIZE);
+
+ /* Clear the available buffer */
+ priv->msg_rx_ring.virt_buffer[buf_idx] = NULL;
+
+ out1:
+ setbits32(&priv->msg_regs->imr, RIO_MSG_IMR_MI);
+
+ out2:
+ return buf;
+}
+
+EXPORT_SYMBOL_GPL(rio_hw_get_inb_message);
+
+/**
+ * fsl_rio_dbell_handler - PowerPC doorbell interrupt handler
+ * @irq: Linux interrupt number
+ * @dev_instance: Pointer to interrupt-specific data
+ *
+ * Handles doorbell interrupts. Parses a list of registered
+ * doorbell event handlers and executes a matching event handler.
+ */
+static irqreturn_t fsl_rio_dbell_handler(int irq, void *dev_instance)
+{
+ int dsr;
+ struct rio_mport *port = (struct rio_mport *)dev_instance;
+ struct rio_priv *priv = port->priv;
+
+ dsr = in_be32(&priv->msg_regs->dsr);
+
+ if (dsr & DOORBELL_DSR_TE) {
+ pr_info("RIO: doorbell reception error\n");
+ out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_TE);
+ goto out;
+ }
+
+ if (dsr & DOORBELL_DSR_QFI) {
+ pr_info("RIO: doorbell queue full\n");
+ out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_QFI);
+ goto out;
+ }
+
+ /* XXX Need to check/dispatch until queue empty */
+ if (dsr & DOORBELL_DSR_DIQI) {
+ u32 dmsg =
+ (u32) priv->dbell_ring.virt +
+ (in_be32(&priv->msg_regs->dqdpar) & 0xfff);
+ struct rio_dbell *dbell;
+ int found = 0;
+
+ pr_debug("RIO: processing doorbell, sid 0x%02x tid 0x%02x "
+ "info 0x%04x\n", DBELL_SID(dmsg),
+ DBELL_TID(dmsg), DBELL_INF(dmsg));
+
+ list_for_each_entry(dbell, &port->dbells, node) {
+ if ((dbell->res->start <= DBELL_INF(dmsg)) &&
+ (dbell->res->end >= DBELL_INF(dmsg))) {
+ found = 1;
+ break;
+ }
+ }
+ if (found) {
+ dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg),
+ DBELL_INF(dmsg));
+ } else {
+ pr_debug("RIO: spurious doorbell, sid 0x%02x "
+ "tid 0x%02x info %4.4x\n",
+ DBELL_SID(dmsg), DBELL_TID(dmsg),
+ DBELL_INF(dmsg));
+ }
+ setbits32(&priv->msg_regs->dmr, DOORBELL_DMR_DI);
+ out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_DIQI);
+ }
+
+ out:
+ return IRQ_HANDLED;
+}
+
+/**
+ * fsl_rio_doorbell_init - PowerPC doorbell interface init
+ * @mport: Master port implementing the inbound doorbell unit
+ *
+ * Initializes doorbell unit hardware and inbound DMA buffer
+ * ring. Called from fsl_rio_setup(). Returns %0 on success
+ * or %-ENOMEM on failure.
+ */
+static int fsl_rio_doorbell_init(struct rio_mport *mport, phys_addr_t dbaddr)
+{
+ int rc = 0;
+ struct rio_priv *priv = mport->priv;
+
+ /* Map outbound doorbell window immediately after maintenance window */
+ priv->dbell_win = ioremap(dbaddr, RIO_DBELL_WIN_SIZE);
+ if (!priv->dbell_win) {
+ ERR("unable to map outbound doorbell window\n");
+ rc = -ENOMEM;
+ goto out;
+ }
+
+ /* Initialize inbound doorbells */
+ priv->dbell_ring.virt = dma_alloc_coherent(NULL,
+ 512 * DOORBELL_MESSAGE_SIZE,
+ &priv->dbell_ring.phys,
+ GFP_KERNEL);
+ if (!priv->dbell_ring.virt) {
+ ERR("unable allocate inbound doorbell ring\n");
+ rc = -ENOMEM;
+ iounmap(priv->dbell_win);
+ goto out;
+ }
+
+ /* Point dequeue/enqueue pointers at first entry in ring */
+ out_be32(&priv->msg_regs->dqdpar, (u32) priv->dbell_ring.phys);
+ out_be32(&priv->msg_regs->dqepar, (u32) priv->dbell_ring.phys);
+
+ /* Clear interrupt status */
+ out_be32(&priv->msg_regs->dsr, 0x00000091);
+
+ /* Hook up doorbell handler */
+ rc = request_irq(IRQ_RIO_BELL(mport), fsl_rio_dbell_handler, 0,
+ "dbell_rx", mport);
+ if (rc < 0) {
+ iounmap(priv->dbell_win);
+ dma_free_coherent(NULL, 512 * DOORBELL_MESSAGE_SIZE,
+ priv->dbell_ring.virt, priv->dbell_ring.phys);
+ ERR("unable to request inbound doorbell irq");
+ goto out;
+ }
+
+ /* Configure doorbells for snooping, 512 entries, and enable */
+ out_be32(&priv->msg_regs->dmr, 0x00108161);
+
+ out:
+ return rc;
+}
+
+u32 rio_get_mport_id(struct rio_mport *mport)
+{
+ u32 mport_id = 0;
+
+ rio_local_read_config_32(mport, 0x60, &mport_id);
+ mport_id = mport->sys_size ? (mport_id & 0xffff) : ((mport_id >> 16) & 0xff);
+ return mport_id;
+
+}
+
+static char *cmdline = NULL;
+
+static int fsl_rio_get_hdid(int index)
+{
+ /* XXX Need to parse multiple entries in some format */
+ if (!cmdline)
+ return -1;
+
+ return simple_strtol(cmdline, NULL, 0);
+}
+
+static int fsl_rio_get_cmdline(char *s)
+{
+ if (!s)
+ return 0;
+
+ cmdline = s;
+ return 1;
+}
+
+__setup("riohdid=", fsl_rio_get_cmdline);
+
+static struct rio_mem_ops fsl_mem_ops = {
+ .map_inb = fsl_rio_map_inb_mem,
+ .map_outb = fsl_rio_map_outb_mem,
+ .unmap_inb = fsl_rio_unmap_inb_mem,
+ .unmap_outb = fsl_rio_unmap_outb_mem,
+};
+
+static inline void fsl_rio_info(u32 ccsr)
+{
+ if (ccsr & 1) {
+ /* Serial phy */
+ INFO("Hardware port width: ");
+ switch (ccsr >> 30) {
+ case 0:
+ printk("1\n");
+ break;
+ case 1:
+ printk("4\n");
+ break;
+ default:
+ printk("Unknown\n");
+ break;;
+ }
+
+ INFO("Training connection status: ");
+ switch ((ccsr >> 27) & 7) {
+ case 0:
+ printk("Single-lane 0\n");
+ break;
+ case 1:
+ printk("Single-lane 2\n");
+ break;
+ case 2:
+ printk("Four-lane 2\n");
+ break;
+ default:
+ printk("Unknown\n");
+ }
+ } else {
+ /* Parallel phy */
+ if (ccsr & 0x80000000)
+ INFO("Output port operating in 8-bit mode\n");
+ if (ccsr & 0x08000000)
+ INFO("Input port operating in 8-bit mode\n");
+ }
+
+}
+
+static inline u8 hw_port_width(u32 ccsr)
+{
+ u8 pw = ccsr >> 30;
+ switch (pw) {
+ case 0:
+ return 1;
+ case 1:
+ return 4;
+ default:
+ return 0;
+ }
+}
+
+static int of_cells_get(struct device_node *np, const char *str)
+{
+ struct device_node *tmp = NULL;
+ const int *var = NULL;
+
+ var = of_get_property(np, str, NULL);
+ tmp = of_get_parent(np);
+
+ while (!var && tmp) {
+ var = (int *)of_get_property(tmp, str, NULL);
+ of_node_put(tmp);
+ tmp = of_get_parent(np);
+ }
+
+ return (var ? *var : 0);
+}
+
+/**
+ * fsl_rio_setup - Setup PowerPC RapidIO interface
+ *
+ * Initializes PowerPC RapidIO hardware interface, configures
+ * master port with system-specific info, and registers the
+ * master port with the RapidIO subsystem.
+ */
+int fsl_rio_setup(struct of_device *dev)
+{
+ struct rio_ops *ops = NULL;
+ struct rio_mport *port = NULL;
+ const u32 *dt_range;
+ int rlen = 0;
+ resource_size_t law_start = 0, law_size = 0;
+ struct resource regs;
+ int rc;
+ enum rio_phy_type phy_type;
+ volatile void __iomem *regs_win = NULL;
+ struct rio_priv *priv = NULL;
+ u32 ccsr;
+ int paw, aw, psw;
+ struct device_node *pa;
+
+ if (!dev->node) {
+ ERR("Dev ofnode is NULL\n");
+ return -EFAULT;
+ }
+
+ dt_range = of_get_property(dev->node, "ranges", &rlen);
+ if (!dt_range) {
+ ERR("Can't get %s property 'ranges'\n", dev->node->full_name);
+ return -EFAULT;
+ }
+
+ aw = of_cells_get(dev->node, "#address-cells");
+ pa = of_get_parent(dev->node);
+ paw = of_cells_get(pa, "#address-cells");
+ psw = of_cells_get(pa, "#size-cells");
+ of_node_put(pa);
+
+ law_start = of_read_number(dt_range + aw, paw);
+ law_size = of_read_number(dt_range + aw + paw, psw);
+
+ rc = of_address_to_resource(dev->node, 0, ®s);
+ if (rc) {
+ ERR("Can't get %s property 'reg'\n", dev->node->full_name);
+ return -EFAULT;
+ }
+ INFO("Of-device full name %s\n", dev->node->full_name);
+ INFO("LAW start 0x%016llx, size 0x%016llx.\n", (u64)law_start,
+ (u64)law_size);
+ INFO("Regs start 0x%08x size 0x%08x\n", regs.start,
+ regs.end - regs.start + 1);
+
+ regs_win = ioremap(regs.start, regs.end - regs.start + 1);
+ if (!regs_win) {
+ ERR("Can't remap io for 'regs_win'\n");
+ rc = -ENOMEM;
+ goto err;
+ }
+
+ /* Probe the RapidIO phy type */
+ ccsr = in_be32(regs_win + RIO_CCSR);
+ if (ccsr & 1)
+ phy_type = RIO_PHY_SERIAL;
+ else
+ phy_type = RIO_PHY_PARALLEL;
+ INFO("Phy type: ");
+ switch (phy_type) {
+ case RIO_PHY_SERIAL:
+ printk("serial\n");
+ break;
+ case RIO_PHY_PARALLEL:
+ printk("parallel");
+ break;
+ default:
+ printk("Unknown type %d\n", phy_type);
+ rc = -EINVAL;
+ goto err;
+ };
+ fsl_rio_info(ccsr);
+
+
+ /* Checking the port training status */
+ if (in_be32((regs_win + RIO_ESCSR)) & 1) {
+ ERR("Port is not ready. Try to restart connection...\n");
+ switch (phy_type) {
+ case RIO_PHY_SERIAL:
+ /* Disable ports */
+ out_be32(regs_win + RIO_CCSR, 0);
+ /* Set 1x lane */
+ setbits32(regs_win + RIO_CCSR, 0x02000000);
+ /* Enable ports */
+ setbits32(regs_win + RIO_CCSR, 0x00600000);
+ break;
+ case RIO_PHY_PARALLEL:
+ /* Disable ports */
+ out_be32(regs_win + RIO_CCSR, 0x22000000);
+ /* Enable ports */
+ out_be32(regs_win + RIO_CCSR, 0x44000000);
+ break;
+ }
+ if (in_be32((regs_win + RIO_ESCSR)) & 1) {
+ ERR("Port restart failed.\n");
+ rc = -ENOLINK;
+ goto err;
+ }
+ INFO("Port restart success!");
+ ccsr = in_be32(regs_win + RIO_CCSR);
+ fsl_rio_info(ccsr);
+ }
+
+ ops = kzalloc(sizeof(struct rio_ops), GFP_KERNEL);
+ ops->lcread = fsl_local_config_read;
+ ops->lcwrite = fsl_local_config_write;
+ ops->cread = fsl_rio_config_read;
+ ops->cwrite = fsl_rio_config_write;
+ ops->dsend = fsl_rio_doorbell_send;
+
+ port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL);
+ if (!port) {
+ ERR("Can't alloc memory for 'port'\n");
+ rc = -ENOMEM;
+ goto err;
+ }
+ port->id = 0;
+ port->index = 0;
+
+ port->sys_size = (in_be32((regs_win + RIO_PEF_CAR))
+ & RIO_PEF_CTLS) >> 4;
+ INFO("RapidIO Common Transport System size: %d\n",
+ port->sys_size ? 65536 : 256);
+
+ port->phy_type = phy_type;
+
+ priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL);
+ if (!priv) {
+ ERR("Can't alloc memory for 'priv'\n");
+ rc = -ENOMEM;
+ goto err;
+ }
+ port->priv = priv;
+ priv->regs_win = regs_win;
+ INIT_LIST_HEAD(&port->dbells);
+ port->iores.start = law_start;
+ port->iores.end = law_start + law_size;
+ port->iores.flags = IORESOURCE_MEM;
+ port->iores.name = "rio_io_win";
+
+ priv->bellirq = irq_of_parse_and_map(dev->node, 2);
+ priv->txirq = irq_of_parse_and_map(dev->node, 3);
+ priv->rxirq = irq_of_parse_and_map(dev->node, 4);
+ INFO("bellirq: %d, txirq: %d, rxirq %d\n", priv->bellirq,
+ priv->txirq, priv->rxirq);
+
+ rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
+ rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0);
+ rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0);
+
+ strcpy(port->name, "RIO0 mport");
+
+ port->ops = ops;
+ port->mops = &fsl_mem_ops;
+ port->host_deviceid = fsl_rio_get_hdid(port->id);
+
+ rio_register_mport(port);
+
+ priv->atmu_regs = (struct rio_atmu_regs *)(regs_win +
+ RIO_ATMU_REGS_OFFSET);
+ priv->maint_atmu_regs = priv->atmu_regs + 1;
+ priv->dbell_atmu_regs = priv->atmu_regs + 2;
+ priv->msg_regs = (struct rio_msg_regs *)(regs_win +
+ ((port->phy_type == RIO_PHY_SERIAL)
+ ? RIO_S_MSG_REGS_OFFSET
+ : RIO_P_MSG_REGS_OFFSET));
+
+ /* Set to receive any dist ID for serial RapidIO controller. */
+ if (port->phy_type == RIO_PHY_SERIAL)
+ out_be32((regs_win + RIO_ISR_AACR), RIO_ISR_AACR_AA);
+
+ /* Configure maintenance transaction window */
+ if (!rio_request_io_region(port, NULL, law_start, RIO_MAINT_WIN_SIZE,
+ "maint_win", RIO_RESOURCE_MAINT, NULL)) {
+ rc = -EPERM;
+ ERR("request maint win error!\n");
+ goto err;
+ }
+ out_be32(&priv->maint_atmu_regs->rowbar,
+ (law_start >> 12) & 0xffffff);
+ out_be32(&priv->maint_atmu_regs->rowar, 0x80077000
+ | (__ilog2(RIO_MAINT_WIN_SIZE) - 1));
+
+ priv->maint_win = ioremap(law_start, RIO_MAINT_WIN_SIZE);
+
+ /* Configure outbound doorbell window */
+ if (!rio_request_io_region(port, NULL, law_start + RIO_MAINT_WIN_SIZE,
+ RIO_DBELL_WIN_SIZE,
+ "dbell_win", RIO_RESOURCE_DOORBELL, NULL)) {
+ rc = -EPERM;
+ ERR("request doorbell win error!\n");
+ goto err;
+ }
+ out_be32(&priv->dbell_atmu_regs->rowbar, ((law_start +
+ RIO_MAINT_WIN_SIZE) >> 12) & 0xfffff);
+ out_be32(&priv->dbell_atmu_regs->rowar, 0x80042000
+ | (__ilog2(RIO_DBELL_WIN_SIZE) - 1));
+ rc = fsl_rio_doorbell_init(port, law_start + RIO_MAINT_WIN_SIZE);
+ if (rc)
+ goto err;
+
+ return 0;
+
+err:
+ if (regs_win)
+ iounmap(regs_win);
+ if (ops)
+ kfree(ops);
+ if (port)
+ kfree(port);
+ if (priv)
+ kfree(priv);
+ return rc;
+}
diff --git a/arch/powerpc/sysdev/fsl_rio.h b/arch/powerpc/sysdev/fsl_rio.h
new file mode 100644
index 0000000..34231df
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_rio.h
@@ -0,0 +1,20 @@
+/*
+ * Freescale PowerPC RapidIO definitions
+ *
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ * Zhang Wei <wei.zhang@freescale.com>, Jun 2007
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __POWERPC_SYSDEV_FSL_RIO_H
+#define __POWERPC_SYSDEV_FSL_RIO_H
+
+#include <linux/init.h>
+
+extern int fsl_rio_setup(struct of_device *of_dev);
+
+#endif /* __POWERPC_SYSDEV_FSL_RIO_H */
--
1.5.1
^ permalink raw reply related
* [PATCH 0/5 v2] Porting RapidIO driver from ppc to powerpc architecture and adding memory mapped RapidIO driver.
From: Zhang Wei @ 2007-06-27 8:35 UTC (permalink / raw)
To: mporter; +Cc: linuxppc-dev, paulus, linux-kernel
Hi, Matt Porter,
These are the version 2 patches for RapidIO with dts update and some minor fixups.
These patches are used for supporting RapidIO controllers of Freescale. I ported them from ppc architecture to powerpc architecture and added some new features, such as memory mapped driver.
[PATCH 1/5] Add the explanation and sample of RapidIO DTS sector to the document of booting-without-of.txt file.
[PATCH 2/5] Add RapidIO sector to MPC8641HPCN board dts file.
[PATCH 3/5] Add the platform device support with RapidIO to MPC8641HPCN platform.
[PATCH 4/5] Add RapidIO support to powerpc architecture.
[PATCH 5/5] Add the memory management driver to RapidIO.
Please see below descriptions of these patches:
1. Add the RapidIO driver of-device support.
2. Add the RapidIO driver support to MPC8641HPCN board.
3. Port the RapidIO from ppc to powerpc architecture.
4. Add Memory mapped RapidIO driver.
5. Add the support to multi master ports.
6. Add a simple bitmap RapidIO space allocator driver.
7. Change the RapidIO system size of menuconfig to automatically detection.
Thanks!
Best Regards,
Zhang Wei
^ permalink raw reply
* [PATCH 3/5 v2] Add the platform device support with RapidIO to MPC8641HPCN platform.
From: Zhang Wei @ 2007-06-27 8:35 UTC (permalink / raw)
To: mporter; +Cc: linuxppc-dev, paulus, linux-kernel
In-Reply-To: <11829333481375-git-send-email-wei.zhang@freescale.com>
Add the platform device support with RapidIO to MPC8641HPCN platform.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
---
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 16 ++++++++++++++++
1 files changed, 16 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 7034bca..5518ed3 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -28,6 +28,8 @@
#include <mm/mmu_decl.h>
#include <asm/udbg.h>
#include <asm/i8259.h>
+#include <asm/of_device.h>
+#include <asm/of_platform.h>
#include <asm/mpic.h>
@@ -467,3 +469,17 @@ define_machine(mpc86xx_hpcn) {
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};
+
+
+static struct of_device_id mpc86xx_of_ids[] = {
+ { .type = "soc", },
+ { .compatible = "fsl,rapidio-delta", },
+ {},
+};
+
+static __init int mpc86xx_of_device_init(void)
+{
+ return of_platform_bus_probe(NULL, mpc86xx_of_ids, NULL);
+}
+
+device_initcall(mpc86xx_of_device_init);
--
1.5.1
^ permalink raw reply related
* [PATCH 5/5 v2] Add the memory management driver to RapidIO.
From: Zhang Wei @ 2007-06-27 8:35 UTC (permalink / raw)
To: mporter; +Cc: linuxppc-dev, paulus, linux-kernel
In-Reply-To: <1182933348309-git-send-email-wei.zhang@freescale.com>
This patch adds the memory management driver to RapidIO.
The RapidIO system size is changed to automatically detection.
Add the memory mapping driver to RapidIO basic driver.
Multi master ports are supported.
Add a simple Bitmap RapidIO space allocator driver.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
---
drivers/net/rionet.c | 17 +-
drivers/rapidio/Kconfig | 18 +-
drivers/rapidio/Makefile | 1 +
drivers/rapidio/rio-access.c | 10 +-
drivers/rapidio/rio-scan.c | 53 +++--
drivers/rapidio/rio-sysfs.c | 3 +-
drivers/rapidio/rio.c | 479 ++++++++++++++++++++++++++++++++++-
drivers/rapidio/rio.h | 9 +-
drivers/rapidio/sallocator/Kconfig | 9 +
drivers/rapidio/sallocator/Makefile | 12 +
drivers/rapidio/sallocator/bitmap.c | 384 ++++++++++++++++++++++++++++
include/linux/rio.h | 71 +++++-
include/linux/rio_drv.h | 41 +++-
13 files changed, 1048 insertions(+), 59 deletions(-)
create mode 100644 drivers/rapidio/sallocator/Kconfig
create mode 100644 drivers/rapidio/sallocator/Makefile
create mode 100644 drivers/rapidio/sallocator/bitmap.c
diff --git a/drivers/net/rionet.c b/drivers/net/rionet.c
index df6b738..8dcda4d 100644
--- a/drivers/net/rionet.c
+++ b/drivers/net/rionet.c
@@ -78,7 +78,7 @@ static int rionet_capable = 1;
* could be made into a hash table to save memory depending
* on system trade-offs.
*/
-static struct rio_dev *rionet_active[RIO_MAX_ROUTE_ENTRIES];
+static struct rio_dev **rionet_active;
#define is_rionet_capable(pef, src_ops, dst_ops) \
((pef & RIO_PEF_INB_MBOX) && \
@@ -115,6 +115,7 @@ static int rionet_rx_clean(struct net_device *ndev)
rnet->rx_skb[i]->data = data;
skb_put(rnet->rx_skb[i], RIO_MAX_MSG_SIZE);
+ rnet->rx_skb[i]->dev = ndev;
rnet->rx_skb[i]->protocol =
eth_type_trans(rnet->rx_skb[i], ndev);
error = netif_rx(rnet->rx_skb[i]);
@@ -202,7 +203,8 @@ static int rionet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
}
if (eth->h_dest[0] & 0x01) {
- for (i = 0; i < RIO_MAX_ROUTE_ENTRIES; i++)
+ for (i = 0; i < RIO_MAX_ROUTE_ENTRIES(rnet->mport->sys_size);
+ i++)
if (rionet_active[i])
rionet_queue_tx_msg(skb, ndev,
rionet_active[i]);
@@ -392,6 +394,8 @@ static void rionet_remove(struct rio_dev *rdev)
struct net_device *ndev = NULL;
struct rionet_peer *peer, *tmp;
+ free_pages((unsigned long)rionet_active, rdev->net->hport->sys_size ?
+ __ilog2(sizeof(void *)) + 4 : 0);
unregister_netdev(ndev);
kfree(ndev);
@@ -449,6 +453,15 @@ static int rionet_setup_netdev(struct rio_mport *mport)
goto out;
}
+ if (!(rionet_active = (struct rio_dev **)__get_free_pages(GFP_KERNEL,
+ mport->sys_size ? __ilog2(sizeof(void *)) + 4
+ : 0))) {
+ rc = -ENOMEM;
+ goto out;
+ }
+ memset((void *)rionet_active, 0, sizeof(void *) *
+ RIO_MAX_ROUTE_ENTRIES(mport->sys_size));
+
/* Set up private area */
rnet = (struct rionet_private *)ndev->priv;
rnet->mport = mport;
diff --git a/drivers/rapidio/Kconfig b/drivers/rapidio/Kconfig
index 4142115..f669108 100644
--- a/drivers/rapidio/Kconfig
+++ b/drivers/rapidio/Kconfig
@@ -1,14 +1,6 @@
#
# RapidIO configuration
#
-config RAPIDIO_8_BIT_TRANSPORT
- bool "8-bit transport addressing"
- depends on RAPIDIO
- ---help---
- By default, the kernel assumes a 16-bit addressed RapidIO
- network. By selecting this option, the kernel will support
- an 8-bit addressed network.
-
config RAPIDIO_DISC_TIMEOUT
int "Discovery timeout duration (seconds)"
depends on RAPIDIO
@@ -16,3 +8,13 @@ config RAPIDIO_DISC_TIMEOUT
---help---
Amount of time a discovery node waits for a host to complete
enumeration before giving up.
+
+config RAPIDIO_PROC_FS
+ bool "I/O and Memory resource debug"
+ depends on RAPIDIO && PROC_FS
+ default y
+ ---help---
+ Enable this option, it will create a /proc/riores node for
+ monitoring the RapidIO I/O and Memory resource.
+
+source "drivers/rapidio/sallocator/Kconfig"
diff --git a/drivers/rapidio/Makefile b/drivers/rapidio/Makefile
index 7c0e181..e5b2f11 100644
--- a/drivers/rapidio/Makefile
+++ b/drivers/rapidio/Makefile
@@ -4,3 +4,4 @@
obj-y += rio.o rio-access.o rio-driver.o rio-scan.o rio-sysfs.o
obj-$(CONFIG_RAPIDIO) += switches/
+obj-$(CONFIG_RAPIDIO) += sallocator/
diff --git a/drivers/rapidio/rio-access.c b/drivers/rapidio/rio-access.c
index 8b56bbd..a3824ba 100644
--- a/drivers/rapidio/rio-access.c
+++ b/drivers/rapidio/rio-access.c
@@ -48,7 +48,7 @@ int __rio_local_read_config_##size \
u32 data = 0; \
if (RIO_##size##_BAD) return RIO_BAD_SIZE; \
spin_lock_irqsave(&rio_config_lock, flags); \
- res = mport->ops->lcread(mport->id, offset, len, &data); \
+ res = mport->ops->lcread(mport, mport->id, offset, len, &data); \
*value = (type)data; \
spin_unlock_irqrestore(&rio_config_lock, flags); \
return res; \
@@ -71,7 +71,7 @@ int __rio_local_write_config_##size \
unsigned long flags; \
if (RIO_##size##_BAD) return RIO_BAD_SIZE; \
spin_lock_irqsave(&rio_config_lock, flags); \
- res = mport->ops->lcwrite(mport->id, offset, len, value); \
+ res = mport->ops->lcwrite(mport, mport->id, offset, len, value);\
spin_unlock_irqrestore(&rio_config_lock, flags); \
return res; \
}
@@ -108,7 +108,7 @@ int rio_mport_read_config_##size \
u32 data = 0; \
if (RIO_##size##_BAD) return RIO_BAD_SIZE; \
spin_lock_irqsave(&rio_config_lock, flags); \
- res = mport->ops->cread(mport->id, destid, hopcount, offset, len, &data); \
+ res = mport->ops->cread(mport, mport->id, destid, hopcount, offset, len, &data); \
*value = (type)data; \
spin_unlock_irqrestore(&rio_config_lock, flags); \
return res; \
@@ -131,7 +131,7 @@ int rio_mport_write_config_##size \
unsigned long flags; \
if (RIO_##size##_BAD) return RIO_BAD_SIZE; \
spin_lock_irqsave(&rio_config_lock, flags); \
- res = mport->ops->cwrite(mport->id, destid, hopcount, offset, len, value); \
+ res = mport->ops->cwrite(mport, mport->id, destid, hopcount, offset, len, value); \
spin_unlock_irqrestore(&rio_config_lock, flags); \
return res; \
}
@@ -166,7 +166,7 @@ int rio_mport_send_doorbell(struct rio_mport *mport, u16 destid, u16 data)
unsigned long flags;
spin_lock_irqsave(&rio_doorbell_lock, flags);
- res = mport->ops->dsend(mport->id, destid, data);
+ res = mport->ops->dsend(mport, mport->id, destid, data);
spin_unlock_irqrestore(&rio_doorbell_lock, flags);
return res;
diff --git a/drivers/rapidio/rio-scan.c b/drivers/rapidio/rio-scan.c
index f935c1f..1484a38 100644
--- a/drivers/rapidio/rio-scan.c
+++ b/drivers/rapidio/rio-scan.c
@@ -73,7 +73,7 @@ static u16 rio_get_device_id(struct rio_mport *port, u16 destid, u8 hopcount)
rio_mport_read_config_32(port, destid, hopcount, RIO_DID_CSR, &result);
- return RIO_GET_DID(result);
+ return RIO_GET_DID(port->sys_size, result);
}
/**
@@ -88,7 +88,7 @@ static u16 rio_get_device_id(struct rio_mport *port, u16 destid, u8 hopcount)
static void rio_set_device_id(struct rio_mport *port, u16 destid, u8 hopcount, u16 did)
{
rio_mport_write_config_32(port, destid, hopcount, RIO_DID_CSR,
- RIO_SET_DID(did));
+ RIO_SET_DID(port->sys_size, did));
}
/**
@@ -100,7 +100,8 @@ static void rio_set_device_id(struct rio_mport *port, u16 destid, u8 hopcount, u
*/
static void rio_local_set_device_id(struct rio_mport *port, u16 did)
{
- rio_local_write_config_32(port, RIO_DID_CSR, RIO_SET_DID(did));
+ rio_local_write_config_32(port, RIO_DID_CSR, RIO_SET_DID(port->sys_size,
+ did));
}
/**
@@ -351,8 +352,17 @@ static struct rio_dev *rio_setup_device(struct rio_net *net,
rswitch->switchid = next_switchid;
rswitch->hopcount = hopcount;
rswitch->destid = destid;
+ if (!(rswitch->route_table = kzalloc(sizeof(u16)*
+ RIO_MAX_ROUTE_ENTRIES(port->sys_size),
+ GFP_KERNEL))) {
+ kfree(rdev);
+ rdev = NULL;
+ kfree(rswitch);
+ goto out;
+ }
/* Initialize switch route table */
- for (rdid = 0; rdid < RIO_MAX_ROUTE_ENTRIES; rdid++)
+ for (rdid = 0; rdid < RIO_MAX_ROUTE_ENTRIES(port->sys_size);
+ rdid++)
rswitch->route_table[rdid] = RIO_INVALID_ROUTE;
rdev->rswitch = rswitch;
sprintf(rio_name(rdev), "%02x:s:%04x", rdev->net->id,
@@ -481,7 +491,7 @@ static u16 rio_get_host_deviceid_lock(struct rio_mport *port, u8 hopcount)
{
u32 result;
- rio_mport_read_config_32(port, RIO_ANY_DESTID, hopcount,
+ rio_mport_read_config_32(port, RIO_ANY_DESTID(port->sys_size), hopcount,
RIO_HOST_DID_LOCK_CSR, &result);
return (u16) (result & 0xffff);
@@ -572,14 +582,16 @@ static int rio_enum_peer(struct rio_net *net, struct rio_mport *port,
}
/* Attempt to acquire device lock */
- rio_mport_write_config_32(port, RIO_ANY_DESTID, hopcount,
+ rio_mport_write_config_32(port, RIO_ANY_DESTID(port->sys_size),
+ hopcount,
RIO_HOST_DID_LOCK_CSR, port->host_deviceid);
while ((tmp = rio_get_host_deviceid_lock(port, hopcount))
< port->host_deviceid) {
/* Delay a bit */
mdelay(1);
/* Attempt to acquire device lock again */
- rio_mport_write_config_32(port, RIO_ANY_DESTID, hopcount,
+ rio_mport_write_config_32(port, RIO_ANY_DESTID(port->sys_size),
+ hopcount,
RIO_HOST_DID_LOCK_CSR,
port->host_deviceid);
}
@@ -591,7 +603,8 @@ static int rio_enum_peer(struct rio_net *net, struct rio_mport *port,
}
/* Setup new RIO device */
- if ((rdev = rio_setup_device(net, port, RIO_ANY_DESTID, hopcount, 1))) {
+ if ((rdev = rio_setup_device(net, port, RIO_ANY_DESTID(port->sys_size),
+ hopcount, 1))) {
/* Add device to the global and bus/net specific list. */
list_add_tail(&rdev->net_list, &net->devices);
} else
@@ -599,7 +612,8 @@ static int rio_enum_peer(struct rio_net *net, struct rio_mport *port,
if (rio_is_switch(rdev)) {
next_switchid++;
- sw_inport = rio_get_swpinfo_inport(port, RIO_ANY_DESTID, hopcount);
+ sw_inport = rio_get_swpinfo_inport(port,
+ RIO_ANY_DESTID(port->sys_size), hopcount);
rio_route_add_entry(port, rdev->rswitch, RIO_GLOBAL_TABLE,
port->host_deviceid, sw_inport);
rdev->rswitch->route_table[port->host_deviceid] = sw_inport;
@@ -613,7 +627,8 @@ static int rio_enum_peer(struct rio_net *net, struct rio_mport *port,
}
num_ports =
- rio_get_swpinfo_tports(port, RIO_ANY_DESTID, hopcount);
+ rio_get_swpinfo_tports(port, RIO_ANY_DESTID(port->sys_size),
+ hopcount);
pr_debug(
"RIO: found %s (vid %4.4x did %4.4x) with %d ports\n",
rio_name(rdev), rdev->vid, rdev->did, num_ports);
@@ -625,13 +640,15 @@ static int rio_enum_peer(struct rio_net *net, struct rio_mport *port,
cur_destid = next_destid;
if (rio_sport_is_active
- (port, RIO_ANY_DESTID, hopcount, port_num)) {
+ (port, RIO_ANY_DESTID(port->sys_size), hopcount,
+ port_num)) {
pr_debug(
"RIO: scanning device on port %d\n",
port_num);
rio_route_add_entry(port, rdev->rswitch,
RIO_GLOBAL_TABLE,
- RIO_ANY_DESTID, port_num);
+ RIO_ANY_DESTID(port->sys_size),
+ port_num);
if (rio_enum_peer(net, port, hopcount + 1) < 0)
return -1;
@@ -736,7 +753,8 @@ rio_disc_peer(struct rio_net *net, struct rio_mport *port, u16 destid,
pr_debug(
"RIO: scanning device on port %d\n",
port_num);
- for (ndestid = 0; ndestid < RIO_ANY_DESTID;
+ for (ndestid = 0;
+ ndestid < RIO_ANY_DESTID(port->sys_size);
ndestid++) {
rio_route_get_entry(port, rdev->rswitch,
RIO_GLOBAL_TABLE,
@@ -797,7 +815,7 @@ static int rio_mport_is_active(struct rio_mport *port)
* network list of associated master ports. Returns a
* RIO network pointer on success or %NULL on failure.
*/
-static struct rio_net __devinit *rio_alloc_net(struct rio_mport *port)
+static struct rio_net *rio_alloc_net(struct rio_mport *port)
{
struct rio_net *net;
@@ -919,7 +937,9 @@ static void rio_build_route_tables(void)
list_for_each_entry(rdev, &rio_devices, global_list)
if (rio_is_switch(rdev))
- for (i = 0; i < RIO_MAX_ROUTE_ENTRIES; i++) {
+ for (i = 0;
+ i < RIO_MAX_ROUTE_ENTRIES(rdev->net->hport->sys_size);
+ i++) {
if (rio_route_get_entry
(rdev->net->hport, rdev->rswitch, RIO_GLOBAL_TABLE,
i, &sport) < 0)
@@ -983,7 +1003,8 @@ int rio_disc_mport(struct rio_mport *mport)
del_timer_sync(&rio_enum_timer);
pr_debug("done\n");
- if (rio_disc_peer(net, mport, RIO_ANY_DESTID, 0) < 0) {
+ if (rio_disc_peer(net, mport, RIO_ANY_DESTID(mport->sys_size),
+ 0) < 0) {
printk(KERN_INFO
"RIO: master port %d device has failed discovery\n",
mport->id);
diff --git a/drivers/rapidio/rio-sysfs.c b/drivers/rapidio/rio-sysfs.c
index eed9143..691c1be 100644
--- a/drivers/rapidio/rio-sysfs.c
+++ b/drivers/rapidio/rio-sysfs.c
@@ -43,7 +43,8 @@ static ssize_t routes_show(struct device *dev, struct device_attribute *attr, ch
if (!rdev->rswitch)
goto out;
- for (i = 0; i < RIO_MAX_ROUTE_ENTRIES; i++) {
+ for (i = 0; i < RIO_MAX_ROUTE_ENTRIES(rdev->net->hport->sys_size);
+ i++) {
if (rdev->rswitch->route_table[i] == RIO_INVALID_ROUTE)
continue;
str +=
diff --git a/drivers/rapidio/rio.c b/drivers/rapidio/rio.c
index f644807..5248774 100644
--- a/drivers/rapidio/rio.c
+++ b/drivers/rapidio/rio.c
@@ -23,10 +23,22 @@
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/slab.h>
+#include <linux/seq_file.h>
+#include <linux/fs.h>
+#include <linux/proc_fs.h>
+#include <linux/dma-mapping.h>
+#include <linux/hardirq.h>
#include "rio.h"
+#define ERR(fmt, arg...) \
+ printk(KERN_ERR "%s:%s: " fmt, __FILE__, __FUNCTION__, ## arg)
+
static LIST_HEAD(rio_mports);
+static LIST_HEAD(rio_inb_mems);
+static LIST_HEAD(rio_outb_mems);
+
+static DEFINE_SPINLOCK(rio_config_lock);
/**
* rio_local_get_device_id - Get the base/extended device id for a port
@@ -42,7 +54,7 @@ u16 rio_local_get_device_id(struct rio_mport *port)
rio_local_read_config_32(port, RIO_DID_CSR, &result);
- return (RIO_GET_DID(result));
+ return (RIO_GET_DID(port->sys_size, result));
}
/**
@@ -332,6 +344,350 @@ int rio_release_outb_dbell(struct rio_dev *rdev, struct resource *res)
}
/**
+ * rio_request_io_region -- request resource in RapidIO IO region
+ * @mport: Master port
+ * @devid: Device specific pointer to pass
+ * @start: IO resource start address
+ * @size: IO resource size
+ * @name: Resource name
+ * @flag: Flag for resource
+ * @res: Return resource which has been allocated. If res == NULL,
+ * the function will alloc the memory for return resource.
+ *
+ * Return: The resource which has been allocated.
+ */
+struct resource *rio_request_io_region(struct rio_mport *mport, void *devid,
+ resource_size_t start, resource_size_t size,
+ const char *name, unsigned long flags,
+ struct resource *res)
+{
+ if (!res && !(res = kmalloc(sizeof(struct resource), GFP_KERNEL))) {
+ ERR("No free memory for res alloc!\n");
+ goto err;
+ }
+ memset(res, 0, sizeof(struct resource));
+ size = (size < 0x1000) ? 0x1000 : 1 << (__ilog2(size - 1) + 1);
+
+ /* if start == 0 then auto locate the start address */
+ if (!start) {
+ if (allocate_resource(&mport->iores, res, size,
+ mport->iores.start, mport->iores.end,
+ size, NULL, NULL) < 0) {
+ ERR("allocte resource error!\n");
+ goto err;
+ }
+ res->name = name;
+ res->flags = flags;
+ } else {
+ rio_init_io_res(res, start, start + size - 1, name, flags);
+ if (request_resource(&mport->iores, res) < 0) {
+ ERR("Can't get SRIO IO resource!\n");
+ goto err;
+ }
+ }
+ return res;
+
+err:
+ if (res)
+ kfree(res);
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(rio_request_io_region);
+
+/**
+ * rio_map_inb_region -- Mapping inbound memory region.
+ * @mport: Master port.
+ * @mem: Memory struction for mapping.
+ * @rflags: Flags for mapping.
+ *
+ * Return: 0 -- Success.
+ *
+ * This function will create the mapping from the mem->riores to mem->iores.
+ */
+int rio_map_inb_region(struct rio_mport *mport, struct rio_mem *mem, u32 rflags)
+{
+ int rc = 0;
+ unsigned long flags;
+
+ if (!mport->mops)
+ return -1;
+ spin_lock_irqsave(&rio_config_lock, flags);
+ rc = mport->mops->map_inb(mport, mem->iores.start, mem->riores.start, mem->size, rflags);
+ spin_unlock_irqrestore(&rio_config_lock, flags);
+ return rc;
+}
+
+/**
+ * rio_map_outb_region -- Mapping outbound memory region.
+ * @mport: Master port.
+ * @tid: Target RapidIO device id.
+ * @mem: Memory struction for mapping.
+ * @rflags: Flags for mapping.
+ *
+ * Return: 0 -- Success.
+ *
+ * This function will create the mapping from the mem->iores to mem->riores.
+ */
+int rio_map_outb_region(struct rio_mport *mport, u16 tid,
+ struct rio_mem *mem, u32 rflags)
+{
+ int rc = 0;
+ unsigned long flags;
+
+ if (!mport->mops)
+ return -1;
+ spin_lock_irqsave(&rio_config_lock, flags);
+ rc = mport->mops->map_outb(mport, mem->iores.start, mem->riores.start, mem->size, tid, rflags);
+ spin_unlock_irqrestore(&rio_config_lock, flags);
+ return rc;
+}
+
+/**
+ * rio_unmap_inb_region -- Unmap the inbound memory region
+ * @mport: Master port
+ * @mem: Memory struction for unmapping.
+ */
+void rio_unmap_inb_region(struct rio_mport *mport, struct rio_mem *mem)
+{
+ unsigned long flags;
+ if (!mport->mops)
+ return;
+ spin_lock_irqsave(&rio_config_lock, flags);
+ mport->mops->unmap_inb(mport, mem->iores.start);
+ spin_unlock_irqrestore(&rio_config_lock, flags);
+}
+
+/**
+ * rio_unmap_outb_region -- Unmap the outbound memory region
+ * @mport: Master port
+ * @mem: Memory struction for unmapping.
+ */
+void rio_unmap_outb_region(struct rio_mport *mport, struct rio_mem *mem)
+{
+ unsigned long flags;
+ if (!mport->mops)
+ return;
+ spin_lock_irqsave(&rio_config_lock, flags);
+ mport->mops->unmap_outb(mport, mem->iores.start);
+ spin_unlock_irqrestore(&rio_config_lock, flags);
+}
+
+/**
+ * rio_release_inb_region -- Release the inbound region resource.
+ * @mport: Master port
+ * @mem: Inbound region descriptor
+ *
+ * Return 0 is successed.
+ */
+int rio_release_inb_region(struct rio_mport *mport, struct rio_mem *mem)
+{
+ int rc = 0;
+ if (!mem)
+ return rc;
+ rio_unmap_inb_region(mport, mem);
+ if (mem->virt)
+ dma_free_coherent(NULL, mem->size, mem->virt, mem->iores.start);
+
+ if (mem->iores.parent)
+ rc = release_resource(&mem->iores);
+ if (mem->riores.parent && !rc)
+ rc = release_resource(&mem->riores);
+
+ if (mem->node.prev)
+ list_del(&mem->node);
+
+ kfree(mem);
+
+ return rc;
+}
+
+/**
+ * rio_request_inb_region -- Request inbound memory region
+ * @mport: Master port
+ * @dev_id: Device specific pointer to pass
+ * @size: The request memory windows size
+ * @name: The region name
+ * @owner: The region owner driver id
+ *
+ * Retrun: The rio_mem struction for inbound memory descriptor.
+ *
+ * This function is used for request RapidIO space inbound region. If the size
+ * less than 4096 or not aligned to 2^N, it will be adjusted. The function will
+ * alloc a block of local DMA memory of the size for inbound region target and
+ * request a RapidIO region for inbound region source. Then the inbound region
+ * will be claimed in RapidIO space and the local DMA memory will be added to
+ * local inbound memory list. The rio_mem with the inbound relationship will
+ * be returned.
+ */
+struct rio_mem *rio_request_inb_region(struct rio_mport *mport, void *dev_id,
+ resource_size_t size, const char *name, u32 owner)
+{
+ struct rio_mem *rmem = NULL;
+ int ret;
+
+ rmem = kzalloc(sizeof(struct rio_mem), GFP_KERNEL);
+ if (!rmem)
+ goto err;
+
+ /* Align the size to 2^N */
+ size = (size < 0x1000) ? 0x1000 : 1 << (__ilog2(size - 1) + 1);
+
+ /* Alloc the RapidIO space */
+ ret = rio_space_request(mport, size, &rmem->riores);
+ if (ret) {
+ printk(KERN_ERR "RIO space request error! ret = %d\n", ret);
+ goto err;
+ }
+
+ rmem->riores.name = name;
+ rmem->size = rmem->riores.end - rmem->riores.start + 1;
+
+ /* Initialize inbound memory */
+ if (!(rmem->virt = dma_alloc_coherent(NULL, rmem->size,
+ &rmem->iores.start, GFP_KERNEL))) {
+ ERR("Inbound memory alloc error\n");
+ goto err;
+ }
+ rmem->iores.end = rmem->iores.start + rmem->size - 1;
+ rmem->owner = owner;
+
+ /* Map RIO space to local DMA memory */
+ if ((ret = rio_map_inb_region(mport, rmem, 0))) {
+ printk(KERN_ERR "RIO map inbound mem error, ret = %d\n", ret);
+ goto err;
+ }
+
+ /* Claim the region */
+ if ((ret = rio_space_claim(rmem))) {
+ printk(KERN_ERR "RIO inbound mem claim error, ret = %d\n", ret);
+ goto err;
+ }
+ list_add(&rmem->node, &rio_inb_mems);
+
+ return rmem;
+
+err:
+ rio_release_inb_region(mport, rmem);
+ return NULL;
+}
+
+/**
+ * rio_release_outb_region -- Release the outbound region resource.
+ * @mport: Master port
+ * @mem: Outbound region descriptor
+ *
+ * Return 0 is successed.
+ */
+int rio_release_outb_region(struct rio_mport *mport, struct rio_mem *mem)
+{
+ int rc = 0;
+ if (!mem)
+ return rc;
+ rio_unmap_outb_region(mport, mem);
+ rio_space_release(mem);
+ if (mem->virt)
+ iounmap(mem->virt);
+
+ if (mem->iores.parent)
+ rc = release_resource(&mem->iores);
+ if (mem->riores.parent && !rc)
+ rc = release_resource(&mem->riores);
+
+ if (mem->node.prev)
+ list_del(&mem->node);
+
+ kfree(mem);
+
+ return rc;
+}
+
+/** rio_prepare_io_mem -- Prepare IO region for RapidIO outbound mapping
+ * @mport: Master port
+ * @dev: RIO device specific pointer to pass
+ * @size: Request IO size
+ * @name: The request IO resource name
+ *
+ * Return: The rio_mem descriptor with IO region resource.
+ *
+ * This function request IO region firstly and ioremap it for preparing
+ * outbound window mapping. The function do not map the outbound region
+ * because ioremap can not located at the interrupt action function.
+ * The function can be called in the initialization for just prepared.
+ */
+struct rio_mem *rio_prepare_io_mem(struct rio_mport *mport,
+ struct rio_dev *dev, resource_size_t size, const char *name)
+{
+ struct rio_mem *rmem = NULL;
+
+ rmem = kzalloc(sizeof(struct rio_mem), GFP_KERNEL);
+ if (!rmem)
+ goto err;
+
+ /* Align the size to 2^N */
+ size = (size < 0x1000) ? 0x1000 : 1 << (__ilog2(size - 1) + 1);
+
+ /* Request RapidIO IO region */
+ if (!(rio_request_io_region(mport, dev, 0, size,
+ name, RIO_RESOURCE_MEM, &rmem->iores))) {
+ ERR("RIO io region request error!\n");
+ goto err;
+ }
+
+ rmem->virt = ioremap((phys_addr_t)(rmem->iores.start), size);
+ rmem->size = size;
+
+ list_add(&rmem->node, &rio_outb_mems);
+ return rmem;
+err:
+ rio_release_outb_region(mport, rmem);
+ return NULL;
+}
+
+/** rio_request_outb_region -- Request IO region and get outbound region
+ * for RapidIO outbound mapping
+ * @mport: Master port
+ * @dev_id: RIO device specific pointer to pass
+ * @size: Request IO size
+ * @name: The request IO resource name
+ * @owner: The outbound region owned driver
+ *
+ * Return: The rio_mem descriptor with IO region resource.
+ *
+ * This function request IO region firstly and ioremap it for preparing
+ * outbound window mapping. And it will find the RapidIO region owned by
+ * the driver id. Then map it. Be careful about that the ioremap can not
+ * be called in the interrupt event action function.
+ */
+struct rio_mem *rio_request_outb_region(struct rio_mport *mport, void *dev_id,
+ resource_size_t size, const char *name, u32 owner)
+{
+ struct rio_mem *rmem = NULL;
+ struct rio_dev *dev = dev_id;
+
+ if (!dev)
+ goto err;
+
+ rmem = rio_prepare_io_mem(mport, dev, size, name);
+ if (!rmem)
+ goto err;
+
+ if (rio_space_find_mem(mport, dev->destid, owner, &rmem->riores)) {
+ ERR("Can not find RIO region meet the ownerid %x\n", owner);
+ goto err;
+ }
+
+ /* Map the rio space to local */
+ if (rio_map_outb_region(mport, dev->destid, rmem, 0)) {
+ ERR("RIO map outb error!\n");
+ goto err;
+ }
+ return rmem;
+err:
+ rio_release_outb_region(mport, rmem);
+ return NULL;
+}
+
+/**
* rio_mport_get_feature - query for devices' extended features
* @port: Master port to issue transaction
* @local: Indicate a local master port or remote device access
@@ -476,8 +832,8 @@ int rio_init_mports(void)
port->iores.end - port->iores.start,
port->name)) {
printk(KERN_ERR
- "RIO: Error requesting master port region %8.8lx-%8.8lx\n",
- port->iores.start, port->iores.end - 1);
+ "RIO: Error requesting master port region %016llx-%016llx\n",
+ (u64)port->iores.start, (u64)port->iores.end - 1);
rc = -ENOMEM;
goto out;
}
@@ -486,6 +842,7 @@ int rio_init_mports(void)
rio_enum_mport(port);
else
rio_disc_mport(port);
+ rio_space_init(port);
}
out:
@@ -508,3 +865,119 @@ EXPORT_SYMBOL_GPL(rio_request_inb_mbox);
EXPORT_SYMBOL_GPL(rio_release_inb_mbox);
EXPORT_SYMBOL_GPL(rio_request_outb_mbox);
EXPORT_SYMBOL_GPL(rio_release_outb_mbox);
+
+#ifdef CONFIG_RAPIDIO_PROC_FS
+enum { MAX_IORES_LEVEL = 5 };
+
+struct riors {
+ struct rio_mport *mp;
+ int res;
+ struct resource *p;
+} riomres;
+
+static void *r_next(struct seq_file *m, void *v, loff_t *pos)
+{
+ struct resource *p = v;
+ struct riors *rs = m->private;
+
+ (*pos)++;
+ if (p->child)
+ return p->child;
+ while (!p->sibling && p->parent)
+ p = p->parent;
+ if (p->sibling)
+ return p->sibling;
+ else {
+ rs->res++;
+ if(rs->res >= RIO_MAX_MPORT_RESOURCES) {
+ rs->mp = list_entry(rs->mp->node.next, struct rio_mport, node);
+ rs->res = 0;
+ if (&rs->mp->node == &rio_mports)
+ return NULL;
+ }
+ seq_printf(m, "%2d: ", rs->res);
+ rs->p = &rs->mp->riores[rs->res];
+ p = rs->p;
+
+ return p;
+ }
+}
+
+static void *r_start(struct seq_file *m, loff_t *pos)
+{
+ struct riors *rs = m->private;
+ struct resource *p;
+
+ if (*pos) {
+ *pos = 0;
+ return NULL;
+ }
+
+ rs->mp = list_entry(rio_mports.next, struct rio_mport, node);
+ rs->res = -1;
+ rs->p = &rs->mp->iores;
+ p = rs->p;
+
+ seq_printf(m, "IO: ");
+
+ return p;
+}
+
+static void r_stop(struct seq_file *m, void *v)
+{
+}
+
+static int r_show(struct seq_file *m, void *v)
+{
+ struct riors *rs = m->private;
+ struct resource *root = rs->p;
+ struct resource *r = v, *p;
+ int width = root->end < 0x10000 ? 4 : 8;
+ int depth;
+
+ for (depth = 0, p = r; p->parent && depth < MAX_IORES_LEVEL; depth++, p = p->parent)
+ if (p == root)
+ break;
+ seq_printf(m, "%*s%0*llx-%0*llx : %s\n",
+ depth * 2, "",
+ width, (unsigned long long) r->start,
+ width, (unsigned long long) r->end,
+ r->name ? r->name : "<BAD>");
+ return 0;
+}
+
+static const struct seq_operations resource_op = {
+ .start = r_start,
+ .next = r_next,
+ .stop = r_stop,
+ .show = r_show,
+};
+
+static int riores_open(struct inode *inode, struct file *file)
+{
+ int res = seq_open(file, &resource_op);
+ if (!res) {
+ struct seq_file *m = file->private_data;
+ m->private = &riomres;
+ }
+ return res;
+}
+
+static const struct file_operations proc_riores_operations = {
+ .open = riores_open,
+ .read = seq_read,
+ .llseek = seq_lseek,
+ .release = seq_release,
+};
+
+static int __init rioresources_init(void)
+{
+ struct proc_dir_entry *entry;
+
+ entry = create_proc_entry("riores", 0, NULL);
+ if (entry)
+ entry->proc_fops = &proc_riores_operations;
+ return 0;
+}
+__initcall(rioresources_init);
+#endif
diff --git a/drivers/rapidio/rio.h b/drivers/rapidio/rio.h
index b242cee..7a3b62e 100644
--- a/drivers/rapidio/rio.h
+++ b/drivers/rapidio/rio.h
@@ -51,10 +51,5 @@ extern struct rio_route_ops __end_rio_route_ops[];
DECLARE_RIO_ROUTE_SECTION(.rio_route_ops, \
vid, did, add_hook, get_hook)
-#ifdef CONFIG_RAPIDIO_8_BIT_TRANSPORT
-#define RIO_GET_DID(x) ((x & 0x00ff0000) >> 16)
-#define RIO_SET_DID(x) ((x & 0x000000ff) << 16)
-#else
-#define RIO_GET_DID(x) (x & 0xffff)
-#define RIO_SET_DID(x) (x & 0xffff)
-#endif
+#define RIO_GET_DID(size, x) (size ? (x & 0xffff) : ((x & 0x00ff0000) >> 16))
+#define RIO_SET_DID(size, x) (size ? (x & 0xffff) : ((x & 0x000000ff) << 16))
diff --git a/drivers/rapidio/sallocator/Kconfig b/drivers/rapidio/sallocator/Kconfig
new file mode 100644
index 0000000..a33a1b8
--- /dev/null
+++ b/drivers/rapidio/sallocator/Kconfig
@@ -0,0 +1,9 @@
+choice
+ prompt "Default RapidIO Space Allocator"
+ depends on RAPIDIO
+ default RIO_SA_DEFAULT_BITMAP
+
+ config RIO_SA_DEFAULT_BITMAP
+ bool "Bitmap"
+
+endchoice
diff --git a/drivers/rapidio/sallocator/Makefile b/drivers/rapidio/sallocator/Makefile
new file mode 100644
index 0000000..437201c
--- /dev/null
+++ b/drivers/rapidio/sallocator/Makefile
@@ -0,0 +1,12 @@
+#
+# Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+#
+# Author: Zhang Wei, wei.zhang@freescale.com, Jun 2007
+#
+# This is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+#
+
+obj-$(CONFIG_RIO_SA_DEFAULT_BITMAP) += bitmap.o
diff --git a/drivers/rapidio/sallocator/bitmap.c b/drivers/rapidio/sallocator/bitmap.c
new file mode 100644
index 0000000..fab8734
--- /dev/null
+++ b/drivers/rapidio/sallocator/bitmap.c
@@ -0,0 +1,384 @@
+/*
+ * RapidIO space allocator bitmap arithmetic.
+ *
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ * Zhang Wei <wei.zhang@freescale.com>, Jun 2007
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * The Bitmap allocator make the whole RapidIO device have the same fixed
+ * inbound memory window. And on the top of each device inbound window,
+ * there is a sect0 area, which will use for recording the individual
+ * driver owned memory space in device.
+ */
+
+#include <linux/types.h>
+#include <linux/kernel.h>
+
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/rio.h>
+#include <linux/rio_drv.h>
+#include <linux/rio_ids.h>
+#include <linux/rio_regs.h>
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/slab.h>
+#include <linux/seq_file.h>
+#include <linux/fs.h>
+#include <linux/proc_fs.h>
+#include <linux/dma-mapping.h>
+
+#include "../rio.h"
+
+#undef DEBUG
+
+#define RIO_SBLOCK_SIZE 4096
+
+#define ERR(fmt, arg...) \
+ printk(KERN_ERR "ERROR %s - %s: " fmt, __FILE__, __FUNCTION__, ## arg)
+#ifdef DEBUG
+#define DBG(fmt...) printk(fmt)
+#else
+#define DBG(fmt...) do {} while (0)
+#endif
+
+#define IS_64BIT_RES ((sizeof(resource_size_t) == 8) ? 1 : 0)
+#define SA_BITMAP_DRV_ID 0x4249544d
+#define SA_RIO_RESERVE_SPACE 0x4000000
+
+/* Definition for struct rio_res:ctrl */
+#define SA_RIO_RES_CTRL_EN 0x80000000
+struct rio_res {
+ u32 ctrl; /* Control words
+ * Bit 31: Enable bit.
+ */
+ u32 addr; /* The start addr bits [0-31] of RapidIO window */
+ u32 extaddr; /* The start addr bits [32-63] of RapidIO window */
+ u32 size; /* The size bits [0-31] of RapidIO window */
+ u32 extsize; /* The size bits [32-63] of RapidIO window */
+ u32 owner; /* The owner driver id */
+ u32 rev[2]; /* For align 32 bytes */
+};
+
+#define SA_BITMAP_MAX_INB_RES 32
+struct rio_sect0 {
+ u32 id; /* ID for Bitmap space allocater driver */
+ u32 rioid; /* RapidIO device id */
+ u32 width; /* The resource width for RIO space, 32 or 64 */
+ u8 rev1[56]; /* Align to 64 bytes */
+ struct rio_res inb_res[SA_BITMAP_MAX_INB_RES];
+ u8 rev2[4096 - 64 - SA_BITMAP_MAX_INB_RES * 32];
+ /* Fill for 4096 bytes */
+};
+
+/* if select 64bit resource, we can use 34-bit rio address, otherwise 32-bit */
+static int rio_addr_size;
+static struct resource *root;
+static struct rio_mem sect0mem; /* Sect 0 memory data */
+static struct rio_sect0 *sect0 = NULL;
+static struct rio_mem *sblock_buf = NULL;
+
+/**
+ * get_rio_addr_size -- get the RapidIO space address size.
+ *
+ * If it's a 64-bit system, the RapidIO space address size could be 34bit,
+ * otherwise, it should be 32 bit.
+ */
+static inline int get_rio_addr_size(void)
+{
+ return (sizeof(resource_size_t) == 8) ? 34 : 32;
+}
+
+/**
+ * rio_space_request -- request RapidIO space.
+ * @mport: RIO master port.
+ * @size: The request space size, must >= 4096.
+ * @new: The resource which required.
+ *
+ * Return:
+ * 0 -- Success
+ * -EINVAL -- size is wrong (<4096)
+ * -EFAULT -- new is NULL
+ * others -- return from allocate_resource()
+ *
+ * This function request a memory from RapidIO space.
+ */
+int rio_space_request(struct rio_mport *mport, resource_size_t size,
+ struct resource *new)
+{
+ int ret = 0;
+
+ /* Align the size to 2^N */
+ size = (size < 0x1000) ? 0x1000 : 1 << (__ilog2(size - 1) + 1);
+
+ if (!new) {
+ ERR("The res is NULL!\n");
+ ret = -EFAULT;
+ goto out;
+ }
+ memset(new, 0, sizeof(struct resource));
+
+ ret = allocate_resource(root, new, size, root->start, root->end,
+ size, NULL, 0);
+ if (ret) {
+ ERR("No more resource for size 0x%08x!\n", size);
+ goto out;
+ }
+
+out:
+ return ret;
+}
+
+#ifdef DEBUG
+/**
+ * rio_sa_dump_sect0 -- Dump the sect0 content.
+ * @psect0: The point of sect0
+ */
+static void rio_sa_dump_sect0(struct rio_sect0 *psect0)
+{
+ int i;
+
+ if (!psect0)
+ return;
+
+ printk("Rio Sect0 %p dump:\n", psect0);
+ printk("...id = 0x%08x, width = %d, rioid = %d \n",
+ psect0->id, psect0->width, psect0->rioid);
+ for (i = 0; i < SA_BITMAP_MAX_INB_RES; i++)
+ if (psect0->inb_res[i].ctrl & SA_RIO_RES_CTRL_EN)
+ printk("...inb_res[%d]: ctrl 0x%08x, owner 0x%08x\n"
+ "\t\textaddr 0x%08x, addr 0x%08x\n"
+ "\t\textsize 0x%08x, size 0x%08x\n", i,
+ psect0->inb_res[i].ctrl,
+ psect0->inb_res[i].owner,
+ psect0->inb_res[i].extaddr,
+ psect0->inb_res[i].addr,
+ psect0->inb_res[i].extsize,
+ psect0->inb_res[i].size);
+}
+#endif
+
+/**
+ * rio_space_claim -- Claim the memory in RapidIO space
+ * @mem: The memory should be claimed.
+ *
+ * When you get a memory space and get ready of it, you should claim it in
+ * RapidIO space. Then, the other device could get the memory by calling
+ * rio_space_find_mem().
+ */
+int rio_space_claim(struct rio_mem *mem)
+{
+ int i;
+
+ if (!sect0) {
+ ERR("Sect0 is NULL!\n");
+ return -EINVAL;
+ }
+#ifdef DEBUG
+ rio_sa_dump_sect0(sect0);
+#endif
+
+ for (i = 0; i < SA_BITMAP_MAX_INB_RES; i++)
+ if (!(sect0->inb_res[i].ctrl & SA_RIO_RES_CTRL_EN)) {
+ sect0->inb_res[i].ctrl |= SA_RIO_RES_CTRL_EN;
+ sect0->inb_res[i].addr = (u32)(mem->riores.start);
+ sect0->inb_res[i].size = (u32)(mem->riores.end
+ - mem->riores.start + 1);
+ if (IS_64BIT_RES) {
+ sect0->inb_res[i].extaddr =
+ (u64)mem->riores.start >> 32;
+ sect0->inb_res[i].extsize =
+ (u64)(mem->riores.end
+ - mem->riores.start + 1) >> 32;
+ }
+ sect0->inb_res[i].owner = mem->owner;
+ DBG("The new inbound rio mem added:\n");
+ DBG("...inb_res[%d]: ctrl 0x%08x, owner 0x%08x\n"
+ "\t\textaddr 0x%08x, addr 0x%08x\n"
+ "\t\textsize 0x%08x, size 0x%08x\n", i,
+ sect0->inb_res[i].ctrl,
+ sect0->inb_res[i].owner,
+ sect0->inb_res[i].extaddr,
+ sect0->inb_res[i].addr,
+ sect0->inb_res[i].extsize,
+ sect0->inb_res[i].size);
+ return 0;
+ }
+
+ ERR("No free inbound window!\n");
+ return -EBUSY;
+}
+
+/**
+ * rio_space_release -- remove the memory record from RapidIO space.
+ * It's the pair function of rio_space_claim().
+ *
+ * @inbmem: The memory should be release.
+ */
+void rio_space_release(struct rio_mem *inbmem)
+{
+ int i;
+
+ /* Remove it from sect0 inb_res array */
+ for (i = 0; i < SA_BITMAP_MAX_INB_RES; i++)
+ if ((sect0->inb_res[i].ctrl & SA_RIO_RES_CTRL_EN) &&
+ (((u64)sect0->inb_res[i].extaddr << 32 |
+ sect0->inb_res[i].addr)
+ == (u64)inbmem->riores.start)) {
+ sect0->inb_res[i].ctrl = 0;
+ sect0->inb_res[i].addr = 0;
+ sect0->inb_res[i].extaddr = 0;
+ sect0->inb_res[i].size = 0;
+ sect0->inb_res[i].extsize = 0;
+ }
+}
+
+/**
+ * rio_space_get_dev_mem -- get the whole owned inbound space of
+ * RapidIO device with did.
+ */
+static struct resource *rio_space_get_dev_mem(struct rio_mport *mport,
+ u16 did, struct resource *res)
+{
+ if(!res && !(res = kmalloc(sizeof(struct resource), GFP_KERNEL))) {
+ ERR("resource alloc error!\n");
+ return NULL;
+ }
+ memset(res, 0, sizeof(struct resource));
+
+ res->start = SA_RIO_RESERVE_SPACE + (did
+ << (rio_addr_size - __ilog2(RIO_ANY_DESTID(mport->sys_size)
+ + 1)));
+ res->end = res->start +
+ (1 << (rio_addr_size - __ilog2(RIO_ANY_DESTID(mport->sys_size)
+ + 1))) - 1;
+ res->flags = RIO_RESOURCE_MEM;
+
+ return res;
+}
+
+/**
+ * rio_space_find_mem -- Find the memory space (RIO) of the rio driver owned.
+ * @mport: RIO master port.
+ * @tid: The target RapidIO device id which will be searched.
+ * @owner: The driver id as the search keyword.
+ * @res: The result of finding.
+ *
+ * return:
+ * 0 -- Success
+ * -EFAULT -- Remote sect0 is a bad address
+ * -EPROTONOSUPPORT -- The remote space allocator protocol is not support
+ *
+ * This function will find the memory located in RapidIO space, which is owned
+ * by the driver. If the remote RapidIO device use the diffrent space allocator,
+ * it will return -EPROTONOSUPPORT.
+ */
+int rio_space_find_mem(struct rio_mport *mport, u16 tid,
+ u32 owner, struct resource *res)
+{
+ volatile struct rio_sect0 __iomem *rsect0;
+ int i;
+ int ret = 0;
+ u32 width;
+
+ rio_space_get_dev_mem(mport, tid, &sblock_buf->riores);
+ sblock_buf->size = RIO_SBLOCK_SIZE;
+ rio_map_outb_region(mport, tid, sblock_buf, 0);
+
+ if (!sblock_buf->virt) {
+ ERR("Sect0 block buffer is NULL!\n");
+ ret = -EFAULT;
+ goto out;
+ }
+ rsect0 = sblock_buf->virt;
+
+ if (in_be32(&rsect0->id) != SA_BITMAP_DRV_ID) {
+ DBG("The target RapidIO space allocator is not rio_sa_bitmap! "
+ "id = 0x%x\n", rsect0->id);
+ ret = -EPROTONOSUPPORT;
+ goto out;
+ }
+
+#ifdef DEBUG
+ /* Dump remote sect0 for debug */
+ DBG("Dump the remote RIO dev %d sect0\n", tid);
+ rio_sa_dump_sect0(rsect0);
+#endif
+
+ width = in_be32(&rsect0->width);
+ if (sizeof(resource_size_t) * 8 < width)
+ printk(KERN_WARNING "WARNING: The system width %d is smaller "
+ "than the remote RapidIO space address width %d!",
+ sizeof(resource_size_t) * 8, width);
+
+ /* Find the rio space block */
+ for (i = 0; i < SA_BITMAP_MAX_INB_RES; i++)
+ if ((in_be32(&rsect0->inb_res[i].ctrl) & SA_RIO_RES_CTRL_EN)
+ && (in_be32(&rsect0->inb_res[i].owner) == owner )) {
+ if (!res) {
+ ERR("Resource NULL error!\n");
+ ret = -EFAULT;
+ goto out;
+ }
+ memset(res, 0, sizeof(struct resource));
+ res->start = (IS_64BIT_RES && (width > 32)) ?
+ in_be32(&rsect0->inb_res[i].extaddr) << 32 : 0
+ | rsect0->inb_res[i].addr;
+ res->end = res->start - 1 +
+ ((in_be32(&rsect0->inb_res[i].size)) |
+ ((IS_64BIT_RES && (width > 32)) ?
+ ((u64)(in_be32(&rsect0->inb_res[i].extsize))
+ << 32) : 0));
+ goto out;
+ }
+
+out:
+ rio_unmap_outb_region(mport, sblock_buf);
+ return ret;
+}
+
+/**
+ * rio_space_init -- RapidIO space allocator initialization function.
+ * @mport: The master port.
+ */
+int rio_space_init(struct rio_mport *mport)
+{
+ root = &mport->riores[RIO_INB_MEM_RESOURCE];
+ memset(root, 0, sizeof(struct resource));
+
+ rio_addr_size = get_rio_addr_size();
+
+ rio_space_get_dev_mem(mport, rio_get_mport_id(mport), root);
+ root->name = "rio_space_inb";
+
+ /* Alloc the sect 0 for space managerment */
+ memset(§0mem, 0, sizeof(struct rio_mem));
+ if(!(sect0mem.virt = dma_alloc_coherent(NULL, RIO_SBLOCK_SIZE,
+ §0mem.iores.start, GFP_KERNEL))) {
+ ERR("sect0 memory alloc error!\n");
+ return -ENOMEM;
+ }
+ sect0mem.iores.end = sect0mem.iores.start + RIO_SBLOCK_SIZE - 1;
+ sect0mem.size = RIO_SBLOCK_SIZE;
+
+ if(rio_space_request(mport, RIO_SBLOCK_SIZE, §0mem.riores))
+ return -ENOMEM;
+
+ sect0mem.riores.name = "sect 0";
+ sect0 = sect0mem.virt;
+ sect0->id = SA_BITMAP_DRV_ID;
+ sect0->rioid = rio_get_mport_id(mport);
+ sect0->width = rio_addr_size;
+
+ /* map outbond window to access rio inb */
+ rio_map_inb_region(mport, §0mem, 0);
+
+ /* Init sblock buffer for block seeking */
+ sblock_buf = rio_prepare_io_mem(mport, NULL, RIO_SBLOCK_SIZE,
+ "sblock_buf");
+ return 0;
+}
diff --git a/include/linux/rio.h b/include/linux/rio.h
index 68e3f68..d39d381 100644
--- a/include/linux/rio.h
+++ b/include/linux/rio.h
@@ -23,7 +23,6 @@
#include <linux/device.h>
#include <linux/rio_regs.h>
-#define RIO_ANY_DESTID 0xff
#define RIO_NO_HOPCOUNT -1
#define RIO_INVALID_DESTID 0xffff
@@ -39,11 +38,8 @@
entry is invalid (no route
exists for the device ID) */
-#ifdef CONFIG_RAPIDIO_8_BIT_TRANSPORT
-#define RIO_MAX_ROUTE_ENTRIES (1 << 8)
-#else
-#define RIO_MAX_ROUTE_ENTRIES (1 << 16)
-#endif
+#define RIO_MAX_ROUTE_ENTRIES(size) (size ? (1 << 16) : (1 << 8))
+#define RIO_ANY_DESTID(size) (size ? 0xffff : 0xff)
#define RIO_MAX_MBOX 4
#define RIO_MAX_MSG_SIZE 0x1000
@@ -69,6 +65,8 @@
#define RIO_DOORBELL_RESOURCE 0
#define RIO_INB_MBOX_RESOURCE 1
#define RIO_OUTB_MBOX_RESOURCE 2
+#define RIO_INB_MEM_RESOURCE 3
+#define RIO_OUTB_MEM_RESOURCE 4
extern struct bus_type rio_bus_type;
extern struct list_head rio_devices; /* list of all devices */
@@ -149,6 +147,11 @@ struct rio_dbell {
void *dev_id;
};
+enum rio_phy_type {
+ RIO_PHY_PARALLEL,
+ RIO_PHY_SERIAL,
+};
+
/**
* struct rio_mport - RIO master port info
* @dbells: List of doorbell events
@@ -174,9 +177,16 @@ struct rio_mport {
struct rio_msg outb_msg[RIO_MAX_MBOX];
int host_deviceid; /* Host device ID */
struct rio_ops *ops; /* maintenance transaction functions */
+ struct rio_mem_ops *mops; /* Memory functions */
unsigned char id; /* port ID, unique among all ports */
unsigned char index; /* port index, unique among all port
interfaces of the same type */
+ unsigned int sys_size; /* RapidIO common transport system size.
+ * 0 - Small size. 256 devices.
+ * 1 - Large size, 65536 devices.
+ */
+ enum rio_phy_type phy_type; /* RapidIO phy type */
+ void *priv; /* Master port private data */
unsigned char name[40];
};
@@ -211,7 +221,7 @@ struct rio_switch {
u16 switchid;
u16 hopcount;
u16 destid;
- u8 route_table[RIO_MAX_ROUTE_ENTRIES];
+ u16 *route_table;
int (*add_entry) (struct rio_mport * mport, u16 destid, u8 hopcount,
u16 table, u16 route_destid, u8 route_port);
int (*get_entry) (struct rio_mport * mport, u16 destid, u8 hopcount,
@@ -229,18 +239,19 @@ struct rio_switch {
* @dsend: Callback to send a doorbell message.
*/
struct rio_ops {
- int (*lcread) (int index, u32 offset, int len, u32 * data);
- int (*lcwrite) (int index, u32 offset, int len, u32 data);
- int (*cread) (int index, u16 destid, u8 hopcount, u32 offset, int len,
+ int (*lcread) (struct rio_mport *, int index, u32 offset, int len, u32 * data);
+ int (*lcwrite) (struct rio_mport *, int index, u32 offset, int len, u32 data);
+ int (*cread) (struct rio_mport *, int index, u16 destid, u8 hopcount, u32 offset, int len,
u32 * data);
- int (*cwrite) (int index, u16 destid, u8 hopcount, u32 offset, int len,
+ int (*cwrite) (struct rio_mport *, int index, u16 destid, u8 hopcount, u32 offset, int len,
u32 data);
- int (*dsend) (int index, u16 destid, u16 data);
+ int (*dsend) (struct rio_mport *, int index, u16 destid, u16 data);
};
#define RIO_RESOURCE_MEM 0x00000100
#define RIO_RESOURCE_DOORBELL 0x00000200
#define RIO_RESOURCE_MAILBOX 0x00000400
+#define RIO_RESOURCE_MAINT 0x00000800
#define RIO_RESOURCE_CACHEABLE 0x00010000
#define RIO_RESOURCE_PCI 0x00020000
@@ -309,6 +320,42 @@ struct rio_route_ops {
u16 table, u16 route_destid, u8 * route_port);
};
+/**
+ * Struct for RIO memory definition.
+ * @node: Node in list of memories
+ * @virt: The virtual address for mapped memory accessing.
+ * @owner: The owner id of this memory.
+ * @size: The size of memory space, it should same to iores and riores.
+ * @iores: The resource of local IO region for mapping.
+ * @riores: The resource of mapped RapidIO space region.
+ */
+struct rio_mem {
+ struct list_head node;
+ void *virt;
+ u32 owner;
+ resource_size_t size;
+ struct resource iores;
+ struct resource riores;
+};
+
+/**
+ * Struct for RIO memory definition.
+ * @map_inb: The function for mapping inbound memory window.
+ * @map_outb: The function for mapping outbound memory window.
+ * @unmap_inb: The function for unmapping inbound memory window.
+ * @unmap_outb: The function for unmapping outbound memory window.
+ */
+struct rio_mem_ops {
+ int (*map_inb) (struct rio_mport *, resource_size_t lstart,
+ resource_size_t rstart,
+ resource_size_t size, u32 flags);
+ int (*map_outb) (struct rio_mport *, resource_size_t lstart,
+ resource_size_t rstart,
+ resource_size_t size, u16 tid, u32 flags);
+ void (*unmap_inb) (struct rio_mport *, resource_size_t lstart);
+ void (*unmap_outb) (struct rio_mport *, resource_size_t lstart);
+};
+
/* Architecture and hardware-specific functions */
extern int rio_init_mports(void);
extern void rio_register_mport(struct rio_mport *);
diff --git a/include/linux/rio_drv.h b/include/linux/rio_drv.h
index 7adb2a1..70f778b 100644
--- a/include/linux/rio_drv.h
+++ b/include/linux/rio_drv.h
@@ -334,6 +334,16 @@ static inline void rio_init_dbell_res(struct resource *res, u16 start, u16 end)
res->flags = RIO_RESOURCE_DOORBELL;
}
+static inline void rio_init_io_res(struct resource *res, resource_size_t start,
+ resource_size_t end, const char *name, unsigned long flag)
+{
+ memset(res, 0, sizeof(struct resource));
+ res->start = start;
+ res->end = end;
+ res->name = name;
+ res->flags = flag;
+}
+
/**
* RIO_DEVICE - macro used to describe a specific RIO device
* @dev: the 16 bit RIO device ID
@@ -408,13 +418,33 @@ extern int rio_request_inb_dbell(struct rio_mport *, void *, u16, u16,
extern int rio_release_inb_dbell(struct rio_mport *, u16, u16);
extern struct resource *rio_request_outb_dbell(struct rio_dev *, u16, u16);
extern int rio_release_outb_dbell(struct rio_dev *, struct resource *);
+extern struct resource *rio_request_io_region(struct rio_mport *, void *,
+ u32, u32, const char *, unsigned long,
+ struct resource *);
+extern struct rio_mem *rio_prepare_io_mem(struct rio_mport *, struct rio_dev *,
+ resource_size_t, const char *);
/* Memory region management */
-int rio_claim_resource(struct rio_dev *, int);
-int rio_request_regions(struct rio_dev *, char *);
-void rio_release_regions(struct rio_dev *);
-int rio_request_region(struct rio_dev *, int, char *);
-void rio_release_region(struct rio_dev *, int);
+extern struct rio_mem *rio_request_inb_region(struct rio_mport *, void *,
+ resource_size_t, const char *, u32);
+extern struct rio_mem *rio_request_outb_region(struct rio_mport *,
+ void *, resource_size_t, const char *, u32);
+extern int rio_release_inb_region(struct rio_mport *, struct rio_mem *);
+extern int rio_release_outb_region(struct rio_mport *, struct rio_mem *);
+
+/* Memory low-level mapping functions */
+extern int rio_map_inb_region(struct rio_mport *, struct rio_mem *, u32);
+extern int rio_map_outb_region(struct rio_mport *, u16, struct rio_mem *, u32);
+extern void rio_unmap_inb_region(struct rio_mport *, struct rio_mem *);
+extern void rio_unmap_outb_region(struct rio_mport *, struct rio_mem *);
+
+/* Memory Allocator */
+extern int rio_space_request(struct rio_mport *, resource_size_t,
+ struct resource *);
+extern int rio_space_find_mem(struct rio_mport *, u16, u32, struct resource *);
+extern int rio_space_init(struct rio_mport *);
+extern int rio_space_claim(struct rio_mem *);
+extern void rio_space_release(struct rio_mem *);
/* LDM support */
int rio_register_driver(struct rio_driver *);
@@ -464,6 +494,7 @@ extern u16 rio_local_get_device_id(struct rio_mport *port);
extern struct rio_dev *rio_get_device(u16 vid, u16 did, struct rio_dev *from);
extern struct rio_dev *rio_get_asm(u16 vid, u16 did, u16 asm_vid, u16 asm_did,
struct rio_dev *from);
+extern u32 rio_get_mport_id(struct rio_mport *);
#endif /* __KERNEL__ */
#endif /* LINUX_RIO_DRV_H */
--
1.5.1
^ permalink raw reply related
* USB for MPC82xx
From: David @ 2007-06-27 8:49 UTC (permalink / raw)
To: linuxppc-embedded
Hi,
I know this is a quite old issue but I'm getting quite crazy with it and
I hope that someone can help me.
The plot is that I'm trying to use USB on an MPC8272. I already know
that there is a 2.6.x driver that solves this, but the main issue is
that we are using a 2.4.31 kernel. So we have
I have read a lot about a 2.4 driver that Pantelis Antoniou wrote, but I
haven't been able to find it.
Does anybody know where I could find a driver?
The other option is to backport the 2.6 driver to 2.4, but I will try
not to think on that by the moment.
Regards,
David
^ permalink raw reply
* Re: powerpc stacktrace and lockdep support
From: Johannes Berg @ 2007-06-26 22:47 UTC (permalink / raw)
To: Christoph Hellwig; +Cc: linuxppc-dev
In-Reply-To: <20070108135458.GA23395@lst.de>
On Mon, 2007-01-08 at 14:54 +0100, Christoph Hellwig wrote:
> I recently tried to work on lockdep for powerpc. I have preliminary
> version of the stacktrace code
That seems to work.
> , but had to give up on trace irqflags
> support because I'm not that knowledgeable on lowlevel ppc details.
I gave it a try. Actually what I had wanted to do was add lockdep
support for things like
function A:
lock()
flush_scheduled_work()
unlock()
function B: (work function that is scheduled)
...
lock()
...
unlock()
...
which can obviously deadlock but isn't caught by any debugging
mechanisms right now.
So anyway, lockdep doesn't work here since I only own powerpc machines,
hence I tried to make it work. Below is the patch, it's quite ugly and
only works on 64-bit right now, it'll probably totally screw up on
32-bit (though hopefully it only makes lockdep complain and stop itself
on 32-bit).
I currently get a lockdep report in XFS with this code. Not sure if
there's a bug in this code or if it actually complains rightfully, the
self-tests all pass...
---
arch/powerpc/Kconfig | 8 +++++
arch/powerpc/kernel/Makefile | 1
arch/powerpc/kernel/entry_64.S | 23 ++++++++++++++++
arch/powerpc/kernel/head_64.S | 55 ++++++++++++++++++++++++++++++++--------
arch/powerpc/kernel/irq.c | 2 -
arch/powerpc/kernel/irqtrace.S | 42 ++++++++++++++++++++++++++++++
arch/powerpc/kernel/ppc_ksyms.c | 2 -
arch/powerpc/kernel/setup_64.c | 6 ++++
include/asm-powerpc/hw_irq.h | 34 +++++++++++++-----------
include/asm-powerpc/irqflags.h | 11 ++++----
include/asm-powerpc/rwsem.h | 34 ++++++++++++++++++------
include/asm-powerpc/spinlock.h | 1
12 files changed, 177 insertions(+), 42 deletions(-)
--- linux-2.6-git.orig/arch/powerpc/Kconfig 2007-06-26 18:12:10.424850274 +0200
+++ linux-2.6-git/arch/powerpc/Kconfig 2007-06-26 20:01:50.544814034 +0200
@@ -38,6 +38,14 @@ config STACKTRACE_SUPPORT
bool
default y
+config TRACE_IRQFLAGS_SUPPORT
+ bool
+ default y
+
+config LOCKDEP_SUPPORT
+ bool
+ default y
+
config RWSEM_GENERIC_SPINLOCK
bool
--- linux-2.6-git.orig/arch/powerpc/kernel/irq.c 2007-06-26 18:12:10.491850274 +0200
+++ linux-2.6-git/arch/powerpc/kernel/irq.c 2007-06-26 18:12:11.376850274 +0200
@@ -114,7 +114,7 @@ static inline void set_soft_enabled(unsi
: : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
}
-void local_irq_restore(unsigned long en)
+void raw_local_irq_restore(unsigned long en)
{
/*
* get_paca()->soft_enabled = en;
--- linux-2.6-git.orig/arch/powerpc/kernel/ppc_ksyms.c 2007-06-26 18:12:10.513850274 +0200
+++ linux-2.6-git/arch/powerpc/kernel/ppc_ksyms.c 2007-06-26 18:12:11.377850274 +0200
@@ -50,7 +50,7 @@
#endif
#ifdef CONFIG_PPC64
-EXPORT_SYMBOL(local_irq_restore);
+EXPORT_SYMBOL(raw_local_irq_restore);
#endif
#ifdef CONFIG_PPC32
--- linux-2.6-git.orig/include/asm-powerpc/hw_irq.h 2007-06-26 18:12:10.618850274 +0200
+++ linux-2.6-git/include/asm-powerpc/hw_irq.h 2007-06-26 18:12:11.443850274 +0200
@@ -27,7 +27,7 @@ static inline unsigned long local_get_fl
return flags;
}
-static inline unsigned long local_irq_disable(void)
+static inline unsigned long raw_local_irq_disable(void)
{
unsigned long flags, zero;
@@ -39,14 +39,15 @@ static inline unsigned long local_irq_di
return flags;
}
-extern void local_irq_restore(unsigned long);
+extern void raw_local_irq_restore(unsigned long);
extern void iseries_handle_interrupts(void);
-#define local_irq_enable() local_irq_restore(1)
-#define local_save_flags(flags) ((flags) = local_get_flags())
-#define local_irq_save(flags) ((flags) = local_irq_disable())
+#define raw_local_irq_enable() raw_local_irq_restore(1)
+#define raw_local_save_flags(flags) ((flags) = local_get_flags())
+#define raw_local_irq_save(flags) ((flags) = raw_local_irq_disable())
-#define irqs_disabled() (local_get_flags() == 0)
+#define raw_irqs_disabled() (local_get_flags() == 0)
+#define raw_irqs_disabled_flags(flags) ((flags) == 0)
#define __hard_irq_enable() __mtmsrd(mfmsr() | MSR_EE, 1)
#define __hard_irq_disable() __mtmsrd(mfmsr() & ~MSR_EE, 1)
@@ -62,13 +63,13 @@ extern void iseries_handle_interrupts(vo
#if defined(CONFIG_BOOKE)
#define SET_MSR_EE(x) mtmsr(x)
-#define local_irq_restore(flags) __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory")
+#define raw_local_irq_restore(flags) __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory")
#else
#define SET_MSR_EE(x) mtmsr(x)
-#define local_irq_restore(flags) mtmsr(flags)
+#define raw_local_irq_restore(flags) mtmsr(flags)
#endif
-static inline void local_irq_disable(void)
+static inline void raw_local_irq_disable(void)
{
#ifdef CONFIG_BOOKE
__asm__ __volatile__("wrteei 0": : :"memory");
@@ -80,7 +81,7 @@ static inline void local_irq_disable(voi
#endif
}
-static inline void local_irq_enable(void)
+static inline void raw_local_irq_enable(void)
{
#ifdef CONFIG_BOOKE
__asm__ __volatile__("wrteei 1": : :"memory");
@@ -92,7 +93,7 @@ static inline void local_irq_enable(void
#endif
}
-static inline void local_irq_save_ptr(unsigned long *flags)
+static inline void raw_local_irq_save_ptr(unsigned long *flags)
{
unsigned long msr;
msr = mfmsr();
@@ -105,12 +106,13 @@ static inline void local_irq_save_ptr(un
__asm__ __volatile__("": : :"memory");
}
-#define local_save_flags(flags) ((flags) = mfmsr())
-#define local_irq_save(flags) local_irq_save_ptr(&flags)
-#define irqs_disabled() ((mfmsr() & MSR_EE) == 0)
+#define raw_local_save_flags(flags) ((flags) = mfmsr())
+#define raw_local_irq_save(flags) raw_local_irq_save_ptr(&flags)
+#define raw_irqs_disabled() ((mfmsr() & MSR_EE) == 0)
+#define raw_irqs_disabled_flags(flags) (((flags) & MSR_EE) == 0)
-#define hard_irq_enable() local_irq_enable()
-#define hard_irq_disable() local_irq_disable()
+#define hard_irq_enable() raw_local_irq_enable()
+#define hard_irq_disable() raw_local_irq_disable()
#endif /* CONFIG_PPC64 */
--- linux-2.6-git.orig/include/asm-powerpc/irqflags.h 2007-06-26 18:12:10.669850274 +0200
+++ linux-2.6-git/include/asm-powerpc/irqflags.h 2007-06-27 00:35:50.806820710 +0200
@@ -10,19 +10,20 @@
#ifndef _ASM_IRQFLAGS_H
#define _ASM_IRQFLAGS_H
+#ifndef __ASSEMBLY__
/*
* Get definitions for raw_local_save_flags(x), etc.
*/
#include <asm-powerpc/hw_irq.h>
+#endif
/*
- * Do the CPU's IRQ-state tracing from assembly code. We call a
- * C function, so save all the C-clobbered registers:
+ * Do the CPU's IRQ-state tracing from assembly code. Also
+ * note the code in arch/powerpc/kernel/irqtrace.S.
*/
#ifdef CONFIG_TRACE_IRQFLAGS
-
-#error No support on PowerPC yet for CONFIG_TRACE_IRQFLAGS
-
+# define TRACE_IRQS_ON bl .powerpc_trace_irqs_on
+# define TRACE_IRQS_OFF bl .powerpc_trace_irqs_off
#else
# define TRACE_IRQS_ON
# define TRACE_IRQS_OFF
--- linux-2.6-git.orig/include/asm-powerpc/rwsem.h 2007-06-26 18:12:10.747850274 +0200
+++ linux-2.6-git/include/asm-powerpc/rwsem.h 2007-06-27 00:13:57.397341965 +0200
@@ -28,11 +28,21 @@ struct rw_semaphore {
#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
spinlock_t wait_lock;
struct list_head wait_list;
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+ struct lockdep_map dep_map;
+#endif
};
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
+#else
+# define __RWSEM_DEP_MAP_INIT(lockname)
+#endif
+
#define __RWSEM_INITIALIZER(name) \
{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
- LIST_HEAD_INIT((name).wait_list) }
+ LIST_HEAD_INIT((name).wait_list) \
+ __RWSEM_DEP_MAP_INIT(name) }
#define DECLARE_RWSEM(name) \
struct rw_semaphore name = __RWSEM_INITIALIZER(name)
@@ -42,12 +52,15 @@ extern struct rw_semaphore *rwsem_down_w
extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
-static inline void init_rwsem(struct rw_semaphore *sem)
-{
- sem->count = RWSEM_UNLOCKED_VALUE;
- spin_lock_init(&sem->wait_lock);
- INIT_LIST_HEAD(&sem->wait_list);
-}
+extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
+ struct lock_class_key *key);
+
+#define init_rwsem(sem) \
+ do { \
+ static struct lock_class_key __key; \
+ \
+ __init_rwsem((sem), #sem, &__key); \
+ } while (0)
/*
* lock for reading
@@ -74,7 +87,7 @@ static inline int __down_read_trylock(st
/*
* lock for writing
*/
-static inline void __down_write(struct rw_semaphore *sem)
+static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
{
int tmp;
@@ -84,6 +97,11 @@ static inline void __down_write(struct r
rwsem_down_write_failed(sem);
}
+static inline void __down_write(struct rw_semaphore *sem)
+{
+ __down_write_nested(sem, 0);
+}
+
static inline int __down_write_trylock(struct rw_semaphore *sem)
{
int tmp;
--- linux-2.6-git.orig/include/asm-powerpc/spinlock.h 2007-06-26 18:12:10.639850274 +0200
+++ linux-2.6-git/include/asm-powerpc/spinlock.h 2007-06-26 18:12:11.446850274 +0200
@@ -19,6 +19,7 @@
*
* (the type definitions are in asm/spinlock_types.h)
*/
+#include <linux/irqflags.h>
#ifdef CONFIG_PPC64
#include <asm/paca.h>
#include <asm/hvcall.h>
--- linux-2.6-git.orig/arch/powerpc/kernel/head_64.S 2007-06-26 18:12:10.537850274 +0200
+++ linux-2.6-git/arch/powerpc/kernel/head_64.S 2007-06-27 00:34:57.402820710 +0200
@@ -34,6 +34,7 @@
#include <asm/iseries/lpar_map.h>
#include <asm/thread_info.h>
#include <asm/firmware.h>
+#include <asm/irqflags.h>
#define DO_SOFT_DISABLE
@@ -394,6 +395,12 @@ label##_iSeries: \
EXCEPTION_PROLOG_ISERIES_2; \
b label##_common; \
+#ifdef CONFIG_TRACE_IRQFLAGS
+#define TRACE_DISABLE_INTS bl .powerpc_trace_irqs_off
+#else
+#define TRACE_DISABLE_INTS
+#endif
+
#ifdef CONFIG_PPC_ISERIES
#define DISABLE_INTS \
li r11,0; \
@@ -405,14 +412,15 @@ BEGIN_FW_FTR_SECTION; \
mfmsr r10; \
ori r10,r10,MSR_EE; \
mtmsrd r10,1; \
-END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
+END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES); \
+ TRACE_DISABLE_INTS
#else
#define DISABLE_INTS \
li r11,0; \
stb r11,PACASOFTIRQEN(r13); \
- stb r11,PACAHARDIRQEN(r13)
-
+ stb r11,PACAHARDIRQEN(r13); \
+ TRACE_DISABLE_INTS
#endif /* CONFIG_PPC_ISERIES */
#define ENABLE_INTS \
@@ -965,24 +973,38 @@ bad_stack:
*/
fast_exc_return_irq: /* restores irq state too */
ld r3,SOFTE(r1)
- ld r12,_MSR(r1)
+#ifdef CONFIG_TRACE_IRQFLAGS
+ cmpdi r3,0
+ beq 1f
+ bl .trace_hardirqs_on
+ ld r3,SOFTE(r1)
+1:
stb r3,PACASOFTIRQEN(r13) /* restore paca->soft_enabled */
+ cmpdi r3,0
+ bne 2f
+ bl .trace_hardirqs_off
+ ld r3,SOFTE(r1)
+2:
+#else
+ stb r3,PACASOFTIRQEN(r13) /* restore paca->soft_enabled */
+#endif
+ ld r12,_MSR(r1)
rldicl r4,r12,49,63 /* get MSR_EE to LSB */
stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */
- b 1f
+ b 3f
.globl fast_exception_return
fast_exception_return:
ld r12,_MSR(r1)
-1: ld r11,_NIP(r1)
+3: ld r11,_NIP(r1)
andi. r3,r12,MSR_RI /* check if RI is set */
beq- unrecov_fer
#ifdef CONFIG_VIRT_CPU_ACCOUNTING
andi. r3,r12,MSR_PR
- beq 2f
+ beq 4f
ACCOUNT_CPU_USER_EXIT(r3, r4)
-2:
+4:
#endif
ld r3,_CCR(r1)
@@ -1387,11 +1409,24 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISER
/*
* hash_page couldn't handle it, set soft interrupt enable back
- * to what it was before the trap. Note that .local_irq_restore
+ * to what it was before the trap. Note that .raw_local_irq_restore
* handles any interrupts pending at this point.
*/
ld r3,SOFTE(r1)
- bl .local_irq_restore
+#ifdef CONFIG_TRACE_IRQFLAGS
+ cmpdi r3,0
+ beq 14f
+ bl .trace_hardirqs_on
+ ld r3,SOFTE(r1)
+14:
+ bl .raw_local_irq_restore
+ cmpdi r3,0
+ bne 15f
+ bl .trace_hardirqs_off
+15:
+#else
+ bl .raw_local_irq_restore
+#endif
b 11f
/* Here we have a page fault that hash_page can't handle. */
--- linux-2.6-git.orig/arch/powerpc/kernel/setup_64.c 2007-06-26 18:12:10.594850274 +0200
+++ linux-2.6-git/arch/powerpc/kernel/setup_64.c 2007-06-26 18:12:11.451850274 +0200
@@ -33,6 +33,7 @@
#include <linux/serial_8250.h>
#include <linux/bootmem.h>
#include <linux/pci.h>
+#include <linux/lockdep.h>
#include <asm/io.h>
#include <asm/kdump.h>
#include <asm/prom.h>
@@ -359,6 +360,11 @@ void __init setup_system(void)
&__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
/*
+ * start lockdep
+ */
+ lockdep_init();
+
+ /*
* Unflatten the device-tree passed by prom_init or kexec
*/
unflatten_device_tree();
--- linux-2.6-git.orig/arch/powerpc/kernel/entry_64.S 2007-06-26 18:20:59.030850274 +0200
+++ linux-2.6-git/arch/powerpc/kernel/entry_64.S 2007-06-26 21:25:58.630569893 +0200
@@ -29,6 +29,7 @@
#include <asm/cputable.h>
#include <asm/firmware.h>
#include <asm/bug.h>
+#include <asm/irqflags.h>
/*
* System calls.
@@ -91,6 +92,13 @@ system_call_common:
li r10,1
stb r10,PACASOFTIRQEN(r13)
stb r10,PACAHARDIRQEN(r13)
+#ifdef CONFIG_TRACE_IRQFLAGS
+ bl .trace_hardirqs_on
+ REST_GPR(0,r1)
+ REST_4GPRS(3,r1)
+ REST_2GPRS(7,r1)
+ addi r9,r1,STACK_FRAME_OVERHEAD
+#endif
std r10,SOFTE(r1)
#ifdef CONFIG_PPC_ISERIES
BEGIN_FW_FTR_SECTION
@@ -491,8 +499,20 @@ BEGIN_FW_FTR_SECTION
4:
END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
#endif
+#ifdef CONFIG_TRACE_IRQFLAGS
+ cmpdi r5,0
+ beq 5f
+ bl .trace_hardirqs_on
+ ld r5,SOFTE(r1)
stb r5,PACASOFTIRQEN(r13)
-
+ b 6f
+5:
+ stb r5,PACASOFTIRQEN(r13)
+ bl .trace_hardirqs_off
+6:
+#else
+ stb r5,PACASOFTIRQEN(r13)
+#endif
/* extract EE bit and use it to restore paca->hard_enabled */
ld r3,_MSR(r1)
rldicl r4,r3,49,63 /* r0 = (r3 >> 15) & 1 */
@@ -560,6 +580,7 @@ do_work:
bne restore
/* here we are preempting the current task */
1:
+ TRACE_IRQS_ON
li r0,1
stb r0,PACASOFTIRQEN(r13)
stb r0,PACAHARDIRQEN(r13)
--- linux-2.6-git.orig/arch/powerpc/kernel/Makefile 2007-06-26 19:27:54.032776841 +0200
+++ linux-2.6-git/arch/powerpc/kernel/Makefile 2007-06-27 00:30:19.115820710 +0200
@@ -62,6 +62,7 @@ obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_KPROBES) += kprobes.o
obj-$(CONFIG_PPC_UDBG_16550) += legacy_serial.o udbg_16550.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o
+obj-$(CONFIG_TRACE_IRQFLAGS) += irqtrace.o
module-$(CONFIG_PPC64) += module_64.o
obj-$(CONFIG_MODULES) += $(module-y)
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6-git/arch/powerpc/kernel/irqtrace.S 2007-06-27 00:32:07.125820710 +0200
@@ -0,0 +1,42 @@
+/*
+ * crappy helper for irq-trace
+ */
+
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+
+#define STACKSPACE GPR0 + 16*8
+
+#ifdef __powerpc64__
+#define ST std
+#define L ld
+#else
+#define ST stw
+#define L lw
+#endif
+
+#define PRE \
+ subi r1,r1,STACKSPACE ; \
+ SAVE_GPR(0, r1) ; \
+ SAVE_8GPRS(2, r1) ; \
+ SAVE_4GPRS(10, r1) ; \
+ mfcr r0 ; \
+ ST r0, (14*8)(r1) ; \
+ mflr r0 ; \
+ ST r0, (15*8)(r1)
+
+#define POST \
+ REST_8GPRS(2, r1) ; \
+ REST_4GPRS(10, r1) ; \
+ L r0, (14*8)(r1) ; \
+ mtcr r0 ; \
+ L r0, (15*8)(r1) ; \
+ mtlr r0 ; \
+ REST_GPR(0, r1) ; \
+ addi r1,r1,STACKSPACE
+
+_GLOBAL(powerpc_trace_irqs_off)
+ PRE
+ bl .trace_hardirqs_off
+ POST
+ blr
^ permalink raw reply
* Re: [PATCH] pcmcia: CompactFlash driver for PA Semi Electra boards
From: Milton Miller @ 2007-06-27 11:20 UTC (permalink / raw)
To: Olof Johansson; +Cc: ppcdev
In-Reply-To: <20070625010311.GA31355@lixom.net>
Hi Olof.
On Mon Jun 25 11:03:11 EST 2007, Olof Johansson wrote:
> Driver for the CompactFlash slot on the PA Semi Electra eval board.
> It's
> a simple device sitting on localbus, with interrupts and detect/voltage
> control over GPIO.
>
> The driver is implemented as an of_platform driver, and adds localbus
> as a bus being probed by the of_platform framework.
...
> +
> +static int __devinit electra_cf_probe(struct of_device *ofdev,
> + const struct of_device_id *match)
> +{
> + struct device *device = &ofdev->dev;
> + struct device_node *np = ofdev->node;
> + struct electra_cf_socket *cf;
> + struct resource mem, io;
> + int status;
> + const unsigned int *prop;
> + int err;
> +
> + err = of_address_to_resource(np, 0, &mem);
> + if (err)
> + return -EINVAL;
> +
> + err = of_address_to_resource(np, 1, &io);
> + if (err)
> + return -EINVAL;
> +
> + cf = kzalloc(sizeof *cf, GFP_KERNEL);
> + if (!cf)
> + return -ENOMEM;
> +
> + init_timer(&cf->timer);
> + cf->timer.function = electra_cf_timer;
> + cf->timer.data = (unsigned long) cf;
> +
> + cf->ofdev = ofdev;
> + cf->mem_phys = mem.start;
> + cf->mem_base = ioremap(mem.start, mem.end - mem.start);
> + cf->io_size = PAGE_ALIGN(io.end - io.start);
> +
> + cf->io_virt = reserve_phb_iospace(cf->io_size);
> +
> + cf->gpio_base = ioremap(0xfc103000, 0x1000);
> + dev_set_drvdata(device, cf);
> +
> + if (!cf->mem_base || !cf->io_virt || !cf->gpio_base) {
> + dev_err(device, "can't ioremap ranges\n");
> + status = -ENOMEM;
> + goto fail1;
> + }
> +
> + __ioremap_explicit(io.start, (unsigned long)cf->io_virt,
> cf->io_size,
> + _PAGE_NO_CACHE | _PAGE_GUARDED);
> +
> + cf->io_base = (unsigned long)cf->io_virt - VMALLOC_END;
> +
> + cf->iomem.start = (unsigned long)cf->mem_base;
> + cf->iomem.end = (unsigned long)cf->mem_base + (mem.end -
> mem.start);
> + cf->iomem.flags = IORESOURCE_MEM;
> +
> + cf->irq = irq_of_parse_and_map(np, 0);
> +
> + status = request_irq(cf->irq, electra_cf_irq, IRQF_SHARED,
> + driver_name, cf);
> + if (status < 0) {
> + dev_err(device, "request_irq failed\n");
> + goto fail1;
> + }
> +
> + cf->socket.pci_irq = cf->irq;
> +
> + prop = get_property(np, "card-detect-gpio", NULL);
> + cf->gpio_detect = *prop;
> + prop = get_property(np, "card-vsense-gpio", NULL);
> + cf->gpio_vsense = *prop;
> + prop = get_property(np, "card-3v-gpio", NULL);
> + cf->gpio_3v = *prop;
> + prop = get_property(np, "card-5v-gpio", NULL);
> + cf->gpio_5v = *prop;
> +
get_property is now a #define for of_get_property. I think the use of
get_property is being deprecated.
If of_get_property fails to find the property, then you will
dereference a NULL pointer in a probe function and will leave the
bus_type locked.
> + cf->socket.io_offset = cf->io_base;
> +
> + /* reserve chip-select regions */
> + if (!request_mem_region(mem.start, mem.end + 1 - mem.start,
> + driver_name)) {
> + status = -ENXIO;
> + dev_err(device, "Can't claim memory region\n");
> + goto fail1;
> + }
> +
> + if (!request_region(cf->io_base, cf->io_size, driver_name)) {
> + status = -ENXIO;
> + dev_err(device, "Can't claim I/O region\n");
> + goto fail2;
> + }
> +
> + cf->socket.owner = THIS_MODULE;
> + cf->socket.dev.parent = &ofdev->dev;
> + cf->socket.ops = &electra_cf_ops;
> + cf->socket.resource_ops = &pccard_static_ops;
> + cf->socket.features = SS_CAP_PCCARD | SS_CAP_STATIC_MAP |
> + SS_CAP_MEM_ALIGN;
> + cf->socket.map_size = 0x800;
> +
> + status = pcmcia_register_socket(&cf->socket);
> + if (status < 0) {
> + dev_err(device, "pcmcia_register_socket failed\n");
> + goto fail3;
> + }
> +
> + dev_info(device, "at mem 0x%lx io 0x%lx irq %d\n",
> + mem.start, io.start, cf->irq);
> +
> + cf->active = 1;
> + electra_cf_timer((unsigned long)cf);
> + return 0;
> +
> +fail3:
> + release_mem_region(io.start, io.end + 1 - io.start);
> +fail2:
> + release_mem_region(mem.start, mem.end + 1 - mem.start);
> +fail1:
> + /* XXX No way to undo the io reservation at this time */
What io reservation is this comment referring to?
Where is the request_irq undone?
> + if (cf->mem_base)
> + iounmap(cf->mem_base);
> + if (cf->gpio_base)
> + iounmap(cf->gpio_base);
> + device_init_wakeup(&ofdev->dev, 0);
> + kfree(cf);
> + return status;
> +
> +}
> +
> +static int __devexit electra_cf_remove(struct of_device *ofdev)
> +{
> + struct device *device = &ofdev->dev;
> + struct electra_cf_socket *cf;
> +
> + cf = dev_get_drvdata(device);
> +
> + cf->active = 0;
> + pcmcia_unregister_socket(&cf->socket);
> + free_irq(cf->irq, cf);
> + del_timer_sync(&cf->timer);
> +
> + iounmap(cf->mem_base);
> + iounmap(cf->gpio_base);
> + release_mem_region(cf->mem_phys, cf->mem_size);
> + release_region(cf->io_base, cf->io_size);
> +
>
irq_request?
> + kfree(cf);
> +
> + return 0;
> +}
> +
> +static int bus_notify(struct notifier_block *nb, unsigned long action,
> + void *data)
> +{
> + struct device *dev = data;
> +
> + printk("bus notify called\n");
> +
> + /* We are only intereted in device addition */
> + if (action != BUS_NOTIFY_ADD_DEVICE)
> + return 0;
> +
> + /* We use the direct ops for localbus */
> + dev->archdata.dma_ops = &dma_direct_ops;
> +
I'm also replying to your reply to hch's reply. Is that enough of a
reply? :-)
> + return 0;
> +}
> +
> +static struct notifier_block bus_notifier = {
> + .notifier_call = bus_notify,
> +};
> +
> +static struct of_device_id electra_cf_match[] =
> +{
> + {
> + .compatible = "electra-cf",
> + },
> + {},
> +};
> +
> +static struct of_platform_driver electra_cf_driver =
> +{
> + .name = (char *)driver_name,
> + .match_table = electra_cf_match,
> + .probe = electra_cf_probe,
> + .remove = electra_cf_remove,
> +};
> +
> +static int __init electra_cf_init(void)
> +{
> + bus_register_notifier(&pcmcia_bus_type, &bus_notifier);
> + return of_register_platform_driver(&electra_cf_driver);
> +}
> +module_init(electra_cf_init);
> +
> +static void __exit electra_cf_exit(void)
> +{
> + bus_unregister_notifier(&pcmcia_bus_type, &bus_notifier);
> + of_unregister_platform_driver(&electra_cf_driver);
Should these be reversed? (if we keep it here)
> +}
> +module_exit(electra_cf_exit);
> +
> +MODULE_LICENSE("GPL");
> +MODULE_AUTHOR ("Olof Johansson <olof at lixom.net>");
> +MODULE_DESCRIPTION("PA Semi Electra CF driver");
> +
cheers,
milton
^ permalink raw reply
* Re: [PATCH v2] pcmcia: CompactFlash driver for PA Semi Electra boards
From: Milton Miller @ 2007-06-27 11:20 UTC (permalink / raw)
To: Olof Johansson; +Cc: ppcdev, Christoph Hellwig
In-Reply-To: <20070625171221.GA6684@lixom.net>
> On Mon, Jun 25, 2007 at 08:39:09PM +0100, Christoph Hellwig wrote:
>> On Mon, Jun 25, 2007 at 12:12:21PM -0500, Olof Johansson wrote:
>>> Driver for the CompactFlash slot on the PA Semi Electra eval board.
>>> It's
>>> a simple device sitting on localbus, with interrupts and
>>> detect/voltage
>>> control over GPIO.
>>>
>>> The driver is implemented as an of_platform driver, and adds localbus
>>> as a bus being probed by the of_platform framework.
>>
>> Looks good to me. The only odd thing is the inconsistant use of
>> #ifdef CONFIG_PCMCIA in setup.c.
>
> The ifdef is needed since for CONFIG_PCMCIA=n builds, the bus notifier
> isn't available. I wanted to do the bus notifier registration
> explicitly
> before the of_platform bus probe to avoid later surprises due to
> reordered
> initcalls in case it was split up in it's own initcall.
If CONFIG_PCMCIA=m then your notifier is not registered. The modprobe
of your of_driver loads ds.ko, registers the bus, then registers your
driver. When the socket driver tries to dma, the BUG in dma_64 for no
archdata.dma_ops triggers.
It seems like we need
(1) a notifier that a bus is registered, run before allowing any
devices, so that platforms can register bus notifiers by bus name
before the devices and drivers are registered.
(2) a powerpc64 generic pcmcia bus notifier that copys the dma ops from
the parent socket.
(3) something to set the dma_ops to direct_dma_ops on the of device.
If we don't want (3) to be in the driver (as Christoph previosly
mentioned), then it needs to be a seperate bus that reuses the of
matching. This would be similar to how ibmebus is setup. If I
remember the discussion, ibmebus is to provide the alternate dma ops
and steals match etc code from the of_platform bus type.
Oh, is this why you have depends on PCMCIA=y ?
> I could add the code under ifdef as well, but it didn't seem too
> critical. Once the second major board comes along I'll probably move it
> out to a per-board file, there's no real need for it just yet.
milton
^ permalink raw reply
* Re: [PATCH 3/3] First cut at PReP support for arch/powerpc
From: Milton Miller @ 2007-06-27 11:22 UTC (permalink / raw)
To: David Gibson; +Cc: ppcdev
In-Reply-To: <20070627071008.GA30648@localhost.localdomain>
On Wed Jun 27 17:10:08 EST 2007, David Gibson wrote:
> Here is an implementation to allow PReP systems to boot under the
> arch/powerpc codebase, one of the few remaining platforms supported in
> arch/ppc but not so far in arch/powerpc.
>
> This support is still fairly incomplete - it needs to obtain a lot
> more device information from the residual data and put it into the
> device tree, rather than relying on hardcoded values (both in the code
> and in prep.dts). Likewise many peripherals will not be supported -
> in particular the RTC is not yet supported, so the time will generally
> be wrong.
Hi David.
A few things I noticed:
(1) Your cleaned up mkprep.c seems to always put on a floppy header,
where as before that was optional with the -php flag. Is that header
right for a hard disk partition? Or would that just have the 1-sector
header? The comments in the old mkprep impiled the raw elf contents
are used for netboot. What if the zImage does't fit on the 1.44MB disk
given in the header?
(2) Uour wrapper rule can leave behind zImage.dts.prep.elf, but there
is no clean rule for that
(3) Is this the right platform to create the device tree from scratch
by traversing fw data? A significiant number of the properties are to
be filled in or say IBM, which is incorrect.
(4) Adding a 5th udbg_putc method that calls a byte read to
udbg_comport->lsr masked with THRE until 0 and performs a byte write to
->thr shows we have the wrong abstraction. Please make the inb/outb a
method with the comport. It would seem the actual init_xx could be in
the platforms, passing inb, outb, and comport to a helper in
udbg_16550.c. I'm fine with declaring all the early inits in udbg.h
(5) the printk PReP architecture is in the middle of prep_find_bridges?
(6) #if 0 prep_request_io will need platform check
(7) do you expect both the kernel and the boot code will continue to
need residual.h? If so, can we have the boot dir make a copy like the
zlib headers? Or is this only temporary, the kernel only needs a copy
of the raw blob to export to userspace in the same spot and the
include/asm-powerpc copy will go away?
milton
^ permalink raw reply
* udbg_16550.c and legacy_serial.c
From: Milton Miller @ 2007-06-27 11:29 UTC (permalink / raw)
To: Milton Miller; +Cc: ppcdev, David Gibson
In-Reply-To: <d8960a6c86859c19b84dc9fd41446fbd@bga.com>
On Jun 27, 2007, at 6:22 AM, Milton Miller wrote:
> (4) Adding a 5th udbg_putc method that calls a byte read to
> udbg_comport->lsr masked with THRE until 0 and performs a byte write
> to ->thr shows we have the wrong abstraction. Please make the
> inb/outb a method with the comport. It would seem the actual init_xx
> could be in the platforms, passing inb, outb, and comport to a helper
> in udbg_16550.c. I'm fine with declaring all the early inits in
> udbg.h
>
I'll repost that with a different subject in case someone else wants to
work on that.
Also, while researching this, I found that check_legacy_serial_console
has a check for legacy_serial_console < 0 in it. Since that is set to
the legacy_ports array we pass to the serial layer, it would seem all
the other parsing to find the console is redundant; we can get the np
that we already found. However, it also means that the code to notice
the stdout path is ch-a or ch-b will never be executed because of that
check.
The comment about stdout being a wierd phandle should read
"/chosen/stdout is a ihandle. use linux,stdout-path instead".
no patch at this hour.
milton
^ permalink raw reply
* [PATCH] Schedule removal of arch/ppc
From: Josh Boyer @ 2007-06-27 13:49 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
The arch/ppc tree has been in a semi-nebulous "bug fix only" state for a
few kernel releases now. The patch below officially declares this as of
the 2.6.22 kernel release and schedules arch/ppc for removal in June of
2008.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
diff --git a/Documentation/feature-removal-schedule.txt b/Documentation/feature-
index 7d3f205..170a32e 100644
--- a/Documentation/feature-removal-schedule.txt
+++ b/Documentation/feature-removal-schedule.txt
@@ -348,3 +348,15 @@ Who: Tejun Heo <htejun@gmail.com>
---------------------------
+What: The arch/ppc and include/asm-ppc directories
+When: Jun 2008
+Why: The arch/powerpc tree is the merged architecture for ppc32 and ppc64
+ platforms. Currently there are efforts underway to port the remaining
+ arch/ppc platforms the the merged tree. New submissions to the arch/ppc
+ tree have been frozen with the 2.6.22 kernel release and that tree will
+ remain in bug-fix only mode until it's scheduled removal. Platforms
+ that are not ported by June 2008 will be removed due to the lack of an
+ interested maintainer.
+Who: linuxppc-dev@ozlabs.org
+
+---------------------------
^ permalink raw reply related
* Porting Linux to Xilinx ML410
From: khollan @ 2007-06-27 16:40 UTC (permalink / raw)
To: linuxppc-embedded
Hi Im trying to get linux 2.6 to run on my ML410 board from xilinx. I just
created a real simple system with a Uartlite DDR2 and DDR interupt
controller and sysace. I installed the patches I found for Uartlite and
sysace I found here. I boot the zImage with XMD with the following
commands:
dow t:/zImage.elf
con
This is what I get out the serial port:
loaded at: 00400000 00537138
board data at: 00000000 00000018
relocated to: 00404064 0040407C
zimage at: 00404E6D 005345F1
avail ram: 00538000 7C7F1B78
Linux/PPC load: console=ttyUL0,9600 root=/dev/xsysace/disc0/part3 rw
Uncompressing Linux...done.
Now booting the kernel
It always stall on the Now booting the kernel. Im new to linux building and
any help or suggestions are greatly appreciated.
Thanks
Kevin
--
View this message in context: http://www.nabble.com/Porting-Linux-to-Xilinx-ML410-tf3989483.html#a11328063
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* [PATCH 0/8] [POWERPC] PCI merge of ppc32 & ppc64
From: Kumar Gala @ 2007-06-27 18:19 UTC (permalink / raw)
To: linuxppc-dev
This is a set of patches queued for 2.6.23 that merge some of the common
bits of ppc32 & ppc64 PCI code.
Also available at:
master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git for_paulus
- k
^ permalink raw reply
* [PATCH 1/8] [POWERPC] Merge asm-ppc/pci-bridge.h into asm-power/pci-bridge.h
From: Kumar Gala @ 2007-06-27 18:19 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <11829683583721-git-send-email-galak@kernel.crashing.org>
Moved bits need for ppc32 from asm-ppc/pci-bridge.h into
asm-powerpc/pci-bridge.h.
Removed ARCH=powerpc specific bits (and comments related to ARCH=ppc)
from asm-ppc/pci-bridge.h as its only used on ARCH=ppc.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
include/asm-powerpc/pci-bridge.h | 138 +++++++++++++++++++++++++++++++++-----
include/asm-ppc/pci-bridge.h | 17 -----
2 files changed, 120 insertions(+), 35 deletions(-)
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index 5261527..b032593 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -3,7 +3,103 @@
#ifdef __KERNEL__
#ifndef CONFIG_PPC64
-#include <asm-ppc/pci-bridge.h>
+#include <linux/ioport.h>
+#include <linux/pci.h>
+
+struct device_node;
+struct pci_controller;
+
+/*
+ * pci_io_base returns the memory address at which you can access
+ * the I/O space for PCI bus number `bus' (or NULL on error).
+ */
+extern void __iomem *pci_bus_io_base(unsigned int bus);
+extern unsigned long pci_bus_io_base_phys(unsigned int bus);
+extern unsigned long pci_bus_mem_base_phys(unsigned int bus);
+
+/* Allocate a new PCI host bridge structure */
+extern struct pci_controller* pcibios_alloc_controller(void);
+
+/* Helper function for setting up resources */
+extern void pci_init_resource(struct resource *res, resource_size_t start,
+ resource_size_t end, int flags, char *name);
+
+/* Get the PCI host controller for a bus */
+extern struct pci_controller* pci_bus_to_hose(int bus);
+
+/*
+ * Structure of a PCI controller (host bridge)
+ */
+struct pci_controller {
+ struct pci_bus *bus;
+ void *arch_data;
+ int index; /* PCI domain number */
+ struct pci_controller *next;
+ struct device *parent;
+
+ int first_busno;
+ int last_busno;
+ int self_busno;
+
+ void __iomem *io_base_virt;
+ resource_size_t io_base_phys;
+
+ /* Some machines (PReP) have a non 1:1 mapping of
+ * the PCI memory space in the CPU bus space
+ */
+ resource_size_t pci_mem_offset;
+
+ struct pci_ops *ops;
+ volatile unsigned int __iomem *cfg_addr;
+ volatile void __iomem *cfg_data;
+
+ /*
+ * Used for variants of PCI indirect handling and possible quirks:
+ * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
+ * EXT_REG - provides access to PCI-e extended registers
+ * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS
+ * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
+ * to determine which bus number to match on when generating type0
+ * config cycles
+ */
+#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001)
+#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002)
+#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS (0x00000004)
+ u32 indirect_type;
+
+ /* Currently, we limit ourselves to 1 IO range and 3 mem
+ * ranges since the common pci_bus structure can't handle more
+ */
+ struct resource io_resource;
+ struct resource mem_resources[3];
+};
+
+static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
+{
+ return bus->sysdata;
+}
+
+/* These are used for config access before all the PCI probing
+ has been done. */
+int early_read_config_byte(struct pci_controller *hose, int bus, int dev_fn,
+ int where, u8 *val);
+int early_read_config_word(struct pci_controller *hose, int bus, int dev_fn,
+ int where, u16 *val);
+int early_read_config_dword(struct pci_controller *hose, int bus, int dev_fn,
+ int where, u32 *val);
+int early_write_config_byte(struct pci_controller *hose, int bus, int dev_fn,
+ int where, u8 val);
+int early_write_config_word(struct pci_controller *hose, int bus, int dev_fn,
+ int where, u16 val);
+int early_write_config_dword(struct pci_controller *hose, int bus, int dev_fn,
+ int where, u32 val);
+
+extern void setup_indirect_pci_nomap(struct pci_controller* hose,
+ void __iomem *cfg_addr, void __iomem *cfg_data);
+extern void setup_indirect_pci(struct pci_controller* hose,
+ u32 cfg_addr, u32 cfg_data);
+extern void setup_grackle(struct pci_controller *hose);
+
#else
#include <linux/pci.h>
@@ -49,8 +145,8 @@ struct pci_controller {
*/
struct resource io_resource;
struct resource mem_resources[3];
- int global_number;
- int local_number;
+ int global_number;
+ int local_number;
unsigned long buid;
unsigned long dma_window_base_cur;
unsigned long dma_window_size;
@@ -132,9 +228,6 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
/** Find the bus corresponding to the indicated device node */
struct pci_bus * pcibios_find_pci_bus(struct device_node *dn);
-extern void pci_process_bridge_OF_ranges(struct pci_controller *hose,
- struct device_node *dev, int primary);
-
/** Remove all of the PCI devices under this bus */
void pcibios_remove_pci_devices(struct pci_bus *bus);
@@ -152,22 +245,10 @@ static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
return PCI_DN(busdn)->phb;
}
-extern struct pci_controller*
-pci_find_hose_for_OF_device(struct device_node* node);
-
extern struct pci_controller *
pcibios_alloc_controller(struct device_node *dev);
extern void pcibios_free_controller(struct pci_controller *phb);
-#ifdef CONFIG_PCI
-extern unsigned long pci_address_to_pio(phys_addr_t address);
-#else
-static inline unsigned long pci_address_to_pio(phys_addr_t address)
-{
- return (unsigned long)-1;
-}
-#endif
-
extern void isa_bridge_find_early(struct pci_controller *hose);
extern int pcibios_unmap_io_space(struct pci_bus *bus);
@@ -185,5 +266,26 @@ extern int pcibios_map_io_space(struct pci_bus *bus);
#endif
#endif /* CONFIG_PPC64 */
+
+/* Get the PCI host controller for an OF device */
+extern struct pci_controller*
+pci_find_hose_for_OF_device(struct device_node* node);
+
+/* Fill up host controller resources from the OF node */
+extern void
+pci_process_bridge_OF_ranges(struct pci_controller *hose,
+ struct device_node *dev, int primary);
+
+#ifdef CONFIG_PCI
+extern unsigned long pci_address_to_pio(phys_addr_t address);
+#else
+static inline unsigned long pci_address_to_pio(phys_addr_t address)
+{
+ return (unsigned long)-1;
+}
+#endif
+
+
+
#endif /* __KERNEL__ */
#endif
diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h
index c09fbf0..4d35b84 100644
--- a/include/asm-ppc/pci-bridge.h
+++ b/include/asm-ppc/pci-bridge.h
@@ -47,8 +47,6 @@ struct pci_controller {
int first_busno;
int last_busno;
- int self_busno;
- /* bus_offset is only used by ARCH=ppc */
int bus_offset;
void __iomem *io_base_virt;
@@ -65,24 +63,9 @@ struct pci_controller {
/*
* If set, indirect method will set the cfg_type bit as
* needed to generate type 1 configuration transactions.
- * use only on ARCH=ppc
*/
int set_cfg_type;
- /*
- * Used for variants of PCI indirect handling and possible quirks:
- * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
- * EXT_REG - provides access to PCI-e extended registers
- * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS
- * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
- * to determine which bus number to match on when generating type0
- * config cycles
- */
-#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001)
-#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002)
-#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS (0x00000004)
- u32 indirect_type;
-
/* Currently, we limit ourselves to 1 IO range and 3 mem
* ranges since the common pci_bus structure can't handle more
*/
--
1.5.2.1
^ permalink raw reply related
* [PATCH 2/8] [POWERPC] Remove local_number from pci_controller
From: Kumar Gala @ 2007-06-27 18:19 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <11829683604166-git-send-email-galak@kernel.crashing.org>
We never actually read local_number so lets just remove it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/platforms/iseries/pci.c | 2 +-
include/asm-powerpc/pci-bridge.h | 1 -
2 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/iseries/pci.c b/arch/powerpc/platforms/iseries/pci.c
index 23d8762..da87162 100644
--- a/arch/powerpc/platforms/iseries/pci.c
+++ b/arch/powerpc/platforms/iseries/pci.c
@@ -768,7 +768,7 @@ void __init iSeries_pcibios_init(void)
if (phb == NULL)
continue;
- phb->pci_mem_offset = phb->local_number = bus;
+ phb->pci_mem_offset = bus;
phb->first_busno = bus;
phb->last_busno = bus;
phb->ops = &iSeries_pci_ops;
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index b032593..229ead9 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -146,7 +146,6 @@ struct pci_controller {
struct resource io_resource;
struct resource mem_resources[3];
int global_number;
- int local_number;
unsigned long buid;
unsigned long dma_window_base_cur;
unsigned long dma_window_size;
--
1.5.2.1
^ permalink raw reply related
* [PATCH 3/8] [POWERPC] Removed dead code related to PCI on ppc32
From: Kumar Gala @ 2007-06-27 18:19 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <11829683612573-git-send-email-galak@kernel.crashing.org>
There are no in kernel users of any off these functions and some of
them were not even EXPORT_SYMBOL:
- pci_bus_io_base()
- pci_bus_io_base_phys()
- pci_bus_mem_base_phys()
- pci_resource_to_bus()
- phys_to_bus()
- pci_phys_to_bus()
- pci_bus_to_phys()
- pci_init_resource()
- resource_fixup()
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/kernel/pci_32.c | 112 --------------------------------------
arch/powerpc/kernel/ppc_ksyms.c | 3 -
include/asm-powerpc/pci-bridge.h | 12 ----
3 files changed, 0 insertions(+), 127 deletions(-)
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 7738a28..2d4a1c4 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -1319,12 +1319,6 @@ pcibios_init(void)
subsys_initcall(pcibios_init);
-unsigned long resource_fixup(struct pci_dev * dev, struct resource * res,
- unsigned long start, unsigned long size)
-{
- return start;
-}
-
void __init pcibios_fixup_bus(struct pci_bus *bus)
{
struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
@@ -1508,53 +1502,6 @@ pci_bus_to_hose(int bus)
return NULL;
}
-void __iomem *
-pci_bus_io_base(unsigned int bus)
-{
- struct pci_controller *hose;
-
- hose = pci_bus_to_hose(bus);
- if (!hose)
- return NULL;
- return hose->io_base_virt;
-}
-
-unsigned long
-pci_bus_io_base_phys(unsigned int bus)
-{
- struct pci_controller *hose;
-
- hose = pci_bus_to_hose(bus);
- if (!hose)
- return 0;
- return hose->io_base_phys;
-}
-
-unsigned long
-pci_bus_mem_base_phys(unsigned int bus)
-{
- struct pci_controller *hose;
-
- hose = pci_bus_to_hose(bus);
- if (!hose)
- return 0;
- return hose->pci_mem_offset;
-}
-
-unsigned long
-pci_resource_to_bus(struct pci_dev *pdev, struct resource *res)
-{
- /* Hack alert again ! See comments in chrp_pci.c
- */
- struct pci_controller* hose =
- (struct pci_controller *)pdev->sysdata;
- if (hose && res->flags & IORESOURCE_MEM)
- return res->start - hose->pci_mem_offset;
- /* We may want to do something with IOs here... */
- return res->start;
-}
-
-
static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
resource_size_t *offset,
enum pci_mmap_state mmap_state)
@@ -1725,53 +1672,6 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
return ret;
}
-/* Obsolete functions. Should be removed once the symbios driver
- * is fixed
- */
-unsigned long
-phys_to_bus(unsigned long pa)
-{
- struct pci_controller *hose;
- int i;
-
- for (hose = hose_head; hose; hose = hose->next) {
- for (i = 0; i < 3; ++i) {
- if (pa >= hose->mem_resources[i].start
- && pa <= hose->mem_resources[i].end) {
- /*
- * XXX the hose->pci_mem_offset really
- * only applies to mem_resources[0].
- * We need a way to store an offset for
- * the others. -- paulus
- */
- if (i == 0)
- pa -= hose->pci_mem_offset;
- return pa;
- }
- }
- }
- /* hmmm, didn't find it */
- return 0;
-}
-
-unsigned long
-pci_phys_to_bus(unsigned long pa, int busnr)
-{
- struct pci_controller* hose = pci_bus_to_hose(busnr);
- if (!hose)
- return pa;
- return pa - hose->pci_mem_offset;
-}
-
-unsigned long
-pci_bus_to_phys(unsigned int ba, int busnr)
-{
- struct pci_controller* hose = pci_bus_to_hose(busnr);
- if (!hose)
- return ba;
- return ba + hose->pci_mem_offset;
-}
-
/* Provide information on locations of various I/O regions in physical
* memory. Do this on a per-card basis so that we choose the right
* root bridge.
@@ -1853,18 +1753,6 @@ void pci_resource_to_user(const struct pci_dev *dev, int bar,
*end = rsrc->end - offset;
}
-void __init pci_init_resource(struct resource *res, resource_size_t start,
- resource_size_t end, int flags, char *name)
-{
- res->start = start;
- res->end = end;
- res->flags = flags;
- res->name = name;
- res->parent = NULL;
- res->sibling = NULL;
- res->child = NULL;
-}
-
unsigned long pci_address_to_pio(phys_addr_t address)
{
struct pci_controller* hose = hose_head;
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index c96fa9b..c58f2de 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -106,9 +106,6 @@ EXPORT_SYMBOL(isa_mem_base);
EXPORT_SYMBOL(pci_dram_offset);
EXPORT_SYMBOL(pci_alloc_consistent);
EXPORT_SYMBOL(pci_free_consistent);
-EXPORT_SYMBOL(pci_bus_io_base);
-EXPORT_SYMBOL(pci_bus_io_base_phys);
-EXPORT_SYMBOL(pci_bus_mem_base_phys);
EXPORT_SYMBOL(pci_bus_to_hose);
#endif /* CONFIG_PCI */
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index 229ead9..e2b2b6b 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -9,21 +9,9 @@
struct device_node;
struct pci_controller;
-/*
- * pci_io_base returns the memory address at which you can access
- * the I/O space for PCI bus number `bus' (or NULL on error).
- */
-extern void __iomem *pci_bus_io_base(unsigned int bus);
-extern unsigned long pci_bus_io_base_phys(unsigned int bus);
-extern unsigned long pci_bus_mem_base_phys(unsigned int bus);
-
/* Allocate a new PCI host bridge structure */
extern struct pci_controller* pcibios_alloc_controller(void);
-/* Helper function for setting up resources */
-extern void pci_init_resource(struct resource *res, resource_size_t start,
- resource_size_t end, int flags, char *name);
-
/* Get the PCI host controller for a bus */
extern struct pci_controller* pci_bus_to_hose(int bus);
--
1.5.2.1
^ permalink raw reply related
* [PATCH 4/8] [POWERPC] Use global_number in ppc32 pci_controller
From: Kumar Gala @ 2007-06-27 18:19 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <11829683631074-git-send-email-galak@kernel.crashing.org>
Make the pci_controller struct use global_number for the PHB domain number
instead of index to match what ppc64 does and reuse its pci_domain_nr code.
Introduced a pci-common.c to handle shared code between ppc32 & ppc64.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/kernel/Makefile | 2 +-
arch/powerpc/kernel/pci-common.c | 53 +++++++++++++++++++++++++++++++++++
arch/powerpc/kernel/pci_32.c | 6 ++--
arch/powerpc/kernel/pci_64.c | 16 ----------
arch/powerpc/platforms/52xx/efika.c | 4 +-
arch/powerpc/platforms/chrp/pci.c | 4 +-
include/asm-powerpc/pci-bridge.h | 2 +-
include/asm-powerpc/pci.h | 7 +---
8 files changed, 64 insertions(+), 30 deletions(-)
create mode 100644 arch/powerpc/kernel/pci-common.c
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index eb6a33e..42c42ec 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -68,7 +68,7 @@ obj-$(CONFIG_MODULES) += $(module-y)
pci64-$(CONFIG_PPC64) += pci_64.o pci_dn.o isa-bridge.o
pci32-$(CONFIG_PPC32) := pci_32.o
-obj-$(CONFIG_PCI) += $(pci64-y) $(pci32-y)
+obj-$(CONFIG_PCI) += $(pci64-y) $(pci32-y) pci-common.o
obj-$(CONFIG_PCI_MSI) += msi.o
kexec-$(CONFIG_PPC64) := machine_kexec_64.o
kexec-$(CONFIG_PPC32) := machine_kexec_32.o
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
new file mode 100644
index 0000000..3ca8cfb
--- /dev/null
+++ b/arch/powerpc/kernel/pci-common.c
@@ -0,0 +1,53 @@
+/*
+ * Contains common pci routines for ALL ppc platform
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#undef DEBUG
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/string.h>
+#include <linux/init.h>
+#include <linux/bootmem.h>
+#include <linux/mm.h>
+#include <linux/list.h>
+#include <linux/syscalls.h>
+#include <linux/irq.h>
+#include <linux/vmalloc.h>
+
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/pci-bridge.h>
+#include <asm/byteorder.h>
+#include <asm/machdep.h>
+#include <asm/ppc-pci.h>
+#include <asm/firmware.h>
+
+#ifdef DEBUG
+#include <asm/udbg.h>
+#define DBG(fmt...) printk(fmt)
+#else
+#define DBG(fmt...)
+#endif
+
+/*
+ * Return the domain number for this bus.
+ */
+int pci_domain_nr(struct pci_bus *bus)
+{
+ if (firmware_has_feature(FW_FEATURE_ISERIES))
+ return 0;
+ else {
+ struct pci_controller *hose = pci_bus_to_host(bus);
+
+ return hose->global_number;
+ }
+}
+
+EXPORT_SYMBOL(pci_domain_nr);
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 2d4a1c4..56deb31 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -620,7 +620,7 @@ pcibios_alloc_controller(void)
*hose_tail = hose;
hose_tail = &hose->next;
- hose->index = next_controller_index++;
+ hose->global_number = next_controller_index++;
return hose;
}
@@ -1336,7 +1336,7 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
if (!res->flags) {
if (io_offset)
printk(KERN_ERR "I/O resource not set for host"
- " bridge %d\n", hose->index);
+ " bridge %d\n", hose->global_number);
res->start = 0;
res->end = IO_SPACE_LIMIT;
res->flags = IORESOURCE_IO;
@@ -1350,7 +1350,7 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
if (i > 0)
continue;
printk(KERN_ERR "Memory resource not set for "
- "host bridge %d\n", hose->index);
+ "host bridge %d\n", hose->global_number);
res->start = hose->pci_mem_offset;
res->end = ~0U;
res->flags = IORESOURCE_MEM;
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 6ae67eb..23494fe 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -636,22 +636,6 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
return 0;
}
-/*
- * Return the domain number for this bus.
- */
-int pci_domain_nr(struct pci_bus *bus)
-{
- if (firmware_has_feature(FW_FEATURE_ISERIES))
- return 0;
- else {
- struct pci_controller *hose = pci_bus_to_host(bus);
-
- return hose->global_number;
- }
-}
-
-EXPORT_SYMBOL(pci_domain_nr);
-
/* Decide whether to display the domain number in /proc */
int pci_proc_domain(struct pci_bus *bus)
{
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c
index 4cb4419..010be5c 100644
--- a/arch/powerpc/platforms/52xx/efika.c
+++ b/arch/powerpc/platforms/52xx/efika.c
@@ -54,7 +54,7 @@ static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
struct pci_controller *hose = bus->sysdata;
unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
| (((bus->number - hose->first_busno) & 0xff) << 16)
- | (hose->index << 24);
+ | (hose->global_number << 24);
int ret = -1;
int rval;
@@ -69,7 +69,7 @@ static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
struct pci_controller *hose = bus->sysdata;
unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
| (((bus->number - hose->first_busno) & 0xff) << 16)
- | (hose->index << 24);
+ | (hose->global_number << 24);
int rval;
rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index d32fedc..d840863 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -99,7 +99,7 @@ int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
struct pci_controller *hose = bus->sysdata;
unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
| (((bus->number - hose->first_busno) & 0xff) << 16)
- | (hose->index << 24);
+ | (hose->global_number << 24);
int ret = -1;
int rval;
@@ -114,7 +114,7 @@ int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
struct pci_controller *hose = bus->sysdata;
unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
| (((bus->number - hose->first_busno) & 0xff) << 16)
- | (hose->index << 24);
+ | (hose->global_number << 24);
int rval;
rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index e2b2b6b..80cfb4a 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -21,7 +21,6 @@ extern struct pci_controller* pci_bus_to_hose(int bus);
struct pci_controller {
struct pci_bus *bus;
void *arch_data;
- int index; /* PCI domain number */
struct pci_controller *next;
struct device *parent;
@@ -60,6 +59,7 @@ struct pci_controller {
*/
struct resource io_resource;
struct resource mem_resources[3];
+ int global_number; /* PCI domain number */
};
static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h
index 93e3752..0cd3e77 100644
--- a/include/asm-powerpc/pci.h
+++ b/include/asm-powerpc/pci.h
@@ -107,8 +107,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
#define get_pci_dma_ops() NULL
#endif
-extern int pci_domain_nr(struct pci_bus *bus);
-
/* Decide whether to display the domain number in /proc */
extern int pci_proc_domain(struct pci_bus *bus);
@@ -130,9 +128,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
*/
#define pci_dac_dma_supported(pci_dev, mask) (0)
-/* Return the index of the PCI controller for device PDEV. */
-#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
-
/* Set the name of the bus as it appears in /proc/bus/pci */
static inline int pci_proc_domain(struct pci_bus *bus)
{
@@ -141,6 +136,8 @@ static inline int pci_proc_domain(struct pci_bus *bus)
#endif /* CONFIG_PPC64 */
+extern int pci_domain_nr(struct pci_bus *bus);
+
struct vm_area_struct;
/* Map a range of PCI memory or I/O space for a device into user space */
int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
--
1.5.2.1
^ permalink raw reply related
* [PATCH 5/8] [POWERPC] Merge ppc32 and ppc64 pcibios_alloc_controller() prototypes
From: Kumar Gala @ 2007-06-27 18:19 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <11829683663762-git-send-email-galak@kernel.crashing.org>
Make the ppc32 pcibios_alloc_controller take a device node to match
the ppc64 prototypes and have it set arch_data.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/kernel/pci_32.c | 3 ++-
arch/powerpc/platforms/52xx/efika.c | 3 +--
arch/powerpc/platforms/52xx/mpc52xx_pci.c | 4 +---
arch/powerpc/platforms/82xx/mpc82xx_ads.c | 4 +---
arch/powerpc/platforms/83xx/pci.c | 3 +--
arch/powerpc/platforms/85xx/pci.c | 3 +--
arch/powerpc/platforms/86xx/pci.c | 4 ++--
arch/powerpc/platforms/chrp/pci.c | 3 +--
arch/powerpc/platforms/embedded6xx/linkstation.c | 3 +--
arch/powerpc/platforms/powermac/pci.c | 6 ------
arch/powerpc/sysdev/mv64x60_pci.c | 4 +---
arch/powerpc/sysdev/tsi108_pci.c | 3 +--
include/asm-powerpc/pci-bridge.h | 8 +++-----
13 files changed, 16 insertions(+), 35 deletions(-)
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 56deb31..df3251c 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -610,7 +610,7 @@ pcibios_enable_resources(struct pci_dev *dev, int mask)
static int next_controller_index;
struct pci_controller * __init
-pcibios_alloc_controller(void)
+pcibios_alloc_controller(struct device_node *dev)
{
struct pci_controller *hose;
@@ -621,6 +621,7 @@ pcibios_alloc_controller(void)
hose_tail = &hose->next;
hose->global_number = next_controller_index++;
+ hose->arch_data = dev;
return hose;
}
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c
index 010be5c..0256423 100644
--- a/arch/powerpc/platforms/52xx/efika.c
+++ b/arch/powerpc/platforms/52xx/efika.c
@@ -128,7 +128,7 @@ void __init efika_pcisetup(void)
printk(" controlled by %s\n", pcictrl->full_name);
printk("\n");
- hose = pcibios_alloc_controller();
+ hose = pcibios_alloc_controller(of_node_get(pcictrl));
if (!hose) {
printk(KERN_WARNING EFIKA_PLATFORM_NAME
": Can't allocate PCI controller structure for %s\n",
@@ -136,7 +136,6 @@ void __init efika_pcisetup(void)
return;
}
- hose->arch_data = of_node_get(pcictrl);
hose->first_busno = bus_range[0];
hose->last_busno = bus_range[1];
hose->ops = &rtas_pci_ops;
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index 69a0421..4c6c82a 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -385,12 +385,10 @@ mpc52xx_add_bridge(struct device_node *node)
* tree are needed to configure the 52xx PCI controller. Rather
* than parse the tree here, let pci_process_bridge_OF_ranges()
* do it for us and extract the values after the fact */
- hose = pcibios_alloc_controller();
+ hose = pcibios_alloc_controller(node);
if (!hose)
return -ENOMEM;
- hose->arch_data = node;
-
hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff;
diff --git a/arch/powerpc/platforms/82xx/mpc82xx_ads.c b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
index d1e0919..da20832 100644
--- a/arch/powerpc/platforms/82xx/mpc82xx_ads.c
+++ b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
@@ -543,13 +543,11 @@ static void __init mpc82xx_add_bridge(struct device_node *np)
pci_assign_all_buses = 1;
- hose = pcibios_alloc_controller();
+ hose = pcibios_alloc_controller(np);
if (!hose)
return;
- hose->arch_data = np;
-
hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff;
diff --git a/arch/powerpc/platforms/83xx/pci.c b/arch/powerpc/platforms/83xx/pci.c
index f49ed27..c0e2b89 100644
--- a/arch/powerpc/platforms/83xx/pci.c
+++ b/arch/powerpc/platforms/83xx/pci.c
@@ -62,10 +62,9 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
}
pci_assign_all_buses = 1;
- hose = pcibios_alloc_controller();
+ hose = pcibios_alloc_controller(dev);
if (!hose)
return -ENOMEM;
- hose->arch_data = dev;
hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff;
diff --git a/arch/powerpc/platforms/85xx/pci.c b/arch/powerpc/platforms/85xx/pci.c
index a25b3e7..8118417 100644
--- a/arch/powerpc/platforms/85xx/pci.c
+++ b/arch/powerpc/platforms/85xx/pci.c
@@ -56,10 +56,9 @@ int __init mpc85xx_add_bridge(struct device_node *dev)
}
pci_assign_all_buses = 1;
- hose = pcibios_alloc_controller();
+ hose = pcibios_alloc_controller(dev);
if (!hose)
return -ENOMEM;
- hose->arch_data = dev;
hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff;
diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c
index 2d7254c..5cb2188 100644
--- a/arch/powerpc/platforms/86xx/pci.c
+++ b/arch/powerpc/platforms/86xx/pci.c
@@ -196,10 +196,10 @@ int __init mpc86xx_add_bridge(struct device_node *dev)
" bus 0\n", dev->full_name);
pci_assign_all_buses = 1;
- hose = pcibios_alloc_controller();
+ hose = pcibios_alloc_controller(dev);
if (!hose)
return -ENOMEM;
- hose->arch_data = dev;
+
hose->indirect_type = PPC_INDIRECT_TYPE_EXT_REG |
PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS;
diff --git a/arch/powerpc/platforms/chrp/pci.c b/arch/powerpc/platforms/chrp/pci.c
index d840863..3690624 100644
--- a/arch/powerpc/platforms/chrp/pci.c
+++ b/arch/powerpc/platforms/chrp/pci.c
@@ -254,13 +254,12 @@ chrp_find_bridges(void)
printk(" at %llx", (unsigned long long)r.start);
printk("\n");
- hose = pcibios_alloc_controller();
+ hose = pcibios_alloc_controller(dev);
if (!hose) {
printk("Can't allocate PCI controller structure for %s\n",
dev->full_name);
continue;
}
- hose->arch_data = dev;
hose->first_busno = bus_range[0];
hose->last_busno = bus_range[1];
diff --git a/arch/powerpc/platforms/embedded6xx/linkstation.c b/arch/powerpc/platforms/embedded6xx/linkstation.c
index 885c789..f4d0a7a 100644
--- a/arch/powerpc/platforms/embedded6xx/linkstation.c
+++ b/arch/powerpc/platforms/embedded6xx/linkstation.c
@@ -68,12 +68,11 @@ static int __init linkstation_add_bridge(struct device_node *dev)
printk(KERN_WARNING "Can't get bus-range for %s, assume"
" bus 0\n", dev->full_name);
- hose = pcibios_alloc_controller();
+ hose = pcibios_alloc_controller(dev);
if (hose == NULL)
return -ENOMEM;
hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff;
- hose->arch_data = dev;
setup_indirect_pci(hose, 0xfec00000, 0xfee00000);
/* Interpret the "ranges" property */
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index fb853c0..92586db 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -916,15 +916,9 @@ static int __init pmac_add_bridge(struct device_node *dev)
" bus 0\n", dev->full_name);
}
- /* XXX Different prototypes, to be merged */
-#ifdef CONFIG_PPC64
hose = pcibios_alloc_controller(dev);
-#else
- hose = pcibios_alloc_controller();
-#endif
if (!hose)
return -ENOMEM;
- hose->arch_data = dev;
hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff;
diff --git a/arch/powerpc/sysdev/mv64x60_pci.c b/arch/powerpc/sysdev/mv64x60_pci.c
index 2e77384..45db86c 100644
--- a/arch/powerpc/sysdev/mv64x60_pci.c
+++ b/arch/powerpc/sysdev/mv64x60_pci.c
@@ -137,12 +137,10 @@ static int __init mv64x60_add_bridge(struct device_node *dev)
printk(KERN_WARNING "Can't get bus-range for %s, assume"
" bus 0\n", dev->full_name);
- hose = pcibios_alloc_controller();
+ hose = pcibios_alloc_controller(dev);
if (!hose)
return -ENOMEM;
- hose->arch_data = dev;
-
hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff;
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index 298e2dd..90db8a7 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -221,13 +221,12 @@ int __init tsi108_setup_pci(struct device_node *dev, u32 cfg_phys, int primary)
" bus 0\n", dev->full_name);
}
- hose = pcibios_alloc_controller();
+ hose = pcibios_alloc_controller(dev);
if (!hose) {
printk("PCI Host bridge init failed\n");
return -ENOMEM;
}
- hose->arch_data = dev;
hose->first_busno = bus_range ? bus_range[0] : 0;
hose->last_busno = bus_range ? bus_range[1] : 0xff;
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index 80cfb4a..d5a9c9f 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -9,9 +9,6 @@
struct device_node;
struct pci_controller;
-/* Allocate a new PCI host bridge structure */
-extern struct pci_controller* pcibios_alloc_controller(void);
-
/* Get the PCI host controller for a bus */
extern struct pci_controller* pci_bus_to_hose(int bus);
@@ -232,8 +229,6 @@ static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
return PCI_DN(busdn)->phb;
}
-extern struct pci_controller *
-pcibios_alloc_controller(struct device_node *dev);
extern void pcibios_free_controller(struct pci_controller *phb);
extern void isa_bridge_find_early(struct pci_controller *hose);
@@ -263,6 +258,9 @@ extern void
pci_process_bridge_OF_ranges(struct pci_controller *hose,
struct device_node *dev, int primary);
+/* Allocate a new PCI host bridge structure */
+extern struct pci_controller *
+pcibios_alloc_controller(struct device_node *dev);
#ifdef CONFIG_PCI
extern unsigned long pci_address_to_pio(phys_addr_t address);
#else
--
1.5.2.1
^ permalink raw reply related
* [PATCH 6/8] [POWERPC] Move pci_bus_to_hose users to pci_bus_to_host
From: Kumar Gala @ 2007-06-27 18:19 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <11829683691025-git-send-email-galak@kernel.crashing.org>
In the places we can move to using pci_bus_to_host, this allows us
to make pci_bus_to_host static and remove its export.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/kernel/pci_32.c | 8 ++++----
arch/powerpc/kernel/ppc_ksyms.c | 1 -
arch/powerpc/platforms/86xx/pci.c | 2 +-
include/asm-powerpc/pci-bridge.h | 3 ---
4 files changed, 5 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index df3251c..c81ffa2 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -766,7 +766,7 @@ static struct device_node *scan_OF_for_pci_bus(struct pci_bus *bus)
/* Are we a root bus ? */
if (bus->self == NULL || bus->parent == NULL) {
- struct pci_controller *hose = pci_bus_to_hose(bus->number);
+ struct pci_controller *hose = pci_bus_to_host(bus);
if (hose == NULL)
return NULL;
return of_node_get(hose->arch_data);
@@ -1492,7 +1492,7 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
return 0;
}
-struct pci_controller*
+static struct pci_controller*
pci_bus_to_hose(int bus)
{
struct pci_controller* hose = hose_head;
@@ -1507,7 +1507,7 @@ static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
resource_size_t *offset,
enum pci_mmap_state mmap_state)
{
- struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
unsigned long io_offset = 0;
int i, res_bit;
@@ -1719,7 +1719,7 @@ void pci_resource_to_user(const struct pci_dev *dev, int bar,
const struct resource *rsrc,
resource_size_t *start, resource_size_t *end)
{
- struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
resource_size_t offset = 0;
if (hose == NULL)
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index c58f2de..e973c32 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -106,7 +106,6 @@ EXPORT_SYMBOL(isa_mem_base);
EXPORT_SYMBOL(pci_dram_offset);
EXPORT_SYMBOL(pci_alloc_consistent);
EXPORT_SYMBOL(pci_free_consistent);
-EXPORT_SYMBOL(pci_bus_to_hose);
#endif /* CONFIG_PCI */
EXPORT_SYMBOL(start_thread);
diff --git a/arch/powerpc/platforms/86xx/pci.c b/arch/powerpc/platforms/86xx/pci.c
index 5cb2188..73cd5b0 100644
--- a/arch/powerpc/platforms/86xx/pci.c
+++ b/arch/powerpc/platforms/86xx/pci.c
@@ -145,7 +145,7 @@ static void __devinit quirk_fsl_pcie_transparent(struct pci_dev *dev)
*/
dev->transparent = 1;
- hose = pci_bus_to_hose(dev->bus->number);
+ hose = pci_bus_to_host(dev->bus);
if (!hose) {
printk(KERN_ERR "Can't find hose for bus %d\n",
dev->bus->number);
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index d5a9c9f..69ea865 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -9,9 +9,6 @@
struct device_node;
struct pci_controller;
-/* Get the PCI host controller for a bus */
-extern struct pci_controller* pci_bus_to_hose(int bus);
-
/*
* Structure of a PCI controller (host bridge)
*/
--
1.5.2.1
^ permalink raw reply related
* [PATCH 7/8] [POWERPC] Move common PCI code out of pci_32/pci_64
From: Kumar Gala @ 2007-06-27 18:19 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <11829683713322-git-send-email-galak@kernel.crashing.org>
Moved the low hanging fruit that was either identical or close
to it between ppc32 & ppc64 for PCI into pci-common.c
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/kernel/pci-common.c | 314 ++++++++++++++++++++++++++++++++++++++
arch/powerpc/kernel/pci_32.c | 294 -----------------------------------
arch/powerpc/kernel/pci_64.c | 309 -------------------------------------
3 files changed, 314 insertions(+), 603 deletions(-)
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 3ca8cfb..b518b88 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -51,3 +51,317 @@ int pci_domain_nr(struct pci_bus *bus)
}
EXPORT_SYMBOL(pci_domain_nr);
+
+#ifdef CONFIG_PPC_OF
+static ssize_t pci_show_devspec(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct pci_dev *pdev;
+ struct device_node *np;
+
+ pdev = to_pci_dev (dev);
+ np = pci_device_to_OF_node(pdev);
+ if (np == NULL || np->full_name == NULL)
+ return 0;
+ return sprintf(buf, "%s", np->full_name);
+}
+static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
+#endif /* CONFIG_PPC_OF */
+
+/* Add sysfs properties */
+void pcibios_add_platform_entries(struct pci_dev *pdev)
+{
+#ifdef CONFIG_PPC_OF
+ device_create_file(&pdev->dev, &dev_attr_devspec);
+#endif /* CONFIG_PPC_OF */
+}
+
+char __init *pcibios_setup(char *str)
+{
+ return str;
+}
+
+/*
+ * Reads the interrupt pin to determine if interrupt is use by card.
+ * If the interrupt is used, then gets the interrupt line from the
+ * openfirmware and sets it in the pci_dev and pci_config line.
+ */
+int pci_read_irq_line(struct pci_dev *pci_dev)
+{
+ struct of_irq oirq;
+ unsigned int virq;
+
+ DBG("Try to map irq for %s...\n", pci_name(pci_dev));
+
+#ifdef DEBUG
+ memset(&oirq, 0xff, sizeof(oirq));
+#endif
+ /* Try to get a mapping from the device-tree */
+ if (of_irq_map_pci(pci_dev, &oirq)) {
+ u8 line, pin;
+
+ /* If that fails, lets fallback to what is in the config
+ * space and map that through the default controller. We
+ * also set the type to level low since that's what PCI
+ * interrupts are. If your platform does differently, then
+ * either provide a proper interrupt tree or don't use this
+ * function.
+ */
+ if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin))
+ return -1;
+ if (pin == 0)
+ return -1;
+ if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) ||
+ line == 0xff) {
+ return -1;
+ }
+ DBG(" -> no map ! Using irq line %d from PCI config\n", line);
+
+ virq = irq_create_mapping(NULL, line);
+ if (virq != NO_IRQ)
+ set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
+ } else {
+ DBG(" -> got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
+ oirq.size, oirq.specifier[0], oirq.specifier[1],
+ oirq.controller->full_name);
+
+ virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
+ oirq.size);
+ }
+ if(virq == NO_IRQ) {
+ DBG(" -> failed to map !\n");
+ return -1;
+ }
+
+ DBG(" -> mapped to linux irq %d\n", virq);
+
+ pci_dev->irq = virq;
+
+ return 0;
+}
+EXPORT_SYMBOL(pci_read_irq_line);
+
+/*
+ * Platform support for /proc/bus/pci/X/Y mmap()s,
+ * modelled on the sparc64 implementation by Dave Miller.
+ * -- paulus.
+ */
+
+/*
+ * Adjust vm_pgoff of VMA such that it is the physical page offset
+ * corresponding to the 32-bit pci bus offset for DEV requested by the user.
+ *
+ * Basically, the user finds the base address for his device which he wishes
+ * to mmap. They read the 32-bit value from the config space base register,
+ * add whatever PAGE_SIZE multiple offset they wish, and feed this into the
+ * offset parameter of mmap on /proc/bus/pci/XXX for that device.
+ *
+ * Returns negative error code on failure, zero on success.
+ */
+static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
+ resource_size_t *offset,
+ enum pci_mmap_state mmap_state)
+{
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
+ unsigned long io_offset = 0;
+ int i, res_bit;
+
+ if (hose == 0)
+ return NULL; /* should never happen */
+
+ /* If memory, add on the PCI bridge address offset */
+ if (mmap_state == pci_mmap_mem) {
+#if 0 /* See comment in pci_resource_to_user() for why this is disabled */
+ *offset += hose->pci_mem_offset;
+#endif
+ res_bit = IORESOURCE_MEM;
+ } else {
+ io_offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+ *offset += io_offset;
+ res_bit = IORESOURCE_IO;
+ }
+
+ /*
+ * Check that the offset requested corresponds to one of the
+ * resources of the device.
+ */
+ for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
+ struct resource *rp = &dev->resource[i];
+ int flags = rp->flags;
+
+ /* treat ROM as memory (should be already) */
+ if (i == PCI_ROM_RESOURCE)
+ flags |= IORESOURCE_MEM;
+
+ /* Active and same type? */
+ if ((flags & res_bit) == 0)
+ continue;
+
+ /* In the range of this resource? */
+ if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end)
+ continue;
+
+ /* found it! construct the final physical address */
+ if (mmap_state == pci_mmap_io)
+ *offset += hose->io_base_phys - io_offset;
+ return rp;
+ }
+
+ return NULL;
+}
+
+/*
+ * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
+ * device mapping.
+ */
+static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
+ pgprot_t protection,
+ enum pci_mmap_state mmap_state,
+ int write_combine)
+{
+ unsigned long prot = pgprot_val(protection);
+
+ /* Write combine is always 0 on non-memory space mappings. On
+ * memory space, if the user didn't pass 1, we check for a
+ * "prefetchable" resource. This is a bit hackish, but we use
+ * this to workaround the inability of /sysfs to provide a write
+ * combine bit
+ */
+ if (mmap_state != pci_mmap_mem)
+ write_combine = 0;
+ else if (write_combine == 0) {
+ if (rp->flags & IORESOURCE_PREFETCH)
+ write_combine = 1;
+ }
+
+ /* XXX would be nice to have a way to ask for write-through */
+ prot |= _PAGE_NO_CACHE;
+ if (write_combine)
+ prot &= ~_PAGE_GUARDED;
+ else
+ prot |= _PAGE_GUARDED;
+
+ return __pgprot(prot);
+}
+
+/*
+ * This one is used by /dev/mem and fbdev who have no clue about the
+ * PCI device, it tries to find the PCI device first and calls the
+ * above routine
+ */
+pgprot_t pci_phys_mem_access_prot(struct file *file,
+ unsigned long pfn,
+ unsigned long size,
+ pgprot_t protection)
+{
+ struct pci_dev *pdev = NULL;
+ struct resource *found = NULL;
+ unsigned long prot = pgprot_val(protection);
+ unsigned long offset = pfn << PAGE_SHIFT;
+ int i;
+
+ if (page_is_ram(pfn))
+ return __pgprot(prot);
+
+ prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
+
+ for_each_pci_dev(pdev) {
+ for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
+ struct resource *rp = &pdev->resource[i];
+ int flags = rp->flags;
+
+ /* Active and same type? */
+ if ((flags & IORESOURCE_MEM) == 0)
+ continue;
+ /* In the range of this resource? */
+ if (offset < (rp->start & PAGE_MASK) ||
+ offset > rp->end)
+ continue;
+ found = rp;
+ break;
+ }
+ if (found)
+ break;
+ }
+ if (found) {
+ if (found->flags & IORESOURCE_PREFETCH)
+ prot &= ~_PAGE_GUARDED;
+ pci_dev_put(pdev);
+ }
+
+ DBG("non-PCI map for %lx, prot: %lx\n", offset, prot);
+
+ return __pgprot(prot);
+}
+
+
+/*
+ * Perform the actual remap of the pages for a PCI device mapping, as
+ * appropriate for this architecture. The region in the process to map
+ * is described by vm_start and vm_end members of VMA, the base physical
+ * address is found in vm_pgoff.
+ * The pci device structure is provided so that architectures may make mapping
+ * decisions on a per-device or per-bus basis.
+ *
+ * Returns a negative error code on failure, zero on success.
+ */
+int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
+ enum pci_mmap_state mmap_state, int write_combine)
+{
+ resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT;
+ struct resource *rp;
+ int ret;
+
+ rp = __pci_mmap_make_offset(dev, &offset, mmap_state);
+ if (rp == NULL)
+ return -EINVAL;
+
+ vma->vm_pgoff = offset >> PAGE_SHIFT;
+ vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp,
+ vma->vm_page_prot,
+ mmap_state, write_combine);
+
+ ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
+ vma->vm_end - vma->vm_start, vma->vm_page_prot);
+
+ return ret;
+}
+
+void pci_resource_to_user(const struct pci_dev *dev, int bar,
+ const struct resource *rsrc,
+ resource_size_t *start, resource_size_t *end)
+{
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
+ resource_size_t offset = 0;
+
+ if (hose == NULL)
+ return;
+
+ if (rsrc->flags & IORESOURCE_IO)
+ offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+
+ /* We pass a fully fixed up address to userland for MMIO instead of
+ * a BAR value because X is lame and expects to be able to use that
+ * to pass to /dev/mem !
+ *
+ * That means that we'll have potentially 64 bits values where some
+ * userland apps only expect 32 (like X itself since it thinks only
+ * Sparc has 64 bits MMIO) but if we don't do that, we break it on
+ * 32 bits CHRPs :-(
+ *
+ * Hopefully, the sysfs insterface is immune to that gunk. Once X
+ * has been fixed (and the fix spread enough), we can re-enable the
+ * 2 lines below and pass down a BAR value to userland. In that case
+ * we'll also have to re-enable the matching code in
+ * __pci_mmap_make_offset().
+ *
+ * BenH.
+ */
+#if 0
+ else if (rsrc->flags & IORESOURCE_MEM)
+ offset = hose->pci_mem_offset;
+#endif
+
+ *start = rsrc->start - offset;
+ *end = rsrc->end - offset;
+}
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index c81ffa2..3dd931e 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -1028,34 +1028,12 @@ pci_create_OF_bus_map(void)
}
}
-static ssize_t pci_show_devspec(struct device *dev, struct device_attribute *attr, char *buf)
-{
- struct pci_dev *pdev;
- struct device_node *np;
-
- pdev = to_pci_dev (dev);
- np = pci_device_to_OF_node(pdev);
- if (np == NULL || np->full_name == NULL)
- return 0;
- return sprintf(buf, "%s", np->full_name);
-}
-static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
-
#else /* CONFIG_PPC_OF */
void pcibios_make_OF_bus_map(void)
{
}
#endif /* CONFIG_PPC_OF */
-/* Add sysfs properties */
-void pcibios_add_platform_entries(struct pci_dev *pdev)
-{
-#ifdef CONFIG_PPC_OF
- device_create_file(&pdev->dev, &dev_attr_devspec);
-#endif /* CONFIG_PPC_OF */
-}
-
-
#ifdef CONFIG_PPC_PMAC
/*
* This set of routines checks for PCI<->PCI bridges that have closed
@@ -1390,11 +1368,6 @@ void __init pcibios_fixup_bus(struct pci_bus *bus)
}
}
-char __init *pcibios_setup(char *str)
-{
- return str;
-}
-
/* the next one is stolen from the alpha port... */
void __init
pcibios_update_irq(struct pci_dev *dev, int irq)
@@ -1403,64 +1376,6 @@ pcibios_update_irq(struct pci_dev *dev, int irq)
/* XXX FIXME - update OF device tree node interrupt property */
}
-#ifdef CONFIG_PPC_MERGE
-/* XXX This is a copy of the ppc64 version. This is temporary until we start
- * merging the 2 PCI layers
- */
-/*
- * Reads the interrupt pin to determine if interrupt is use by card.
- * If the interrupt is used, then gets the interrupt line from the
- * openfirmware and sets it in the pci_dev and pci_config line.
- */
-int pci_read_irq_line(struct pci_dev *pci_dev)
-{
- struct of_irq oirq;
- unsigned int virq;
-
- DBG("Try to map irq for %s...\n", pci_name(pci_dev));
-
- /* Try to get a mapping from the device-tree */
- if (of_irq_map_pci(pci_dev, &oirq)) {
- u8 line, pin;
-
- /* If that fails, lets fallback to what is in the config
- * space and map that through the default controller. We
- * also set the type to level low since that's what PCI
- * interrupts are. If your platform does differently, then
- * either provide a proper interrupt tree or don't use this
- * function.
- */
- if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin))
- return -1;
- if (pin == 0)
- return -1;
- if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) ||
- line == 0xff) {
- return -1;
- }
- DBG(" -> no map ! Using irq line %d from PCI config\n", line);
-
- virq = irq_create_mapping(NULL, line);
- if (virq != NO_IRQ)
- set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
- } else {
- DBG(" -> got one, spec %d cells (0x%08x...) on %s\n",
- oirq.size, oirq.specifier[0], oirq.controller->full_name);
-
- virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
- oirq.size);
- }
- if(virq == NO_IRQ) {
- DBG(" -> failed to map !\n");
- return -1;
- }
- pci_dev->irq = virq;
-
- return 0;
-}
-EXPORT_SYMBOL(pci_read_irq_line);
-#endif /* CONFIG_PPC_MERGE */
-
int pcibios_enable_device(struct pci_dev *dev, int mask)
{
u16 cmd, old_cmd;
@@ -1503,176 +1418,6 @@ pci_bus_to_hose(int bus)
return NULL;
}
-static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
- resource_size_t *offset,
- enum pci_mmap_state mmap_state)
-{
- struct pci_controller *hose = pci_bus_to_host(dev->bus);
- unsigned long io_offset = 0;
- int i, res_bit;
-
- if (hose == 0)
- return NULL; /* should never happen */
-
- /* If memory, add on the PCI bridge address offset */
- if (mmap_state == pci_mmap_mem) {
-#if 0 /* See comment in pci_resource_to_user() for why this is disabled */
- *offset += hose->pci_mem_offset;
-#endif
- res_bit = IORESOURCE_MEM;
- } else {
- io_offset = hose->io_base_virt - (void __iomem *)_IO_BASE;
- *offset += io_offset;
- res_bit = IORESOURCE_IO;
- }
-
- /*
- * Check that the offset requested corresponds to one of the
- * resources of the device.
- */
- for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
- struct resource *rp = &dev->resource[i];
- int flags = rp->flags;
-
- /* treat ROM as memory (should be already) */
- if (i == PCI_ROM_RESOURCE)
- flags |= IORESOURCE_MEM;
-
- /* Active and same type? */
- if ((flags & res_bit) == 0)
- continue;
-
- /* In the range of this resource? */
- if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end)
- continue;
-
- /* found it! construct the final physical address */
- if (mmap_state == pci_mmap_io)
- *offset += hose->io_base_phys - io_offset;
- return rp;
- }
-
- return NULL;
-}
-
-/*
- * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
- * device mapping.
- */
-static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
- pgprot_t protection,
- enum pci_mmap_state mmap_state,
- int write_combine)
-{
- unsigned long prot = pgprot_val(protection);
-
- /* Write combine is always 0 on non-memory space mappings. On
- * memory space, if the user didn't pass 1, we check for a
- * "prefetchable" resource. This is a bit hackish, but we use
- * this to workaround the inability of /sysfs to provide a write
- * combine bit
- */
- if (mmap_state != pci_mmap_mem)
- write_combine = 0;
- else if (write_combine == 0) {
- if (rp->flags & IORESOURCE_PREFETCH)
- write_combine = 1;
- }
-
- /* XXX would be nice to have a way to ask for write-through */
- prot |= _PAGE_NO_CACHE;
- if (write_combine)
- prot &= ~_PAGE_GUARDED;
- else
- prot |= _PAGE_GUARDED;
-
- return __pgprot(prot);
-}
-
-/*
- * This one is used by /dev/mem and fbdev who have no clue about the
- * PCI device, it tries to find the PCI device first and calls the
- * above routine
- */
-pgprot_t pci_phys_mem_access_prot(struct file *file,
- unsigned long pfn,
- unsigned long size,
- pgprot_t protection)
-{
- struct pci_dev *pdev = NULL;
- struct resource *found = NULL;
- unsigned long prot = pgprot_val(protection);
- unsigned long offset = pfn << PAGE_SHIFT;
- int i;
-
- if (page_is_ram(pfn))
- return __pgprot(prot);
-
- prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
-
- for_each_pci_dev(pdev) {
- for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
- struct resource *rp = &pdev->resource[i];
- int flags = rp->flags;
-
- /* Active and same type? */
- if ((flags & IORESOURCE_MEM) == 0)
- continue;
- /* In the range of this resource? */
- if (offset < (rp->start & PAGE_MASK) ||
- offset > rp->end)
- continue;
- found = rp;
- break;
- }
- if (found)
- break;
- }
- if (found) {
- if (found->flags & IORESOURCE_PREFETCH)
- prot &= ~_PAGE_GUARDED;
- pci_dev_put(pdev);
- }
-
- DBG("non-PCI map for %lx, prot: %lx\n", offset, prot);
-
- return __pgprot(prot);
-}
-
-
-/*
- * Perform the actual remap of the pages for a PCI device mapping, as
- * appropriate for this architecture. The region in the process to map
- * is described by vm_start and vm_end members of VMA, the base physical
- * address is found in vm_pgoff.
- * The pci device structure is provided so that architectures may make mapping
- * decisions on a per-device or per-bus basis.
- *
- * Returns a negative error code on failure, zero on success.
- */
-int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
- enum pci_mmap_state mmap_state,
- int write_combine)
-{
- resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT;
- struct resource *rp;
- int ret;
-
- rp = __pci_mmap_make_offset(dev, &offset, mmap_state);
- if (rp == NULL)
- return -EINVAL;
-
- vma->vm_pgoff = offset >> PAGE_SHIFT;
- vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp,
- vma->vm_page_prot,
- mmap_state, write_combine);
-
- ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
- vma->vm_end - vma->vm_start, vma->vm_page_prot);
-
- return ret;
-}
-
/* Provide information on locations of various I/O regions in physical
* memory. Do this on a per-card basis so that we choose the right
* root bridge.
@@ -1715,45 +1460,6 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
return result;
}
-void pci_resource_to_user(const struct pci_dev *dev, int bar,
- const struct resource *rsrc,
- resource_size_t *start, resource_size_t *end)
-{
- struct pci_controller *hose = pci_bus_to_host(dev->bus);
- resource_size_t offset = 0;
-
- if (hose == NULL)
- return;
-
- if (rsrc->flags & IORESOURCE_IO)
- offset = (unsigned long)hose->io_base_virt - _IO_BASE;
-
- /* We pass a fully fixed up address to userland for MMIO instead of
- * a BAR value because X is lame and expects to be able to use that
- * to pass to /dev/mem !
- *
- * That means that we'll have potentially 64 bits values where some
- * userland apps only expect 32 (like X itself since it thinks only
- * Sparc has 64 bits MMIO) but if we don't do that, we break it on
- * 32 bits CHRPs :-(
- *
- * Hopefully, the sysfs insterface is immune to that gunk. Once X
- * has been fixed (and the fix spread enough), we can re-enable the
- * 2 lines below and pass down a BAR value to userland. In that case
- * we'll also have to re-enable the matching code in
- * __pci_mmap_make_offset().
- *
- * BenH.
- */
-#if 0
- else if (rsrc->flags & IORESOURCE_MEM)
- offset = hose->pci_mem_offset;
-#endif
-
- *start = rsrc->start - offset;
- *end = rsrc->end - offset;
-}
-
unsigned long pci_address_to_pio(phys_addr_t address)
{
struct pci_controller* hose = hose_head;
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 23494fe..7a9a4fc 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -601,11 +601,6 @@ static int __init pcibios_init(void)
subsys_initcall(pcibios_init);
-char __init *pcibios_setup(char *str)
-{
- return str;
-}
-
int pcibios_enable_device(struct pci_dev *dev, int mask)
{
u16 cmd, oldcmd;
@@ -647,211 +642,6 @@ int pci_proc_domain(struct pci_bus *bus)
}
}
-/*
- * Platform support for /proc/bus/pci/X/Y mmap()s,
- * modelled on the sparc64 implementation by Dave Miller.
- * -- paulus.
- */
-
-/*
- * Adjust vm_pgoff of VMA such that it is the physical page offset
- * corresponding to the 32-bit pci bus offset for DEV requested by the user.
- *
- * Basically, the user finds the base address for his device which he wishes
- * to mmap. They read the 32-bit value from the config space base register,
- * add whatever PAGE_SIZE multiple offset they wish, and feed this into the
- * offset parameter of mmap on /proc/bus/pci/XXX for that device.
- *
- * Returns negative error code on failure, zero on success.
- */
-static struct resource *__pci_mmap_make_offset(struct pci_dev *dev,
- resource_size_t *offset,
- enum pci_mmap_state mmap_state)
-{
- struct pci_controller *hose = pci_bus_to_host(dev->bus);
- unsigned long io_offset = 0;
- int i, res_bit;
-
- if (hose == 0)
- return NULL; /* should never happen */
-
- /* If memory, add on the PCI bridge address offset */
- if (mmap_state == pci_mmap_mem) {
-#if 0 /* See comment in pci_resource_to_user() for why this is disabled */
- *offset += hose->pci_mem_offset;
-#endif
- res_bit = IORESOURCE_MEM;
- } else {
- io_offset = (unsigned long)hose->io_base_virt - _IO_BASE;
- *offset += io_offset;
- res_bit = IORESOURCE_IO;
- }
-
- /*
- * Check that the offset requested corresponds to one of the
- * resources of the device.
- */
- for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
- struct resource *rp = &dev->resource[i];
- int flags = rp->flags;
-
- /* treat ROM as memory (should be already) */
- if (i == PCI_ROM_RESOURCE)
- flags |= IORESOURCE_MEM;
-
- /* Active and same type? */
- if ((flags & res_bit) == 0)
- continue;
-
- /* In the range of this resource? */
- if (*offset < (rp->start & PAGE_MASK) || *offset > rp->end)
- continue;
-
- /* found it! construct the final physical address */
- if (mmap_state == pci_mmap_io)
- *offset += hose->io_base_phys - io_offset;
- return rp;
- }
-
- return NULL;
-}
-
-/*
- * Set vm_page_prot of VMA, as appropriate for this architecture, for a pci
- * device mapping.
- */
-static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
- pgprot_t protection,
- enum pci_mmap_state mmap_state,
- int write_combine)
-{
- unsigned long prot = pgprot_val(protection);
-
- /* Write combine is always 0 on non-memory space mappings. On
- * memory space, if the user didn't pass 1, we check for a
- * "prefetchable" resource. This is a bit hackish, but we use
- * this to workaround the inability of /sysfs to provide a write
- * combine bit
- */
- if (mmap_state != pci_mmap_mem)
- write_combine = 0;
- else if (write_combine == 0) {
- if (rp->flags & IORESOURCE_PREFETCH)
- write_combine = 1;
- }
-
- /* XXX would be nice to have a way to ask for write-through */
- prot |= _PAGE_NO_CACHE;
- if (write_combine)
- prot &= ~_PAGE_GUARDED;
- else
- prot |= _PAGE_GUARDED;
-
- return __pgprot(prot);
-}
-
-/*
- * This one is used by /dev/mem and fbdev who have no clue about the
- * PCI device, it tries to find the PCI device first and calls the
- * above routine
- */
-pgprot_t pci_phys_mem_access_prot(struct file *file,
- unsigned long pfn,
- unsigned long size,
- pgprot_t protection)
-{
- struct pci_dev *pdev = NULL;
- struct resource *found = NULL;
- unsigned long prot = pgprot_val(protection);
- unsigned long offset = pfn << PAGE_SHIFT;
- int i;
-
- if (page_is_ram(pfn))
- return __pgprot(prot);
-
- prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
-
- for_each_pci_dev(pdev) {
- for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
- struct resource *rp = &pdev->resource[i];
- int flags = rp->flags;
-
- /* Active and same type? */
- if ((flags & IORESOURCE_MEM) == 0)
- continue;
- /* In the range of this resource? */
- if (offset < (rp->start & PAGE_MASK) ||
- offset > rp->end)
- continue;
- found = rp;
- break;
- }
- if (found)
- break;
- }
- if (found) {
- if (found->flags & IORESOURCE_PREFETCH)
- prot &= ~_PAGE_GUARDED;
- pci_dev_put(pdev);
- }
-
- DBG("non-PCI map for %lx, prot: %lx\n", offset, prot);
-
- return __pgprot(prot);
-}
-
-
-/*
- * Perform the actual remap of the pages for a PCI device mapping, as
- * appropriate for this architecture. The region in the process to map
- * is described by vm_start and vm_end members of VMA, the base physical
- * address is found in vm_pgoff.
- * The pci device structure is provided so that architectures may make mapping
- * decisions on a per-device or per-bus basis.
- *
- * Returns a negative error code on failure, zero on success.
- */
-int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
- enum pci_mmap_state mmap_state, int write_combine)
-{
- resource_size_t offset = vma->vm_pgoff << PAGE_SHIFT;
- struct resource *rp;
- int ret;
-
- rp = __pci_mmap_make_offset(dev, &offset, mmap_state);
- if (rp == NULL)
- return -EINVAL;
-
- vma->vm_pgoff = offset >> PAGE_SHIFT;
- vma->vm_page_prot = __pci_mmap_set_pgprot(dev, rp,
- vma->vm_page_prot,
- mmap_state, write_combine);
-
- ret = remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
- vma->vm_end - vma->vm_start, vma->vm_page_prot);
-
- return ret;
-}
-
-static ssize_t pci_show_devspec(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct pci_dev *pdev;
- struct device_node *np;
-
- pdev = to_pci_dev (dev);
- np = pci_device_to_OF_node(pdev);
- if (np == NULL || np->full_name == NULL)
- return 0;
- return sprintf(buf, "%s", np->full_name);
-}
-static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
-
-void pcibios_add_platform_entries(struct pci_dev *pdev)
-{
- device_create_file(&pdev->dev, &dev_attr_devspec);
-}
-
void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
struct device_node *dev, int prim)
{
@@ -1167,105 +957,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
}
EXPORT_SYMBOL(pcibios_fixup_bus);
-/*
- * Reads the interrupt pin to determine if interrupt is use by card.
- * If the interrupt is used, then gets the interrupt line from the
- * openfirmware and sets it in the pci_dev and pci_config line.
- */
-int pci_read_irq_line(struct pci_dev *pci_dev)
-{
- struct of_irq oirq;
- unsigned int virq;
-
- DBG("Try to map irq for %s...\n", pci_name(pci_dev));
-
-#ifdef DEBUG
- memset(&oirq, 0xff, sizeof(oirq));
-#endif
- /* Try to get a mapping from the device-tree */
- if (of_irq_map_pci(pci_dev, &oirq)) {
- u8 line, pin;
-
- /* If that fails, lets fallback to what is in the config
- * space and map that through the default controller. We
- * also set the type to level low since that's what PCI
- * interrupts are. If your platform does differently, then
- * either provide a proper interrupt tree or don't use this
- * function.
- */
- if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_PIN, &pin))
- return -1;
- if (pin == 0)
- return -1;
- if (pci_read_config_byte(pci_dev, PCI_INTERRUPT_LINE, &line) ||
- line == 0xff) {
- return -1;
- }
- DBG(" -> no map ! Using irq line %d from PCI config\n", line);
-
- virq = irq_create_mapping(NULL, line);
- if (virq != NO_IRQ)
- set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
- } else {
- DBG(" -> got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
- oirq.size, oirq.specifier[0], oirq.specifier[1],
- oirq.controller->full_name);
-
- virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
- oirq.size);
- }
- if(virq == NO_IRQ) {
- DBG(" -> failed to map !\n");
- return -1;
- }
-
- DBG(" -> mapped to linux irq %d\n", virq);
-
- pci_dev->irq = virq;
-
- return 0;
-}
-EXPORT_SYMBOL(pci_read_irq_line);
-
-void pci_resource_to_user(const struct pci_dev *dev, int bar,
- const struct resource *rsrc,
- resource_size_t *start, resource_size_t *end)
-{
- struct pci_controller *hose = pci_bus_to_host(dev->bus);
- resource_size_t offset = 0;
-
- if (hose == NULL)
- return;
-
- if (rsrc->flags & IORESOURCE_IO)
- offset = (unsigned long)hose->io_base_virt - _IO_BASE;
-
- /* We pass a fully fixed up address to userland for MMIO instead of
- * a BAR value because X is lame and expects to be able to use that
- * to pass to /dev/mem !
- *
- * That means that we'll have potentially 64 bits values where some
- * userland apps only expect 32 (like X itself since it thinks only
- * Sparc has 64 bits MMIO) but if we don't do that, we break it on
- * 32 bits CHRPs :-(
- *
- * Hopefully, the sysfs insterface is immune to that gunk. Once X
- * has been fixed (and the fix spread enough), we can re-enable the
- * 2 lines below and pass down a BAR value to userland. In that case
- * we'll also have to re-enable the matching code in
- * __pci_mmap_make_offset().
- *
- * BenH.
- */
-#if 0
- else if (rsrc->flags & IORESOURCE_MEM)
- offset = hose->pci_mem_offset;
-#endif
-
- *start = rsrc->start - offset;
- *end = rsrc->end - offset;
-}
-
struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node)
{
if (!have_of)
--
1.5.2.1
^ permalink raw reply related
* [PATCH 8/8] [POWERPC] Use ppc64 style list management for pci_controller on ppc32
From: Kumar Gala @ 2007-06-27 18:19 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <11829683733835-git-send-email-galak@kernel.crashing.org>
Use the ppc64 style list management and allocation functions for
pci_controllers. This makes the pci_controller structs just a bit more
common between ppc32 & ppc64.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/kernel/pci-common.c | 78 ++++++++++++++++++++++++++++++++++++++
arch/powerpc/kernel/pci_32.c | 61 +++++-------------------------
arch/powerpc/kernel/pci_64.c | 66 --------------------------------
include/asm-powerpc/pci-bridge.h | 11 +++--
4 files changed, 94 insertions(+), 122 deletions(-)
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index b518b88..295cbb1 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -36,6 +36,62 @@
#define DBG(fmt...)
#endif
+static DEFINE_SPINLOCK(hose_spinlock);
+
+/* XXX kill that some day ... */
+int global_phb_number; /* Global phb counter */
+
+extern struct list_head hose_list;
+
+/*
+ * pci_controller(phb) initialized common variables.
+ */
+static void __devinit pci_setup_pci_controller(struct pci_controller *hose)
+{
+ memset(hose, 0, sizeof(struct pci_controller));
+
+ spin_lock(&hose_spinlock);
+ hose->global_number = global_phb_number++;
+ list_add_tail(&hose->list_node, &hose_list);
+ spin_unlock(&hose_spinlock);
+}
+
+struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
+{
+ struct pci_controller *phb;
+
+ if (mem_init_done)
+ phb = kmalloc(sizeof(struct pci_controller), GFP_KERNEL);
+ else
+ phb = alloc_bootmem(sizeof (struct pci_controller));
+ if (phb == NULL)
+ return NULL;
+ pci_setup_pci_controller(phb);
+ phb->arch_data = dev;
+ phb->is_dynamic = mem_init_done;
+#ifdef CONFIG_PPC64
+ if (dev) {
+ int nid = of_node_to_nid(dev);
+
+ if (nid < 0 || !node_online(nid))
+ nid = -1;
+
+ PHB_SET_NODE(phb, nid);
+ }
+#endif
+ return phb;
+}
+
+void pcibios_free_controller(struct pci_controller *phb)
+{
+ spin_lock(&hose_spinlock);
+ list_del(&phb->list_node);
+ spin_unlock(&hose_spinlock);
+
+ if (phb->is_dynamic)
+ kfree(phb);
+}
+
/*
* Return the domain number for this bus.
*/
@@ -53,6 +109,28 @@ int pci_domain_nr(struct pci_bus *bus)
EXPORT_SYMBOL(pci_domain_nr);
#ifdef CONFIG_PPC_OF
+
+/* This routine is meant to be used early during boot, when the
+ * PCI bus numbers have not yet been assigned, and you need to
+ * issue PCI config cycles to an OF device.
+ * It could also be used to "fix" RTAS config cycles if you want
+ * to set pci_assign_all_buses to 1 and still use RTAS for PCI
+ * config cycles.
+ */
+struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node)
+{
+ if (!have_of)
+ return NULL;
+ while(node) {
+ struct pci_controller *hose, *tmp;
+ list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
+ if (hose->arch_data == node)
+ return hose;
+ node = node->parent;
+ }
+ return NULL;
+}
+
static ssize_t pci_show_devspec(struct device *dev,
struct device_attribute *attr, char *buf)
{
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index 3dd931e..10d8a35 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -55,8 +55,7 @@ static u8* pci_to_OF_bus_map;
*/
int pci_assign_all_buses;
-struct pci_controller* hose_head;
-struct pci_controller** hose_tail = &hose_head;
+LIST_HEAD(hose_list);
static int pci_bus_count;
@@ -607,25 +606,6 @@ pcibios_enable_resources(struct pci_dev *dev, int mask)
return 0;
}
-static int next_controller_index;
-
-struct pci_controller * __init
-pcibios_alloc_controller(struct device_node *dev)
-{
- struct pci_controller *hose;
-
- hose = (struct pci_controller *)alloc_bootmem(sizeof(*hose));
- memset(hose, 0, sizeof(struct pci_controller));
-
- *hose_tail = hose;
- hose_tail = &hose->next;
-
- hose->global_number = next_controller_index++;
- hose->arch_data = dev;
-
- return hose;
-}
-
#ifdef CONFIG_PPC_OF
/*
* Functions below are used on OpenFirmware machines.
@@ -671,7 +651,7 @@ void
pcibios_make_OF_bus_map(void)
{
int i;
- struct pci_controller* hose;
+ struct pci_controller *hose, *tmp;
struct property *map_prop;
struct device_node *dn;
@@ -688,7 +668,7 @@ pcibios_make_OF_bus_map(void)
pci_to_OF_bus_map[i] = 0xff;
/* For each hose, we begin searching bridges */
- for(hose=hose_head; hose; hose=hose->next) {
+ list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
struct device_node* node;
node = (struct device_node *)hose->arch_data;
if (!node)
@@ -819,27 +799,6 @@ pci_device_to_OF_node(struct pci_dev *dev)
}
EXPORT_SYMBOL(pci_device_to_OF_node);
-/* This routine is meant to be used early during boot, when the
- * PCI bus numbers have not yet been assigned, and you need to
- * issue PCI config cycles to an OF device.
- * It could also be used to "fix" RTAS config cycles if you want
- * to set pci_assign_all_buses to 1 and still use RTAS for PCI
- * config cycles.
- */
-struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node)
-{
- if (!have_of)
- return NULL;
- while(node) {
- struct pci_controller* hose;
- for (hose=hose_head;hose;hose=hose->next)
- if (hose->arch_data == node)
- return hose;
- node=node->parent;
- }
- return NULL;
-}
-
static int
find_OF_pci_device_filter(struct device_node* node, void* data)
{
@@ -1248,14 +1207,14 @@ pcibios_fixup_p2p_bridges(void)
static int __init
pcibios_init(void)
{
- struct pci_controller *hose;
+ struct pci_controller *hose, *tmp;
struct pci_bus *bus;
- int next_busno;
+ int next_busno = 0;
printk(KERN_INFO "PCI: Probing PCI hardware\n");
/* Scan all of the recorded PCI controllers. */
- for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
+ list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
if (pci_assign_all_buses)
hose->first_busno = next_busno;
hose->last_busno = 0xff;
@@ -1410,9 +1369,9 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
static struct pci_controller*
pci_bus_to_hose(int bus)
{
- struct pci_controller* hose = hose_head;
+ struct pci_controller *hose, *tmp;
- for (; hose; hose = hose->next)
+ list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
if (bus >= hose->first_busno && bus <= hose->last_busno)
return hose;
return NULL;
@@ -1462,9 +1421,9 @@ long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn)
unsigned long pci_address_to_pio(phys_addr_t address)
{
- struct pci_controller* hose = hose_head;
+ struct pci_controller *hose, *tmp;
- for (; hose; hose = hose->next) {
+ list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
unsigned int size = hose->io_resource.end -
hose->io_resource.start + 1;
if (address >= hose->io_base_phys &&
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 7a9a4fc..e386e3e 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -59,9 +59,6 @@ LIST_HEAD(hose_list);
static struct dma_mapping_ops *pci_dma_ops;
-/* XXX kill that some day ... */
-int global_phb_number; /* Global phb counter */
-
void set_pci_dma_ops(struct dma_mapping_ops *dma_ops)
{
pci_dma_ops = dma_ops;
@@ -172,55 +169,6 @@ void pcibios_align_resource(void *data, struct resource *res,
res->start = start;
}
-static DEFINE_SPINLOCK(hose_spinlock);
-
-/*
- * pci_controller(phb) initialized common variables.
- */
-static void __devinit pci_setup_pci_controller(struct pci_controller *hose)
-{
- memset(hose, 0, sizeof(struct pci_controller));
-
- spin_lock(&hose_spinlock);
- hose->global_number = global_phb_number++;
- list_add_tail(&hose->list_node, &hose_list);
- spin_unlock(&hose_spinlock);
-}
-
-struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
-{
- struct pci_controller *phb;
-
- if (mem_init_done)
- phb = kmalloc(sizeof(struct pci_controller), GFP_KERNEL);
- else
- phb = alloc_bootmem(sizeof (struct pci_controller));
- if (phb == NULL)
- return NULL;
- pci_setup_pci_controller(phb);
- phb->arch_data = dev;
- phb->is_dynamic = mem_init_done;
- if (dev) {
- int nid = of_node_to_nid(dev);
-
- if (nid < 0 || !node_online(nid))
- nid = -1;
-
- PHB_SET_NODE(phb, nid);
- }
- return phb;
-}
-
-void pcibios_free_controller(struct pci_controller *phb)
-{
- spin_lock(&hose_spinlock);
- list_del(&phb->list_node);
- spin_unlock(&hose_spinlock);
-
- if (phb->is_dynamic)
- kfree(phb);
-}
-
void __devinit pcibios_claim_one_bus(struct pci_bus *b)
{
struct pci_dev *dev;
@@ -957,20 +905,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
}
EXPORT_SYMBOL(pcibios_fixup_bus);
-struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node)
-{
- if (!have_of)
- return NULL;
- while(node) {
- struct pci_controller *hose, *tmp;
- list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
- if (hose->arch_data == node)
- return hose;
- node = node->parent;
- }
- return NULL;
-}
-
unsigned long pci_address_to_pio(phys_addr_t address)
{
struct pci_controller *hose, *tmp;
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index 69ea865..e72c2a6 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -2,9 +2,11 @@
#define _ASM_POWERPC_PCI_BRIDGE_H
#ifdef __KERNEL__
-#ifndef CONFIG_PPC64
-#include <linux/ioport.h>
#include <linux/pci.h>
+#include <linux/list.h>
+#include <linux/ioport.h>
+
+#ifndef CONFIG_PPC64
struct device_node;
struct pci_controller;
@@ -14,8 +16,9 @@ struct pci_controller;
*/
struct pci_controller {
struct pci_bus *bus;
+ char is_dynamic;
void *arch_data;
- struct pci_controller *next;
+ struct list_head list_node;
struct device *parent;
int first_busno;
@@ -84,8 +87,6 @@ extern void setup_grackle(struct pci_controller *hose);
#else
-#include <linux/pci.h>
-#include <linux/list.h>
/*
* This program is free software; you can redistribute it and/or
--
1.5.2.1
^ permalink raw reply related
* Re: booting linux-2.6.15 hang on custom mpc8555 board
From: Andy Fleming @ 2007-06-27 19:32 UTC (permalink / raw)
To: huangyun; +Cc: linuxppc-embedded
In-Reply-To: <OF7929EEAE.73E06DAF-ON48257306.0036AB63-48257306.0039FAD3@coship.com>
On Jun 26, 2007, at 05:33, huangyun@coship.com wrote:
>
> hi,everyone
> I have porting linux2.6.15 of eldk4.0 to my mpc8555 board, my
> bootloader
> is u-boot1.1.6, the uboot running is ok,but it hang at booting
> kernel.no
> any print message.
> I have check the CCSRBAR(0xe0000000) and bd_t struct is the same
> as linux
> kernel, my serial port use uart1. somebody help me! i'm a linux
> kernel
> newer.
What's your boot command line?
Andy
^ permalink raw reply
* Re: [PATCH 09/15] [POWERPC] 86xx: Add uli1575 pci-bridge sector to MPC8641HPCN dts file.
From: Andy Fleming @ 2007-06-27 19:57 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <11829070192461-git-send-email-galak@kernel.crashing.org>
On Jun 26, 2007, at 20:16, Kumar Gala wrote:
> From: Wade Farnsworth <wfarnsworth@mvista.com>
>
> This adds device nodes for the PCI bridges as well as the ISA
> devices on
> the newer revision MPC8641HPCN. It also adds the PCI ranges to the
> soc
> node so that address translation for the ISA devices works properly.
>
> - ranges = <0 f8000000 00100000>;
> - reg = <f8000000 00100000>; // CCSRBAR 1M
> + ranges = <00001000 f8001000 000ff000
[...]
> + reg = <f8000000 00001000>; // CCSRBAR
This can't be right, and I suspect it will break any kernel access to
the first 0x1000 bytes of the CCSR_BAR space. reg should actually
describe the register space of the SOC. If ranges needs to specify
that, too, they should be able to be redundant. But this looks like
a big hack, to me. Am I missing something?
Andy
^ permalink raw reply
* Re: [PATCH 09/15] [POWERPC] 86xx: Add uli1575 pci-bridge sector to MPC8641HPCN dts file.
From: Segher Boessenkool @ 2007-06-27 20:39 UTC (permalink / raw)
To: Andy Fleming; +Cc: linuxppc-dev
In-Reply-To: <C84F154C-EBC9-471F-A1E1-635A385E684A@freescale.com>
>> - ranges = <0 f8000000 00100000>;
>> - reg = <f8000000 00100000>; // CCSRBAR 1M
>> + ranges = <00001000 f8001000 000ff000
> [...]
>> + reg = <f8000000 00001000>; // CCSRBAR
>
> This can't be right, and I suspect it will break any kernel access to
> the first 0x1000 bytes of the CCSR_BAR space. reg should actually
> describe the register space of the SOC. If ranges needs to specify
> that, too, they should be able to be redundant. But this looks like
> a big hack, to me. Am I missing something?
"reg" and "ranges" can never overlap really.
Is this the special case where the PHB is visible in
PCI configuration space?
Or, please explain what CCSR_BAR is...
Segher
^ permalink raw reply
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