* Re: XSysAce driver cant mount DOS part
From: Grant Likely @ 2007-07-12 19:06 UTC (permalink / raw)
To: Robertson, Joseph M.; +Cc: linuxppc-embedded
In-Reply-To: <939D37AEB47F1F49B88FAB6599B6023501A17206@hsv1dafpew02.das.gov.sanm.corp>
On 7/12/07, Robertson, Joseph M. <joseph.robertson@sanmina-sci.com> wrote:
> RE: Tree.
> Its the mainline 2.6.17.1, with
> denx ppc patches from 4.0.0? IIRC.
> I redid the patch set for the xsysace to get a known baseline.
> Its a custom build system, which I developed over the years, ported to use
> a ppc405 crosscompiler I made from
> CrossTool-0.42. Its very similar to uClinux, but with a simpler config
> system.
> The compiler is gcc.3.4.1 with glibc 2.3.3 (yeah we use glibc).
Heh, so do I. So do a lot of people. glibc *is* for embedded
systems, regardless of what some may say. :-)
> The XsysAce patch is in the normal place, only change I made was to define
> the major number.
> And I moved xbasic_types.c/h to another folder onthe path since xilinx_iic
> drivers uses it too, and I was getting redefine errors.
> One thing I just thought of was I did not run the 'normal' config stuff,
> any deps in there?
> I can go look at the kconfigs and see.
>
> RE: Xilinx SysAce driver
> The HW group used Xilinx env 8.2.02i, and the project shows
> Sysace_compactflash driver: sysace_v1_01_a
Okay, so that's the old driver. There is a new driver that has
considerably better performance which you might want to try; but it
doesn't support insertion/removal yet. It is about to be pulled into
mainline, but you can get it here too:
http://article.gmane.org/gmane.linux.kernel/526293/match=xsysace+c
>
> The HW is a Virtex-4 with the embedded ppc405. The Xsysace chip is
> supposed tobe using irq_intr = 2.
>
> The system actually works fine using the Ext2 fs, but if we want to upgrade
> the fpga code, I need to be able to write to the dos part.
2.6.17 is rather old. You might be hitting an old bug. Virtex
support in the newer kernels is significantly better. Have you
considered upgrading? I've got a bunch of patches in my git tree that
add the TEMAC and other drivers to a more recent kernel. My internal
tree is based on 2.6.22; I'll try to update my external tree to match
in the next day or so:
http://git.secretlab.ca/cgi-bin/gitweb.cgi?h=virtex-dev;p=linux-2.6.git;a=shortlog
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH 1/4] Add DMA sector to Documentation/powerpc/booting-without-of.txt file.
From: Scott Wood @ 2007-07-12 19:10 UTC (permalink / raw)
To: pterry; +Cc: linuxppc-dev, paulus, Wei.Zhang
In-Reply-To: <1184260375.24515.35.camel@pterry-fc6.micromemory.com>
Phil Terry wrote:
> Say I'm writing a sound card, video card, widget card, etc., driver.
>
> My driver gets loaded by virtue of detecting the card/device (via of,
> pci, usb, platform, whatever bus mechanisms).
>
> My driver would benefit from using a generic DMA device so it uses the
> internal api to look for one and uses the API of that device to request
> a channel for its use. I don't care what channel I get, I don't need a
> fixed, reserved channel of the DMA device as specified in the dts I just
> need an unused channel. If no channels are available or I'm in a system
> with no generic DMA service available I can either fall back to
> processor copying or refuse to load.
The audio device example was not about using the DMA engine for generic
memory copying; it was about an audio device that is hardwired to a
certain DMA channel. There is no way to do audio without using that
specific channel.
> If the dts/of/boot loader tells the kernel its a fsl soc then it knows
> how to work out which one and what level, and therefore knows what
> devices, such as the DMA device are present.
All you'd be doing then is moving the device trees into the kernel. The
dtc syntax is a convenient way of expressing the information that has to
live *somewhere*.
> Quite why we are using a 20 year old spec, which was never finished, and
> ceased to be a formal spec 10 years ago as the "new" way forward is a
> puzzle to me as well.
Probably because there was already code there to support it. :-P
It's not that bad in most respects, though unlike some, I don't think we
need to stick dogmatically to the exact way that Open Firmware(tm) did
everything.
-Scott
^ permalink raw reply
* RE: XSysAce driver cant mount DOS part
From: Robertson, Joseph M. @ 2007-07-12 19:10 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <1184264800.22249.17.camel@jaalaptop>
[-- Attachment #1: Type: text/plain, Size: 2320 bytes --]
See answers to queries below.
Thanks,
Joe Robertson
Joseph.Robertson@sanmina-sci.com
-----Original Message-----
From: Jeff Angielski [mailto:jeff@theptrgroup.com]
Sent: Thu 7/12/2007 1:26 PM
To: Robertson, Joseph M.
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: XSysAce driver cant mount DOS part
On Thu, 2007-07-12 at 13:03 -0500, Robertson, Joseph M. wrote:
> Hi all,
>
> I've been workig with this for a while but have made no progress.
> Today I got the latest XSysAce patch for kernel 2.6.17.1 and applied
> it to get clean code.
> I inherited the previous code from another developer.
>
> My problem is that mounting the DOS partition always fails in a short
> time with a kernel oops.
Can you access that partition on your Linux host using a CF adapter?
Yes.
Can you access that partition from the uboot prompt?
Dunno, I don't think I have uboot set to let me do that.
precompiled setup, I'd have to work on it.
How did you format that partition? mkfs.msdos?
Yes, mkdosfs -F 16 /dev/sda1 (its a fat16, 32Mb partition)
--
Jeff Angielski
The PTR Group
www.theptrgroup.com
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^ permalink raw reply
* [PATCH 1/4] Make swsusp_32.S usable for suspend-to-RAM.
From: Scott Wood @ 2007-07-12 19:12 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
This allows platform suspend code to re-use the generic state saving
code, passing a pointer to the low-level suspend code.
The resume path is modified so that non-hibernate callers skip
hibernate-specific bits, and so that callers can specify that the MMU is
off (and thus BATs should be restored).
The _GLOBAL around swsusp_save_area is changed to .global, as the former
puts the data in the text section, which causes an oops with page
debugging enabled.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/Kconfig | 11 +++++++
arch/powerpc/kernel/Makefile | 2 +-
arch/powerpc/kernel/swsusp_32.S | 60 ++++++++++++++++++++++----------------
3 files changed, 47 insertions(+), 26 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index cbfbd98..c89873d 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -117,6 +117,17 @@ config DEFAULT_UIMAGE
Used to allow a board to specify it wants a uImage built by default
default n
+config PPC32_SUSPEND
+ bool
+ depends on PPC32
+ default n
+
+config PPC32_SWSUSP
+ bool
+ depends on PPC32 && SOFTWARE_SUSPEND
+ select PPC32_SUSPEND
+ default y
+
config PPC64_SWSUSP
bool
depends on PPC64 && (BROKEN || (PPC_PMAC64 && EXPERIMENTAL))
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 42c42ec..a4648d5 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -38,7 +38,7 @@ obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
obj-$(CONFIG_TAU) += tau_6xx.o
obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o suspend.o
-obj32-$(CONFIG_SOFTWARE_SUSPEND) += swsusp_32.o
+obj32-$(CONFIG_PPC32_SUSPEND) += swsusp_32.o
obj64-$(CONFIG_SOFTWARE_SUSPEND) += swsusp_64.o swsusp_asm64.o
obj32-$(CONFIG_MODULES) += module_32.o
diff --git a/arch/powerpc/kernel/swsusp_32.S b/arch/powerpc/kernel/swsusp_32.S
index 69e8f86..ed1c95b 100644
--- a/arch/powerpc/kernel/swsusp_32.S
+++ b/arch/powerpc/kernel/swsusp_32.S
@@ -33,15 +33,21 @@
.section .data
.align 5
-_GLOBAL(swsusp_save_area)
+ .global swsusp_save_area
+swsusp_save_area:
.space SL_SIZE
.section .text
.align 5
+#ifdef CONFIG_SOFTWARE_SUSPEND
_GLOBAL(swsusp_arch_suspend)
+ lis r3, swsusp_save@h
+ ori r3, r3, swsusp_save@l
+#endif
+_GLOBAL(do_suspend)
lis r11,swsusp_save_area@h
ori r11,r11,swsusp_save_area@l
@@ -64,8 +70,8 @@ _GLOBAL(swsusp_arch_suspend)
stw r4,SL_TB(r11)
mftb r5
stw r5,SL_TB+4(r11)
- mftbu r3
- cmpw r3,r4
+ mftbu r6
+ cmpw r6,r4
bne 1b
/* Save SPRGs */
@@ -119,7 +125,8 @@ _GLOBAL(swsusp_arch_suspend)
/* Call the low level suspend stuff (we should probably have made
* a stackframe...
*/
- bl swsusp_save
+ mtctr r3
+ bctrl
/* Restore LR from the save area */
lis r11,swsusp_save_area@h
@@ -129,7 +136,7 @@ _GLOBAL(swsusp_arch_suspend)
blr
-
+#ifdef CONFIG_SOFTWARE_SUSPEND
/* Resume code */
_GLOBAL(swsusp_arch_resume)
@@ -212,6 +219,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
bdnz 1b
sync
+ li r3, 0
+#endif
+
+ /* r3 = nonzero if the MMU is completely disabled and
+ * BATs may be restored, zero otherwise.
+ */
+_GLOBAL(do_resume)
/* Ok, we are now running with the kernel data of the old
* kernel fully restored. We can get to the save area
* easily now. As for the rest of the code, it assumes the
@@ -226,10 +240,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
bl __restore_cpu_setup
#endif
/* Restore the BATs, and SDR1. Then we can turn on the MMU.
- * This is a bit hairy as we are running out of those BATs,
- * but first, our code is probably in the icache, and we are
- * writing the same value to the BAT, so that should be fine,
- * though a better solution will have to be found long-term
+ * This can only be done when r3 != 0 (and thus the MMU is
+ * off).
*/
lwz r4,SL_SDR1(r11)
mtsdr1 r4
@@ -242,7 +254,9 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
lwz r4,SL_SPRG0+12(r11)
mtsprg 3,r4
-#if 0
+ cmpw r3, 0
+ beq 1f
+
lwz r4,SL_DBAT0(r11)
mtdbatu 0,r4
lwz r4,SL_DBAT0+4(r11)
@@ -275,8 +289,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
mtibatu 3,r4
lwz r4,SL_IBAT3+4(r11)
mtibatl 3,r4
-#endif
+1:
BEGIN_FTR_SECTION
li r4,0
mtspr SPRN_DBAT4U,r4
@@ -306,8 +320,16 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
/* restore the MSR and turn on the MMU */
lwz r3,SL_MSR(r11)
- bl turn_on_mmu
- tovirt(r11,r11)
+ lis r4, 1f@h
+ ori r4, r4, 1f@l
+
+ mtsrr0 r4
+ mtsrr1 r3
+ sync
+ isync
+ rfi
+
+1: tovirt(r11, r11)
/* Restore TB */
li r3,0
@@ -334,15 +356,3 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
li r3,0
blr
-
-/* FIXME:This construct is actually not useful since we don't shut
- * down the instruction MMU, we could just flip back MSR-DR on.
- */
-turn_on_mmu:
- mflr r4
- mtsrr0 r4
- mtsrr1 r3
- sync
- isync
- rfi
-
--
1.5.0.3
^ permalink raw reply related
* [PATCH 2/4] Implement arch disable/enable irq hooks.
From: Scott Wood @ 2007-07-12 19:12 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
In-Reply-To: <20070712191205.GA31358@ld0162-tx32.am.freescale.net>
These hooks ensure that a decrementer interrupt is not pending when
suspending; otherwise, problems may occur. For example, with deep sleep
on the 831x, a pending decrementer will cause a system freeze because the
SoC thinks the decrementer interrupt would have woken the system, but the
core must have interrupts disabled due to the setup required for deep
sleep.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/kernel/time.c | 41 +++++++++++++++++++++++++++++++++++++++++
include/asm-powerpc/machdep.h | 10 ++++++++++
2 files changed, 51 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index e5df167..253f46d 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -728,6 +728,47 @@ void wakeup_decrementer(void)
set_dec(ticks);
}
+#ifdef CONFIG_PM
+void generic_suspend_disable_irqs(void)
+{
+ preempt_disable();
+
+ /* Disable the decrementer, so that it doesn't interfere
+ * with suspending.
+ */
+
+ set_dec(0x7fffffff);
+ local_irq_disable();
+ set_dec(0x7fffffff);
+}
+
+void generic_suspend_enable_irqs(void)
+{
+ wakeup_decrementer();
+
+ local_irq_enable();
+ preempt_enable();
+}
+
+/* Overrides the weak version in kernel/power/main.c */
+void arch_suspend_disable_irqs(void)
+{
+ if (ppc_md.suspend_disable_irqs)
+ ppc_md.suspend_disable_irqs();
+ else
+ generic_suspend_disable_irqs();
+}
+
+/* Overrides the weak version in kernel/power/main.c */
+void arch_suspend_enable_irqs(void)
+{
+ if (ppc_md.suspend_enable_irqs)
+ ppc_md.suspend_enable_irqs();
+ else
+ generic_suspend_enable_irqs();
+}
+#endif
+
#ifdef CONFIG_SMP
void __init smp_space_timers(unsigned int max_cpus)
{
diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h
index 71c6e7e..492ecf3 100644
--- a/include/asm-powerpc/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -253,6 +253,16 @@ struct machdep_calls {
*/
void (*machine_kexec)(struct kimage *image);
#endif /* CONFIG_KEXEC */
+
+#ifdef CONFIG_PM
+ /* These are called to disable and enable, respectively, IRQs when
+ * entering a suspend state. If NULL, then the generic versions
+ * will be called. The generic versions disable/enable the
+ * decrementer along with interrupts.
+ */
+ void (*suspend_disable_irqs)(void);
+ void (*suspend_enable_irqs)(void);
+#endif
};
extern void power4_idle(void);
--
1.5.0.3
^ permalink raw reply related
* [PATCH 3/4] pm: Handle HID0_SLEEP in the TLF_NAPPING hack.
From: Scott Wood @ 2007-07-12 19:13 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
In-Reply-To: <20070712191205.GA31358@ld0162-tx32.am.freescale.net>
The e300 core (and probably most other 6xx chips) can only come out of
sleep mode with an interrupt. However, interrupts are logically disabled
by the power management layer.
This hack extends the existing doze/nap hack to also suppress the running
of the interrupt handler when in sleep mode.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/kernel/idle_6xx.S | 34 +++++++++++++++++++++++++++++++++-
1 files changed, 33 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S
index 01bcd52..f45d634 100644
--- a/arch/powerpc/kernel/idle_6xx.S
+++ b/arch/powerpc/kernel/idle_6xx.S
@@ -147,6 +147,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
isync
b 1b
+#ifdef CONFIG_PM
+ret_from_sleep:
+ .long ret_from_except
+ .long ret_from_except
+#endif
+
/*
* Return from NAP/DOZE mode, restore some CPU specific registers,
* we are called with DR/IR still off and r2 containing physical
@@ -154,7 +160,33 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
* address). We have to preserve r10.
*/
_GLOBAL(power_save_6xx_restore)
- lwz r9,_LINK(r11) /* interrupted in ppc6xx_idle: */
+#ifdef CONFIG_PM
+ mfspr r9, SPRN_HID0
+ andis. r9, r9, HID0_SLEEP@h
+ beq+ 1f
+
+ /*
+ * SLEEP mode is invoked through the PM subsystem, which means
+ * that interrupts should be disabled. However, the hardware
+ * requires them to be enabled to wake up. To prevent the
+ * interrupt from being visible to Linux, return immediately
+ * rather than run the interrupt handler.
+ */
+ lis r9, ret_from_sleep@h
+ ori r9, r9, ret_from_sleep@l
+ tophys(r9, r9)
+ mtlr r9
+
+ /*
+ * Disable interrupts, so that the interrupt doesn't happen
+ * again until the PM code sets MSR[EE].
+ */
+ lwz r9, _MSR(r11)
+ rlwinm r9, r9, 0, ~MSR_EE
+ stw r9, _MSR(r11)
+#endif
+
+1: lwz r9,_LINK(r11) /* interrupted in ppc6xx_idle: */
stw r9,_NIP(r11) /* make it do a blr */
#ifdef CONFIG_SMP
--
1.5.0.3
^ permalink raw reply related
* [PATCH 4/4] Add 6xx-style HID0_SLEEP support.
From: Scott Wood @ 2007-07-12 19:13 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
In-Reply-To: <20070712191205.GA31358@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/6xx-pm.S | 52 ++++++++++++++++++++++++++++++++++++++++++
arch/powerpc/sysdev/Makefile | 4 +++
include/asm-powerpc/mpc6xx.h | 6 +++++
3 files changed, 62 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/sysdev/6xx-pm.S
create mode 100644 include/asm-powerpc/mpc6xx.h
diff --git a/arch/powerpc/sysdev/6xx-pm.S b/arch/powerpc/sysdev/6xx-pm.S
new file mode 100644
index 0000000..976ee07
--- /dev/null
+++ b/arch/powerpc/sysdev/6xx-pm.S
@@ -0,0 +1,52 @@
+/*
+ * Enter and leave sleep state on chips with 6xx-style HID0
+ * power management bits.
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <asm/ppc_asm.h>
+#include <asm/reg.h>
+#include <asm/thread_info.h>
+#include <asm/asm-offsets.h>
+
+_GLOBAL(mpc6xx_enter_sleep)
+ mflr r4
+
+ mfspr r5, SPRN_HID0
+ rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP)
+ oris r5, r5, HID0_SLEEP@h
+ mtspr SPRN_HID0, r5
+ isync
+
+ lis r5, ret_from_sleep@h
+ ori r5, r5, ret_from_sleep@l
+ mtlr r5
+
+ rlwinm r5, r1, 0, 0, 31-THREAD_SHIFT
+ lwz r6, TI_LOCAL_FLAGS(r5)
+ ori r6, r6, _TLF_NAPPING
+ stw r6, TI_LOCAL_FLAGS(r5)
+
+ mfmsr r5
+ ori r5, r5, MSR_EE
+ oris r5, r5, MSR_POW@h
+ sync
+ mtmsr r5
+ isync
+
+1: b 1b
+
+ret_from_sleep:
+ mfspr r5, SPRN_HID0
+ rlwinm r5, r5, 0, ~HID0_SLEEP
+ mtspr SPRN_HID0, r5
+
+ mtlr r4
+ blr
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 7d8ac1b..fdc2a28 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -35,3 +35,7 @@ obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o
obj-$(CONFIG_8xx) += mpc8xx_pic.o commproc.o
obj-$(CONFIG_UCODE_PATCH) += micropatch.o
endif
+
+ifeq ($(CONFIG_PM),y)
+obj-$(CONFIG_6xx) += 6xx-pm.o
+endif
diff --git a/include/asm-powerpc/mpc6xx.h b/include/asm-powerpc/mpc6xx.h
new file mode 100644
index 0000000..01a33ed
--- /dev/null
+++ b/include/asm-powerpc/mpc6xx.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_POWERPC_MPC6xx_H
+#define __ASM_POWERPC_MPC6xx_H
+
+void mpc6xx_enter_sleep(void);
+
+#endif
--
1.5.0.3
^ permalink raw reply related
* RE: XSysAce driver cant mount DOS part
From: Robertson, Joseph M. @ 2007-07-12 19:17 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-embedded
In-Reply-To: <fa686aa40707121206n7e75e770q742adb3659f35e79@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 4189 bytes --]
Hi,
I will try the new code you suggest. We are not supporting CF changes at all (factory only).
RE: 2.6.17.1 being old.
Well, old is relative. Once this works, and its 99% there, we won't change it.
We'll probably be using this kernel for 3-5 years.
In fact, at this point we've got 2.5 years invested, and about 4 months of testing already, so changing now is bad.
That would mean I have to retest a whole bunch of stuff.
Thanks,
Joe Robertson
Joseph.Robertson@sanmina-sci.com
-----Original Message-----
From: glikely@secretlab.ca on behalf of Grant Likely
Sent: Thu 7/12/2007 2:06 PM
To: Robertson, Joseph M.
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: XSysAce driver cant mount DOS part
On 7/12/07, Robertson, Joseph M. <joseph.robertson@sanmina-sci.com> wrote:
> RE: Tree.
> Its the mainline 2.6.17.1, with
> denx ppc patches from 4.0.0? IIRC.
> I redid the patch set for the xsysace to get a known baseline.
> Its a custom build system, which I developed over the years, ported to use
> a ppc405 crosscompiler I made from
> CrossTool-0.42. Its very similar to uClinux, but with a simpler config
> system.
> The compiler is gcc.3.4.1 with glibc 2.3.3 (yeah we use glibc).
Heh, so do I. So do a lot of people. glibc *is* for embedded
systems, regardless of what some may say. :-)
> The XsysAce patch is in the normal place, only change I made was to define
> the major number.
> And I moved xbasic_types.c/h to another folder onthe path since xilinx_iic
> drivers uses it too, and I was getting redefine errors.
> One thing I just thought of was I did not run the 'normal' config stuff,
> any deps in there?
> I can go look at the kconfigs and see.
>
> RE: Xilinx SysAce driver
> The HW group used Xilinx env 8.2.02i, and the project shows
> Sysace_compactflash driver: sysace_v1_01_a
Okay, so that's the old driver. There is a new driver that has
considerably better performance which you might want to try; but it
doesn't support insertion/removal yet. It is about to be pulled into
mainline, but you can get it here too:
http://article.gmane.org/gmane.linux.kernel/526293/match=xsysace+c
>
> The HW is a Virtex-4 with the embedded ppc405. The Xsysace chip is
> supposed tobe using irq_intr = 2.
>
> The system actually works fine using the Ext2 fs, but if we want to upgrade
> the fpga code, I need to be able to write to the dos part.
2.6.17 is rather old. You might be hitting an old bug. Virtex
support in the newer kernels is significantly better. Have you
considered upgrading? I've got a bunch of patches in my git tree that
add the TEMAC and other drivers to a more recent kernel. My internal
tree is based on 2.6.22; I'll try to update my external tree to match
in the next day or so:
http://git.secretlab.ca/cgi-bin/gitweb.cgi?h=virtex-dev;p=linux-2.6.git;a=shortlog
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
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^ permalink raw reply
* [PATCH 0/4] 83xx Power Management
From: Scott Wood @ 2007-07-12 19:17 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
This is the Freescale-specific portion of the power management patchset;
please apply after the previous patchset is merged.
-Scott
^ permalink raw reply
* [PATCH 1/4] fsl_soc: Factor fsl_get_sys_freq() out of the wdt init.
From: Scott Wood @ 2007-07-12 19:18 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
In-Reply-To: <20070712191755.GA31507@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/fsl_soc.c | 44 ++++++++++++++++++++++------------------
arch/powerpc/sysdev/fsl_soc.h | 1 +
2 files changed, 25 insertions(+), 20 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index c0ddc80..e2c978d 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -64,6 +64,27 @@ phys_addr_t get_immrbase(void)
EXPORT_SYMBOL(get_immrbase);
+u32 fsl_get_sys_freq(void)
+{
+ struct device_node *soc = of_find_node_by_type(NULL, "soc");
+ const u32 *freq;
+ u32 ret = 0;
+
+ if (!soc)
+ goto err;
+
+ freq = of_get_property(soc, "bus-frequency", NULL);
+ if (!freq)
+ goto err;
+
+ ret = *freq;
+
+err:
+ of_node_put(soc);
+ return ret;
+}
+EXPORT_SYMBOL(fsl_get_sys_freq);
+
#if defined(CONFIG_CPM2) || defined(CONFIG_8xx)
static u32 brgfreq = -1;
@@ -356,9 +377,9 @@ arch_initcall(fsl_i2c_of_init);
static int __init mpc83xx_wdt_init(void)
{
struct resource r;
- struct device_node *soc, *np;
+ struct device_node *np;
struct platform_device *dev;
- const unsigned int *freq;
+ u32 freq = fsl_get_sys_freq();
int ret;
np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
@@ -368,19 +389,6 @@ static int __init mpc83xx_wdt_init(void)
goto nodev;
}
- soc = of_find_node_by_type(NULL, "soc");
-
- if (!soc) {
- ret = -ENODEV;
- goto nosoc;
- }
-
- freq = of_get_property(soc, "bus-frequency", NULL);
- if (!freq) {
- ret = -ENODEV;
- goto err;
- }
-
memset(&r, 0, sizeof(r));
ret = of_address_to_resource(np, 0, &r);
@@ -393,20 +401,16 @@ static int __init mpc83xx_wdt_init(void)
goto err;
}
- ret = platform_device_add_data(dev, freq, sizeof(int));
+ ret = platform_device_add_data(dev, &freq, sizeof(int));
if (ret)
goto unreg;
- of_node_put(soc);
of_node_put(np);
-
return 0;
unreg:
platform_device_unregister(dev);
err:
- of_node_put(soc);
-nosoc:
of_node_put(np);
nodev:
return ret;
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 04e145b..51769e6 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -7,6 +7,7 @@
extern phys_addr_t get_immrbase(void);
extern u32 get_brgfreq(void);
extern u32 get_baudrate(void);
+extern u32 fsl_get_sys_freq(void);
#endif
#endif
--
1.5.0.3
^ permalink raw reply related
* [PATCH 3/4] mpc83xx: timer driver for PM wakeup
From: Scott Wood @ 2007-07-12 19:18 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
In-Reply-To: <20070712191755.GA31507@ld0162-tx32.am.freescale.net>
This is a driver for the mpc83xx's GTM4 timer. It's functionality
is limited to providing a wakeup source for suspend-to-RAM.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/platforms/83xx/Kconfig | 9 +
arch/powerpc/platforms/83xx/Makefile | 1 +
arch/powerpc/platforms/83xx/timer.c | 299 ++++++++++++++++++++++++++++++++++
3 files changed, 309 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/83xx/timer.c
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 1a62723..5aad7ea 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -81,3 +81,12 @@ config PPC_83xx_PM
default y
depends on PPC_83xx && PM
select PPC32_SUSPEND
+
+config MPC83xx_GTM
+ tristate "83xx General-Purpose Timers for PM wakeup"
+ help
+ This enables a driver for the GTM4 timer, to be used
+ as a wakeup source for suspend-to-RAM. To arm the
+ timer, write the number of seconds until expiration
+ to the "timeout" file in the device's sysfs directory.
+ To disarm, write 0 to the "timeout" file.
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index bd4d909..f701b00 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -4,6 +4,7 @@
obj-y := misc.o usb.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_PM) += pm.o sleep.o
+obj-$(CONFIG_MPC83xx_GTM) += timer.o
obj-$(CONFIG_MPC8313_RDB) += mpc8313_rdb.o
obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o
obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
diff --git a/arch/powerpc/platforms/83xx/timer.c b/arch/powerpc/platforms/83xx/timer.c
new file mode 100644
index 0000000..ed7b469
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/timer.c
@@ -0,0 +1,299 @@
+/*
+ * MPC83xx Global Timer4 support
+ *
+ * This driver is currently specific to timer 4 in 16-bit mode,
+ * as that is all that can be used as a wakeup source for deep sleep
+ * on the MPC8313.
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/errno.h>
+#include <linux/module.h>
+#include <linux/mm.h>
+#include <linux/delay.h>
+#include <linux/fs.h>
+#include <linux/string.h>
+#include <linux/interrupt.h>
+#include <linux/sysfs.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/of_platform.h>
+
+#include <sysdev/fsl_soc.h>
+
+#define MDR_ICLK_DIV16 0x0004
+
+struct gtm_regs {
+ u8 cfr1; /* Timer1/2 Configuration */
+ #define CFR1_PCAS 0x80 /* Pair Cascade mode */
+ #define CFR1_BCM 0x40 /* Backward compatible mode */
+ #define CFR1_STP2 0x20 /* Stop timer */
+ #define CFR1_RST2 0x10 /* Reset timer */
+ #define CFR1_GM2 0x08 /* Gate mode for pin 2 */
+ #define CFR1_GM1 0x04 /* Gate mode for pin 1 */
+ #define CFR1_STP1 0x02 /* Stop timer */
+ #define CFR1_RST1 0x01 /* Reset timer */
+ #define CFR1_RES ~(CFR1_PCAS | CFR1_STP2 | CFR1_RST2 | CFR1_GM2 |\
+ CFR1_GM1 | CFR1_STP1 | CFR1_RST1)
+
+ u8 res0[3];
+ u8 cfr2; /* Timer3/4 Configuration */
+ #define CFR2_PCAS 0x80 /* Pair Cascade mode */
+ #define CFR2_SCAS 0x40 /* Super Cascade mode */
+ #define CFR2_STP4 0x20 /* Stop timer */
+ #define CFR2_RST4 0x10 /* Reset timer */
+ #define CFR2_GM4 0x08 /* Gate mode for pin 4 */
+ #define CFR2_GM3 0x04 /* Gate mode for pin 3 */
+ #define CFR2_STP3 0x02 /* Stop timer */
+ #define CFR2_RST3 0x01 /* Reset timer */
+
+ u8 res1[11];
+ u16 mdr1; /* Timer1 Mode Register */
+ #define MDR_SPS 0xff00 /* Secondary Prescaler value (256) */
+ #define MDR_CE 0x00c0 /* Capture edge and enable interrupt */
+ #define MDR_OM 0x0020 /* Output mode */
+ #define MDR_ORI 0x0010 /* Output reference interrupt enable */
+ #define MDR_FRR 0x0008 /* Free run/restart */
+ #define MDR_ICLK 0x0006 /* Input clock source for the timer */
+ #define MDR_GE 0x0001 /* Gate enable */
+
+ u16 mdr2; /* Timer2 Mode Register */
+ u16 rfr1; /* Timer1 Reference Register */
+ u16 rfr2; /* Timer2 Reference Register */
+ u16 cpr1; /* Timer1 Capture Register */
+ u16 cpr2; /* Timer2 Capture Register */
+ u16 cnr1; /* Timer1 Counter Register */
+ u16 cnr2; /* Timer2 Counter Register */
+ u16 mdr3; /* Timer3 Mode Register */
+ u16 mdr4; /* Timer4 Mode Register */
+ u16 rfr3; /* Timer3 Reference Register */
+ u16 rfr4; /* Timer4 Reference Register */
+ u16 cpr3; /* Timer3 Capture Register */
+ u16 cpr4; /* Timer4 Capture Register */
+ u16 cnr3; /* Timer3 Counter Register */
+ u16 cnr4; /* Timer4 Counter Register */
+ u16 evr1; /* Timer1 Event Register */
+ u16 evr2; /* Timer2 Event Register */
+ u16 evr3; /* Timer3 Event Register */
+ u16 evr4; /* Timer4 Event Register */
+ #define GTEVR_REF 0x0002 /* Output reference event */
+ #define GTEVR_CAP 0x0001 /* Counter Capture event */
+ #define GTEVR_RES ~(EVR_CAP|EVR_REF)
+
+ u16 psr1; /* Timer1 Prescaler Register */
+ u16 psr2; /* Timer2 Prescaler Register */
+ u16 psr3; /* Timer3 Prescaler Register */
+ u16 psr4; /* Timer4 Prescaler Register */
+ #define GTPSR_PPS 0x00FF /* Primary Prescaler Bits (256). */
+ #define GTPSR_RES ~(GTPSR_PPS)
+};
+
+struct gtm_priv {
+ struct gtm_regs __iomem *regs;
+ int irq;
+ int ticks_per_sec;
+ spinlock_t lock;
+};
+
+static irqreturn_t fsl_gtm_isr(int irq, void *dev_id)
+{
+ struct gtm_priv *priv = dev_id;
+ unsigned long flags;
+ u16 event;
+
+ spin_lock_irqsave(&priv->lock, flags);
+
+ event = in_be16(&priv->regs->evr4);
+ out_be16(&priv->regs->evr4, event);
+
+ if (event & GTEVR_REF)
+ out_8(&priv->regs->cfr2, CFR2_STP4);
+
+ spin_unlock_irqrestore(&priv->lock, flags);
+ return event ? IRQ_HANDLED : IRQ_NONE;
+}
+
+static ssize_t gtm_timeout_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t count)
+{
+ struct gtm_priv *priv = dev_get_drvdata(dev);
+ unsigned long interval = simple_strtoul(buf, NULL, 0);
+
+ if (interval > 0xffff) {
+ dev_dbg(dev, "gtm: interval %lu (in ns) too long\n", interval);
+ return -EINVAL;
+ }
+
+ interval *= priv->ticks_per_sec;
+
+ if (interval > 0xffff) {
+ dev_dbg(dev, "gtm: interval %lu (in ticks) too long\n",
+ interval);
+ return -EINVAL;
+ }
+
+ spin_lock_irq(&priv->lock);
+
+ /* reset timer 4 */
+ out_8(&priv->regs->cfr2, CFR2_STP3 | CFR2_STP4);
+
+ if (interval != 0) {
+ out_8(&priv->regs->cfr2, CFR2_GM4 | CFR2_RST4 | CFR2_STP4);
+ /* clear events */
+ out_be16(&priv->regs->evr4, GTEVR_REF | GTEVR_CAP);
+ /* maximum primary prescale (256) */
+ out_be16(&priv->regs->psr4, GTPSR_PPS);
+ /* clear current counter */
+ out_be16(&priv->regs->cnr4, 0x0);
+ /* set count limit */
+ out_be16(&priv->regs->rfr4, interval);
+ out_be16(&priv->regs->mdr4, MDR_SPS | MDR_ORI | MDR_FRR |
+ MDR_ICLK_DIV16);
+ /* start timer */
+ out_8(&priv->regs->cfr2, CFR2_GM4 | CFR2_STP3 | CFR2_RST4);
+ }
+
+ spin_unlock_irq(&priv->lock);
+ return count;
+}
+
+static ssize_t gtm_timeout_show(struct device *dev,
+ struct device_attribute *attr,
+ char *buf)
+{
+ struct gtm_priv *priv = dev_get_drvdata(dev);
+ int timeout = 0;
+
+ spin_lock_irq(&priv->lock);
+
+ if (!(in_8(&priv->regs->cfr2) & CFR2_STP4)) {
+ timeout = in_be16(&priv->regs->rfr4) -
+ in_be16(&priv->regs->cnr4);
+ timeout += priv->ticks_per_sec - 1;
+ timeout /= priv->ticks_per_sec;
+ }
+
+ spin_unlock_irq(&priv->lock);
+ return sprintf(buf, "%u\n", timeout);
+}
+
+static DEVICE_ATTR(timeout, 0660, gtm_timeout_show, gtm_timeout_store);
+
+static int __devinit gtm_probe(struct of_device *dev,
+ const struct of_device_id *match)
+{
+ struct device_node *np = dev->node;
+ struct resource res;
+ int ret = 0;
+ u32 busfreq = fsl_get_sys_freq();
+ struct gtm_priv *priv;
+
+ if (busfreq == 0) {
+ printk(KERN_ERR "gtm: No bus frequency in device tree.\n");
+ return -ENODEV;
+ }
+
+ priv = kmalloc(sizeof(struct gtm_priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ spin_lock_init(&priv->lock);
+ dev_set_drvdata(&dev->dev, priv);
+
+ ret = of_address_to_resource(np, 0, &res);
+ if (ret)
+ goto out;
+
+ priv->irq = irq_of_parse_and_map(np, 0);
+ if (priv->irq == NO_IRQ) {
+ printk(KERN_ERR "mpc83xx-gtm exists in device tree "
+ "without an IRQ.\n");
+ ret = -ENODEV;
+ goto out;
+ }
+
+ ret = request_irq(priv->irq, fsl_gtm_isr, 0, "gtm timer", priv);
+ if (ret)
+ goto out;
+
+ priv->regs = ioremap(res.start, sizeof(struct gtm_regs));
+ if (!priv->regs) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ /* Disable the unused clocks to save power. */
+ out_8(&priv->regs->cfr1, CFR1_STP1 | CFR1_STP2);
+ out_8(&priv->regs->cfr2, CFR2_STP3 | CFR2_STP4);
+
+ /*
+ * Maximum prescaling is used (input clock/16, 256 primary prescaler,
+ * 256 secondary prescaler) to maximize the timer's range. With a
+ * bus clock of 133MHz, this yields a maximum interval of 516
+ * seconds while retaining subsecond precision. Since only
+ * timer 4 is supported for wakeup on the 8313, and timer 4
+ * is the LSB when chained, we can't use chaining to increase
+ * the range.
+ */
+ priv->ticks_per_sec = busfreq / (16*256*256);
+
+ ret = device_create_file(&dev->dev, &dev_attr_timeout);
+ if (ret)
+ goto out;
+
+ return 0;
+
+out:
+ kfree(priv);
+ return ret;
+}
+
+static int __devexit gtm_remove(struct of_device *dev)
+{
+ struct gtm_priv *priv = dev_get_drvdata(&dev->dev);
+
+ device_remove_file(&dev->dev, &dev_attr_timeout);
+ free_irq(priv->irq, priv);
+ iounmap(priv->regs);
+
+ dev_set_drvdata(&dev->dev, NULL);
+ kfree(priv);
+ return 0;
+}
+
+static struct of_device_id gtm_match[] = {
+ {
+ .compatible = "fsl,mpc83xx-gtm",
+ },
+ {},
+};
+
+static struct of_platform_driver gtm_driver = {
+ .name = "mpc83xx-gtm-timer",
+ .match_table = gtm_match,
+ .probe = gtm_probe,
+ .remove = __devexit_p(gtm_remove)
+};
+
+static int __init gtm_init(void)
+{
+ return of_register_platform_driver(>m_driver);
+}
+
+static void __exit gtm_exit(void)
+{
+ of_unregister_platform_driver(>m_driver);
+}
+
+module_init(gtm_init);
+module_exit(gtm_exit);
--
1.5.0.3
^ permalink raw reply related
* [PATCH 2/4] mpc83xx: Power Management support
From: Scott Wood @ 2007-07-12 19:18 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
In-Reply-To: <20070712191755.GA31507@ld0162-tx32.am.freescale.net>
Basic PM support for 83xx. Standby is implemented as sleep.
Suspend-to-RAM is implemented as "deep sleep" (with the processor
turned off) on 831x.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/platforms/83xx/Kconfig | 6 +
arch/powerpc/platforms/83xx/Makefile | 1 +
arch/powerpc/platforms/83xx/pm.c | 431 ++++++++++++++++++++++++++++++++++
arch/powerpc/platforms/83xx/sleep.S | 296 +++++++++++++++++++++++
arch/powerpc/sysdev/fsl_soc.c | 33 +++
arch/powerpc/sysdev/fsl_soc.h | 10 +
arch/powerpc/sysdev/ipic.c | 71 ++++++
include/asm-powerpc/reg.h | 4 +
include/linux/fsl_devices.h | 24 ++
9 files changed, 876 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/83xx/pm.c
create mode 100644 arch/powerpc/platforms/83xx/sleep.S
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index ec305f1..1a62723 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -75,3 +75,9 @@ config PPC_MPC836x
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
default y if MPC836x_MDS
+
+config PPC_83xx_PM
+ bool
+ default y
+ depends on PPC_83xx && PM
+ select PPC32_SUSPEND
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index 5a98f88..bd4d909 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -3,6 +3,7 @@
#
obj-y := misc.o usb.o
obj-$(CONFIG_PCI) += pci.o
+obj-$(CONFIG_PM) += pm.o sleep.o
obj-$(CONFIG_MPC8313_RDB) += mpc8313_rdb.o
obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o
obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
diff --git a/arch/powerpc/platforms/83xx/pm.c b/arch/powerpc/platforms/83xx/pm.c
new file mode 100644
index 0000000..82b4648
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/pm.c
@@ -0,0 +1,431 @@
+/*
+ * MPC83xx Power Management support
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/pm.h>
+#include <linux/types.h>
+#include <linux/ioport.h>
+#include <linux/interrupt.h>
+#include <linux/wait.h>
+#include <linux/kthread.h>
+#include <linux/freezer.h>
+#include <linux/fsl_devices.h>
+
+#include <asm/prom.h>
+#include <asm/reg.h>
+#include <asm/io.h>
+#include <asm/time.h>
+#include <asm/of_platform.h>
+#include <asm/mpc6xx.h>
+
+#include <sysdev/fsl_soc.h>
+
+#define PMCCR1_NEXT_STATE 0x0C /* Next state for power management */
+#define PMCCR1_NEXT_STATE_SHIFT 2
+#define PMCCR1_CURR_STATE 0x03 /* Current state for power management*/
+#define IMMR_RCW_OFFSET 0x900
+#define RCW_PCI_HOST 0x80000000
+
+void mpc83xx_enter_deep_sleep(phys_addr_t immrbase);
+
+struct mpc83xx_pmc {
+ u32 config;
+#define PMCCR_DLPEN 2 /* DDR SDRAM low power enable */
+#define PMCCR_SLPEN 1 /* System low power enable */
+
+ u32 event;
+ u32 mask;
+/* All but PMCI are deep-sleep only */
+#define PMCER_GPIO 0x100
+#define PMCER_PCI 0x080
+#define PMCER_USB 0x040
+#define PMCER_ETSEC1 0x020
+#define PMCER_ETSEC2 0x010
+#define PMCER_TIMER 0x008
+#define PMCER_INT1 0x004
+#define PMCER_INT2 0x002
+#define PMCER_PMCI 0x001
+#define PMCER_ALL 0x1FF
+
+ /* deep-sleep only */
+ u32 config1;
+#define PMCCR1_USE_STATE 0x80000000
+#define PMCCR1_PME_EN 0x00000080
+#define PMCCR1_ASSERT_PME 0x00000040
+#define PMCCR1_POWER_OFF 0x00000020
+
+ /* deep-sleep only */
+ u32 config2;
+};
+
+struct mpc83xx_rcw {
+ u32 rcwlr;
+ u32 rcwhr;
+};
+
+struct mpc83xx_clock {
+ u32 spmr;
+ u32 occr;
+ u32 sccr;
+};
+
+struct pmc_type {
+ int has_deep_sleep;
+};
+
+static struct of_device *pmc_dev;
+static int has_deep_sleep, deep_sleeping;
+static int pmc_irq;
+static struct mpc83xx_pmc __iomem *pmc_regs;
+static struct mpc83xx_clock __iomem *clock_regs;
+static int is_pci_agent, wake_from_pci;
+static phys_addr_t immrbase;
+static int pci_pm_state;
+static DECLARE_WAIT_QUEUE_HEAD(agent_wq);
+
+static u32 saved_sccr;
+static DEFINE_SPINLOCK(device_sleep_lock);
+
+void fsl_sleep_device(struct fsl_sleep_platform_data *data)
+{
+ if (clock_regs && data->sccr_mask) {
+ unsigned long flags;
+ u32 sccr;
+
+ spin_lock_irqsave(&device_sleep_lock, flags);
+ sccr = in_be32(&clock_regs->sccr);
+
+ saved_sccr &= ~data->sccr_mask;
+ saved_sccr |= sccr & data->sccr_mask;
+
+ out_be32(&clock_regs->sccr, sccr & ~data->sccr_mask);
+ spin_unlock_irqrestore(&device_sleep_lock, flags);
+ }
+}
+EXPORT_SYMBOL(fsl_sleep_device);
+
+void fsl_wake_device(struct fsl_sleep_platform_data *data)
+{
+ if (clock_regs && data->sccr_mask) {
+ unsigned long flags;
+ u32 sccr;
+
+ spin_lock_irqsave(&device_sleep_lock, flags);
+
+ sccr = in_be32(&clock_regs->sccr);
+ sccr |= saved_sccr & data->sccr_mask;
+ out_be32(&clock_regs->sccr, sccr);
+
+ spin_unlock_irqrestore(&device_sleep_lock, flags);
+ }
+}
+EXPORT_SYMBOL(fsl_wake_device);
+
+int fsl_deep_sleep(void)
+{
+ return deep_sleeping;
+}
+
+static int mpc83xx_change_state(void)
+{
+ u32 curr_state;
+ u32 reg_cfg1 = in_be32(&pmc_regs->config1);
+
+ if (is_pci_agent) {
+ pci_pm_state = (reg_cfg1 & PMCCR1_NEXT_STATE) >>
+ PMCCR1_NEXT_STATE_SHIFT;
+ curr_state = reg_cfg1 & PMCCR1_CURR_STATE;
+
+ if (curr_state != pci_pm_state) {
+ reg_cfg1 &= ~PMCCR1_CURR_STATE;
+ reg_cfg1 |= pci_pm_state;
+ out_be32(&pmc_regs->config1, reg_cfg1);
+
+ wake_up(&agent_wq);
+ return 1;
+ }
+ }
+
+ return 0;
+}
+
+static irqreturn_t pmc_irq_handler(int irq, void *dev_id)
+{
+ u32 event = in_be32(&pmc_regs->event);
+ int ret = IRQ_NONE;
+
+ if (mpc83xx_change_state())
+ ret = IRQ_HANDLED;
+
+ if (event) {
+ out_be32(&pmc_regs->event, event);
+ ret = IRQ_HANDLED;
+ }
+
+ return ret;
+}
+
+static int mpc83xx_pm_suspend(void)
+{
+ int ret = -EAGAIN;
+
+ /* Don't go to sleep if there's a race where pci_pm_state changes
+ * between the agent thread checking it and the PM code disabling
+ * interrupts.
+ */
+ if (wake_from_pci) {
+ if (pci_pm_state != (deep_sleeping ? 3 : 2))
+ goto out;
+
+ out_be32(&pmc_regs->config1,
+ in_be32(&pmc_regs->config1) | PMCCR1_PME_EN);
+ }
+
+ /* Put the system into low-power mode and the RAM
+ * into self-refresh mode once the core goes to
+ * sleep.
+ */
+
+ out_be32(&pmc_regs->config, PMCCR_SLPEN | PMCCR_DLPEN);
+
+ /* If it has deep sleep (i.e. it's an 831x or compatible),
+ * disable power to the core upon entering sleep mode. This will
+ * require going through the boot firmware upon a wakeup event.
+ */
+
+ if (deep_sleeping) {
+ out_be32(&pmc_regs->mask, PMCER_ALL);
+
+ out_be32(&pmc_regs->config1,
+ in_be32(&pmc_regs->config1) | PMCCR1_POWER_OFF);
+
+ enable_kernel_fp();
+
+ mpc83xx_enter_deep_sleep(immrbase);
+
+ out_be32(&pmc_regs->config1,
+ in_be32(&pmc_regs->config1) & ~PMCCR1_POWER_OFF);
+
+ out_be32(&pmc_regs->mask, PMCER_PMCI);
+
+ deep_sleeping = 0;
+ } else {
+ out_be32(&pmc_regs->mask, PMCER_PMCI);
+
+ mpc6xx_enter_sleep();
+ }
+
+ ret = 0;
+
+out:
+ out_be32(&pmc_regs->config1,
+ in_be32(&pmc_regs->config1) & ~PMCCR1_PME_EN);
+
+ return ret;
+}
+
+static int mpc83xx_pm_valid(suspend_state_t state)
+{
+ return state == PM_SUSPEND_STANDBY || state == PM_SUSPEND_MEM;
+}
+
+static int mpc83xx_pm_prepare(suspend_state_t state)
+{
+ switch (state) {
+ case PM_SUSPEND_STANDBY:
+ deep_sleeping = 0;
+ return 0;
+
+ case PM_SUSPEND_MEM:
+ if (has_deep_sleep)
+ deep_sleeping = 1;
+
+ return 0;
+
+ default:
+ return -EINVAL;
+ }
+}
+
+static int mpc83xx_pm_enter(suspend_state_t state)
+{
+ switch (state) {
+ case PM_SUSPEND_STANDBY:
+ case PM_SUSPEND_MEM:
+ return mpc83xx_pm_suspend();
+
+ default:
+ return -EINVAL;
+ }
+}
+
+static int agent_thread_fn(void *data)
+{
+ while (1) {
+ wait_event_interruptible(agent_wq, pci_pm_state >= 2);
+ try_to_freeze();
+
+ if (signal_pending(current) || pci_pm_state < 2)
+ continue;
+
+ /* With a preemptible kernel (or SMP), this could race with a
+ * userspace-driven suspend request. It's probably best to
+ * avoid mixing the two with such a configuration (or else fix
+ * it by adding a mutex to state_store that we can synchronize
+ * with).
+ */
+
+ wake_from_pci = 1;
+
+ pm_suspend(pci_pm_state == 3 ? PM_SUSPEND_MEM :
+ PM_SUSPEND_STANDBY);
+
+ wake_from_pci = 0;
+ }
+
+ return 0;
+}
+
+void mpc83xx_set_agent(void)
+{
+ out_be32(&pmc_regs->config1, PMCCR1_USE_STATE);
+ out_be32(&pmc_regs->mask, PMCER_PMCI);
+
+ kthread_run(agent_thread_fn, NULL, "PCI power mgt");
+}
+
+static int mpc83xx_is_pci_agent(void)
+{
+ struct mpc83xx_rcw __iomem *rcw_regs;
+ int ret;
+
+ rcw_regs = ioremap(get_immrbase() + IMMR_RCW_OFFSET,
+ sizeof(struct mpc83xx_rcw));
+
+ if (!rcw_regs)
+ return -ENOMEM;
+
+ ret = !(in_be32(&rcw_regs->rcwhr) & RCW_PCI_HOST);
+
+ iounmap(rcw_regs);
+ return ret;
+}
+
+static struct pm_ops mpc83xx_pm_ops = {
+ .valid = mpc83xx_pm_valid,
+ .prepare = mpc83xx_pm_prepare,
+ .enter = mpc83xx_pm_enter,
+};
+
+static int pmc_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct device_node *np = ofdev->node;
+ struct resource res;
+ struct pmc_type *type = match->data;
+ int ret = 0;
+
+ has_deep_sleep = type->has_deep_sleep;
+ immrbase = get_immrbase();
+ pmc_dev = ofdev;
+
+ is_pci_agent = mpc83xx_is_pci_agent();
+ if (is_pci_agent < 0)
+ return is_pci_agent;
+
+ ret = of_address_to_resource(np, 0, &res);
+ if (ret)
+ return -ENODEV;
+
+ pmc_irq = irq_of_parse_and_map(np, 0);
+ if (pmc_irq != NO_IRQ) {
+ ret = request_irq(pmc_irq, pmc_irq_handler, IRQF_SHARED,
+ "pmc", ofdev);
+
+ if (ret)
+ return -EBUSY;
+ }
+
+ pmc_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
+
+ if (!pmc_regs) {
+ ret = -ENOMEM;
+ goto out;
+ }
+
+ ret = of_address_to_resource(np, 1, &res);
+ if (ret) {
+ ret = -ENODEV;
+ goto out_pmc;
+ }
+
+ clock_regs = ioremap(res.start, sizeof(struct mpc83xx_pmc));
+
+ if (!clock_regs) {
+ ret = -ENOMEM;
+ goto out_pmc;
+ }
+
+ if (is_pci_agent)
+ mpc83xx_set_agent();
+
+ pm_set_ops(&mpc83xx_pm_ops);
+ return 0;
+
+out_pmc:
+ iounmap(pmc_regs);
+out:
+ if (pmc_irq != NO_IRQ)
+ free_irq(pmc_irq, ofdev);
+
+ return ret;
+}
+
+static int pmc_remove(struct of_device *ofdev)
+{
+ return -EPERM;
+};
+
+static struct pmc_type pmc_types[] = {
+ {
+ .has_deep_sleep = 1,
+ },
+ {
+ .has_deep_sleep = 0,
+ }
+};
+
+static struct of_device_id pmc_match[] = {
+ {
+ .compatible = "fsl,mpc831x-pmc",
+ .data = &pmc_types[0],
+ },
+ {
+ .compatible = "fsl,mpc83xx-pmc",
+ .data = &pmc_types[1],
+ },
+ {}
+};
+
+static struct of_platform_driver pmc_driver = {
+ .name = "mpc83xx-pmc",
+ .match_table = pmc_match,
+ .probe = pmc_probe,
+ .remove = pmc_remove
+};
+
+static int pmc_init(void)
+{
+ return of_register_platform_driver(&pmc_driver);
+}
+
+module_init(pmc_init);
diff --git a/arch/powerpc/platforms/83xx/sleep.S b/arch/powerpc/platforms/83xx/sleep.S
new file mode 100644
index 0000000..6c005bc
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/sleep.S
@@ -0,0 +1,296 @@
+/*
+ * Enter and leave sleep state on MPC83xx
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2006 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <asm/page.h>
+#include <asm/ppc_asm.h>
+#include <asm/reg.h>
+#include <asm/asm-offsets.h>
+
+#define SS_MEMSAVE 0x00
+#define SS_HID 0x08 /* 3 HIDs */
+#define SS_IABR 0x14 /* 2 IABRs */
+#define SS_IBCR 0x1c
+#define SS_DABR 0x20 /* 2 DABRs */
+#define SS_DBCR 0x28
+#define SS_SR 0x2c /* 16 sgement registers */
+#define STATE_SAVE_SIZE 0x6c
+
+ .section .data
+ .align 5
+
+mpc83xx_sleep_save_area:
+ .space STATE_SAVE_SIZE
+immrbase:
+ .long 0
+
+ .section .text
+ .align 5
+
+ /* r3 = physical address of IMMR */
+_GLOBAL(mpc83xx_enter_deep_sleep)
+ /* Re-use the state saving/restoring code in
+ * arch/powerpc/kernel/swsusp_32.S, but have
+ * it call us instead of swsusp_save.
+ */
+
+ lis r4, immrbase@ha
+ stw r3, immrbase@l(r4)
+
+ lis r3, mpc83xx_do_enter_deep_sleep@h
+ ori r3, r3, mpc83xx_do_enter_deep_sleep@l
+ b do_suspend
+
+mpc83xx_do_enter_deep_sleep:
+ /* The first 2 words of memory are used to communicate with the
+ * bootloader, to tell it how to resume.
+ *
+ * The first word is the magic number 0xf5153ae5, and the second
+ * is the pointer to mpc83xx_deep_resume.
+ *
+ * The original content of these two words is saved in the state
+ * save area.
+ */
+
+ lis r3, mpc83xx_sleep_save_area@h
+ ori r3, r3, mpc83xx_sleep_save_area@l
+
+ lis r4, KERNELBASE@h
+ lwz r5, 0(r4)
+ lwz r6, 4(r4)
+
+ stw r5, SS_MEMSAVE+0(r3)
+ stw r6, SS_MEMSAVE+4(r3)
+
+ mfspr r5, SPRN_HID0
+ mfspr r6, SPRN_HID1
+ mfspr r7, SPRN_HID2
+
+ stw r5, SS_HID+0(r3)
+ stw r6, SS_HID+4(r3)
+ stw r7, SS_HID+8(r3)
+
+ mfspr r4, SPRN_IABR
+ mfspr r5, SPRN_IABR2
+ mfspr r6, SPRN_IBCR
+ mfspr r7, SPRN_DABR
+ mfspr r8, SPRN_DABR2
+ mfspr r9, SPRN_DBCR
+
+ stw r4, SS_IABR+0(r3)
+ stw r5, SS_IABR+4(r3)
+ stw r6, SS_IBCR(r3)
+ stw r7, SS_DABR+0(r3)
+ stw r8, SS_DABR+4(r3)
+ stw r9, SS_DBCR(r3)
+
+ li r4, 0
+ addi r6, r3, SS_SR-4
+1: mfsrin r5, r4
+ stwu r5, 4(r6)
+ addis r4, r4, 0x1000
+ cmpwi r4, 0
+ bne 1b
+
+
+ bl __flush_disable_L1
+
+ /* Disable machine checks and critical exceptions */
+ mfmsr r4
+ rlwinm r4, r4, 0, ~MSR_CE
+ rlwinm r4, r4, 0, ~MSR_ME
+ mtmsr r4
+ isync
+
+ mfspr r3, SPRN_HID0
+ ori r3, r3, HID0_ICE
+ ori r4, r3, HID0_ICFI
+ isync
+ mtspr SPRN_HID0, r4
+ mtspr SPRN_HID0, r3
+ isync
+
+#define TMP_VIRT_IMMR 0xf0000000
+#define DEFAULT_IMMR_VALUE 0xff400000
+#define IMMRBAR_BASE 0x0000
+
+ lis r4, immrbase@ha
+ lwz r4, immrbase@l(r4)
+
+ /* Use DBAT0 to address the current IMMR space */
+
+ ori r4, r4, 0x002a
+ mtspr SPRN_DBAT0L, r4
+ lis r8, TMP_VIRT_IMMR@h
+ ori r4, r8, 0x001e /* 1 MByte accessable from Kernel Space only */
+ mtspr SPRN_DBAT0U, r4
+ isync
+
+ /* Use DBAT1 to address the original IMMR space */
+
+ lis r4, DEFAULT_IMMR_VALUE@h
+ ori r4, r4, 0x002a
+ mtspr SPRN_DBAT1L, r4
+ lis r9, (TMP_VIRT_IMMR + 0x01000000)@h
+ ori r4, r9, 0x001e /* 1 MByte accessable from Kernel Space only */
+ mtspr SPRN_DBAT1U, r4
+ isync
+
+ /* Use DBAT2 to address the beginning of RAM. This isn't done
+ * using the normal virtual mapping, because with page debugging
+ * enabled it will be read-only. */
+
+ li r4, 0x002a
+ mtspr SPRN_DBAT2L, r4
+ lis r4, KERNELBASE@h
+ ori r4, r4, 0x001e /* 1 MByte accessable from Kernel Space only */
+ mtspr SPRN_DBAT2U, r4
+ isync
+
+ lis r6, 0xf515
+ ori r6, r6, 0x3ae5
+
+ lis r7, mpc83xx_deep_resume@h
+ ori r7, r7, mpc83xx_deep_resume@l
+ tophys(r7, r7)
+
+ lis r5, KERNELBASE@h
+ stw r6, 0(r5)
+ stw r7, 4(r5)
+
+ /* Reset BARs */
+
+ li r4, 0
+ stw r4, 0x0024(r8)
+ stw r4, 0x002c(r8)
+ stw r4, 0x0034(r8)
+ stw r4, 0x003c(r8)
+ stw r4, 0x0064(r8)
+ stw r4, 0x006c(r8)
+
+ /* The 8313 has problems with wakeup events that are pending
+ * during the transition to deep sleep state (such as if the PCI
+ * host sets the state to D3 and then D0 in rapid succession).
+ * This check shrinks the race window somewhat.
+ */
+
+ lwz r3, 0x0b04(r8)
+ andi. r3, r3, 1
+ bne- mpc83xx_deep_resume
+
+ /* Move IMMR back to the default location, following the
+ * procedure specified in the MPC8313 manual.
+ */
+ lwz r4, IMMRBAR_BASE(r8)
+ isync
+ lis r4, DEFAULT_IMMR_VALUE@h
+ stw r4, IMMRBAR_BASE(r8)
+ lis r4, KERNELBASE@h
+ lwz r4, 0(r4)
+ isync
+ lwz r4, IMMRBAR_BASE(r9)
+ mr r8, r9
+ isync
+
+ /* Check the Reset Configuration Word to see whether flash needs
+ * to be mapped at a low address or a high address.
+ */
+
+ lwz r4, 0x0904(r8)
+ andis. r4, r4, 0x0400
+ li r4, 0
+ beq boot_low
+ lis r4, 0xff80
+boot_low:
+ stw r4, 0x0020(r8)
+ lis r7, 0x8000
+ ori r7, r7, 0x0016
+
+ mfspr r5, SPRN_HID0
+ rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP)
+ oris r5, r5, HID0_SLEEP@h
+ mtspr SPRN_HID0, r5
+ isync
+
+ mfmsr r5
+ oris r5, r5, MSR_POW@h
+
+ /* Enable the flash mapping at the appropriate address. This
+ * mapping will override the RAM mapping, so there's no need to
+ * disable the latter. This must be done inside the same cache
+ * line as setting MSR_POW, so that no instruction fetches from
+ * RAM happen after the flash mapping is turned on.
+ */
+
+ .align 5
+ stw r7, 0x0024(r8)
+ sync
+ isync
+ mtmsr r5
+ isync
+1: b 1b
+
+mpc83xx_deep_resume:
+ lis r4, 1f@h
+ ori r4, r4, 1f@l
+ tophys(r4, r4)
+ mtsrr0 r4
+
+ mfmsr r4
+ rlwinm r4, r4, 0, ~(MSR_IR | MSR_DR)
+ mtsrr1 r4
+
+ rfi
+1: bl __inval_enable_L1
+
+ lis r3, mpc83xx_sleep_save_area@h
+ ori r3, r3, mpc83xx_sleep_save_area@l
+ tophys(r3, r3)
+
+ lwz r5, SS_MEMSAVE+0(r3)
+ lwz r6, SS_MEMSAVE+4(r3)
+
+ stw r5, 0(0)
+ stw r6, 4(0)
+
+ lwz r5, SS_HID+0(r3)
+ lwz r6, SS_HID+4(r3)
+ lwz r7, SS_HID+8(r3)
+
+ mtspr SPRN_HID0, r5
+ mtspr SPRN_HID1, r6
+ mtspr SPRN_HID2, r7
+
+ lwz r4, SS_IABR+0(r3)
+ lwz r5, SS_IABR+4(r3)
+ lwz r6, SS_IBCR(r3)
+ lwz r7, SS_DABR+0(r3)
+ lwz r8, SS_DABR+4(r3)
+ lwz r9, SS_DBCR(r3)
+
+ mtspr SPRN_IABR, r4
+ mtspr SPRN_IABR2, r5
+ mtspr SPRN_IBCR, r6
+ mtspr SPRN_DABR, r7
+ mtspr SPRN_DABR2, r8
+ mtspr SPRN_DBCR, r9
+
+ li r4, 0
+ addi r6, r3, SS_SR-4
+1: lwzu r5, 4(r6)
+ mtsrin r5, r4
+ addis r4, r4, 0x1000
+ cmpwi r4, 0
+ bne 1b
+
+ li r3, 1 /* BAT restore requested */
+ b do_resume
+
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index e2c978d..8381736 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -138,6 +138,33 @@ u32 get_baudrate(void)
EXPORT_SYMBOL(get_baudrate);
#endif /* CONFIG_CPM2 */
+int fsl_sleep_init(struct fsl_sleep_platform_data *sleep,
+ struct device_node *node)
+{
+ int proplen, ret = -ENODEV;
+ const u32 *sleepdata = of_get_property(node, "sleep", &proplen);
+ struct device_node *sleep_controller;
+
+ if (!sleepdata || proplen != 8)
+ return -ENODEV;
+
+ sleep_controller = of_find_node_by_phandle(sleepdata[0]);
+ if (!sleep_controller)
+ return -ENODEV;
+
+ /* There can only be one fsl,mpc83xx-pmc device in the system;
+ * it is assumed that it is the one that the pmc driver matches.
+ */
+ if (of_device_is_compatible(sleep_controller, "fsl,mpc83xx-pmc")) {
+ sleep->sccr_mask = sleepdata[1];
+ ret = 0;
+ }
+
+ of_node_put(sleep_controller);
+ return ret;
+}
+EXPORT_SYMBOL(fsl_sleep_init);
+
static int __init gfar_mdio_of_init(void)
{
struct device_node *np;
@@ -299,6 +326,8 @@ static int __init gfar_of_init(void)
of_node_put(phy);
of_node_put(mdio);
+ fsl_sleep_init(&gfar_data.sleep, np);
+
ret =
platform_device_add_data(gfar_dev, &gfar_data,
sizeof(struct
@@ -482,6 +511,8 @@ static int __init fsl_usb_of_init(void)
prop = of_get_property(np, "phy_type", NULL);
usb_data.phy_mode = determine_usb_phy(prop);
+ fsl_sleep_init(&usb_data.sleep, np);
+
ret =
platform_device_add_data(usb_dev_mph, &usb_data,
sizeof(struct
@@ -546,6 +577,8 @@ static int __init fsl_usb_of_init(void)
prop = of_get_property(np, "phy_type", NULL);
usb_data.phy_mode = determine_usb_phy(prop);
+ fsl_sleep_init(&usb_data.sleep, np);
+
if (usb_dev_dr_host) {
usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 51769e6..7f99b63 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -9,5 +9,15 @@ extern u32 get_brgfreq(void);
extern u32 get_baudrate(void);
extern u32 fsl_get_sys_freq(void);
+struct fsl_sleep_platform_data;
+struct device_node;
+
+int fsl_sleep_init(struct fsl_sleep_platform_data *sleep,
+ struct device_node *node);
+
+/* Calls to fsl_sleep_dev and fsl_wake_dev cannot be nested. */
+void fsl_sleep_dev(struct fsl_sleep_platform_data *sleep);
+void fsl_wake_dev(struct fsl_sleep_platform_data *sleep);
+
#endif
#endif
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 473c415..8ad84c5 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -22,6 +22,7 @@
#include <linux/device.h>
#include <linux/bootmem.h>
#include <linux/spinlock.h>
+#include <linux/fsl_devices.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/prom.h>
@@ -727,8 +728,78 @@ unsigned int ipic_get_irq(void)
return irq_linear_revmap(primary_ipic->irqhost, irq);
}
+#ifdef CONFIG_PM
+static struct {
+ u32 sicfr;
+ u32 siprr[2];
+ u32 simsr[2];
+ u32 sicnr;
+ u32 smprr[2];
+ u32 semsr;
+ u32 secnr;
+ u32 sermr;
+ u32 sercr;
+} ipic_saved_state;
+
+static int ipic_suspend(struct sys_device *sdev, pm_message_t state)
+{
+ struct ipic *ipic = primary_ipic;
+
+ ipic_saved_state.sicfr = ipic_read(ipic->regs, IPIC_SICFR);
+ ipic_saved_state.siprr[0] = ipic_read(ipic->regs, IPIC_SIPRR_A);
+ ipic_saved_state.siprr[1] = ipic_read(ipic->regs, IPIC_SIPRR_D);
+ ipic_saved_state.simsr[0] = ipic_read(ipic->regs, IPIC_SIMSR_H);
+ ipic_saved_state.simsr[1] = ipic_read(ipic->regs, IPIC_SIMSR_L);
+ ipic_saved_state.sicnr = ipic_read(ipic->regs, IPIC_SICNR);
+ ipic_saved_state.smprr[0] = ipic_read(ipic->regs, IPIC_SMPRR_A);
+ ipic_saved_state.smprr[1] = ipic_read(ipic->regs, IPIC_SMPRR_B);
+ ipic_saved_state.semsr = ipic_read(ipic->regs, IPIC_SEMSR);
+ ipic_saved_state.secnr = ipic_read(ipic->regs, IPIC_SECNR);
+ ipic_saved_state.sermr = ipic_read(ipic->regs, IPIC_SERMR);
+ ipic_saved_state.sercr = ipic_read(ipic->regs, IPIC_SERCR);
+
+ if (fsl_deep_sleep()) {
+ /* In deep sleep, make sure there can be no
+ * pending interrupts, as this can cause
+ * problems on 831x.
+ */
+ ipic_write(ipic->regs, IPIC_SIMSR_H, 0);
+ ipic_write(ipic->regs, IPIC_SIMSR_L, 0);
+ ipic_write(ipic->regs, IPIC_SEMSR, 0);
+ ipic_write(ipic->regs, IPIC_SERMR, 0);
+ }
+
+ return 0;
+}
+
+static int ipic_resume(struct sys_device *sdev)
+{
+ struct ipic *ipic = primary_ipic;
+
+ ipic_write(ipic->regs, IPIC_SICFR, ipic_saved_state.sicfr);
+ ipic_write(ipic->regs, IPIC_SIPRR_A, ipic_saved_state.siprr[0]);
+ ipic_write(ipic->regs, IPIC_SIPRR_D, ipic_saved_state.siprr[1]);
+ ipic_write(ipic->regs, IPIC_SIMSR_H, ipic_saved_state.simsr[0]);
+ ipic_write(ipic->regs, IPIC_SIMSR_L, ipic_saved_state.simsr[1]);
+ ipic_write(ipic->regs, IPIC_SICNR, ipic_saved_state.sicnr);
+ ipic_write(ipic->regs, IPIC_SMPRR_A, ipic_saved_state.smprr[0]);
+ ipic_write(ipic->regs, IPIC_SMPRR_B, ipic_saved_state.smprr[1]);
+ ipic_write(ipic->regs, IPIC_SEMSR, ipic_saved_state.semsr);
+ ipic_write(ipic->regs, IPIC_SECNR, ipic_saved_state.secnr);
+ ipic_write(ipic->regs, IPIC_SERMR, ipic_saved_state.sermr);
+ ipic_write(ipic->regs, IPIC_SERCR, ipic_saved_state.sercr);
+
+ return 0;
+}
+#else
+#define ipic_suspend NULL
+#define ipic_resume NULL
+#endif
+
static struct sysdev_class ipic_sysclass = {
set_kset_name("ipic"),
+ .suspend = ipic_suspend,
+ .resume = ipic_resume,
};
static struct sys_device device_ipic = {
diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h
index 281011e..4d5a294 100644
--- a/include/asm-powerpc/reg.h
+++ b/include/asm-powerpc/reg.h
@@ -153,7 +153,9 @@
#define CTRL_RUNLATCH 0x1
#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
#define DABR_TRANSLATION (1UL << 2)
+#define SPRN_DABR2 0x13D /* 83xx */
#define SPRN_DAR 0x013 /* Data Address Register */
+#define SPRN_DBCR 0x136 /* 83xx Data Breakpoint Control Reg */
#define SPRN_DSISR 0x012 /* Data Storage Interrupt Status Register */
#define DSISR_NOHPTE 0x40000000 /* no translation found */
#define DSISR_PROTFAULT 0x08000000 /* protection fault */
@@ -259,6 +261,8 @@
#define HID1_PS (1<<16) /* 750FX PLL selection */
#define SPRN_HID2 0x3F8 /* Hardware Implementation Register 2 */
#define SPRN_IABR 0x3F2 /* Instruction Address Breakpoint Register */
+#define SPRN_IABR2 0x3FA /* 83xx */
+#define SPRN_IBCR 0x135 /* 83xx Insn Breakpoint Control Reg */
#define SPRN_HID4 0x3F4 /* 970 HID4 */
#define SPRN_HID5 0x3F6 /* 970 HID5 */
#define SPRN_HID6 0x3F9 /* BE HID 6 */
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 12e631f..45c1d6f 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -45,10 +45,27 @@
*
*/
+struct fsl_sleep_platform_data {
+ /*
+ * The bits set in this mask will be cleared in the SCCR
+ * when put to sleep, and restored on wakeup.
+ */
+ u32 sccr_mask;
+};
+
+/*
+ * Calls to fsl_sleep_device do not nest -- if you call
+ * sleep twice without an intervening wake, you will not
+ * be able to wake the device again.
+ */
+void fsl_sleep_device(struct fsl_sleep_platform_data *data);
+void fsl_wake_device(struct fsl_sleep_platform_data *data);
+
struct gianfar_platform_data {
/* device specific information */
u32 device_flags;
/* board specific information */
+ struct fsl_sleep_platform_data sleep;
u32 board_flags;
u32 bus_id;
u32 phy_id;
@@ -103,6 +120,7 @@ struct fsl_usb2_platform_data {
enum fsl_usb2_operating_modes operating_mode;
enum fsl_usb2_phy_modes phy_mode;
unsigned int port_enables;
+ struct fsl_sleep_platform_data sleep;
};
/* Flags in fsl_usb2_mph_platform_data */
@@ -125,5 +143,11 @@ struct mpc8xx_pcmcia_ops {
int(*voltage_set)(int slot, int vcc, int vpp);
};
+/* Returns non-zero if the current suspend operation would
+ * lead to a deep sleep (i.e. power removed from the core,
+ * instead of just the clock).
+ */
+int fsl_deep_sleep(void);
+
#endif /* _FSL_DEVICE_H_ */
#endif /* __KERNEL__ */
--
1.5.0.3
^ permalink raw reply related
* [PATCH 4/4] gianfar: Add flags for magic packet and MDIO.
From: Scott Wood @ 2007-07-12 19:18 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
In-Reply-To: <20070712191755.GA31507@ld0162-tx32.am.freescale.net>
The magic packet flag indicates that the hardware has this
capability. The MDIO flag indicates that this device's
registers contain active MDIO registers, and thus this
device should not be put to sleep.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/fsl_soc.c | 7 +++++++
include/linux/fsl_devices.h | 2 ++
2 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 8381736..2a45ff1 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -302,6 +302,9 @@ static int __init gfar_of_init(void)
FSL_GIANFAR_DEV_HAS_VLAN |
FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
+ if (of_get_property(np, "fsl,magic-packet", NULL))
+ gfar_data.device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
+
ph = of_get_property(np, "phy-handle", NULL);
phy = of_find_node_by_phandle(*ph);
@@ -323,6 +326,10 @@ static int __init gfar_of_init(void)
gfar_data.phy_id = *id;
gfar_data.bus_id = res.start;
+ if (res.start >= gfar_dev->resource[0].start &&
+ res.start < gfar_dev->resource[0].end)
+ gfar_data.device_flags |= FSL_GIANFAR_DEV_HAS_MDIO;
+
of_node_put(phy);
of_node_put(mdio);
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 45c1d6f..39af61f 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -86,6 +86,8 @@ struct gianfar_mdio_data {
#define FSL_GIANFAR_DEV_HAS_VLAN 0x00000020
#define FSL_GIANFAR_DEV_HAS_EXTENDED_HASH 0x00000040
#define FSL_GIANFAR_DEV_HAS_PADDING 0x00000080
+#define FSL_GIANFAR_DEV_HAS_MAGIC_PACKET 0x00000100
+#define FSL_GIANFAR_DEV_HAS_MDIO 0x00000200
/* Flags in gianfar_platform_data */
#define FSL_GIANFAR_BRD_HAS_PHY_INTR 0x00000001 /* set or use a timer */
--
1.5.0.3
^ permalink raw reply related
* How to port ISP1362 driver on PPC
From: Vikram Kone @ 2007-07-12 19:19 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: linuxppc-dev
[-- Attachment #1.1.1: Type: text/plain, Size: 1415 bytes --]
Hi..
I'm a linux newbie and im working on porting the USB driver ISP1362 by
Philips on to my Freescale ppc board.
I dont know how to do this... so if any of you can tell me how to do this
step by step, i would be very grateful to you
Few details..
I'm running RHEL with kernel 2.4.21 on a PC (i386 machine)
Target Machine is MPC8548 CDS by Free scale (ppc architecture) running
kernel version 2.6.11
I do have a ppc tool chain, if that helps.....but i dont know how to use it
Thanks
P.S. Plz find attached the driver files in .gz format which im using

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Vikram Kone
College Intern
EWTG GSBU
vkone@cisco.com
Phone :+1 408 853 8916
Mobile :+1 919 457 8792
Cisco Systems, Inc.
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San Jose, CA 95134-1706
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www.cisco.com <http://www.cisco.com/>
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This e-mail may contain confidential and privileged material for the sole
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e-mail and delete all copies of this message.
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[-- Attachment #1.1.2: Type: text/html, Size: 5257 bytes --]
[-- Attachment #1.2: spacer.gif --]
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[-- Attachment #2: ISP1362.rar --]
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^ permalink raw reply
* RE: XSysAce driver cant mount DOS part
From: Robertson, Joseph M. @ 2007-07-12 19:49 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-embedded
In-Reply-To: <fa686aa40707121206n7e75e770q742adb3659f35e79@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 1681 bytes --]
Hi,
Ok this is surely enough to drive you nuts, but all I get is an error.
How the heck do you debug patch? All I get is this.
root@tocnet_ws_9:/mnt/public2/ecau/src/linux/linux-2.6.17.1# patch -p1 -un -i xsys.patch
patch unexpectedly ends in middle of line
patch: **** Only garbage was found in the patch input.
I copied the text from the htmlpage and pasted to a file.
Its very weird to me, I've never seen that. A line number would be nice.
Joe Robertson
x8259
Joseph.Robertson@sanmina-sci.com
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^ permalink raw reply
* Re: Tickless Hz/hrtimers/etc. on PowerPC
From: Matt Sealey @ 2007-07-12 20:04 UTC (permalink / raw)
To: Michael Neuling; +Cc: ppc-dev
In-Reply-To: <29941.1184255383@neuling.org>
Michael Neuling wrote:
>> Okay.
>>
>> What I didn't want to do is spend a day sifting some other development
>> tree picking out what I think might be possibly sort of the right patches
>> for it.
>>
>> I'd get it wrong because having not worked on it, I don't know what I am
>> even looking for.
>>
>> And I don't want to run -rt or wireless-dev for the benefit of a single
>> feature. What I am after is something like Ingo Molnar throws out..
>> single patches done the old way, not git trees. It's so much easier to
>> handle and integrate for example into a Gentoo ebuild or to make a
>> tarball of accumulated patches from a certain release kernel.
>
> I'm sooo with ya. I like my patches alphabetised, but no one ever does
> it for me.
Well my only requirement is numbering them so they patch in order; there
are some cute little requirements on that, but I'd rather patch the bare
minimum and bring in as few quirks and new features than just grab an
entire -rt tree with what amounts to 60 or 70 individual patches and
start renumbering them.
We already have some ~20 for Efika support on top of 2.6.22 including
minor bugfixes and stuff, and the Gentoo genpatches stuff. I really want
to get a good start on CFS, hrtimers, dynticks and so on though and see
if we can push it to users and get out some decent testing and bug
reports. I think it will help everyone if it is not just a feature which
hits mainline after 6 months through supposed maturity (when a lack of
bug reports may well also be down to lack of interest).
I think the Efika as a low-power and fairly average performance board,
would benefit (and does benefit!) from features like dynticks, 5200B
has a bunch of hrtimers, SLUB gave me some insane speed improvement
exactly as the best benchmarks predicted (also got the same under VMware
on my x86 laptop, never going back to SLAB now!). The more processor
time we can eke out, and the less unecessary work the processor does
on housekeeping, the better the board will run for users. Everyone wins :)
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
^ permalink raw reply
* Re: Tickless Hz/hrtimers/etc. on PowerPC
From: Matt Sealey @ 2007-07-12 20:08 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: ppc-dev, Michael Neuling
In-Reply-To: <46965781.6010601@ru.mvista.com>
Sergei Shtylyov wrote:
> Hello.
>
> Matt Sealey wrote:
>
>> And I don't want to run -rt or wireless-dev for the benefit of a single
>
> BTW, the latest -rt has has been also released in the broken out form
> (at last!) which has "PPC gtod and highres support" section in its
> series file.
Hm okay.
>> feature. What I am after is something like Ingo Molnar throws out..
>
> One 1.5 Megabyte patch?! Bleh... thanks goodness he (or Thomas) has
> finally changed his mind about this. :-)
Good point, but at least it was nice and self-contained and not mindlessly
interdependant on other minor fixes. I think if you are going to patch in
a feature that feature should be a feature. Not 8 bugfixes and 8 seperate
minifeatures which cooperate to bring in a whole, especialy as a lot of
them are so interdependant that they would not have any effect or maybe
even break things on their own :)
>> single patches done the old way, not git trees. It's so much easier to
>> handle and integrate for example into a Gentoo ebuild or to make a
>> tarball of accumulated patches from a certain release kernel.
>
> This also can become a nightmare if you intend to pick up some later
> fixes only.
Indeed, but you trade off one for the other in everything :)
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
^ permalink raw reply
* Re: Tickless Hz/hrtimers/etc. on PowerPC
From: Geert Uytterhoeven @ 2007-07-12 20:12 UTC (permalink / raw)
To: Matt Sealey; +Cc: ppc-dev, Michael Neuling
In-Reply-To: <46968960.6090402@genesi-usa.com>
[-- Attachment #1: Type: TEXT/PLAIN, Size: 1533 bytes --]
On Thu, 12 Jul 2007, Matt Sealey wrote:
> Michael Neuling wrote:
> >> And I don't want to run -rt or wireless-dev for the benefit of a single
> >> feature. What I am after is something like Ingo Molnar throws out..
> >> single patches done the old way, not git trees. It's so much easier to
> >> handle and integrate for example into a Gentoo ebuild or to make a
> >> tarball of accumulated patches from a certain release kernel.
> >
> > I'm sooo with ya. I like my patches alphabetised, but no one ever does
> > it for me.
>
> Well my only requirement is numbering them so they patch in order; there
> are some cute little requirements on that, but I'd rather patch the bare
> minimum and bring in as few quirks and new features than just grab an
> entire -rt tree with what amounts to 60 or 70 individual patches and
> start renumbering them.
That's why quilt uses a series file, so the patch names don't have to be
ordered.
With kind regards,
Geert Uytterhoeven
Software Architect
Sony Network and Software Technology Center Europe
The Corporate Village · Da Vincilaan 7-D1 · B-1935 Zaventem · Belgium
Phone: +32 (0)2 700 8453
Fax: +32 (0)2 700 8622
E-mail: Geert.Uytterhoeven@sonycom.com
Internet: http://www.sony-europe.com/
Sony Network and Software Technology Center Europe
A division of Sony Service Centre (Europe) N.V.
Registered office: Technologielaan 7 · B-1840 Londerzeel · Belgium
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^ permalink raw reply
* Re: [PATCH] fix idr_get_new_above id alias bugs
From: Andrew Morton @ 2007-07-12 21:35 UTC (permalink / raw)
To: jim.houston
Cc: Tejun Heo, Kristian Hoegsberg, linux-kernel, openib-general,
Stefan Roscher, linuxppc-dev, raisch, Hoang-Nam Nguyen
In-Reply-To: <1184097931.3020.73.camel@localhost.localdomain>
On Tue, 10 Jul 2007 16:05:31 -0400
Jim Houston <jim.houston@ccur.com> wrote:
> Hoang-Nam Nguyen reported a bug in idr_get_new_above()
> which occurred with a starting id value like 0x3ffffffc.
> His test module easily reproduced the problem. Thanks.
>
> The test revealed the following bugs:
>
> 1. Relying on shift operations which have undefined results
> e.g.: 1 << n where n > word size. On i386 an integer shift
> only uses the low 5 bits of the shift count.
>
> 2. An off by one error which prevented the top most layer
> of the radix tree from being allocated. This meant that
> sub_alloc() would allocate an entry in the existing portion
> of the radix tree which aliased the requested address. When
> it tried to allocate id 0x40000000, it might use the slot
> belonging to id 0.
>
> 3. There was also a failure in the code which walked back up
> the tree if an allocation failed. The normal case is to
> descend the tree checking the starting id value against the
> bitmap at each level. If the bit is set, we know that the
> entire sub-tree is full and we can short cut the search.
> We may still descend to the lowest level and find that the
> portion of the id space we want is full. In this case we
> need to walk back up the tree and continue the search.
> The existing code just returned to the previous level and
> continued. This resulted in an attempt to allocate an id
> above 0x3ffffffc using the slot for id 0x3ffffc00 instead of
> 0x40000000 which it then claimed to have allocated. The same
> problem occurs with 0x3ff as the requested id value if it
> is already in use.
>
> With this patch, idr.c should work as advertised allocating id
> values in the range 0...0x7fffffff. Andrew had speculated that
> it should allow the full range 0...0xffffffff to be used. I was
> tempted to make changes to allow this, but it would require changes
> to API, e.g. making the starting id value and the return value
> unsigned.
Problem. There are a large number of IDR changes pending and this
patch breaks in way which I am not at all confident in fixing.
Originarily I'd just dump the earlier patches because bugfixes come
first. But this time there's a very large dependency trail on the
earlier patches (especially Tejun's extensive sysfs rework in Greg's
driver tree) so the wreckage would be extensive.
Also, it's possible that Tejun's changes already fixed some of the things
which you fixed. Or added new bugs ;)
Bottom line: a reworked patch against 2.6.22-rc6-mm1 would be muchly
appreciated if poss, please.
While you're there, it would be helpful if you could review all these
pending IDR changes:
ftp://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.6/2.6.22-rc6/2.6.22-rc6-mm1/broken-out/gregkh-driver-ida-implement-idr-based-id-allocator.patch
ftp://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.6/2.6.22-rc6/2.6.22-rc6-mm1/broken-out/gregkh-driver-idr-fix-obscure-bug-in-allocation-path.patch
ftp://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.6/2.6.22-rc6/2.6.22-rc6-mm1/broken-out/gregkh-driver-idr-separate-out-idr_mark_full.patch
ftp://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.6/2.6.22-rc6/2.6.22-rc6-mm1/broken-out/lib-add-idr_for_each.patch
ftp://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.6/2.6.22-rc6/2.6.22-rc6-mm1/broken-out/lib-add-idr_for_each-fix.patch
ftp://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.6/2.6.22-rc6/2.6.22-rc6-mm1/broken-out/lib-add-idr_remove_all.patch
Thanks.
^ permalink raw reply
* [PATCH 0/5] Kconfig cleanup revisited
From: Arnd Bergmann @ 2007-07-12 21:01 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
Since this was brought up by Mark, here is a resend of the
Kconfig cleanup patches that have not been merged so far,
with updates for the comments I received.
I stumbled over another bug in the process, and fear I have
found a can of worms there (not opened yet): There are
still many files under arch/powerpc that include headers
from include/asm-ppc/. Most of these includes can simply
be removed, but some are real bugs, where generic code still
relies on board-specific macro definitions.
Arnd <><
--
^ permalink raw reply
* [PATCH 2/5] linkstation: fix multiplatform build
From: Arnd Bergmann @ 2007-07-12 21:01 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
In-Reply-To: <20070712210156.973038514@arndb.de>
The ls_uart file accidentally includes two headers from asm-ppc that
are no longer needed but cause a broken build in some configurations.
Kill the includes to fix the build.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
diff --git a/arch/powerpc/platforms/embedded6xx/ls_uart.c b/arch/powerpc/platforms/embedded6xx/ls_uart.c
index d0bee9f..3b023b0 100644
--- a/arch/powerpc/platforms/embedded6xx/ls_uart.c
+++ b/arch/powerpc/platforms/embedded6xx/ls_uart.c
@@ -4,8 +4,6 @@
#include <linux/serial_reg.h>
#include <linux/serial_8250.h>
#include <asm/io.h>
-#include <asm/mpc10x.h>
-#include <asm/ppc_sys.h>
#include <asm/prom.h>
#include <asm/termbits.h>
--
^ permalink raw reply related
* [PATCH 4/5] move 86xx into multiplatform
From: Arnd Bergmann @ 2007-07-12 21:02 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
In-Reply-To: <20070712210156.973038514@arndb.de>
MPC86xx based machines don't need their own kernel,
but can run one that is shared with the other 6xx
compatible machines, so we should allow that
in Kconfig.
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
Kumar, I don't remember if you still had objections
to merging 86xx annd 83xx into multiplatform after
our last discussion.
Please Ack or Nack the two patches.
Index: linux-2.6/arch/powerpc/platforms/86xx/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/86xx/Kconfig
+++ linux-2.6/arch/powerpc/platforms/86xx/Kconfig
@@ -1,18 +1,20 @@
-choice
- prompt "86xx Board Type"
- depends on PPC_86xx
- default MPC8641_HPCN
+config PPC_86xx
+ bool "Freescale 86xx based boards"
+ depends on 6xx
+ select FSL_SOC
+ select ALTIVEC
+ help
+ The Freescale E600 SoCs have 74xx cores.
config MPC8641_HPCN
bool "Freescale MPC8641 HPCN"
+ depends on PPC_86xx
select PPC_I8259
select DEFAULT_UIMAGE
select CPU_7450
help
This option enables support for the MPC8641 HPCN board.
-endchoice
-
config MPC8641
bool
select PPC_INDIRECT_PCI
Index: linux-2.6/arch/powerpc/platforms/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/Kconfig
+++ linux-2.6/arch/powerpc/platforms/Kconfig
@@ -23,13 +23,6 @@ config PPC_83xx
select 83xx
select WANT_DEVICE_TREE
-config PPC_86xx
- bool "Freescale 86xx"
- depends on 6xx
- select FSL_SOC
- select ALTIVEC
- help
- The Freescale E600 SoCs have 74xx cores.
endchoice
config CLASSIC32
--
^ permalink raw reply
* [PATCH 5/5] move 83xx into multiplatform
From: Arnd Bergmann @ 2007-07-12 21:02 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
In-Reply-To: <20070712210156.973038514@arndb.de>
MPC83xx based machines don't need their own kernel,
but can run one that is shared with the other 6xx
compatible machines, so we should allow that
in Kconfig.
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
Index: linux-2.6/arch/powerpc/platforms/83xx/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/83xx/Kconfig
+++ linux-2.6/arch/powerpc/platforms/83xx/Kconfig
@@ -1,10 +1,13 @@
-choice
- prompt "83xx Board Type"
- depends on PPC_83xx
- default MPC834x_MDS
+config PPC_83xx
+ bool "Freescale 83xx based boards"
+ depends on 6xx
+ select FSL_SOC
+ select 83xx
+ select WANT_DEVICE_TREE
config MPC8313_RDB
bool "Freescale MPC8313 RDB"
+ depends on PPC_83xx
select DEFAULT_UIMAGE
select CPU_603e
help
@@ -12,6 +15,7 @@ config MPC8313_RDB
config MPC832x_MDS
bool "Freescale MPC832x MDS"
+ depends on PPC_83xx
select DEFAULT_UIMAGE
select QUICC_ENGINE
select CPU_603e
@@ -20,6 +24,7 @@ config MPC832x_MDS
config MPC832x_RDB
bool "Freescale MPC832x RDB"
+ depends on PPC_83xx
select DEFAULT_UIMAGE
select QUICC_ENGINE
select CPU_603e
@@ -28,6 +33,7 @@ config MPC832x_RDB
config MPC834x_MDS
bool "Freescale MPC834x MDS"
+ depends on PPC_83xx
select DEFAULT_UIMAGE
select CPU_603e
help
@@ -40,6 +46,7 @@ config MPC834x_MDS
config MPC834x_ITX
bool "Freescale MPC834x ITX"
+ depends on PPC_83xx
select DEFAULT_UIMAGE
select CPU_603e
help
@@ -50,14 +57,13 @@ config MPC834x_ITX
config MPC836x_MDS
bool "Freescale MPC836x MDS"
+ depends on PPC_83xx
select DEFAULT_UIMAGE
select QUICC_ENGINE
select CPU_603e
help
This option enables support for the MPC836x MDS Processor Board.
-endchoice
-
config PPC_MPC831x
bool
select PPC_UDBG_16550
Index: linux-2.6/arch/powerpc/platforms/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/Kconfig
+++ linux-2.6/arch/powerpc/platforms/Kconfig
@@ -16,13 +16,6 @@ config PPC_82xx
bool "Freescale 82xx"
depends on 6xx
-config PPC_83xx
- bool "Freescale 83xx"
- depends on 6xx
- select FSL_SOC
- select 83xx
- select WANT_DEVICE_TREE
-
endchoice
config CLASSIC32
--
^ permalink raw reply
* [PATCH 3/5] move embedded6xx into multiplatform
From: Arnd Bergmann @ 2007-07-12 21:01 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
In-Reply-To: <20070712210156.973038514@arndb.de>
The various embedded 6xx systems can easily coexist
in one kernel together with the other 6xx based systems,
so there is no strict reason to keep them separate.
This also fixes a problem introduced in one earlier
patch, where the embedded 74xx based systems could
not automatically select altivec any more.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
Index: linux-2.6/arch/powerpc/platforms/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/Kconfig
+++ linux-2.6/arch/powerpc/platforms/Kconfig
@@ -12,10 +12,6 @@ config PPC_MULTIPLATFORM
RS/6000 machine, an Apple machine, or a PReP, CHRP,
Maple or Cell-based machine.
-config EMBEDDED6xx
- bool "Embedded 6xx/7xx/7xxx-based board"
- depends on PPC32 && (BROKEN||BROKEN_ON_SMP)
-
config PPC_82xx
bool "Freescale 82xx"
depends on 6xx
Index: linux-2.6/arch/powerpc/platforms/embedded6xx/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/embedded6xx/Kconfig
+++ linux-2.6/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -1,9 +1,10 @@
-choice
- prompt "Machine Type"
- depends on EMBEDDED6xx
+config EMBEDDED6xx
+ bool "Embedded 6xx/7xx/7xxx-based boards"
+ depends on PPC32 && (BROKEN||BROKEN_ON_SMP) && PPC_MULTIPLATFORM
config LINKSTATION
bool "Linkstation / Kurobox(HG) from Buffalo"
+ depends on EMBEDDED6xx
select MPIC
select FSL_SOC
select PPC_UDBG_16550 if SERIAL_8250
@@ -18,6 +19,7 @@ config LINKSTATION
config MPC7448HPC2
bool "Freescale MPC7448HPC2(Taiga)"
+ depends on EMBEDDED6xx
select TSI108_BRIDGE
select DEFAULT_UIMAGE
select PPC_UDBG_16550
@@ -28,6 +30,7 @@ config MPC7448HPC2
config PPC_HOLLY
bool "PPC750GX/CL with TSI10x bridge (Hickory/Holly)"
+ depends on EMBEDDED6xx
select TSI108_BRIDGE
select PPC_UDBG_16550
select WANT_DEVICE_TREE
@@ -38,13 +41,13 @@ config PPC_HOLLY
config PPC_PRPMC2800
bool "Motorola-PrPMC2800"
+ depends on EMBEDDED6xx
select MV64X60
select NOT_COHERENT_CACHE
select WANT_DEVICE_TREE
select CPU_7450
help
This option enables support for the Motorola PrPMC2800 board
-endchoice
config TSI108_BRIDGE
bool
--
^ permalink raw reply
* [PATCH 1/5] autoselect optimal -mcpu= flag by platform
From: Arnd Bergmann @ 2007-07-12 21:12 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
In-Reply-To: <20070712210156.973038514@arndb.de>
We can choose the -mcpu= gcc flags for compiling the kernel
based on the platform that we build for. In case of multiplatform
kernels, this chooses a setting for a common subset.
When using a platform type that can use different CPUs, a
new option CONFIG_PPC_CPU_SELECTION can be enabled to select
more specifically which CPUs the kernel will be able to
run on.
This replaces the CONFIG_POWER4_ONLY option with an much more
generic approach.
Also, when CONFIG_PPC_CPU_SELECTION is set, it is now possible
to select a CPU to tune for by means of the -mtune= option.
I tried to be very careful when coding the specific rules into
the Kconfig language, but it would be good to have a few
people sanity-checking them.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
updates include:
- lots of added help texts
- pass -mcpu=power3 instead of -mcpu=powerpc64 to work around a gcc bug
-
Index: linux-2.6/arch/powerpc/platforms/4xx/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/4xx/Kconfig
+++ linux-2.6/arch/powerpc/platforms/4xx/Kconfig
@@ -87,6 +87,7 @@ endmenu
# 40x specific CPU modules, selected based on the board above.
config NP405H
bool
+ select CPU_405
#depends on ASH
# OAK doesn't exist but wanted to keep this around for any future 403GCX boards
@@ -94,6 +95,7 @@ config 403GCX
bool
#depends on OAK
select IBM405_ERR51
+ select CPU_403
config 405GP
bool
@@ -102,19 +104,23 @@ config 405GP
config 405EP
bool
+ select CPU_405
config 405GPR
bool
+ select CPU_405
config VIRTEX_II_PRO
bool
select IBM405_ERR77
select IBM405_ERR51
+ select CPU_405
config STB03xxx
bool
select IBM405_ERR77
select IBM405_ERR51
+ select CPU_405
# 40x errata/workaround config symbols, selected by the CPU models above
@@ -168,20 +174,25 @@ config 440EP
bool
select PPC_FPU
select IBM440EP_ERR42
+ select CPU_440
config 440GP
bool
select IBM_NEW_EMAC_ZMII
+ select CPU_440
config 440GX
bool
+ select CPU_440
config 440SP
bool
+ select CPU_440
config 440A
bool
depends on 440GX
+ select CPU_440
default y
# 44x errata/workaround config symbols, selected by the CPU models above
Index: linux-2.6/arch/powerpc/platforms/52xx/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/52xx/Kconfig
+++ linux-2.6/arch/powerpc/platforms/52xx/Kconfig
@@ -25,12 +25,14 @@ config PPC_EFIKA
select RTAS_PROC
select PPC_MPC52xx
select PPC_NATIVE
+ select CPU_603e
default n
config PPC_LITE5200
bool "Freescale Lite5200 Eval Board"
depends on PPC_MULTIPLATFORM && PPC32
select PPC_MPC5200
+ select CPU_603e
default n
Index: linux-2.6/arch/powerpc/platforms/82xx/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/82xx/Kconfig
+++ linux-2.6/arch/powerpc/platforms/82xx/Kconfig
@@ -10,6 +10,7 @@ config MPC82xx_ADS
select 8272
select 8260
select FSL_SOC
+ select CPU_603e
help
This option enables support for the MPC8272 ADS board
Index: linux-2.6/arch/powerpc/platforms/83xx/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/83xx/Kconfig
+++ linux-2.6/arch/powerpc/platforms/83xx/Kconfig
@@ -6,6 +6,7 @@ choice
config MPC8313_RDB
bool "Freescale MPC8313 RDB"
select DEFAULT_UIMAGE
+ select CPU_603e
help
This option enables support for the MPC8313 RDB board.
@@ -13,6 +14,7 @@ config MPC832x_MDS
bool "Freescale MPC832x MDS"
select DEFAULT_UIMAGE
select QUICC_ENGINE
+ select CPU_603e
help
This option enables support for the MPC832x MDS evaluation board.
@@ -20,12 +22,14 @@ config MPC832x_RDB
bool "Freescale MPC832x RDB"
select DEFAULT_UIMAGE
select QUICC_ENGINE
+ select CPU_603e
help
This option enables support for the MPC8323 RDB board.
config MPC834x_MDS
bool "Freescale MPC834x MDS"
select DEFAULT_UIMAGE
+ select CPU_603e
help
This option enables support for the MPC 834x MDS evaluation board.
@@ -37,6 +41,7 @@ config MPC834x_MDS
config MPC834x_ITX
bool "Freescale MPC834x ITX"
select DEFAULT_UIMAGE
+ select CPU_603e
help
This option enables support for the MPC 834x ITX evaluation board.
@@ -47,6 +52,7 @@ config MPC836x_MDS
bool "Freescale MPC836x MDS"
select DEFAULT_UIMAGE
select QUICC_ENGINE
+ select CPU_603e
help
This option enables support for the MPC836x MDS Processor Board.
Index: linux-2.6/arch/powerpc/platforms/86xx/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/86xx/Kconfig
+++ linux-2.6/arch/powerpc/platforms/86xx/Kconfig
@@ -7,6 +7,7 @@ config MPC8641_HPCN
bool "Freescale MPC8641 HPCN"
select PPC_I8259
select DEFAULT_UIMAGE
+ select CPU_7450
help
This option enables support for the MPC8641 HPCN board.
Index: linux-2.6/arch/powerpc/platforms/Kconfig.cputype
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/Kconfig.cputype
+++ linux-2.6/arch/powerpc/platforms/Kconfig.cputype
@@ -51,14 +51,352 @@ config E200
endchoice
-config POWER4_ONLY
- bool "Optimize for POWER4"
+config PPC_CPU_SELECTION
+ bool "Advanced CPU selection"
+ help
+ The kernel can be built for a range of CPU types, which it
+ normally determines automatically from the platform types that
+ have been enabled. In order to optimized leaving out support
+ for the older CPUs or selecting the exact -mtune= option that
+ is passed to gcc, you can further optimize the kernel for a
+ particular system.
+
+ Selecting this option will not cause changes directly, but will
+ reveal further options.
+
+ If unsure, say N.
+
+config CPU_DEFAULT
+ bool "Don't specify -mcpu= to gcc" if PPC_CPU_SELECTION
+ help
+ When this option is selected, gcc is called without
+ any specific -mcpu= argument, regardless of which
+ CPUs are enabled in the next options.
+
+config CPU_RS64
+ bool "RS64" if PPC_CPU_SELECTION
depends on PPC64
- default n
- ---help---
- Cause the compiler to optimize for POWER4/POWER5/PPC970 processors.
- The resulting binary will not work on POWER3 or RS64 processors
- when compiled with binutils 2.15 or later.
+ default y if PPC_PSERIES || PPC_ISERIES
+ help
+ Select this if you want to have support for the first
+ generation of 64 bit PowerPC CPUs used in the late
+ 1990s in IBM RS/6000 and AS/400 machines.
+
+config CPU_POWER3
+ bool "IBM Power3" if PPC_CPU_SELECTION
+ depends on PPC64
+ default y if PPC_PSERIES
+ help
+ Select this if you want to have support for the
+ Power3 chip used in IBM RS/6000 and early pSeries
+ machines.
+
+config CPU_POWER4
+ bool "IBM Power4" if PPC_CPU_SELECTION
+ depends on PPC64
+ default y if PPC_PSERIES || PPC_ISERIES
+ help
+ Select this if you want to have support for the Power 4
+ processor used in IBM pSeries and iSeries machines.
+
+config CPU_POWER5
+ bool "IBM Power5" if PPC_CPU_SELECTION
+ depends on PPC64
+ default y if PPC_PSERIES
+ help
+ Select this if you want to have support for the Power 5
+ processor used in IBM System p and System i machines.
+
+config CPU_POWER6
+ bool "IBM Power6" if PPC_CPU_SELECTION
+ depends on PPC64
+ default y if PPC_PSERIES
+ select ALTIVEC
+ help
+ Select this if you want to have support for the Power 6
+ processor used in the latest IBM System p and System i
+ machines.
+
+config CPU_970
+ bool "IBM PowerPC 970 (G5)" if PPC_CPU_SELECTION
+ depends on PPC64
+ default y if PPC_PSERIES
+ select ALTIVEC
+ help
+ Select this if you want to have support for the PowerPC 970
+ processor used in Apple Power Macintosh G5 and IBM JS2x blade
+ servers and other systems.
+
+config CPU_CELL
+ bool "Sony/Toshiba/IBM Cell Broadband Engine" if PPC_CPU_SELECTION
+ depends on PPC64
+ select ALTIVEC
+ help
+ Select this if you want to have support for the Cell Broadband
+ Engine processor used the Sony Playstation 3, the IBM QS2x
+ blade servers and other systems.
+
+config CPU_PA6T
+ bool "PA Semi PA6T-1682M" if PPC_CPU_SELECTION
+ depends on PPC64
+ select ALTIVEC
+ help
+ Select this if you want to have support for the PA6T-1682M
+ processor from PA Semi.
+
+config CPU_601
+ bool "PowerPC 601 (G1)" if PPC_CPU_SELECTION
+ depends on 6xx
+ default PPC_CHRP || PPC_PREP
+ help
+ Select this if you really wish to have support for ancient PowerPC
+ 601 processors used in very early Power Macintosh machines and
+ some CHRP boards.
+ Most people will want to disable this option to get better
+ performance on modern machines.
+
+config CPU_603e
+ bool "PowerPC 603e, 604, 604e, 52xx, 82xx, 83xx (G2)" if PPC_CPU_SELECTION
+ depends on 6xx
+ default PPC_CHRP || PPC_PREP || PPC_PMAC
+ help
+ The 603e processor line is the most widespread implementation of
+ the PowerPC ISA, so you most likely want to enable this if you are
+ building a kernel for multiple platforms.
+
+config CPU_750
+ bool "PowerPC 740, 750 (G3)" if PPC_CPU_SELECTION
+ depends on 6xx
+ default PPC_PMAC
+ help
+ Select this for the G3 PowerPC 750 processor used in Apple
+ Power Macintosh and a number of embedded boards.
+
+config CPU_7400
+ bool "PowerPC 7400, 7410 (G4)" if PPC_CPU_SELECTION
+ depends on 6xx
+ default PPC_PMAC
+ select ALTIVEC
+ help
+ Select this for the early G4 PowerPC 7400 processor used in
+ a few Apple Power Macintosh and other machines.
+
+config CPU_7450
+ bool "PowerPC 744x, 745x, 86xx (G4)" if PPC_CPU_SELECTION
+ depends on 6xx
+ default PPC_PMAC
+ select ALTIVEC
+ help
+ Select this for the later G4 PowerPC 7450 processor and its
+ derivatives used in most of the late Apple Power Macintosh
+ machines and some high-performance embedded boards.
+
+config CPU_8540
+ bool "Freescale e500v1 (MPC8540 compatible)" if PPC_CPU_SELECTION
+ depends on PPC_85xx
+ help
+ Select this for the older version 1 of the e500 core used in
+ the earlier MPC85xx processors.
+
+config CPU_8548
+ bool "Freescale e500v2 (MPC8548 compatible)" if PPC_CPU_SELECTION
+ depends on PPC_85xx
+ help
+ Select this for the newer version 2 of the e500 core that was
+ first used in the MPC8548 processor.
+ Some versions of gcc don't know about this yet, so you may
+ also have to enable 8540 to get the best performance with
+ your compiler.
+
+config CPU_403
+ bool "IBM 403" if PPC_CPU_SELECTION
+ depends on 40x
+ help
+ The PowerPC 403 core is used in the first generation Tivo and
+ some other old machines. Select this only if you are sure that
+ you want to run your kernel on one of these machines.
+
+config CPU_405
+ bool "IBM/AMCC 405" if PPC_CPU_SELECTION
+ depends on 40x
+ default y
+ help
+ Practically all PowerPC 40x based platforms supported by Linux use
+ a 405 core, so you should enable this option.
+
+config CPU_440
+ bool "IBM/AMCC 440" if PPC_CPU_SELECTION
+ depends on 44x
+ default y
+ help
+ If you are building for a PowerPC 440 based, you don't really
+ have a choice here, say Y.
+
+choice
+ prompt "Tune for processor type" if PPC_CPU_SELECTION
+ default TUNE_POWER4 if PPC64
+ default TUNE_DEFAULT
+ help
+ This will choose the gcc flag to use for the -mtune= parameter.
+ See the above list for a description of the invidual options.
+
+ If unsure, select TUNE_DEFAULT, gcc will tune for the oldest
+ CPU that the kernel supports in that case, which usually
+ gives reasonable results on newer CPUs as well.
+
+config TUNE_DEFAULT
+ bool "Don't specify -mtune= to gcc"
+
+config TUNE_RS64
+ bool "RS64"
+ depends on CPU_RS64
+
+config TUNE_POWER3
+ bool "IBM Power3"
+ depends on CPU_POWER3
+
+config TUNE_POWER4
+ bool "IBM Power4"
+ depends on CPU_POWER4
+
+config TUNE_POWER5
+ bool "IBM Power5"
+ depends on CPU_POWER5
+
+config TUNE_POWER6
+ bool "IBM Power6"
+ depends on CPU_POWER6
+
+config TUNE_970
+ bool "IBM PowerPC 970 (G5)"
+ depends on CPU_970
+
+config TUNE_CELL
+ bool "Sony/Toshiba/IBM Cell Broadband Engine"
+ depends on CPU_CELL
+
+config TUNE_PA6T
+ bool "PA Semi PA6T-1682M"
+ depends on CPU_PA6T
+
+config TUNE_601
+ bool "PowerPC 601 (G1)"
+ depends on CPU_601
+
+config TUNE_603e
+ bool "PowerPC 603e, 604, 604e, 52xx, 82xx, 83xx (G2)"
+ depends on CPU_603e
+
+config TUNE_750
+ bool "PowerPC 740/750 (G3)"
+ depends on CPU_750
+
+config TUNE_7400
+ bool "PowerPC 7400, 7410 (G4)"
+ depends on CPU_7400
+
+config TUNE_7450
+ bool "PowerPC 744x, 745x, 86xx (G4)"
+ depends on CPU_7450
+
+config TUNE_821
+ bool "Freescale MPC821"
+ depends on 8xx
+
+config TUNE_823
+ bool "Freescale MPC823"
+ depends on 8xx
+
+config TUNE_860
+ bool "Freescale MPC860"
+ depends on 8xx
+
+config TUNE_403
+ bool "IBM 403"
+ depends on CPU_403
+
+config TUNE_405
+ bool "IBM/AMCC 405"
+ depends on CPU_405
+
+config TUNE_440
+ bool "IBM/AMCC 440"
+ depends on CPU_440
+
+config TUNE_8540
+ bool "Freescale e500v1"
+ depends on CPU_8540
+
+config TUNE_8548
+ bool "Freescale e500v2"
+ depends on CPU_8548
+
+config TUNE_E200
+ bool "Freescale e200"
+ depends on E200
+
+endchoice
+
+config PPC_MCPU
+ string
+ default "" if CPU_DEFAULT
+ default "-mcpu=power3" if CPU_POWER3 || CPU_RS64
+ default "-mcpu=power4" if (CPU_POWER5 || CPU_POWER6) && (CPU_970 || CPU_CELL || CPU_PA6T)
+ default "-mcpu=power4" if CPU_POWER4
+ default "-mcpu=power5" if CPU_POWER5
+ default "-mcpu=power6" if CPU_POWER6
+ default "-mcpu=970" if CPU_970
+ default "-mcpu=cell" if CPU_CELL
+ default "-mcpu=pa6t" if CPU_PA6T
+ default "-mcpu=power3" if PPC64
+ default "-mcpu=powerpc" if CPU_601 && (CPU_603e || CPU_750 || CPU_7400 || CPU_7450)
+ default "-mcpu=601" if CPU_601
+ default "-mcpu=603e" if CPU_603e
+ default "-mcpu=750" if CPU_750
+ default "-mcpu=7400" if CPU_7400
+ default "-mcpu=7450" if CPU_7450
+ default "-mcpu=8540" if CPU_8540
+ default "-mcpu=8548" if CPU_8548
+ default "-mcpu=powerpc" if (CPU_403 && CPU_405)
+ default "-mcpu=powerpc" if (CPU_403 || CPU_405) && CPU_440
+ default "-mcpu=403" if CPU_403
+ default "-mcpu=405" if CPU_405
+ default "-mcpu=440" if CPU_440
+ default "-mcpu=860" if PPC_8xx
+ default "-mcpu=e200" if E200
+ default "-mcpu=powerpc"
+
+config PPC_MTUNE
+ string
+ default "" if TUNE_DEFAULT
+ default "-mtune=power3" if TUNE_POWER3
+ default "-mtune=rs64a" if TUNE_RS64
+ default "-mtune=power4" if TUNE_POWER4
+ default "-mtune=power5" if TUNE_POWER5
+ default "-mtune=power6" if TUNE_POWER6
+ default "-mtune=970" if TUNE_970
+ default "-mtune=cell" if TUNE_CELL
+ default "-mtune=pa6t" if TUNE_PA6T
+ default "-mtune=601" if TUNE_601
+ default "-mtune=603e" if TUNE_603e
+ default "-mtune=750" if TUNE_750
+ default "-mtune=7400" if TUNE_7400
+ default "-mtune=7450" if TUNE_7450
+ default "-mtune=8540" if TUNE_8540
+ default "-mtune=8548" if TUNE_8548
+ default "-mtune=403" if TUNE_403
+ default "-mtune=405" if TUNE_405
+ default "-mtune=440" if TUNE_440
+ default "-mtune=821" if TUNE_821
+ default "-mtune=823" if TUNE_823
+ default "-mtune=860" if TUNE_860
+ default "-mtune=e200" if TUNE_E200
+ default "-mtune=power4" if PPC64
+
+# The next three options should probably go away
+config POWER4_ONLY
+ def_bool y
+ depends on PPC64 && !CPU_POWER3 && !CPU_RS64
config POWER3
bool
Index: linux-2.6/arch/powerpc/platforms/cell/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/cell/Kconfig
+++ linux-2.6/arch/powerpc/platforms/cell/Kconfig
@@ -20,6 +20,7 @@ config PPC_IBM_CELL_BLADE
select MMIO_NVRAM
select PPC_UDBG_16550
select UDBG_RTAS_CONSOLE
+ select CPU_CELL
menu "Cell Broadband Engine options"
depends on PPC_CELL
Index: linux-2.6/arch/powerpc/platforms/celleb/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/celleb/Kconfig
+++ linux-2.6/arch/powerpc/platforms/celleb/Kconfig
@@ -2,6 +2,7 @@ config PPC_CELLEB
bool "Toshiba's Cell Reference Set 'Celleb' Architecture"
depends on PPC_MULTIPLATFORM && PPC64
select PPC_CELL
+ select CPU_CELL
select PPC_OF_PLATFORM_PCI
select HAS_TXX9_SERIAL
select PPC_UDBG_BEAT
Index: linux-2.6/arch/powerpc/platforms/embedded6xx/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/embedded6xx/Kconfig
+++ linux-2.6/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -8,6 +8,7 @@ config LINKSTATION
select FSL_SOC
select PPC_UDBG_16550 if SERIAL_8250
select DEFAULT_UIMAGE
+ select CPU_603e
help
Select LINKSTATION if configuring for one of PPC- (MPC8241)
based NAS systems from Buffalo Technology. So far only
@@ -20,6 +21,7 @@ config MPC7448HPC2
select TSI108_BRIDGE
select DEFAULT_UIMAGE
select PPC_UDBG_16550
+ select CPU_7450
help
Select MPC7448HPC2 if configuring for Freescale MPC7448HPC2 (Taiga)
platform
@@ -29,6 +31,7 @@ config PPC_HOLLY
select TSI108_BRIDGE
select PPC_UDBG_16550
select WANT_DEVICE_TREE
+ select CPU_750
help
Select PPC_HOLLY if configuring for an IBM 750GX/CL Eval
Board with TSI108/9 bridge (Hickory/Holly)
@@ -38,6 +41,7 @@ config PPC_PRPMC2800
select MV64X60
select NOT_COHERENT_CACHE
select WANT_DEVICE_TREE
+ select CPU_7450
help
This option enables support for the Motorola PrPMC2800 board
endchoice
Index: linux-2.6/arch/powerpc/platforms/maple/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/maple/Kconfig
+++ linux-2.6/arch/powerpc/platforms/maple/Kconfig
@@ -11,6 +11,7 @@ config PPC_MAPLE
select PPC_RTAS
select MMIO_NVRAM
select ATA_NONSTANDARD if ATA
+ select CPU_970
default n
help
This option enables support for the Maple 970FX Evaluation Board.
Index: linux-2.6/arch/powerpc/platforms/pasemi/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/pasemi/Kconfig
+++ linux-2.6/arch/powerpc/platforms/pasemi/Kconfig
@@ -6,6 +6,7 @@ config PPC_PASEMI
select PPC_UDBG_16550
select PPC_NATIVE
select EMBEDDED
+ select CPU_PA6T
help
This option enables support for PA Semi's PWRficient line
of SoC processors, including PA6T-1682M
Index: linux-2.6/arch/powerpc/platforms/powermac/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/powermac/Kconfig
+++ linux-2.6/arch/powerpc/platforms/powermac/Kconfig
@@ -16,6 +16,7 @@ config PPC_PMAC64
select MPIC_U3_HT_IRQS
select GENERIC_TBSYNC
select PPC_970_NAP
+ select CPU_970
default y
Index: linux-2.6/arch/powerpc/platforms/ps3/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/ps3/Kconfig
+++ linux-2.6/arch/powerpc/platforms/ps3/Kconfig
@@ -2,6 +2,7 @@ config PPC_PS3
bool "Sony PS3 (incomplete)"
depends on PPC_MULTIPLATFORM && PPC64
select PPC_CELL
+ select CPU_CELL
select USB_ARCH_HAS_OHCI
select USB_OHCI_LITTLE_ENDIAN
select USB_OHCI_BIG_ENDIAN_MMIO
Index: linux-2.6/arch/powerpc/Makefile
===================================================================
--- linux-2.6.orig/arch/powerpc/Makefile
+++ linux-2.6/arch/powerpc/Makefile
@@ -78,24 +78,23 @@ LINUXINCLUDE += $(LINUXINCLUDE-y)
CHECKFLAGS += -m$(SZ) -D__powerpc__ -D__powerpc$(SZ)__
+OPTFLAGS := $(call cc-option,$(CONFIG_PPC_MCPU)) $(call cc-option,$(CONFIG_PPC_MTUNE))
+
+# compilers older than 4.0.0 can only set -maltivec in 64 bit mode
+# when compiling for 970
ifeq ($(CONFIG_PPC64),y)
GCC_BROKEN_VEC := $(shell if [ $(call cc-version) -lt 0400 ] ; then echo "y"; fi)
-
ifeq ($(CONFIG_POWER4_ONLY),y)
ifeq ($(CONFIG_ALTIVEC),y)
ifeq ($(GCC_BROKEN_VEC),y)
- CFLAGS += $(call cc-option,-mcpu=970)
-else
- CFLAGS += $(call cc-option,-mcpu=power4)
+ OPTFLAGS := $(call cc-option,-mcpu=970) $(call cc-option,$(CONFIG_PPC_MTUNE))
endif
-else
- CFLAGS += $(call cc-option,-mcpu=power4)
endif
-else
- CFLAGS += $(call cc-option,-mtune=power4)
endif
endif
+CFLAGS += $(OPTFLAGS)
+
# No AltiVec instruction when building kernel
CFLAGS += $(call cc-option,-mno-altivec)
@@ -107,10 +106,6 @@ CFLAGS += $(call cc-option,-funit-at-a-t
# often slow when they are implemented at all
CFLAGS += -mno-string
-ifeq ($(CONFIG_6xx),y)
-CFLAGS += -mcpu=powerpc
-endif
-
cpu-as-$(CONFIG_4xx) += -Wa,-m405
cpu-as-$(CONFIG_6xx) += -Wa,-maltivec
cpu-as-$(CONFIG_POWER4) += -Wa,-maltivec
Index: linux-2.6/arch/powerpc/platforms/85xx/Kconfig
===================================================================
--- linux-2.6.orig/arch/powerpc/platforms/85xx/Kconfig
+++ linux-2.6/arch/powerpc/platforms/85xx/Kconfig
@@ -6,24 +6,28 @@ choice
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
+ select CPU_8540
help
This option enables support for the MPC 8540 ADS board
config MPC8560_ADS
bool "Freescale MPC8560 ADS"
select DEFAULT_UIMAGE
+ select CPU_8540
help
This option enables support for the MPC 8560 ADS board
config MPC85xx_CDS
bool "Freescale MPC85xx CDS"
select DEFAULT_UIMAGE
+ select CPU_8548
help
This option enables support for the MPC85xx CDS board
config MPC85xx_MDS
bool "Freescale MPC85xx MDS"
select DEFAULT_UIMAGE
+ select CPU_8548
# select QUICC_ENGINE
help
This option enables support for the MPC85xx MDS board
@@ -31,6 +35,7 @@ config MPC85xx_MDS
config MPC8544_DS
bool "Freescale MPC8544 DS"
select DEFAULT_UIMAGE
+ select CPU_8548
help
This option enables support for the MPC8544 DS board
--
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