* [PATCH 25/61] Fix off-by-one error in CPM2 setbrg().
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
The hardware adds one to the BRG value to get the divider, so it must
be subtracted by software.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/cpm2_common.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index 9244129..daf7497 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -102,7 +102,7 @@ cpm_setbrg(uint brg, uint rate)
brg -= 4;
}
bp += brg;
- *bp = ((BRG_UART_CLK / rate) << 1) | CPM_BRG_EN;
+ *bp = (((BRG_UART_CLK / rate) - 1) << 1) | CPM_BRG_EN;
cpm2_unmap(bp);
}
--
1.5.0.3
^ permalink raw reply related
* [PATCH 22/61] Rename mpc82xx_ads to mpc8272ads.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/platforms/82xx/Kconfig | 6 +-
arch/powerpc/platforms/82xx/Makefile | 2 +-
arch/powerpc/platforms/82xx/mpc8272ads.c | 640 +++++++++++++++++++++++++++++
arch/powerpc/platforms/82xx/mpc82xx_ads.c | 640 -----------------------------
4 files changed, 644 insertions(+), 644 deletions(-)
create mode 100644 arch/powerpc/platforms/82xx/mpc8272ads.c
delete mode 100644 arch/powerpc/platforms/82xx/mpc82xx_ads.c
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 89fde43..b4af8c2 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -1,10 +1,10 @@
choice
prompt "82xx Board Type"
depends on PPC_82xx
- default MPC82xx_ADS
+ default MPC8272ADS
-config MPC82xx_ADS
- bool "Freescale MPC82xx ADS"
+config MPC8272ADS
+ bool "Freescale MPC8272ADS"
select DEFAULT_UIMAGE
select PQ2ADS
select 8272
diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/platforms/82xx/Makefile
index d9fd4c8..881a3f6 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -2,4 +2,4 @@
# Makefile for the PowerPC 82xx linux kernel.
#
obj-$(CONFIG_PPC_82xx) += mpc82xx.o
-obj-$(CONFIG_MPC82xx_ADS) += mpc82xx_ads.o
+obj-$(CONFIG_MPC8272ADS) += mpc8272ads.o
diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
new file mode 100644
index 0000000..da20832
--- /dev/null
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -0,0 +1,640 @@
+/*
+ * MPC82xx_ads setup and early boot code plus other random bits.
+ *
+ * Author: Vitaly Bordug <vbordug@ru.mvista.com>
+ * m82xx_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
+ *
+ * Copyright (c) 2006 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/interrupt.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+#include <linux/initrd.h>
+#include <linux/module.h>
+#include <linux/fsl_devices.h>
+#include <linux/fs_uart_pd.h>
+
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/page.h>
+#include <asm/atomic.h>
+#include <asm/time.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/bootinfo.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpc8260.h>
+#include <asm/irq.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/cpm2.h>
+#include <asm/udbg.h>
+#include <asm/i8259.h>
+#include <linux/fs_enet_pd.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/cpm2_pic.h>
+
+#include "pq2ads.h"
+
+#ifdef CONFIG_PCI
+static uint pci_clk_frq;
+static struct {
+ unsigned long *pci_int_stat_reg;
+ unsigned long *pci_int_mask_reg;
+} pci_regs;
+
+static unsigned long pci_int_base;
+static struct irq_host *pci_pic_host;
+static struct device_node *pci_pic_node;
+#endif
+
+static void __init mpc82xx_ads_pic_init(void)
+{
+ struct device_node *np = of_find_compatible_node(NULL, "cpm-pic", "CPM2");
+ struct resource r;
+ cpm2_map_t *cpm_reg;
+
+ if (np == NULL) {
+ printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
+ return;
+ }
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_ERR "PIC init: invalid resource\n");
+ of_node_put(np);
+ return;
+ }
+ cpm2_pic_init(np);
+ of_node_put(np);
+
+ /* Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ cpm_reg = (cpm2_map_t *) ioremap(get_immrbase(), sizeof(cpm2_map_t));
+ cpm_reg->im_intctl.ic_siprr = 0x05309770;
+ iounmap(cpm_reg);
+#ifdef CONFIG_PCI
+ /* Initialize stuff for the 82xx CPLD IC and install demux */
+ m82xx_pci_init_irq();
+#endif
+}
+
+static void init_fcc1_ioports(struct fs_platform_info *fpi)
+{
+ struct io_port *io;
+ u32 tempval;
+ cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
+ struct device_node *np;
+ struct resource r;
+ u32 *bcsr;
+
+ np = of_find_node_by_type(NULL, "memory");
+ if (!np) {
+ printk(KERN_INFO "No memory node in device tree\n");
+ return;
+ }
+ if (of_address_to_resource(np, 1, &r)) {
+ printk(KERN_INFO "No memory reg property [1] in devicetree\n");
+ return;
+ }
+ of_node_put(np);
+ bcsr = ioremap(r.start + 4, sizeof(u32));
+ io = &immap->im_ioport;
+
+ /* Enable the PHY */
+ clrbits32(bcsr, BCSR1_FETHIEN);
+ setbits32(bcsr, BCSR1_FETH_RST);
+
+ /* FCC1 pins are on port A/C. */
+ /* Configure port A and C pins for FCC1 Ethernet. */
+
+ tempval = in_be32(&io->iop_pdira);
+ tempval &= ~PA1_DIRA0;
+ tempval |= PA1_DIRA1;
+ out_be32(&io->iop_pdira, tempval);
+
+ tempval = in_be32(&io->iop_psora);
+ tempval &= ~PA1_PSORA0;
+ tempval |= PA1_PSORA1;
+ out_be32(&io->iop_psora, tempval);
+
+ setbits32(&io->iop_ppara, PA1_DIRA0 | PA1_DIRA1);
+
+ /* Alter clocks */
+ tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
+
+ clrbits32(&io->iop_psorc, tempval);
+ clrbits32(&io->iop_pdirc, tempval);
+ setbits32(&io->iop_pparc, tempval);
+
+ cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_rx, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_tx, CPM_CLK_TX);
+
+ iounmap(bcsr);
+ iounmap(immap);
+}
+
+static void init_fcc2_ioports(struct fs_platform_info *fpi)
+{
+ cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
+ struct device_node *np;
+ struct resource r;
+ u32 *bcsr;
+
+ struct io_port *io;
+ u32 tempval;
+
+ np = of_find_node_by_type(NULL, "memory");
+ if (!np) {
+ printk(KERN_INFO "No memory node in device tree\n");
+ return;
+ }
+ if (of_address_to_resource(np, 1, &r)) {
+ printk(KERN_INFO "No memory reg property [1] in devicetree\n");
+ return;
+ }
+ of_node_put(np);
+ io = &immap->im_ioport;
+ bcsr = ioremap(r.start + 12, sizeof(u32));
+
+ /* Enable the PHY */
+ clrbits32(bcsr, BCSR3_FETHIEN2);
+ setbits32(bcsr, BCSR3_FETH2_RST);
+
+ /* FCC2 are port B/C. */
+ /* Configure port A and C pins for FCC2 Ethernet. */
+
+ tempval = in_be32(&io->iop_pdirb);
+ tempval &= ~PB2_DIRB0;
+ tempval |= PB2_DIRB1;
+ out_be32(&io->iop_pdirb, tempval);
+
+ tempval = in_be32(&io->iop_psorb);
+ tempval &= ~PB2_PSORB0;
+ tempval |= PB2_PSORB1;
+ out_be32(&io->iop_psorb, tempval);
+
+ setbits32(&io->iop_pparb, PB2_DIRB0 | PB2_DIRB1);
+
+ tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
+
+ /* Alter clocks */
+ clrbits32(&io->iop_psorc, tempval);
+ clrbits32(&io->iop_pdirc, tempval);
+ setbits32(&io->iop_pparc, tempval);
+
+ cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_rx, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_tx, CPM_CLK_TX);
+
+ iounmap(bcsr);
+ iounmap(immap);
+}
+
+void init_fcc_ioports(struct fs_platform_info *fpi)
+{
+ int fcc_no = fs_get_fcc_index(fpi->fs_no);
+
+ switch (fcc_no) {
+ case 0:
+ init_fcc1_ioports(fpi);
+ break;
+ case 1:
+ init_fcc2_ioports(fpi);
+ break;
+ default:
+ printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
+ return;
+ }
+}
+
+static void init_scc1_uart_ioports(struct fs_uart_platform_info *data)
+{
+ cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
+
+ /* SCC1 is only on port D */
+ setbits32(&immap->im_ioport.iop_ppard, 0x00000003);
+ clrbits32(&immap->im_ioport.iop_psord, 0x00000001);
+ setbits32(&immap->im_ioport.iop_psord, 0x00000002);
+ clrbits32(&immap->im_ioport.iop_pdird, 0x00000001);
+ setbits32(&immap->im_ioport.iop_pdird, 0x00000002);
+
+ clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
+ clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
+ setbits32(&immap->im_cpmux.cmx_scr,
+ ((data->clk_tx - 1) << (4 - data->clk_tx)));
+ setbits32(&immap->im_cpmux.cmx_scr,
+ ((data->clk_rx - 1) << (4 - data->clk_rx)));
+
+ iounmap(immap);
+}
+
+static void init_scc4_uart_ioports(struct fs_uart_platform_info *data)
+{
+ cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
+
+ setbits32(&immap->im_ioport.iop_ppard, 0x00000600);
+ clrbits32(&immap->im_ioport.iop_psord, 0x00000600);
+ clrbits32(&immap->im_ioport.iop_pdird, 0x00000200);
+ setbits32(&immap->im_ioport.iop_pdird, 0x00000400);
+
+ clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
+ clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
+ setbits32(&immap->im_cpmux.cmx_scr,
+ ((data->clk_tx - 1) << (4 - data->clk_tx)));
+ setbits32(&immap->im_cpmux.cmx_scr,
+ ((data->clk_rx - 1) << (4 - data->clk_rx)));
+
+ iounmap(immap);
+}
+
+void init_scc_ioports(struct fs_uart_platform_info *data)
+{
+ int scc_no = fs_get_scc_index(data->fs_no);
+
+ switch (scc_no) {
+ case 0:
+ init_scc1_uart_ioports(data);
+ data->brg = data->clk_rx;
+ break;
+ case 3:
+ init_scc4_uart_ioports(data);
+ data->brg = data->clk_rx;
+ break;
+ default:
+ printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
+ return;
+ }
+}
+
+void __init m82xx_board_setup(void)
+{
+ cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
+ struct device_node *np;
+ struct resource r;
+ u32 *bcsr;
+
+ np = of_find_node_by_type(NULL, "memory");
+ if (!np) {
+ printk(KERN_INFO "No memory node in device tree\n");
+ return;
+ }
+ if (of_address_to_resource(np, 1, &r)) {
+ printk(KERN_INFO "No memory reg property [1] in devicetree\n");
+ return;
+ }
+ of_node_put(np);
+ bcsr = ioremap(r.start + 4, sizeof(u32));
+ /* Enable the 2nd UART port */
+ clrbits32(bcsr, BCSR1_RS232_EN2);
+
+#ifdef CONFIG_SERIAL_CPM_SCC1
+ clrbits32((u32 *) & immap->im_scc[0].scc_sccm,
+ UART_SCCM_TX | UART_SCCM_RX);
+ clrbits32((u32 *) & immap->im_scc[0].scc_gsmrl,
+ SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC2
+ clrbits32((u32 *) & immap->im_scc[1].scc_sccm,
+ UART_SCCM_TX | UART_SCCM_RX);
+ clrbits32((u32 *) & immap->im_scc[1].scc_gsmrl,
+ SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC3
+ clrbits32((u32 *) & immap->im_scc[2].scc_sccm,
+ UART_SCCM_TX | UART_SCCM_RX);
+ clrbits32((u32 *) & immap->im_scc[2].scc_gsmrl,
+ SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC4
+ clrbits32((u32 *) & immap->im_scc[3].scc_sccm,
+ UART_SCCM_TX | UART_SCCM_RX);
+ clrbits32((u32 *) & immap->im_scc[3].scc_gsmrl,
+ SCC_GSMRL_ENR | SCC_GSMRL_ENT);
+#endif
+
+ iounmap(bcsr);
+ iounmap(immap);
+}
+
+#ifdef CONFIG_PCI
+static void m82xx_pci_mask_irq(unsigned int irq)
+{
+ int bit = irq - pci_int_base;
+
+ *pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
+ return;
+}
+
+static void m82xx_pci_unmask_irq(unsigned int irq)
+{
+ int bit = irq - pci_int_base;
+
+ *pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
+ return;
+}
+
+static void m82xx_pci_mask_and_ack(unsigned int irq)
+{
+ int bit = irq - pci_int_base;
+
+ *pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
+ return;
+}
+
+static void m82xx_pci_end_irq(unsigned int irq)
+{
+ int bit = irq - pci_int_base;
+
+ *pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
+ return;
+}
+
+struct hw_interrupt_type m82xx_pci_ic = {
+ .typename = "MPC82xx ADS PCI",
+ .name = "MPC82xx ADS PCI",
+ .enable = m82xx_pci_unmask_irq,
+ .disable = m82xx_pci_mask_irq,
+ .ack = m82xx_pci_mask_and_ack,
+ .end = m82xx_pci_end_irq,
+ .mask = m82xx_pci_mask_irq,
+ .mask_ack = m82xx_pci_mask_and_ack,
+ .unmask = m82xx_pci_unmask_irq,
+ .eoi = m82xx_pci_end_irq,
+};
+
+static void
+m82xx_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
+{
+ unsigned long stat, mask, pend;
+ int bit;
+
+ for (;;) {
+ stat = *pci_regs.pci_int_stat_reg;
+ mask = *pci_regs.pci_int_mask_reg;
+ pend = stat & ~mask & 0xf0000000;
+ if (!pend)
+ break;
+ for (bit = 0; pend != 0; ++bit, pend <<= 1) {
+ if (pend & 0x80000000)
+ __do_IRQ(pci_int_base + bit);
+ }
+ }
+}
+
+static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
+{
+ return node == pci_pic_node;
+}
+
+static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ get_irq_desc(virq)->status |= IRQ_LEVEL;
+ set_irq_chip(virq, &m82xx_pci_ic);
+ return 0;
+}
+
+static void pci_host_unmap(struct irq_host *h, unsigned int virq)
+{
+ /* remove chip and handler */
+ set_irq_chip(virq, NULL);
+}
+
+static struct irq_host_ops pci_pic_host_ops = {
+ .match = pci_pic_host_match,
+ .map = pci_pic_host_map,
+ .unmap = pci_host_unmap,
+};
+
+void m82xx_pci_init_irq(void)
+{
+ int irq;
+ cpm2_map_t *immap;
+ struct device_node *np;
+ struct resource r;
+ const u32 *regs;
+ unsigned int size;
+ const u32 *irq_map;
+ int i;
+ unsigned int irq_max, irq_min;
+
+ if ((np = of_find_node_by_type(NULL, "soc")) == NULL) {
+ printk(KERN_INFO "No SOC node in device tree\n");
+ return;
+ }
+ memset(&r, 0, sizeof(r));
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_INFO "No SOC reg property in device tree\n");
+ return;
+ }
+ immap = ioremap(r.start, sizeof(*immap));
+ of_node_put(np);
+
+ /* install the demultiplexer for the PCI cascade interrupt */
+ np = of_find_node_by_type(NULL, "pci");
+ if (!np) {
+ printk(KERN_INFO "No pci node on device tree\n");
+ iounmap(immap);
+ return;
+ }
+ irq_map = of_get_property(np, "interrupt-map", &size);
+ if ((!irq_map) || (size <= 7)) {
+ printk(KERN_INFO "No interrupt-map property of pci node\n");
+ iounmap(immap);
+ return;
+ }
+ size /= sizeof(irq_map[0]);
+ for (i = 0, irq_max = 0, irq_min = 512; i < size; i += 7, irq_map += 7) {
+ if (irq_map[5] < irq_min)
+ irq_min = irq_map[5];
+ if (irq_map[5] > irq_max)
+ irq_max = irq_map[5];
+ }
+ pci_int_base = irq_min;
+ irq = irq_of_parse_and_map(np, 0);
+ set_irq_chained_handler(irq, m82xx_pci_irq_demux);
+ of_node_put(np);
+ np = of_find_node_by_type(NULL, "pci-pic");
+ if (!np) {
+ printk(KERN_INFO "No pci pic node on device tree\n");
+ iounmap(immap);
+ return;
+ }
+ pci_pic_node = of_node_get(np);
+ /* PCI interrupt controller registers: status and mask */
+ regs = of_get_property(np, "reg", &size);
+ if ((!regs) || (size <= 2)) {
+ printk(KERN_INFO "No reg property in pci pic node\n");
+ iounmap(immap);
+ return;
+ }
+ pci_regs.pci_int_stat_reg =
+ ioremap(regs[0], sizeof(*pci_regs.pci_int_stat_reg));
+ pci_regs.pci_int_mask_reg =
+ ioremap(regs[1], sizeof(*pci_regs.pci_int_mask_reg));
+ of_node_put(np);
+ /* configure chip select for PCI interrupt controller */
+ immap->im_memctl.memc_br3 = regs[0] | 0x00001801;
+ immap->im_memctl.memc_or3 = 0xffff8010;
+ /* make PCI IRQ level sensitive */
+ immap->im_intctl.ic_siexr &= ~(1 << (14 - (irq - SIU_INT_IRQ1)));
+
+ /* mask all PCI interrupts */
+ *pci_regs.pci_int_mask_reg |= 0xfff00000;
+ iounmap(immap);
+ pci_pic_host =
+ irq_alloc_host(IRQ_HOST_MAP_LINEAR, irq_max - irq_min + 1,
+ &pci_pic_host_ops, irq_max + 1);
+ return;
+}
+
+static int m82xx_pci_exclude_device(struct pci_controller *hose,
+ u_char bus, u_char devfn)
+{
+ if (bus == 0 && PCI_SLOT(devfn) == 0)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ else
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static void __init mpc82xx_add_bridge(struct device_node *np)
+{
+ int len;
+ struct pci_controller *hose;
+ struct resource r;
+ const int *bus_range;
+ const uint *ptr;
+
+ memset(&r, 0, sizeof(r));
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_INFO "No PCI reg property in device tree\n");
+ return;
+ }
+ if (!(ptr = of_get_property(np, "clock-frequency", NULL))) {
+ printk(KERN_INFO "No clock-frequency property in PCI node");
+ return;
+ }
+ pci_clk_frq = *ptr;
+ of_node_put(np);
+ bus_range = of_get_property(np, "bus-range", &len);
+ if (bus_range == NULL || len < 2 * sizeof(int)) {
+ printk(KERN_WARNING "Can't get bus-range for %s, assume"
+ " bus 0\n", np->full_name);
+ }
+
+ pci_assign_all_buses = 1;
+
+ hose = pcibios_alloc_controller(np);
+
+ if (!hose)
+ return;
+
+ hose->first_busno = bus_range ? bus_range[0] : 0;
+ hose->last_busno = bus_range ? bus_range[1] : 0xff;
+
+ setup_indirect_pci(hose,
+ r.start + offsetof(pci_cpm2_t, pci_cfg_addr),
+ r.start + offsetof(pci_cpm2_t, pci_cfg_data));
+
+ pci_process_bridge_OF_ranges(hose, np, 1);
+}
+#endif
+
+/*
+ * Setup the architecture
+ */
+static void __init mpc82xx_ads_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("mpc82xx_ads_setup_arch()", 0);
+ cpm2_reset();
+
+ /* Map I/O region to a 256MB BAT */
+
+ m82xx_board_setup();
+
+#ifdef CONFIG_PCI
+ ppc_md.pci_exclude_device = m82xx_pci_exclude_device;
+ for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
+ mpc82xx_add_bridge(np);
+
+ of_node_put(np);
+#endif
+
+#ifdef CONFIG_ROOT_NFS
+ ROOT_DEV = Root_NFS;
+#else
+ ROOT_DEV = Root_HDA1;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("mpc82xx_ads_setup_arch(), finish", 0);
+}
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init mpc82xx_ads_probe(void)
+{
+ /* We always match for now, eventually we should look at
+ * the flat dev tree to ensure this is the board we are
+ * supposed to run on
+ */
+ return 1;
+}
+
+#define RMR_CSRE 0x00000001
+static void m82xx_restart(char *cmd)
+{
+ __volatile__ unsigned char dummy;
+
+ local_irq_disable();
+ ((cpm2_map_t *) cpm2_immr)->im_clkrst.car_rmr |= RMR_CSRE;
+
+ /* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
+ mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
+ dummy = ((cpm2_map_t *) cpm2_immr)->im_clkrst.res[0];
+ printk("Restart failed\n");
+ while (1) ;
+}
+
+static void m82xx_halt(void)
+{
+ local_irq_disable();
+ while (1) ;
+}
+
+define_machine(mpc82xx_ads)
+{
+ .name = "MPC82xx ADS",
+ .probe = mpc82xx_ads_probe,
+ .setup_arch = mpc82xx_ads_setup_arch,
+ .init_IRQ = mpc82xx_ads_pic_init,
+ .show_cpuinfo = mpc82xx_ads_show_cpuinfo,
+ .get_irq = cpm2_get_irq,
+ .calibrate_decr = m82xx_calibrate_decr,
+ .restart = m82xx_restart,.halt = m82xx_halt,
+};
diff --git a/arch/powerpc/platforms/82xx/mpc82xx_ads.c b/arch/powerpc/platforms/82xx/mpc82xx_ads.c
deleted file mode 100644
index da20832..0000000
--- a/arch/powerpc/platforms/82xx/mpc82xx_ads.c
+++ /dev/null
@@ -1,640 +0,0 @@
-/*
- * MPC82xx_ads setup and early boot code plus other random bits.
- *
- * Author: Vitaly Bordug <vbordug@ru.mvista.com>
- * m82xx_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
- *
- * Copyright (c) 2006 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/initrd.h>
-#include <linux/module.h>
-#include <linux/fsl_devices.h>
-#include <linux/fs_uart_pd.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/bootinfo.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc8260.h>
-#include <asm/irq.h>
-#include <mm/mmu_decl.h>
-#include <asm/prom.h>
-#include <asm/cpm2.h>
-#include <asm/udbg.h>
-#include <asm/i8259.h>
-#include <linux/fs_enet_pd.h>
-
-#include <sysdev/fsl_soc.h>
-#include <sysdev/cpm2_pic.h>
-
-#include "pq2ads.h"
-
-#ifdef CONFIG_PCI
-static uint pci_clk_frq;
-static struct {
- unsigned long *pci_int_stat_reg;
- unsigned long *pci_int_mask_reg;
-} pci_regs;
-
-static unsigned long pci_int_base;
-static struct irq_host *pci_pic_host;
-static struct device_node *pci_pic_node;
-#endif
-
-static void __init mpc82xx_ads_pic_init(void)
-{
- struct device_node *np = of_find_compatible_node(NULL, "cpm-pic", "CPM2");
- struct resource r;
- cpm2_map_t *cpm_reg;
-
- if (np == NULL) {
- printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
- return;
- }
- if (of_address_to_resource(np, 0, &r)) {
- printk(KERN_ERR "PIC init: invalid resource\n");
- of_node_put(np);
- return;
- }
- cpm2_pic_init(np);
- of_node_put(np);
-
- /* Initialize the default interrupt mapping priorities,
- * in case the boot rom changed something on us.
- */
- cpm_reg = (cpm2_map_t *) ioremap(get_immrbase(), sizeof(cpm2_map_t));
- cpm_reg->im_intctl.ic_siprr = 0x05309770;
- iounmap(cpm_reg);
-#ifdef CONFIG_PCI
- /* Initialize stuff for the 82xx CPLD IC and install demux */
- m82xx_pci_init_irq();
-#endif
-}
-
-static void init_fcc1_ioports(struct fs_platform_info *fpi)
-{
- struct io_port *io;
- u32 tempval;
- cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
- struct device_node *np;
- struct resource r;
- u32 *bcsr;
-
- np = of_find_node_by_type(NULL, "memory");
- if (!np) {
- printk(KERN_INFO "No memory node in device tree\n");
- return;
- }
- if (of_address_to_resource(np, 1, &r)) {
- printk(KERN_INFO "No memory reg property [1] in devicetree\n");
- return;
- }
- of_node_put(np);
- bcsr = ioremap(r.start + 4, sizeof(u32));
- io = &immap->im_ioport;
-
- /* Enable the PHY */
- clrbits32(bcsr, BCSR1_FETHIEN);
- setbits32(bcsr, BCSR1_FETH_RST);
-
- /* FCC1 pins are on port A/C. */
- /* Configure port A and C pins for FCC1 Ethernet. */
-
- tempval = in_be32(&io->iop_pdira);
- tempval &= ~PA1_DIRA0;
- tempval |= PA1_DIRA1;
- out_be32(&io->iop_pdira, tempval);
-
- tempval = in_be32(&io->iop_psora);
- tempval &= ~PA1_PSORA0;
- tempval |= PA1_PSORA1;
- out_be32(&io->iop_psora, tempval);
-
- setbits32(&io->iop_ppara, PA1_DIRA0 | PA1_DIRA1);
-
- /* Alter clocks */
- tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
-
- clrbits32(&io->iop_psorc, tempval);
- clrbits32(&io->iop_pdirc, tempval);
- setbits32(&io->iop_pparc, tempval);
-
- cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_rx, CPM_CLK_RX);
- cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_tx, CPM_CLK_TX);
-
- iounmap(bcsr);
- iounmap(immap);
-}
-
-static void init_fcc2_ioports(struct fs_platform_info *fpi)
-{
- cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
- struct device_node *np;
- struct resource r;
- u32 *bcsr;
-
- struct io_port *io;
- u32 tempval;
-
- np = of_find_node_by_type(NULL, "memory");
- if (!np) {
- printk(KERN_INFO "No memory node in device tree\n");
- return;
- }
- if (of_address_to_resource(np, 1, &r)) {
- printk(KERN_INFO "No memory reg property [1] in devicetree\n");
- return;
- }
- of_node_put(np);
- io = &immap->im_ioport;
- bcsr = ioremap(r.start + 12, sizeof(u32));
-
- /* Enable the PHY */
- clrbits32(bcsr, BCSR3_FETHIEN2);
- setbits32(bcsr, BCSR3_FETH2_RST);
-
- /* FCC2 are port B/C. */
- /* Configure port A and C pins for FCC2 Ethernet. */
-
- tempval = in_be32(&io->iop_pdirb);
- tempval &= ~PB2_DIRB0;
- tempval |= PB2_DIRB1;
- out_be32(&io->iop_pdirb, tempval);
-
- tempval = in_be32(&io->iop_psorb);
- tempval &= ~PB2_PSORB0;
- tempval |= PB2_PSORB1;
- out_be32(&io->iop_psorb, tempval);
-
- setbits32(&io->iop_pparb, PB2_DIRB0 | PB2_DIRB1);
-
- tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
-
- /* Alter clocks */
- clrbits32(&io->iop_psorc, tempval);
- clrbits32(&io->iop_pdirc, tempval);
- setbits32(&io->iop_pparc, tempval);
-
- cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_rx, CPM_CLK_RX);
- cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_tx, CPM_CLK_TX);
-
- iounmap(bcsr);
- iounmap(immap);
-}
-
-void init_fcc_ioports(struct fs_platform_info *fpi)
-{
- int fcc_no = fs_get_fcc_index(fpi->fs_no);
-
- switch (fcc_no) {
- case 0:
- init_fcc1_ioports(fpi);
- break;
- case 1:
- init_fcc2_ioports(fpi);
- break;
- default:
- printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
- return;
- }
-}
-
-static void init_scc1_uart_ioports(struct fs_uart_platform_info *data)
-{
- cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-
- /* SCC1 is only on port D */
- setbits32(&immap->im_ioport.iop_ppard, 0x00000003);
- clrbits32(&immap->im_ioport.iop_psord, 0x00000001);
- setbits32(&immap->im_ioport.iop_psord, 0x00000002);
- clrbits32(&immap->im_ioport.iop_pdird, 0x00000001);
- setbits32(&immap->im_ioport.iop_pdird, 0x00000002);
-
- clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
- clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
- setbits32(&immap->im_cpmux.cmx_scr,
- ((data->clk_tx - 1) << (4 - data->clk_tx)));
- setbits32(&immap->im_cpmux.cmx_scr,
- ((data->clk_rx - 1) << (4 - data->clk_rx)));
-
- iounmap(immap);
-}
-
-static void init_scc4_uart_ioports(struct fs_uart_platform_info *data)
-{
- cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-
- setbits32(&immap->im_ioport.iop_ppard, 0x00000600);
- clrbits32(&immap->im_ioport.iop_psord, 0x00000600);
- clrbits32(&immap->im_ioport.iop_pdird, 0x00000200);
- setbits32(&immap->im_ioport.iop_pdird, 0x00000400);
-
- clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
- clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
- setbits32(&immap->im_cpmux.cmx_scr,
- ((data->clk_tx - 1) << (4 - data->clk_tx)));
- setbits32(&immap->im_cpmux.cmx_scr,
- ((data->clk_rx - 1) << (4 - data->clk_rx)));
-
- iounmap(immap);
-}
-
-void init_scc_ioports(struct fs_uart_platform_info *data)
-{
- int scc_no = fs_get_scc_index(data->fs_no);
-
- switch (scc_no) {
- case 0:
- init_scc1_uart_ioports(data);
- data->brg = data->clk_rx;
- break;
- case 3:
- init_scc4_uart_ioports(data);
- data->brg = data->clk_rx;
- break;
- default:
- printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
- return;
- }
-}
-
-void __init m82xx_board_setup(void)
-{
- cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
- struct device_node *np;
- struct resource r;
- u32 *bcsr;
-
- np = of_find_node_by_type(NULL, "memory");
- if (!np) {
- printk(KERN_INFO "No memory node in device tree\n");
- return;
- }
- if (of_address_to_resource(np, 1, &r)) {
- printk(KERN_INFO "No memory reg property [1] in devicetree\n");
- return;
- }
- of_node_put(np);
- bcsr = ioremap(r.start + 4, sizeof(u32));
- /* Enable the 2nd UART port */
- clrbits32(bcsr, BCSR1_RS232_EN2);
-
-#ifdef CONFIG_SERIAL_CPM_SCC1
- clrbits32((u32 *) & immap->im_scc[0].scc_sccm,
- UART_SCCM_TX | UART_SCCM_RX);
- clrbits32((u32 *) & immap->im_scc[0].scc_gsmrl,
- SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC2
- clrbits32((u32 *) & immap->im_scc[1].scc_sccm,
- UART_SCCM_TX | UART_SCCM_RX);
- clrbits32((u32 *) & immap->im_scc[1].scc_gsmrl,
- SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC3
- clrbits32((u32 *) & immap->im_scc[2].scc_sccm,
- UART_SCCM_TX | UART_SCCM_RX);
- clrbits32((u32 *) & immap->im_scc[2].scc_gsmrl,
- SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC4
- clrbits32((u32 *) & immap->im_scc[3].scc_sccm,
- UART_SCCM_TX | UART_SCCM_RX);
- clrbits32((u32 *) & immap->im_scc[3].scc_gsmrl,
- SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
- iounmap(bcsr);
- iounmap(immap);
-}
-
-#ifdef CONFIG_PCI
-static void m82xx_pci_mask_irq(unsigned int irq)
-{
- int bit = irq - pci_int_base;
-
- *pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
- return;
-}
-
-static void m82xx_pci_unmask_irq(unsigned int irq)
-{
- int bit = irq - pci_int_base;
-
- *pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
- return;
-}
-
-static void m82xx_pci_mask_and_ack(unsigned int irq)
-{
- int bit = irq - pci_int_base;
-
- *pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
- return;
-}
-
-static void m82xx_pci_end_irq(unsigned int irq)
-{
- int bit = irq - pci_int_base;
-
- *pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
- return;
-}
-
-struct hw_interrupt_type m82xx_pci_ic = {
- .typename = "MPC82xx ADS PCI",
- .name = "MPC82xx ADS PCI",
- .enable = m82xx_pci_unmask_irq,
- .disable = m82xx_pci_mask_irq,
- .ack = m82xx_pci_mask_and_ack,
- .end = m82xx_pci_end_irq,
- .mask = m82xx_pci_mask_irq,
- .mask_ack = m82xx_pci_mask_and_ack,
- .unmask = m82xx_pci_unmask_irq,
- .eoi = m82xx_pci_end_irq,
-};
-
-static void
-m82xx_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
-{
- unsigned long stat, mask, pend;
- int bit;
-
- for (;;) {
- stat = *pci_regs.pci_int_stat_reg;
- mask = *pci_regs.pci_int_mask_reg;
- pend = stat & ~mask & 0xf0000000;
- if (!pend)
- break;
- for (bit = 0; pend != 0; ++bit, pend <<= 1) {
- if (pend & 0x80000000)
- __do_IRQ(pci_int_base + bit);
- }
- }
-}
-
-static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
-{
- return node == pci_pic_node;
-}
-
-static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
- irq_hw_number_t hw)
-{
- get_irq_desc(virq)->status |= IRQ_LEVEL;
- set_irq_chip(virq, &m82xx_pci_ic);
- return 0;
-}
-
-static void pci_host_unmap(struct irq_host *h, unsigned int virq)
-{
- /* remove chip and handler */
- set_irq_chip(virq, NULL);
-}
-
-static struct irq_host_ops pci_pic_host_ops = {
- .match = pci_pic_host_match,
- .map = pci_pic_host_map,
- .unmap = pci_host_unmap,
-};
-
-void m82xx_pci_init_irq(void)
-{
- int irq;
- cpm2_map_t *immap;
- struct device_node *np;
- struct resource r;
- const u32 *regs;
- unsigned int size;
- const u32 *irq_map;
- int i;
- unsigned int irq_max, irq_min;
-
- if ((np = of_find_node_by_type(NULL, "soc")) == NULL) {
- printk(KERN_INFO "No SOC node in device tree\n");
- return;
- }
- memset(&r, 0, sizeof(r));
- if (of_address_to_resource(np, 0, &r)) {
- printk(KERN_INFO "No SOC reg property in device tree\n");
- return;
- }
- immap = ioremap(r.start, sizeof(*immap));
- of_node_put(np);
-
- /* install the demultiplexer for the PCI cascade interrupt */
- np = of_find_node_by_type(NULL, "pci");
- if (!np) {
- printk(KERN_INFO "No pci node on device tree\n");
- iounmap(immap);
- return;
- }
- irq_map = of_get_property(np, "interrupt-map", &size);
- if ((!irq_map) || (size <= 7)) {
- printk(KERN_INFO "No interrupt-map property of pci node\n");
- iounmap(immap);
- return;
- }
- size /= sizeof(irq_map[0]);
- for (i = 0, irq_max = 0, irq_min = 512; i < size; i += 7, irq_map += 7) {
- if (irq_map[5] < irq_min)
- irq_min = irq_map[5];
- if (irq_map[5] > irq_max)
- irq_max = irq_map[5];
- }
- pci_int_base = irq_min;
- irq = irq_of_parse_and_map(np, 0);
- set_irq_chained_handler(irq, m82xx_pci_irq_demux);
- of_node_put(np);
- np = of_find_node_by_type(NULL, "pci-pic");
- if (!np) {
- printk(KERN_INFO "No pci pic node on device tree\n");
- iounmap(immap);
- return;
- }
- pci_pic_node = of_node_get(np);
- /* PCI interrupt controller registers: status and mask */
- regs = of_get_property(np, "reg", &size);
- if ((!regs) || (size <= 2)) {
- printk(KERN_INFO "No reg property in pci pic node\n");
- iounmap(immap);
- return;
- }
- pci_regs.pci_int_stat_reg =
- ioremap(regs[0], sizeof(*pci_regs.pci_int_stat_reg));
- pci_regs.pci_int_mask_reg =
- ioremap(regs[1], sizeof(*pci_regs.pci_int_mask_reg));
- of_node_put(np);
- /* configure chip select for PCI interrupt controller */
- immap->im_memctl.memc_br3 = regs[0] | 0x00001801;
- immap->im_memctl.memc_or3 = 0xffff8010;
- /* make PCI IRQ level sensitive */
- immap->im_intctl.ic_siexr &= ~(1 << (14 - (irq - SIU_INT_IRQ1)));
-
- /* mask all PCI interrupts */
- *pci_regs.pci_int_mask_reg |= 0xfff00000;
- iounmap(immap);
- pci_pic_host =
- irq_alloc_host(IRQ_HOST_MAP_LINEAR, irq_max - irq_min + 1,
- &pci_pic_host_ops, irq_max + 1);
- return;
-}
-
-static int m82xx_pci_exclude_device(struct pci_controller *hose,
- u_char bus, u_char devfn)
-{
- if (bus == 0 && PCI_SLOT(devfn) == 0)
- return PCIBIOS_DEVICE_NOT_FOUND;
- else
- return PCIBIOS_SUCCESSFUL;
-}
-
-static void __init mpc82xx_add_bridge(struct device_node *np)
-{
- int len;
- struct pci_controller *hose;
- struct resource r;
- const int *bus_range;
- const uint *ptr;
-
- memset(&r, 0, sizeof(r));
- if (of_address_to_resource(np, 0, &r)) {
- printk(KERN_INFO "No PCI reg property in device tree\n");
- return;
- }
- if (!(ptr = of_get_property(np, "clock-frequency", NULL))) {
- printk(KERN_INFO "No clock-frequency property in PCI node");
- return;
- }
- pci_clk_frq = *ptr;
- of_node_put(np);
- bus_range = of_get_property(np, "bus-range", &len);
- if (bus_range == NULL || len < 2 * sizeof(int)) {
- printk(KERN_WARNING "Can't get bus-range for %s, assume"
- " bus 0\n", np->full_name);
- }
-
- pci_assign_all_buses = 1;
-
- hose = pcibios_alloc_controller(np);
-
- if (!hose)
- return;
-
- hose->first_busno = bus_range ? bus_range[0] : 0;
- hose->last_busno = bus_range ? bus_range[1] : 0xff;
-
- setup_indirect_pci(hose,
- r.start + offsetof(pci_cpm2_t, pci_cfg_addr),
- r.start + offsetof(pci_cpm2_t, pci_cfg_data));
-
- pci_process_bridge_OF_ranges(hose, np, 1);
-}
-#endif
-
-/*
- * Setup the architecture
- */
-static void __init mpc82xx_ads_setup_arch(void)
-{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
-
- if (ppc_md.progress)
- ppc_md.progress("mpc82xx_ads_setup_arch()", 0);
- cpm2_reset();
-
- /* Map I/O region to a 256MB BAT */
-
- m82xx_board_setup();
-
-#ifdef CONFIG_PCI
- ppc_md.pci_exclude_device = m82xx_pci_exclude_device;
- for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
- mpc82xx_add_bridge(np);
-
- of_node_put(np);
-#endif
-
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_HDA1;
-#endif
-
- if (ppc_md.progress)
- ppc_md.progress("mpc82xx_ads_setup_arch(), finish", 0);
-}
-
-/*
- * Called very early, device-tree isn't unflattened
- */
-static int __init mpc82xx_ads_probe(void)
-{
- /* We always match for now, eventually we should look at
- * the flat dev tree to ensure this is the board we are
- * supposed to run on
- */
- return 1;
-}
-
-#define RMR_CSRE 0x00000001
-static void m82xx_restart(char *cmd)
-{
- __volatile__ unsigned char dummy;
-
- local_irq_disable();
- ((cpm2_map_t *) cpm2_immr)->im_clkrst.car_rmr |= RMR_CSRE;
-
- /* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
- mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
- dummy = ((cpm2_map_t *) cpm2_immr)->im_clkrst.res[0];
- printk("Restart failed\n");
- while (1) ;
-}
-
-static void m82xx_halt(void)
-{
- local_irq_disable();
- while (1) ;
-}
-
-define_machine(mpc82xx_ads)
-{
- .name = "MPC82xx ADS",
- .probe = mpc82xx_ads_probe,
- .setup_arch = mpc82xx_ads_setup_arch,
- .init_IRQ = mpc82xx_ads_pic_init,
- .show_cpuinfo = mpc82xx_ads_show_cpuinfo,
- .get_irq = cpm2_get_irq,
- .calibrate_decr = m82xx_calibrate_decr,
- .restart = m82xx_restart,.halt = m82xx_halt,
-};
--
1.5.0.3
^ permalink raw reply related
* [PATCH 26/61] cpm2: Add SCCs to cpm2_clk_setup().
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/cpm2_common.c | 42 ++++++++++++++++++++++++++++++++----
1 files changed, 37 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index daf7497..4e840bd 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -138,7 +138,7 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
cpmux_t *im_cpmux;
u32 *reg;
u32 mask = 7;
- u8 clk_map [24][3] = {
+ u8 clk_map[][3] = {
{CPM_CLK_FCC1, CPM_BRG5, 0},
{CPM_CLK_FCC1, CPM_BRG6, 1},
{CPM_CLK_FCC1, CPM_BRG7, 2},
@@ -162,8 +162,40 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
{CPM_CLK_FCC3, CPM_CLK13, 4},
{CPM_CLK_FCC3, CPM_CLK14, 5},
{CPM_CLK_FCC3, CPM_CLK15, 6},
- {CPM_CLK_FCC3, CPM_CLK16, 7}
- };
+ {CPM_CLK_FCC3, CPM_CLK16, 7},
+ {CPM_CLK_SCC1, CPM_BRG1, 0},
+ {CPM_CLK_SCC1, CPM_BRG2, 1},
+ {CPM_CLK_SCC1, CPM_BRG3, 2},
+ {CPM_CLK_SCC1, CPM_BRG4, 3},
+ {CPM_CLK_SCC1, CPM_CLK11, 4},
+ {CPM_CLK_SCC1, CPM_CLK12, 5},
+ {CPM_CLK_SCC1, CPM_CLK3, 6},
+ {CPM_CLK_SCC1, CPM_CLK4, 7},
+ {CPM_CLK_SCC2, CPM_BRG1, 0},
+ {CPM_CLK_SCC2, CPM_BRG2, 1},
+ {CPM_CLK_SCC2, CPM_BRG3, 2},
+ {CPM_CLK_SCC2, CPM_BRG4, 3},
+ {CPM_CLK_SCC2, CPM_CLK11, 4},
+ {CPM_CLK_SCC2, CPM_CLK12, 5},
+ {CPM_CLK_SCC2, CPM_CLK3, 6},
+ {CPM_CLK_SCC2, CPM_CLK4, 7},
+ {CPM_CLK_SCC3, CPM_BRG1, 0},
+ {CPM_CLK_SCC3, CPM_BRG2, 1},
+ {CPM_CLK_SCC3, CPM_BRG3, 2},
+ {CPM_CLK_SCC3, CPM_BRG4, 3},
+ {CPM_CLK_SCC3, CPM_CLK5, 4},
+ {CPM_CLK_SCC3, CPM_CLK6, 5},
+ {CPM_CLK_SCC3, CPM_CLK7, 6},
+ {CPM_CLK_SCC3, CPM_CLK8, 7},
+ {CPM_CLK_SCC4, CPM_BRG1, 0},
+ {CPM_CLK_SCC4, CPM_BRG2, 1},
+ {CPM_CLK_SCC4, CPM_BRG3, 2},
+ {CPM_CLK_SCC4, CPM_BRG4, 3},
+ {CPM_CLK_SCC4, CPM_CLK5, 4},
+ {CPM_CLK_SCC4, CPM_CLK6, 5},
+ {CPM_CLK_SCC4, CPM_CLK7, 6},
+ {CPM_CLK_SCC4, CPM_CLK8, 7},
+ };
im_cpmux = cpm2_map(im_cpmux);
@@ -203,13 +235,13 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
if (mode == CPM_CLK_RX)
shift +=3;
- for (i=0; i<24; i++) {
+ for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
if (clk_map[i][0] == target && clk_map[i][1] == clock) {
bits = clk_map[i][2];
break;
}
}
- if (i == sizeof(clk_map)/3)
+ if (i == ARRAY_SIZE(clk_map))
ret = -EINVAL;
bits <<= shift;
--
1.5.0.3
^ permalink raw reply related
* [PATCH 27/61] cpm2: Fix whitespace in cpm2_clk_setup().
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/cpm2_common.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index 4e840bd..7e3a983 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -233,7 +233,7 @@ int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode)
}
if (mode == CPM_CLK_RX)
- shift +=3;
+ shift += 3;
for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
if (clk_map[i][0] == target && clk_map[i][1] == clock) {
--
1.5.0.3
^ permalink raw reply related
* [PATCH 28/61] Add cpm2_set_pin().
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
This provides a generic way for board code to set up CPM pins, rather
than directly poking magic values into registers.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/cpm2_common.c | 28 ++++++++++++++++++++++++++++
include/asm-ppc/cpm2.h | 8 ++++++++
2 files changed, 36 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index 7e3a983..0a62df7 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -338,3 +338,31 @@ void *cpm_dpram_addr(unsigned long offset)
return (void *)(im_dprambase + offset);
}
EXPORT_SYMBOL(cpm_dpram_addr);
+
+struct cpm2_ioports {
+ u32 dir, par, sor, odr, dat;
+ u32 res[3];
+};
+
+void cpm2_set_pin(int port, int pin, int flags)
+{
+ struct cpm2_ioports __iomem *iop =
+ (struct cpm_ioports __iomem *)&cpm2_immr->im_ioport;
+
+ pin = 1 << (31 - pin);
+
+ if (flags & CPM_PIN_OUTPUT)
+ setbits32(&iop[port].dir, pin);
+ else
+ clrbits32(&iop[port].dir, pin);
+
+ if (!(flags & CPM_PIN_GPIO))
+ setbits32(&iop[port].par, pin);
+ else
+ clrbits32(&iop[port].par, pin);
+
+ if (flags & CPM_PIN_SECONDARY)
+ setbits32(&iop[port].sor, pin);
+ else
+ clrbits32(&iop[port].sor, pin);
+}
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
index 12a2860..0e7ffb6 100644
--- a/include/asm-ppc/cpm2.h
+++ b/include/asm-ppc/cpm2.h
@@ -1244,5 +1244,13 @@ enum cpm_clk {
extern int cpm2_clk_setup(enum cpm_clk_target target, int clock, int mode);
+#define CPM_PIN_INPUT 0
+#define CPM_PIN_OUTPUT 1
+#define CPM_PIN_PRIMARY 0
+#define CPM_PIN_SECONDARY 2
+#define CPM_PIN_GPIO 4
+
+void cpm2_set_pin(int port, int pin, int flags);
+
#endif /* __CPM2__ */
#endif /* __KERNEL__ */
--
1.5.0.3
^ permalink raw reply related
* [PATCH 29/61] fsl_soc: Fix get_immrbase() to use ranges, rather than reg.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
It is not always the case that the SoC's first reg property points
to the beginning of the entire SoC block.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/fsl_soc.c | 15 ++++++++++++---
1 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index c0ddc80..a837742 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -52,10 +52,19 @@ phys_addr_t get_immrbase(void)
soc = of_find_node_by_type(NULL, "soc");
if (soc) {
unsigned int size;
- const void *prop = of_get_property(soc, "reg", &size);
+ u32 naddr;
+ const u32 *prop = of_get_property(soc, "#address-cells", &size);
+
+ if (prop && size == 4)
+ naddr = *prop;
+ else
+ naddr = 2;
+
+ prop = of_get_property(soc, "ranges", &size);
+
+ if (prop && size >= 12)
+ immrbase = of_translate_address(soc, prop + naddr);
- if (prop)
- immrbase = of_translate_address(soc, prop);
of_node_put(soc);
};
--
1.5.0.3
^ permalink raw reply related
* [PATCH 30/61] fsl_soc: Update the way get_brgfreq() finds things in the device tree.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
It now uses names that are less namespace polluting.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/dts/mpc8272ads.dts | 5 ++---
arch/powerpc/boot/dts/mpc8560ads.dts | 5 ++---
arch/powerpc/boot/dts/mpc866ads.dts | 5 ++---
arch/powerpc/boot/dts/mpc885ads.dts | 5 ++---
arch/powerpc/sysdev/fsl_soc.c | 10 +++++-----
5 files changed, 13 insertions(+), 17 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 4d09dca..16a77f4 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -119,12 +119,11 @@
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
- device_type = "cpm";
- model = "CPM2";
+ compatible = "fsl,mpc8272-cpm", "fsl,cpm2", "fsl,cpm";
ranges = <00000000 00000000 20000>;
reg = <0 20000>;
command-proc = <119c0>;
- brg-frequency = <17D7840>;
+ fsl,brg-frequency = <d#25000000>;
cpm_clk = <BEBC200>;
scc@11a00 {
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 21ccaaa..1626587 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -235,12 +235,11 @@
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
- device_type = "cpm";
- model = "CPM2";
+ compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "fsl,cpm";
ranges = <0 0 c0000>;
reg = <80000 40000>;
command-proc = <919c0>;
- brg-frequency = <9d5b340>;
+ fsl,brg-frequency = <d#165000000>;
cpmpic: pic@90c00 {
interrupt-controller;
diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index e5e7726..b3dbfe8 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -87,12 +87,11 @@
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
- device_type = "cpm";
- model = "CPM";
+ compatible = "fsl,mpc866-cpm", "fsl,cpm1", "fsl,cpm";
ranges = <0 0 4000>;
reg = <860 f0>;
command-proc = <9c0>;
- brg-frequency = <0>;
+ fsl,brg-frequency = <0>;
interrupts = <0 2>; // cpm error interrupt
interrupt-parent = <&Cpm_pic>;
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index dc7ab9c..8372469 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -118,12 +118,11 @@
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
- device_type = "cpm";
- model = "CPM";
+ compatible = "fsl,mpc885-cpm", "fsl,cpm1", "fsl,cpm";
ranges = <0 0 4000>;
reg = <860 f0>;
command-proc = <9c0>;
- brg-frequency = <0>;
+ fsl,brg-frequency = <0>;
interrupts = <0 2>; // cpm error interrupt
interrupt-parent = <&Cpm_pic>;
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index a837742..ff70d62 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -84,16 +84,16 @@ u32 get_brgfreq(void)
if (brgfreq != -1)
return brgfreq;
- node = of_find_node_by_type(NULL, "cpm");
+ node = of_find_compatible_node(NULL, NULL, "fsl,cpm");
if (node) {
unsigned int size;
- const unsigned int *prop = of_get_property(node,
- "brg-frequency", &size);
+ const unsigned int *prop =
+ of_get_property(node, "fsl,brg-frequency", &size);
- if (prop)
+ if (prop && size == 4)
brgfreq = *prop;
of_node_put(node);
- };
+ }
return brgfreq;
}
--
1.5.0.3
^ permalink raw reply related
* [PATCH 31/61] mpc8272ads: Check the board in the probe function.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/dts/mpc8272ads.dts | 2 +-
arch/powerpc/platforms/82xx/mpc8272ads.c | 7 ++-----
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 16a77f4..8c69cd0 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -11,7 +11,7 @@
/ {
model = "MPC8272ADS";
- compatible = "MPC8260ADS";
+ compatible = "fsl,mpc8272ads";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index 29c2932..fbf9c67 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -599,11 +599,8 @@ static void __init mpc8272ads_setup_arch(void)
*/
static int __init mpc8272ads_probe(void)
{
- /* We always match for now, eventually we should look at
- * the flat dev tree to ensure this is the board we are
- * supposed to run on
- */
- return 1;
+ unsigned long root = of_get_flat_dt_root();
+ return of_flat_dt_is_compatible(root, "fsl,mpc8272ads");
}
#define RMR_CSRE 0x00000001
--
1.5.0.3
^ permalink raw reply related
* [PATCH 32/61] mpc82xx: Move PQ2 restart and halt functions out of mpc8272-specific code.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
I renamed it from m82xx to pq2 because it won't work on the Integrated
Host Processor line of 82xx chips (i.e. 8240, 8245, and such).
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/platforms/82xx/Makefile | 1 +
arch/powerpc/platforms/82xx/mpc8272ads.c | 27 ++----------------
arch/powerpc/platforms/82xx/pq2.c | 44 ++++++++++++++++++++++++++++++
arch/powerpc/platforms/82xx/pq2.h | 7 +++++
include/asm-ppc/immap_cpm2.h | 2 +
5 files changed, 57 insertions(+), 24 deletions(-)
create mode 100644 arch/powerpc/platforms/82xx/pq2.c
create mode 100644 arch/powerpc/platforms/82xx/pq2.h
diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/platforms/82xx/Makefile
index 881a3f6..6049640 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -3,3 +3,4 @@
#
obj-$(CONFIG_PPC_82xx) += mpc82xx.o
obj-$(CONFIG_MPC8272ADS) += mpc8272ads.o
+obj-$(CONFIG_CPM2) += pq2.o
diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index fbf9c67..cd14a48 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -2,7 +2,6 @@
* MPC8272ADS setup and early boot code plus other random bits.
*
* Author: Vitaly Bordug <vbordug@ru.mvista.com>
- * m82xx_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
*
* Copyright (c) 2006 MontaVista Software, Inc.
*
@@ -42,6 +41,7 @@
#include <asm/mpc8260.h>
#include <asm/irq.h>
#include <mm/mmu_decl.h>
+#include <platforms/82xx/pq2.h>
#include <asm/prom.h>
#include <asm/cpm2.h>
#include <asm/udbg.h>
@@ -603,27 +603,6 @@ static int __init mpc8272ads_probe(void)
return of_flat_dt_is_compatible(root, "fsl,mpc8272ads");
}
-#define RMR_CSRE 0x00000001
-static void m82xx_restart(char *cmd)
-{
- __volatile__ unsigned char dummy;
-
- local_irq_disable();
- ((cpm2_map_t *) cpm2_immr)->im_clkrst.car_rmr |= RMR_CSRE;
-
- /* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
- mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
- dummy = ((cpm2_map_t *) cpm2_immr)->im_clkrst.res[0];
- printk("Restart failed\n");
- while (1) ;
-}
-
-static void m82xx_halt(void)
-{
- local_irq_disable();
- while (1) ;
-}
-
define_machine(mpc8272ads)
{
.name = "Freescale MPC8272ADS",
@@ -633,6 +612,6 @@ define_machine(mpc8272ads)
.show_cpuinfo = m82xx_show_cpuinfo,
.get_irq = cpm2_get_irq,
.calibrate_decr = m82xx_calibrate_decr,
- .restart = m82xx_restart,
- .halt = m82xx_halt,
+ .restart = pq2_restart,
+ .halt = pq2_halt,
};
diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/platforms/82xx/pq2.c
new file mode 100644
index 0000000..e58980d
--- /dev/null
+++ b/arch/powerpc/platforms/82xx/pq2.c
@@ -0,0 +1,44 @@
+/*
+ * Common PowerQUICC II code.
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ * Copyright (c) 2007 Freescale Semiconductor
+ *
+ * Based on code by Vitaly Bordug <vbordug@ru.mvista.com>
+ * pq2_restart fix by Wade Farnsworth <wfarnsworth@mvista.com>
+ * Copyright (c) 2006 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <asm/cpm2.h>
+#include <asm/io.h>
+#include <asm/system.h>
+
+#include <platforms/82xx/pq2.h>
+
+#define RMR_CSRE 0x00000001
+
+void pq2_restart(char *cmd)
+{
+ local_irq_disable();
+ cpm2_immr->im_clkrst.car_rmr |= RMR_CSRE;
+
+ /* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
+ mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
+ in_8(&cpm2_immr->im_clkrst.res[0]);
+
+ printk("Restart failed\n");
+ while (1)
+ ;
+}
+
+void pq2_halt(void)
+{
+ local_irq_disable();
+ while (1)
+ ;
+}
diff --git a/arch/powerpc/platforms/82xx/pq2.h b/arch/powerpc/platforms/82xx/pq2.h
new file mode 100644
index 0000000..3c9620f
--- /dev/null
+++ b/arch/powerpc/platforms/82xx/pq2.h
@@ -0,0 +1,7 @@
+#ifndef _PQ2_H
+#define _PQ2_H
+
+void pq2_restart(char *cmd);
+void pq2_halt(void);
+
+#endif
diff --git a/include/asm-ppc/immap_cpm2.h b/include/asm-ppc/immap_cpm2.h
index 3c23d9c..8795bcc 100644
--- a/include/asm-ppc/immap_cpm2.h
+++ b/include/asm-ppc/immap_cpm2.h
@@ -10,6 +10,8 @@
#ifndef __IMMAP_CPM2__
#define __IMMAP_CPM2__
+#include <linux/types.h>
+
/* System configuration registers.
*/
typedef struct sys_82xx_conf {
--
1.5.0.3
^ permalink raw reply related
* [PATCH 33/61] mpc82xx: Remove a bunch of cruft that duplicates generic functionality.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/platforms/82xx/mpc8272ads.c | 37 ++------------
arch/powerpc/platforms/82xx/mpc82xx.c | 76 +-----------------------------
arch/powerpc/platforms/82xx/pq2ads.h | 5 --
3 files changed, 7 insertions(+), 111 deletions(-)
diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index cd14a48..b23fa73 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -11,42 +11,21 @@
* option) any later version.
*/
-#include <linux/stddef.h>
-#include <linux/kernel.h>
#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
#include <linux/interrupt.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/initrd.h>
-#include <linux/module.h>
#include <linux/fsl_devices.h>
#include <linux/fs_uart_pd.h>
+#include <linux/fs_enet_pd.h>
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/bootinfo.h>
#include <asm/pci-bridge.h>
#include <asm/mpc8260.h>
-#include <asm/irq.h>
-#include <mm/mmu_decl.h>
-#include <platforms/82xx/pq2.h>
-#include <asm/prom.h>
#include <asm/cpm2.h>
#include <asm/udbg.h>
#include <asm/i8259.h>
-#include <linux/fs_enet_pd.h>
+#include <asm/time.h>
+
+#include <platforms/82xx/pq2.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/cpm2_pic.h>
@@ -584,12 +563,6 @@ static void __init mpc8272ads_setup_arch(void)
of_node_put(np);
#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_HDA1;
-#endif
-
if (ppc_md.progress)
ppc_md.progress("mpc8272ads_setup_arch(), finish", 0);
}
@@ -611,7 +584,7 @@ define_machine(mpc8272ads)
.init_IRQ = mpc8272ads_pic_init,
.show_cpuinfo = m82xx_show_cpuinfo,
.get_irq = cpm2_get_irq,
- .calibrate_decr = m82xx_calibrate_decr,
+ .calibrate_decr = generic_calibrate_decr,
.restart = pq2_restart,
.halt = pq2_halt,
};
diff --git a/arch/powerpc/platforms/82xx/mpc82xx.c b/arch/powerpc/platforms/82xx/mpc82xx.c
index a2a9c8d..1d3d0e9 100644
--- a/arch/powerpc/platforms/82xx/mpc82xx.c
+++ b/arch/powerpc/platforms/82xx/mpc82xx.c
@@ -11,82 +11,10 @@
* option) any later version.
*/
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/errno.h>
-#include <linux/reboot.h>
-#include <linux/pci.h>
-#include <linux/interrupt.h>
-#include <linux/kdev_t.h>
-#include <linux/major.h>
-#include <linux/console.h>
-#include <linux/delay.h>
#include <linux/seq_file.h>
-#include <linux/root_dev.h>
-#include <linux/initrd.h>
-#include <linux/module.h>
-#include <linux/fsl_devices.h>
-#include <linux/fs_uart_pd.h>
-
-#include <asm/system.h>
-#include <asm/pgtable.h>
-#include <asm/page.h>
-#include <asm/atomic.h>
-#include <asm/time.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/bootinfo.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpc8260.h>
-#include <asm/irq.h>
#include <mm/mmu_decl.h>
-#include <asm/prom.h>
-#include <asm/cpm2.h>
-#include <asm/udbg.h>
-#include <asm/i8259.h>
-#include <linux/fs_enet_pd.h>
-
-#include <sysdev/fsl_soc.h>
-#include <sysdev/cpm2_pic.h>
-
-#include "pq2ads.h"
-
-static int __init get_freq(char *name, unsigned long *val)
-{
- struct device_node *cpu;
- const unsigned int *fp;
- int found = 0;
-
- /* The cpu node should have timebase and clock frequency properties */
- cpu = of_find_node_by_type(NULL, "cpu");
-
- if (cpu) {
- fp = of_get_property(cpu, name, NULL);
- if (fp) {
- found = 1;
- *val = *fp;
- }
-
- of_node_put(cpu);
- }
-
- return found;
-}
-
-void __init m82xx_calibrate_decr(void)
-{
- ppc_tb_freq = 125000000;
- if (!get_freq("bus-frequency", &ppc_tb_freq)) {
- printk(KERN_ERR "WARNING: Estimating decrementer frequency "
- "(not found)\n");
- }
- ppc_tb_freq /= 4;
- ppc_proc_freq = 1000000000;
- if (!get_freq("clock-frequency", &ppc_proc_freq))
- printk(KERN_ERR "WARNING: Estimating processor frequency"
- "(not found)\n");
-}
+#include <asm/machdep.h>
+#include <asm/system.h>
void m82xx_show_cpuinfo(struct seq_file *m)
{
diff --git a/arch/powerpc/platforms/82xx/pq2ads.h b/arch/powerpc/platforms/82xx/pq2ads.h
index 4802292..4546ce6 100644
--- a/arch/powerpc/platforms/82xx/pq2ads.h
+++ b/arch/powerpc/platforms/82xx/pq2ads.h
@@ -25,10 +25,6 @@
#include <linux/seq_file.h>
#include <asm/ppcboot.h>
-/* For our show_cpuinfo hooks. */
-#define CPUINFO_VENDOR "Freescale Semiconductor"
-#define CPUINFO_MACHINE "PQ2 ADS PowerPC"
-
/* Backword-compatibility stuff for the drivers */
#define CPM_MAP_ADDR ((uint)0xf0000000)
#define CPM_IRQ_OFFSET 0
@@ -60,7 +56,6 @@
void m82xx_pci_init_irq(void);
void m82xx_show_cpuinfo(struct seq_file *);
-void m82xx_calibrate_decr(void);
#endif /* __MACH_ADS8260_DEFS */
#endif /* __KERNEL__ */
--
1.5.0.3
^ permalink raw reply related
* [PATCH 34/61] cpm2: Use the global cpm2_immr rather than ioremapping() all over the place.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
include/asm-powerpc/fs_pd.h | 19 +++----------------
1 files changed, 3 insertions(+), 16 deletions(-)
diff --git a/include/asm-powerpc/fs_pd.h b/include/asm-powerpc/fs_pd.h
index c624915..2179a5a 100644
--- a/include/asm-powerpc/fs_pd.h
+++ b/include/asm-powerpc/fs_pd.h
@@ -23,22 +23,9 @@
#include <asm/mpc85xx.h>
#endif
-#define cpm2_map(member) \
-({ \
- u32 offset = offsetof(cpm2_map_t, member); \
- void *addr = ioremap (CPM_MAP_ADDR + offset, \
- sizeof( ((cpm2_map_t*)0)->member)); \
- addr; \
-})
-
-#define cpm2_map_size(member, size) \
-({ \
- u32 offset = offsetof(cpm2_map_t, member); \
- void *addr = ioremap (CPM_MAP_ADDR + offset, size); \
- addr; \
-})
-
-#define cpm2_unmap(addr) iounmap(addr)
+#define cpm2_map(member) (&cpm2_immr->member)
+#define cpm2_map_size(member, size) (&cpm2_immr->member)
+#define cpm2_unmap(addr) do {} while(0)
#endif
#ifdef CONFIG_8xx
--
1.5.0.3
^ permalink raw reply related
* [PATCH 35/61] 82xx: Factor PCI PIC out of 8272ads code.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
The same PIC exists on other boards, such as the PQ2FADS.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/Kconfig | 2 +-
arch/powerpc/platforms/82xx/Kconfig | 4 +
arch/powerpc/platforms/82xx/Makefile | 1 +
arch/powerpc/platforms/82xx/mpc8272ads.c | 190 +------------------------
arch/powerpc/platforms/82xx/pq2.h | 9 ++
arch/powerpc/platforms/82xx/pq2ads-pci-pic.c | 200 ++++++++++++++++++++++++++
6 files changed, 218 insertions(+), 188 deletions(-)
create mode 100644 arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index cbfbd98..1a96260 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -458,7 +458,7 @@ config PCI_8260
config 8260_PCI9
bool "Enable workaround for MPC826x erratum PCI 9"
- depends on PCI_8260 && !ADS8272
+ depends on PCI_8260 && !8272
default y
choice
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index b4af8c2..428e1e5 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -10,6 +10,7 @@ config MPC8272ADS
select 8272
select 8260
select FSL_SOC
+ select PQ2_ADS_PCI_PIC if PCI
help
This option enables support for the MPC8272 ADS board
@@ -34,3 +35,6 @@ config 8272
help
The MPC8272 CPM has a different internal dpram setup than other CPM2
devices
+
+config PQ2_ADS_PCI_PIC
+ bool
diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/platforms/82xx/Makefile
index 6049640..57c9e1d 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -4,3 +4,4 @@
obj-$(CONFIG_PPC_82xx) += mpc82xx.o
obj-$(CONFIG_MPC8272ADS) += mpc8272ads.o
obj-$(CONFIG_CPM2) += pq2.o
+obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index b23fa73..e5b7a0f 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -31,18 +31,7 @@
#include <sysdev/cpm2_pic.h>
#include "pq2ads.h"
-
-#ifdef CONFIG_PCI
-static uint pci_clk_frq;
-static struct {
- unsigned long *pci_int_stat_reg;
- unsigned long *pci_int_mask_reg;
-} pci_regs;
-
-static unsigned long pci_int_base;
-static struct irq_host *pci_pic_host;
-static struct device_node *pci_pic_node;
-#endif
+#include "pq2.h"
static void __init mpc8272ads_pic_init(void)
{
@@ -68,10 +57,9 @@ static void __init mpc8272ads_pic_init(void)
cpm_reg = (cpm2_map_t *) ioremap(get_immrbase(), sizeof(cpm2_map_t));
cpm_reg->im_intctl.ic_siprr = 0x05309770;
iounmap(cpm_reg);
-#ifdef CONFIG_PCI
+
/* Initialize stuff for the 82xx CPLD IC and install demux */
- m82xx_pci_init_irq();
-#endif
+ pq2ads_pci_init_irq();
}
static void init_fcc1_ioports(struct fs_platform_info *fpi)
@@ -315,177 +303,6 @@ void __init mpc8272ads_board_setup(void)
}
#ifdef CONFIG_PCI
-static void m82xx_pci_mask_irq(unsigned int irq)
-{
- int bit = irq - pci_int_base;
-
- *pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
- return;
-}
-
-static void m82xx_pci_unmask_irq(unsigned int irq)
-{
- int bit = irq - pci_int_base;
-
- *pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
- return;
-}
-
-static void m82xx_pci_mask_and_ack(unsigned int irq)
-{
- int bit = irq - pci_int_base;
-
- *pci_regs.pci_int_mask_reg |= (1 << (31 - bit));
- return;
-}
-
-static void m82xx_pci_end_irq(unsigned int irq)
-{
- int bit = irq - pci_int_base;
-
- *pci_regs.pci_int_mask_reg &= ~(1 << (31 - bit));
- return;
-}
-
-struct hw_interrupt_type m82xx_pci_ic = {
- .typename = "MPC82xx ADS PCI",
- .name = "MPC82xx ADS PCI",
- .enable = m82xx_pci_unmask_irq,
- .disable = m82xx_pci_mask_irq,
- .ack = m82xx_pci_mask_and_ack,
- .end = m82xx_pci_end_irq,
- .mask = m82xx_pci_mask_irq,
- .mask_ack = m82xx_pci_mask_and_ack,
- .unmask = m82xx_pci_unmask_irq,
- .eoi = m82xx_pci_end_irq,
-};
-
-static void
-m82xx_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
-{
- unsigned long stat, mask, pend;
- int bit;
-
- for (;;) {
- stat = *pci_regs.pci_int_stat_reg;
- mask = *pci_regs.pci_int_mask_reg;
- pend = stat & ~mask & 0xf0000000;
- if (!pend)
- break;
- for (bit = 0; pend != 0; ++bit, pend <<= 1) {
- if (pend & 0x80000000)
- __do_IRQ(pci_int_base + bit);
- }
- }
-}
-
-static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
-{
- return node == pci_pic_node;
-}
-
-static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
- irq_hw_number_t hw)
-{
- get_irq_desc(virq)->status |= IRQ_LEVEL;
- set_irq_chip(virq, &m82xx_pci_ic);
- return 0;
-}
-
-static void pci_host_unmap(struct irq_host *h, unsigned int virq)
-{
- /* remove chip and handler */
- set_irq_chip(virq, NULL);
-}
-
-static struct irq_host_ops pci_pic_host_ops = {
- .match = pci_pic_host_match,
- .map = pci_pic_host_map,
- .unmap = pci_host_unmap,
-};
-
-void m82xx_pci_init_irq(void)
-{
- int irq;
- cpm2_map_t *immap;
- struct device_node *np;
- struct resource r;
- const u32 *regs;
- unsigned int size;
- const u32 *irq_map;
- int i;
- unsigned int irq_max, irq_min;
-
- if ((np = of_find_node_by_type(NULL, "soc")) == NULL) {
- printk(KERN_INFO "No SOC node in device tree\n");
- return;
- }
- memset(&r, 0, sizeof(r));
- if (of_address_to_resource(np, 0, &r)) {
- printk(KERN_INFO "No SOC reg property in device tree\n");
- return;
- }
- immap = ioremap(r.start, sizeof(*immap));
- of_node_put(np);
-
- /* install the demultiplexer for the PCI cascade interrupt */
- np = of_find_node_by_type(NULL, "pci");
- if (!np) {
- printk(KERN_INFO "No pci node on device tree\n");
- iounmap(immap);
- return;
- }
- irq_map = of_get_property(np, "interrupt-map", &size);
- if ((!irq_map) || (size <= 7)) {
- printk(KERN_INFO "No interrupt-map property of pci node\n");
- iounmap(immap);
- return;
- }
- size /= sizeof(irq_map[0]);
- for (i = 0, irq_max = 0, irq_min = 512; i < size; i += 7, irq_map += 7) {
- if (irq_map[5] < irq_min)
- irq_min = irq_map[5];
- if (irq_map[5] > irq_max)
- irq_max = irq_map[5];
- }
- pci_int_base = irq_min;
- irq = irq_of_parse_and_map(np, 0);
- set_irq_chained_handler(irq, m82xx_pci_irq_demux);
- of_node_put(np);
- np = of_find_node_by_type(NULL, "pci-pic");
- if (!np) {
- printk(KERN_INFO "No pci pic node on device tree\n");
- iounmap(immap);
- return;
- }
- pci_pic_node = of_node_get(np);
- /* PCI interrupt controller registers: status and mask */
- regs = of_get_property(np, "reg", &size);
- if ((!regs) || (size <= 2)) {
- printk(KERN_INFO "No reg property in pci pic node\n");
- iounmap(immap);
- return;
- }
- pci_regs.pci_int_stat_reg =
- ioremap(regs[0], sizeof(*pci_regs.pci_int_stat_reg));
- pci_regs.pci_int_mask_reg =
- ioremap(regs[1], sizeof(*pci_regs.pci_int_mask_reg));
- of_node_put(np);
- /* configure chip select for PCI interrupt controller */
- immap->im_memctl.memc_br3 = regs[0] | 0x00001801;
- immap->im_memctl.memc_or3 = 0xffff8010;
- /* make PCI IRQ level sensitive */
- immap->im_intctl.ic_siexr &= ~(1 << (14 - (irq - SIU_INT_IRQ1)));
-
- /* mask all PCI interrupts */
- *pci_regs.pci_int_mask_reg |= 0xfff00000;
- iounmap(immap);
- pci_pic_host =
- irq_alloc_host(IRQ_HOST_MAP_LINEAR, irq_max - irq_min + 1,
- &pci_pic_host_ops, irq_max + 1);
- return;
-}
-
static int m82xx_pci_exclude_device(struct pci_controller *hose,
u_char bus, u_char devfn)
{
@@ -512,7 +329,6 @@ static void __init mpc82xx_add_bridge(struct device_node *np)
printk(KERN_INFO "No clock-frequency property in PCI node");
return;
}
- pci_clk_frq = *ptr;
of_node_put(np);
bus_range = of_get_property(np, "bus-range", &len);
if (bus_range == NULL || len < 2 * sizeof(int)) {
diff --git a/arch/powerpc/platforms/82xx/pq2.h b/arch/powerpc/platforms/82xx/pq2.h
index 3c9620f..6bce391 100644
--- a/arch/powerpc/platforms/82xx/pq2.h
+++ b/arch/powerpc/platforms/82xx/pq2.h
@@ -4,4 +4,13 @@
void pq2_restart(char *cmd);
void pq2_halt(void);
+#ifdef CONFIG_PCI
+int pq2ads_pci_init_irq(void);
+#else
+static inline int pq2ads_pci_init_irq(void)
+{
+ return 0;
+}
+#endif
+
#endif
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
new file mode 100644
index 0000000..cb77858
--- /dev/null
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -0,0 +1,200 @@
+/*
+ * PQ2 ADS-style PCI interrupt controller
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Loosely based on mpc82xx ADS support by Vitaly Bordug <vbordug@ru.mvista.com>
+ * Copyright (c) 2006 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/spinlock.h>
+#include <linux/irq.h>
+#include <linux/types.h>
+#include <linux/bootmem.h>
+
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/cpm2.h>
+
+static DEFINE_SPINLOCK(pci_pic_lock);
+
+struct pq2ads_pci_pic {
+ struct device_node *node;
+ struct irq_host *host;
+
+ struct {
+ u32 stat;
+ u32 mask;
+ } __iomem *regs;
+};
+
+#define NUM_IRQS 32
+
+static void pq2ads_pci_mask_irq(unsigned int virq)
+{
+ struct pq2ads_pci_pic *priv = get_irq_chip_data(virq);
+ int irq = NUM_IRQS - virq_to_hw(virq) - 1;
+
+ if (irq != -1) {
+ unsigned long flags;
+ spin_lock_irqsave(&pci_pic_lock, flags);
+
+ setbits32(&priv->regs->mask, 1 << irq);
+ mb();
+
+ spin_unlock_irqrestore(&pci_pic_lock, flags);
+ }
+}
+
+static void pq2ads_pci_unmask_irq(unsigned int virq)
+{
+ struct pq2ads_pci_pic *priv = get_irq_chip_data(virq);
+ int irq = NUM_IRQS - virq_to_hw(virq) - 1;
+
+ if (irq != -1) {
+ unsigned long flags;
+
+ spin_lock_irqsave(&pci_pic_lock, flags);
+ clrbits32(&priv->regs->mask, 1 << irq);
+ spin_unlock_irqrestore(&pci_pic_lock, flags);
+ }
+}
+
+struct irq_chip pq2ads_pci_ic = {
+ .typename = "PQ2 ADS PCI",
+ .name = "PQ2 ADS PCI",
+ .end = pq2ads_pci_unmask_irq,
+ .mask = pq2ads_pci_mask_irq,
+ .mask_ack = pq2ads_pci_mask_irq,
+ .ack = pq2ads_pci_mask_irq,
+ .unmask = pq2ads_pci_unmask_irq,
+ .enable = pq2ads_pci_unmask_irq,
+ .disable = pq2ads_pci_mask_irq
+};
+
+static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
+{
+ struct pq2ads_pci_pic *priv = desc->handler_data;
+ u32 stat, mask, pend;
+ int bit;
+
+ for (;;) {
+ stat = in_be32(&priv->regs->stat);
+ mask = in_be32(&priv->regs->mask);
+
+ pend = stat & ~mask;
+
+ if (!pend)
+ break;
+
+ for (bit = 0; pend != 0; ++bit, pend <<= 1) {
+ if (pend & 0x80000000) {
+ int irq = irq_linear_revmap(priv->host, bit);
+ generic_handle_irq(irq);
+ }
+ }
+ }
+}
+
+static int pci_pic_host_match(struct irq_host *h, struct device_node *node)
+{
+ struct pq2ads_pci_pic *priv = h->host_data;
+ return node == priv->node;
+}
+
+static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
+ irq_hw_number_t hw)
+{
+ get_irq_desc(virq)->status |= IRQ_LEVEL;
+ set_irq_chip_data(virq, h->host_data);
+ set_irq_chip(virq, &pq2ads_pci_ic);
+ return 0;
+}
+
+static void pci_host_unmap(struct irq_host *h, unsigned int virq)
+{
+ /* remove chip and handler */
+ set_irq_chip_data(virq, NULL);
+ set_irq_chip(virq, NULL);
+}
+
+static struct irq_host_ops pci_pic_host_ops = {
+ .match = pci_pic_host_match,
+ .map = pci_pic_host_map,
+ .unmap = pci_host_unmap,
+};
+
+int __init pq2ads_pci_init_irq(void)
+{
+ struct pq2ads_pci_pic *priv;
+ struct irq_host *host;
+ struct device_node *np;
+ int ret = -ENODEV;
+ int irq;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,pq2ads-pci-pic");
+ if (!np) {
+ printk(KERN_ERR "No pci pic node in device tree.\n");
+ of_node_put(np);
+ goto out;
+ }
+
+ irq = irq_of_parse_and_map(np, 0);
+ if (irq == NO_IRQ) {
+ printk(KERN_ERR "No interrupt in pci pic node.\n");
+ of_node_put(np);
+ goto out;
+ }
+
+ priv = alloc_bootmem(sizeof(struct pq2ads_pci_pic));
+ if (!priv) {
+ of_node_put(np);
+ ret = -ENOMEM;
+ goto out_unmap_irq;
+ }
+
+ priv->node = np;
+ of_node_put(np);
+
+ /* PCI interrupt controller registers: status and mask */
+ priv->regs = of_iomap(priv->node, 0);
+ if (!priv->regs) {
+ printk(KERN_ERR "Cannot map PCI PIC registers.\n");
+ goto out_free_bootmem;
+ }
+
+ /* mask all PCI interrupts */
+ out_be32(&priv->regs->mask, ~0);
+ mb();
+
+ host = irq_alloc_host(IRQ_HOST_MAP_LINEAR, NUM_IRQS,
+ &pci_pic_host_ops, NUM_IRQS);
+ if (!host) {
+ ret = -ENOMEM;
+ goto out_unmap_regs;
+ }
+
+ host->host_data = priv;
+
+ priv->host = host;
+ host->host_data = priv;
+ set_irq_data(irq, priv);
+ set_irq_chained_handler(irq, pq2ads_pci_irq_demux);
+ return 0;
+
+out_unmap_regs:
+ iounmap(priv->regs);
+out_free_bootmem:
+ free_bootmem((unsigned long)priv,
+ sizeof(sizeof(struct pq2ads_pci_pic)));
+out_unmap_irq:
+ irq_dispose_mapping(irq);
+out:
+ return ret;
+}
--
1.5.0.3
^ permalink raw reply related
* [PATCH 36/61] mpc82xx: Factor PCI init out of mpc8272ads.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/dts/mpc8272ads.dts | 3 +-
arch/powerpc/boot/dts/mpc8560ads.dts | 2 +-
arch/powerpc/platforms/82xx/mpc8272ads.c | 86 ++---------------------------
arch/powerpc/platforms/82xx/pq2.c | 44 +++++++++++++++
arch/powerpc/platforms/82xx/pq2.h | 7 +++
arch/powerpc/platforms/82xx/pq2ads.h | 1 -
6 files changed, 59 insertions(+), 84 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 8c69cd0..ae52ada 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -161,8 +161,7 @@
interrupt-controller;
reg = <10c00 80>;
built-in;
- device_type = "cpm-pic";
- compatible = "CPM2";
+ compatible = "fsl,pq2-pic";
};
pci@0500 {
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 1626587..847a095 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -249,7 +249,7 @@
interrupt-parent = <&mpic>;
reg = <90c00 80>;
built-in;
- device_type = "cpm-pic";
+ compatible = "fsl,pq2-pic";
};
scc@91a00 {
diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index e5b7a0f..388b090 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -18,11 +18,12 @@
#include <linux/fs_enet_pd.h>
#include <asm/io.h>
-#include <asm/pci-bridge.h>
#include <asm/mpc8260.h>
#include <asm/cpm2.h>
#include <asm/udbg.h>
#include <asm/i8259.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
#include <asm/time.h>
#include <platforms/82xx/pq2.h>
@@ -35,29 +36,15 @@
static void __init mpc8272ads_pic_init(void)
{
- struct device_node *np = of_find_compatible_node(NULL, "cpm-pic", "CPM2");
- struct resource r;
- cpm2_map_t *cpm_reg;
-
- if (np == NULL) {
+ struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
+ if (!np) {
printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
return;
}
- if (of_address_to_resource(np, 0, &r)) {
- printk(KERN_ERR "PIC init: invalid resource\n");
- of_node_put(np);
- return;
- }
+
cpm2_pic_init(np);
of_node_put(np);
- /* Initialize the default interrupt mapping priorities,
- * in case the boot rom changed something on us.
- */
- cpm_reg = (cpm2_map_t *) ioremap(get_immrbase(), sizeof(cpm2_map_t));
- cpm_reg->im_intctl.ic_siprr = 0x05309770;
- iounmap(cpm_reg);
-
/* Initialize stuff for the 82xx CPLD IC and install demux */
pq2ads_pci_init_irq();
}
@@ -302,67 +289,12 @@ void __init mpc8272ads_board_setup(void)
iounmap(immap);
}
-#ifdef CONFIG_PCI
-static int m82xx_pci_exclude_device(struct pci_controller *hose,
- u_char bus, u_char devfn)
-{
- if (bus == 0 && PCI_SLOT(devfn) == 0)
- return PCIBIOS_DEVICE_NOT_FOUND;
- else
- return PCIBIOS_SUCCESSFUL;
-}
-
-static void __init mpc82xx_add_bridge(struct device_node *np)
-{
- int len;
- struct pci_controller *hose;
- struct resource r;
- const int *bus_range;
- const uint *ptr;
-
- memset(&r, 0, sizeof(r));
- if (of_address_to_resource(np, 0, &r)) {
- printk(KERN_INFO "No PCI reg property in device tree\n");
- return;
- }
- if (!(ptr = of_get_property(np, "clock-frequency", NULL))) {
- printk(KERN_INFO "No clock-frequency property in PCI node");
- return;
- }
- of_node_put(np);
- bus_range = of_get_property(np, "bus-range", &len);
- if (bus_range == NULL || len < 2 * sizeof(int)) {
- printk(KERN_WARNING "Can't get bus-range for %s, assume"
- " bus 0\n", np->full_name);
- }
-
- pci_assign_all_buses = 1;
-
- hose = pcibios_alloc_controller(np);
-
- if (!hose)
- return;
-
- hose->first_busno = bus_range ? bus_range[0] : 0;
- hose->last_busno = bus_range ? bus_range[1] : 0xff;
-
- setup_indirect_pci(hose,
- r.start + offsetof(pci_cpm2_t, pci_cfg_addr),
- r.start + offsetof(pci_cpm2_t, pci_cfg_data));
-
- pci_process_bridge_OF_ranges(hose, np, 1);
-}
-#endif
/*
* Setup the architecture
*/
static void __init mpc8272ads_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
-
if (ppc_md.progress)
ppc_md.progress("mpc8272ads_setup_arch()", 0);
cpm2_reset();
@@ -371,13 +303,7 @@ static void __init mpc8272ads_setup_arch(void)
mpc8272ads_board_setup();
-#ifdef CONFIG_PCI
- ppc_md.pci_exclude_device = m82xx_pci_exclude_device;
- for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
- mpc82xx_add_bridge(np);
-
- of_node_put(np);
-#endif
+ pq2_init_pci();
if (ppc_md.progress)
ppc_md.progress("mpc8272ads_setup_arch(), finish", 0);
diff --git a/arch/powerpc/platforms/82xx/pq2.c b/arch/powerpc/platforms/82xx/pq2.c
index e58980d..76df8d7 100644
--- a/arch/powerpc/platforms/82xx/pq2.c
+++ b/arch/powerpc/platforms/82xx/pq2.c
@@ -16,6 +16,7 @@
#include <asm/cpm2.h>
#include <asm/io.h>
+#include <asm/pci-bridge.h>
#include <asm/system.h>
#include <platforms/82xx/pq2.h>
@@ -42,3 +43,46 @@ void pq2_halt(void)
while (1)
;
}
+
+#ifdef CONFIG_PCI
+static int pq2_pci_exclude_device(struct pci_controller *hose,
+ u_char bus, u8 devfn)
+{
+ if (bus == 0 && PCI_SLOT(devfn) == 0)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ else
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static void __init pq2_pci_add_bridge(struct device_node *np)
+{
+ struct pci_controller *hose;
+ struct resource r;
+
+ if (of_address_to_resource(np, 0, &r) || r.end - r.start < 0x10b) {
+ printk(KERN_ERR "No valid PCI reg property in device tree\n");
+ return;
+ }
+
+ pci_assign_all_buses = 1;
+
+ hose = pcibios_alloc_controller(np);
+ if (!hose)
+ return;
+
+ hose->arch_data = np;
+
+ setup_indirect_pci(hose, r.start + 0x100, r.start + 0x104);
+ pci_process_bridge_OF_ranges(hose, np, 1);
+}
+
+void __init pq2_init_pci(void)
+{
+ struct device_node *np = NULL;
+
+ ppc_md.pci_exclude_device = pq2_pci_exclude_device;
+
+ while ((np = of_find_compatible_node(np, NULL, "fsl,pq2-pci")))
+ pq2_pci_add_bridge(np);
+}
+#endif
diff --git a/arch/powerpc/platforms/82xx/pq2.h b/arch/powerpc/platforms/82xx/pq2.h
index 6bce391..4de5b06 100644
--- a/arch/powerpc/platforms/82xx/pq2.h
+++ b/arch/powerpc/platforms/82xx/pq2.h
@@ -3,14 +3,21 @@
void pq2_restart(char *cmd);
void pq2_halt(void);
+int pq2ads_pci_init_irq(void);
+void pq2_init_pci(void);
#ifdef CONFIG_PCI
int pq2ads_pci_init_irq(void);
+void pq2_init_pci(void);
#else
static inline int pq2ads_pci_init_irq(void)
{
return 0;
}
+
+static inline void pq2_init_pci(void)
+{
+}
#endif
#endif
diff --git a/arch/powerpc/platforms/82xx/pq2ads.h b/arch/powerpc/platforms/82xx/pq2ads.h
index 4546ce6..482153a 100644
--- a/arch/powerpc/platforms/82xx/pq2ads.h
+++ b/arch/powerpc/platforms/82xx/pq2ads.h
@@ -54,7 +54,6 @@
#define SIU_INT_SCC3 ((uint)0x2a+CPM_IRQ_OFFSET)
#define SIU_INT_SCC4 ((uint)0x2b+CPM_IRQ_OFFSET)
-void m82xx_pci_init_irq(void);
void m82xx_show_cpuinfo(struct seq_file *);
#endif /* __MACH_ADS8260_DEFS */
--
1.5.0.3
^ permalink raw reply related
* [PATCH 37/61] cpm2: Rework 8272ads initialization, and eliminate init_fcc_ioports().
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
The mpc8272ads initialization is reworked to:
1. use cpm2_set_pin() and cpm2_clk_setup() instead of the hardcoded mess,
2. have a sane devtree binding for the BCSR,
3. set the BCSR bits needed for both ethernet ports to work,
4. support the early debug console, and
5. call of_platform_bus_probe(), for the forthcoming of-platform-ization
of the CPM drivers.
The init_fcc_ioports() call is no longer used. CPM-based 85xx
is now broken until I can get a test machine, unless U-boot properly
sets up the I/O ports.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/platforms/82xx/mpc8272ads.c | 341 +++++++++---------------------
arch/powerpc/sysdev/fsl_soc.c | 3 -
2 files changed, 105 insertions(+), 239 deletions(-)
diff --git a/arch/powerpc/platforms/82xx/mpc8272ads.c b/arch/powerpc/platforms/82xx/mpc8272ads.c
index 388b090..8187920 100644
--- a/arch/powerpc/platforms/82xx/mpc8272ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272ads.c
@@ -1,8 +1,10 @@
/*
- * MPC8272ADS setup and early boot code plus other random bits.
+ * MPC8272ADS board support
*
- * Author: Vitaly Bordug <vbordug@ru.mvista.com>
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ * Author: Scott Wood <scottwood@freescale.com>
*
+ * Based on code by Vitaly Bordug <vbordug@ru.mvista.com>
* Copyright (c) 2006 MontaVista Software, Inc.
*
* This program is free software; you can redistribute it and/or modify it
@@ -14,15 +16,11 @@
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/fsl_devices.h>
-#include <linux/fs_uart_pd.h>
-#include <linux/fs_enet_pd.h>
#include <asm/io.h>
-#include <asm/mpc8260.h>
#include <asm/cpm2.h>
#include <asm/udbg.h>
-#include <asm/i8259.h>
-#include <asm/prom.h>
+#include <asm/of_platform.h>
#include <asm/machdep.h>
#include <asm/time.h>
@@ -49,259 +47,108 @@ static void __init mpc8272ads_pic_init(void)
pq2ads_pci_init_irq();
}
-static void init_fcc1_ioports(struct fs_platform_info *fpi)
-{
- struct io_port *io;
- u32 tempval;
- cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
- struct device_node *np;
- struct resource r;
- u32 *bcsr;
-
- np = of_find_node_by_type(NULL, "memory");
- if (!np) {
- printk(KERN_INFO "No memory node in device tree\n");
- return;
- }
- if (of_address_to_resource(np, 1, &r)) {
- printk(KERN_INFO "No memory reg property [1] in devicetree\n");
- return;
- }
- of_node_put(np);
- bcsr = ioremap(r.start + 4, sizeof(u32));
- io = &immap->im_ioport;
-
- /* Enable the PHY */
- clrbits32(bcsr, BCSR1_FETHIEN);
- setbits32(bcsr, BCSR1_FETH_RST);
-
- /* FCC1 pins are on port A/C. */
- /* Configure port A and C pins for FCC1 Ethernet. */
-
- tempval = in_be32(&io->iop_pdira);
- tempval &= ~PA1_DIRA0;
- tempval |= PA1_DIRA1;
- out_be32(&io->iop_pdira, tempval);
-
- tempval = in_be32(&io->iop_psora);
- tempval &= ~PA1_PSORA0;
- tempval |= PA1_PSORA1;
- out_be32(&io->iop_psora, tempval);
-
- setbits32(&io->iop_ppara, PA1_DIRA0 | PA1_DIRA1);
+struct cpm_pin {
+ int port, pin, flags;
+};
- /* Alter clocks */
- tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
+static struct cpm_pin mpc8272ads_pins[] = {
+ /* SCC1 */
+ {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+ /* SCC4 */
+ {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+ /* FCC1 */
+ {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+ {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+ {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+ {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY},
+ {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+
+ /* FCC2 */
+ {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+ {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+ {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+};
- clrbits32(&io->iop_psorc, tempval);
- clrbits32(&io->iop_pdirc, tempval);
- setbits32(&io->iop_pparc, tempval);
+static void __init init_ioports(void)
+{
+ int i;
- cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_rx, CPM_CLK_RX);
- cpm2_clk_setup(CPM_CLK_FCC1, fpi->clk_tx, CPM_CLK_TX);
+ for (i = 0; i < ARRAY_SIZE(mpc8272ads_pins); i++) {
+ struct cpm_pin *pin = &mpc8272ads_pins[i];
+ cpm2_set_pin(pin->port, pin->pin, pin->flags);
+ }
- iounmap(bcsr);
- iounmap(immap);
+ cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
+ cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_TX);
+ cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX);
+ cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK15, CPM_CLK_RX);
+ cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK16, CPM_CLK_TX);
}
-static void init_fcc2_ioports(struct fs_platform_info *fpi)
+static void __init mpc8272ads_setup_arch(void)
{
- cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
struct device_node *np;
- struct resource r;
u32 *bcsr;
- struct io_port *io;
- u32 tempval;
-
- np = of_find_node_by_type(NULL, "memory");
- if (!np) {
- printk(KERN_INFO "No memory node in device tree\n");
- return;
- }
- if (of_address_to_resource(np, 1, &r)) {
- printk(KERN_INFO "No memory reg property [1] in devicetree\n");
- return;
- }
- of_node_put(np);
- io = &immap->im_ioport;
- bcsr = ioremap(r.start + 12, sizeof(u32));
-
- /* Enable the PHY */
- clrbits32(bcsr, BCSR3_FETHIEN2);
- setbits32(bcsr, BCSR3_FETH2_RST);
-
- /* FCC2 are port B/C. */
- /* Configure port A and C pins for FCC2 Ethernet. */
-
- tempval = in_be32(&io->iop_pdirb);
- tempval &= ~PB2_DIRB0;
- tempval |= PB2_DIRB1;
- out_be32(&io->iop_pdirb, tempval);
-
- tempval = in_be32(&io->iop_psorb);
- tempval &= ~PB2_PSORB0;
- tempval |= PB2_PSORB1;
- out_be32(&io->iop_psorb, tempval);
-
- setbits32(&io->iop_pparb, PB2_DIRB0 | PB2_DIRB1);
-
- tempval = PC_CLK(fpi->clk_tx - 8) | PC_CLK(fpi->clk_rx - 8);
-
- /* Alter clocks */
- clrbits32(&io->iop_psorc, tempval);
- clrbits32(&io->iop_pdirc, tempval);
- setbits32(&io->iop_pparc, tempval);
-
- cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_rx, CPM_CLK_RX);
- cpm2_clk_setup(CPM_CLK_FCC2, fpi->clk_tx, CPM_CLK_TX);
+ if (ppc_md.progress)
+ ppc_md.progress("mpc8272ads_setup_arch()", 0);
- iounmap(bcsr);
- iounmap(immap);
-}
+ cpm2_reset();
-void init_fcc_ioports(struct fs_platform_info *fpi)
-{
- int fcc_no = fs_get_fcc_index(fpi->fs_no);
-
- switch (fcc_no) {
- case 0:
- init_fcc1_ioports(fpi);
- break;
- case 1:
- init_fcc2_ioports(fpi);
- break;
- default:
- printk(KERN_ERR "init_fcc_ioports: invalid FCC number\n");
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc8272ads-bcsr");
+ if (!np) {
+ printk(KERN_ERR "No bcsr in device tree\n");
return;
}
-}
-static void init_scc1_uart_ioports(struct fs_uart_platform_info *data)
-{
- cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-
- /* SCC1 is only on port D */
- setbits32(&immap->im_ioport.iop_ppard, 0x00000003);
- clrbits32(&immap->im_ioport.iop_psord, 0x00000001);
- setbits32(&immap->im_ioport.iop_psord, 0x00000002);
- clrbits32(&immap->im_ioport.iop_pdird, 0x00000001);
- setbits32(&immap->im_ioport.iop_pdird, 0x00000002);
-
- clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
- clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
- setbits32(&immap->im_cpmux.cmx_scr,
- ((data->clk_tx - 1) << (4 - data->clk_tx)));
- setbits32(&immap->im_cpmux.cmx_scr,
- ((data->clk_rx - 1) << (4 - data->clk_rx)));
-
- iounmap(immap);
-}
-
-static void init_scc4_uart_ioports(struct fs_uart_platform_info *data)
-{
- cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
-
- setbits32(&immap->im_ioport.iop_ppard, 0x00000600);
- clrbits32(&immap->im_ioport.iop_psord, 0x00000600);
- clrbits32(&immap->im_ioport.iop_pdird, 0x00000200);
- setbits32(&immap->im_ioport.iop_pdird, 0x00000400);
-
- clrbits32(&immap->im_cpmux.cmx_scr, (0x00000007 << (4 - data->clk_tx)));
- clrbits32(&immap->im_cpmux.cmx_scr, (0x00000038 << (4 - data->clk_rx)));
- setbits32(&immap->im_cpmux.cmx_scr,
- ((data->clk_tx - 1) << (4 - data->clk_tx)));
- setbits32(&immap->im_cpmux.cmx_scr,
- ((data->clk_rx - 1) << (4 - data->clk_rx)));
-
- iounmap(immap);
-}
-
-void init_scc_ioports(struct fs_uart_platform_info *data)
-{
- int scc_no = fs_get_scc_index(data->fs_no);
-
- switch (scc_no) {
- case 0:
- init_scc1_uart_ioports(data);
- data->brg = data->clk_rx;
- break;
- case 3:
- init_scc4_uart_ioports(data);
- data->brg = data->clk_rx;
- break;
- default:
- printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
+ bcsr = of_iomap(np, 0);
+ if (!bcsr) {
+ printk(KERN_INFO "Cannot map BCSR registers\n");
return;
}
-}
-void __init mpc8272ads_board_setup(void)
-{
- cpm2_map_t *immap = ioremap(get_immrbase(), sizeof(cpm2_map_t));
- struct device_node *np;
- struct resource r;
- u32 *bcsr;
-
- np = of_find_node_by_type(NULL, "memory");
- if (!np) {
- printk(KERN_INFO "No memory node in device tree\n");
- return;
- }
- if (of_address_to_resource(np, 1, &r)) {
- printk(KERN_INFO "No memory reg property [1] in devicetree\n");
- return;
- }
of_node_put(np);
- bcsr = ioremap(r.start + 4, sizeof(u32));
- /* Enable the 2nd UART port */
- clrbits32(bcsr, BCSR1_RS232_EN2);
-
-#ifdef CONFIG_SERIAL_CPM_SCC1
- clrbits32((u32 *) & immap->im_scc[0].scc_sccm,
- UART_SCCM_TX | UART_SCCM_RX);
- clrbits32((u32 *) & immap->im_scc[0].scc_gsmrl,
- SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC2
- clrbits32((u32 *) & immap->im_scc[1].scc_sccm,
- UART_SCCM_TX | UART_SCCM_RX);
- clrbits32((u32 *) & immap->im_scc[1].scc_gsmrl,
- SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-#ifdef CONFIG_SERIAL_CPM_SCC3
- clrbits32((u32 *) & immap->im_scc[2].scc_sccm,
- UART_SCCM_TX | UART_SCCM_RX);
- clrbits32((u32 *) & immap->im_scc[2].scc_gsmrl,
- SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
+ clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN);
+ setbits32(&bcsr[1], BCSR1_FETH_RST);
-#ifdef CONFIG_SERIAL_CPM_SCC4
- clrbits32((u32 *) & immap->im_scc[3].scc_sccm,
- UART_SCCM_TX | UART_SCCM_RX);
- clrbits32((u32 *) & immap->im_scc[3].scc_gsmrl,
- SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
+ clrbits32(&bcsr[3], BCSR3_FETHIEN2);
+ setbits32(&bcsr[3], BCSR3_FETH2_RST);
iounmap(bcsr);
- iounmap(immap);
-}
-
-
-/*
- * Setup the architecture
- */
-static void __init mpc8272ads_setup_arch(void)
-{
- if (ppc_md.progress)
- ppc_md.progress("mpc8272ads_setup_arch()", 0);
- cpm2_reset();
-
- /* Map I/O region to a 256MB BAT */
- mpc8272ads_board_setup();
+ init_ioports();
pq2_init_pci();
@@ -309,6 +156,23 @@ static void __init mpc8272ads_setup_arch(void)
ppc_md.progress("mpc8272ads_setup_arch(), finish", 0);
}
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .name = "soc", },
+ { .name = "cpm", },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ if (!machine_is(mpc8272ads))
+ return 0;
+
+ /* Publish the QE devices */
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ return 0;
+}
+device_initcall(declare_of_platform_devices);
+
/*
* Called very early, device-tree isn't unflattened
*/
@@ -329,4 +193,9 @@ define_machine(mpc8272ads)
.calibrate_decr = generic_calibrate_decr,
.restart = pq2_restart,
.halt = pq2_halt,
+ .progress = udbg_progress,
};
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+u32 __iomem *cpm_udbg_txdesc = (u32 __iomem *)0xf0000808;
+#endif
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index ff70d62..cee671f 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -588,8 +588,6 @@ arch_initcall(fsl_usb_of_init);
#ifdef CONFIG_CPM2
-extern void init_scc_ioports(struct fs_uart_platform_info*);
-
static const char fcc_regs[] = "fcc_regs";
static const char fcc_regs_c[] = "fcc_regs_c";
static const char fcc_pram[] = "fcc_pram";
@@ -700,7 +698,6 @@ static int __init fs_enet_of_init(void)
snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x",
(u32)res.start, fs_enet_data.phy_addr);
fs_enet_data.bus_id = (char*)&bus_id[(*id)];
- fs_enet_data.init_ioports = init_fcc_ioports;
mdio_bb_prop = of_get_property(phy, "bitbang", NULL);
if (mdio_bb_prop) {
--
1.5.0.3
^ permalink raw reply related
* [PATCH 38/61] cpm2: Update device trees.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
The mpc8272ads device tree is thoroughly reworked, including new CPM2 bindings.
The mpc8560ads tree has the CPM portions updated.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/dts/mpc8272ads.dts | 295 +++++++++++++++++++---------------
arch/powerpc/boot/dts/mpc8560ads.dts | 70 +++++----
2 files changed, 206 insertions(+), 159 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index ae52ada..708736b 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -22,179 +22,213 @@
PowerPC,8272@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <4000>; // L1, 16K
- i-cache-size = <4000>; // L1, 16K
+ d-cache-line-size = <d#32>;
+ i-cache-line-size = <d#32>;
+ d-cache-size = <d#16384>;
+ i-cache-size = <d#16384>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
- 32-bit;
};
};
- pci_pic: interrupt-controller@f8200000 {
- #address-cells = <0>;
- #interrupt-cells = <2>;
- interrupt-controller;
- reg = <f8200000 f8200004>;
- built-in;
- device_type = "pci-pic";
+ CS: chipselect {
+ compatible = "fsl,mpc8272ads-chipselect",
+ "fsl,mpc8272-chipselect",
+ "fsl,pq2-chipselect";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ fsl,ctrl = <&CSCTRL>;
+
+ ranges = <0 0 fe000000 02000000
+ 1 0 f4500000 00008000
+ 3 0 f8200000 00008000>;
+
+ flash@0 {
+ device_type = "rom";
+ compatible = "direct-mapped";
+ reg = <0 0 2000000>;
+ probe-type = "CFI";
+ bank-width = "4";
+ };
+
+ bcsr@1 {
+ reg = <1 0 20>;
+ compatible = "fsl,mpc8272ads-bcsr";
+ };
+
+ PCI_PIC: interrupt-controller@f8200000 {
+ compatible = "fsl,mpc8272ads-pci-pic",
+ "fsl,pq2ads-pci-pic";
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ reg = <3 0 8>;
+ interrupt-parent = <&PIC>;
+ interrupts = <14 8>;
+ };
};
memory {
device_type = "memory";
- reg = <00000000 4000000 f4500000 00000020>;
+ reg = <0 0>;
};
- chosen {
- name = "chosen";
- linux,platform = <0>;
- interrupt-controller = <&Cpm_pic>;
- };
-
- soc8272@f0000000 {
+ soc@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
- #interrupt-cells = <2>;
device_type = "soc";
+ compatible = "fsl,mpc8272", "fsl,pq2-soc";
ranges = <00000000 f0000000 00053000>;
reg = <f0000000 10000>;
- mdio@0 {
- device_type = "mdio";
- compatible = "fs_enet";
- reg = <0 0>;
- #address-cells = <1>;
- #size-cells = <0>;
-
- phy0:ethernet-phy@0 {
- interrupt-parent = <&Cpm_pic>;
- interrupts = <17 4>;
- reg = <0>;
- bitbang = [ 12 12 13 02 02 01 ];
- device_type = "ethernet-phy";
- };
-
- phy1:ethernet-phy@1 {
- interrupt-parent = <&Cpm_pic>;
- interrupts = <17 4>;
- bitbang = [ 12 12 13 02 02 01 ];
- reg = <3>;
- device_type = "ethernet-phy";
- };
+ CSCTRL: chipselect@10100 {
+ compatible = "fsl,mpc8272-chipset-ctrl",
+ "fsl,pq2-chipselect-ctrl";
+ reg = <10100 40>;
+ fsl,bus = <&CS>;
};
- ethernet@24000 {
- #address-cells = <1>;
- #size-cells = <0>;
- device_type = "network";
- device-id = <1>;
- compatible = "fs_enet";
- model = "FCC";
- reg = <11300 20 8400 100 11380 30>;
- mac-address = [ 00 11 2F 99 43 54 ];
- interrupts = <20 2>;
- interrupt-parent = <&Cpm_pic>;
- phy-handle = <&Phy0>;
- rx-clock = <13>;
- tx-clock = <12>;
- };
-
- ethernet@25000 {
- device_type = "network";
- device-id = <2>;
- compatible = "fs_enet";
- model = "FCC";
- reg = <11320 20 8500 100 113b0 30>;
- mac-address = [ 00 11 2F 99 44 54 ];
- interrupts = <21 2>;
- interrupt-parent = <&Cpm_pic>;
- phy-handle = <&Phy1>;
- rx-clock = <17>;
- tx-clock = <18>;
- };
-
- cpm@f0000000 {
+ cpm@119c0 {
#address-cells = <1>;
#size-cells = <1>;
- #interrupt-cells = <2>;
compatible = "fsl,mpc8272-cpm", "fsl,cpm2", "fsl,cpm";
- ranges = <00000000 00000000 20000>;
- reg = <0 20000>;
- command-proc = <119c0>;
- fsl,brg-frequency = <d#25000000>;
- cpm_clk = <BEBC200>;
+ fsl,brg-frequency = <0>;
+ reg = <119c0 30 0 2000>;
+ ranges;
+
+ brg@119f0 {
+ compatible = "fsl,mpc8272-brg",
+ "fsl,cpm2-brg",
+ "fsl,cpm-brg";
+ reg = <119f0 10 115f0 10>;
+ };
- scc@11a00 {
+ serial@11a00 {
device_type = "serial";
- compatible = "cpm_uart";
- model = "SCC";
- device-id = <1>;
+ compatible = "fsl,mpc8272-scc-uart",
+ "fsl,cpm2-scc-uart",
+ "fsl,cpm2-uart",
+ "fsl,cpm-scc-uart",
+ "fsl,cpm-uart";
reg = <11a00 20 8000 100>;
- current-speed = <1c200>;
- interrupts = <28 2>;
- interrupt-parent = <&Cpm_pic>;
- clock-setup = <0 00ffffff>;
- rx-clock = <1>;
- tx-clock = <1>;
+ interrupts = <28 8>;
+ interrupt-parent = <&PIC>;
+ fsl,cpm-brg = <1>;
+ fsl,cpm-command = <00800000>;
};
- scc@11a60 {
+ serial@11a60 {
device_type = "serial";
- compatible = "cpm_uart";
- model = "SCC";
- device-id = <4>;
+ compatible = "fsl,mpc8272-scc-uart",
+ "fsl,cpm2-scc-uart",
+ "fsl,cpm2-uart",
+ "fsl,cpm-scc-uart",
+ "fsl,cpm-uart";
reg = <11a60 20 8300 100>;
- current-speed = <1c200>;
- interrupts = <2b 2>;
- interrupt-parent = <&Cpm_pic>;
- clock-setup = <1b ffffff00>;
- rx-clock = <4>;
- tx-clock = <4>;
+ interrupts = <2b 8>;
+ interrupt-parent = <&PIC>;
+ fsl,cpm-brg = <4>;
+ fsl,cpm-command = <0ce00000>;
+ };
+
+ mdio@10d40 {
+ device_type = "mdio";
+ compatible = "fsl,mpc8272ads-mdio-bitbang",
+ "fsl,mpc8272-mdio-bitbang",
+ "fsl,cpm2-mdio-bitbang";
+ reg = <10d40 14>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ fsl,mdio-pin = <12>;
+ fsl,mdc-pin = <13>;
+
+ PHY0: ethernet-phy@0 {
+ interrupt-parent = <&PIC>;
+ interrupts = <17 8>;
+ reg = <0>;
+ device_type = "ethernet-phy";
+ };
+
+ PHY1: ethernet-phy@1 {
+ interrupt-parent = <&PIC>;
+ interrupts = <17 8>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@24000 {
+ device_type = "network";
+ compatible = "fsl,mpc8272-fcc-enet",
+ "fsl,cpm2-fcc-enet",
+ "fsl,cpm2-enet",
+ "fsl,cpm-fcc-enet",
+ "fsl,cpm-enet";
+ reg = <11300 20 8400 100 11380 30>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <20 8>;
+ interrupt-parent = <&PIC>;
+ phy-handle = <&PHY0>;
+ linux,network-index = <0>;
+ fsl,cpm-command = <12000300>;
+ };
+
+ ethernet@25000 {
+ device_type = "network";
+ compatible = "fsl,mpc8272-fcc-enet",
+ "fsl,cpm2-fcc-enet",
+ "fsl,cpm2-enet",
+ "fsl,cpm-fcc-enet",
+ "fsl,cpm-enet";
+ reg = <11320 20 8500 100 113b0 30>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <21 8>;
+ interrupt-parent = <&PIC>;
+ phy-handle = <&PHY1>;
+ linux,network-index = <1>;
+ fsl,cpm-command = <16200300>;
};
};
- cpm_pic:interrupt-controller@10c00 {
- #address-cells = <0>;
+ PIC: interrupt-controller@10c00 {
#interrupt-cells = <2>;
interrupt-controller;
reg = <10c00 80>;
- built-in;
- compatible = "fsl,pq2-pic";
+ compatible = "fsl,mpc8272-pic", "fsl,pq2-pic";
};
- pci@0500 {
+ pci@10800 {
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- compatible = "8272";
+ compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
device_type = "pci";
- reg = <10430 4dc>;
- clock-frequency = <3f940aa>;
+ reg = <10800 10c 101ac 8 101c4 8>;
+ clock-frequency = <d#66666666>;
interrupt-map-mask = <f800 0 0 7>;
interrupt-map = <
/* IDSEL 0x16 */
- b000 0 0 1 f8200000 40 8
- b000 0 0 2 f8200000 41 8
- b000 0 0 3 f8200000 42 8
- b000 0 0 4 f8200000 43 8
+ b000 0 0 1 &PCI_PIC 0
+ b000 0 0 2 &PCI_PIC 1
+ b000 0 0 3 &PCI_PIC 2
+ b000 0 0 4 &PCI_PIC 3
/* IDSEL 0x17 */
- b800 0 0 1 f8200000 43 8
- b800 0 0 2 f8200000 40 8
- b800 0 0 3 f8200000 41 8
- b800 0 0 4 f8200000 42 8
+ b800 0 0 1 &PCI_PIC 4
+ b800 0 0 2 &PCI_PIC 5
+ b800 0 0 3 &PCI_PIC 6
+ b800 0 0 4 &PCI_PIC 7
/* IDSEL 0x18 */
- c000 0 0 1 f8200000 42 8
- c000 0 0 2 f8200000 43 8
- c000 0 0 3 f8200000 40 8
- c000 0 0 4 f8200000 41 8>;
- interrupt-parent = <&Cpm_pic>;
- interrupts = <14 8>;
- bus-range = <0 0>;
- ranges = <02000000 0 80000000 80000000 0 40000000
+ c000 0 0 1 &PCI_PIC 8
+ c000 0 0 2 &PCI_PIC 9
+ c000 0 0 3 &PCI_PIC a
+ c000 0 0 4 &PCI_PIC b>;
+
+ interrupt-parent = <&PIC>;
+ interrupts = <12 8>;
+ ranges = <42000000 0 80000000 80000000 0 20000000
+ 02000000 0 a0000000 a0000000 0 20000000
01000000 0 00000000 f6000000 0 02000000>;
};
@@ -202,10 +236,13 @@
crypto@30000 {
device_type = "crypto";
model = "SEC2";
- compatible = "talitos";
+ compatible = "fsl,mpc8272-talitos-sec2",
+ "fsl,talitos-sec2",
+ "fsl,talitos",
+ "talitos";
reg = <30000 10000>;
- interrupts = <b 2>;
- interrupt-parent = <&Cpm_pic>;
+ interrupts = <b 8>;
+ interrupt-parent = <&PIC>;
num-channels = <4>;
channel-fifo-len = <18>;
exec-units-mask = <0000007e>;
@@ -213,4 +250,8 @@
descriptor-types-mask = <01010ebf>;
};
};
+
+ chosen {
+ linux,stdout-path = "/soc/cpm/serial@11a00";
+ };
};
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 847a095..9a52257 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -237,10 +237,16 @@
#interrupt-cells = <2>;
compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "fsl,cpm";
ranges = <0 0 c0000>;
- reg = <80000 40000>;
- command-proc = <919c0>;
+ reg = <919c0 30 80000 4000>;
fsl,brg-frequency = <d#165000000>;
+ brg@919f0 {
+ compatible = "fsl,mpc8560-brg",
+ "fsl,cpm2-brg",
+ "fsl,cpm-brg";
+ reg = <119f0 10 115f0 10>;
+ };
+
cpmpic: pic@90c00 {
interrupt-controller;
#address-cells = <0>;
@@ -252,39 +258,41 @@
compatible = "fsl,pq2-pic";
};
- scc@91a00 {
+ serial@91a00 {
device_type = "serial";
- compatible = "cpm_uart";
- model = "SCC";
- device-id = <1>;
+ compatible = "fsl,mpc8560-scc-uart",
+ "fsl,cpm2-scc-uart",
+ "fsl,cpm2-uart",
+ "fsl,cpm-scc-uart",
+ "fsl,cpm-uart";
reg = <91a00 20 88000 100>;
- clock-setup = <00ffffff 0>;
- rx-clock = <1>;
- tx-clock = <1>;
- current-speed = <1c200>;
interrupts = <28 8>;
interrupt-parent = <&cpmpic>;
+ fsl,cpm-brg = <1>;
+ fsl,cpm-command = <00800000>;
};
- scc@91a20 {
+ serial@91a20 {
device_type = "serial";
- compatible = "cpm_uart";
- model = "SCC";
- device-id = <2>;
+ compatible = "fsl,mpc8560-scc-uart",
+ "fsl,cpm2-scc-uart",
+ "fsl,cpm2-uart",
+ "fsl,cpm-scc-uart",
+ "fsl,cpm-uart";
reg = <91a20 20 88100 100>;
- clock-setup = <ff00ffff 90000>;
- rx-clock = <2>;
- tx-clock = <2>;
- current-speed = <1c200>;
interrupts = <29 8>;
interrupt-parent = <&cpmpic>;
+ fsl,cpm-brg = <2>;
+ fsl,cpm-command = <04a00000>;
};
- fcc@91320 {
+ ethernet@91320 {
device_type = "network";
- compatible = "fs_enet";
- model = "FCC";
- device-id = <2>;
+ compatible = "fsl,mpc8560-fcc-enet",
+ "fsl,cpm2-fcc-enet",
+ "fsl,cpm2-enet",
+ "fsl,cpm-fcc-enet",
+ "fsl,cpm-enet";
reg = <91320 20 88500 100 913a0 30>;
/*
* mac-address is deprecated and will be removed
@@ -293,19 +301,19 @@
*/
mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
- clock-setup = <ff00ffff 250000>;
- rx-clock = <15>;
- tx-clock = <16>;
interrupts = <21 8>;
interrupt-parent = <&cpmpic>;
phy-handle = <&phy2>;
+ fsl,cpm-command = <16200300>;
};
- fcc@91340 {
+ ethernet@91340 {
device_type = "network";
- compatible = "fs_enet";
- model = "FCC";
- device-id = <3>;
+ compatible = "fsl,mpc8560-fcc-enet",
+ "fsl,cpm2-fcc-enet",
+ "fsl,cpm2-enet",
+ "fsl,cpm-fcc-enet",
+ "fsl,cpm-enet";
reg = <91340 20 88600 100 913d0 30>;
/*
* mac-address is deprecated and will be removed
@@ -314,12 +322,10 @@
*/
mac-address = [ 00 00 00 00 00 00 ];
local-mac-address = [ 00 00 00 00 00 00 ];
- clock-setup = <ffff00ff 3700>;
- rx-clock = <17>;
- tx-clock = <18>;
interrupts = <22 8>;
interrupt-parent = <&cpmpic>;
phy-handle = <&phy3>;
+ fsl,cpm-command = <1a400300>;
};
};
};
--
1.5.0.3
^ permalink raw reply related
* [PATCH 39/61] mpc885ads: Whitespace cleanup (space->tab)
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/platforms/8xx/m8xx_setup.c | 72 +++++++++++++++---------------
1 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
index f169355..601b389 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -89,24 +89,24 @@ init_internal_rtc(void)
static int __init get_freq(char *name, unsigned long *val)
{
- struct device_node *cpu;
- const unsigned int *fp;
- int found = 0;
+ struct device_node *cpu;
+ const unsigned int *fp;
+ int found = 0;
- /* The cpu node should have timebase and clock frequency properties */
- cpu = of_find_node_by_type(NULL, "cpu");
+ /* The cpu node should have timebase and clock frequency properties */
+ cpu = of_find_node_by_type(NULL, "cpu");
- if (cpu) {
- fp = of_get_property(cpu, name, NULL);
- if (fp) {
- found = 1;
- *val = *fp;
- }
+ if (cpu) {
+ fp = of_get_property(cpu, name, NULL);
+ if (fp) {
+ found = 1;
+ *val = *fp;
+ }
- of_node_put(cpu);
- }
+ of_node_put(cpu);
+ }
- return found;
+ return found;
}
/* The decrementer counts at the system (internal) clock frequency divided by
@@ -122,7 +122,7 @@ void __init mpc8xx_calibrate_decr(void)
sit8xx_t *sys_tmr2;
int irq, virq;
- clk_r1 = (cark8xx_t *) immr_map(im_clkrstk);
+ clk_r1 = (cark8xx_t *) immr_map(im_clkrstk);
/* Unlock the SCCR. */
out_be32(&clk_r1->cark_sccrk, ~KAPWR_KEY);
@@ -130,24 +130,24 @@ void __init mpc8xx_calibrate_decr(void)
immr_unmap(clk_r1);
/* Force all 8xx processors to use divide by 16 processor clock. */
- clk_r2 = (car8xx_t *) immr_map(im_clkrst);
+ clk_r2 = (car8xx_t *) immr_map(im_clkrst);
setbits32(&clk_r2->car_sccr, 0x02000000);
immr_unmap(clk_r2);
/* Processor frequency is MHz.
*/
- ppc_tb_freq = 50000000;
- if (!get_freq("bus-frequency", &ppc_tb_freq)) {
- printk(KERN_ERR "WARNING: Estimating decrementer frequency "
- "(not found)\n");
- }
- ppc_tb_freq /= 16;
- ppc_proc_freq = 50000000;
- if (!get_freq("clock-frequency", &ppc_proc_freq))
- printk(KERN_ERR "WARNING: Estimating processor frequency"
- "(not found)\n");
-
- printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq);
+ ppc_tb_freq = 50000000;
+ if (!get_freq("bus-frequency", &ppc_tb_freq)) {
+ printk(KERN_ERR "WARNING: Estimating decrementer frequency "
+ "(not found)\n");
+ }
+ ppc_tb_freq /= 16;
+ ppc_proc_freq = 50000000;
+ if (!get_freq("clock-frequency", &ppc_proc_freq))
+ printk(KERN_ERR "WARNING: Estimating processor frequency"
+ "(not found)\n");
+
+ printk("Decrementer Frequency = 0x%lx\n", ppc_tb_freq);
/* Perform some more timer/timebase initialization. This used
* to be done elsewhere, but other changes caused it to get
@@ -164,7 +164,7 @@ void __init mpc8xx_calibrate_decr(void)
* we guarantee the registers are locked, then we unlock them
* for our use.
*/
- sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
+ sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
out_be32(&sys_tmr1->sitk_tbscrk, ~KAPWR_KEY);
out_be32(&sys_tmr1->sitk_rtcsck, ~KAPWR_KEY);
out_be32(&sys_tmr1->sitk_tbk, ~KAPWR_KEY);
@@ -180,8 +180,8 @@ void __init mpc8xx_calibrate_decr(void)
* we have to enable the timebase). The decrementer interrupt
* is wired into the vector table, nothing to do here for that.
*/
- cpu = of_find_node_by_type(NULL, "cpu");
- virq= irq_of_parse_and_map(cpu, 0);
+ cpu = of_find_node_by_type(NULL, "cpu");
+ virq= irq_of_parse_and_map(cpu, 0);
irq = irq_map[virq].hwirq;
sys_tmr2 = (sit8xx_t *) immr_map(im_sit);
@@ -211,10 +211,10 @@ int mpc8xx_set_rtc_time(struct rtc_time *tm)
sit8xx_t *sys_tmr2;
int time;
- sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
+ sys_tmr1 = (sitk8xx_t *) immr_map(im_sitk);
sys_tmr2 = (sit8xx_t *) immr_map(im_sit);
time = mktime(tm->tm_year+1900, tm->tm_mon+1, tm->tm_mday,
- tm->tm_hour, tm->tm_min, tm->tm_sec);
+ tm->tm_hour, tm->tm_min, tm->tm_sec);
out_be32(&sys_tmr1->sitk_rtck, KAPWR_KEY);
out_be32(&sys_tmr2->sit_rtc, time);
@@ -233,8 +233,8 @@ void mpc8xx_get_rtc_time(struct rtc_time *tm)
/* Get time from the RTC. */
data = in_be32(&sys_tmr->sit_rtc);
to_tm(data, tm);
- tm->tm_year -= 1900;
- tm->tm_mon -= 1;
+ tm->tm_year -= 1900;
+ tm->tm_mon -= 1;
immr_unmap(sys_tmr);
return;
}
@@ -298,7 +298,7 @@ void __init m8xx_pic_init(void)
int irq;
if (mpc8xx_pic_init()) {
- printk(KERN_ERR "Failed interrupt 8xx controller initialization\n");
+ printk(KERN_ERR "Failed interrupt 8xx controller initialization\n");
return;
}
--
1.5.0.3
^ permalink raw reply related
* [PATCH 40/61] 8xx: Whitespace cleanup in commproc.c
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/commproc.c | 20 ++++++++++----------
1 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index 4f67b89..e8e79f8 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -45,10 +45,10 @@
#define CPM_MAP_SIZE (0x4000)
static void m8xx_cpm_dpinit(void);
-static uint host_buffer; /* One page of host buffer */
-static uint host_end; /* end + 1 */
-cpm8xx_t *cpmp; /* Pointer to comm processor space */
-cpic8xx_t *cpic_reg;
+static uint host_buffer; /* One page of host buffer */
+static uint host_end; /* end + 1 */
+cpm8xx_t *cpmp; /* Pointer to comm processor space */
+cpic8xx_t *cpic_reg;
static struct device_node *cpm_pic_node;
static struct irq_host *cpm_pic_host;
@@ -115,7 +115,7 @@ static int cpm_pic_host_map(struct irq_host *h, unsigned int virq,
* and return. This is a no-op function so we don't need any special
* tests in the interrupt handler.
*/
-static irqreturn_t cpm_error_interrupt(int irq, void *dev)
+static irqreturn_t cpm_error_interrupt(int irq, void *dev)
{
return IRQ_HANDLED;
}
@@ -181,7 +181,7 @@ unsigned int cpm_pic_init(void)
printk(KERN_ERR "CPM PIC init: can not find cpm node\n");
goto end;
}
- eirq= irq_of_parse_and_map(np, 0);
+ eirq = irq_of_parse_and_map(np, 0);
if (eirq == NO_IRQ)
goto end;
@@ -197,15 +197,15 @@ end:
void cpm_reset(void)
{
- cpm8xx_t *commproc;
- sysconf8xx_t *siu_conf;
+ cpm8xx_t *commproc;
+ sysconf8xx_t *siu_conf;
commproc = (cpm8xx_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
#ifdef CONFIG_UCODE_PATCH
/* Perform a reset.
*/
- out_be16(&commproc->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
+ out_be16(&commproc->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
/* Wait for it.
*/
@@ -307,7 +307,7 @@ static rh_block_t cpm_boot_dpmem_rh_block[16];
static rh_info_t cpm_dpmem_info;
#define CPM_DPMEM_ALIGNMENT 8
-static u8* dpram_vbase;
+static u8 *dpram_vbase;
static uint dpram_pbase;
void m8xx_cpm_dpinit(void)
--
1.5.0.3
^ permalink raw reply related
* [PATCH 41/61] 8xx: Keep a global mpc8xx_immr mapping.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/commproc.c | 20 +++++++++++---------
include/asm-powerpc/fs_pd.h | 21 +++++----------------
2 files changed, 16 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index e8e79f8..f73e96d 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -48,6 +48,7 @@ static void m8xx_cpm_dpinit(void);
static uint host_buffer; /* One page of host buffer */
static uint host_end; /* end + 1 */
cpm8xx_t *cpmp; /* Pointer to comm processor space */
+immap_t *mpc8xx_immr;
cpic8xx_t *cpic_reg;
static struct device_node *cpm_pic_node;
@@ -197,21 +198,26 @@ end:
void cpm_reset(void)
{
- cpm8xx_t *commproc;
sysconf8xx_t *siu_conf;
- commproc = (cpm8xx_t *)ioremap(CPM_MAP_ADDR, CPM_MAP_SIZE);
+ mpc8xx_immr = ioremap(get_immrbase(), 0x4000);
+ if (!mpc8xx_immr) {
+ printk(KERN_CRIT "Could not map IMMR\n");
+ return;
+ }
+
+ cpmp = &mpc8xx_immr->im_cpm;
#ifdef CONFIG_UCODE_PATCH
/* Perform a reset.
*/
- out_be16(&commproc->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
+ out_be16(&cpmp->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
/* Wait for it.
*/
- while (in_be16(&commproc->cp_cpcr) & CPM_CR_FLG);
+ while (in_be16(&cpmp->cp_cpcr) & CPM_CR_FLG);
- cpm_load_patch(commproc);
+ cpm_load_patch(cpmp);
#endif
/* Set SDMA Bus Request priority 5.
@@ -226,10 +232,6 @@ void cpm_reset(void)
/* Reclaim the DP memory for our use. */
m8xx_cpm_dpinit();
-
- /* Tell everyone where the comm processor resides.
- */
- cpmp = commproc;
}
/* We used to do this earlier, but have to postpone as long as possible
diff --git a/include/asm-powerpc/fs_pd.h b/include/asm-powerpc/fs_pd.h
index 2179a5a..82536a2 100644
--- a/include/asm-powerpc/fs_pd.h
+++ b/include/asm-powerpc/fs_pd.h
@@ -32,22 +32,11 @@
#include <asm/8xx_immap.h>
#include <asm/mpc8xx.h>
-#define immr_map(member) \
-({ \
- u32 offset = offsetof(immap_t, member); \
- void *addr = ioremap (IMAP_ADDR + offset, \
- sizeof( ((immap_t*)0)->member)); \
- addr; \
-})
-
-#define immr_map_size(member, size) \
-({ \
- u32 offset = offsetof(immap_t, member); \
- void *addr = ioremap (IMAP_ADDR + offset, size); \
- addr; \
-})
-
-#define immr_unmap(addr) iounmap(addr)
+extern immap_t *mpc8xx_immr;
+
+#define immr_map(member) (&mpc8xx_immr->member)
+#define immr_map_size(member, size) (&mpc8xx_immr->member)
+#define immr_unmap(addr) iounmap(addr)
#endif
static inline int uart_baudrate(void)
--
1.5.0.3
^ permalink raw reply related
* [PATCH 42/61] 8xx: commproc.c: Use better OF names.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/dts/mpc866ads.dts | 3 +--
arch/powerpc/boot/dts/mpc885ads.dts | 3 +--
arch/powerpc/sysdev/commproc.c | 6 +++---
3 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index b3dbfe8..1807086 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -103,8 +103,7 @@
interrupt-parent = <&Mpc8xx_pic>;
reg = <930 20>;
built-in;
- device_type = "cpm-pic";
- compatible = "CPM";
+ compatible = "fsl,mpc866-cpm-pic", "fsl,cpm1-pic";
};
smc@a80 {
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index 8372469..48717ed 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -134,8 +134,7 @@
interrupt-parent = <&Mpc8xx_pic>;
reg = <930 20>;
built-in;
- device_type = "cpm-pic";
- compatible = "CPM";
+ compatible = "fsl,mpc885-cpm-pic", "fsl,cpm1-pic";
};
smc@a80 {
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index f73e96d..b0a58fd 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -141,9 +141,9 @@ unsigned int cpm_pic_init(void)
pr_debug("cpm_pic_init\n");
- np = of_find_compatible_node(NULL, "cpm-pic", "CPM");
+ np = of_find_compatible_node(NULL, NULL, "fsl,cpm1-pic");
if (np == NULL) {
- printk(KERN_ERR "CPM PIC init: can not find cpm-pic node\n");
+ printk(KERN_ERR "CPM PIC init: can not find fsl,cpm1-pic node\n");
return sirq;
}
ret = of_address_to_resource(np, 0, &res);
@@ -177,7 +177,7 @@ unsigned int cpm_pic_init(void)
of_node_put(np);
/* Install our own error handler. */
- np = of_find_node_by_type(NULL, "cpm");
+ np = of_find_compatible_node(NULL, NULL, "fsl,cpm1");
if (np == NULL) {
printk(KERN_ERR "CPM PIC init: can not find cpm node\n");
goto end;
--
1.5.0.3
^ permalink raw reply related
* [PATCH 43/61] 8xx: Always reset CPM if not using early console.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Some CPM devices conflict with each other, and the bootloader
may have initialized a conflicting device.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/commproc.c | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index b0a58fd..eb791ea 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -208,7 +208,7 @@ void cpm_reset(void)
cpmp = &mpc8xx_immr->im_cpm;
-#ifdef CONFIG_UCODE_PATCH
+#ifndef CONFIG_PPC_EARLY_DEBUG
/* Perform a reset.
*/
out_be16(&cpmp->cp_cpcr, CPM_CR_RST | CPM_CR_FLG);
@@ -216,7 +216,9 @@ void cpm_reset(void)
/* Wait for it.
*/
while (in_be16(&cpmp->cp_cpcr) & CPM_CR_FLG);
+#endif
+#ifdef CONFIG_UCODE_PATCH
cpm_load_patch(cpmp);
#endif
--
1.5.0.3
^ permalink raw reply related
* [PATCH 44/61] 8xx: Miscellaneous commproc.c cleanup.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/commproc.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index eb791ea..699bbd2 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -228,7 +228,7 @@ void cpm_reset(void)
* manual recommends it.
* Bit 25, FAM can also be set to use FEC aggressive mode (860T).
*/
- siu_conf = (sysconf8xx_t*)immr_map(im_siu_conf);
+ siu_conf = immr_map(im_siu_conf);
out_be32(&siu_conf->sc_sdcr, 1);
immr_unmap(siu_conf);
@@ -312,14 +312,14 @@ static rh_info_t cpm_dpmem_info;
#define CPM_DPMEM_ALIGNMENT 8
static u8 *dpram_vbase;
-static uint dpram_pbase;
+static unsigned long dpram_pbase;
void m8xx_cpm_dpinit(void)
{
spin_lock_init(&cpm_dpmem_lock);
- dpram_vbase = immr_map_size(im_cpm.cp_dpmem, CPM_DATAONLY_BASE + CPM_DATAONLY_SIZE);
- dpram_pbase = (uint)&((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem;
+ dpram_vbase = cpmp->cp_dpmem;
+ dpram_pbase = get_immrbase() + offsetof(immap_t, im_cpm.cp_dpmem);
/* Initialize the info header */
rh_init(&cpm_dpmem_info, CPM_DPMEM_ALIGNMENT,
--
1.5.0.3
^ permalink raw reply related
* [PATCH 45/61] 8xx: Add pin and clock setting functions.
From: Scott Wood @ 2007-07-18 1:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
These let board code set up pins and clocks without having to
put magic numbers directly into the registers.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/sysdev/commproc.c | 196 ++++++++++++++++++++++++++++++++++++++++
include/asm-ppc/commproc.h | 40 ++++++++
2 files changed, 236 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index 699bbd2..cf27a09 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -400,3 +400,199 @@ uint cpm_dpram_phys(u8* addr)
return (dpram_pbase + (uint)(addr - dpram_vbase));
}
EXPORT_SYMBOL(cpm_dpram_addr);
+
+struct cpm_ioport16 {
+ u16 dir, par, sor, dat, intr;
+ u16 res[3];
+};
+
+struct cpm_ioport32 {
+ u32 dir, par, sor;
+};
+
+void cpm1_set_pin32(int port, int pin, int flags)
+{
+ struct cpm_ioport32 __iomem *iop;
+ pin = 1 << (31 - pin);
+
+ if (port == 1)
+ iop = (struct cpm_ioport32 __iomem *)
+ &mpc8xx_immr->im_cpm.cp_pbdir;
+ else
+ iop = (struct cpm_ioport32 __iomem *)
+ &mpc8xx_immr->im_cpm.cp_pedir;
+
+ if (flags & CPM_PIN_OUTPUT)
+ setbits32(&iop->dir, pin);
+ else
+ clrbits32(&iop->dir, pin);
+
+ if (!(flags & CPM_PIN_GPIO))
+ setbits32(&iop->par, pin);
+ else
+ clrbits32(&iop->par, pin);
+
+ if (port == 4) {
+ if (flags & CPM_PIN_SECONDARY)
+ setbits32(&iop->sor, pin);
+ else
+ clrbits32(&iop->sor, pin);
+ }
+}
+
+void cpm1_set_pin16(int port, int pin, int flags)
+{
+ struct cpm_ioport16 __iomem *iop =
+ (struct cpm_ioport16 __iomem *)&mpc8xx_immr->im_ioport;
+
+ pin = 1 << (15 - pin);
+
+ if (port != 0)
+ iop += port - 1;
+
+ if (flags & CPM_PIN_OUTPUT)
+ setbits16(&iop->dir, pin);
+ else
+ clrbits16(&iop->dir, pin);
+
+ if (!(flags & CPM_PIN_GPIO))
+ setbits16(&iop->par, pin);
+ else
+ clrbits16(&iop->par, pin);
+
+ if (port == 2) {
+ if (flags & CPM_PIN_SECONDARY)
+ setbits16(&iop->sor, pin);
+ else
+ clrbits16(&iop->sor, pin);
+ }
+}
+
+void cpm1_set_pin(int port, int pin, int flags)
+{
+ if (port == 1 || port == 4)
+ cpm1_set_pin32(port, pin, flags);
+ else
+ cpm1_set_pin16(port, pin, flags);
+}
+
+int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
+{
+ int shift;
+ int i, bits = 0;
+ u32 *reg;
+ u32 mask = 7;
+
+ u8 clk_map[][3] = {
+ {CPM_CLK_SCC1, CPM_BRG1, 0},
+ {CPM_CLK_SCC1, CPM_BRG2, 1},
+ {CPM_CLK_SCC1, CPM_BRG3, 2},
+ {CPM_CLK_SCC1, CPM_BRG4, 3},
+ {CPM_CLK_SCC1, CPM_CLK1, 4},
+ {CPM_CLK_SCC1, CPM_CLK2, 5},
+ {CPM_CLK_SCC1, CPM_CLK3, 6},
+ {CPM_CLK_SCC1, CPM_CLK4, 7},
+
+ {CPM_CLK_SCC2, CPM_BRG1, 0},
+ {CPM_CLK_SCC2, CPM_BRG2, 1},
+ {CPM_CLK_SCC2, CPM_BRG3, 2},
+ {CPM_CLK_SCC2, CPM_BRG4, 3},
+ {CPM_CLK_SCC2, CPM_CLK1, 4},
+ {CPM_CLK_SCC2, CPM_CLK2, 5},
+ {CPM_CLK_SCC2, CPM_CLK3, 6},
+ {CPM_CLK_SCC2, CPM_CLK4, 7},
+
+ {CPM_CLK_SCC3, CPM_BRG1, 0},
+ {CPM_CLK_SCC3, CPM_BRG2, 1},
+ {CPM_CLK_SCC3, CPM_BRG3, 2},
+ {CPM_CLK_SCC3, CPM_BRG4, 3},
+ {CPM_CLK_SCC3, CPM_CLK5, 4},
+ {CPM_CLK_SCC3, CPM_CLK6, 5},
+ {CPM_CLK_SCC3, CPM_CLK7, 6},
+ {CPM_CLK_SCC3, CPM_CLK8, 7},
+
+ {CPM_CLK_SCC4, CPM_BRG1, 0},
+ {CPM_CLK_SCC4, CPM_BRG2, 1},
+ {CPM_CLK_SCC4, CPM_BRG3, 2},
+ {CPM_CLK_SCC4, CPM_BRG4, 3},
+ {CPM_CLK_SCC4, CPM_CLK5, 4},
+ {CPM_CLK_SCC4, CPM_CLK6, 5},
+ {CPM_CLK_SCC4, CPM_CLK7, 6},
+ {CPM_CLK_SCC4, CPM_CLK8, 7},
+
+ {CPM_CLK_SMC1, CPM_BRG1, 0},
+ {CPM_CLK_SMC1, CPM_BRG2, 1},
+ {CPM_CLK_SMC1, CPM_BRG3, 2},
+ {CPM_CLK_SMC1, CPM_BRG4, 3},
+ {CPM_CLK_SMC1, CPM_CLK1, 4},
+ {CPM_CLK_SMC1, CPM_CLK2, 5},
+ {CPM_CLK_SMC1, CPM_CLK3, 6},
+ {CPM_CLK_SMC1, CPM_CLK4, 7},
+
+ {CPM_CLK_SMC2, CPM_BRG1, 0},
+ {CPM_CLK_SMC2, CPM_BRG2, 1},
+ {CPM_CLK_SMC2, CPM_BRG3, 2},
+ {CPM_CLK_SMC2, CPM_BRG4, 3},
+ {CPM_CLK_SMC2, CPM_CLK5, 4},
+ {CPM_CLK_SMC2, CPM_CLK6, 5},
+ {CPM_CLK_SMC2, CPM_CLK7, 6},
+ {CPM_CLK_SMC2, CPM_CLK8, 7},
+ };
+
+ switch (target) {
+ case CPM_CLK_SCC1:
+ reg = &mpc8xx_immr->im_cpm.cp_sicr;
+ shift = 0;
+ break;
+
+ case CPM_CLK_SCC2:
+ reg = &mpc8xx_immr->im_cpm.cp_sicr;
+ shift = 8;
+ break;
+
+ case CPM_CLK_SCC3:
+ reg = &mpc8xx_immr->im_cpm.cp_sicr;
+ shift = 16;
+ break;
+
+ case CPM_CLK_SCC4:
+ reg = &mpc8xx_immr->im_cpm.cp_sicr;
+ shift = 24;
+ break;
+
+ case CPM_CLK_SMC1:
+ reg = &mpc8xx_immr->im_cpm.cp_simode;
+ shift = 12;
+ break;
+
+ case CPM_CLK_SMC2:
+ reg = &mpc8xx_immr->im_cpm.cp_simode;
+ shift = 28;
+ break;
+
+ default:
+ printk(KERN_ERR "cpm1_clock_setup: invalid clock target\n");
+ return -EINVAL;
+ }
+
+ if (reg == &mpc8xx_immr->im_cpm.cp_sicr && mode == CPM_CLK_RX)
+ shift += 3;
+
+ for (i = 0; i < ARRAY_SIZE(clk_map); i++) {
+ if (clk_map[i][0] == target && clk_map[i][1] == clock) {
+ bits = clk_map[i][2];
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(clk_map)) {
+ printk(KERN_ERR "cpm1_clock_setup: invalid clock combination\n");
+ return -EINVAL;
+ }
+
+ bits <<= shift;
+ mask <<= shift;
+ out_be32(reg, (in_be32(reg) & ~mask) | bits);
+
+ return 0;
+}
diff --git a/include/asm-ppc/commproc.h b/include/asm-ppc/commproc.h
index 3972487..6d388bd 100644
--- a/include/asm-ppc/commproc.h
+++ b/include/asm-ppc/commproc.h
@@ -689,4 +689,44 @@ typedef struct risc_timer_pram {
extern void cpm_install_handler(int vec, void (*handler)(void *), void *dev_id);
extern void cpm_free_handler(int vec);
+#define CPM_PIN_INPUT 0
+#define CPM_PIN_OUTPUT 1
+#define CPM_PIN_PRIMARY 0
+#define CPM_PIN_SECONDARY 2
+#define CPM_PIN_GPIO 4
+
+void cpm1_set_pin(int port, int pin, int flags);
+
+enum cpm_clk_dir {
+ CPM_CLK_RX,
+ CPM_CLK_TX,
+ CPM_CLK_RTX
+};
+
+enum cpm_clk_target {
+ CPM_CLK_SCC1,
+ CPM_CLK_SCC2,
+ CPM_CLK_SCC3,
+ CPM_CLK_SCC4,
+ CPM_CLK_SMC1,
+ CPM_CLK_SMC2,
+};
+
+enum cpm_clk {
+ CPM_BRG1, /* Baud Rate Generator 1 */
+ CPM_BRG2, /* Baud Rate Generator 2 */
+ CPM_BRG3, /* Baud Rate Generator 3 */
+ CPM_BRG4, /* Baud Rate Generator 4 */
+ CPM_CLK1, /* Clock 1 */
+ CPM_CLK2, /* Clock 2 */
+ CPM_CLK3, /* Clock 3 */
+ CPM_CLK4, /* Clock 4 */
+ CPM_CLK5, /* Clock 5 */
+ CPM_CLK6, /* Clock 6 */
+ CPM_CLK7, /* Clock 7 */
+ CPM_CLK8, /* Clock 8 */
+};
+
+int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode);
+
#endif /* __CPM_8XX__ */
--
1.5.0.3
^ permalink raw reply related
* [PATCH 47/61] 8xx: Don't hardcode the vendor in cpuinfo.
From: Scott Wood @ 2007-07-18 1:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
If the vendor output is desired, it should be included in the board name.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/platforms/8xx/m8xx_setup.c | 2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
index 601b389..1113384 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -263,8 +263,6 @@ void mpc8xx_show_cpuinfo(struct seq_file *m)
uint memsize = total_memory;
const char *model = "";
- seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
-
root = of_find_node_by_path("/");
if (root)
model = of_get_property(root, "model", NULL);
--
1.5.0.3
^ permalink raw reply related
* [PATCH 46/61] mpc885ads: Rework initialization.
From: Scott Wood @ 2007-07-18 1:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
It now uses the generic pin/clock functions, among other assorted fixes and
cleanup.
The ioport init and device exclusion callbacks are now gone.
The PCMCIA fsl_soc.c code is now gone, since of_platform_bus_probe() is
now used.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/platforms/8xx/mpc885ads.h | 38 ---
arch/powerpc/platforms/8xx/mpc885ads_setup.c | 448 ++++++++-----------------
arch/powerpc/sysdev/fsl_soc.c | 25 --
3 files changed, 144 insertions(+), 367 deletions(-)
diff --git a/arch/powerpc/platforms/8xx/mpc885ads.h b/arch/powerpc/platforms/8xx/mpc885ads.h
index 7c31aec..4df3c19 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads.h
+++ b/arch/powerpc/platforms/8xx/mpc885ads.h
@@ -18,18 +18,6 @@
#include <asm/ppcboot.h>
#include <sysdev/fsl_soc.h>
-/* U-Boot maps BCSR to 0xff080000 */
-#define BCSR_ADDR ((uint)0xff080000)
-#define BCSR_SIZE ((uint)32)
-#define BCSR0 ((uint)(BCSR_ADDR + 0x00))
-#define BCSR1 ((uint)(BCSR_ADDR + 0x04))
-#define BCSR2 ((uint)(BCSR_ADDR + 0x08))
-#define BCSR3 ((uint)(BCSR_ADDR + 0x0c))
-#define BCSR4 ((uint)(BCSR_ADDR + 0x10))
-
-#define CFG_PHYDEV_ADDR ((uint)0xff0a0000)
-#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300))
-
#define IMAP_ADDR (get_immrbase())
#define IMAP_SIZE ((uint)(64 * 1024))
@@ -37,9 +25,6 @@
#define CPM_MAP_ADDR (get_immrbase() + MPC8xx_CPM_OFFSET)
#define CPM_IRQ_OFFSET 16 // for compability with cpm_uart driver
-#define PCMCIA_MEM_ADDR ((uint)0xff020000)
-#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
-
/* Bits of interest in the BCSRs.
*/
#define BCSR1_ETHEN ((uint)0x20000000)
@@ -68,28 +53,5 @@
#define BCSR5_MII1_EN 0x02
#define BCSR5_MII1_RST 0x01
-/* Interrupt level assignments */
-#define PHY_INTERRUPT SIU_IRQ7 /* PHY link change interrupt */
-#define SIU_INT_FEC1 SIU_LEVEL1 /* FEC1 interrupt */
-#define SIU_INT_FEC2 SIU_LEVEL3 /* FEC2 interrupt */
-#define FEC_INTERRUPT SIU_INT_FEC1 /* FEC interrupt */
-
-/* We don't use the 8259 */
-#define NR_8259_INTS 0
-
-/* CPM Ethernet through SCC3 */
-#define PA_ENET_RXD ((ushort)0x0040)
-#define PA_ENET_TXD ((ushort)0x0080)
-#define PE_ENET_TCLK ((uint)0x00004000)
-#define PE_ENET_RCLK ((uint)0x00008000)
-#define PE_ENET_TENA ((uint)0x00000010)
-#define PC_ENET_CLSN ((ushort)0x0400)
-#define PC_ENET_RENA ((ushort)0x0800)
-
-/* Control bits in the SICR to route TCLK (CLK5) and RCLK (CLK6) to
- * SCC3. Also, make sure GR3 (bit 8) and SC3 (bit 9) are zero */
-#define SICR_ENET_MASK ((uint)0x00ff0000)
-#define SICR_ENET_CLKRT ((uint)0x002c0000)
-
#endif /* __ASM_MPC885ADS_H__ */
#endif /* __KERNEL__ */
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index dc27dab..940fe54 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -6,6 +6,9 @@
*
* Copyright 2005 MontaVista Software Inc.
*
+ * Heavily modified by Scott Wood <scottwood@freescale.com>
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
@@ -18,7 +21,6 @@
#include <linux/ioport.h>
#include <linux/device.h>
#include <linux/delay.h>
-#include <linux/root_dev.h>
#include <linux/fs_enet_pd.h>
#include <linux/fs_uart_pd.h>
@@ -37,7 +39,8 @@
#include <asm/8xx_immap.h>
#include <asm/commproc.h>
#include <asm/fs_pd.h>
-#include <asm/prom.h>
+#include <asm/of_platform.h>
+#include <asm/udbg.h>
extern void cpm_reset(void);
extern void mpc8xx_show_cpuinfo(struct seq_file*);
@@ -48,30 +51,20 @@ extern void mpc8xx_get_rtc_time(struct rtc_time *tm);
extern void m8xx_pic_init(void);
extern unsigned int mpc8xx_get_irq(void);
-static void init_smc1_uart_ioports(struct fs_uart_platform_info* fpi);
-static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi);
-static void init_scc3_ioports(struct fs_platform_info* ptr);
+static u32 __iomem *bcsr, *bcsr5;
#ifdef CONFIG_PCMCIA_M8XX
static void pcmcia_hw_setup(int slot, int enable)
{
- unsigned *bcsr_io;
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
if (enable)
- clrbits32(bcsr_io, BCSR1_PCCEN);
+ clrbits32(&bcsr[1], BCSR1_PCCEN);
else
- setbits32(bcsr_io, BCSR1_PCCEN);
-
- iounmap(bcsr_io);
+ setbits32(&bcsr[1], BCSR1_PCCEN);
}
static int pcmcia_set_voltage(int slot, int vcc, int vpp)
{
u32 reg = 0;
- unsigned *bcsr_io;
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
switch(vcc) {
case 0:
@@ -106,346 +99,188 @@ static int pcmcia_set_voltage(int slot, int vcc, int vpp)
}
/* first, turn off all power */
- clrbits32(bcsr_io, 0x00610000);
+ clrbits32(&bcsr[1], 0x00610000);
/* enable new powersettings */
- setbits32(bcsr_io, reg);
+ setbits32(&bcsr[1], reg);
- iounmap(bcsr_io);
return 0;
}
#endif
-void __init mpc885ads_board_setup(void)
-{
- cpm8xx_t *cp;
- unsigned int *bcsr_io;
- u8 tmpval8;
-
-#ifdef CONFIG_FS_ENET
- iop8xx_t *io_port;
-#endif
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
- cp = (cpm8xx_t *)immr_map(im_cpm);
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR\n");
- return;
- }
-#ifdef CONFIG_SERIAL_CPM_SMC1
- clrbits32(bcsr_io, BCSR1_RS232EN_1);
- clrbits32(&cp->cp_simode, 0xe0000000 >> 17); /* brg1 */
- tmpval8 = in_8(&(cp->cp_smc[0].smc_smcm)) | (SMCM_RX | SMCM_TX);
- out_8(&(cp->cp_smc[0].smc_smcm), tmpval8);
- clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN | SMCMR_TEN); /* brg1 */
-#else
- setbits32(bcsr_io,BCSR1_RS232EN_1);
- out_be16(&cp->cp_smc[0].smc_smcmr, 0);
- out_8(&cp->cp_smc[0].smc_smce, 0);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SMC2
- clrbits32(bcsr_io,BCSR1_RS232EN_2);
- clrbits32(&cp->cp_simode, 0xe0000000 >> 1);
- setbits32(&cp->cp_simode, 0x20000000 >> 1); /* brg2 */
- tmpval8 = in_8(&(cp->cp_smc[1].smc_smcm)) | (SMCM_RX | SMCM_TX);
- out_8(&(cp->cp_smc[1].smc_smcm), tmpval8);
- clrbits16(&cp->cp_smc[1].smc_smcmr, SMCMR_REN | SMCMR_TEN);
+struct cpm_pin {
+ int port, pin, flags;
+};
- init_smc2_uart_ioports(0);
-#else
- setbits32(bcsr_io,BCSR1_RS232EN_2);
- out_be16(&cp->cp_smc[1].smc_smcmr, 0);
- out_8(&cp->cp_smc[1].smc_smce, 0);
-#endif
- immr_unmap(cp);
- iounmap(bcsr_io);
-
-#ifdef CONFIG_FS_ENET
- /* use MDC for MII (common) */
- io_port = (iop8xx_t*)immr_map(im_ioport);
- setbits16(&io_port->iop_pdpar, 0x0080);
- clrbits16(&io_port->iop_pddir, 0x0080);
-
- bcsr_io = ioremap(BCSR5, sizeof(unsigned long));
- clrbits32(bcsr_io,BCSR5_MII1_EN);
- clrbits32(bcsr_io,BCSR5_MII1_RST);
-#ifndef CONFIG_FC_ENET_HAS_SCC
- clrbits32(bcsr_io,BCSR5_MII2_EN);
- clrbits32(bcsr_io,BCSR5_MII2_RST);
+static struct cpm_pin mpc885ads_pins[] = {
+ /* SMC1 */
+ {1, 24, CPM_PIN_INPUT}, /* RX */
+ {1, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
+ /* SMC2 */
+#ifndef CONFIG_MPC8xx_SECOND_ETH_FEC2
+ {4, 21, CPM_PIN_INPUT}, /* RX */
+ {4, 20, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
#endif
- iounmap(bcsr_io);
- immr_unmap(io_port);
+ /* SCC3 */
+ {0, 9, CPM_PIN_INPUT}, /* RX */
+ {0, 8, CPM_PIN_INPUT}, /* TX */
+ {2, 4, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* RENA */
+ {2, 5, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_GPIO}, /* CLSN */
+ {4, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TENA */
+ {4, 17, CPM_PIN_INPUT}, /* CLK5 */
+ {4, 16, CPM_PIN_INPUT}, /* CLK6 */
+
+ /* MII1 */
+ {0, 0, CPM_PIN_INPUT},
+ {0, 1, CPM_PIN_INPUT},
+ {0, 2, CPM_PIN_INPUT},
+ {0, 3, CPM_PIN_INPUT},
+ {0, 4, CPM_PIN_OUTPUT},
+ {0, 10, CPM_PIN_OUTPUT},
+ {0, 11, CPM_PIN_OUTPUT},
+ {1, 19, CPM_PIN_INPUT},
+ {1, 31, CPM_PIN_INPUT},
+ {2, 12, CPM_PIN_INPUT},
+ {2, 13, CPM_PIN_INPUT},
+ {4, 30, CPM_PIN_OUTPUT},
+ {4, 31, CPM_PIN_OUTPUT},
+
+ /* MII2 */
+#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2
+ {4, 14, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {4, 15, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {4, 16, CPM_PIN_OUTPUT},
+ {4, 17, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {4, 18, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {4, 19, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {4, 20, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
+ {4, 21, CPM_PIN_OUTPUT},
+ {4, 22, CPM_PIN_OUTPUT},
+ {4, 23, CPM_PIN_OUTPUT},
+ {4, 24, CPM_PIN_OUTPUT},
+ {4, 25, CPM_PIN_OUTPUT},
+ {4, 26, CPM_PIN_OUTPUT},
+ {4, 27, CPM_PIN_OUTPUT},
+ {4, 28, CPM_PIN_OUTPUT},
+ {4, 29, CPM_PIN_OUTPUT},
#endif
+};
-#ifdef CONFIG_PCMCIA_M8XX
- /*Set up board specific hook-ups*/
- m8xx_pcmcia_ops.hw_ctrl = pcmcia_hw_setup;
- m8xx_pcmcia_ops.voltage_set = pcmcia_set_voltage;
-#endif
-}
-
-
-static void init_fec1_ioports(struct fs_platform_info* ptr)
+static void __init init_ioports(void)
{
- cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
- iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport);
-
- /* configure FEC1 pins */
- setbits16(&io_port->iop_papar, 0xf830);
- setbits16(&io_port->iop_padir, 0x0830);
- clrbits16(&io_port->iop_padir, 0xf000);
+ int i;
- setbits32(&cp->cp_pbpar, 0x00001001);
- clrbits32(&cp->cp_pbdir, 0x00001001);
-
- setbits16(&io_port->iop_pcpar, 0x000c);
- clrbits16(&io_port->iop_pcdir, 0x000c);
+ for (i = 0; i < ARRAY_SIZE(mpc885ads_pins); i++) {
+ struct cpm_pin *pin = &mpc885ads_pins[i];
+ cpm1_set_pin(pin->port, pin->pin, pin->flags);
+ }
- setbits32(&cp->cp_pepar, 0x00000003);
- setbits32(&cp->cp_pedir, 0x00000003);
- clrbits32(&cp->cp_peso, 0x00000003);
- clrbits32(&cp->cp_cptr, 0x00000100);
+ cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
+ cpm1_clk_setup(CPM_CLK_SMC2, CPM_BRG2, CPM_CLK_RTX);
+ cpm1_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_TX);
+ cpm1_clk_setup(CPM_CLK_SCC3, CPM_CLK6, CPM_CLK_RX);
- immr_unmap(io_port);
- immr_unmap(cp);
+ /* Set FEC1 and FEC2 to MII mode */
+ clrbits32(&mpc8xx_immr->im_cpm.cp_cptr, 0x00000180);
}
-
-static void init_fec2_ioports(struct fs_platform_info* ptr)
+static void __init mpc885ads_setup_arch(void)
{
- cpm8xx_t *cp = (cpm8xx_t *)immr_map(im_cpm);
- iop8xx_t *io_port = (iop8xx_t *)immr_map(im_ioport);
-
- /* configure FEC2 pins */
- setbits32(&cp->cp_pepar, 0x0003fffc);
- setbits32(&cp->cp_pedir, 0x0003fffc);
- clrbits32(&cp->cp_peso, 0x000087fc);
- setbits32(&cp->cp_peso, 0x00037800);
- clrbits32(&cp->cp_cptr, 0x00000080);
-
- immr_unmap(io_port);
- immr_unmap(cp);
-}
+ struct device_node *np;
-void init_fec_ioports(struct fs_platform_info *fpi)
-{
- int fec_no = fs_get_fec_index(fpi->fs_no);
+ cpm_reset();
+ init_ioports();
- switch (fec_no) {
- case 0:
- init_fec1_ioports(fpi);
- break;
- case 1:
- init_fec2_ioports(fpi);
- break;
- default:
- printk(KERN_ERR "init_fec_ioports: invalid FEC number\n");
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc885ads-bcsr");
+ if (!np) {
+ printk(KERN_CRIT "Could not find fsl,mpc885ads-bcsr node\n");
return;
}
-}
-
-static void init_scc3_ioports(struct fs_platform_info* fpi)
-{
- unsigned *bcsr_io;
- iop8xx_t *io_port;
- cpm8xx_t *cp;
- bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
- io_port = (iop8xx_t *)immr_map(im_ioport);
- cp = (cpm8xx_t *)immr_map(im_cpm);
+ bcsr = of_iomap(np, 0);
+ bcsr5 = of_iomap(np, 1);
+ of_node_put(np);
- if (bcsr_io == NULL) {
+ if (!bcsr || !bcsr5) {
printk(KERN_CRIT "Could not remap BCSR\n");
return;
}
- /* Enable the PHY.
- */
- clrbits32(bcsr_io+4, BCSR4_ETH10_RST);
- udelay(1000);
- setbits32(bcsr_io+4, BCSR4_ETH10_RST);
- /* Configure port A pins for Txd and Rxd.
- */
- setbits16(&io_port->iop_papar, PA_ENET_RXD | PA_ENET_TXD);
- clrbits16(&io_port->iop_padir, PA_ENET_RXD | PA_ENET_TXD);
+ clrbits32(&bcsr[1], BCSR1_RS232EN_1);
+#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2
+ setbits32(&bcsr[1], BCSR1_RS232EN_2);
+#else
+ clrbits32(&bcsr[1], BCSR1_RS232EN_2);
+#endif
- /* Configure port C pins to enable CLSN and RENA.
- */
- clrbits16(&io_port->iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
- clrbits16(&io_port->iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
- setbits16(&io_port->iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
+ clrbits32(bcsr5, BCSR5_MII1_EN);
+ setbits32(bcsr5, BCSR5_MII1_RST);
+ udelay(1000);
+ clrbits32(bcsr5, BCSR5_MII1_RST);
- /* Configure port E for TCLK and RCLK.
- */
- setbits32(&cp->cp_pepar, PE_ENET_TCLK | PE_ENET_RCLK);
- clrbits32(&cp->cp_pepar, PE_ENET_TENA);
- clrbits32(&cp->cp_pedir,
- PE_ENET_TCLK | PE_ENET_RCLK | PE_ENET_TENA);
- clrbits32(&cp->cp_peso, PE_ENET_TCLK | PE_ENET_RCLK);
- setbits32(&cp->cp_peso, PE_ENET_TENA);
-
- /* Configure Serial Interface clock routing.
- * First, clear all SCC bits to zero, then set the ones we want.
- */
- clrbits32(&cp->cp_sicr, SICR_ENET_MASK);
- setbits32(&cp->cp_sicr, SICR_ENET_CLKRT);
+#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2
+ clrbits32(bcsr5, BCSR5_MII2_EN);
+ setbits32(bcsr5, BCSR5_MII2_RST);
+ udelay(1000);
+ clrbits32(bcsr5, BCSR5_MII2_RST);
+#else
+ setbits32(bcsr5, BCSR5_MII2_EN);
+#endif
- /* Disable Rx and Tx. SMC1 sshould be stopped if SCC3 eternet are used.
- */
- clrbits16(&cp->cp_smc[0].smc_smcmr, SMCMR_REN | SMCMR_TEN);
- /* On the MPC885ADS SCC ethernet PHY is initialized in the full duplex mode
- * by H/W setting after reset. SCC ethernet controller support only half duplex.
- * This discrepancy of modes causes a lot of carrier lost errors.
- */
+#ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3
+ clrbits32(&bcsr[4], BCSR4_ETH10_RST);
+ udelay(1000);
+ setbits32(&bcsr[4], BCSR4_ETH10_RST);
- /* In the original SCC enet driver the following code is placed at
- the end of the initialization */
- setbits32(&cp->cp_pepar, PE_ENET_TENA);
- clrbits32(&cp->cp_pedir, PE_ENET_TENA);
- setbits32(&cp->cp_peso, PE_ENET_TENA);
+ setbits32(&bcsr[1], BCSR1_ETHEN);
- setbits32(bcsr_io+4, BCSR1_ETHEN);
- iounmap(bcsr_io);
- immr_unmap(io_port);
- immr_unmap(cp);
-}
+ np = of_find_node_by_path("/soc@ff000000/cpm@9c0/serial@a80");
+#else
+ np = of_find_node_by_path("/soc@ff000000/cpm@9c0/ethernet@a40");
+#endif
-void init_scc_ioports(struct fs_platform_info *fpi)
-{
- int scc_no = fs_get_scc_index(fpi->fs_no);
+ /* The SCC3 enet registers overlap the SMC1 registers, so
+ * one of the two must be removed from the device tree.
+ */
- switch (scc_no) {
- case 2:
- init_scc3_ioports(fpi);
- break;
- default:
- printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
- return;
+ if (np) {
+ of_detach_node(np);
+ of_node_put(np);
}
-}
-
-
-static void init_smc1_uart_ioports(struct fs_uart_platform_info* ptr)
-{
- unsigned *bcsr_io;
- cpm8xx_t *cp;
-
- cp = (cpm8xx_t *)immr_map(im_cpm);
- setbits32(&cp->cp_pepar, 0x000000c0);
- clrbits32(&cp->cp_pedir, 0x000000c0);
- clrbits32(&cp->cp_peso, 0x00000040);
- setbits32(&cp->cp_peso, 0x00000080);
- immr_unmap(cp);
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR1\n");
- return;
- }
- clrbits32(bcsr_io,BCSR1_RS232EN_1);
- iounmap(bcsr_io);
+#ifdef CONFIG_PCMCIA_M8XX
+ /* Set up board specific hook-ups.*/
+ m8xx_pcmcia_ops.hw_ctrl = pcmcia_hw_setup;
+ m8xx_pcmcia_ops.voltage_set = pcmcia_set_voltage;
+#endif
}
-static void init_smc2_uart_ioports(struct fs_uart_platform_info* fpi)
+static int __init mpc885ads_probe(void)
{
- unsigned *bcsr_io;
- cpm8xx_t *cp;
-
- cp = (cpm8xx_t *)immr_map(im_cpm);
- setbits32(&cp->cp_pepar, 0x00000c00);
- clrbits32(&cp->cp_pedir, 0x00000c00);
- clrbits32(&cp->cp_peso, 0x00000400);
- setbits32(&cp->cp_peso, 0x00000800);
- immr_unmap(cp);
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR1\n");
- return;
- }
- clrbits32(bcsr_io,BCSR1_RS232EN_2);
- iounmap(bcsr_io);
+ unsigned long root = of_get_flat_dt_root();
+ return of_flat_dt_is_compatible(root, "fsl,mpc885ads");
}
-void init_smc_ioports(struct fs_uart_platform_info *data)
-{
- int smc_no = fs_uart_id_fsid2smc(data->fs_no);
-
- switch (smc_no) {
- case 0:
- init_smc1_uart_ioports(data);
- data->brg = data->clk_rx;
- break;
- case 1:
- init_smc2_uart_ioports(data);
- data->brg = data->clk_rx;
- break;
- default:
- printk(KERN_ERR "init_scc_ioports: invalid SCC number\n");
- return;
- }
-}
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .name = "soc", },
+ { .name = "cpm", },
+ {},
+};
-int platform_device_skip(const char *model, int id)
+static int __init declare_of_platform_devices(void)
{
-#ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3
- const char *dev = "FEC";
- int n = 2;
-#else
- const char *dev = "SCC";
- int n = 3;
-#endif
-
- if (!strcmp(model, dev) && n == id)
- return 1;
+ /* Publish the QE devices */
+ if (machine_is(mpc885_ads))
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
return 0;
}
-
-static void __init mpc885ads_setup_arch(void)
-{
- struct device_node *cpu;
-
- cpu = of_find_node_by_type(NULL, "cpu");
- if (cpu != 0) {
- const unsigned int *fp;
-
- fp = of_get_property(cpu, "clock-frequency", NULL);
- if (fp != 0)
- loops_per_jiffy = *fp / HZ;
- else
- loops_per_jiffy = 50000000 / HZ;
- of_node_put(cpu);
- }
-
- cpm_reset();
-
- mpc885ads_board_setup();
-
- ROOT_DEV = Root_NFS;
-}
-
-static int __init mpc885ads_probe(void)
-{
- char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
- "model", NULL);
- if (model == NULL)
- return 0;
- if (strcmp(model, "MPC885ADS"))
- return 0;
-
- return 1;
-}
+device_initcall(declare_of_platform_devices);
define_machine(mpc885_ads) {
- .name = "MPC885 ADS",
+ .name = "Freescale MPC885 ADS",
.probe = mpc885ads_probe,
.setup_arch = mpc885ads_setup_arch,
.init_IRQ = m8xx_pic_init,
@@ -455,4 +290,9 @@ define_machine(mpc885_ads) {
.calibrate_decr = mpc8xx_calibrate_decr,
.set_rtc_time = mpc8xx_set_rtc_time,
.get_rtc_time = mpc8xx_get_rtc_time,
+ .progress = udbg_progress,
};
+
+#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
+u32 __iomem *cpm_udbg_txdesc = (u32 __iomem *)0xff002808;
+#endif
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index cee671f..cb4b573 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -37,9 +37,6 @@
#include <mm/mmu_decl.h>
#include <asm/cpm2.h>
-extern void init_fcc_ioports(struct fs_platform_info*);
-extern void init_fec_ioports(struct fs_platform_info*);
-extern void init_smc_ioports(struct fs_uart_platform_info*);
static phys_addr_t immrbase = -1;
phys_addr_t get_immrbase(void)
@@ -843,9 +840,6 @@ arch_initcall(cpm_uart_of_init);
#ifdef CONFIG_8xx
-extern void init_scc_ioports(struct fs_platform_info*);
-extern int platform_device_skip(const char *model, int id);
-
static int __init fs_enet_mdio_of_init(void)
{
struct device_node *np;
@@ -929,9 +923,6 @@ static int __init fs_enet_of_init(void)
id = of_get_property(np, "device-id", NULL);
fs_enet_data.fs_no = *id;
- if (platform_device_skip(model, *id))
- continue;
-
ret = of_address_to_resource(np, 0, &r[0]);
if (ret)
goto err;
@@ -984,7 +975,6 @@ static int __init fs_enet_of_init(void)
snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%x:%02x",
(u32)res.start, fs_enet_data.phy_addr);
fs_enet_data.bus_id = (char*)&bus_id[i];
- fs_enet_data.init_ioports = init_fec_ioports;
}
if (strstr(model, "SCC")) {
ret = of_address_to_resource(np, 1, &r[1]);
@@ -1012,7 +1002,6 @@ static int __init fs_enet_of_init(void)
snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%s", "fixed@10:1");
fs_enet_data.bus_id = (char*)&bus_id[i];
- fs_enet_data.init_ioports = init_scc_ioports;
}
of_node_put(phy);
@@ -1034,20 +1023,6 @@ err:
arch_initcall(fs_enet_of_init);
-static int __init fsl_pcmcia_of_init(void)
-{
- struct device_node *np = NULL;
- /*
- * Register all the devices which type is "pcmcia"
- */
- while ((np = of_find_compatible_node(np,
- "pcmcia", "fsl,pq-pcmcia")) != NULL)
- of_platform_device_create(np, "m8xx-pcmcia", NULL);
- return 0;
-}
-
-arch_initcall(fsl_pcmcia_of_init);
-
static const char *smc_regs = "regs";
static const char *smc_pram = "pram";
--
1.5.0.3
^ permalink raw reply related
* [PATCH 48/61] 8xx: Use better OF names for PIC.
From: Scott Wood @ 2007-07-18 1:36 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070718013137.GA15217@ld0162-tx32.am.freescale.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/dts/mpc866ads.dts | 3 +--
arch/powerpc/boot/dts/mpc885ads.dts | 3 +--
arch/powerpc/sysdev/mpc8xx_pic.c | 5 ++---
3 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index 1807086..9b5bf77 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -79,8 +79,7 @@
#interrupt-cells = <2>;
reg = <0 24>;
built-in;
- device_type = "mpc8xx-pic";
- compatible = "CPM";
+ compatible = "fsl,mpc866-pic", "fsl,pq1-pic";
};
cpm@ff000000 {
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index 48717ed..de81407 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -99,8 +99,7 @@
#interrupt-cells = <2>;
reg = <0 24>;
built-in;
- device_type = "mpc8xx-pic";
- compatible = "CPM";
+ compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
};
pcmcia@0080 {
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index 2fc2bcd..1a9c1b3 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -169,10 +169,9 @@ int mpc8xx_pic_init(void)
struct device_node *np = NULL;
int ret;
- np = of_find_node_by_type(np, "mpc8xx-pic");
-
+ np = of_find_compatible_node(np, NULL, "fsl,pq1-pic");
if (np == NULL) {
- printk(KERN_ERR "Could not find open-pic node\n");
+ printk(KERN_ERR "Could not find fsl,pq1-pic node\n");
return -ENOMEM;
}
--
1.5.0.3
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox