* Embedded linux FTP Server
From: khollan @ 2007-07-31 21:03 UTC (permalink / raw)
To: linuxppc-embedded
Hey
Im looking for a basic ftp server to run on my ML410 Xilinx board, I was
looking on the net and couldn't find anything that stands out. Does anyone
have suggestions, or know of something that works well.
Thanks
kholland
--
View this message in context: http://www.nabble.com/Embedded-linux-FTP-Server-tf4196501.html#a11935088
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* Re: [PATCH 2/2] powerpc: MPC85xx EDAC device driver
From: Dave Jiang @ 2007-07-31 20:49 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev, bluesmoke-devel, norsk5
In-Reply-To: <200707302158.16530.arnd@arndb.de>
Arnd Bergmann wrote:
> On Monday 30 July 2007, Dave Jiang wrote:
>> I don't believe that EDAC core has been loaded at the time of 85xx PCI
>> initialization. Plus, the EDAC driver can be loaded as a kernel module. So that
>> probably won't work....
>
> ok, good point.
>
>> Also, instead of having centralized EDAC chip driver,
>> now you have things scattered over various places. One probably needs to add
>> 83xx and 86xx code as well and whatever else eventually.
>>
>> Maybe we are just better off adding entries in the DTS to get around this
>> problem....
>
> The best solution may be to look at how it's structured at the
> register level. If the PCI EDAC registers are implemented separately
> from the regular PCI registers, a device tree entry would be appropriate.
> If not, your idea of registering a platform_device from fsl_add_bridge
> is probably more sensible.
Actually it seems that for me to grab the interrupt number I have to do the
platform device creation in fsl_soc.c and call arch_init() instead of doing it
from fsl_add_bridge(). fsl_add_bridge() is called way too early and the mpic
interrupt mapping has not been setup yet for me to acquire the interrupt number
from of_interrupt_to_resource() call.
--
------------------------------------------------------
Dave Jiang
Software Engineer
MontaVista Software, Inc.
http://www.mvista.com
------------------------------------------------------
^ permalink raw reply
* [PATCH] PowerPC: Fix num_cpus calculation in smp_call_function_map()
From: Kevin Corry @ 2007-07-31 20:19 UTC (permalink / raw)
To: linuxppc-dev, LKML; +Cc: Carl Love
[POWERPC]: Fix num_cpus calculation in smp_call_function_map().
In smp_call_function_map(), num_cpus is set to the number of online CPUs minus
one. However, if the CPU mask does not include all CPUs (except the one we're
running on), the routine will hang in the first while() loop until the 8 second
timeout occurs.
The num_cpus should be set to the number of CPUs specified in the mask passed
into the routine, after we've made any modifications to the mask. With this
change, we can also get rid of the call to cpus_empty() and avoid adding
another pass through the bitmask.
Signed-off-by: Kevin Corry <kevcorry@us.ibm.com>
Signed-off-by: Carl Love <carll@us.ibm.com>
Index: linux-2.6.23-rc1/arch/powerpc/kernel/smp.c
===================================================================
--- linux-2.6.23-rc1.orig/arch/powerpc/kernel/smp.c
+++ linux-2.6.23-rc1/arch/powerpc/kernel/smp.c
@@ -212,11 +212,6 @@ int smp_call_function_map(void (*func) (
atomic_set(&data.finished, 0);
spin_lock(&call_lock);
- /* Must grab online cpu count with preempt disabled, otherwise
- * it can change. */
- num_cpus = num_online_cpus() - 1;
- if (!num_cpus)
- goto done;
/* remove 'self' from the map */
if (cpu_isset(smp_processor_id(), map))
@@ -224,7 +219,9 @@ int smp_call_function_map(void (*func) (
/* sanity check the map, remove any non-online processors. */
cpus_and(map, map, cpu_online_map);
- if (cpus_empty(map))
+
+ num_cpus = cpus_weight(map);
+ if (!num_cpus)
goto done;
call_data = &data;
^ permalink raw reply
* Re: Using video memory on PS3 e.g. as SWAP?
From: Geoff Levand @ 2007-07-31 20:14 UTC (permalink / raw)
To: �; +Cc: linuxppc-dev
In-Reply-To: <200707291904.55700.rene@exactcode.de>
=EF=BF=BD wrote:
> Hi all,
>=20
> looking at the PS3 as one of the few PowerPC workstation options the RA=
M
> is obviously quite limitted with just 256MB.=20
Can I recommend in the future you send this kind of PS3 specific inquiry =
to
the cbe-oss-dev mailing list?
cbe-oss-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/cbe-oss-dev
> I wonder if the 256MB of
> video memory can be mapped or at least be used as super-fast SWAP?
As Marc mentioned, some work was done using unsupported functionality of
the current hypervisor. There is no assurance it will continue to work
with future system software updates.
> Or are there news regarding accessing the video chip from Linux beside
> the unaccelerated frame-buffer?
We plan to improve Linux graphics support, but we have not announced any
specifics. The changes may make the above mentioned driver no longer wor=
k.
-Geoff
^ permalink raw reply
* Re: ipv6 in yaboot
From: Paul Nasrat @ 2007-07-31 20:11 UTC (permalink / raw)
To: Doug Maxey; +Cc: Linux PowerPC List, yaboot-devel
In-Reply-To: <31368.1185909681@falcon10.austin.ibm.com>
On Tue, 2007-07-31 at 14:21 -0500, Doug Maxey wrote:
> Howdy!
>
> I just got asked about ipv6 support in yaboot and a quick investigation
> showed _no_ knowledge of the address formats in the code.
We really just use OF for obp-tftp and don't have our own ip stack, as
there is no 1275 standard for ipv6 (although some modern IBM firmwares
which also have iscsi support it) it's somewhat hard.
> Should I be submitting an RFC for a full parser that can pick that
> apart? Or does has someone have code lurking in the shadows, that
> just needed some prompting? :)
Have you tried it with firmware that supports obp-tftp over ipv6?
Paul
^ permalink raw reply
* Re: [PATCH 1/3] Add a new member name to structure irq_host
From: Segher Boessenkool @ 2007-07-31 19:42 UTC (permalink / raw)
To: michael; +Cc: linuxppc-dev, Chen Gong, paulus
In-Reply-To: <1185232974.13740.11.camel@concordia.ozlabs.ibm.com>
> Which makes me think (again) that we should have an optional
> device_node
> pointer in irq_host. I know you said you wanted the irq stuff to be OF
> agnostic, but the reality is most of the implementations do have an OF
> node. And all of the newer irq_host implementations do, with the
> exception of PS3 and celleb - which are special.
How do you suggest to get a reasonable display name out of
the device tree? The recommended human-readable name for
interrupt controller nodes is "interrupt-controller"...
You cannot use "device_type" either, and using "compatible"
requires selecting one of its string entries, and likely
using a lookup table after that, too.
Segher
^ permalink raw reply
* ipv6 in yaboot
From: Doug Maxey @ 2007-07-31 19:21 UTC (permalink / raw)
To: Paul Nasrat, Ben Herrenschmidt; +Cc: yaboot-devel, Linux PowerPC List
Howdy!
I just got asked about ipv6 support in yaboot and a quick investigation
showed _no_ knowledge of the address formats in the code.
Should I be submitting an RFC for a full parser that can pick that
apart? Or does has someone have code lurking in the shadows, that
just needed some prompting? :)
++doug
^ permalink raw reply
* Re: help with ppc sections?
From: Segher Boessenkool @ 2007-07-31 16:38 UTC (permalink / raw)
To: Chris Friesen; +Cc: linuxppc-dev
In-Reply-To: <46AA3FB8.8030301@nortel.com>
> The ppc64 version appends ',"a"' to the kprobes.text section line. Is
> this needed here as well? Could someone elaborate on exactly what its
> purpose is?
It's the (ELF) section attributes for the section. If this
is executable code, it should be "ax"; if it's writable, it
should be "wa"; if it's not initialised, it should be "".
If the section name followed the normal naming conventions,
(newer) GCC could figure out the section attributes itself;
but then, ".text.kprobes" would imply executable, maybe the
section is really misnamed? Or maybe you need the "ax"
flags :-)
Segher
^ permalink raw reply
* Re: [PATCH 1/5 v3] Add the explanation and a sample of RapidIO OF node to the document of booting-without-of.txt file.
From: Segher Boessenkool @ 2007-07-31 16:19 UTC (permalink / raw)
To: Zhang Wei; +Cc: linuxppc-dev, paulus, linux-kernel
In-Reply-To: <11854393733580-git-send-email-wei.zhang@freescale.com>
> + l) RapidIO
"FSL PowerPC bridge RapidIO" or something like that -- you
aren't doing a _generic_ rapidio binding here.
> + RapidIO is a definition of a system interconnect. This node add
> + the support for RapidIO processor in kernel. The node name is
> + suggested to be 'rapidio'.
> +
> + Required properties:
> +
> + - compatible : Using "fsl,rapidio-delta" for Freescale PowerPC
> + RapidIO controller.
> + - #address-cells : Address representation for "rapidio" devices.
> + This field represents the number of cells needed to represent
> + the RapidIO address of the registers.
> + See 1) above for more details on defining #address-cells.
> + - reg : Offset and length of the register set for the device
> + - ranges : Should be defined as specified in 1) to describe the
> + translation of addresses for memory mapped RapidIO memory
> + space.
> + - interrupts : binding interrupts for this device node,
> + please follow below orders:
> + <err_irq bell_outb_irq bell_inb_irq msg1_tx_irq msg1_rx_irq
> + msg2_tx_irq msg2_rx_irq ... msgN_tx_irq msgN_rx_irq>.
_All_ of these are "as specified in 1)". You should be saying
the specifics for your device here; for example, what register
blocks of your controller are described in "reg", and in what
order?
Segher
^ permalink raw reply
* Re: [PATCH 1/5 v3] Add the explanation and a sample of RapidIO OF node to the document of booting-without-of.txt file.
From: Segher Boessenkool @ 2007-07-31 16:15 UTC (permalink / raw)
To: Zhang Wei-r63237; +Cc: linuxppc-dev, paulus, linux-kernel
In-Reply-To: <46B96294322F7D458F9648B60E15112C74D158@zch01exm26.fsl.freescale.net>
>>> + - #address-cells : Address representation for
>> "rapidio" devices.
>>> + This field represents the number of cells needed to represent
>>> + the RapidIO address of the registers.
>>
>> Can you explain this a little further. I'm a bit confused by
>> 'RapidIO address of the registers'.
>>
> I want to present "This field represents the number of cells [needed to
> represent the RapidIO address] of the registers."
> Maybe I should remove 'of the registers' to be more clear.
This is completely content-free anyway; the semantics of
#address-cells (and #size-cells, which you forgot) are
already defined in the base OF spec; what you _should_ be
defining here is a) the required value of #address-cells
for a rapidio bus; and b) how addresses on that bus are
represented (simply as a 64-bit integer, encoded as a
pair of 32-bit integers as usual; but it needs to be said).
Segher
^ permalink raw reply
* Re: I2C interrupts on 8541
From: Kumar Gala @ 2007-07-31 14:14 UTC (permalink / raw)
To: Charles Krinke; +Cc: Mark Freedkin, linuxppc-embedded
In-Reply-To: <9F3F0A752CAEBE4FA7E906CC2FBFF57C06A2A4@MERCURY.inside.istor.com>
On Jul 30, 2007, at 11:51 AM, Charles Krinke wrote:
> I'm puzzled about how to setup interrupts for the second I2C interface
> in an 8541. This is the CPM interface, the one with buffer
> descriptors.
>
> I see mention of its I2CER/I2CMR registers, but am having trouble
> figuring out how to enable and interrupt so that when the interface is
> in slave mode and a packet is received, it will vector to an interrupt
> service routine.
>
> I am using Linux-2.7.17.11 and I know you-all have gone past this a
> bit,
> but in the midst of a project, we are constrained to finish with the
> kernel we started with.
>
> A few pointers on enabling an interrupt from this interface would be
> greatly appreciated.
To get interrupts you need to use the BD rings. Look at the section
'I2C Buffer Descriptors' in the 8555 UM and it shows 'I' bits in both
the TX & RX rings that should cause interrupts.
- k
^ permalink raw reply
* Re: Reboot Command Makes kernel to hang (MPC8560)
From: Kumar Gala @ 2007-07-31 14:11 UTC (permalink / raw)
To: Clemens Koller; +Cc: Ansari, linuxppc-embedded
In-Reply-To: <46AF2085.1060603@anagramm.de>
On Jul 31, 2007, at 6:44 AM, Clemens Koller wrote:
> Hi, Ansari!
>
> Ansari schrieb:
>> Hi Kumar,
>> First of all thanks for ur reply .
>> Even i went through the linux source . And i have observe that the =20=
>> reboot command used to hard reset the core . I have few doubts can =20=
>> u please clarify me.
>> 1. Is there any way to reset the full chip with out using any =20
>> external signal (MPC8560) ? (like any register that can be used =20
>> for reseting the processor)
>
> I RTFM:
> It should be the bits RST[1:0] in the Debug Control Register 0 =20
> (DBCR0).
This only resets the core on the 8560.
> I didn't find details how the external signals are affected: =20
> HRESET_REQ# and friends.
> The HRESET_REQ# is usually fed back to the CPU's HRESET#.
> So if the HRESET_REQ# gets asserted by writing to above registers =20
> it should really bring
> down the CPU, it's internal as well as it's external components, =20
> which are usually
> connected to a replication of that signal.
This is roughly correct. The only way on 8560 to generate =20
HRESET_REQ# is to cause a core watchdog timeout.
> However the existence of cpm2_reset() and a qe_reset() (QuiccEngine?)
> in the code tells me that the above expectations could be wrong.
>
> Would be nice to have that verified by some hardware guys from =20
> freescale...
cpm2_reset/qe_reset are more related to SW than any HW reset.
>
>> 2. Even same reboot command works fine for MPC8540 Processor ?.
>
> ...because it doesn't have a cpm ?
That's more luck than anything else.
>> 3. what are the factors that makes ramdisk hangs . When its =20
>> uncompressing ?
>
> Well, side effects ?
>
> Regards,
> --=20
> Clemens Koller
> __________________________________
> R&D Imaging Devices
> Anagramm GmbH
> Rupert-Mayer-Stra=DFe 45/1
> Linhof Werksgel=E4nde
> D-81379 M=FCnchen
> Tel.089-741518-50
> Fax 089-741518-19
> http://www.anagramm-technology.com
^ permalink raw reply
* RE: interrupts in mpc8313
From: Yoni Levin @ 2007-07-31 13:53 UTC (permalink / raw)
To: 'Scott Wood'; +Cc: linuxppc-embedded
In-Reply-To: <46AF3A9C.4090007@freescale.com>
All I had to do was to add :
irq_create_mapping(NULL,71)
and yes it not the exact code , I work with 2 computers...
thanks.
-----Original Message-----
From: Scott Wood [mailto:scottwood@freescale.com]
Sent: Tuesday, July 31, 2007 4:35 PM
To: Yoni Levin
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: interrupts in mpc8313
Yoni Levin wrote:
> I tried to use the function request_irq :
>
>
>
> Ret=Request_irq(71,interrupt_handler,SA_INTERUPT,"dma_irq",NULL);
arch/ppc or arch/powerpc?
If the latter, you need to translate the hardware IRQ into a virtual
IRQ. The easiest way to do this is to put the DMA node into the device
tree and use of_irq_to_resource().
Plus, this obviously isn't the exact code you're running, as the
spelling and capitalization errors would keep it from compiling.
-Scott
^ permalink raw reply
* Re: interrupts in mpc8313
From: Scott Wood @ 2007-07-31 13:35 UTC (permalink / raw)
To: Yoni Levin; +Cc: linuxppc-embedded
In-Reply-To: <1A95C6D899744E16A71AFFB2CF1C11B1.MAI@mail.livedns.co.il>
Yoni Levin wrote:
> I tried to use the function request_irq :
>
>
>
> Ret=Request_irq(71,interrupt_handler,SA_INTERUPT,"dma_irq",NULL);
arch/ppc or arch/powerpc?
If the latter, you need to translate the hardware IRQ into a virtual
IRQ. The easiest way to do this is to put the DMA node into the device
tree and use of_irq_to_resource().
Plus, this obviously isn't the exact code you're running, as the
spelling and capitalization errors would keep it from compiling.
-Scott
^ permalink raw reply
* Re: [PATCH 0/4][RFC] lro: Generic Large Receive Offload for TCP traffic
From: Andrew Gallatin @ 2007-07-31 13:34 UTC (permalink / raw)
To: Jan-Bernd Themann
Cc: Thomas Klein, Jeff Garzik, Jan-Bernd Themann, netdev,
linux-kernel, linux-ppc, Christoph Raisch, Marcus Eder,
Stefan Roscher, David Miller
In-Reply-To: <200707311233.31227.ossthema@de.ibm.com>
Jan-Bernd Themann wrote:
> On Monday 30 July 2007 22:32, Andrew Gallatin wrote:
>> Second, you still need to set skb->ip_summed = CHECKSUM_UNNECESSARY
>> when modified packets are flushed, else the stack will see bad
>> checksums for packets from CHECKSUM_COMPLETE drivers using the
>> skb interface. Fixed in the attached patch.
>
> I thought about it... As we do update the TCP checksum for aggregated
> packets we could add a second ip_summed field in the net_lro_mgr struct
> used for aggregated packets to support HW that does not have any checksum helper
> functionality. These drivers could set this ip_summed field to CHECKSUM_NONE,
> and thus leave the checksum check to the stack. I'm not sure if these old devices benefit
> a lot from LRO. So what do you think?
This might be handy, and it would also fix the problem with
CHECKSUM_PARTIAL drivers using the skb interface by allowing them
to set it to CHECKSUM_UNNECESSARY.
>> Fourth, I did some traffic sniffing to try to figure out what's going
>> on above, and saw tcpdump complain about bad checksums. Have you tried
>> running tcpdump -s 65535 -vvv? Have you also seen bad checksums?
>> I seem to see this for both page- and skb-based versions of the driver.
>>
>
> Hmmm, can't confirm that. For our skb-based version I see
> correct checksums for aggregated packets and for the page-based version as well.
> I used: (tcpdump -i ethX -s 0 -w dump.bin) in combination with ethereal.
> Don't see problems as well with your tcpdump command.
I'm still trying to get a handle on this. It happens both with
page based and skb based receive for me.. I would not be
surprised if I was doing something wrong in myri10ge. But
I don't see it without LRO, or with my LRO. I'll let you
know when I figure it out..
In the meantime, in case you have any insight, I've left a
capture of a small "netcat" transfer of a 64KB file full
of zeros at http://www.myri.com/staff/gallatin/lro/netcat_dump.bz2
Drew
^ permalink raw reply
* Re: [PATCH 4/6] PowerPC 440EPx: Sequoia bootwrapper
From: Valentine Barshak @ 2007-07-31 12:42 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <200707311342.46555.sr@denx.de>
Stefan Roese wrote:
> On Tuesday 31 July 2007, Valentine Barshak wrote:
>>> Is treeboot-* really needed on Sequoia? From my understanding this is
>>> only needed for platforms using OpenBIOS as bootloader.
>> Right, it's not used for u-boot. I've included it just in case.
>
> I think we should drop it, when it's not used at all.
>
> You didn't comment on my review down below in the code. Perhaps you didn't see
> it. Here again the original review with 2 small comments.
>
Oops, sorry, I've missed it :) Thanks for review. I'll modify the code
according to your comments.
Thanks,
Valentine.
> Thanks for the good work.
>
>> +++ linux/arch/powerpc/boot/sequoia.c 2007-07-27 20:59:09.000000000 +0400
>> @@ -0,0 +1,234 @@
>> +/*
>> + * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
>> + * Copyright IBM Corporation, 2007
>> + *
>> + * Based on ebony wrapper:
>> + * Copyright 2007 David Gibson, IBM Corporation.
>> + *
>> + * Clocking code based on code by:
>> + * Stefan Roese <sr@denx.de>
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * as published by the Free Software Foundation; version 2 of the License
>> + */
>> +#include <stdarg.h>
>> +#include <stddef.h>
>> +#include "types.h"
>> +#include "elf.h"
>> +#include "string.h"
>> +#include "stdio.h"
>> +#include "page.h"
>> +#include "ops.h"
>> +#include "dcr.h"
>> +#include "44x.h"
>> +
>> +extern char _dtb_start[];
>> +extern char _dtb_end[];
>> +
>> +static u8 *sequoia_mac0, *sequoia_mac1;
>> +
>> +#define SPRN_CCR1 0x378
>> +void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
>> +{
>> + u32 cpu, plb, opb, ebc, tb, uart0, m, vco;
>> + u32 reg;
>> + u32 fwdva, fwdvb, fbdv, lfbdv, opbdv0, perdv0, spcid0, prbdv0, tmp;
>> +
>> + mtdcr(DCRN_CPR0_ADDR, CPR0_PLLD0);
>> + reg = mfdcr(DCRN_CPR0_DATA);
>
> How about adding mfcpr functions to access the CPR regs. Makes the source
> better readable:
>
> static inline u32 mfcpr(u32 reg)
> {
> mtdcr(DCRN_CPR0_ADDR, reg);
> return mfdcr(DCRN_CPR0_DATA);
> }
>
>> + tmp = (reg & 0x000F0000) >> 16;
>> + fwdva = tmp ? tmp : 16;
>> + tmp = (reg & 0x00000700) >> 8;
>> + fwdvb = tmp ? tmp : 8;
>> + tmp = (reg & 0x1F000000) >> 24;
>> + fbdv = tmp ? tmp : 32;
>> + lfbdv = (reg & 0x0000007F);
>> +
>> + mtdcr(DCRN_CPR0_ADDR, CPR0_OPBD0);
>> + reg = mfdcr(DCRN_CPR0_DATA);
>> + tmp = (reg & 0x03000000) >> 24;
>> + opbdv0 = tmp ? tmp : 4;
>> +
>> + mtdcr(DCRN_CPR0_ADDR, CPR0_PERD0);
>> + reg = mfdcr(DCRN_CPR0_DATA);
>> + tmp = (reg & 0x07000000) >> 24;
>> + perdv0 = tmp ? tmp : 8;
>> +
>> + mtdcr(DCRN_CPR0_ADDR, CPR0_PRIMBD0);
>> + reg = mfdcr(DCRN_CPR0_DATA);
>> + tmp = (reg & 0x07000000) >> 24;
>> + prbdv0 = tmp ? tmp : 8;
>> +
>> + mtdcr(DCRN_CPR0_ADDR, CPR0_SCPID);
>> + reg = mfdcr(DCRN_CPR0_DATA);
>> + tmp = (reg & 0x03000000) >> 24;
>> + spcid0 = tmp ? tmp : 4;
>> +
>> + /* Calculate M */
>> + mtdcr(DCRN_CPR0_ADDR, CPR0_PLLC0);
>> + reg = mfdcr(DCRN_CPR0_DATA);
>> + tmp = (reg & 0x03000000) >> 24;
>> + if (tmp == 0) { /* PLL output */
>> + tmp = (reg & 0x20000000) >> 29;
>> + if (!tmp) /* PLLOUTA */
>> + m = fbdv * lfbdv * fwdva;
>> + else
>> + m = fbdv * lfbdv * fwdvb;
>> + }
>> + else if (tmp == 1) /* CPU output */
>> + m = fbdv * fwdva;
>> + else
>> + m = perdv0 * opbdv0 * fwdvb;
>> +
>> + vco = (m * sysclk) + (m >> 1);
>> + cpu = vco / fwdva;
>> + plb = vco / fwdvb / prbdv0;
>> + opb = plb / opbdv0;
>> + ebc = plb / perdv0;
>> +
>> + /* FIXME */
>> + uart0 = ser_clk;
>> +
>> + /* Figure out timebase. Either CPU or default TmrClk */
>> + asm volatile (
>> + "mfspr %0,%1\n"
>> + :
>> + "=&r"(reg) : "i"(SPRN_CCR1));
>> + if (reg & 0x0080)
>> + tb = 25000000; /* TmrClk is 25MHz */
>> + else
>> + tb = cpu;
>> +
>> + dt_fixup_cpu_clocks(cpu, tb, 0);
>> + dt_fixup_clock("/plb", plb);
>> + dt_fixup_clock("/plb/opb", opb);
>> + dt_fixup_clock("/plb/opb/ebc", ebc);
>> + dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
>> + dt_fixup_clock("/plb/opb/serial@ef600400", uart0);
>> + dt_fixup_clock("/plb/opb/serial@ef600500", uart0);
>> + dt_fixup_clock("/plb/opb/serial@ef600600", uart0);
>> +}
>> +
>> +
>> +/*
>> + * 440EPx DDR1/2 memory controller code
>> + * TODO: move to generic 44x code
>> + */
>> +
>> +/* DDR0_02 */
>> +#define DDR_START 0x1
>> +#define DDR_START_SHIFT 0
>> +#define DDR_MAX_CS_REG 0x3
>> +#define DDR_MAX_CS_REG_SHIFT 24
>> +#define DDR_MAX_COL_REG 0xf
>> +#define DDR_MAX_COL_REG_SHIFT 16
>> +#define DDR_MAX_ROW_REG 0xf
>> +#define DDR_MAX_ROW_REG_SHIFT 8
>> +/* DDR0_08 */
>> +#define DDR_DDR2_MODE 0x1
>> +#define DDR_DDR2_MODE_SHIFT 0
>> +/* DDR0_10 */
>> +#define DDR_CS_MAP 0x3
>> +#define DDR_CS_MAP_SHIFT 8
>> +/* DDR0_14 */
>> +#define DDR_REDUC 0x1
>> +#define DDR_REDUC_SHIFT 16
>> +/* DDR0_42 */
>> +#define DDR_APIN 0x7
>> +#define DDR_APIN_SHIFT 24
>> +/* DDR0_43 */
>> +#define DDR_COL_SZ 0x7
>> +#define DDR_COL_SZ_SHIFT 8
>> +#define DDR_BANK8 0x1
>> +#define DDR_BANK8_SHIFT 0
>> +
>> +#define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask))
>> +
>> +static void ibm440epx_fixup_memsize(void)
>> +{
>> + unsigned long val, max_cs, max_col, max_row;
>> + unsigned long cs, col, row, bank, dpath;
>> + unsigned long memsize;
>> +
>> + mtdcr(DCRN_SDRAM0_CFGADDR, 2);
>> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
>
> Again, mfsdram() functions would be handy here.
>
>> + if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT))
>> + fatal("DDR controller is not initialized\n");
>> +
>> + /* get maximum cs col and row values */
>> + max_cs = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT);
>> + max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT);
>> + max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT);
>> +
>> + /* get CS value */
>> + mtdcr(DCRN_SDRAM0_CFGADDR, 10);
>> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
>> +
>> + val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT);
>> + cs = 0;
>> + while (val) {
>> + if (val && 0x1)
>> + cs++;
>> + val = val >> 1;
>> + }
>> +
>> + if (!cs)
>> + fatal("No memory installed\n");
>> + if (cs > max_cs)
>> + fatal("DDR wrong CS configuration\n");
>> +
>> + /* get data path bytes */
>> + mtdcr(DCRN_SDRAM0_CFGADDR, 14);
>> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
>> +
>> + if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))
>> + dpath = 8; /* 64 bits */
>> + else
>> + dpath = 4; /* 32 bits */
>> +
>> + /* get adress pins (rows) */
>> + mtdcr(DCRN_SDRAM0_CFGADDR, 42);
>> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
>> +
>> + row = DDR_GET_VAL(val, DDR_APIN, DDR_APIN_SHIFT);
>> + if (row > max_row)
>> + fatal("DDR wrong APIN configuration\n");
>> + row = max_row - row;
>> +
>> + /* get collomn size and banks */
>> + mtdcr(DCRN_SDRAM0_CFGADDR, 43);
>> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
>> +
>> + col = DDR_GET_VAL(val, DDR_COL_SZ, DDR_COL_SZ_SHIFT);
>> + if (col > max_col)
>> + fatal("DDR wrong COL configuration\n");
>> + col = max_col - col;
>> +
>> + if (DDR_GET_VAL(val, DDR_BANK8, DDR_BANK8_SHIFT))
>> + bank = 8; /* 8 banks */
>> + else
>> + bank = 4; /* 4 banks */
>> +
>> + memsize = cs * (1 << (col+row)) * bank * dpath;
>> + dt_fixup_memory(0, memsize);
>> +}
>> +
>> +static void sequoia_fixups(void)
>> +{
>> + unsigned long sysclk = 33333333;
>
> Blank line after variable declaration please.
>
>> + ibm440ep_fixup_clocks(sysclk, 11059200);
>> + ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
>> + ibm440epx_fixup_memsize();
>> + dt_fixup_mac_addresses(sequoia_mac0, sequoia_mac1);
>> +}
>> +
>> +void sequoia_init(void *mac0, void *mac1)
>> +{
>> + platform_ops.fixups = sequoia_fixups;
>> + platform_ops.exit = ibm44x_dbcr_reset;
>> + sequoia_mac0 = mac0;
>> + sequoia_mac1 = mac1;
>> + ft_init(_dtb_start, 0, 32);
>> + serial_console_init();
>> +}
>> diff -ruN linux.orig/arch/powerpc/boot/treeboot-sequoia.c
>> linux/arch/powerpc/boot/treeboot-sequoia.c ---
>> linux.orig/arch/powerpc/boot/treeboot-sequoia.c 1970-01-01
>> 03:00:00.000000000 +0300 +++
>> linux/arch/powerpc/boot/treeboot-sequoia.c 2007-07-27 20:44:26.000000000
>> +0400 @@ -0,0 +1,27 @@
>> +/*
>> + * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
>> + * Copyright IBM Corporation, 2007
>> + *
>> + * Based on ebony wrapper:
>> + * Copyright 2007 David Gibson, IBM Corporation.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * as published by the Free Software Foundation; version 2 of the License
>> + */
>> +#include "ops.h"
>> +#include "stdio.h"
>> +#include "44x.h"
>> +
>> +extern char _end[];
>> +
>> +BSS_STACK(4096);
>> +
>> +void platform_init(void)
>> +{
>> + unsigned long end_of_ram = 0x10000000;
>> + unsigned long avail_ram = end_of_ram - (unsigned long)_end;
>> +
>> + simple_alloc_init(_end, avail_ram, 32, 64);
>> + sequoia_init(NULL, NULL);
>> +}
>
> Best regards,
> Stefan
^ permalink raw reply
* BUG-REPORT Re: ml403 ac97 driver
From: Qin Lin @ 2007-07-31 11:49 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <1185698888.6397.37.camel@localhost>
HI Joachim
When i used the aplay to test the drive first time,it played well. But
after restart the board
it is not well again.
Qin Lin
# aplay yonggan.wav
Playing WAVE 'yonggan.wav' : Signed 16 bit Little Endian, Rate 44100 Hz,
Stereo
[ 258.518119] Kernel stack overflow in process c039ec00, r1=c3e0bf50
#strace aplay yonggan.wav
......................
stat64("/usr/share/alsa/alsa.conf", {st_mode=S_IFREG|0644, st_size=7701,
...}) = 0
open("/dev/snd/controlC0", O_RDONLY) = 3
close(3) = 0
open("/dev/snd/controlC0", O_RDWR) = 3
ioctl(3, USBDEVFS_CONTROL, 0x7f9a25b8) = 0
ioctl(3, 0x41785501, 0x7f9a2560) = 0
close(3) = 0
open("/dev/snd/controlC0", O_RDONLY) = 3
close(3) = 0
open("/dev/snd/controlC0", O_RDWR) = 3
ioctl(3, USBDEVFS_CONTROL, 0x7f9a2808) = 0
ioctl(3, 0x80045532, 0x7f9a2838) = 0
open("/dev/snd/pcmC0D0p", O_RDWR|O_NONBLOCK) = 4
close(3) = 0
ioctl(4, AGPIOC_ACQUIRE or APM_IOC_STANDBY, 0x7f9a2718) = 0
fcntl64(4, F_GETFL) = 0x802 (flags O_RDWR|O_NONBLOCK)
ioctl(4, AGPIOC_INFO, 0x7f9a2688) = 0
ioctl(4, AGPIOC_RELEASE or APM_IOC_SUSPEND, 0x7f9a2690) = 0
mmap(NULL, 4096, PROT_READ, MAP_SHARED, 4, 0x80000000) = 0x30018000
mmap(NULL, 4096, PROT_READ|PROT_WRITE, MAP_SHARED, 4, 0x81000000) =
0x30019000
fcntl64(4, F_GETFL) = 0x802 (flags O_RDWR|O_NONBLOCK)
fcntl64(4, F_SETFL, O_RDWR) = 0
ioctl(4, AGPIOC_ACQUIRE or APM_IOC_STANDBY, 0x7f9a2c60) = 0
rt_sigaction(SIGINT, {0xfdabf30, [INT], SA_RESTART}, {SIG_DFL}, 8) = 0
rt_sigaction(SIGTERM, {0xfdabf30, [TERM], SA_RESTART}, {SIG_DFL}, 8) = 0
rt_sigaction(SIGABRT, {0xfdabf30, [ABRT], SA_RESTART}, {SIG_DFL}, 8) = 0
open("yonggan.wav", O_RDONLY|O_LARGEFILE) = 3
read(3, "RIFF$VR\0WAVEfmt \20\0\0\0\1\0\2\0", 24) = 24
read(3, "D\254", 2) = 2
read(3, "\0\0\20\261\2\0\4\0\20\0", 10) = 10
read(3, "data\\TR\0", 8) = 8
write(2, "Playing WAVE \'yonggan.wav\' : ", 29Playing WAVE 'yonggan.wav' : )
= 29
write(2, "Signed 16 bit Little Endian, ", 29Signed 16 bit Little Endian, ) =
29
write(2, "Rate 44100 Hz, ", 15Rate 44100 Hz, ) = 15
write(2, "Stereo", 6Stereo) = 6
write(2, "\n", 1
) = 1
ioctl(4, 0xc25c4110, 0x7f9a2518) = 0
ioctl(4, 0xc25c4110, 0x7f9a21b0) = 0
ioctl(4, 0xc25c4110, 0x7f9a21b0) = 0
ioctl(4, 0xc25c4110, 0x7f9a2518) = 0
ioctl(4, 0xc25c4110, 0x7f9a21b0) = 0
ioctl(4, 0xc25c4110, 0x7f9a21b0) = 0
ioctl(4, 0xc25c4110, 0x7f9a2518) = 0
ioctl(4, 0xc25c4110, 0x7f9a2298) = 0
ioctl(4, 0xc25c4110, 0x7f9a1f30) = 0
ioctl(4, 0xc25c4110, 0x7f9a1f30) = 0
ioctl(4, 0xc25c4110, 0x7f9a2298) = 0
ioctl(4, 0xc25c4110, 0x7f9a2298[ 213.220781] Kernel stack overflow in
process c039c030, r1=c0395f50
--
View this message in context: http://www.nabble.com/Re%3A-ml403-ac97-driver-tf4164866.html#a11922613
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* Re: Reboot Command Makes kernel to hang (MPC8560)
From: Clemens Koller @ 2007-07-31 11:44 UTC (permalink / raw)
To: Ansari; +Cc: linuxppc-embedded
In-Reply-To: <007001c7d341$d3ae29d0$9503a8c0@Ansari>
Hi, Ansari!
Ansari schrieb:
> Hi Kumar,
>
> First of all thanks for ur reply .
>
> Even i went through the linux source . And i have observe that the reboot
> command used to hard reset the core . I have few doubts can u please clarify
> me.
>
> 1. Is there any way to reset the full chip with out using any external
> signal (MPC8560) ? (like any register that can be used for reseting the
> processor)
I RTFM:
It should be the bits RST[1:0] in the Debug Control Register 0 (DBCR0).
I didn't find details how the external signals are affected: HRESET_REQ# and friends.
The HRESET_REQ# is usually fed back to the CPU's HRESET#.
So if the HRESET_REQ# gets asserted by writing to above registers it should really bring
down the CPU, it's internal as well as it's external components, which are usually
connected to a replication of that signal.
However the existence of cpm2_reset() and a qe_reset() (QuiccEngine?)
in the code tells me that the above expectations could be wrong.
Would be nice to have that verified by some hardware guys from freescale...
> 2. Even same reboot command works fine for MPC8540 Processor ?.
...because it doesn't have a cpm ?
> 3. what are the factors that makes ramdisk hangs . When its uncompressing ?
Well, side effects ?
Regards,
--
Clemens Koller
__________________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Straße 45/1
Linhof Werksgelände
D-81379 München
Tel.089-741518-50
Fax 089-741518-19
http://www.anagramm-technology.com
^ permalink raw reply
* [PATCH v3] Fix ibmvscsi client for multiplatform iSeries+pSeries kernel.
From: David Woodhouse @ 2007-07-31 11:42 UTC (permalink / raw)
To: michael, Brian King; +Cc: Stephen Rothwell, Paul Mackerras, linuxppc-dev
In-Reply-To: <1185436849.14697.441.camel@pmac.infradead.org>
If you build a multiplatform kernel for iSeries and pSeries, with
ibmvscsic support, the resulting client doesn't work on iSeries.
This patch should fix that, using the appropriate low-level operations
for the machine detected at runtime.
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
---
This third version of the patch is updated to apply to Linus' current
git tree following the recent ibmvscsi updates.
diff --git a/drivers/scsi/ibmvscsi/rpa_vscsi.c b/drivers/scsi/ibmvscsi/rpa_vscsi.c
index 9c14e78..1821461 100644
--- a/drivers/scsi/ibmvscsi/rpa_vscsi.c
+++ b/drivers/scsi/ibmvscsi/rpa_vscsi.c
@@ -42,14 +42,14 @@ static unsigned int partition_number = -1;
* Routines for managing the command/response queue
*/
/**
- * ibmvscsi_handle_event: - Interrupt handler for crq events
+ * rpavscsi_handle_event: - Interrupt handler for crq events
* @irq: number of irq to handle, not used
* @dev_instance: ibmvscsi_host_data of host that received interrupt
*
* Disables interrupts and schedules srp_task
* Always returns IRQ_HANDLED
*/
-static irqreturn_t ibmvscsi_handle_event(int irq, void *dev_instance)
+static irqreturn_t rpavscsi_handle_event(int irq, void *dev_instance)
{
struct ibmvscsi_host_data *hostdata =
(struct ibmvscsi_host_data *)dev_instance;
@@ -66,9 +66,9 @@ static irqreturn_t ibmvscsi_handle_event(int irq, void *dev_instance)
* Frees irq, deallocates a page for messages, unmaps dma, and unregisters
* the crq with the hypervisor.
*/
-void ibmvscsi_release_crq_queue(struct crq_queue *queue,
- struct ibmvscsi_host_data *hostdata,
- int max_requests)
+static void rpavscsi_release_crq_queue(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata,
+ int max_requests)
{
long rc;
struct vio_dev *vdev = to_vio_dev(hostdata->dev);
@@ -108,12 +108,13 @@ static struct viosrp_crq *crq_queue_next_crq(struct crq_queue *queue)
}
/**
- * ibmvscsi_send_crq: - Send a CRQ
+ * rpavscsi_send_crq: - Send a CRQ
* @hostdata: the adapter
* @word1: the first 64 bits of the data
* @word2: the second 64 bits of the data
*/
-int ibmvscsi_send_crq(struct ibmvscsi_host_data *hostdata, u64 word1, u64 word2)
+static int rpavscsi_send_crq(struct ibmvscsi_host_data *hostdata,
+ u64 word1, u64 word2)
{
struct vio_dev *vdev = to_vio_dev(hostdata->dev);
@@ -121,10 +122,10 @@ int ibmvscsi_send_crq(struct ibmvscsi_host_data *hostdata, u64 word1, u64 word2)
}
/**
- * ibmvscsi_task: - Process srps asynchronously
+ * rpavscsi_task: - Process srps asynchronously
* @data: ibmvscsi_host_data of host
*/
-static void ibmvscsi_task(void *data)
+static void rpavscsi_task(void *data)
{
struct ibmvscsi_host_data *hostdata = (struct ibmvscsi_host_data *)data;
struct vio_dev *vdev = to_vio_dev(hostdata->dev);
@@ -190,6 +191,42 @@ static void set_adapter_info(struct ibmvscsi_host_data *hostdata)
}
/**
+ * reset_crq_queue: - resets a crq after a failure
+ * @queue: crq_queue to initialize and register
+ * @hostdata: ibmvscsi_host_data of host
+ *
+ */
+static int rpavscsi_reset_crq_queue(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata)
+{
+ int rc;
+ struct vio_dev *vdev = to_vio_dev(hostdata->dev);
+
+ /* Close the CRQ */
+ do {
+ rc = plpar_hcall_norets(H_FREE_CRQ, vdev->unit_address);
+ } while ((rc == H_BUSY) || (H_IS_LONG_BUSY(rc)));
+
+ /* Clean out the queue */
+ memset(queue->msgs, 0x00, PAGE_SIZE);
+ queue->cur = 0;
+
+ set_adapter_info(hostdata);
+
+ /* And re-open it again */
+ rc = plpar_hcall_norets(H_REG_CRQ,
+ vdev->unit_address,
+ queue->msg_token, PAGE_SIZE);
+ if (rc == 2) {
+ /* Adapter is good, but other end is not ready */
+ dev_warn(hostdata->dev, "Partner adapter not ready\n");
+ } else if (rc != 0) {
+ dev_warn(hostdata->dev, "couldn't register crq--rc 0x%x\n", rc);
+ }
+ return rc;
+}
+
+/**
* initialize_crq_queue: - Initializes and registers CRQ with hypervisor
* @queue: crq_queue to initialize and register
* @hostdata: ibmvscsi_host_data of host
@@ -198,9 +235,9 @@ static void set_adapter_info(struct ibmvscsi_host_data *hostdata)
* the crq with the hypervisor.
* Returns zero on success.
*/
-int ibmvscsi_init_crq_queue(struct crq_queue *queue,
- struct ibmvscsi_host_data *hostdata,
- int max_requests)
+static int rpavscsi_init_crq_queue(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata,
+ int max_requests)
{
int rc;
int retrc;
@@ -227,7 +264,7 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
queue->msg_token, PAGE_SIZE);
if (rc == H_RESOURCE)
/* maybe kexecing and resource is busy. try a reset */
- rc = ibmvscsi_reset_crq_queue(queue,
+ rc = rpavscsi_reset_crq_queue(queue,
hostdata);
if (rc == 2) {
@@ -240,7 +277,7 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
}
if (request_irq(vdev->irq,
- ibmvscsi_handle_event,
+ rpavscsi_handle_event,
0, "ibmvscsi", (void *)hostdata) != 0) {
dev_err(hostdata->dev, "couldn't register irq 0x%x\n",
vdev->irq);
@@ -256,7 +293,7 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
queue->cur = 0;
spin_lock_init(&queue->lock);
- tasklet_init(&hostdata->srp_task, (void *)ibmvscsi_task,
+ tasklet_init(&hostdata->srp_task, (void *)rpavscsi_task,
(unsigned long)hostdata);
return retrc;
@@ -281,8 +318,8 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
* @hostdata: ibmvscsi_host_data of host
*
*/
-int ibmvscsi_reenable_crq_queue(struct crq_queue *queue,
- struct ibmvscsi_host_data *hostdata)
+static int rpavscsi_reenable_crq_queue(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata)
{
int rc;
struct vio_dev *vdev = to_vio_dev(hostdata->dev);
@@ -297,38 +334,10 @@ int ibmvscsi_reenable_crq_queue(struct crq_queue *queue,
return rc;
}
-/**
- * reset_crq_queue: - resets a crq after a failure
- * @queue: crq_queue to initialize and register
- * @hostdata: ibmvscsi_host_data of host
- *
- */
-int ibmvscsi_reset_crq_queue(struct crq_queue *queue,
- struct ibmvscsi_host_data *hostdata)
-{
- int rc;
- struct vio_dev *vdev = to_vio_dev(hostdata->dev);
-
- /* Close the CRQ */
- do {
- rc = plpar_hcall_norets(H_FREE_CRQ, vdev->unit_address);
- } while ((rc == H_BUSY) || (H_IS_LONG_BUSY(rc)));
-
- /* Clean out the queue */
- memset(queue->msgs, 0x00, PAGE_SIZE);
- queue->cur = 0;
-
- set_adapter_info(hostdata);
-
- /* And re-open it again */
- rc = plpar_hcall_norets(H_REG_CRQ,
- vdev->unit_address,
- queue->msg_token, PAGE_SIZE);
- if (rc == 2) {
- /* Adapter is good, but other end is not ready */
- dev_warn(hostdata->dev, "Partner adapter not ready\n");
- } else if (rc != 0) {
- dev_warn(hostdata->dev, "couldn't register crq--rc 0x%x\n", rc);
- }
- return rc;
-}
+struct ibmvscsi_ops rpavscsi_ops = {
+ .init_crq_queue = rpavscsi_init_crq_queue,
+ .release_crq_queue = rpavscsi_release_crq_queue,
+ .reset_crq_queue = rpavscsi_reset_crq_queue,
+ .reenable_crq_queue = rpavscsi_reenable_crq_queue,
+ .send_crq = rpavscsi_send_crq,
+};
diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index 5870866..ed9b675 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -70,6 +70,7 @@
#include <linux/moduleparam.h>
#include <linux/dma-mapping.h>
#include <linux/delay.h>
+#include <asm/firmware.h>
#include <asm/vio.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
@@ -89,6 +90,8 @@ static int max_requests = IBMVSCSI_MAX_REQUESTS_DEFAULT;
#define IBMVSCSI_VERSION "1.5.8"
+static struct ibmvscsi_ops *ibmvscsi_ops;
+
MODULE_DESCRIPTION("IBM Virtual SCSI");
MODULE_AUTHOR("Dave Boutcher");
MODULE_LICENSE("GPL");
@@ -512,8 +515,8 @@ static void ibmvscsi_reset_host(struct ibmvscsi_host_data *hostdata)
atomic_set(&hostdata->request_limit, 0);
purge_requests(hostdata, DID_ERROR);
- if ((ibmvscsi_reset_crq_queue(&hostdata->queue, hostdata)) ||
- (ibmvscsi_send_crq(hostdata, 0xC001000000000000LL, 0)) ||
+ if ((ibmvscsi_ops->reset_crq_queue(&hostdata->queue, hostdata)) ||
+ (ibmvscsi_ops->send_crq(hostdata, 0xC001000000000000LL, 0)) ||
(vio_enable_interrupts(to_vio_dev(hostdata->dev)))) {
atomic_set(&hostdata->request_limit, -1);
dev_err(hostdata->dev, "error after reset\n");
@@ -618,7 +621,7 @@ static int ibmvscsi_send_srp_event(struct srp_event_struct *evt_struct,
}
if ((rc =
- ibmvscsi_send_crq(hostdata, crq_as_u64[0], crq_as_u64[1])) != 0) {
+ ibmvscsi_ops->send_crq(hostdata, crq_as_u64[0], crq_as_u64[1])) != 0) {
list_del(&evt_struct->list);
del_timer(&evt_struct->timer);
@@ -1222,8 +1225,8 @@ void ibmvscsi_handle_crq(struct viosrp_crq *crq,
case 0x01: /* Initialization message */
dev_info(hostdata->dev, "partner initialized\n");
/* Send back a response */
- if ((rc = ibmvscsi_send_crq(hostdata,
- 0xC002000000000000LL, 0)) == 0) {
+ if ((rc = ibmvscsi_ops->send_crq(hostdata,
+ 0xC002000000000000LL, 0)) == 0) {
/* Now login */
send_srp_login(hostdata);
} else {
@@ -1248,10 +1251,10 @@ void ibmvscsi_handle_crq(struct viosrp_crq *crq,
/* We need to re-setup the interpartition connection */
dev_info(hostdata->dev, "Re-enabling adapter!\n");
purge_requests(hostdata, DID_REQUEUE);
- if ((ibmvscsi_reenable_crq_queue(&hostdata->queue,
- hostdata)) ||
- (ibmvscsi_send_crq(hostdata,
- 0xC001000000000000LL, 0))) {
+ if ((ibmvscsi_ops->reenable_crq_queue(&hostdata->queue,
+ hostdata)) ||
+ (ibmvscsi_ops->send_crq(hostdata,
+ 0xC001000000000000LL, 0))) {
atomic_set(&hostdata->request_limit,
-1);
dev_err(hostdata->dev, "error after enable\n");
@@ -1261,10 +1264,10 @@ void ibmvscsi_handle_crq(struct viosrp_crq *crq,
crq->format);
purge_requests(hostdata, DID_ERROR);
- if ((ibmvscsi_reset_crq_queue(&hostdata->queue,
- hostdata)) ||
- (ibmvscsi_send_crq(hostdata,
- 0xC001000000000000LL, 0))) {
+ if ((ibmvscsi_ops->reset_crq_queue(&hostdata->queue,
+ hostdata)) ||
+ (ibmvscsi_ops->send_crq(hostdata,
+ 0xC001000000000000LL, 0))) {
atomic_set(&hostdata->request_limit,
-1);
dev_err(hostdata->dev, "error after reset\n");
@@ -1590,7 +1593,7 @@ static int ibmvscsi_probe(struct vio_dev *vdev, const struct vio_device_id *id)
atomic_set(&hostdata->request_limit, -1);
hostdata->host->max_sectors = 32 * 8; /* default max I/O 32 pages */
- rc = ibmvscsi_init_crq_queue(&hostdata->queue, hostdata, max_requests);
+ rc = ibmvscsi_ops->init_crq_queue(&hostdata->queue, hostdata, max_requests);
if (rc != 0 && rc != H_RESOURCE) {
dev_err(&vdev->dev, "couldn't initialize crq. rc=%d\n", rc);
goto init_crq_failed;
@@ -1611,7 +1614,7 @@ static int ibmvscsi_probe(struct vio_dev *vdev, const struct vio_device_id *id)
* to fail if the other end is not acive. In that case we don't
* want to scan
*/
- if (ibmvscsi_send_crq(hostdata, 0xC001000000000000LL, 0) == 0
+ if (ibmvscsi_ops->send_crq(hostdata, 0xC001000000000000LL, 0) == 0
|| rc == H_RESOURCE) {
/*
* Wait around max init_timeout secs for the adapter to finish
@@ -1637,7 +1640,7 @@ static int ibmvscsi_probe(struct vio_dev *vdev, const struct vio_device_id *id)
add_host_failed:
release_event_pool(&hostdata->pool, hostdata);
init_pool_failed:
- ibmvscsi_release_crq_queue(&hostdata->queue, hostdata, max_requests);
+ ibmvscsi_ops->release_crq_queue(&hostdata->queue, hostdata, max_requests);
init_crq_failed:
scsi_host_put(host);
scsi_host_alloc_failed:
@@ -1648,8 +1651,8 @@ static int ibmvscsi_remove(struct vio_dev *vdev)
{
struct ibmvscsi_host_data *hostdata = vdev->dev.driver_data;
release_event_pool(&hostdata->pool, hostdata);
- ibmvscsi_release_crq_queue(&hostdata->queue, hostdata,
- max_requests);
+ ibmvscsi_ops->release_crq_queue(&hostdata->queue, hostdata,
+ max_requests);
scsi_remove_host(hostdata->host);
scsi_host_put(hostdata->host);
@@ -1679,6 +1682,13 @@ static struct vio_driver ibmvscsi_driver = {
int __init ibmvscsi_module_init(void)
{
+ if (firmware_has_feature(FW_FEATURE_ISERIES))
+ ibmvscsi_ops = &iseriesvscsi_ops;
+ else if (firmware_has_feature(FW_FEATURE_VIO))
+ ibmvscsi_ops = &rpavscsi_ops;
+ else
+ return -ENODEV;
+
return vio_register_driver(&ibmvscsi_driver);
}
diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.h b/drivers/scsi/ibmvscsi/ibmvscsi.h
index b19c2e2..46e850e 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.h
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.h
@@ -98,21 +98,25 @@ struct ibmvscsi_host_data {
};
/* routines for managing a command/response queue */
-int ibmvscsi_init_crq_queue(struct crq_queue *queue,
- struct ibmvscsi_host_data *hostdata,
- int max_requests);
-void ibmvscsi_release_crq_queue(struct crq_queue *queue,
- struct ibmvscsi_host_data *hostdata,
- int max_requests);
-int ibmvscsi_reset_crq_queue(struct crq_queue *queue,
- struct ibmvscsi_host_data *hostdata);
-
-int ibmvscsi_reenable_crq_queue(struct crq_queue *queue,
- struct ibmvscsi_host_data *hostdata);
-
void ibmvscsi_handle_crq(struct viosrp_crq *crq,
struct ibmvscsi_host_data *hostdata);
-int ibmvscsi_send_crq(struct ibmvscsi_host_data *hostdata,
- u64 word1, u64 word2);
+
+struct ibmvscsi_ops {
+ int (*init_crq_queue)(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata,
+ int max_requests);
+ void (*release_crq_queue)(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata,
+ int max_requests);
+ int (*reset_crq_queue)(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata);
+ int (*reenable_crq_queue)(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata);
+ int (*send_crq)(struct ibmvscsi_host_data *hostdata,
+ u64 word1, u64 word2);
+};
+
+extern struct ibmvscsi_ops iseriesvscsi_ops;
+extern struct ibmvscsi_ops rpavscsi_ops;
#endif /* IBMVSCSI_H */
diff --git a/drivers/scsi/ibmvscsi/iseries_vscsi.c b/drivers/scsi/ibmvscsi/iseries_vscsi.c
index 6aeb5f0..0775fde 100644
--- a/drivers/scsi/ibmvscsi/iseries_vscsi.c
+++ b/drivers/scsi/ibmvscsi/iseries_vscsi.c
@@ -53,7 +53,7 @@ struct srp_lp_event {
/**
* standard interface for handling logical partition events.
*/
-static void ibmvscsi_handle_event(struct HvLpEvent *lpevt)
+static void iseriesvscsi_handle_event(struct HvLpEvent *lpevt)
{
struct srp_lp_event *evt = (struct srp_lp_event *)lpevt;
@@ -74,9 +74,9 @@ static void ibmvscsi_handle_event(struct HvLpEvent *lpevt)
/* ------------------------------------------------------------
* Routines for driver initialization
*/
-int ibmvscsi_init_crq_queue(struct crq_queue *queue,
- struct ibmvscsi_host_data *hostdata,
- int max_requests)
+static int iseriesvscsi_init_crq_queue(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata,
+ int max_requests)
{
int rc;
@@ -88,7 +88,7 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
goto viopath_open_failed;
}
- rc = vio_setHandler(viomajorsubtype_scsi, ibmvscsi_handle_event);
+ rc = vio_setHandler(viomajorsubtype_scsi, iseriesvscsi_handle_event);
if (rc < 0) {
printk("vio_setHandler failed with rc %d in open_event_path\n",
rc);
@@ -102,9 +102,9 @@ int ibmvscsi_init_crq_queue(struct crq_queue *queue,
return -1;
}
-void ibmvscsi_release_crq_queue(struct crq_queue *queue,
- struct ibmvscsi_host_data *hostdata,
- int max_requests)
+static void iseriesvscsi_release_crq_queue(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata,
+ int max_requests)
{
vio_clearHandler(viomajorsubtype_scsi);
viopath_close(viopath_hostLp, viomajorsubtype_scsi, max_requests);
@@ -117,8 +117,8 @@ void ibmvscsi_release_crq_queue(struct crq_queue *queue,
*
* no-op for iSeries
*/
-int ibmvscsi_reset_crq_queue(struct crq_queue *queue,
- struct ibmvscsi_host_data *hostdata)
+static int iseriesvscsi_reset_crq_queue(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata)
{
return 0;
}
@@ -130,19 +130,20 @@ int ibmvscsi_reset_crq_queue(struct crq_queue *queue,
*
* no-op for iSeries
*/
-int ibmvscsi_reenable_crq_queue(struct crq_queue *queue,
- struct ibmvscsi_host_data *hostdata)
+static int iseriesvscsi_reenable_crq_queue(struct crq_queue *queue,
+ struct ibmvscsi_host_data *hostdata)
{
return 0;
}
/**
- * ibmvscsi_send_crq: - Send a CRQ
+ * iseriesvscsi_send_crq: - Send a CRQ
* @hostdata: the adapter
* @word1: the first 64 bits of the data
* @word2: the second 64 bits of the data
*/
-int ibmvscsi_send_crq(struct ibmvscsi_host_data *hostdata, u64 word1, u64 word2)
+static int iseriesvscsi_send_crq(struct ibmvscsi_host_data *hostdata,
+ u64 word1, u64 word2)
{
single_host_data = hostdata;
return HvCallEvent_signalLpEventFast(viopath_hostLp,
@@ -156,3 +157,11 @@ int ibmvscsi_send_crq(struct ibmvscsi_host_data *hostdata, u64 word1, u64 word2)
VIOVERSION << 16, word1, word2, 0,
0);
}
+
+struct ibmvscsi_ops iseriesvscsi_ops = {
+ .init_crq_queue = iseriesvscsi_init_crq_queue,
+ .release_crq_queue = iseriesvscsi_release_crq_queue,
+ .reset_crq_queue = iseriesvscsi_reset_crq_queue,
+ .reenable_crq_queue = iseriesvscsi_reenable_crq_queue,
+ .send_crq = iseriesvscsi_send_crq,
+};
diff --git a/drivers/scsi/ibmvscsi/Makefile b/drivers/scsi/ibmvscsi/Makefile
index f67d9ef..6ac0633 100644
--- a/drivers/scsi/ibmvscsi/Makefile
+++ b/drivers/scsi/ibmvscsi/Makefile
@@ -1,9 +1,7 @@
obj-$(CONFIG_SCSI_IBMVSCSI) += ibmvscsic.o
ibmvscsic-y += ibmvscsi.o
-ifndef CONFIG_PPC_PSERIES
ibmvscsic-$(CONFIG_PPC_ISERIES) += iseries_vscsi.o
-endif
ibmvscsic-$(CONFIG_PPC_PSERIES) += rpa_vscsi.o
obj-$(CONFIG_SCSI_IBMVSCSIS) += ibmvstgt.o
--
dwmw2
^ permalink raw reply related
* Re: [PATCH 4/6] PowerPC 440EPx: Sequoia bootwrapper
From: Stefan Roese @ 2007-07-31 11:42 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <46AF1ADA.10404@ru.mvista.com>
On Tuesday 31 July 2007, Valentine Barshak wrote:
> > Is treeboot-* really needed on Sequoia? From my understanding this is
> > only needed for platforms using OpenBIOS as bootloader.
>
> Right, it's not used for u-boot. I've included it just in case.
I think we should drop it, when it's not used at all.
You didn't comment on my review down below in the code. Perhaps you didn't see
it. Here again the original review with 2 small comments.
Thanks for the good work.
> +++ linux/arch/powerpc/boot/sequoia.c 2007-07-27 20:59:09.000000000 +0400
> @@ -0,0 +1,234 @@
> +/*
> + * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
> + * Copyright IBM Corporation, 2007
> + *
> + * Based on ebony wrapper:
> + * Copyright 2007 David Gibson, IBM Corporation.
> + *
> + * Clocking code based on code by:
> + * Stefan Roese <sr@denx.de>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; version 2 of the License
> + */
> +#include <stdarg.h>
> +#include <stddef.h>
> +#include "types.h"
> +#include "elf.h"
> +#include "string.h"
> +#include "stdio.h"
> +#include "page.h"
> +#include "ops.h"
> +#include "dcr.h"
> +#include "44x.h"
> +
> +extern char _dtb_start[];
> +extern char _dtb_end[];
> +
> +static u8 *sequoia_mac0, *sequoia_mac1;
> +
> +#define SPRN_CCR1 0x378
> +void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
> +{
> + u32 cpu, plb, opb, ebc, tb, uart0, m, vco;
> + u32 reg;
> + u32 fwdva, fwdvb, fbdv, lfbdv, opbdv0, perdv0, spcid0, prbdv0, tmp;
> +
> + mtdcr(DCRN_CPR0_ADDR, CPR0_PLLD0);
> + reg = mfdcr(DCRN_CPR0_DATA);
How about adding mfcpr functions to access the CPR regs. Makes the source
better readable:
static inline u32 mfcpr(u32 reg)
{
mtdcr(DCRN_CPR0_ADDR, reg);
return mfdcr(DCRN_CPR0_DATA);
}
> + tmp = (reg & 0x000F0000) >> 16;
> + fwdva = tmp ? tmp : 16;
> + tmp = (reg & 0x00000700) >> 8;
> + fwdvb = tmp ? tmp : 8;
> + tmp = (reg & 0x1F000000) >> 24;
> + fbdv = tmp ? tmp : 32;
> + lfbdv = (reg & 0x0000007F);
> +
> + mtdcr(DCRN_CPR0_ADDR, CPR0_OPBD0);
> + reg = mfdcr(DCRN_CPR0_DATA);
> + tmp = (reg & 0x03000000) >> 24;
> + opbdv0 = tmp ? tmp : 4;
> +
> + mtdcr(DCRN_CPR0_ADDR, CPR0_PERD0);
> + reg = mfdcr(DCRN_CPR0_DATA);
> + tmp = (reg & 0x07000000) >> 24;
> + perdv0 = tmp ? tmp : 8;
> +
> + mtdcr(DCRN_CPR0_ADDR, CPR0_PRIMBD0);
> + reg = mfdcr(DCRN_CPR0_DATA);
> + tmp = (reg & 0x07000000) >> 24;
> + prbdv0 = tmp ? tmp : 8;
> +
> + mtdcr(DCRN_CPR0_ADDR, CPR0_SCPID);
> + reg = mfdcr(DCRN_CPR0_DATA);
> + tmp = (reg & 0x03000000) >> 24;
> + spcid0 = tmp ? tmp : 4;
> +
> + /* Calculate M */
> + mtdcr(DCRN_CPR0_ADDR, CPR0_PLLC0);
> + reg = mfdcr(DCRN_CPR0_DATA);
> + tmp = (reg & 0x03000000) >> 24;
> + if (tmp == 0) { /* PLL output */
> + tmp = (reg & 0x20000000) >> 29;
> + if (!tmp) /* PLLOUTA */
> + m = fbdv * lfbdv * fwdva;
> + else
> + m = fbdv * lfbdv * fwdvb;
> + }
> + else if (tmp == 1) /* CPU output */
> + m = fbdv * fwdva;
> + else
> + m = perdv0 * opbdv0 * fwdvb;
> +
> + vco = (m * sysclk) + (m >> 1);
> + cpu = vco / fwdva;
> + plb = vco / fwdvb / prbdv0;
> + opb = plb / opbdv0;
> + ebc = plb / perdv0;
> +
> + /* FIXME */
> + uart0 = ser_clk;
> +
> + /* Figure out timebase. Either CPU or default TmrClk */
> + asm volatile (
> + "mfspr %0,%1\n"
> + :
> + "=&r"(reg) : "i"(SPRN_CCR1));
> + if (reg & 0x0080)
> + tb = 25000000; /* TmrClk is 25MHz */
> + else
> + tb = cpu;
> +
> + dt_fixup_cpu_clocks(cpu, tb, 0);
> + dt_fixup_clock("/plb", plb);
> + dt_fixup_clock("/plb/opb", opb);
> + dt_fixup_clock("/plb/opb/ebc", ebc);
> + dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
> + dt_fixup_clock("/plb/opb/serial@ef600400", uart0);
> + dt_fixup_clock("/plb/opb/serial@ef600500", uart0);
> + dt_fixup_clock("/plb/opb/serial@ef600600", uart0);
> +}
> +
> +
> +/*
> + * 440EPx DDR1/2 memory controller code
> + * TODO: move to generic 44x code
> + */
> +
> +/* DDR0_02 */
> +#define DDR_START 0x1
> +#define DDR_START_SHIFT 0
> +#define DDR_MAX_CS_REG 0x3
> +#define DDR_MAX_CS_REG_SHIFT 24
> +#define DDR_MAX_COL_REG 0xf
> +#define DDR_MAX_COL_REG_SHIFT 16
> +#define DDR_MAX_ROW_REG 0xf
> +#define DDR_MAX_ROW_REG_SHIFT 8
> +/* DDR0_08 */
> +#define DDR_DDR2_MODE 0x1
> +#define DDR_DDR2_MODE_SHIFT 0
> +/* DDR0_10 */
> +#define DDR_CS_MAP 0x3
> +#define DDR_CS_MAP_SHIFT 8
> +/* DDR0_14 */
> +#define DDR_REDUC 0x1
> +#define DDR_REDUC_SHIFT 16
> +/* DDR0_42 */
> +#define DDR_APIN 0x7
> +#define DDR_APIN_SHIFT 24
> +/* DDR0_43 */
> +#define DDR_COL_SZ 0x7
> +#define DDR_COL_SZ_SHIFT 8
> +#define DDR_BANK8 0x1
> +#define DDR_BANK8_SHIFT 0
> +
> +#define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask))
> +
> +static void ibm440epx_fixup_memsize(void)
> +{
> + unsigned long val, max_cs, max_col, max_row;
> + unsigned long cs, col, row, bank, dpath;
> + unsigned long memsize;
> +
> + mtdcr(DCRN_SDRAM0_CFGADDR, 2);
> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
Again, mfsdram() functions would be handy here.
> + if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT))
> + fatal("DDR controller is not initialized\n");
> +
> + /* get maximum cs col and row values */
> + max_cs = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT);
> + max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT);
> + max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT);
> +
> + /* get CS value */
> + mtdcr(DCRN_SDRAM0_CFGADDR, 10);
> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
> +
> + val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT);
> + cs = 0;
> + while (val) {
> + if (val && 0x1)
> + cs++;
> + val = val >> 1;
> + }
> +
> + if (!cs)
> + fatal("No memory installed\n");
> + if (cs > max_cs)
> + fatal("DDR wrong CS configuration\n");
> +
> + /* get data path bytes */
> + mtdcr(DCRN_SDRAM0_CFGADDR, 14);
> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
> +
> + if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))
> + dpath = 8; /* 64 bits */
> + else
> + dpath = 4; /* 32 bits */
> +
> + /* get adress pins (rows) */
> + mtdcr(DCRN_SDRAM0_CFGADDR, 42);
> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
> +
> + row = DDR_GET_VAL(val, DDR_APIN, DDR_APIN_SHIFT);
> + if (row > max_row)
> + fatal("DDR wrong APIN configuration\n");
> + row = max_row - row;
> +
> + /* get collomn size and banks */
> + mtdcr(DCRN_SDRAM0_CFGADDR, 43);
> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
> +
> + col = DDR_GET_VAL(val, DDR_COL_SZ, DDR_COL_SZ_SHIFT);
> + if (col > max_col)
> + fatal("DDR wrong COL configuration\n");
> + col = max_col - col;
> +
> + if (DDR_GET_VAL(val, DDR_BANK8, DDR_BANK8_SHIFT))
> + bank = 8; /* 8 banks */
> + else
> + bank = 4; /* 4 banks */
> +
> + memsize = cs * (1 << (col+row)) * bank * dpath;
> + dt_fixup_memory(0, memsize);
> +}
> +
> +static void sequoia_fixups(void)
> +{
> + unsigned long sysclk = 33333333;
Blank line after variable declaration please.
> + ibm440ep_fixup_clocks(sysclk, 11059200);
> + ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
> + ibm440epx_fixup_memsize();
> + dt_fixup_mac_addresses(sequoia_mac0, sequoia_mac1);
> +}
> +
> +void sequoia_init(void *mac0, void *mac1)
> +{
> + platform_ops.fixups = sequoia_fixups;
> + platform_ops.exit = ibm44x_dbcr_reset;
> + sequoia_mac0 = mac0;
> + sequoia_mac1 = mac1;
> + ft_init(_dtb_start, 0, 32);
> + serial_console_init();
> +}
> diff -ruN linux.orig/arch/powerpc/boot/treeboot-sequoia.c
> linux/arch/powerpc/boot/treeboot-sequoia.c ---
> linux.orig/arch/powerpc/boot/treeboot-sequoia.c 1970-01-01
> 03:00:00.000000000 +0300 +++
> linux/arch/powerpc/boot/treeboot-sequoia.c 2007-07-27 20:44:26.000000000
> +0400 @@ -0,0 +1,27 @@
> +/*
> + * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
> + * Copyright IBM Corporation, 2007
> + *
> + * Based on ebony wrapper:
> + * Copyright 2007 David Gibson, IBM Corporation.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; version 2 of the License
> + */
> +#include "ops.h"
> +#include "stdio.h"
> +#include "44x.h"
> +
> +extern char _end[];
> +
> +BSS_STACK(4096);
> +
> +void platform_init(void)
> +{
> + unsigned long end_of_ram = 0x10000000;
> + unsigned long avail_ram = end_of_ram - (unsigned long)_end;
> +
> + simple_alloc_init(_end, avail_ram, 32, 64);
> + sequoia_init(NULL, NULL);
> +}
Best regards,
Stefan
^ permalink raw reply
* Re: [PATCH 4/6] PowerPC 440EPx: Sequoia bootwrapper
From: Valentine Barshak @ 2007-07-31 11:19 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev
In-Reply-To: <200707310754.56665.sr@denx.de>
Stefan Roese wrote:
> On Monday 30 July 2007, Valentine Barshak wrote:
>> A bootwrapper code for Sequoia.
>>
>> Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
>> ---
>> arch/powerpc/boot/44x.h | 1
>> arch/powerpc/boot/Makefile | 6
>> arch/powerpc/boot/cuboot-sequoia.c | 31 ++++
>> arch/powerpc/boot/sequoia.c | 234
>> +++++++++++++++++++++++++++++++++++
>> arch/powerpc/boot/treeboot-sequoia.c | 27 ++++
>
> Is treeboot-* really needed on Sequoia? From my understanding this is only
> needed for platforms using OpenBIOS as bootloader.
Right, it's not used for u-boot. I've included it just in case.
>
>> 5 files changed, 297 insertions(+), 2 deletions(-)
>>
>> diff -ruN linux.orig/arch/powerpc/boot/44x.h linux/arch/powerpc/boot/44x.h
>> --- linux.orig/arch/powerpc/boot/44x.h 2007-07-27 20:37:10.000000000 +0400
>> +++ linux/arch/powerpc/boot/44x.h 2007-07-27 20:44:26.000000000 +0400
>> @@ -15,5 +15,6 @@
>>
>> void ibm44x_dbcr_reset(void);
>> void ebony_init(void *mac0, void *mac1);
>> +void sequoia_init(void *mac0, void *mac1);
>>
>> #endif /* _PPC_BOOT_44X_H_ */
>> diff -ruN linux.orig/arch/powerpc/boot/cuboot-sequoia.c
>> linux/arch/powerpc/boot/cuboot-sequoia.c ---
>> linux.orig/arch/powerpc/boot/cuboot-sequoia.c 1970-01-01 03:00:00.000000000
>> +0300 +++ linux/arch/powerpc/boot/cuboot-sequoia.c 2007-07-27
>> 20:44:26.000000000 +0400 @@ -0,0 +1,31 @@
>> +/*
>> + * Old U-boot compatibility for Sequoia
>> + *
>> + * Based on Ebony code by David Gibson <david@gibson.dropbear.id.au>
>> + *
>> + * Copyright 2007 David Gibson, IBM Corporatio.
>> + * Based on cuboot-83xx.c, which is:
>> + * Copyright (c) 2007 Freescale Semiconductor, Inc.
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License version 2 as
>> published + * by the Free Software Foundation.
>> + */
>> +
>> +#include "ops.h"
>> +#include "stdio.h"
>> +#include "44x.h"
>> +#include "cuboot.h"
>> +
>> +#define TARGET_4xx
>> +#define TARGET_44x
>> +#include "ppcboot.h"
>> +
>> +static bd_t bd;
>> +
>> +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
>> + unsigned long r6, unsigned long r7)
>> +{
>> + CUBOOT_INIT();
>> + sequoia_init(&bd.bi_enetaddr, &bd.bi_enet1addr);
>> +}
>> diff -ruN linux.orig/arch/powerpc/boot/Makefile
>> linux/arch/powerpc/boot/Makefile ---
>> linux.orig/arch/powerpc/boot/Makefile 2007-07-27 20:37:10.000000000 +0400
>> +++ linux/arch/powerpc/boot/Makefile 2007-07-27 20:44:26.000000000 +0400 @@
>> -44,10 +44,11 @@
>> src-wlib := string.S crt0.S stdio.c main.c flatdevtree.c
>> flatdevtree_misc.c \ ns16550.c serial.c simple_alloc.c div64.S util.S \
>> gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \
>> - 44x.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c
>> + 44x.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c \
>> + sequoia.c
>> src-plat := of.c cuboot-83xx.c cuboot-85xx.c holly.c \
>> cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
>> - ps3-head.S ps3-hvcall.S ps3.c
>> + ps3-head.S ps3-hvcall.S ps3.c treeboot-sequoia.c cuboot-sequoia.c
>> src-boot := $(src-wlib) $(src-plat) empty.c
>>
>> src-boot := $(addprefix $(obj)/, $(src-boot))
>> @@ -142,6 +143,7 @@
>> image-$(CONFIG_PPC_83xx) += cuImage.83xx
>> image-$(CONFIG_PPC_85xx) += cuImage.85xx
>> image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
>> +image-$(CONFIG_SEQUOIA) += treeImage.sequoia cuImage.sequoia
>> endif
>>
>> # For 32-bit powermacs, build the COFF and miboot images
>> diff -ruN linux.orig/arch/powerpc/boot/sequoia.c
>> linux/arch/powerpc/boot/sequoia.c ---
>> linux.orig/arch/powerpc/boot/sequoia.c 1970-01-01 03:00:00.000000000 +0300
>> +++ linux/arch/powerpc/boot/sequoia.c 2007-07-27 20:59:09.000000000 +0400
>> @@ -0,0 +1,234 @@
>> +/*
>> + * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
>> + * Copyright IBM Corporation, 2007
>> + *
>> + * Based on ebony wrapper:
>> + * Copyright 2007 David Gibson, IBM Corporation.
>> + *
>> + * Clocking code based on code by:
>> + * Stefan Roese <sr@denx.de>
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * as published by the Free Software Foundation; version 2 of the License
>> + */
>> +#include <stdarg.h>
>> +#include <stddef.h>
>> +#include "types.h"
>> +#include "elf.h"
>> +#include "string.h"
>> +#include "stdio.h"
>> +#include "page.h"
>> +#include "ops.h"
>> +#include "dcr.h"
>> +#include "44x.h"
>> +
>> +extern char _dtb_start[];
>> +extern char _dtb_end[];
>> +
>> +static u8 *sequoia_mac0, *sequoia_mac1;
>> +
>> +#define SPRN_CCR1 0x378
>> +void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
>> +{
>> + u32 cpu, plb, opb, ebc, tb, uart0, m, vco;
>> + u32 reg;
>> + u32 fwdva, fwdvb, fbdv, lfbdv, opbdv0, perdv0, spcid0, prbdv0, tmp;
>> +
>> + mtdcr(DCRN_CPR0_ADDR, CPR0_PLLD0);
>> + reg = mfdcr(DCRN_CPR0_DATA);
>
> How about adding mfcpr functions to access the CPR regs. Makes the source
> better readable:
>
> static inline u32 mfcpr(u32 reg)
> {
> mtdcr(DCRN_CPR0_ADDR, reg);
> return mfdcr(DCRN_CPR0_DATA);
> }
>
>> + tmp = (reg & 0x000F0000) >> 16;
>> + fwdva = tmp ? tmp : 16;
>> + tmp = (reg & 0x00000700) >> 8;
>> + fwdvb = tmp ? tmp : 8;
>> + tmp = (reg & 0x1F000000) >> 24;
>> + fbdv = tmp ? tmp : 32;
>> + lfbdv = (reg & 0x0000007F);
>> +
>> + mtdcr(DCRN_CPR0_ADDR, CPR0_OPBD0);
>> + reg = mfdcr(DCRN_CPR0_DATA);
>> + tmp = (reg & 0x03000000) >> 24;
>> + opbdv0 = tmp ? tmp : 4;
>> +
>> + mtdcr(DCRN_CPR0_ADDR, CPR0_PERD0);
>> + reg = mfdcr(DCRN_CPR0_DATA);
>> + tmp = (reg & 0x07000000) >> 24;
>> + perdv0 = tmp ? tmp : 8;
>> +
>> + mtdcr(DCRN_CPR0_ADDR, CPR0_PRIMBD0);
>> + reg = mfdcr(DCRN_CPR0_DATA);
>> + tmp = (reg & 0x07000000) >> 24;
>> + prbdv0 = tmp ? tmp : 8;
>> +
>> + mtdcr(DCRN_CPR0_ADDR, CPR0_SCPID);
>> + reg = mfdcr(DCRN_CPR0_DATA);
>> + tmp = (reg & 0x03000000) >> 24;
>> + spcid0 = tmp ? tmp : 4;
>> +
>> + /* Calculate M */
>> + mtdcr(DCRN_CPR0_ADDR, CPR0_PLLC0);
>> + reg = mfdcr(DCRN_CPR0_DATA);
>> + tmp = (reg & 0x03000000) >> 24;
>> + if (tmp == 0) { /* PLL output */
>> + tmp = (reg & 0x20000000) >> 29;
>> + if (!tmp) /* PLLOUTA */
>> + m = fbdv * lfbdv * fwdva;
>> + else
>> + m = fbdv * lfbdv * fwdvb;
>> + }
>> + else if (tmp == 1) /* CPU output */
>> + m = fbdv * fwdva;
>> + else
>> + m = perdv0 * opbdv0 * fwdvb;
>> +
>> + vco = (m * sysclk) + (m >> 1);
>> + cpu = vco / fwdva;
>> + plb = vco / fwdvb / prbdv0;
>> + opb = plb / opbdv0;
>> + ebc = plb / perdv0;
>> +
>> + /* FIXME */
>> + uart0 = ser_clk;
>> +
>> + /* Figure out timebase. Either CPU or default TmrClk */
>> + asm volatile (
>> + "mfspr %0,%1\n"
>> + :
>> + "=&r"(reg) : "i"(SPRN_CCR1));
>> + if (reg & 0x0080)
>> + tb = 25000000; /* TmrClk is 25MHz */
>> + else
>> + tb = cpu;
>> +
>> + dt_fixup_cpu_clocks(cpu, tb, 0);
>> + dt_fixup_clock("/plb", plb);
>> + dt_fixup_clock("/plb/opb", opb);
>> + dt_fixup_clock("/plb/opb/ebc", ebc);
>> + dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
>> + dt_fixup_clock("/plb/opb/serial@ef600400", uart0);
>> + dt_fixup_clock("/plb/opb/serial@ef600500", uart0);
>> + dt_fixup_clock("/plb/opb/serial@ef600600", uart0);
>> +}
>> +
>> +
>> +/*
>> + * 440EPx DDR1/2 memory controller code
>> + * TODO: move to generic 44x code
>> + */
>> +
>> +/* DDR0_02 */
>> +#define DDR_START 0x1
>> +#define DDR_START_SHIFT 0
>> +#define DDR_MAX_CS_REG 0x3
>> +#define DDR_MAX_CS_REG_SHIFT 24
>> +#define DDR_MAX_COL_REG 0xf
>> +#define DDR_MAX_COL_REG_SHIFT 16
>> +#define DDR_MAX_ROW_REG 0xf
>> +#define DDR_MAX_ROW_REG_SHIFT 8
>> +/* DDR0_08 */
>> +#define DDR_DDR2_MODE 0x1
>> +#define DDR_DDR2_MODE_SHIFT 0
>> +/* DDR0_10 */
>> +#define DDR_CS_MAP 0x3
>> +#define DDR_CS_MAP_SHIFT 8
>> +/* DDR0_14 */
>> +#define DDR_REDUC 0x1
>> +#define DDR_REDUC_SHIFT 16
>> +/* DDR0_42 */
>> +#define DDR_APIN 0x7
>> +#define DDR_APIN_SHIFT 24
>> +/* DDR0_43 */
>> +#define DDR_COL_SZ 0x7
>> +#define DDR_COL_SZ_SHIFT 8
>> +#define DDR_BANK8 0x1
>> +#define DDR_BANK8_SHIFT 0
>> +
>> +#define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask))
>> +
>> +static void ibm440epx_fixup_memsize(void)
>> +{
>> + unsigned long val, max_cs, max_col, max_row;
>> + unsigned long cs, col, row, bank, dpath;
>> + unsigned long memsize;
>> +
>> + mtdcr(DCRN_SDRAM0_CFGADDR, 2);
>> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
>
> Again, mfsdram() functions would be handy here.
>
>> + if (!DDR_GET_VAL(val, DDR_START, DDR_START_SHIFT))
>> + fatal("DDR controller is not initialized\n");
>> +
>> + /* get maximum cs col and row values */
>> + max_cs = DDR_GET_VAL(val, DDR_MAX_CS_REG, DDR_MAX_CS_REG_SHIFT);
>> + max_col = DDR_GET_VAL(val, DDR_MAX_COL_REG, DDR_MAX_COL_REG_SHIFT);
>> + max_row = DDR_GET_VAL(val, DDR_MAX_ROW_REG, DDR_MAX_ROW_REG_SHIFT);
>> +
>> + /* get CS value */
>> + mtdcr(DCRN_SDRAM0_CFGADDR, 10);
>> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
>> +
>> + val = DDR_GET_VAL(val, DDR_CS_MAP, DDR_CS_MAP_SHIFT);
>> + cs = 0;
>> + while (val) {
>> + if (val && 0x1)
>> + cs++;
>> + val = val >> 1;
>> + }
>> +
>> + if (!cs)
>> + fatal("No memory installed\n");
>> + if (cs > max_cs)
>> + fatal("DDR wrong CS configuration\n");
>> +
>> + /* get data path bytes */
>> + mtdcr(DCRN_SDRAM0_CFGADDR, 14);
>> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
>> +
>> + if (DDR_GET_VAL(val, DDR_REDUC, DDR_REDUC_SHIFT))
>> + dpath = 8; /* 64 bits */
>> + else
>> + dpath = 4; /* 32 bits */
>> +
>> + /* get adress pins (rows) */
>> + mtdcr(DCRN_SDRAM0_CFGADDR, 42);
>> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
>> +
>> + row = DDR_GET_VAL(val, DDR_APIN, DDR_APIN_SHIFT);
>> + if (row > max_row)
>> + fatal("DDR wrong APIN configuration\n");
>> + row = max_row - row;
>> +
>> + /* get collomn size and banks */
>> + mtdcr(DCRN_SDRAM0_CFGADDR, 43);
>> + val = mfdcr(DCRN_SDRAM0_CFGDATA);
>> +
>> + col = DDR_GET_VAL(val, DDR_COL_SZ, DDR_COL_SZ_SHIFT);
>> + if (col > max_col)
>> + fatal("DDR wrong COL configuration\n");
>> + col = max_col - col;
>> +
>> + if (DDR_GET_VAL(val, DDR_BANK8, DDR_BANK8_SHIFT))
>> + bank = 8; /* 8 banks */
>> + else
>> + bank = 4; /* 4 banks */
>> +
>> + memsize = cs * (1 << (col+row)) * bank * dpath;
>> + dt_fixup_memory(0, memsize);
>> +}
>> +
>> +static void sequoia_fixups(void)
>> +{
>> + unsigned long sysclk = 33333333;
>
> Blank line after variable declaration please.
>
>> + ibm440ep_fixup_clocks(sysclk, 11059200);
>> + ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
>> + ibm440epx_fixup_memsize();
>> + dt_fixup_mac_addresses(sequoia_mac0, sequoia_mac1);
>> +}
>> +
>> +void sequoia_init(void *mac0, void *mac1)
>> +{
>> + platform_ops.fixups = sequoia_fixups;
>> + platform_ops.exit = ibm44x_dbcr_reset;
>> + sequoia_mac0 = mac0;
>> + sequoia_mac1 = mac1;
>> + ft_init(_dtb_start, 0, 32);
>> + serial_console_init();
>> +}
>> diff -ruN linux.orig/arch/powerpc/boot/treeboot-sequoia.c
>> linux/arch/powerpc/boot/treeboot-sequoia.c ---
>> linux.orig/arch/powerpc/boot/treeboot-sequoia.c 1970-01-01
>> 03:00:00.000000000 +0300 +++
>> linux/arch/powerpc/boot/treeboot-sequoia.c 2007-07-27 20:44:26.000000000
>> +0400 @@ -0,0 +1,27 @@
>> +/*
>> + * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
>> + * Copyright IBM Corporation, 2007
>> + *
>> + * Based on ebony wrapper:
>> + * Copyright 2007 David Gibson, IBM Corporation.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * as published by the Free Software Foundation; version 2 of the License
>> + */
>> +#include "ops.h"
>> +#include "stdio.h"
>> +#include "44x.h"
>> +
>> +extern char _end[];
>> +
>> +BSS_STACK(4096);
>> +
>> +void platform_init(void)
>> +{
>> + unsigned long end_of_ram = 0x10000000;
>> + unsigned long avail_ram = end_of_ram - (unsigned long)_end;
>> +
>> + simple_alloc_init(_end, avail_ram, 32, 64);
>> + sequoia_init(NULL, NULL);
>> +}
>> _______________________________________________
>> Linuxppc-dev mailing list
>> Linuxppc-dev@ozlabs.org
>> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
> Best regards,
> Stefan
>
> =====================================================================
> DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
> =====================================================================
^ permalink raw reply
* Re: [PATCH 0/4][RFC] lro: Generic Large Receive Offload for TCP traffic
From: Jan-Bernd Themann @ 2007-07-31 10:33 UTC (permalink / raw)
To: Andrew Gallatin
Cc: Thomas Klein, Jeff Garzik, Jan-Bernd Themann, netdev,
linux-kernel, linux-ppc, Christoph Raisch, Marcus Eder,
Stefan Roscher, David Miller
In-Reply-To: <46AE4AC9.6060109@myri.com>
Hi,
Thanks for finding these bugs! I'll post an updated version soon (2 patches
with no separate Kconfig patches, one LRO and one eHEA patch). See comments below.
Thanks,
Jan-Bernd
On Monday 30 July 2007 22:32, Andrew Gallatin wrote:
> I was working on testing the myri10ge patch, and I ran into a few
> problems. I've attached a patch to inet_lro.c to fix some of them,
> and a patch to myri10ge.c to show how to use the page based
> interface. Both patches are signed off by Andrew Gallatin
> <gallatin@myri.com>
>
> First, the LRO_MAX_PG_HLEN is still a problem. Minimally sized 60
> byte frames still cause problems in lro_gen_skb due to skb->len
> going negative. Fixed in the attached patch. It may be simpler
> to just drop LRO_MAX_PG_HLEN to ETH_ZLEN, but I'm not sure if
> that is enough. Are there "smart" NICs which might chop off padding
> themselves?
I'd tend to stick to an explicit check as implemented in your patch
for now
>
> Second, you still need to set skb->ip_summed = CHECKSUM_UNNECESSARY
> when modified packets are flushed, else the stack will see bad
> checksums for packets from CHECKSUM_COMPLETE drivers using the
> skb interface. Fixed in the attached patch.
I thought about it... As we do update the TCP checksum for aggregated
packets we could add a second ip_summed field in the net_lro_mgr struct
used for aggregated packets to support HW that does not have any checksum helper
functionality. These drivers could set this ip_summed field to CHECKSUM_NONE,
and thus leave the checksum check to the stack. I'm not sure if these old devices benefit
a lot from LRO. So what do you think?
>
> Fourth, I did some traffic sniffing to try to figure out what's going
> on above, and saw tcpdump complain about bad checksums. Have you tried
> running tcpdump -s 65535 -vvv? Have you also seen bad checksums?
> I seem to see this for both page- and skb-based versions of the driver.
>
Hmmm, can't confirm that. For our skb-based version I see
correct checksums for aggregated packets and for the page-based version as well.
I used: (tcpdump -i ethX -s 0 -w dump.bin) in combination with ethereal.
Don't see problems as well with your tcpdump command.
^ permalink raw reply
* interrupts in mpc8313
From: Yoni Levin @ 2007-07-31 7:53 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 454 bytes --]
Hi, I am working on the MPC8313E board ,
I work with the DMA that works fine, but I want to get the interrupt when it
finish.
I am working under linux 2.6.20
I tried to use the function request_irq :
Ret=Request_irq(71,interrupt_handler,SA_INTERUPT,"dma_irq",NULL);
But I receive an error -ENOSYS
Do I need to do something before call the Request_irq?
You know what is wrong?
Thank you for your help,
Yehonatan.
[-- Attachment #2: Type: text/html, Size: 5406 bytes --]
^ permalink raw reply
* Re: ml403 ac97 driver
From: Joachim Förster @ 2007-07-31 7:50 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <11918008.post@talk.nabble.com>
Hi Qin Lin,
On Mon, 2007-07-30 at 21:22 -0700, Qin Lin wrote:
> 1.add the lm4550 driver to kernel source
> (someboby may can add them as a patch to kernel source)
In fact, in the last few days, I worked on my driver, made changes
according to Grant Likely's list of comments (see the thread where I
announced the driver). And right now, I'm preparing a patch against the
official kernel tree. So, I'll post a patch soon myself - just view more
days.
Joachim
^ permalink raw reply
* [PATCH] [POWERPC] ps3: Fix section mismatch in ps3/setup.c
From: Stephen Rothwell @ 2007-07-31 7:22 UTC (permalink / raw)
To: paulus; +Cc: ppc-dev
WARNING: vmlinux.o(.text+0x605d4): Section mismatch: reference to .init.text:.__alloc_bootmem (between '.prealloc' and '.ps3_power_save')
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
arch/powerpc/platforms/ps3/setup.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
diff --git a/arch/powerpc/platforms/ps3/setup.c b/arch/powerpc/platforms/ps3/setup.c
index aa05288..2952b22 100644
--- a/arch/powerpc/platforms/ps3/setup.c
+++ b/arch/powerpc/platforms/ps3/setup.c
@@ -109,7 +109,7 @@ static void ps3_panic(char *str)
#if defined(CONFIG_FB_PS3) || defined(CONFIG_FB_PS3_MODULE) || \
defined(CONFIG_PS3_FLASH) || defined(CONFIG_PS3_FLASH_MODULE)
-static void prealloc(struct ps3_prealloc *p)
+static void __init prealloc(struct ps3_prealloc *p)
{
if (!p->size)
return;
--
1.5.2.4
^ permalink raw reply related
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