* Re: [PATCH 2/6] PowerPC 440EPx: Sequoia DTS
From: Sergei Shtylyov @ 2007-08-02 15:23 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070801054751.GM31391@localhost.localdomain>
Hello.
David Gibson wrote:
>>Also mine. I've been home sick the last couple of days, but by way of
>>a sharper prod, see my draft work below. It patches both
>>booting-without-of.txt with a revised binding, and implements it in
>>the physmap_of driver (which needs renaming, but that's another
>>story). It also revises the ebony device tree as an example.
>>This is certainly not complete - it defines none of the extra
>>properties that JEDEC chips need (although the mtd drivers'
>>defaults/probing seem to cope for ebony). And there are various other
>>ommisions. Still, it's a starting point - something precise for you
>>to flame Segher :-p.
Let me flame you a bit for starters ;-)
> Duh, forgot to attach the actual patch. Here it is:
> Index: working-2.6/Documentation/powerpc/booting-without-of.txt
> ===================================================================
> --- working-2.6.orig/Documentation/powerpc/booting-without-of.txt 2007-07-30 17:07:14.000000000 +1000
> +++ working-2.6/Documentation/powerpc/booting-without-of.txt 2007-07-30 17:07:14.000000000 +1000
> @@ -1757,45 +1757,23 @@ platforms are moved over to use the flat
> };
> };
>
> - j) Flash chip nodes
> + j) CFI or JEDEC memory-mapped NOR flash
>
> Flash chips (Memory Technology Devices) are often used for solid state
> file systems on embedded devices.
>
> - Required properties:
> + - compatible : should contain the specific model of flash chip(s) used
> + followed by either "cfi-flash" or "jedec-flash"
This "compatible" prop (and the node in whole) doesn't say a thing about
how the flash is mapped into the CPU address space. I strongly disagree that
this node provides enough info to select a driver. :-/
> + - reg : Address range of the flash chip
> + - bank-width : Width (in bytes) of the flash bank. Equal to the device width
> + times the number of interleaved chips.
> + - device-width : (optional) Width of a single flash chip. If omitted,
> + assumed to be equal to 'bank-width'.
Why then not just introduce the "interleave" prop and obsolete the
"bank-width"?
> - Example:
> -
> - flash@ff000000 {
> - device_type = "rom";
> - compatible = "direct-mapped";
> - probe-type = "CFI";
> - reg = <ff000000 01000000>;
> - bank-width = <4>;
> - partitions = <00000000 00f80000
> - 00f80000 00080001>;
> - partition-names = "fs\0firmware";
> - };
Why delete the example? :-/
> + Flash partitions
> + - reg :
> + - read-only : (optional)
All that would look nice but partition is even less of a device than the
original "rom" node was... well, who cares now? :-)
> Index: working-2.6/drivers/mtd/maps/physmap_of.c
> ===================================================================
> --- working-2.6.orig/drivers/mtd/maps/physmap_of.c 2007-07-30 17:07:11.000000000 +1000
> +++ working-2.6/drivers/mtd/maps/physmap_of.c 2007-07-30 17:07:14.000000000 +1000
[...]
> @@ -30,17 +33,72 @@ struct physmap_flash_info {
> struct map_info map;
> struct resource *res;
> #ifdef CONFIG_MTD_PARTITIONS
> - int nr_parts;
> struct mtd_partition *parts;
> #endif
> };
>
> -static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", "map_rom", NULL };
> #ifdef CONFIG_MTD_PARTITIONS
> -static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
> -#endif
> +static int __devinit handle_of_flash_partitions(struct physmap_flash_info *info,
> + struct of_device *dev)
> +{
> + static const char *part_probe_types[]
> + = { "cmdlinepart", "RedBoot", NULL };
> + struct device_node *dp = dev->node, *pp;
> + int nr_parts, i, err;
> +
> + /* First look for RedBoot table or partitions on the command
> + * line, these take precedence over device tree information */
> + nr_parts = parse_mtd_partitions(info->mtd, part_probe_types,
> + &info->parts, 0);
> + if (nr_parts > 0) {
> + add_mtd_partitions(info->mtd, info->parts, err);
> + return 0;
> + }
> +
> + /* First count the subnodes */
> + nr_parts = 0;
> + for (pp = dp->child; pp; pp = pp->sibling)
> + nr_parts++;
> +
> + info->parts = kzalloc(nr_parts * sizeof(struct mtd_partition), GFP_KERNEL);
> + if (!info->parts) {
> + printk(KERN_ERR "Can't allocate the flash partition data!\n");
> + return -ENOMEM;
> + }
> +
> + for (pp = dp->child, i = 0 ; pp; pp = pp->sibling, i++) {
> + const u32 *reg;
> + const char *name;
> + const void *ro;
We hardly need the above 2 variables.
> + int len;
> +
> + reg = of_get_property(pp, "reg", &len);
> + if (! reg || (len != 2*sizeof(u32))) {
Kill the space after !, please.
> + dev_err(&dev->dev, "Invalid 'reg' on %s\n",
> + dp->full_name);
> + err = -EINVAL;
> + goto fail;
> + }
> + info->parts[i].offset = reg[0];
> + info->parts[i].size = reg[1];
> +
> + name = of_get_property(pp, "name", &len);
> + info->parts[i].name = name;
> +
> + ro = of_get_property(pp, "read-only", &len);
> + if (ro)
> + info->parts[i].mask_flags = MTD_WRITEABLE;
> + }
> +
> + add_mtd_partitions(info->mtd, info->parts, nr_parts);
> + return 0;
> +
> + fail:
> + kfree(info->parts);
> + info->parts = NULL;
> + return err;
> +}
Oh, I see that the new partition representation have really simplified
parsing -- this function is hardly shorter than the old one... :-P
> -#ifdef CONFIG_MTD_PARTITIONS
> static int parse_flash_partitions(struct device_node *node,
> struct mtd_partition **parts)
> {
> @@ -79,7 +137,14 @@ static int parse_flash_partitions(struct
> err:
> return retval;
Could get rid of that useless label and goto's in this function, while at
it...
> }
> -#endif
> +#else /* MTD_PARTITIONS */
> +static int __devinit handle_of_flash_partitions(struct physmap_flash_info *info,
> + struct device_node *dev)
> +{
> + add_mtd_device(info->mtd);
> + return 0;
> +}
> +#endif /* MTD_PARTITIONS */
>
> static int of_physmap_remove(struct of_device *dev)
> {
> @@ -115,13 +180,45 @@ static int of_physmap_remove(struct of_d
> return 0;
> }
>
> +/* Helper function to handle probing of the obsolete "direct-mapped"
> + * compatible binding, which has an extra "probe-type" property
> + * describing the type of flash probe necessary. */
Too early to obsolete it, I'm afraid... :-)
> +static struct mtd_info * __devinit obsolete_probe(struct of_device *dev,
> + struct map_info *map)
> +{
> + struct device_node *dp = dev->node;
> + const char *of_probe;
> + struct mtd_info *mtd;
> + static const char *rom_probe_types[]
> + = { "cfi_probe", "jedec_probe", "map_rom"};
> + int i;
> +
> + of_probe = of_get_property(dp, "probe-type", NULL);
> + if (!of_probe) {
> + for (i = 0; i < ARRAY_SIZE(rom_probe_types); i++) {
> + mtd = do_map_probe(rom_probe_types[i], map);
> + if (mtd)
> + return mtd;
> + }
> + return NULL;
> + } else if (strcmp(of_probe, "CFI") == 0) {
> + return do_map_probe("cfi_probe", map);
> + } else if (strcmp(of_probe, "JEDEC") == 0) {
> + return do_map_probe("jedec_probe", map);
> + } else {
> + if (strcmp(of_probe, "ROM") != 0)
> + dev_dbg(&dev->dev, "obsolete_probe: don't know probe type "
> + "'%s', mapping as rom\n", of_probe);
> + return do_map_probe("mtd_rom", map);
> + }
> +}
> +
> static int __devinit of_physmap_probe(struct of_device *dev, const struct of_device_id *match)
> {
> struct device_node *dp = dev->node;
> struct resource res;
> struct physmap_flash_info *info;
> - const char **probe_type;
> - const char *of_probe;
> + const char *probe_type = (const char *)match->data;
> const u32 *width;
> int err;
[...]
> @@ -221,6 +297,14 @@ err_out:
>
> static struct of_device_id of_physmap_match[] = {
> {
> + .compatible = "cfi-flash",
> + .data = (void *)"cfi_probe",
> + },
> + {
> + .compatible = "jedec-flash",
> + .data = (void *)"jedec_probe",
> + },
> + {
This would also trigger on non-linearly mapped CFI or JEDEC flashes which
is not a good idea -- however, as we're using the MTD probing code anyway, it
will just fail, so it's not luckily is not a fatal design flaw.
> .type = "rom",
> .compatible = "direct-mapped"
> },
> Index: working-2.6/arch/powerpc/boot/dts/ebony.dts
> ===================================================================
> --- working-2.6.orig/arch/powerpc/boot/dts/ebony.dts 2007-07-30 17:07:14.000000000 +1000
> +++ working-2.6/arch/powerpc/boot/dts/ebony.dts 2007-07-30 17:07:14.000000000 +1000
[...]
> @@ -158,14 +161,20 @@
> };
>
> large-flash@2,0 {
Hmm... what does @2,0 mean? :-O
> - device_type = "rom";
> - compatible = "direct-mapped";
> - probe-type = "JEDEC";
> + compatible = "jedec-flash";
> bank-width = <1>;
> - partitions = <0 380000
> - 380000 80000>;
> - partition-names = "fs", "firmware";
> +// partitions = <0 380000
> +// 380000 80000>;
> +// partition-names = "fs", "firmware";
> reg = <2 0 400000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
Heh...
> + fs@0 {
> + reg = <0 380000>;
> + };
> + firmware@380000 {
> + reg = <380000 80000>;
I guess the "firmware" should have a "read-only" prop...
> + };
> };
So, I don't see what we're really winning with your changes...
WBR, Sergei
^ permalink raw reply
* Re: [PATCH] [SPI][POWERPC] spi_mpc83xx: in "QE mode" spiclk is sysclk/2
From: Anton Vorontsov @ 2007-08-02 15:27 UTC (permalink / raw)
To: Kumar Gala; +Cc: spi-devel-general, linuxppc-dev
In-Reply-To: <59836CD3-C46E-4B51-8FFE-5F40107CAA85@kernel.crashing.org>
On Thu, Aug 02, 2007 at 10:19:17AM -0500, Kumar Gala wrote:
>
> On Aug 2, 2007, at 9:26 AM, Anton Vorontsov wrote:
>
>> For MPC8349E input to SPIBRG is SYSCLK, but it's SYSCLK/2 for
>> MPC8323E (running in so-called "QE mode").
>
> QE mode or the SPI in QE running in CPU mode?
Yeah, "qe_mode" variable is confusing, but it wasn't me who introduced
it. ;-) So, "the SPI in QE running in CPU mode" is correct.
[ Unrelated to that particular patch.
Probably qe_mode should be renamed to something better, maybe
spi_in_qe? Or we could back to discussion about auto detecting it
somehow. ]
> - k
Thanks,
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [U-Boot-Users] MPC83xx - previous patch to set MBAR
From: Scott Wood @ 2007-08-02 15:28 UTC (permalink / raw)
To: Liu Dave-r63238; +Cc: linuxppc-dev, Phillips Kim-R1AAHA, u-boot-users
In-Reply-To: <995B09A8299C2C44B59866F6391D2635AAD0C5@zch01exm21.fsl.freescale.net>
On Thu, Aug 02, 2007 at 10:14:31AM +0800, Liu Dave-r63238 wrote:
> > MBAR doesn't live up to its name. It's a general-purpose scratch
> > register - the hardware doesn't do anything with it. So, wrt
That doesn't mean there isn't value in setting it, so code can easily
find the IMMR without having to parse the device tree.
-Scott
^ permalink raw reply
* Re: [PATCH] Add support for IDS8247 board
From: Arnd Bergmann @ 2007-08-02 15:38 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <1186047403.11555.3.camel@p60635-ste.ids.de>
On Thursday 02 August 2007, Sergej Stepanov wrote:
> Add support for IDS8247 board from IDS GmbH, Germany
Hi Sergej,
Please split your patch into separate mails for the actual platform
support and for the device drivers.
One problem I see with the platform support is that the code is
not multiplatform capable, which is a problem you apparently copy
over from mpc82xx_ads. Please make sure you don't hardcode any
assumptions in there which will cause problems in a combined kernel.
Details follow below.
> + soc8247@f0000000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + #interrupt-cells = <2>;
> + device_type = "soc";
> + reg = <f0000000 21000>;
You have some whitespace damage here, probably
also elsewhere. Please use tabs for indentation everywhere.
For the soc node, I'd expect to see a ranges property that
maps the local addresses into the global address space,
like
ranges = <f0000000 0 10000000>;
> + cpm2: cpm@f0000000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + device_type = "cpm";
> + model = "CPM2";
> + ranges = <00000000 00000000 20000>;
this doesn't have any children, so why do you have #address-cells,
#size-cells and ranges?
> + reg = <0 20000>;
> + command-proc = <119c0>;
> + brg-frequency = <5E69EC0>;
> + cpm_clk = <BCD3D80>;
> + compatible = "8272";
> + };
> + cpmpic: interrupt-controller@10c00 {
> + #address-cells = <0>;
> + #interrupt-cells = <2>;
> + interrupt-controller;
> + reg = <10c00 80>;
> + built-in;
> + device_type = "cpm-pic";
> + compatible = "CPM2";
> + };
The reg property looks wrong here, unless you have a ranges
property like the one I mentioned above.
> + };
> +
> + flash@ff800000 {
> + device_type = "rom";
> + compatible = "direct-mapped";
> + reg = <ff800000 800000>; /* Default (64MB) */
> + probe-type = "CFI";
> + bank-width = <1>;
> + partitions = <00000000 00200000 /* RO */
> + 00200000 00700000 /* R0 */
> + 00700000 00740000 /* RO */
> + 00740000 00780000>; /* RO */
> + partition-names = "kernel", "cramfs", "u-boot", "env";
> + };
> + flash@e1000000 {
> + device_type = "gen_nand";
> + compatible = "direct-mapped";
> + reg = <e1000000 1000>;
> + partitions = <00000000 01000000 /* RW */
> + 01000000 01000000>;/* RO */
> + partition-names = "IDS8247-NANDBIN", "IDS8247-NANDDATA";
> + };
> + chosen {
> + name = "chosen";
> + bootargs = "root=/dev/nfs rtc-pcf8563.probe=1,0x51 rw nfsroot=192.168.30.54:/home/opt/eldk-4.1/ppc_6xx ip=192.168.30.131:192.168.30.54:192.168.30.1:255.255.255.0:ids8247:eth0:off netconsole=@/,@192.168.30.54";
> + linux,platform = <0>;
> + linux,stdout-path = "/soc8247@f0000000/serial8250@e0008000";
> + };
You probably shouldn't encode your home directory into the bootargs if you want
anyone else to be able to boot your kernel ;-)
> diff -ruN linux-2.6.22.1_orig/arch/powerpc/platforms/82xx/ids8247.h linux-2.6.22.1_ids8247/arch/powerpc/platforms/82xx/ids8247.h
> --- linux-2.6.22.1_orig/arch/powerpc/platforms/82xx/ids8247.h 1970-01-01 01:00:00.000000000 +0100
> +++ linux-2.6.22.1_ids8247/arch/powerpc/platforms/82xx/ids8247.h 2007-08-02 10:15:22.000000000 +0200
> @@ -0,0 +1,52 @@
> +/*
> + * MPC8247 IDS8274 board platform setup
> + *
> + * Author: Sergej Stepanov <Sergej.Stepanov@ids.de>
> + * Copyright (c) 2007, IDS GmbH, Germany
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +#ifdef __KERNEL__
> +#ifndef __IDS8247_PLATFORM
> +#define __IDS8247_PLATFORM
> +
> +
> +#include <linux/seq_file.h>
> +#include <asm/ppcboot.h>
> +#include <asm/irq.h>
> +
> +#define IO_PHYS_ADDR ((uint)0xE0000000)
> +
> +#define CPM_MAP_ADDR ((uint)get_immrbase())
> +#define CPM_IRQ_OFFSET 0
> +
> +#define PHY_INTERRUPT SIU_INT_IRQ2
> +
> +/* For our show_cpuinfo hooks. */
> +#define CPUINFO_VENDOR "Freescale Semiconductor"
> +#define CPUINFO_MACHINE "IDS8247 PowerPC Port by IDS GmbH"
> +
> +/* some info stuff */
> +#define BOOTROM_RESTART_ADDR ((uint)0xFFF00104)
> +
> +#define I2C_ADDR_RTC 0x51
> +#define CFG_NAND_BASE 0xE1000000
> +#define IDS8247_UART_BASE 0xE0008000
> +#define RS_TABLE_SIZE 1
> +#define BASE_BAUD 115200
> +#define IDS8247UARTIRQ SIU_INT_IRQ7
> +#define SERIAL_PORT_DFNS \
> + { 0, 14745600, 0, IDS8247UARTIRQ, \
> + ASYNC_BOOT_AUTOCONF|ASYNC_SKIP_TEST, \
> + iomem_base: (unsigned char *) 0xE0008000, \
> + io_type: SERIAL_IO_MEM},
All these definitions are put into the global name space, which you shouldn't
do for board specific stuff. First, remove all those that are not even used.
If you have any constants left, give them a IDS8247_ prefix and change the
users.
Addresses and interrupt numbers should be read from the device tree, not
hardcoded in the source.
> +void m82xx_calibrate_decr(void);
This should be in a generic header file
> +void mpc82xx_ads_show_cpuinfo(struct seq_file*);
and this one looks wrong as well. you probably should move that
function to a shared file and declare it in a generic header.
> +#endif /* __IDS8274_PLATFORM */
> +#endif /* __KERNEL__ */
> diff -ruN linux-2.6.22.1_orig/arch/powerpc/platforms/82xx/Kconfig linux-2.6.22.1_ids8247/arch/powerpc/platforms/82xx/Kconfig
> --- linux-2.6.22.1_orig/arch/powerpc/platforms/82xx/Kconfig 2007-07-10 20:56:30.000000000 +0200
> +++ linux-2.6.22.1_ids8247/arch/powerpc/platforms/82xx/Kconfig 2007-08-02 10:15:22.000000000 +0200
> @@ -13,6 +13,19 @@
> help
> This option enables support for the MPC8272 ADS board
>
> +config MPC82xx_IDS8247
> + bool "IDS8247 based on MPC8247"
> + select DEFAULT_UIMAGE
> + select 8272
> + select 8260
> + select FSL_SOC
> + select PPC_NATIVE
> + select PPC_UDBG_16550 if SERIAL_8250
> + select WANT_DEVICE_TREE
> + select MTD_NAND
> + help
> + This option enables support for the IDS8247 board
> +
> endchoice
Why select 8272 and 8260 here? they are obviously not the CPUs you are using.
MTD_NAND should also not be autoselected, afaics.
> +
> +#include <sysdev/fsl_soc.h>
> +#include <../sysdev/cpm2_pic.h>
the '..' in there is not needed.
> +#include "ids8247.h"
> +
> +/* FCC1 Clock Source Configuration. These can be redefined in the board specific file.
> + Can only choose from CLK9-10 */
> +#define F1_RXCLK 10
> +#define F1_TXCLK 9
if they are board specific, they should probably be in the device tree.
> +/*
> + Callback function from fs_enet driver.
> +*/
> +void init_fcc_ioports(struct fs_platform_info *fpi)
> +{
> + int fcc_no = fs_get_fcc_index(fpi->fs_no);
> + struct io_port *io;
should probably be __iomem.
> +/*
> + General board setup
> +*/
> +int __init m82xx_board_setup( void)
> +{
> + struct device_node *np;
> + struct io_port *io;
> + io = &((cpm2_map_t *) cpm2_immr)->im_ioport;
same here
> + np = of_find_node_by_type(NULL, "memory");
> + if (!np) {
> + printk(KERN_INFO "No memory node in device tree\n");
> + return 1;
> + }
> + of_node_put(np);
without a memory node, you probably don't even get here ;-)
> +
> +static int __init mpc8247_ids_probe(void)
> +{
> + return 1;
> +}
needs to check the "compatible" property in the root device,
otherwise you misdetect the board in a multiplatform kernel.
> +/* Copied from mpc82xx_ads.c */
> +#define RMR_CSRE 0x00000001
> +static void m82xx_restart(char *cmd)
> +{
> + __volatile__ unsigned char dummy;
> +
> + local_irq_disable();
> + ((cpm2_map_t *) cpm2_immr)->im_clkrst.car_rmr |= RMR_CSRE;
> +
> + /* Clear the ME,EE,IR & DR bits in MSR to cause checkstop */
> + mtmsr(mfmsr() & ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR));
> + dummy = ((cpm2_map_t *) cpm2_immr)->im_clkrst.res[0];
> + printk("Restart failed\n");
> + while (1) ;
> +}
please make this is global function that is shared between all platforms
that want it. It's broken in multiple ways, but we should better have to
fix it only once.
> +/* Copied from mpc82xx_ads.c */
> +static void m82xx_halt(void)
> +{
> + local_irq_disable();
> + while (1) ;
> +}
better put a cpu_relax() or similar in the loop.
> +#ifdef CONFIG_MTD_PHYSMAP
> +/*
> + TODO: the table has to be build in physmap_of
> +*/
> +static struct mtd_partition ids8247_cramfs_partitions[] = {
> + {
> + .name = "kernel",
> + .size = 0x200000,
> + .offset = 0,
> + .mask_flags = 0,
> + },
> + {
> + .name = "cramfs",
> + .offset = 0x200000,
> + .size = 0x500000,
> + .mask_flags = 0,
> + },
> + {
> + .name = "u-boot",
> + .offset = 0x700000,
> + .size = 0x40000,
> + .mask_flags = 0,
> + },
> + {
> + .name = "env",
> + .offset = 0x740000,
> + .size = 0x40000,
> + .mask_flags = 0,
> + }
> +};
don't you have the same information in the device tree already?
Better read it from there so you only have to change it in one
place if the layout changes.
That will also help to consolidate the code with the other platforms
that have a physmap in the device tree.
> +static void mpc82xx_ids8247_nandhwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
> +{
> + struct nand_chip *chip = mtd->priv;
> + if( ctrl & NAND_CTRL_CHANGE) {
> + ctrl &= ~NAND_CTRL_CHANGE;
> + switch( ctrl )
> + {
> + case NAND_CTRL_CLE:
> + *(((volatile __u8 *) chip->IO_ADDR_W) + 0xa) = 0;
> + break;
> + case NAND_CTRL_ALE:
> + *(((volatile __u8 *) chip->IO_ADDR_W) + 0x9) = 0;
> + break;
> + case NAND_NCE:
> + *(((volatile __u8 *) chip->IO_ADDR_W) + 0x8) = 0;
> + break;
> + default:
> + *(((volatile __u8 *) chip->IO_ADDR_W) + 0xc) = 0;
> + }
> + }
Use out_8 here, instead of writing to a volatile pointer.
> + if (cmd != NAND_CMD_NONE)
> + out_8(chip->IO_ADDR_W, (char)cmd);
> +}
> +error:
> + of_node_put(np);
> + kfree(pdata);
> + platform_device_unregister(nanddevice);
> + return ret;
> +
> +}
whitespace damaged.
> +static int __init mpc82xx_ids8247_i2c_setup(void)
> +{
> + int ret = 0;
> + struct platform_device *i2c_dev;
> + struct fsl_i2c_platform_data i2c_data;
> +
> + i2c_data.device_flags = 0;
> + i2c_dev = platform_device_register_simple("bb-i2c", 0, NULL, 0);
> + if (IS_ERR(i2c_dev)) {
> + ret = PTR_ERR(i2c_dev);
> + return ret;
> + }
> + ret = platform_device_add_data(i2c_dev,
> + &i2c_data,
> + sizeof(struct fsl_i2c_platform_data));
> + if(ret)
> + {
> + platform_device_unregister(i2c_dev);
> + return ret;
> + }
> +
> + return 0;
> +}
> +arch_initcall(mpc82xx_ids8247_i2c_setup);
Why not make this an of_platform_driver? That would avoid having
to split the driver to two files, and be cleaner in general.
> diff -ruN linux-2.6.22.1_orig/arch/powerpc/platforms/82xx/mpc82xx.c linux-2.6.22.1_ids8247/arch/powerpc/platforms/82xx/mpc82xx.c
> --- linux-2.6.22.1_orig/arch/powerpc/platforms/82xx/mpc82xx.c 2007-07-10 20:56:30.000000000 +0200
> +++ linux-2.6.22.1_ids8247/arch/powerpc/platforms/82xx/mpc82xx.c 2007-08-02 10:15:22.000000000 +0200
> @@ -50,7 +50,13 @@
> #include <sysdev/fsl_soc.h>
> #include <sysdev/cpm2_pic.h>
>
> +#ifdef CONFIG_MPC82xx_ADS
> #include "pq2ads.h"
> +#endif
> +
> +#ifdef CONFIG_MPC82xx_IDS8247
> +#include "ids8247.h"
> +#endif
>
This doesn't fly. You have to define the headers in a way that you can
include them concurrently in order to allow multiplatform builds.
> diff -ruN linux-2.6.22.1_orig/drivers/net/fs_enet/mii-bitbang.c linux-2.6.22.1_ids8247/drivers/net/fs_enet/mii-bitbang.c
> --- linux-2.6.22.1_orig/drivers/net/fs_enet/mii-bitbang.c 2007-07-10 20:56:30.000000000 +0200
> +++ linux-2.6.22.1_ids8247/drivers/net/fs_enet/mii-bitbang.c 2007-08-02 10:15:22.000000000 +0200
> @@ -336,7 +336,11 @@
> new_bus->reset = &fs_enet_mii_bb_reset,
> new_bus->id = pdev->id;
>
> +#ifndef CONFIG_MPC82xx_IDS8247
> new_bus->phy_mask = ~0x9;
> +#else
> + new_bus->phy_mask = ~0x2;
> +#endif
> pdata = (struct fs_mii_bb_platform_info *)pdev->dev.platform_data;
>
> if (NULL == pdata) {
Same here, this should be read from the device tree so you don't need
to hardcode it based on CONFIG symbols.
> diff -ruN linux-2.6.22.1_orig/include/asm-powerpc/mpc8260.h linux-2.6.22.1_ids8247/include/asm-powerpc/mpc8260.h
> --- linux-2.6.22.1_orig/include/asm-powerpc/mpc8260.h 2007-07-10 20:56:30.000000000 +0200
> +++ linux-2.6.22.1_ids8247/include/asm-powerpc/mpc8260.h 2007-08-02 10:15:22.000000000 +0200
> @@ -19,6 +19,10 @@
> #include <platforms/82xx/m82xx_pci.h>
> #endif
>
> +#ifdef CONFIG_MPC82xx_IDS8247
> +#include <platforms/82xx/ids8247.h>
> +#endif
> +
> #endif /* CONFIG_8260 */
> #endif /* !__ASM_POWERPC_MPC8260_H__ */
> #endif /* __KERNEL__ */
And finally, same problem here.
Arnd <><
^ permalink raw reply
* RE: GPIO interrupts on mpc8313e
From: Yoni Levin @ 2007-08-02 15:38 UTC (permalink / raw)
To: 'Scott Wood'; +Cc: linuxppc-embedded
In-Reply-To: <46B1F5E1.6000301@freescale.com>
myirq=74
-----Original Message-----
From: Scott Wood [mailto:scottwood@freescale.com]
Sent: Thursday, August 02, 2007 6:19 PM
To: Yoni Levin
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: GPIO interrupts on mpc8313e
Yoni Levin wrote:
> Yes, I removed the flag (0) and nothing change in both cases the
request_irq
> return 0 which is good.
> Then I added enable_irq and I recived :
>
> Unbalanced enable for IRQ 74
Yeah, sorry, I misremembered what IRQF_DISABLED does. As Domen pointed
out, you need to pass myirq, not 74, to request_irq().
> void CreateGPIOHandler()
> {
>
> unsigned int myirq=irq_create_mapping(NULL,74);
> enable_irq(74);
> printk("myirq is : %d \n",myirq);
> int ret;
>
> ret=- request_irq(74, GPIOinterrupt_handler,0, "GPIO", NULL);
> printk("ret is : %d \n",ret);
>
>
> }
Even if IRQF_DISABLED did do what I thought it did (I was thinking of
IRQ_NOAUTOEN, which is apparently an ARM-only thing), you should never
call enable_irq() before request_irq(), or without previously disabling
it (either explicitly or via IRQ_NOAUTOEN).
-Scott
^ permalink raw reply
* Re: GPIO interrupts on mpc8313e
From: Scott Wood @ 2007-08-02 15:40 UTC (permalink / raw)
To: Yoni Levin; +Cc: linuxppc-embedded
In-Reply-To: <B6DEC8DD6C474CED998B80706BFC4BCC.MAI@mail.livedns.co.il>
Yoni Levin wrote:
> myirq=74
OK, that's obviously not the problem then, but you still shouldn't rely
on them being equal.
Try dumping the PIC registers to see which interrupts (if any) are
actually pending.
-Scott
^ permalink raw reply
* Re: [U-Boot-Users] MPC83xx - previous patch to set MBAR
From: Kumar Gala @ 2007-08-02 16:12 UTC (permalink / raw)
To: Scott Wood
Cc: linuxppc-dev, Phillips Kim-R1AAHA, Liu Dave-r63238, u-boot-users
In-Reply-To: <20070802152846.GA4468@ld0162-tx32.am.freescale.net>
On Aug 2, 2007, at 10:28 AM, Scott Wood wrote:
> On Thu, Aug 02, 2007 at 10:14:31AM +0800, Liu Dave-r63238 wrote:
>>> MBAR doesn't live up to its name. It's a general-purpose scratch
>>> register - the hardware doesn't do anything with it. So, wrt
>
> That doesn't mean there isn't value in setting it, so code can easily
> find the IMMR without having to parse the device tree.
It could be, but there isn't really any value in doing this since its
in the device-tree and we have to find it for 85xx, 86xx, and pretty
much all our parts.
- k
^ permalink raw reply
* Re: [PATCH] lite5200b: flash definition in dts
From: Scott Wood @ 2007-08-02 16:56 UTC (permalink / raw)
To: Grant Likely; +Cc: Domen Puncer, linuxppc-embedded
In-Reply-To: <fa686aa40708012323p2eca4b05pd47acac635cf6370@mail.gmail.com>
On Thu, Aug 02, 2007 at 12:23:31AM -0600, Grant Likely wrote:
> On the other hand there is PCI whose control registers fall within the
> SoC range; but the memory windows absolutely do not. If my flash
> argument holds water, then where does that leave PCI which kind of
> straddles the fence.
IMHO, PCI should be split into a bus node that sits outside the SoC, and
a control node that sits inside, with phandles between the two.
-Scott
^ permalink raw reply
* [RFC][PATCH v2 0/2] SPI support for fsl_soc and mpc832x_rdb
From: Anton Vorontsov @ 2007-08-02 17:33 UTC (permalink / raw)
To: linuxppc-dev
Hi all,
Thanks for the previous review! Here is updated version, also needs
your comments.
Changelog:
o Device tree:
- cosmetic cleanups (@01 -> @1);
- device-id renamed to fsl,device-id;
- removed max-chipselect and sysclk properties from spi node;
- removed chipselect property from mmc node, now reg property
used for this purpose, thereby address-cells and size-cells
added to the spi node;
- other non-mandatory (device-id, device_type, compatible, ...)
properties removed from mmc node, today board file is using
of_find_node_by_name(), instead of of_find_compatible_node();
- "qe" mode renamed to "cpu-qe".
o board file <-> fsl_soc interaction
- fsl_soc no longer scans for SPI nodes in the arch initcall.
Also it's no longer exports any global variables. Instead, it's
export fsl_spi_init function now, which accepts pointer to the
fsl_spi_board_info structure;
- board file fills fsl_spi_board_info structure and issues
fsl_spi_init(), which register SPI devices and SPI board infos.
Various sanity checks also perfromed.
I'd want to note that if spi_mpc83xx will be converted to
of_platform_driver then the scheme described above will not
work anymore, and I'll have to revert back ugly hacks:
global variables for activate/deactivate_cs functions. I see
no other options.
Thanks!
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* [PATCH v2 1/2] [RFC][POWERPC] MPC832x_RDB: update dts to use spi, register mmc_spi stub
From: Anton Vorontsov @ 2007-08-02 17:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070802173335.GA25369@localhost.localdomain>
mmc_spi already tested to work. When it will hit mainline
the only change that will be needed is replacing "spidev"
by "mmc_spi".
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/boot/dts/mpc832x_rdb.dts | 27 +++++++++++++-
arch/powerpc/platforms/83xx/mpc832x_rdb.c | 55 +++++++++++++++++++++++++++++
2 files changed, 81 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index e9c332f..5ed92ca 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -183,6 +183,21 @@
1 c 1 0 1 0 /* TX_EN */
1 d 2 0 1 0>; /* CRS */
};
+ spi1pio: spi_pin@1 {
+ pio-map = <
+ /* port pin dir open_drain assignment has_irq */
+ 3 0 3 0 1 0 /* SPI1 MOSI, I/O */
+ 3 1 3 0 1 0 /* SPI1 MISO, I/O */
+ 3 2 3 0 1 0 /* SPI1 CLK, I/O */
+ 3 3 2 0 1 0>; /* SPI1 SEL, I */
+ };
+ mmc0pio: mmc_pin@0 {
+ pio-map = <
+ /* port pin dir open_drain assignment has_irq */
+ 3 d 1 0 0 0 /* !SD_CS */
+ 3 e 2 0 0 0 /* SD_INSERT */
+ 3 f 2 0 0 0>; /* SD_PROTECT */
+ };
};
};
@@ -206,16 +221,26 @@
};
spi@4c0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
device_type = "spi";
+ fsl,device-id = <1>;
compatible = "fsl_spi";
reg = <4c0 40>;
interrupts = <2>;
interrupt-parent = <&qeic>;
- mode = "cpu";
+ mode = "cpu-qe";
+ pio-handle = <&spi1pio>;
+
+ mmc@0 {
+ reg = <0>;
+ pio-handle = <&mmc0pio>;
+ };
};
spi@500 {
device_type = "spi";
+ fsl,device-id = <2>;
compatible = "fsl_spi";
reg = <500 40>;
interrupts = <1>;
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
index 93ba957..4cc938f 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
@@ -15,6 +15,7 @@
*/
#include <linux/pci.h>
+#include <linux/spi/spi.h>
#include <asm/of_platform.h>
#include <asm/time.h>
@@ -24,6 +25,7 @@
#include <asm/qe_ic.h>
#include "mpc83xx.h"
+#include "../../sysdev/fsl_soc.h"
#undef DEBUG
#ifdef DEBUG
@@ -32,6 +34,55 @@
#define DBG(fmt...)
#endif
+extern int par_io_data_set(u8 port, u8 pin, u8 val);
+
+static void mpc83xx_spi_activate_cs(u8 cs, u8 polarity)
+{
+ pr_debug("%s %d %d\n", __func__, cs, polarity);
+ par_io_data_set(3, 13, polarity);
+}
+
+static void mpc83xx_spi_deactivate_cs(u8 cs, u8 polarity)
+{
+ pr_debug("%s %d %d\n", __func__, cs, polarity);
+ par_io_data_set(3, 13, !polarity);
+}
+
+static struct spi_board_info mpc832x_spi_boardinfo = {
+ .bus_num = 1,
+ /*
+ * XXX: This is spidev (spi in userspace) stub, should
+ * be replaced by "mmc_spi" when mmc_spi will hit mainline.
+ */
+ .modalias = "spidev",
+};
+
+static struct fsl_spi_board_info fsl_spi_board_info = {
+ .activate_cs = mpc83xx_spi_activate_cs,
+ .deactivate_cs = mpc83xx_spi_deactivate_cs,
+ .board_infos = &mpc832x_spi_boardinfo,
+ .num_board_infos = 1,
+};
+
+static int __init mpc832x_spi_init(void)
+{
+ struct device_node *np;
+
+ np = of_find_node_by_name(NULL, "mmc");
+ if (!np) {
+ printk(KERN_ERR "%s: could not find mmc node\n", __func__);
+ return -ENODEV;
+ }
+
+ mpc832x_spi_boardinfo.chip_select = *((u32 *)of_get_property(np,
+ "reg", NULL));
+ mpc832x_spi_boardinfo.max_speed_hz = 50000000;
+
+ return fsl_spi_init(&fsl_spi_board_info);
+}
+
+device_initcall(mpc832x_spi_init);
+
/* ************************************************************************
*
* Setup the architecture
@@ -62,6 +113,10 @@ static void __init mpc832x_rdb_setup_arch(void)
for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
par_io_of_config(np);
+ for (np = NULL; (np = of_find_node_by_name(np, "spi")) != NULL;)
+ par_io_of_config(np);
+ for (np = NULL; (np = of_find_node_by_name(np, "mmc")) != NULL;)
+ par_io_of_config(np);
}
#endif /* CONFIG_QUICC_ENGINE */
}
--
1.5.0.6
^ permalink raw reply related
* [PATCH v2 2/2] [RFC][POWERPC] fsl_soc: add support for fsl_spi
From: Anton Vorontsov @ 2007-08-02 17:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070802173335.GA25369@localhost.localdomain>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/sysdev/fsl_soc.c | 109 +++++++++++++++++++++++++++++++++++++++++
arch/powerpc/sysdev/fsl_soc.h | 12 +++++
2 files changed, 121 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 727453d..8c0576d 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -23,6 +23,7 @@
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/phy.h>
+#include <linux/spi/spi.h>
#include <linux/fsl_devices.h>
#include <linux/fs_enet_pd.h>
#include <linux/fs_uart_pd.h>
@@ -1186,3 +1187,111 @@ err:
arch_initcall(cpm_smc_uart_of_init);
#endif /* CONFIG_8xx */
+
+static int fsl_spi_get_max_chipselect(struct device_node *spi_node,
+ struct fsl_spi_board_info *binfo,
+ s16 bus_num)
+{
+ struct device_node *child = NULL;
+ unsigned int i = 0;
+ unsigned int dt_num_children = 0;
+ unsigned int bi_num_children = 0;
+
+ while ((child = of_get_next_child(spi_node, child)))
+ dt_num_children++;
+
+ for (; i < binfo->num_board_infos; i++) {
+ if (binfo->board_infos[i].bus_num == bus_num)
+ bi_num_children++;
+ }
+
+ if (dt_num_children != bi_num_children) {
+ printk(KERN_WARNING "%s: board file and device tree are "
+ "disagreeing about max chipselects: %d vs %d\n",
+ __func__, bi_num_children, dt_num_children);
+ }
+
+ return max(dt_num_children, bi_num_children);
+}
+
+int fsl_spi_init(struct fsl_spi_board_info *binfo)
+{
+ struct device_node *np;
+ unsigned int i;
+ u32 sysclk;
+
+ np = of_find_node_by_type(NULL, "qe");
+ if (!np)
+ return -ENODEV;
+
+ sysclk = *(u32 *)of_get_property(np, "bus-frequency", NULL);
+
+ for (np = NULL, i = 1;
+ (np = of_find_compatible_node(np, "spi", "fsl_spi")) != NULL;
+ i++) {
+ int ret = 0;
+ const char *devid;
+ const char *mode;
+ struct resource res[2];
+ struct platform_device *pdev = NULL;
+ struct fsl_spi_platform_data pdata = {
+ .activate_cs = binfo->activate_cs,
+ .deactivate_cs = binfo->deactivate_cs,
+ };
+
+ memset(res, 0, sizeof(res));
+
+ devid = of_get_property(np, "fsl,device-id", NULL);
+ mode = of_get_property(np, "mode", NULL);
+ if (!devid || !mode)
+ goto err;
+
+ pdata.sysclk = sysclk;
+ pdata.bus_num = *(u32 *)devid;
+ pdata.max_chipselect = fsl_spi_get_max_chipselect(np, binfo,
+ pdata.bus_num);
+ if (!pdata.max_chipselect)
+ goto err;
+
+ if (!strcmp(mode, "cpu-qe"))
+ pdata.qe_mode = 1;
+
+ ret = of_address_to_resource(np, 0, &res[0]);
+ if (ret)
+ goto err;
+
+ res[1].start = res[2].end = irq_of_parse_and_map(np, 0);
+ if (res[1].start == NO_IRQ)
+ goto err;
+
+ res[1].name = "mpc83xx_spi";
+ res[1].flags = IORESOURCE_IRQ;;
+
+ pdev = platform_device_alloc("mpc83xx_spi", i);
+ if (!pdev)
+ goto err;
+
+ ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+ if (ret)
+ goto unreg;
+
+ ret = platform_device_add_resources(pdev, res,
+ ARRAY_SIZE(res));
+ if (ret)
+ goto unreg;
+
+ ret = platform_device_register(pdev);
+ if (ret)
+ goto unreg;
+
+ continue;
+unreg:
+ platform_device_del(pdev);
+err:
+ continue;
+ }
+
+ return spi_register_board_info(binfo->board_infos,
+ binfo->num_board_infos);
+}
+EXPORT_SYMBOL(fsl_spi_init);
diff --git a/arch/powerpc/sysdev/fsl_soc.h b/arch/powerpc/sysdev/fsl_soc.h
index 04e145b..a83998d 100644
--- a/arch/powerpc/sysdev/fsl_soc.h
+++ b/arch/powerpc/sysdev/fsl_soc.h
@@ -8,5 +8,17 @@ extern phys_addr_t get_immrbase(void);
extern u32 get_brgfreq(void);
extern u32 get_baudrate(void);
+struct spi_board_info;
+
+struct fsl_spi_board_info {
+ struct spi_board_info *board_infos;
+ unsigned int num_board_infos;
+
+ void (*activate_cs)(u8 cs, u8 polarity);
+ void (*deactivate_cs)(u8 cs, u8 polarity);
+};
+
+extern int fsl_spi_init(struct fsl_spi_board_info *info);
+
#endif
#endif
--
1.5.0.6
^ permalink raw reply related
* [PATCH v3 2/3] powerpc: create pci err platform device for EDAC on mpc85xx
From: Dave Jiang @ 2007-08-02 18:04 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev, bluesmoke-devel, norsk5
In-Reply-To: <20070731220749.GB29780@blade.az.mvista.com>
Creating a platform device for the PCI error registers in order for the
mpc85xx EDAC driver to pick up proper resources. This is to prevent the EDAC
driver from monopolizing the of_device and thus preventing future PCI code from
using the PCI of_device(s).
Signed-off-by: Dave Jiang <djiang@mvista.com>
---
Code reworked to setup the platform device as a child of the PCI of_device.
The routine has to be called after device_initcall() due to having to wait
for the of_device to be setup first in order to pick up the parent.
arch/powerpc/sysdev/fsl_pci.c | 52 +++++++++++++++++++++++++++++++++++++++++
1 files changed, 52 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 9fb0ce5..a769bbb 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -19,6 +19,8 @@
#include <linux/string.h>
#include <linux/init.h>
#include <linux/bootmem.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
#include <asm/io.h>
#include <asm/prom.h>
@@ -27,6 +29,56 @@
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
+#ifdef CONFIG_85xx
+/* setting up 85xx PCI error platform device for EDAC consumption */
+static int __init mpc85xx_pcierr_setup(void)
+{
+ struct device_node *np = NULL;
+ struct of_device *of_dev;
+ struct platform_device *pdev;
+ struct resource res[2];
+ int id = 0;
+ int err;
+
+ for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") {
+ memset(res, 0, sizeof(struct resource) * 2);
+ if (of_address_to_resource(np, 0, &res[0])) {
+ printk(KERN_WARNING "Can't get pci register base!\n");
+ continue;
+ }
+
+ /* move start to where the error registers are */
+ res[0].start += 0xe00;
+
+ of_irq_to_resource(np, 0, &res[1]);
+
+ of_dev = of_find_device_by_node(np);
+ if (!of_dev)
+ return -ENODEV;
+
+ pdev = platform_device_alloc("mpc85xx_pci_err", id++);
+ if (!pdev)
+ return -ENOMEM;
+
+ err = platform_device_add_resources(pdev, res, 2);
+ if (err)
+ goto error;
+
+ pdev->dev.parent = &of_dev->dev;
+
+ err = platform_device_add(pdev);
+ if (err)
+ goto error;
+ }
+ return 0;
+
+error:
+ platform_device_put(pdev);
+ return err;
+}
+late_initcall(mpc85xx_pcierr_setup);
+#endif
+
/* atmu setup for fsl pci/pcie controller */
void __init setup_pci_atmu(struct pci_controller *hose, struct resource *rsrc)
{
^ permalink raw reply related
* Re: Reboot Command Makes kernel to hang (MPC8560)
From: Clemens Koller @ 2007-08-02 18:29 UTC (permalink / raw)
To: Ansari; +Cc: linuxppc-embedded
In-Reply-To: <000b01c7d4d1$1ac37920$9503a8c0@Ansari>
Hi, Ansari!
Ansari schrieb:
> Hi Koller & Kumar
>
> Thanks for ur reply.
>
> Is there a way to reset the full chip (MPC8560) whenever core reset
> occurs (using hardware or software) ??
I recommend you to have a look at i.e. the MPC8540ADS reference design
(as an example, the 8560 should be similar) to see how the reset signals
are realized. I didn't run into problems with the reset circuitry.
u-boot resets my thing by issung a "reset" and linux does the same when
I do a "shutdown -r now" or similar thing.
Read the code at these places what's happening there.
AFAICT this is not done by enabling the Watchdog and wait
until it triggers. (Hence, that would be interesting to try...)
In your case I would have a look at the ramdisk code to see where it/what
fails in the first place.
Regards,
--
Clemens Koller
__________________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Straße 45/1
Linhof Werksgelände
D-81379 München
Tel.089-741518-50
Fax 089-741518-19
http://www.anagramm-technology.com
^ permalink raw reply
* Re: [PATCH v2 1/2] [RFC][POWERPC] MPC832x_RDB: update dts to use spi, register mmc_spi stub
From: Kumar Gala @ 2007-08-02 18:58 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev
In-Reply-To: <20070802173536.GA25643@localhost.localdomain>
On Aug 2, 2007, at 12:35 PM, Anton Vorontsov wrote:
> mmc_spi already tested to work. When it will hit mainline
> the only change that will be needed is replacing "spidev"
> by "mmc_spi".
>
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> ---
> arch/powerpc/boot/dts/mpc832x_rdb.dts | 27 +++++++++++++-
> arch/powerpc/platforms/83xx/mpc832x_rdb.c | 55 ++++++++++++++++++
> +++++++++++
> 2 files changed, 81 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/
> boot/dts/mpc832x_rdb.dts
> index e9c332f..5ed92ca 100644
> --- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
> +++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
> @@ -183,6 +183,21 @@
[snip]
> @@ -206,16 +221,26 @@
> };
>
> spi@4c0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> device_type = "spi";
> + fsl,device-id = <1>;
> compatible = "fsl_spi";
> reg = <4c0 40>;
> interrupts = <2>;
> interrupt-parent = <&qeic>;
> - mode = "cpu";
> + mode = "cpu-qe";
> + pio-handle = <&spi1pio>;
> +
> + mmc@0 {
> + reg = <0>;
> + pio-handle = <&mmc0pio>;
> + };
> };
I'm still against this. Why don't we just do this in 83xx/mpc832x_rdb.c
- k
^ permalink raw reply
* Open Firmware - dts file
From: Siva Prasad @ 2007-08-02 19:21 UTC (permalink / raw)
To: linuxppc-dev
Hi,
I am trying to understand ..
1) How a given dts file is embedded into the zImage (how about vmlinux?)
2) Where does it get stored for later access during booting?
3) How a specific dts file out of the available in /boot/dts directory
is chosen?
I am a newbie to this open firmware thing and looking for the right
pointer to get started.
Thanks in advance
- Siva
^ permalink raw reply
* Re: [ PATCH ] PowerPC cascade UIC IRQ handler fix.
From: Josh Boyer @ 2007-08-02 20:08 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070802034848.GA837@localhost.localdomain>
On Thu, 2 Aug 2007 13:48:48 +1000
David Gibson <david@gibson.dropbear.id.au> wrote:
> On Mon, Jul 30, 2007 at 08:35:17PM +0400, Valentine Barshak wrote:
> > PPC44x cascade UIC irq handler fix.
> >
> > According to PPC44x UM, if an interrupt is configured as
> > level-sensitive, and a clear is attempted on the UIC_SR, the UIC_SR
> > field is not cleared if the incoming interrupt signal is at the
> > asserted polarity. This causes us to enter a cascade handler twice,
> > since we first ack parent UIC interrupt and ack child UIC one after
> > that. The patch checks child UIC msr value and returns IRQ_HANDLED
> > if there're no pending interrupts. Otherwise we get a kernel panic
> > with a "Fatal exception in interrupt" (illegal vector).
> > The patch also fixes status flags.
> >
> > Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
>
> Hrm... This doesn't seem like the right fix to me. Instead, I think
> the cascaded IRQ handler should ack the interrupt on the child first.
> I'm a little surprised it doesn't at the moment.
Agreed. Anyone going to hack up a patch for that?
josh
^ permalink raw reply
* Re: [PATCH 2/6] PowerPC 440EPx: Sequoia DTS
From: Josh Boyer @ 2007-08-02 20:15 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070801020836.GB31391@localhost.localdomain>
On Wed, 1 Aug 2007 12:08:36 +1000
David Gibson <david@gibson.dropbear.id.au> wrote:
> On Mon, Jul 30, 2007 at 07:06:48PM +0400, Valentine Barshak wrote:
> > AMCC Sequoia board DTS
> >
> > Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
> > ---
> > arch/powerpc/boot/dts/sequoia.dts | 292
> > ++++++++++++++++++++++++++++++++++++++ 1 files changed, 292
> > insertions(+)
> >
> > diff -ruN linux.orig/arch/powerpc/boot/dts/sequoia.dts
> > linux/arch/powerpc/boot/dts/sequoia.dts ---
> > linux.orig/arch/powerpc/boot/dts/sequoia.dts 1970-01-01
> > 03:00:00.000000000 +0300 +++
> > linux/arch/powerpc/boot/dts/sequoia.dts 2007-07-27
> > 20:44:26.000000000 +0400 @@ -0,0 +1,292 @@ +/*
> > + * Device Tree Source for AMCC Sequoia
> > + *
> > + * Based on Bamboo code by Josh Boyer <jwboyer@linux.vnet.ibm.com>
> > + * Copyright (c) 2006, 2007 IBM Corp.
> > + *
> > + * FIXME: Draft only!
> > + *
> > + * This file is licensed under the terms of the GNU General Public
> > + * License version 2. This program is licensed "as is" without
> > + * any warranty of any kind, whether express or implied.
> > + *
> > + * To build:
> > + * dtc -I dts -O asm -o bamboo.S -b 0 sequoia.dts
> > + * dtc -I dts -O dtb -o bamboo.dtb -b 0 sequoia.dts
>
> Needs updating to remove the bamboo references. In fact we can
> probably get rid of this "To build" comment that's been copied to just
> about every dts ever.
>
> > + */
> > +
> > +/ {
> > + #address-cells = <2>;
> > + #size-cells = <1>;
> > + model = "amcc,sequoia";
> > + compatible = "amcc,sequoia";
> > + dcr-parent = <&/cpus/PowerPC,440EPx@0>;
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + PowerPC,440EPx@0 {
> > + device_type = "cpu";
> > + reg = <0>;
> > + clock-frequency = <0>; /* Filled in by
> > zImage */
> > + timebase-frequency = <0>; /* Filled in by
> > zImage */
> > + i-cache-line-size = <20>;
> > + d-cache-line-size = <20>;
> > + i-cache-size = <8000>;
> > + d-cache-size = <8000>;
> > + dcr-controller;
> > + dcr-access-method = "native";
> > + };
> > + };
> > +
> > + memory {
> > + device_type = "memory";
> > + reg = <0 0 0>; /* Filled in by zImage */
> > + };
> > +
> > + UIC0: interrupt-controller0 {
> > + compatible = "ibm,uic-440gp","ibm,uic";
>
> The first compatible entry should always be the precise model, so in
> this case "ibm,uic-440epx". If it is (supposed to be) identical to
> the UIC in the 440GP, it can also have an "ibm,uic-440gp" entry, but
> since I believe all the UICs are supposed to operate the same, I think
> that's implicit in the "ibm,uic" entry.
Most UICs are the same. There are some oddball chips that either hide
particular registers because they are unused, or they change the
addressing stride. I'm not sure that is a common enough case to worry
about now though.
josh
^ permalink raw reply
* Re: [PATCH 2/6] PowerPC 440EPx: Sequoia DTS
From: Josh Boyer @ 2007-08-02 20:16 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070801050422.GI31391@localhost.localdomain>
On Wed, 1 Aug 2007 15:04:22 +1000
David Gibson <david@gibson.dropbear.id.au> wrote:
> On Wed, Aug 01, 2007 at 06:57:33AM +0200, Segher Boessenkool wrote:
> > >> + UIC0: interrupt-controller0 {
> > >> + compatible = "ibm,uic-440gp","ibm,uic";
> > >
> > > The first compatible entry should always be the precise model, so
> > > in this case "ibm,uic-440epx".
> >
> > This isn't really _required_, but it is a very good idea in
> > almost all cases (the exception is for very generic or legacy
> > devices).
>
> Well, yes. That's a "should" not a "must" in rfc-speak.
>
> > > If it is (supposed to be) identical to
> > > the UIC in the 440GP, it can also have an "ibm,uic-440gp" entry,
> > > but since I believe all the UICs are supposed to operate the
> > > same, I think that's implicit in the "ibm,uic" entry.
> >
> > Sure, but there is no harm in having the better qualified 440gp
> > name in there as well -- bytes are cheap :-)
> >
> > >> + SDR0: sdr {
> > >
> > > What is the SDR?
> > >
> > >> + compatible = "ibm,sdr-440ep";
> > >> + dcr-reg = <00e 002>;
> > >> + };
> > >> +
> > >> + CPR0: cpr {
> > >
> > > And the CPR?
> >
> > Yeah, better names please -- if possible, something that someone
> > without knowledge of this SoC will understand what it is.
>
> I think the names are probably ok - I'm assuming they're in keeping
> with the convention I've used of using the same names / abbreviations
> as in the CPU user manual. I'm asking just for my own information,
> although a comment might not be a bad idea.
Yes, they are the names used in the user manual. I'd prefer to keep
them as is.
And yeah, they are similar to the macros found on 440GP. But not the
same, hence a different name.
josh
^ permalink raw reply
* Re: [PATCH 2/6] PowerPC 440EPx: Sequoia DTS
From: Josh Boyer @ 2007-08-02 20:18 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070801054751.GM31391@localhost.localdomain>
On Wed, 1 Aug 2007 15:47:51 +1000
David Gibson <david@gibson.dropbear.id.au> wrote:
>
> Duh, forgot to attach the actual patch. Here it is:
So, no signed-off-by. Intentional, as it's for comments only?
Also, could you break this out into a separate thread when you do
submit it please? Will make a few people's lives easier since this has
nothing to do with 440EPx really :)
josh
^ permalink raw reply
* Re: [PATCH 3/6] PowerPC 440EPx: 440EPx/440EP dcr defines
From: Josh Boyer @ 2007-08-02 20:21 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070801020936.GC31391@localhost.localdomain>
On Wed, 1 Aug 2007 12:09:36 +1000
David Gibson <david@gibson.dropbear.id.au> wrote:
> On Mon, Jul 30, 2007 at 07:12:45PM +0400, Valentine Barshak wrote:
> > This patch adds DCR defines needed for 440EP/440EPx clock
> > initialization. These defines have been introduced in the Bamboo
> > support by Josh Boyer and are needed for Sequoia as well.
>
> These should really go in the same patch that uses them. I dislike
> this business of splitting patches up when the parts are functionally
> dependent on each other.
Yeah. We have a small race here anyway, since two different patch sets
need this but are currently not depending as such. E.g. Bamboo or
Sequoia should be first, and the other should be patches after that
series.
josh
^ permalink raw reply
* Re: [PATCH 4/6] PowerPC 440EPx: Sequoia bootwrapper
From: Josh Boyer @ 2007-08-02 20:29 UTC (permalink / raw)
To: Valentine Barshak; +Cc: linuxppc-dev
In-Reply-To: <20070730151445.GA5075@ru.mvista.com>
On Mon, 30 Jul 2007 19:14:45 +0400
> +#define SPRN_CCR1 0x378
> +void ibm440ep_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
> +{
> + u32 cpu, plb, opb, ebc, tb, uart0, m, vco;
> + u32 reg;
> + u32 fwdva, fwdvb, fbdv, lfbdv, opbdv0, perdv0, spcid0, prbdv0, tmp;
> +
> + mtdcr(DCRN_CPR0_ADDR, CPR0_PLLD0);
> + reg = mfdcr(DCRN_CPR0_DATA);
> + tmp = (reg & 0x000F0000) >> 16;
> + fwdva = tmp ? tmp : 16;
> + tmp = (reg & 0x00000700) >> 8;
> + fwdvb = tmp ? tmp : 8;
> + tmp = (reg & 0x1F000000) >> 24;
> + fbdv = tmp ? tmp : 32;
> + lfbdv = (reg & 0x0000007F);
> +
> + mtdcr(DCRN_CPR0_ADDR, CPR0_OPBD0);
> + reg = mfdcr(DCRN_CPR0_DATA);
> + tmp = (reg & 0x03000000) >> 24;
> + opbdv0 = tmp ? tmp : 4;
> +
> + mtdcr(DCRN_CPR0_ADDR, CPR0_PERD0);
> + reg = mfdcr(DCRN_CPR0_DATA);
> + tmp = (reg & 0x07000000) >> 24;
> + perdv0 = tmp ? tmp : 8;
> +
> + mtdcr(DCRN_CPR0_ADDR, CPR0_PRIMBD0);
> + reg = mfdcr(DCRN_CPR0_DATA);
> + tmp = (reg & 0x07000000) >> 24;
> + prbdv0 = tmp ? tmp : 8;
> +
> + mtdcr(DCRN_CPR0_ADDR, CPR0_SCPID);
> + reg = mfdcr(DCRN_CPR0_DATA);
> + tmp = (reg & 0x03000000) >> 24;
> + spcid0 = tmp ? tmp : 4;
> +
> + /* Calculate M */
> + mtdcr(DCRN_CPR0_ADDR, CPR0_PLLC0);
> + reg = mfdcr(DCRN_CPR0_DATA);
> + tmp = (reg & 0x03000000) >> 24;
> + if (tmp == 0) { /* PLL output */
> + tmp = (reg & 0x20000000) >> 29;
> + if (!tmp) /* PLLOUTA */
> + m = fbdv * lfbdv * fwdva;
> + else
> + m = fbdv * lfbdv * fwdvb;
> + }
> + else if (tmp == 1) /* CPU output */
> + m = fbdv * fwdva;
> + else
> + m = perdv0 * opbdv0 * fwdvb;
> +
> + vco = (m * sysclk) + (m >> 1);
> + cpu = vco / fwdva;
> + plb = vco / fwdvb / prbdv0;
> + opb = plb / opbdv0;
> + ebc = plb / perdv0;
> +
> + /* FIXME */
> + uart0 = ser_clk;
> +
> + /* Figure out timebase. Either CPU or default TmrClk */
> + asm volatile (
> + "mfspr %0,%1\n"
> + :
> + "=&r"(reg) : "i"(SPRN_CCR1));
> + if (reg & 0x0080)
> + tb = 25000000; /* TmrClk is 25MHz */
> + else
> + tb = cpu;
> +
> + dt_fixup_cpu_clocks(cpu, tb, 0);
> + dt_fixup_clock("/plb", plb);
> + dt_fixup_clock("/plb/opb", opb);
> + dt_fixup_clock("/plb/opb/ebc", ebc);
> + dt_fixup_clock("/plb/opb/serial@ef600300", uart0);
> + dt_fixup_clock("/plb/opb/serial@ef600400", uart0);
> + dt_fixup_clock("/plb/opb/serial@ef600500", uart0);
> + dt_fixup_clock("/plb/opb/serial@ef600600", uart0);
> +}
We don't need to duplicate this function in two different wrappers.
I'll move it into 4xx.c in my next round of patches, so that bamboo and
sequoia can just call a common function.
> +/*
> + * 440EPx DDR1/2 memory controller code
> + * TODO: move to generic 44x code
> + */
> +
> +/* DDR0_02 */
> +#define DDR_START 0x1
> +#define DDR_START_SHIFT 0
> +#define DDR_MAX_CS_REG 0x3
> +#define DDR_MAX_CS_REG_SHIFT 24
> +#define DDR_MAX_COL_REG 0xf
> +#define DDR_MAX_COL_REG_SHIFT 16
> +#define DDR_MAX_ROW_REG 0xf
> +#define DDR_MAX_ROW_REG_SHIFT 8
> +/* DDR0_08 */
> +#define DDR_DDR2_MODE 0x1
> +#define DDR_DDR2_MODE_SHIFT 0
> +/* DDR0_10 */
> +#define DDR_CS_MAP 0x3
> +#define DDR_CS_MAP_SHIFT 8
> +/* DDR0_14 */
> +#define DDR_REDUC 0x1
> +#define DDR_REDUC_SHIFT 16
> +/* DDR0_42 */
> +#define DDR_APIN 0x7
> +#define DDR_APIN_SHIFT 24
> +/* DDR0_43 */
> +#define DDR_COL_SZ 0x7
> +#define DDR_COL_SZ_SHIFT 8
> +#define DDR_BANK8 0x1
> +#define DDR_BANK8_SHIFT 0
> +
> +#define DDR_GET_VAL(val, mask, shift) (((val) >> (shift)) & (mask))
> +
> +static void ibm440epx_fixup_memsize(void)
And we should move this at the same time. Isn't denali used by another
CPU as well?
josh
^ permalink raw reply
* Re: [PATCH 5/6] PowerPC 440EPx: Sequoia board support
From: Josh Boyer @ 2007-08-02 20:32 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070801050542.GJ31391@localhost.localdomain>
On Wed, 1 Aug 2007 15:05:42 +1000
David Gibson <david@gibson.dropbear.id.au> wrote:
> On Wed, Aug 01, 2007 at 07:01:17AM +0200, Segher Boessenkool wrote:
> > >> + { /* 440EPX - without Security/Kasumi */
> > >> + .pvr_mask = 0xf0000fff,
> > >> + .pvr_value = 0x200008D4,
> > >> + .cpu_name = "440EPX - no Security/Kasumi",
> > >> + .cpu_features = CPU_FTRS_44X,
> > >> + .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /*
> > >> 440EPX has an FPU */
> > >> + .icache_bsize = 32,
> > >> + .dcache_bsize = 32,
> > >> + },
> > >
> > > Since the with/without Security/Kasumi versions have no differences in
> > > their cputable entry other than the PVR, couldn't you just remove the
> > > relevant PVR bit from the mask and use a single entry?
> >
> > And get rid of the stupid "has an FPU" comment at the same time
> > please :-)
>
> Actually that comment may be worthwhile if expanded a little. I think
> the point is that 440EPx *unlike most other 4xx chips* has an FPU. So
> the point of the comment is not explaining the feature bit, which is
> obvious, but as a "no, really, it does".
Right. 440EP(x) are the only currently available 44x chips that
contain an FPU, so I also think the comment can stay.
josh
^ permalink raw reply
* Re: [PATCH 5/6] PowerPC 440EPx: Sequoia board support
From: Josh Boyer @ 2007-08-02 20:34 UTC (permalink / raw)
To: Valentine Barshak; +Cc: linuxppc-dev
In-Reply-To: <20070730151628.GA5100@ru.mvista.com>
On Mon, 30 Jul 2007 19:16:28 +0400
Valentine Barshak <vbarshak@ru.mvista.com> wrote:
> diff -ruN linux.orig/arch/powerpc/kernel/cputable.c linux/arch/powerpc/kernel/cputable.c
> --- linux.orig/arch/powerpc/kernel/cputable.c 2007-07-27 20:37:10.000000000 +0400
> +++ linux/arch/powerpc/kernel/cputable.c 2007-07-27 20:44:26.000000000 +0400
> @@ -1132,6 +1132,42 @@
> .dcache_bsize = 32,
> .platform = "ppc440",
> },
> + { /* 440EPX - with Security/Kasumi */
> + .pvr_mask = 0xf0000fff,
> + .pvr_value = 0x200008D0,
> + .cpu_name = "440EPX - with Security/Kasumi",
> + .cpu_features = CPU_FTRS_44X,
> + .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 440EPX has an FPU */
> + .icache_bsize = 32,
> + .dcache_bsize = 32,
> + },
> + { /* 440EPX - without Security/Kasumi */
> + .pvr_mask = 0xf0000fff,
> + .pvr_value = 0x200008D4,
> + .cpu_name = "440EPX - no Security/Kasumi",
> + .cpu_features = CPU_FTRS_44X,
> + .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, /* 440EPX has an FPU */
> + .icache_bsize = 32,
> + .dcache_bsize = 32,
> + },
> + { /* 440GRX - with Security/Kasumi */
> + .pvr_mask = 0xf0000fff,
> + .pvr_value = 0x200008D8,
> + .cpu_name = "440GRX - with Security/Kasumi",
> + .cpu_features = CPU_FTRS_44X,
> + .cpu_user_features = COMMON_USER_BOOKE, /* 440GRX has no FPU */
> + .icache_bsize = 32,
> + .dcache_bsize = 32,
> + },
> + { /* 440GRX - without Security/Kasumi */
> + .pvr_mask = 0xf0000fff,
> + .pvr_value = 0x200008DC,
> + .cpu_name = "440GRX - no Security/Kasumi",
> + .cpu_features = CPU_FTRS_44X,
> + .cpu_user_features = COMMON_USER_BOOKE, /* 440GRX has no FPU */
> + .icache_bsize = 32,
> + .dcache_bsize = 32,
> + },
Should the 440GRX PVR additions be done in a separate patch? Or is the
PVR and cpu features truly the only difference between 440EPx and
440GRx?
> diff -ruN linux.orig/arch/powerpc/platforms/44x/sequoia.c linux/arch/powerpc/platforms/44x/sequoia.c
> --- linux.orig/arch/powerpc/platforms/44x/sequoia.c 1970-01-01 03:00:00.000000000 +0300
> +++ linux/arch/powerpc/platforms/44x/sequoia.c 2007-07-27 20:44:26.000000000 +0400
> @@ -0,0 +1,66 @@
> +/*
> + * Sequoia board specific routines
> + *
> + * Wade Farnsworth <wfarnsworth@mvista.com>
> + * Copyright 2004-2007 MontaVista Software Inc.
> + *
> + * Rewritten and ported to the merged powerpc tree:
> + * Josh Boyer <jwboyer@linux.vnet.ibm.com>
> + * Copyright 2007 IBM Corporation
I didn't really do this. Might want to give yourself credit instead :).
josh
^ permalink raw reply
* Re: [PATCH 6/6] PowerPC 440EPx: Sequoia new EMAC support
From: Josh Boyer @ 2007-08-02 20:35 UTC (permalink / raw)
To: Valentine Barshak; +Cc: linuxppc-dev
In-Reply-To: <20070730152339.GA5126@ru.mvista.com>
On Mon, 30 Jul 2007 19:23:39 +0400
Valentine Barshak <vbarshak@ru.mvista.com> wrote:
> The patch adds PHY support for the Sequoia board to the new EMAC driver and
> enables NEW_EMAC for 440EPx Kconfig.
> The phy code has been written by Stefan Roese.
> This has been tested with the following version of the EMAC dirver:
>
> http://ozlabs.org/~dgibson/home/emac/powerpc-emac-new-20070516.patch
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
> ---
> arch/powerpc/platforms/44x/Kconfig | 5 +---
> drivers/net/ibm_newemac/phy.c | 39 +++++++++++++++++++++++++++++++++++++
> 2 files changed, 41 insertions(+), 3 deletions(-)
>
> --- linux.orig/arch/powerpc/platforms/44x/Kconfig 2007-07-30 15:05:50.000000000 +0400
> +++ linux/arch/powerpc/platforms/44x/Kconfig 2007-07-30 17:59:05.000000000 +0400
> @@ -47,9 +47,8 @@
> config 440EPX
> bool
> select PPC_FPU
> -# Disabled until the new EMAC Driver is merged.
> -# select IBM_NEW_EMAC_EMAC4
> -# select IBM_NEW_EMAC_ZMII
> + select IBM_NEW_EMAC_EMAC4
> + select IBM_NEW_EMAC_ZMII
Probably don't want this bit yet. The EMAC driver isn't really merged
yet.
josh
^ permalink raw reply
* [PATCH] Fix FSL BookE machine check reporting
From: Becky Bruce @ 2007-08-02 20:37 UTC (permalink / raw)
To: linuxppc-dev
Reserved MCSR bits on FSL BookE parts may have spurious values
when mcheck occurs. Mask these off when printing the MCSR to
avoid confusion. Also, get rid of the MCSR_GL_CI bit defined
for e500 - this bit doesn't actually have any meaning.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
---
arch/powerpc/kernel/traps.c | 4 +---
include/asm-powerpc/reg_booke.h | 12 +++++++++++-
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 2bb1cb9..d8502e3 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -299,7 +299,7 @@ static inline int check_io_access(struct pt_regs *regs)
#ifndef CONFIG_FSL_BOOKE
#define get_mc_reason(regs) ((regs)->dsisr)
#else
-#define get_mc_reason(regs) (mfspr(SPRN_MCSR))
+#define get_mc_reason(regs) (mfspr(SPRN_MCSR) & MCSR_MASK)
#endif
#define REASON_FP ESR_FP
#define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
@@ -414,8 +414,6 @@ void machine_check_exception(struct pt_regs *regs)
printk("Data Cache Push Parity Error\n");
if (reason & MCSR_DCPERR)
printk("Data Cache Parity Error\n");
- if (reason & MCSR_GL_CI)
- printk("Guarded Load or Cache-Inhibited stwcx.\n");
if (reason & MCSR_BUS_IAERR)
printk("Bus - Instruction Address Error\n");
if (reason & MCSR_BUS_RAERR)
diff --git a/include/asm-powerpc/reg_booke.h b/include/asm-powerpc/reg_booke.h
index 064405c..8fdc2b4 100644
--- a/include/asm-powerpc/reg_booke.h
+++ b/include/asm-powerpc/reg_booke.h
@@ -223,7 +223,6 @@
#define MCSR_ICPERR 0x40000000UL /* I-Cache Parity Error */
#define MCSR_DCP_PERR 0x20000000UL /* D-Cache Push Parity Error */
#define MCSR_DCPERR 0x10000000UL /* D-Cache Parity Error */
-#define MCSR_GL_CI 0x00010000UL /* Guarded Load or Cache-Inhibited stwcx. */
#define MCSR_BUS_IAERR 0x00000080UL /* Instruction Address Error */
#define MCSR_BUS_RAERR 0x00000040UL /* Read Address Error */
#define MCSR_BUS_WAERR 0x00000020UL /* Write Address Error */
@@ -232,6 +231,12 @@
#define MCSR_BUS_WBERR 0x00000004UL /* Write Data Bus Error */
#define MCSR_BUS_IPERR 0x00000002UL /* Instruction parity Error */
#define MCSR_BUS_RPERR 0x00000001UL /* Read parity Error */
+
+/* e500 parts may set unused bits in MCSR; mask these off */
+#define MCSR_MASK (MCSR_MCP | MCSR_ICPERR | MCSR_DCP_PERR | \
+ MCSR_DCPERR | MCSR_BUS_IAERR | MCSR_BUS_RAERR | \
+ MCSR_BUS_WAERR | MCSR_BUS_IBERR | MCSR_BUS_RBERR | \
+ MCSR_BUS_WBERR | MCSR_BUS_IPERR | MCSR_BUS_RPERR)
#endif
#ifdef CONFIG_E200
#define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */
@@ -243,6 +248,11 @@
#define MCSR_BUS_DRERR 0x00000008UL /* Read Bus Error on data load */
#define MCSR_BUS_WRERR 0x00000004UL /* Write Bus Error on buffered
store or cache line push */
+
+/* e200 parts may set unused bits in MCSR; mask these off */
+#define MCSR_MASK (MCSR_MCP | MCSR_CP_PERR | MCSR_CPERR | \
+ MCSR_EXCP_ERR | MCSR_BUS_IRERR | MCSR_BUS_DRERR | \
+ MCSR_BUS_WRERR)
#endif
/* Bit definitions for the DBSR. */
--
1.5.0.3
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox