* Re: [RFC] AmigaOne device tree source v2
From: Gerhard Pircher @ 2007-09-03 16:11 UTC (permalink / raw)
To: David Gibson, segher; +Cc: linuxppc-dev
In-Reply-To: <20070903101234.GA12212@localhost.localdomain>
Hi,
-------- Original-Nachricht --------
> Datum: Mon, 3 Sep 2007 20:12:34 +1000
> Von: David Gibson <david@gibson.dropbear.id.au>
> An: Segher Boessenkool <segher@kernel.crashing.org>
> CC: linuxppc-dev@ozlabs.org
> Betreff: Re: [RFC] AmigaOne device tree source v2
> On Mon, Sep 03, 2007 at 12:02:58PM +0200, Segher Boessenkool wrote:
> > Yeah, PCI is a special case for Linux. Maybe add a "pciclass,XXXX"
> > compatible property though, for good measure. Anything else isn't
> > all that useful I think.
Wouldn't that be the same as the class-code property?
> Indeed, since PCI is probable, it's unclear whether these device nodes
> are even necessary at all. Depends on whether there's anything
> interesting in the omitted interrupt routing information.
Well, I mainly specified the device node for the IDE controller, because
it works in compatible mode and thus the IDE driver needs to know about
the I/O ports. I guess the driver doesn't probe the BARs, if the
controller is configured for compatible mode (and AFAIK a VIA IDE
controller cannot be made work in fully native mode). Also the ppc_ide_md
function hooks are considered obsolete.
The interrupts for the IDE controller are another story. Judging from
what some developers wrote on this mailing list, there doesn't seem to
be a way to define legacy IDE interrupts (14 & 15) for a PCI device node.
Therefore I'll reuse the IDE interrupt quirk for the Pegasos.
Gerhard
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^ permalink raw reply
* Re: [RFC PATCH v0.2] net driver: mpc52xx fec
From: Jon Smirl @ 2007-09-03 16:09 UTC (permalink / raw)
To: Grant Likely; +Cc: netdev, Domen Puncer, linuxppc-embedded
In-Reply-To: <fa686aa40709030857j6c36c87ek60215f812864ee0f@mail.gmail.com>
On 9/3/07, Grant Likely <grant.likely@secretlab.ca> wrote:
> On 9/2/07, Domen Puncer <domen@coderock.org> wrote:
> > Hi!
> >
> > new in this version:
> > - fixed stuff that was commented on.
> > - added 7-wire support (compile at least, if someone has the hardware,
> > please test!)
> > - ethtool support
>
> Thanks for this work Domen, comments below...
>
> This is a large patch, and it should be broken up into logical
> changes. ie. split into dts changes, bestcomm changes, fec driver and
> mdio driver. Easier to review that way. The bestcomm and dts changes
> don't need to go to the netdev list.
A similar patch that is already broken up is available for Efika.
http://dev.gentoo.org/~nixnut/efika/efika-patches-2.6.22.tar.bz2
--
Jon Smirl
jonsmirl@gmail.com
^ permalink raw reply
* Re: [RFC PATCH v0.2] net driver: mpc52xx fec
From: Grant Likely @ 2007-09-03 15:57 UTC (permalink / raw)
To: Domen Puncer; +Cc: netdev, linuxppc-embedded
In-Reply-To: <20070902074143.GB2642@nd47.coderock.org>
On 9/2/07, Domen Puncer <domen@coderock.org> wrote:
> Hi!
>
> new in this version:
> - fixed stuff that was commented on.
> - added 7-wire support (compile at least, if someone has the hardware,
> please test!)
> - ethtool support
Thanks for this work Domen, comments below...
This is a large patch, and it should be broken up into logical
changes. ie. split into dts changes, bestcomm changes, fec driver and
mdio driver. Easier to review that way. The bestcomm and dts changes
don't need to go to the netdev list.
> --- /dev/null
> +++ linux.git/drivers/net/fec_mpc52xx/Kconfig
> @@ -0,0 +1,25 @@
> +menu "MPC5200 Networking Options"
> + depends PPC_MPC52xx && NET_ETHERNET
> +
> +config FEC_MPC52xx
> + tristate "FEC Ethernet"
> + depends on NET_ETHERNET
> + select PPC_BESTCOMM
> + select PPC_BESTCOMM_FEC
> + select CRC32
> + ---help---
> + This option enables support for the MPC5200's on-chip
> + Fast Ethernet Controller
> +
> +config FEC_MPC52xx_MDIO
> + bool "Use external Ethernet MII PHY"
> + depends on FEC_MPC52xx
> + select PHYLIB
> + default y
> + ---help---
> + The MPC5200's FEC can connect to the Ethernet either with
> + an external MII PHY chip or 10 Mbps 7-wire interface
> + (Motorola? industry standard).
> + If your board uses an external PHY, say y, else n.
This option should change. Either build the MDIO driver into the FEC
driver unconditionally and drop this option, or make the MDIO driver
independent from the FEC driver (it does use the MDIO bus
infrastructure after all). Either way the FEC driver should detect
the phy type at runtime (possibly based on the presence/absence of a
phy-handle property) instead of being hard compiled. 5200 support is
now multiplatform after all.
If you drop the MDIO config option, then I'd also consider eliminating
driver/net/fec_mpc52xx/Kconfig entirely and rolling the single
MPC52xx_FEC option into drivers/net/Kconfig.
> +
> +endmenu
> Index: linux.git/drivers/net/fec_mpc52xx/Makefile
> ===================================================================
> --- /dev/null
> +++ linux.git/drivers/net/fec_mpc52xx/Makefile
> @@ -0,0 +1,7 @@
> +obj-$(CONFIG_FEC_MPC52xx) += fec_mpc52xx.o
> +
> +fec_mpc52xx-objs := fec.o
> +
> +ifeq ($(CONFIG_FEC_MPC52xx_MDIO),y)
> +fec_mpc52xx-objs += fec_phy.o
> +endif
Hmm, is the phy driver separate or not? You've got the logic in place
to probe MDIO separately from the FEC driver, yet they are linked as a
single driver.
> Index: linux.git/drivers/net/fec_mpc52xx/fec.c
> ===================================================================
> --- /dev/null
> +++ linux.git/drivers/net/fec_mpc52xx/fec.c
> @@ -0,0 +1,1127 @@
> +/*
> + * drivers/drivers/net/fec_mpc52xx/fec.c
> + *
> + * Driver for the MPC5200 Fast Ethernet Controller
> + *
> + * Originally written by Dale Farnsworth <dfarnsworth@mvista.com> and
> + * now maintained by Sylvain Munaut <tnt@246tNt.com>
> + *
> + * Copyright (C) 2007 Domen Puncer, Telargo, Inc.
> + * Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com>
> + * Copyright (C) 2003-2004 MontaVista, Software, Inc.
> + *
> + * This file is licensed under the terms of the GNU General Public License
> + * version 2. This program is licensed "as is" without any warranty of any
> + * kind, whether express or implied.
> + *
> + */
> +
> +#include <linux/module.h>
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/spinlock.h>
> +#include <linux/errno.h>
> +#include <linux/init.h>
> +#include <linux/crc32.h>
> +#include <linux/hardirq.h>
> +#include <linux/delay.h>
> +
> +#include <linux/netdevice.h>
> +#include <linux/etherdevice.h>
> +#include <linux/ethtool.h>
> +#include <linux/skbuff.h>
> +
> +#include <asm/of_device.h>
> +#include <asm/of_platform.h>
> +#include <asm/io.h>
> +#include <asm/delay.h>
> +#include <asm/mpc52xx.h>
> +
> +#include <sysdev/bestcomm/bestcomm.h>
> +#include <sysdev/bestcomm/fec.h>
> +
> +#include "fec.h"
> +
> +#define DRIVER_NAME "mpc52xx-fec"
> +
> +static irqreturn_t fec_interrupt(int, void *);
> +static irqreturn_t fec_rx_interrupt(int, void *);
> +static irqreturn_t fec_tx_interrupt(int, void *);
> +static struct net_device_stats *fec_get_stats(struct net_device *);
> +static void fec_set_multicast_list(struct net_device *dev);
> +static void fec_hw_init(struct net_device *dev);
> +static void fec_stop(struct net_device *dev);
> +static void fec_start(struct net_device *dev);
> +static void fec_reset(struct net_device *dev);
Nit: Are all these forward decls needed?
> +
> +static u8 mpc52xx_fec_mac_addr[6];
Why isn't this part of struct fec_priv?
> +static const u8 null_mac[6];
null_mac?!? Just for comparing a mac addr against 0?
<snip>
> +#ifdef CONFIG_FEC_MPC52xx_MDIO
Once again; don't make this a conditional compile; detect at runtime.
<snip>
> +static void __init fec_str2mac(char *str, unsigned char *mac)
> +{
> + int i;
> + u64 val64;
> +
> + val64 = simple_strtoull(str, NULL, 16);
> +
> + for (i = 0; i < 6; i++)
> + mac[5-i] = val64 >> (i*8);
> +}
> +
> +static int __init mpc52xx_fec_mac_setup(char *mac_address)
> +{
> + fec_str2mac(mac_address, mpc52xx_fec_mac_addr);
> + return 0;
> +}
fec_str2mac is called in *1* place. I'd roll it into mpc52xx_fec_mac_setup.
> +
> +__setup("mpc52xx-mac=", mpc52xx_fec_mac_setup);
> +
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH v7 3/3] [POWERPC] MPC832x_RDB: update dts to use SPI1in QE, register mmc_spi stub
From: Anton Vorontsov @ 2007-09-03 15:13 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <46DC126C.9060603@freescale.com>
On Mon, Sep 03, 2007 at 08:55:56AM -0500, Timur Tabi wrote:
[...]
> Besides, every other board does it's par_io configuration based on the
> device tree.
My words. ;-) See
http://ozlabs.org/pipermail/linuxppc-dev/2007-August/040685.html
Also, see how it was made initially:
http://ozlabs.org/pipermail/linuxppc-dev/2007-August/040440.html
par_io was in the device tree. But Kumar and Segher convinced me to
not do that.
> So if Anton is going to break that pattern, we should be
> talking about moving all that code into U-boot,
[...]
To my personal taste that's bad idea. In that scheme, I need to upgrade
bootloader to use such a little thing as SPI from the kernel.
I expect very few things from the bootloader: setup memory controller,
copy kernel from the source (flash, ethernet, rs232, ide, sata, ...)
into the RAM and boot it. Everything else from the bootloader side is
profusion.
p.s. Cc'ing Kumar.
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* eraseblock-size independent flash rootfs
From: David Jander @ 2007-09-03 14:32 UTC (permalink / raw)
To: linuxppc-embedded
Hi,
I have been looking for a practical way to build an embedded system with a
root filesystem which can be modified file-by-file eventually (to apply small
software patches for example), but is independent of flash attributes such as
erase-block size (which happens to change sometimes from one production
series to another without much notice, for instance S29GL256M11 with 64k
blocks to S29GL256N90 with 128k blocks).
The problem with using plain jffs2 until now is that we cannot make one jffs2
image for both hardware versions, since the image has to be generated
specifying the erase-block size.
I am considering on using a read-only filesystem like squashfs or cramfs and,
layered on top of it, a read-only filesystem like jffs2 for modifications.
The jffs2 partition could just start out as empty flash, so it doesn't matter
much if the device has 64k erase-blocks or 128k eraseblocks... it just has to
start at an 128k boundary.
I have to make the following choices and I am curious if anybody has something
to tell against or in favour of any of them:
1.- Which read-only fs to use: squashfs or cramfs?
Squashfs seems newer and better performing, so I guess I'll go with that one.
2.- Which union-fs to use: unionfs, aufs or mini_fo?
Don't know which to choose. Unionfs is in latest -mm trees and also supports
2.4 kernels (one of our products still runs on 2.4.xx), so chances are it
gets part of the main tree some day... but aufs seems more popular, and many
developers seem to switch from unionfs to aufs lately, but I don't seem to
find much information about this.
Any suggestions are welcome.
Greetings,
--
David Jander
^ permalink raw reply
* Re: [RFC] AmigaOne device tree source v2
From: Gerhard Pircher @ 2007-09-03 14:58 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070903013431.GG31499@localhost.localdomain>
Hi,
-------- Original-Nachricht --------
> Datum: Mon, 3 Sep 2007 11:34:31 +1000
> Von: David Gibson <david@gibson.dropbear.id.au>
> An: Gerhard Pircher <gerhard_pircher@gmx.net>
> CC: linuxppc-dev@ozlabs.org
> Betreff: Re: [RFC] AmigaOne device tree source v2
> Interrupt routing information is really necessary. If it differs
> between the models then either you will need different device tree
> source for each of them, or you will need to fill in the correct
> interrupt routing information from the bootwrapper, whichever approach
> is easier.
Okay, I could probe the southbridge's PCI interrupt registers to fill in
some of the interrupt routing information from the bootwrapper.
> I believe that's handled by the bridge's compatible and reg
> properties. The platform or bridge code will have to know that this
> type of bridge (as encoded in compatible) uses indirect addressing,
> and which resource (from the reg property) has the indirect access
> registers.
Well, then I'll copy and paste from the CHRP/Pegasos PCI setup code,
which should exactly do that. :-)
> I don't know enough about PCI to answer most of the above questions,
> but I spotted a bunch of problems with the device tree anyway...
> > pci@80000000 {
> > device_type = "pci";
> > bus-frequency = <01fca055>; // 33.3MHz
> > bus-range = <0 1>;
> > reg = <80000000 7f000000>; //
> >Whole PCI space.
>
> 'reg' and 'ranges' should not typically overlap. 'reg' should only
> encode control registers for the bridge, not the whole PCI space (not
> that I'm even entirely sure what you mean by that).
Hmm, strange. I'm sure I found this in another device tree. I define
"whole PCI space" as PCI (prefetchable) memory and PCI I/O space.
> > host@0 {
>
> The unit address (after the @) should be derived from the first range
> listed in the 'reg' property. It's a bus address, not a slot number.
AFAIK it's the device number, which is 0 for this host/PCI bridge.
> > vendor-id = 0x000010cc;
>
> Um.. evidentally you have never even tried compiling this device tree,
> since this is invalid syntax. That would need to be:
> vendor-id = <000010cc>;
> and likewise all the others below.
Uh, yeah! I thought I fixed all these typos. You're right, I didn't try
to compile the device tree yet.
> > #interrupt-cells = <2>;
> > #address-cells = <2>;
> > #size-cells = <1>;
> >
> > dma-controller {
>
> All these devices should have unit addresses.
Okay, that would be dma-controller@0, interrupt-controller@20 and so.
Will be fixed!
> > ide@7,1 {
>
> This will need a compatible property, at least.
I hoped the class-code property is enough for a PCI device, as it
clearly identifies this device as a PCI IDE conroller with primary and
secondary master functionality.
Thanks!
regards,
Gerhard
--
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^ permalink raw reply
* [RFC PATCH v0.2] net driver: mpc52xx fec
From: Domen Puncer @ 2007-09-02 7:41 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: netdev
In-Reply-To: <20070810095153.GC13994@moe.telargo.com>
Hi!
new in this version:
- fixed stuff that was commented on.
- added 7-wire support (compile at least, if someone has the hardware,
please test!)
- ethtool support
(this obsoletes Sylvain's patch that's floating around:
0008-drivers-net-Add-support-for-Freescale-MPC5200-SoC-i.patch)
If there are no objections, I would like this to be merged after
bestcomm (mpc52xx dma engine) patches hit mainline, and that will
hopefully be at the beginning of the 2.6.24 merge window.
--
Driver for ethernet on mpc5200/mpc5200b SoCs (FEC).
Signed-off-by: Domen Puncer <domen.puncer@telargo.com>
---
arch/powerpc/boot/dts/lite5200b.dts | 18
arch/powerpc/sysdev/bestcomm/fec.h | 15
drivers/net/Kconfig | 1
drivers/net/Makefile | 1
drivers/net/fec_mpc52xx/Kconfig | 25
drivers/net/fec_mpc52xx/Makefile | 7
drivers/net/fec_mpc52xx/fec.c | 1127 ++++++++++++++++++++++++++++++++++++
drivers/net/fec_mpc52xx/fec.h | 329 ++++++++++
drivers/net/fec_mpc52xx/fec_phy.c | 238 +++++++
9 files changed, 1759 insertions(+), 2 deletions(-)
Index: linux.git/drivers/net/Kconfig
===================================================================
--- linux.git.orig/drivers/net/Kconfig
+++ linux.git/drivers/net/Kconfig
@@ -1956,6 +1956,7 @@ config NE_H8300
controller on the Renesas H8/300 processor.
source "drivers/net/fec_8xx/Kconfig"
+source "drivers/net/fec_mpc52xx/Kconfig"
source "drivers/net/fs_enet/Kconfig"
endif # NET_ETHERNET
Index: linux.git/drivers/net/Makefile
===================================================================
--- linux.git.orig/drivers/net/Makefile
+++ linux.git/drivers/net/Makefile
@@ -204,6 +204,7 @@ obj-$(CONFIG_SMC911X) += smc911x.o
obj-$(CONFIG_BFIN_MAC) += bfin_mac.o
obj-$(CONFIG_DM9000) += dm9000.o
obj-$(CONFIG_FEC_8XX) += fec_8xx/
+obj-$(CONFIG_FEC_MPC52xx) += fec_mpc52xx/
obj-$(CONFIG_PASEMI_MAC) += pasemi_mac.o
obj-$(CONFIG_MLX4_CORE) += mlx4/
Index: linux.git/arch/powerpc/boot/dts/lite5200b.dts
===================================================================
--- linux.git.orig/arch/powerpc/boot/dts/lite5200b.dts
+++ linux.git/arch/powerpc/boot/dts/lite5200b.dts
@@ -306,10 +306,26 @@
ethernet@3000 {
device_type = "network";
compatible = "mpc5200b-fec\0mpc5200-fec";
- reg = <3000 800>;
+ reg = <3000 400>;
mac-address = [ 02 03 04 05 06 07 ]; // Bad!
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
+ phy-handle = <&phy0>;
+ };
+
+ mdio@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ device_type = "mdio";
+ compatible = "mpc5200b-fec-phy";
+ reg = <3000 400>; // fec range, since we need to setup fec interrupts
+ interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
+ interrupt-parent = <&mpc5200_pic>;
+
+ phy0:ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
};
ata@3a00 {
Index: linux.git/arch/powerpc/sysdev/bestcomm/fec.h
===================================================================
--- linux.git.orig/arch/powerpc/sysdev/bestcomm/fec.h
+++ linux.git/arch/powerpc/sysdev/bestcomm/fec.h
@@ -21,7 +21,20 @@ struct bcom_fec_bd {
};
#define BCOM_FEC_TX_BD_TFD 0x08000000ul /* transmit frame done */
-#define BCOM_FEC_TX_BD_INT 0x04000000ul /* interrupt */
+#define BCOM_FEC_TX_BD_TC 0x04000000ul /* transmit CRC */
+#define BCOM_FEC_TX_BD_ABC 0x02000000ul /* append bad CRC */
+
+#define BCOM_FEC_RX_BD_L 0x08000000ul /* buffer is last in frame */
+#define BCOM_FEC_RX_BD_BC 0x00800000ul /* DA is broadcast */
+#define BCOM_FEC_RX_BD_MC 0x00400000ul /* DA is multicast and not broadcast */
+#define BCOM_FEC_RX_BD_LG 0x00200000ul /* Rx frame length violation */
+#define BCOM_FEC_RX_BD_NO 0x00100000ul /* Rx non-octet aligned frame */
+#define BCOM_FEC_RX_BD_CR 0x00040000ul /* Rx CRC error */
+#define BCOM_FEC_RX_BD_OV 0x00020000ul /* overrun */
+#define BCOM_FEC_RX_BD_TR 0x00010000ul /* Rx frame truncated */
+#define BCOM_FEC_RX_BD_LEN_MASK 0x000007fful /* mask for length of received frame */
+#define BCOM_FEC_RX_BD_ERRORS (BCOM_FEC_RX_BD_LG | BCOM_FEC_RX_BD_NO | \
+ BCOM_FEC_RX_BD_CR | BCOM_FEC_RX_BD_OV | BCOM_FEC_RX_BD_TR)
extern struct bcom_task *
Index: linux.git/drivers/net/fec_mpc52xx/Kconfig
===================================================================
--- /dev/null
+++ linux.git/drivers/net/fec_mpc52xx/Kconfig
@@ -0,0 +1,25 @@
+menu "MPC5200 Networking Options"
+ depends PPC_MPC52xx && NET_ETHERNET
+
+config FEC_MPC52xx
+ tristate "FEC Ethernet"
+ depends on NET_ETHERNET
+ select PPC_BESTCOMM
+ select PPC_BESTCOMM_FEC
+ select CRC32
+ ---help---
+ This option enables support for the MPC5200's on-chip
+ Fast Ethernet Controller
+
+config FEC_MPC52xx_MDIO
+ bool "Use external Ethernet MII PHY"
+ depends on FEC_MPC52xx
+ select PHYLIB
+ default y
+ ---help---
+ The MPC5200's FEC can connect to the Ethernet either with
+ an external MII PHY chip or 10 Mbps 7-wire interface
+ (Motorola? industry standard).
+ If your board uses an external PHY, say y, else n.
+
+endmenu
Index: linux.git/drivers/net/fec_mpc52xx/Makefile
===================================================================
--- /dev/null
+++ linux.git/drivers/net/fec_mpc52xx/Makefile
@@ -0,0 +1,7 @@
+obj-$(CONFIG_FEC_MPC52xx) += fec_mpc52xx.o
+
+fec_mpc52xx-objs := fec.o
+
+ifeq ($(CONFIG_FEC_MPC52xx_MDIO),y)
+fec_mpc52xx-objs += fec_phy.o
+endif
Index: linux.git/drivers/net/fec_mpc52xx/fec.c
===================================================================
--- /dev/null
+++ linux.git/drivers/net/fec_mpc52xx/fec.c
@@ -0,0 +1,1127 @@
+/*
+ * drivers/drivers/net/fec_mpc52xx/fec.c
+ *
+ * Driver for the MPC5200 Fast Ethernet Controller
+ *
+ * Originally written by Dale Farnsworth <dfarnsworth@mvista.com> and
+ * now maintained by Sylvain Munaut <tnt@246tNt.com>
+ *
+ * Copyright (C) 2007 Domen Puncer, Telargo, Inc.
+ * Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com>
+ * Copyright (C) 2003-2004 MontaVista, Software, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ *
+ */
+
+#include <linux/module.h>
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/spinlock.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/crc32.h>
+#include <linux/hardirq.h>
+#include <linux/delay.h>
+
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/ethtool.h>
+#include <linux/skbuff.h>
+
+#include <asm/of_device.h>
+#include <asm/of_platform.h>
+#include <asm/io.h>
+#include <asm/delay.h>
+#include <asm/mpc52xx.h>
+
+#include <sysdev/bestcomm/bestcomm.h>
+#include <sysdev/bestcomm/fec.h>
+
+#include "fec.h"
+
+#define DRIVER_NAME "mpc52xx-fec"
+
+static irqreturn_t fec_interrupt(int, void *);
+static irqreturn_t fec_rx_interrupt(int, void *);
+static irqreturn_t fec_tx_interrupt(int, void *);
+static struct net_device_stats *fec_get_stats(struct net_device *);
+static void fec_set_multicast_list(struct net_device *dev);
+static void fec_hw_init(struct net_device *dev);
+static void fec_stop(struct net_device *dev);
+static void fec_start(struct net_device *dev);
+static void fec_reset(struct net_device *dev);
+
+static u8 mpc52xx_fec_mac_addr[6];
+static const u8 null_mac[6];
+
+static void fec_tx_timeout(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+
+ dev_warn(&dev->dev, "transmit timed out\n");
+
+ fec_reset(dev);
+
+ priv->stats.tx_errors++;
+
+ if (!priv->tx_full)
+ netif_wake_queue(dev);
+}
+
+static void fec_set_paddr(struct net_device *dev, u8 *mac)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ struct mpc52xx_fec __iomem *fec = priv->fec;
+
+ out_be32(&fec->paddr1, *(u32 *)(&mac[0]));
+ out_be32(&fec->paddr2, (*(u16 *)(&mac[4]) << 16) | FEC_PADDR2_TYPE);
+}
+
+static void fec_get_paddr(struct net_device *dev, u8 *mac)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ struct mpc52xx_fec __iomem *fec = priv->fec;
+
+ *(u32 *)(&mac[0]) = in_be32(&fec->paddr1);
+ *(u16 *)(&mac[4]) = in_be32(&fec->paddr2) >> 16;
+}
+
+static int fec_set_mac_address(struct net_device *dev, void *addr)
+{
+ struct sockaddr *sock = addr;
+
+ memcpy(dev->dev_addr, sock->sa_data, dev->addr_len);
+
+ fec_set_paddr(dev, sock->sa_data);
+ return 0;
+}
+
+static void fec_free_rx_buffers(struct bcom_task *s)
+{
+ struct sk_buff *skb;
+
+ while (!bcom_queue_empty(s)) {
+ skb = bcom_retrieve_buffer(s, NULL, NULL);
+ kfree_skb(skb);
+ }
+}
+
+static int fec_alloc_rx_buffers(struct bcom_task *rxtsk)
+{
+ while (!bcom_queue_full(rxtsk)) {
+ struct sk_buff *skb;
+ struct bcom_fec_bd *bd;
+
+ skb = dev_alloc_skb(FEC_RX_BUFFER_SIZE);
+ if (skb == NULL)
+ return -EAGAIN;
+
+ /* zero out the initial receive buffers to aid debugging */
+ memset(skb->data, 0, FEC_RX_BUFFER_SIZE);
+
+ bd = (struct bcom_fec_bd *)bcom_prepare_next_buffer(rxtsk);
+
+ bd->status = FEC_RX_BUFFER_SIZE;
+ bd->skb_pa = virt_to_phys(skb->data);
+
+ bcom_submit_next_buffer(rxtsk, skb);
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_FEC_MPC52xx_MDIO
+/* based on generic_adjust_link from fs_enet-main.c */
+static void fec_adjust_link(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ struct phy_device *phydev = priv->phydev;
+ int new_state = 0;
+
+ if (phydev->link != PHY_DOWN) {
+ if (phydev->duplex != priv->duplex) {
+ struct mpc52xx_fec __iomem *fec = priv->fec;
+ u32 rcntrl;
+ u32 tcntrl;
+
+ new_state = 1;
+ priv->duplex = phydev->duplex;
+
+ rcntrl = in_be32(&fec->r_cntrl);
+ tcntrl = in_be32(&fec->x_cntrl);
+
+ rcntrl &= ~FEC_RCNTRL_DRT;
+ tcntrl &= ~FEC_TCNTRL_FDEN;
+ if (phydev->duplex == DUPLEX_FULL)
+ tcntrl |= FEC_TCNTRL_FDEN; /* FD enable */
+ else
+ rcntrl |= FEC_RCNTRL_DRT; /* disable Rx on Tx (HD) */
+
+ out_be32(&fec->r_cntrl, rcntrl);
+ out_be32(&fec->x_cntrl, tcntrl);
+ }
+
+ if (phydev->speed != priv->speed) {
+ new_state = 1;
+ priv->speed = phydev->speed;
+ }
+
+ if (priv->link == PHY_DOWN) {
+ new_state = 1;
+ priv->link = phydev->link;
+ netif_schedule(dev);
+ netif_carrier_on(dev);
+ netif_start_queue(dev);
+ }
+
+ } else if (priv->link) {
+ new_state = 1;
+ priv->link = PHY_DOWN;
+ priv->speed = 0;
+ priv->duplex = -1;
+ netif_stop_queue(dev);
+ netif_carrier_off(dev);
+ }
+
+ if (new_state && netif_msg_link(priv))
+ phy_print_status(phydev);
+}
+
+static int fec_init_phy(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ struct phy_device *phydev;
+ char phy_id[BUS_ID_SIZE];
+
+ struct device_node *dn, *phy_dn;
+ unsigned int phy_addr;
+ const phandle *ph;
+ const unsigned int *prop;
+ struct resource res;
+ int ret;
+
+ dn = priv->ofdev->node;
+ ph = of_get_property(dn, "phy-handle", NULL);
+ if (!ph) {
+ dev_err(&dev->dev, "can't find \"phy-handle\" in device tree\n");
+ return -ENODEV;
+ }
+ phy_dn = of_find_node_by_phandle(*ph);
+
+ prop = of_get_property(phy_dn, "reg", NULL);
+ ret = of_address_to_resource(phy_dn->parent, 0, &res);
+ if (ret) {
+ dev_err(&dev->dev, "of_address_to_resource failed\n");
+ return ret;
+ }
+
+ phy_addr = *prop;
+ of_node_put(phy_dn);
+
+ snprintf(phy_id, BUS_ID_SIZE, PHY_ID_FMT, res.start, phy_addr);
+
+ priv->link = PHY_DOWN;
+ priv->speed = 0;
+ priv->duplex = -1;
+
+ phydev = phy_connect(dev, phy_id, &fec_adjust_link, 0, PHY_INTERFACE_MODE_MII);
+ if (IS_ERR(phydev)) {
+ dev_err(&dev->dev, "phy_connect failed\n");
+ return PTR_ERR(phydev);
+ }
+ dev_info(&dev->dev, "attached phy %i to driver %s\n",
+ phydev->addr, phydev->drv->name);
+
+ priv->phydev = phydev;
+
+ return 0;
+}
+
+static int fec_phy_start(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ int err;
+
+ err = fec_init_phy(dev);
+ if (err) {
+ dev_err(&dev->dev, "fec_init_phy failed\n");
+ return err;
+ }
+
+ /* reset phy - this also wakes it from PDOWN */
+ phy_write(priv->phydev, MII_BMCR, BMCR_RESET);
+ phy_start(priv->phydev);
+
+ return 0;
+}
+
+static void fec_phy_stop(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+
+ phy_disconnect(priv->phydev);
+ /* power down phy */
+ phy_stop(priv->phydev);
+ phy_write(priv->phydev, MII_BMCR, BMCR_PDOWN);
+}
+
+static int fec_phy_mii_ioctl(struct fec_priv *priv,
+ struct mii_ioctl_data *mii_data, int cmd)
+{
+ return phy_mii_ioctl(priv->phydev, mii_data, cmd);
+}
+
+static void fec_phy_hw_init(struct fec_priv *priv)
+{
+ struct mpc52xx_fec __iomem *fec = priv->fec;
+
+ out_be32(&fec->mii_speed, priv->phy_speed);
+ out_be32(&fec->imask, in_be32(&fec->imask) | FEC_IMASK_MII);
+}
+#else
+static inline int fec_phy_start(struct net_device *dev) { return 0; }
+static inline void fec_phy_stop(struct net_device *dev) { }
+static inline int fec_phy_mii_ioctl(struct fec_priv *priv,
+ struct mii_ioctl_data *mii_data, int cmd) { return -ENOTSUPP; }
+static inline void fec_phy_hw_init(struct fec_priv *priv) { }
+#endif
+
+static int fec_open(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ int err = -EBUSY;
+
+ if (request_irq(dev->irq, &fec_interrupt, IRQF_DISABLED | IRQF_SHARED,
+ DRIVER_NAME "_ctrl", dev)) {
+ dev_err(&dev->dev, "ctrl interrupt request failed\n");
+ goto out;
+ }
+ if (request_irq(priv->r_irq, &fec_rx_interrupt, IRQF_DISABLED,
+ DRIVER_NAME "_rx", dev)) {
+ dev_err(&dev->dev, "rx interrupt request failed\n");
+ goto free_ctrl_irq;
+ }
+ if (request_irq(priv->t_irq, &fec_tx_interrupt, IRQF_DISABLED,
+ DRIVER_NAME "_tx", dev)) {
+ dev_err(&dev->dev, "tx interrupt request failed\n");
+ goto free_2irqs;
+ }
+
+ bcom_fec_rx_reset(priv->rx_dmatsk);
+ bcom_fec_tx_reset(priv->tx_dmatsk);
+
+ err = fec_alloc_rx_buffers(priv->rx_dmatsk);
+ if (err) {
+ dev_err(&dev->dev, "fec_alloc_rx_buffers failed\n");
+ goto free_irqs;
+ }
+
+ err = fec_phy_start(dev);
+ if (err)
+ goto free_skbs;
+
+ bcom_enable(priv->rx_dmatsk);
+ bcom_enable(priv->tx_dmatsk);
+
+ fec_start(dev);
+
+ netif_start_queue(dev);
+
+ return 0;
+
+ free_skbs:
+ fec_free_rx_buffers(priv->rx_dmatsk);
+
+ free_irqs:
+ free_irq(priv->t_irq, dev);
+ free_2irqs:
+ free_irq(priv->r_irq, dev);
+ free_ctrl_irq:
+ free_irq(dev->irq, dev);
+ out:
+
+ return err;
+}
+
+static int fec_close(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+
+ netif_stop_queue(dev);
+
+ fec_stop(dev);
+
+ fec_free_rx_buffers(priv->rx_dmatsk);
+
+ free_irq(dev->irq, dev);
+ free_irq(priv->r_irq, dev);
+ free_irq(priv->t_irq, dev);
+
+ fec_phy_stop(dev);
+
+ return 0;
+}
+
+/* This will only be invoked if your driver is _not_ in XOFF state.
+ * What this means is that you need not check it, and that this
+ * invariant will hold if you make sure that the netif_*_queue()
+ * calls are done at the proper times.
+ */
+static int fec_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ struct bcom_fec_bd *bd;
+
+ if (bcom_queue_full(priv->tx_dmatsk)) {
+ if (net_ratelimit())
+ dev_err(&dev->dev, "transmit queue overrun\n");
+ return 1;
+ }
+
+ spin_lock_irq(&priv->lock);
+ dev->trans_start = jiffies;
+
+ bd = (struct bcom_fec_bd *)
+ bcom_prepare_next_buffer(priv->tx_dmatsk);
+
+ bd->status = skb->len | BCOM_FEC_TX_BD_TFD | BCOM_FEC_TX_BD_TC;
+ bd->skb_pa = virt_to_phys(skb->data);
+
+ bcom_submit_next_buffer(priv->tx_dmatsk, skb);
+
+ if (bcom_queue_full(priv->tx_dmatsk)) {
+ priv->tx_full = 1;
+ netif_stop_queue(dev);
+ }
+
+ spin_unlock_irq(&priv->lock);
+
+ return 0;
+}
+
+/* This handles BestComm transmit task interrupts
+ */
+static irqreturn_t fec_tx_interrupt(int irq, void *dev_id)
+{
+ struct net_device *dev = dev_id;
+ struct fec_priv *priv = netdev_priv(dev);
+
+ spin_lock(&priv->lock);
+
+ while (bcom_buffer_done(priv->tx_dmatsk)) {
+ struct sk_buff *skb;
+ skb = bcom_retrieve_buffer(priv->tx_dmatsk, NULL, NULL);
+
+ priv->tx_full = 0;
+ dev_kfree_skb_irq(skb);
+ }
+
+ if (netif_queue_stopped(dev) && !priv->tx_full)
+ netif_wake_queue(dev);
+
+ spin_unlock(&priv->lock);
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t fec_rx_interrupt(int irq, void *dev_id)
+{
+ struct net_device *dev = dev_id;
+ struct fec_priv *priv = netdev_priv(dev);
+
+ while (bcom_buffer_done(priv->rx_dmatsk)) {
+ struct sk_buff *skb;
+ struct sk_buff *rskb;
+ struct bcom_fec_bd *bd;
+ u32 status;
+
+ rskb = bcom_retrieve_buffer(priv->rx_dmatsk, &status, NULL);
+
+ /* Test for errors in received frame */
+ if (status & BCOM_FEC_RX_BD_ERRORS) {
+ /* Drop packet and reuse the buffer */
+ bd = (struct bcom_fec_bd *)
+ bcom_prepare_next_buffer(priv->rx_dmatsk);
+
+ bd->status = FEC_RX_BUFFER_SIZE;
+ bd->skb_pa = virt_to_phys(rskb->data);
+
+ bcom_submit_next_buffer(priv->rx_dmatsk, rskb);
+
+ priv->stats.rx_dropped++;
+
+ continue;
+ }
+
+ /* skbs are allocated on open, so now we allocate a new one,
+ * and remove the old (with the packet) */
+ skb = dev_alloc_skb(FEC_RX_BUFFER_SIZE);
+ if (skb) {
+ /* Process the received skb */
+ int length = status & BCOM_FEC_RX_BD_LEN_MASK;
+
+ skb_put(rskb, length - 4); /* length without CRC32 */
+
+ rskb->dev = dev;
+ rskb->protocol = eth_type_trans(rskb, dev);
+
+ netif_rx(rskb);
+ dev->last_rx = jiffies;
+ } else {
+ /* Can't get a new one : reuse the same & drop pkt */
+ dev_notice(&dev->dev, "Memory squeeze, dropping packet.\n");
+ priv->stats.rx_dropped++;
+
+ skb = rskb;
+ }
+
+ bd = (struct bcom_fec_bd *)
+ bcom_prepare_next_buffer(priv->rx_dmatsk);
+
+ bd->status = FEC_RX_BUFFER_SIZE;
+ bd->skb_pa = virt_to_phys(skb->data);
+
+ bcom_submit_next_buffer(priv->rx_dmatsk, skb);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t fec_interrupt(int irq, void *dev_id)
+{
+ struct net_device *dev = dev_id;
+ struct fec_priv *priv = netdev_priv(dev);
+ struct mpc52xx_fec __iomem *fec = priv->fec;
+ u32 ievent;
+
+ ievent = in_be32(&fec->ievent);
+
+ ievent &= ~FEC_IEVENT_MII; /* mii is handled separately */
+ if (!ievent)
+ return IRQ_NONE;
+
+ out_be32(&fec->ievent, ievent); /* clear pending events */
+
+ if (ievent & ~(FEC_IEVENT_RFIFO_ERROR | FEC_IEVENT_XFIFO_ERROR)) {
+ if (ievent & ~FEC_IEVENT_TFINT)
+ dev_dbg(&dev->dev, "ievent: %08x\n", ievent);
+ return IRQ_HANDLED;
+ }
+
+ if (net_ratelimit() && (ievent & FEC_IEVENT_RFIFO_ERROR))
+ dev_warn(&dev->dev, "FEC_IEVENT_RFIFO_ERROR\n");
+ if (net_ratelimit() && (ievent & FEC_IEVENT_XFIFO_ERROR))
+ dev_warn(&dev->dev, "FEC_IEVENT_XFIFO_ERROR\n");
+
+ fec_reset(dev);
+
+ netif_wake_queue(dev);
+ return IRQ_HANDLED;
+}
+
+/*
+ * Get the current statistics.
+ * This may be called with the card open or closed.
+ */
+static struct net_device_stats *fec_get_stats(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ struct net_device_stats *stats = &priv->stats;
+ struct mpc52xx_fec __iomem *fec = priv->fec;
+
+ stats->rx_bytes = in_be32(&fec->rmon_r_octets);
+ stats->rx_packets = in_be32(&fec->rmon_r_packets);
+ stats->rx_errors = in_be32(&fec->rmon_r_crc_align) +
+ in_be32(&fec->rmon_r_undersize) +
+ in_be32(&fec->rmon_r_oversize) +
+ in_be32(&fec->rmon_r_frag) +
+ in_be32(&fec->rmon_r_jab);
+
+ stats->tx_bytes = in_be32(&fec->rmon_t_octets);
+ stats->tx_packets = in_be32(&fec->rmon_t_packets);
+ stats->tx_errors = in_be32(&fec->rmon_t_crc_align) +
+ in_be32(&fec->rmon_t_undersize) +
+ in_be32(&fec->rmon_t_oversize) +
+ in_be32(&fec->rmon_t_frag) +
+ in_be32(&fec->rmon_t_jab);
+
+ stats->multicast = in_be32(&fec->rmon_r_mc_pkt);
+ stats->collisions = in_be32(&fec->rmon_t_col);
+
+ /* detailed rx_errors: */
+ stats->rx_length_errors = in_be32(&fec->rmon_r_undersize)
+ + in_be32(&fec->rmon_r_oversize)
+ + in_be32(&fec->rmon_r_frag)
+ + in_be32(&fec->rmon_r_jab);
+ stats->rx_over_errors = in_be32(&fec->r_macerr);
+ stats->rx_crc_errors = in_be32(&fec->ieee_r_crc);
+ stats->rx_frame_errors = in_be32(&fec->ieee_r_align);
+ stats->rx_fifo_errors = in_be32(&fec->rmon_r_drop);
+ stats->rx_missed_errors = in_be32(&fec->rmon_r_drop);
+
+ /* detailed tx_errors: */
+ stats->tx_aborted_errors = 0;
+ stats->tx_carrier_errors = in_be32(&fec->ieee_t_cserr);
+ stats->tx_fifo_errors = in_be32(&fec->rmon_t_drop);
+ stats->tx_heartbeat_errors = in_be32(&fec->ieee_t_sqe);
+ stats->tx_window_errors = in_be32(&fec->ieee_t_lcol);
+
+ return stats;
+}
+
+/*
+ * Read MIB counters in order to reset them,
+ * then zero all the stats fields in memory
+ */
+static void fec_reset_stats(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ struct mpc52xx_fec __iomem *fec = priv->fec;
+
+ out_be32(&fec->mib_control, FEC_MIB_DISABLE);
+ memset_io(&fec->rmon_t_drop, 0, (__force u32)&fec->reserved10 -
+ (__force u32)&fec->rmon_t_drop);
+ out_be32(&fec->mib_control, 0);
+
+ memset(&priv->stats, 0, sizeof(priv->stats));
+}
+
+/*
+ * Set or clear the multicast filter for this adaptor.
+ */
+static void fec_set_multicast_list(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ struct mpc52xx_fec __iomem *fec = priv->fec;
+ u32 rx_control;
+
+ rx_control = in_be32(&fec->r_cntrl);
+
+ if (dev->flags & IFF_PROMISC) {
+ rx_control |= FEC_RCNTRL_PROM;
+ out_be32(&fec->r_cntrl, rx_control);
+ } else {
+ rx_control &= ~FEC_RCNTRL_PROM;
+ out_be32(&fec->r_cntrl, rx_control);
+
+ if (dev->flags & IFF_ALLMULTI) {
+ out_be32(&fec->gaddr1, 0xffffffff);
+ out_be32(&fec->gaddr2, 0xffffffff);
+ } else {
+ u32 crc;
+ int i;
+ struct dev_mc_list *dmi;
+ u32 gaddr1 = 0x00000000;
+ u32 gaddr2 = 0x00000000;
+
+ dmi = dev->mc_list;
+ for (i=0; i<dev->mc_count; i++) {
+ crc = ether_crc_le(6, dmi->dmi_addr) >> 26;
+ if (crc >= 32)
+ gaddr1 |= 1 << (crc-32);
+ else
+ gaddr2 |= 1 << crc;
+ dmi = dmi->next;
+ }
+ out_be32(&fec->gaddr1, gaddr1);
+ out_be32(&fec->gaddr2, gaddr2);
+ }
+ }
+}
+
+static void __init fec_str2mac(char *str, unsigned char *mac)
+{
+ int i;
+ u64 val64;
+
+ val64 = simple_strtoull(str, NULL, 16);
+
+ for (i = 0; i < 6; i++)
+ mac[5-i] = val64 >> (i*8);
+}
+
+static int __init mpc52xx_fec_mac_setup(char *mac_address)
+{
+ fec_str2mac(mac_address, mpc52xx_fec_mac_addr);
+ return 0;
+}
+
+__setup("mpc52xx-mac=", mpc52xx_fec_mac_setup);
+
+/**
+ * fec_hw_init
+ * @dev: network device
+ *
+ * Setup various hardware setting, only needed once on start
+ */
+static void fec_hw_init(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ struct mpc52xx_fec __iomem *fec = priv->fec;
+ int i;
+
+ /* Whack a reset. We should wait for this. */
+ out_be32(&fec->ecntrl, FEC_ECNTRL_RESET);
+ for (i = 0; i < FEC_RESET_DELAY; ++i) {
+ if ((in_be32(&fec->ecntrl) & FEC_ECNTRL_RESET) == 0)
+ break;
+ udelay(1);
+ }
+ if (i == FEC_RESET_DELAY)
+ dev_err(&dev->dev, "FEC Reset timeout!\n");
+
+ /* set pause to 0x20 frames */
+ out_be32(&fec->op_pause, FEC_OP_PAUSE_OPCODE | 0x20);
+
+ /* high service request will be deasserted when there's < 7 bytes in fifo
+ * low service request will be deasserted when there's < 4*7 bytes in fifo
+ */
+ out_be32(&fec->rfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7);
+ out_be32(&fec->tfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7);
+
+ /* alarm when <= x bytes in FIFO */
+ out_be32(&fec->rfifo_alarm, 0x0000030c);
+ out_be32(&fec->tfifo_alarm, 0x00000100);
+
+ /* begin transmittion when 256 bytes are in FIFO (or EOF or FIFO full) */
+ out_be32(&fec->x_wmrk, FEC_FIFO_WMRK_256B);
+
+ /* enable crc generation */
+ out_be32(&fec->xmit_fsm, FEC_XMIT_FSM_APPEND_CRC | FEC_XMIT_FSM_ENABLE_CRC);
+ out_be32(&fec->iaddr1, 0x00000000); /* No individual filter */
+ out_be32(&fec->iaddr2, 0x00000000); /* No individual filter */
+
+ /* set phy speed and enable MII interrupt
+ * this can't be done in phy driver, since it needs to be called
+ * before fec stuff (even on resume) */
+ fec_phy_hw_init(priv);
+}
+
+/**
+ * fec_start
+ * @dev: network device
+ *
+ * This function is called to start or restart the FEC during a link
+ * change. This happens on fifo errors or when switching between half
+ * and full duplex.
+ */
+static void fec_start(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ struct mpc52xx_fec __iomem *fec = priv->fec;
+ u32 rcntrl;
+ u32 tcntrl;
+ u32 tmp;
+
+ /* clear sticky error bits */
+ tmp = FEC_FIFO_STATUS_ERR | FEC_FIFO_STATUS_UF | FEC_FIFO_STATUS_OF;
+ out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status) & tmp);
+ out_be32(&fec->tfifo_status, in_be32(&fec->tfifo_status) & tmp);
+
+ /* FIFOs will reset on fec_enable */
+ out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_ENABLE_IS_RESET);
+
+ /* Set station address. */
+ fec_set_paddr(dev, dev->dev_addr);
+
+ fec_set_multicast_list(dev);
+
+ /* set max frame len, enable flow control, select mii mode */
+ rcntrl = FEC_RX_BUFFER_SIZE << 16; /* max frame length */
+ rcntrl |= FEC_RCNTRL_FCE;
+ rcntrl |= MII_RCNTL_MODE;
+ if (priv->duplex == DUPLEX_FULL)
+ tcntrl = FEC_TCNTRL_FDEN; /* FD enable */
+ else {
+ rcntrl |= FEC_RCNTRL_DRT; /* disable Rx on Tx (HD) */
+ tcntrl = 0;
+ }
+ out_be32(&fec->r_cntrl, rcntrl);
+ out_be32(&fec->x_cntrl, tcntrl);
+
+ /* Clear any outstanding interrupt. */
+ out_be32(&fec->ievent, 0xffffffff);
+
+ /* Enable interrupts we wish to service. */
+ out_be32(&fec->imask, FEC_IMASK_ENABLE);
+
+ /* And last, enable the transmit and receive processing. */
+ out_be32(&fec->ecntrl, FEC_ECNTRL_ETHER_EN);
+ out_be32(&fec->r_des_active, 0x01000000);
+
+ priv->tx_full = 0;
+}
+
+/**
+ * fec_stop
+ * @dev: network device
+ *
+ * stop all activity on fec and empty dma buffers
+ */
+static void fec_stop(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ struct mpc52xx_fec __iomem *fec = priv->fec;
+ unsigned long timeout;
+
+ /* disable all but MII interrupt */
+ out_be32(&fec->imask, in_be32(&fec->imask) & FEC_IMASK_MII);
+
+ /* Disable the rx task. */
+ bcom_disable(priv->rx_dmatsk);
+
+ /* Wait for tx queue to drain, but only if we're in process context */
+ if (!in_interrupt()) {
+ timeout = jiffies + msecs_to_jiffies(2000);
+ while (time_before(jiffies, timeout) &&
+ !bcom_queue_empty(priv->tx_dmatsk))
+ msleep(100);
+
+ if (time_after_eq(jiffies, timeout))
+ dev_err(&dev->dev, "queues didn't drain\n");
+#if 1
+ if (time_after_eq(jiffies, timeout)) {
+ dev_err(&dev->dev, " tx: index: %i, outdex: %i\n",
+ priv->tx_dmatsk->index,
+ priv->tx_dmatsk->outdex);
+ dev_err(&dev->dev, " rx: index: %i, outdex: %i\n",
+ priv->rx_dmatsk->index,
+ priv->rx_dmatsk->outdex);
+ }
+#endif
+ }
+
+ bcom_disable(priv->tx_dmatsk);
+
+ /* Stop FEC */
+ out_be32(&fec->ecntrl, in_be32(&fec->ecntrl) & ~FEC_ECNTRL_ETHER_EN);
+
+ return;
+}
+
+/* reset fec and bestcomm tasks */
+static void fec_reset(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ struct mpc52xx_fec __iomem *fec = priv->fec;
+
+ fec_stop(dev);
+
+ out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status));
+ out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_RESET_FIFO);
+
+ fec_free_rx_buffers(priv->rx_dmatsk);
+
+ fec_hw_init(dev);
+
+ phy_stop(priv->phydev);
+ phy_write(priv->phydev, MII_BMCR, BMCR_RESET);
+ phy_start(priv->phydev);
+
+ bcom_fec_rx_reset(priv->rx_dmatsk);
+ bcom_fec_tx_reset(priv->tx_dmatsk);
+
+ fec_alloc_rx_buffers(priv->rx_dmatsk);
+
+ fec_start(dev);
+}
+
+
+/* ethtool interface */
+static void fec_get_drvinfo(struct net_device *dev,
+ struct ethtool_drvinfo *info)
+{
+ strcpy(info->driver, DRIVER_NAME);
+}
+
+static int fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ return phy_ethtool_gset(priv->phydev, cmd);
+}
+
+static int fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ return phy_ethtool_sset(priv->phydev, cmd);
+}
+
+static u32 fec_get_msglevel(struct net_device *dev)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ return priv->msg_enable;
+}
+
+static void fec_set_msglevel(struct net_device *dev, u32 level)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+ priv->msg_enable = level;
+}
+
+static const struct ethtool_ops fec_ethtool_ops = {
+ .get_drvinfo = fec_get_drvinfo,
+ .get_settings = fec_get_settings,
+ .set_settings = fec_set_settings,
+ .get_link = ethtool_op_get_link,
+ .get_msglevel = fec_get_msglevel,
+ .set_msglevel = fec_set_msglevel,
+};
+
+
+static int fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
+{
+ struct fec_priv *priv = netdev_priv(dev);
+
+ return fec_phy_mii_ioctl(priv, if_mii(rq), cmd);
+}
+
+/* ======================================================================== */
+/* OF Driver */
+/* ======================================================================== */
+
+static int __devinit
+mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match)
+{
+ int rv;
+ struct net_device *ndev;
+ struct fec_priv *priv = NULL;
+ struct resource mem;
+
+ phys_addr_t rx_fifo;
+ phys_addr_t tx_fifo;
+
+ /* Get the ether ndev & it's private zone */
+ ndev = alloc_etherdev(sizeof(struct fec_priv));
+ if (!ndev)
+ return -ENOMEM;
+
+ priv = netdev_priv(ndev);
+
+ priv->ofdev = op;
+
+ /* Reserve FEC control zone */
+ rv = of_address_to_resource(op->node, 0, &mem);
+ if (rv) {
+ printk(KERN_ERR DRIVER_NAME ": "
+ "Error while parsing device node resource\n" );
+ return rv;
+ }
+ if ((mem.end - mem.start + 1) != sizeof(struct mpc52xx_fec)) {
+ printk(KERN_ERR DRIVER_NAME
+ " - invalid resource size (%lx != %x), check mpc52xx_devices.c\n",
+ (unsigned long)(mem.end - mem.start + 1), sizeof(struct mpc52xx_fec));
+ return -EINVAL;
+ }
+
+ if (!request_mem_region(mem.start, sizeof(struct mpc52xx_fec), DRIVER_NAME))
+ return -EBUSY;
+
+ /* Init ether ndev with what we have */
+ ndev->open = fec_open;
+ ndev->stop = fec_close;
+ ndev->hard_start_xmit = fec_hard_start_xmit;
+ ndev->do_ioctl = fec_ioctl;
+ ndev->ethtool_ops = &fec_ethtool_ops;
+ ndev->get_stats = fec_get_stats;
+ ndev->set_mac_address = fec_set_mac_address;
+ ndev->set_multicast_list = fec_set_multicast_list;
+ ndev->tx_timeout = fec_tx_timeout;
+ ndev->watchdog_timeo = FEC_WATCHDOG_TIMEOUT;
+ ndev->flags &= ~IFF_RUNNING;
+ ndev->base_addr = mem.start;
+
+ priv->t_irq = priv->r_irq = ndev->irq = NO_IRQ; /* IRQ are free for now */
+
+ spin_lock_init(&priv->lock);
+
+ /* ioremap the zones */
+ priv->fec = ioremap(mem.start, sizeof(struct mpc52xx_fec));
+
+ if (!priv->fec) {
+ rv = -ENOMEM;
+ goto probe_error;
+ }
+
+ /* Bestcomm init */
+ rx_fifo = ndev->base_addr + offsetof(struct mpc52xx_fec, rfifo_data);
+ tx_fifo = ndev->base_addr + offsetof(struct mpc52xx_fec, tfifo_data);
+
+ priv->rx_dmatsk = bcom_fec_rx_init(FEC_RX_NUM_BD, rx_fifo, FEC_RX_BUFFER_SIZE);
+ priv->tx_dmatsk = bcom_fec_tx_init(FEC_TX_NUM_BD, tx_fifo);
+
+ if (!priv->rx_dmatsk || !priv->tx_dmatsk) {
+ printk(KERN_ERR DRIVER_NAME ": Can not init SDMA tasks\n" );
+ rv = -ENOMEM;
+ goto probe_error;
+ }
+
+ /* Get the IRQ we need one by one */
+ /* Control */
+ ndev->irq = irq_of_parse_and_map(op->node, 0);
+
+ /* RX */
+ priv->r_irq = bcom_get_task_irq(priv->rx_dmatsk);
+
+ /* TX */
+ priv->t_irq = bcom_get_task_irq(priv->tx_dmatsk);
+
+ /* MAC address init */
+ if (memcmp(mpc52xx_fec_mac_addr, null_mac, 6) != 0)
+ memcpy(ndev->dev_addr, mpc52xx_fec_mac_addr, 6);
+ else
+ fec_get_paddr(ndev, ndev->dev_addr);
+
+ /* Phy speed */
+ priv->phy_speed = ((mpc52xx_find_ipb_freq(op->node) >> 20) / 5) << 1;
+
+ priv->msg_enable = (NETIF_MSG_IFUP << 1) - 1;
+ priv->duplex = DUPLEX_FULL;
+
+ /* Hardware init */
+ fec_hw_init(ndev);
+
+ fec_reset_stats(ndev);
+
+ /* Register the new network device */
+ rv = register_netdev(ndev);
+ if (rv < 0)
+ goto probe_error;
+
+ /* We're done ! */
+ dev_set_drvdata(&op->dev, ndev);
+
+ return 0;
+
+
+ /* Error handling - free everything that might be allocated */
+probe_error:
+
+ irq_dispose_mapping(ndev->irq);
+
+ if (priv->rx_dmatsk)
+ bcom_fec_rx_release(priv->rx_dmatsk);
+ if (priv->tx_dmatsk)
+ bcom_fec_tx_release(priv->tx_dmatsk);
+
+ if (priv->fec)
+ iounmap(priv->fec);
+
+ release_mem_region(mem.start, sizeof(struct mpc52xx_fec));
+
+ free_netdev(ndev);
+
+ return rv;
+}
+
+static int
+mpc52xx_fec_remove(struct of_device *op)
+{
+ struct net_device *ndev;
+ struct fec_priv *priv;
+
+ ndev = dev_get_drvdata(&op->dev);
+ if (!ndev)
+ return 0;
+ priv = netdev_priv(ndev);
+
+ unregister_netdev(ndev);
+
+ irq_dispose_mapping(ndev->irq);
+
+ bcom_fec_rx_release(priv->rx_dmatsk);
+ bcom_fec_tx_release(priv->tx_dmatsk);
+
+ iounmap(priv->fec);
+
+ release_mem_region(ndev->base_addr, sizeof(struct mpc52xx_fec));
+
+ free_netdev(ndev);
+
+ dev_set_drvdata(&op->dev, NULL);
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int mpc52xx_fec_of_suspend(struct of_device *op, pm_message_t state)
+{
+ struct net_device *dev = dev_get_drvdata(&op->dev);
+
+ if (netif_running(dev))
+ fec_close(dev);
+
+ return 0;
+}
+
+static int mpc52xx_fec_of_resume(struct of_device *op)
+{
+ struct net_device *dev = dev_get_drvdata(&op->dev);
+
+ fec_hw_init(dev);
+ fec_reset_stats(dev);
+
+ if (netif_running(dev))
+ fec_open(dev);
+
+ return 0;
+}
+#endif
+
+static struct of_device_id mpc52xx_fec_match[] = {
+ {
+ .type = "network",
+ .compatible = "mpc5200-fec",
+ },
+ { }
+};
+
+MODULE_DEVICE_TABLE(of, mpc52xx_fec_match);
+
+static struct of_platform_driver mpc52xx_fec_driver = {
+ .owner = THIS_MODULE,
+ .name = DRIVER_NAME,
+ .match_table = mpc52xx_fec_match,
+ .probe = mpc52xx_fec_probe,
+ .remove = mpc52xx_fec_remove,
+#ifdef CONFIG_PM
+ .suspend = mpc52xx_fec_of_suspend,
+ .resume = mpc52xx_fec_of_resume,
+#endif
+};
+
+
+/* ======================================================================== */
+/* Module */
+/* ======================================================================== */
+
+static int __init
+mpc52xx_fec_init(void)
+{
+ int ret;
+ ret = fec_mdio_init();
+ if (ret) {
+ printk(KERN_ERR DRIVER_NAME ": fec_mdio_init failed\n");
+ return ret;
+ }
+
+ return of_register_platform_driver(&mpc52xx_fec_driver);
+}
+
+static void __exit
+mpc52xx_fec_exit(void)
+{
+ of_unregister_platform_driver(&mpc52xx_fec_driver);
+ fec_mdio_exit();
+}
+
+
+module_init(mpc52xx_fec_init);
+module_exit(mpc52xx_fec_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Dale Farnsworth");
+MODULE_DESCRIPTION("Ethernet driver for the Freescale MPC52xx FEC");
+
Index: linux.git/drivers/net/fec_mpc52xx/fec.h
===================================================================
--- /dev/null
+++ linux.git/drivers/net/fec_mpc52xx/fec.h
@@ -0,0 +1,329 @@
+/*
+ * drivers/drivers/net/fec_mpc52xx/fec.h
+ *
+ * Driver for the MPC5200 Fast Ethernet Controller
+ *
+ * Author: Dale Farnsworth <dfarnsworth@mvista.com>
+ *
+ * 2003-2004 (c) MontaVista, Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#ifndef __DRIVERS_NET_MPC52XX_FEC_H__
+#define __DRIVERS_NET_MPC52XX_FEC_H__
+
+#include <linux/phy.h>
+
+/* Tunable constant */
+/* FEC_RX_BUFFER_SIZE includes 4 bytes for CRC32 */
+#define FEC_RX_BUFFER_SIZE 1522 /* max receive packet size */
+#define FEC_RX_NUM_BD 64
+#define FEC_TX_NUM_BD 64
+
+#define FEC_RESET_DELAY 50 /* uS */
+
+#define FEC_WATCHDOG_TIMEOUT ((400*HZ)/1000)
+
+struct fec_priv {
+ int duplex;
+ int tx_full;
+ int r_irq;
+ int t_irq;
+ struct mpc52xx_fec __iomem *fec;
+ struct bcom_task *rx_dmatsk;
+ struct bcom_task *tx_dmatsk;
+ spinlock_t lock;
+ struct net_device_stats stats;
+ int msg_enable;
+ struct of_device *ofdev;
+ uint phy_speed;
+#ifdef CONFIG_FEC_MPC52xx_MDIO
+ struct phy_device *phydev;
+ enum phy_state link;
+ int speed;
+#endif /* CONFIG_FEC_MPC52xx_MDIO */
+};
+
+
+/* ======================================================================== */
+/* Hardware register sets & bits */
+/* ======================================================================== */
+
+struct mpc52xx_fec {
+ u32 fec_id; /* FEC + 0x000 */
+ u32 ievent; /* FEC + 0x004 */
+ u32 imask; /* FEC + 0x008 */
+
+ u32 reserved0[1]; /* FEC + 0x00C */
+ u32 r_des_active; /* FEC + 0x010 */
+ u32 x_des_active; /* FEC + 0x014 */
+ u32 r_des_active_cl; /* FEC + 0x018 */
+ u32 x_des_active_cl; /* FEC + 0x01C */
+ u32 ivent_set; /* FEC + 0x020 */
+ u32 ecntrl; /* FEC + 0x024 */
+
+ u32 reserved1[6]; /* FEC + 0x028-03C */
+ u32 mii_data; /* FEC + 0x040 */
+ u32 mii_speed; /* FEC + 0x044 */
+ u32 mii_status; /* FEC + 0x048 */
+
+ u32 reserved2[5]; /* FEC + 0x04C-05C */
+ u32 mib_data; /* FEC + 0x060 */
+ u32 mib_control; /* FEC + 0x064 */
+
+ u32 reserved3[6]; /* FEC + 0x068-7C */
+ u32 r_activate; /* FEC + 0x080 */
+ u32 r_cntrl; /* FEC + 0x084 */
+ u32 r_hash; /* FEC + 0x088 */
+ u32 r_data; /* FEC + 0x08C */
+ u32 ar_done; /* FEC + 0x090 */
+ u32 r_test; /* FEC + 0x094 */
+ u32 r_mib; /* FEC + 0x098 */
+ u32 r_da_low; /* FEC + 0x09C */
+ u32 r_da_high; /* FEC + 0x0A0 */
+
+ u32 reserved4[7]; /* FEC + 0x0A4-0BC */
+ u32 x_activate; /* FEC + 0x0C0 */
+ u32 x_cntrl; /* FEC + 0x0C4 */
+ u32 backoff; /* FEC + 0x0C8 */
+ u32 x_data; /* FEC + 0x0CC */
+ u32 x_status; /* FEC + 0x0D0 */
+ u32 x_mib; /* FEC + 0x0D4 */
+ u32 x_test; /* FEC + 0x0D8 */
+ u32 fdxfc_da1; /* FEC + 0x0DC */
+ u32 fdxfc_da2; /* FEC + 0x0E0 */
+ u32 paddr1; /* FEC + 0x0E4 */
+ u32 paddr2; /* FEC + 0x0E8 */
+ u32 op_pause; /* FEC + 0x0EC */
+
+ u32 reserved5[4]; /* FEC + 0x0F0-0FC */
+ u32 instr_reg; /* FEC + 0x100 */
+ u32 context_reg; /* FEC + 0x104 */
+ u32 test_cntrl; /* FEC + 0x108 */
+ u32 acc_reg; /* FEC + 0x10C */
+ u32 ones; /* FEC + 0x110 */
+ u32 zeros; /* FEC + 0x114 */
+ u32 iaddr1; /* FEC + 0x118 */
+ u32 iaddr2; /* FEC + 0x11C */
+ u32 gaddr1; /* FEC + 0x120 */
+ u32 gaddr2; /* FEC + 0x124 */
+ u32 random; /* FEC + 0x128 */
+ u32 rand1; /* FEC + 0x12C */
+ u32 tmp; /* FEC + 0x130 */
+
+ u32 reserved6[3]; /* FEC + 0x134-13C */
+ u32 fifo_id; /* FEC + 0x140 */
+ u32 x_wmrk; /* FEC + 0x144 */
+ u32 fcntrl; /* FEC + 0x148 */
+ u32 r_bound; /* FEC + 0x14C */
+ u32 r_fstart; /* FEC + 0x150 */
+ u32 r_count; /* FEC + 0x154 */
+ u32 r_lag; /* FEC + 0x158 */
+ u32 r_read; /* FEC + 0x15C */
+ u32 r_write; /* FEC + 0x160 */
+ u32 x_count; /* FEC + 0x164 */
+ u32 x_lag; /* FEC + 0x168 */
+ u32 x_retry; /* FEC + 0x16C */
+ u32 x_write; /* FEC + 0x170 */
+ u32 x_read; /* FEC + 0x174 */
+
+ u32 reserved7[2]; /* FEC + 0x178-17C */
+ u32 fm_cntrl; /* FEC + 0x180 */
+ u32 rfifo_data; /* FEC + 0x184 */
+ u32 rfifo_status; /* FEC + 0x188 */
+ u32 rfifo_cntrl; /* FEC + 0x18C */
+ u32 rfifo_lrf_ptr; /* FEC + 0x190 */
+ u32 rfifo_lwf_ptr; /* FEC + 0x194 */
+ u32 rfifo_alarm; /* FEC + 0x198 */
+ u32 rfifo_rdptr; /* FEC + 0x19C */
+ u32 rfifo_wrptr; /* FEC + 0x1A0 */
+ u32 tfifo_data; /* FEC + 0x1A4 */
+ u32 tfifo_status; /* FEC + 0x1A8 */
+ u32 tfifo_cntrl; /* FEC + 0x1AC */
+ u32 tfifo_lrf_ptr; /* FEC + 0x1B0 */
+ u32 tfifo_lwf_ptr; /* FEC + 0x1B4 */
+ u32 tfifo_alarm; /* FEC + 0x1B8 */
+ u32 tfifo_rdptr; /* FEC + 0x1BC */
+ u32 tfifo_wrptr; /* FEC + 0x1C0 */
+
+ u32 reset_cntrl; /* FEC + 0x1C4 */
+ u32 xmit_fsm; /* FEC + 0x1C8 */
+
+ u32 reserved8[3]; /* FEC + 0x1CC-1D4 */
+ u32 rdes_data0; /* FEC + 0x1D8 */
+ u32 rdes_data1; /* FEC + 0x1DC */
+ u32 r_length; /* FEC + 0x1E0 */
+ u32 x_length; /* FEC + 0x1E4 */
+ u32 x_addr; /* FEC + 0x1E8 */
+ u32 cdes_data; /* FEC + 0x1EC */
+ u32 status; /* FEC + 0x1F0 */
+ u32 dma_control; /* FEC + 0x1F4 */
+ u32 des_cmnd; /* FEC + 0x1F8 */
+ u32 data; /* FEC + 0x1FC */
+
+ u32 rmon_t_drop; /* FEC + 0x200 */
+ u32 rmon_t_packets; /* FEC + 0x204 */
+ u32 rmon_t_bc_pkt; /* FEC + 0x208 */
+ u32 rmon_t_mc_pkt; /* FEC + 0x20C */
+ u32 rmon_t_crc_align; /* FEC + 0x210 */
+ u32 rmon_t_undersize; /* FEC + 0x214 */
+ u32 rmon_t_oversize; /* FEC + 0x218 */
+ u32 rmon_t_frag; /* FEC + 0x21C */
+ u32 rmon_t_jab; /* FEC + 0x220 */
+ u32 rmon_t_col; /* FEC + 0x224 */
+ u32 rmon_t_p64; /* FEC + 0x228 */
+ u32 rmon_t_p65to127; /* FEC + 0x22C */
+ u32 rmon_t_p128to255; /* FEC + 0x230 */
+ u32 rmon_t_p256to511; /* FEC + 0x234 */
+ u32 rmon_t_p512to1023; /* FEC + 0x238 */
+ u32 rmon_t_p1024to2047; /* FEC + 0x23C */
+ u32 rmon_t_p_gte2048; /* FEC + 0x240 */
+ u32 rmon_t_octets; /* FEC + 0x244 */
+ u32 ieee_t_drop; /* FEC + 0x248 */
+ u32 ieee_t_frame_ok; /* FEC + 0x24C */
+ u32 ieee_t_1col; /* FEC + 0x250 */
+ u32 ieee_t_mcol; /* FEC + 0x254 */
+ u32 ieee_t_def; /* FEC + 0x258 */
+ u32 ieee_t_lcol; /* FEC + 0x25C */
+ u32 ieee_t_excol; /* FEC + 0x260 */
+ u32 ieee_t_macerr; /* FEC + 0x264 */
+ u32 ieee_t_cserr; /* FEC + 0x268 */
+ u32 ieee_t_sqe; /* FEC + 0x26C */
+ u32 t_fdxfc; /* FEC + 0x270 */
+ u32 ieee_t_octets_ok; /* FEC + 0x274 */
+
+ u32 reserved9[2]; /* FEC + 0x278-27C */
+ u32 rmon_r_drop; /* FEC + 0x280 */
+ u32 rmon_r_packets; /* FEC + 0x284 */
+ u32 rmon_r_bc_pkt; /* FEC + 0x288 */
+ u32 rmon_r_mc_pkt; /* FEC + 0x28C */
+ u32 rmon_r_crc_align; /* FEC + 0x290 */
+ u32 rmon_r_undersize; /* FEC + 0x294 */
+ u32 rmon_r_oversize; /* FEC + 0x298 */
+ u32 rmon_r_frag; /* FEC + 0x29C */
+ u32 rmon_r_jab; /* FEC + 0x2A0 */
+
+ u32 rmon_r_resvd_0; /* FEC + 0x2A4 */
+
+ u32 rmon_r_p64; /* FEC + 0x2A8 */
+ u32 rmon_r_p65to127; /* FEC + 0x2AC */
+ u32 rmon_r_p128to255; /* FEC + 0x2B0 */
+ u32 rmon_r_p256to511; /* FEC + 0x2B4 */
+ u32 rmon_r_p512to1023; /* FEC + 0x2B8 */
+ u32 rmon_r_p1024to2047; /* FEC + 0x2BC */
+ u32 rmon_r_p_gte2048; /* FEC + 0x2C0 */
+ u32 rmon_r_octets; /* FEC + 0x2C4 */
+ u32 ieee_r_drop; /* FEC + 0x2C8 */
+ u32 ieee_r_frame_ok; /* FEC + 0x2CC */
+ u32 ieee_r_crc; /* FEC + 0x2D0 */
+ u32 ieee_r_align; /* FEC + 0x2D4 */
+ u32 r_macerr; /* FEC + 0x2D8 */
+ u32 r_fdxfc; /* FEC + 0x2DC */
+ u32 ieee_r_octets_ok; /* FEC + 0x2E0 */
+
+ u32 reserved10[7]; /* FEC + 0x2E4-2FC */
+
+ u32 reserved11[64]; /* FEC + 0x300-3FF */
+};
+
+#define FEC_MIB_DISABLE 0x80000000
+
+#define FEC_IEVENT_HBERR 0x80000000
+#define FEC_IEVENT_BABR 0x40000000
+#define FEC_IEVENT_BABT 0x20000000
+#define FEC_IEVENT_GRA 0x10000000
+#define FEC_IEVENT_TFINT 0x08000000
+#define FEC_IEVENT_MII 0x00800000
+#define FEC_IEVENT_LATE_COL 0x00200000
+#define FEC_IEVENT_COL_RETRY_LIM 0x00100000
+#define FEC_IEVENT_XFIFO_UN 0x00080000
+#define FEC_IEVENT_XFIFO_ERROR 0x00040000
+#define FEC_IEVENT_RFIFO_ERROR 0x00020000
+
+#define FEC_IMASK_HBERR 0x80000000
+#define FEC_IMASK_BABR 0x40000000
+#define FEC_IMASK_BABT 0x20000000
+#define FEC_IMASK_GRA 0x10000000
+#define FEC_IMASK_MII 0x00800000
+#define FEC_IMASK_LATE_COL 0x00200000
+#define FEC_IMASK_COL_RETRY_LIM 0x00100000
+#define FEC_IMASK_XFIFO_UN 0x00080000
+#define FEC_IMASK_XFIFO_ERROR 0x00040000
+#define FEC_IMASK_RFIFO_ERROR 0x00020000
+
+/* all but MII, which is enabled separately */
+#define FEC_IMASK_ENABLE (FEC_IMASK_HBERR | FEC_IMASK_BABR | \
+ FEC_IMASK_BABT | FEC_IMASK_GRA | FEC_IMASK_LATE_COL | \
+ FEC_IMASK_COL_RETRY_LIM | FEC_IMASK_XFIFO_UN | \
+ FEC_IMASK_XFIFO_ERROR | FEC_IMASK_RFIFO_ERROR)
+
+#define FEC_RCNTRL_MAX_FL_SHIFT 16
+#define FEC_RCNTRL_LOOP 0x01
+#define FEC_RCNTRL_DRT 0x02
+#define FEC_RCNTRL_MII_MODE 0x04
+#define FEC_RCNTRL_PROM 0x08
+#define FEC_RCNTRL_BC_REJ 0x10
+#define FEC_RCNTRL_FCE 0x20
+
+#define FEC_TCNTRL_GTS 0x00000001
+#define FEC_TCNTRL_HBC 0x00000002
+#define FEC_TCNTRL_FDEN 0x00000004
+#define FEC_TCNTRL_TFC_PAUSE 0x00000008
+#define FEC_TCNTRL_RFC_PAUSE 0x00000010
+
+#define FEC_ECNTRL_RESET 0x00000001
+#define FEC_ECNTRL_ETHER_EN 0x00000002
+
+#define FEC_MII_DATA_ST 0x40000000 /* Start frame */
+#define FEC_MII_DATA_OP_RD 0x20000000 /* Perform read */
+#define FEC_MII_DATA_OP_WR 0x10000000 /* Perform write */
+#define FEC_MII_DATA_PA_MSK 0x0f800000 /* PHY Address mask */
+#define FEC_MII_DATA_RA_MSK 0x007c0000 /* PHY Register mask */
+#define FEC_MII_DATA_TA 0x00020000 /* Turnaround */
+#define FEC_MII_DATA_DATAMSK 0x0000ffff /* PHY data mask */
+
+#define FEC_MII_READ_FRAME (FEC_MII_DATA_ST | FEC_MII_DATA_OP_RD | FEC_MII_DATA_TA)
+#define FEC_MII_WRITE_FRAME (FEC_MII_DATA_ST | FEC_MII_DATA_OP_WR | FEC_MII_DATA_TA)
+
+#define FEC_MII_DATA_RA_SHIFT 0x12 /* MII reg addr bits */
+#define FEC_MII_DATA_PA_SHIFT 0x17 /* MII PHY addr bits */
+
+#define FEC_PADDR2_TYPE 0x8808
+
+#define FEC_OP_PAUSE_OPCODE 0x00010000
+
+#define FEC_FIFO_WMRK_256B 0x3
+
+#define FEC_FIFO_STATUS_ERR 0x00400000
+#define FEC_FIFO_STATUS_UF 0x00200000
+#define FEC_FIFO_STATUS_OF 0x00100000
+
+#define FEC_FIFO_CNTRL_FRAME 0x08000000
+#define FEC_FIFO_CNTRL_LTG_7 0x07000000
+
+#define FEC_RESET_CNTRL_RESET_FIFO 0x02000000
+#define FEC_RESET_CNTRL_ENABLE_IS_RESET 0x01000000
+
+#define FEC_XMIT_FSM_APPEND_CRC 0x02000000
+#define FEC_XMIT_FSM_ENABLE_CRC 0x01000000
+
+
+#ifdef CONFIG_FEC_MPC52xx_MDIO /* 18-wire MII mode */
+
+#define MII_RCNTL_MODE FEC_RCNTRL_MII_MODE
+
+int __init fec_mdio_init(void);
+void __exit fec_mdio_exit(void);
+
+#else /* 7-wire 10 Mbps mode */
+
+#define MII_RCNTL_MODE 0
+
+static inline int __init fec_mdio_init(void) { return 0; }
+static inline void __exit fec_mdio_exit(void) { }
+
+#endif /* CONFIG_FEC_MPC52xx_MDIO */
+
+#endif /* __DRIVERS_NET_MPC52XX_FEC_H__ */
Index: linux.git/drivers/net/fec_mpc52xx/fec_phy.c
===================================================================
--- /dev/null
+++ linux.git/drivers/net/fec_mpc52xx/fec_phy.c
@@ -0,0 +1,238 @@
+/*
+ * Driver for the MPC5200 Fast Ethernet Controller - PHY/MII part
+ *
+ * Copyright (C) 2007 Domen Puncer, Telargo, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/netdevice.h>
+#include <linux/phy.h>
+#include <asm/io.h>
+#include <asm/mpc52xx.h>
+#include <asm/of_platform.h>
+#include "fec.h"
+
+struct fec_mdio_priv {
+ int completed;
+ wait_queue_head_t wq;
+ struct mpc52xx_fec __iomem *regs;
+ int irq;
+};
+
+static int fec_mdio_read(struct mii_bus *bus, int phy_id, int reg)
+{
+ struct fec_mdio_priv *priv = bus->priv;
+ int tries = 100;
+
+ u32 request = FEC_MII_READ_FRAME;
+ request |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK;
+ request |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK;
+
+ out_be32(&priv->regs->mii_data, request);
+
+ /* wait for it to finish, this takes about 23 us on lite5200b */
+ while (priv->completed == 0 && tries--)
+ udelay(5);
+
+ priv->completed = 0;
+
+ if (tries == 0)
+ return -ETIMEDOUT;
+
+ return in_be32(&priv->regs->mii_data) & FEC_MII_DATA_DATAMSK;
+}
+
+static int fec_mdio_write(struct mii_bus *bus, int phy_id, int reg, u16 data)
+{
+ struct fec_mdio_priv *priv = bus->priv;
+ u32 value = data;
+ int tries = 100;
+
+ value |= FEC_MII_WRITE_FRAME;
+ value |= (phy_id << FEC_MII_DATA_PA_SHIFT) & FEC_MII_DATA_PA_MSK;
+ value |= (reg << FEC_MII_DATA_RA_SHIFT) & FEC_MII_DATA_RA_MSK;
+
+ out_be32(&priv->regs->mii_data, value);
+
+ /* wait for request to finish */
+ while (priv->completed == 0 && tries--)
+ udelay(5);
+
+ priv->completed = 0;
+
+ if (tries == 0)
+ return -ETIMEDOUT;
+
+ return 0;
+}
+
+static irqreturn_t fec_mdio_interrupt(int irq, void *dev_id)
+{
+ struct fec_mdio_priv *priv = dev_id;
+ struct mpc52xx_fec __iomem *fec;
+ int ievent;
+
+ fec = priv->regs;
+ ievent = in_be32(&fec->ievent);
+
+ ievent &= FEC_IEVENT_MII;
+ if (!ievent)
+ return IRQ_NONE;
+
+ out_be32(&fec->ievent, ievent);
+
+ priv->completed = 1;
+ wake_up(&priv->wq);
+
+ return IRQ_HANDLED;
+}
+
+static int fec_mdio_probe(struct of_device *of, const struct of_device_id *match)
+{
+ struct device *dev = &of->dev;
+ struct device_node *np = of->node;
+ struct device_node *child = NULL;
+ struct mii_bus *bus;
+ struct fec_mdio_priv *priv;
+ struct resource res = {};
+ int err;
+ int i;
+
+ bus = kzalloc(sizeof(*bus), GFP_KERNEL);
+ if (bus == NULL)
+ return -ENOMEM;
+ priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ if (priv == NULL) {
+ err = -ENOMEM;
+ goto out_free;
+ }
+
+ bus->name = "mpc52xx MII bus";
+ bus->read = fec_mdio_read;
+ bus->write = fec_mdio_write;
+
+ /* setup irqs */
+ bus->irq = kmalloc(sizeof(bus->irq[0]) * PHY_MAX_ADDR, GFP_KERNEL);
+ if (bus->irq == NULL) {
+ err = -ENOMEM;
+ goto out_free;
+ }
+ for (i=0; i<PHY_MAX_ADDR; i++)
+ bus->irq[i] = PHY_POLL;
+
+ while ((child = of_get_next_child(np, child)) != NULL) {
+ int irq = irq_of_parse_and_map(child, 0);
+ if (irq != NO_IRQ) {
+ const u32 *id = of_get_property(child, "reg", NULL);
+ bus->irq[*id] = irq;
+ }
+ }
+
+ /* setup registers */
+ err = of_address_to_resource(np, 0, &res);
+ if (err)
+ goto out_free;
+ priv->regs = ioremap(res.start, res.end - res.start + 1);
+ if (priv->regs == NULL) {
+ err = -ENOMEM;
+ goto out_free;
+ }
+
+ priv->irq = irq_of_parse_and_map(np, 0);
+ err = request_irq(priv->irq, &fec_mdio_interrupt, IRQF_DISABLED | IRQF_SHARED,
+ "fec_mdio", priv);
+ if (err) {
+ printk(KERN_ERR "%s: interrupt request failed with %i\n", __func__, err);
+ goto out_unmap;
+ }
+
+ bus->id = res.start;
+ bus->priv = priv;
+
+ bus->dev = dev;
+ dev_set_drvdata(dev, bus);
+
+ init_waitqueue_head(&priv->wq);
+
+ /* set MII speed */
+ out_be32(&priv->regs->mii_speed, ((mpc52xx_find_ipb_freq(of->node) >> 20) / 5) << 1);
+
+ /* enable MII interrupt */
+ out_be32(&priv->regs->imask, in_be32(&priv->regs->imask) | FEC_IMASK_MII);
+
+ err = mdiobus_register(bus);
+ if (err)
+ goto out_free_irq;
+
+ return 0;
+
+ out_free_irq:
+ free_irq(priv->irq, dev);
+ irq_dispose_mapping(priv->irq);
+ out_unmap:
+ iounmap(priv->regs);
+ out_free:
+ for (i=0; i<PHY_MAX_ADDR; i++)
+ if (bus->irq[i] != PHY_POLL)
+ irq_dispose_mapping(bus->irq[i]);
+ kfree(bus->irq);
+ kfree(priv);
+ kfree(bus);
+
+ return err;
+}
+
+static int fec_mdio_remove(struct of_device *of)
+{
+ struct device *dev = &of->dev;
+ struct mii_bus *bus = dev_get_drvdata(dev);
+ struct fec_mdio_priv *priv = bus->priv;
+ int i;
+
+ mdiobus_unregister(bus);
+ dev_set_drvdata(dev, NULL);
+
+ free_irq(priv->irq, dev);
+ irq_dispose_mapping(priv->irq);
+ iounmap(priv->regs);
+ for (i=0; i<PHY_MAX_ADDR; i++)
+ if (bus->irq[i])
+ irq_dispose_mapping(bus->irq[i]);
+ kfree(priv);
+ kfree(bus->irq);
+ kfree(bus);
+
+ return 0;
+}
+
+
+static struct of_device_id fec_mdio_match[] = {
+ {
+ .type = "mdio",
+ .compatible = "mpc5200b-fec-phy",
+ },
+ {},
+};
+
+static struct of_platform_driver fec_mdio_driver = {
+ .name = "mpc5200b-fec-phy",
+ .probe = fec_mdio_probe,
+ .remove = fec_mdio_remove,
+ .match_table = fec_mdio_match,
+};
+
+
+int __init fec_mdio_init(void)
+{
+ return of_register_platform_driver(&fec_mdio_driver);
+}
+
+void __exit fec_mdio_exit(void)
+{
+ of_unregister_platform_driver(&fec_mdio_driver);
+}
^ permalink raw reply
* Re: rc4-rt1: powerpc compile errors
From: Bruce Ashfield @ 2007-09-03 14:10 UTC (permalink / raw)
To: Pradyumna Sampath; +Cc: linux-rt-users, linuxppc-embedded
In-Reply-To: <f87351060709030423t1ac14f3cqd0cd224ba7dba9c5@mail.gmail.com>
On 9/3/07, Pradyumna Sampath <pradyumna.sampath@gmail.com> wrote:
> Hi everyone,
>
> Here are some compile errors from the latest -rt patchset for powerpc
> (mpc5200).
>
> arch/powerpc/kernel/entry_32.S: Assembler messages:
> arch/powerpc/kernel/entry_32.S:231: Error: operand out of range
> (0x00023d87 is not between 0x00000000 and 0x0000ffff)
> arch/powerpc/kernel/entry_32.S:644: Error: operand out of range
> (0x00022006 is not between 0x00000000 and 0x0000ffff)
> arch/powerpc/kernel/entry_32.S:866: Error: operand out of range
> (0x00020004 is not between 0x00000000 and 0x0000ffff)
> arch/powerpc/kernel/entry_32.S:880: Error: operand out of range
> (0x00020004 is not between 0x00000000 and 0x0000ffff)
>
> Im not sure whether this is the right thing to do but we got around
> this by replacing the linux/include/asm-powerpc/thread_info.h with an
> older version of the same file from 2.6.21-rt3.
I don't have the code in front of me, but you can also shuffle
the flags to make sure that macro being used in entry_32.S
has all the flags within 16 bits (so the immediate operations
will successfully assemble). That's the route I took. The flags
have expanded past that threshold just recently.
Bruce
>
> regards
> /prady
>
> --
> htp://prady.livejournal.com
> -
> To unsubscribe from this list: send the line "unsubscribe linux-rt-users" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
--
"Thou shalt not follow the NULL pointer, for chaos and madness await
thee at its end"
^ permalink raw reply
* Breakpoint is not hitting for Kernel Debugging
From: dnl @ 2007-09-03 14:02 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1.1: Type: text/plain, Size: 554 bytes --]
Hi all,
I am using uboot and montavista kernel for our custom MPC8555CDS board.
I enabled the following options in Kernel for kernel Debugging, CONFIG_BDI_SWITCH=y CONFIG_DEBUG_INFO=y under kernel hacking and MMU XALT in BDI config file. After uboot initialization I fixed break point at start_kernel(0xc02784bc), and then I booted the kernel. Without breaking at start_kernel, it came to login prompt. Please find attached config file with this mail. Could anybody help me to solve this problem?
Thanks in advance,
Saravanan.S
Bangalore.
[-- Attachment #1.2: Type: text/html, Size: 988 bytes --]
[-- Attachment #2: BDI_break_Kernel.txt --]
[-- Type: text/plain, Size: 16034 bytes --]
BDI Config File
[INIT]
TSZ1 0xFE000000 0xFFFFFFFF ;for flash
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;; TESTING START ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Move the L2SRAM to the initial MMU page
WM32 0xFF720000 0x68010000 ;L2CTL
WM32 0xFF720100 0xFFFC0000 ;L2SRBAR0
WM32 0xFF720000 0xA8010000 ;L2CTL
;
; Clear L2SRAM with DMA
WM32 0xff721110 0x00040000 ;SATR0 SREADTTYPE=Read, don't snoop
WM32 0xff721114 0xff700004 ;SAR0 Dummy source register
WM32 0xff721118 0x00050000 ;DATR0 DWRITETTTYPE=Write, snoop local processor
WM32 0xff721120 0x00040000 ;BCR0 Size
WM32 0xff721100 0x0f009404 ;MR0 BWC=f,SAHTS=2(4 bytes),SAHE=1,SWSM=Dest,SRW=1,CTM=1,CS=0
WM32 0xff72111c 0xfffc0000 ;DAR0 which sets CS=1
DELAY 200 ;let DMA complete
WM32 0xff721100 0x00000000 ;MR0 reset condition
; load and execute boot code (needed if STARTUP HALT)
WM32 0xfffffffc 0x48000000 ;loop
EXEC 0xfffffffc 1000
;
; load TLB entries, helper code @ 0xfffff000
WM32 0xfffff000 0x7c0007a4 ;tlbwe
WM32 0xfffff004 0x7c0004ac ;msync
WM32 0xfffff008 0x48000000 ;loop
;
; 1MB TLB1 #1 0x40000000 - 0x400fffff
WSPR 624 0x10010000 ;MAS0:
WSPR 625 0x80000500 ;MAS1:
WSPR 626 0x4000000a ;MAS2:
WSPR 627 0x40000015 ;MAS3:
WSPR 628 0x00000000 ;MAS4:
EXEC 0xfffff000
;
; 64 MB TLB1 #2 0xc0000000 - 0xc3ffffff
WSPR 624 0x10020000 ;MAS0:
WSPR 625 0x80000800 ;MAS1:
WSPR 626 0xc0000008 ;MAS2:
WSPR 627 0xc0000015 ;MAS3:
EXEC 0xfffff000
;
; 64 MB TLB1 #3 0x00000000 - 0x03ffffff
WSPR 624 0x10030000 ;MAS0:
WSPR 625 0x80000800 ;MAS1:
WSPR 626 0x00000008 ;MAS2:
WSPR 627 0x00000015 ;MAS3:
EXEC 0xfffff000
;
; 64 MB TLB1 #4 0x04000000 - 0x07ffffff
WSPR 624 0x10040000 ;MAS0:
WSPR 625 0x80000800 ;MAS1:
WSPR 626 0x04000008 ;MAS2:
WSPR 627 0x04000015 ;MAS3:
EXEC 0xfffff000
;
; 16 MB TLB1 #5 0xff000000 - 0xffffffff
WSPR 624 0x10050000 ;MAS0:
WSPR 625 0x80000700 ;MAS1:
WSPR 626 0xff00000a ;MAS2:
WSPR 627 0xff000015 ;MAS3:
EXEC 0xfffff000
;
; 16 MB TLB1 #0 0xf0000000 - 0xf0ffffff
WSPR 624 0x10000000 ;MAS0:
WSPR 625 0x80000700 ;MAS1:
WSPR 626 0xf0000008 ;MAS2:
WSPR 627 0xf0000015 ;MAS3:
EXEC 0xfffff000
;
; Remove the L2SRAM from the initial MMU page
WM32 0xFF720000 0x28010000 ;L2CTL
;WM32 0xFF720000 0x28000000 ;L2CTL
;;;;;;;;;;;;;;;;;;;;;;;;;; TESTING END ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; move CCSR at 0x40000000
; CCSRBAR
; bit 12 - 23 - BASE_ADDR
WM32 0xFF700000 0x00040000
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; configure local access windows
; LAWBAR0
; bit 12 - 31 = 0x00000000 - base addr
WM32 0x40000c08 0x00000000
; LAWAR0
; bit 1 = 1 - enable window
; bit 8-11 = F - DDR
; bit 26 - 31 = 128MB - size
WM32 0x40000c10 0x80f0001a
; LAWBAR1
; bit 12 - 31 = 0xc0000000 - base addr
WM32 0x40000c28 0x000c0000
; LAWAR1
; bit 1 = 1 - enable window
; bit 8-11 = 4 - local bus
; bit 26 - 31 = 1GB - size
WM32 0x40000c30 0x8040001D
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;Interface enable
WM32 0x400E0070 0xc0000000
;ECM streaming
WM32 0x40001000 0x00000000
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; disable the memory interface with DDR_SDRAM_CFG[MEM_EN]
; DDR_SDRAM_CFG
WM32 0x40002110 0x42008000
; CS0_BNDS
WM32 0x40002000 0x00000007; DDR CS0 now 128MB
; CS0_CONFIG
WM32 0x40002080 0x80800101;0x80800202
; TIMING_CONFIG_1
WM32 0x40002108 0x26241341
; TIMING_CONFIG_2
WM32 0x4000210C 0x00001000
; DDR_SDRAM_MODE
WM32 0x40002118 0x00000062 ;0x00000022 ;old
; DDR_SDRAM_INTERVAL
WM32 0x40002124 0x05200000
; DDR_SDRAM_CLK_CNTL
WM32 0x40002130 0x83000000
DELAY 2000
; DDR_SDRAM_CFG
WM32 0x40002110 0xc2008000 ;0xc2000000 CS_old_value
DELAY 2000
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; configure local bus memory controller
; CS0 - Flash Bank ;0
WM32 0x40005000 0xFe001001 ;BR0 base address at 0xFF800000, port size 16 bit, GPCM, valid
WM32 0x40005004 0xFe006117 ;OR0 32MB flash size working for flash
;set the PC at the reset address (for debug-->connect)
WREG PC 0xfffffffc ;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;; TESTING START ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Setup flash programming workspace in L2SRAM disable for now needs to check
;WM32 0x40020000 0x68010000 ;L2CTL
;WM32 0x40020100 0xf0000000 ;L2SRBAR0
;WM32 0x40020000 0xA8010000 ;L2CTL
;WSPR 63 0xf0000000 ;IVPR to workspace
;WSPR 415 0x0001500 ;IVOR15 : Debug exception
;WM32 0xf0001500 0x48000000 ;write valid instruction
;
; Setup flash programming workspace in dual port RAM
;WSPR 63 0x40080000 ;IVPR to workspace
;WSPR 415 0x000007F0 ;IVOR15 : Debug exception
;WM32 0x400807F0 0x48000000 ;write valid instruction
;
; Setup for program execution
WM32 0x40020000 0x28010000 ;L2CTL
WM32 0x40020000 0x28000000 ;L2CTL
WSPR 63 0x00000000 ;IVPR to workspace
WSPR 406 0x0000700 ;IVOR6 : Program exception
WSPR 415 0x0001500 ;IVOR15 : Debug exception
WM32 0x00000700 0x48000000 ;write valid instruction
WM32 0x00001500 0x48000000 ;write valid instruction
;
;;;;;;;;;;;;;;;;;;;;;;;;;; TESTING END ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
[TARGET]
MMU XLAT ;Added to chech the mmu translation
CPUTYPE 8555 ;the CPU type
JTAGCLOCK 1 ;use 8 MHz JTAG clock
STARTUP RUN ; Start up with loop, halt, run
BREAKMODE HARD ;SOFT or HARD, HARD uses PPC hardware breakpoint
STEPMODE JTAG ;JTAG or HWBP, HWBP uses a hardware breakpoint
WAKEUP 200 ;give reset time to complete
POWERUP 1000 ;start delay after power-up detected in ms
MEMACCESS CORE ;use SAP or CORE for JTAG memory accesses
[HOST]
IP 172.16.4.9
FILE C:\BDI2000\u-boot.bin
FORMAT BIN 0x00080000
LOAD MANUAL ;load code MANUAL or AUTO after reset
PROMPT 8555BBCARD>
[FLASH]
CHIPTYPE STRATAX16
CHIPSIZE 0x2000000 ;The size of one flash chip in bytes
BUSWIDTH 16 SWAP ;The width of the flash memory bus in bits (8 | 16 | 32)
;WORKSPACE 0x0 ;workspace in RAM
FILE C:\BDI2000\u-boot.bin
FORMAT BIN 0xFFF80000
ERASE 0xFFF80000 ;erase sector 0
[REGS]
FILE C:\BDI2000\reg8560.def
HyperTerminal Boot Messages
=> imi 0x900000
## Checking Image at 00900000 ...
Image Name: Linux-2.6.10_mvl401-8555cds
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 1245282 Bytes = 1.2 MB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
=> bootm 0x900000 0xb00000
## Booting image at 00900000 ...
Image Name: Linux-2.6.10_mvl401-8555cds
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 1245282 Bytes = 1.2 M
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
## Current stack ends at 0x03FADD00 => set upper limit to 0x00800000
## cmdline at 0x007FFF00 ... 0x007FFF2C
## Loading RAMDisk Image at 00b00000 ...
Image Name: uImage.ramdisk
Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
Data Size: 2402307 Bytes = 2.3 MB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
## initrd at 0x00B00040 ... 0x00D4
Loading Ramdisk to 03d62000, end 03fac803 ... OK
## Transferring control to Linux (at address 00000000) ...
Memory CAM mapping: CAM0=64Mb, CAM1=0Mb, CAM2=0Mb residual: 0Mb
Linux version 2.6.10_mvl401-8555cds (Administrator@Deepa) (gcc version 3.4.3 (Mo
ntaVista 3.4.3-25.0.70.0501961 2005-12-17)) #3 Thu Aug 30 18:28:00 IST 2007
CDS Version = 0 in PCI slot 1
Built 1 zonelists
Kernel command line: console=ttyS1,115200 root=/dev/ram rw ip=off
OpenPIC Version 1.2 (1 CPUs and 44 IRQ sources) at fbf76000
PID hash table entries: 512 (order: 9, 8192 bytes)
Warning: real time clock seems stuck!
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Memory: 59648k available (1968k kernel code, 700k data, 120k init, 0k highmem)
Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
spawn_desched_task(00000000)
desched cpu_callback 3/00000000
ksoftirqd started up.
desched cpu_callback 2/00000000
checking if image is initramfs...desched thread 0 s
it isn't (no cpio magic); looks like an initrd
Freeing initrd memory: 2346k freed
NET: Registered protocol family 16
PCI: Probing PCI hardware
PCI: Cannot allocate resource region 0 of device 0001:01:00.0
PCI: Cannot allocate resource region 1 of device 0001:01:00.0
PCI: Failed to allocate mem resource #1:80000000@0 for 0001:01:00.0
JFFS2 version 2.2. (NAND) (C) 2001-2003 Red Hat, Inc.
Generic RTC Driver v1.07
i8042.c: i8042 controller self test timeout.
Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ s
ttyS0 at MMIO 0xe0004500 (irq = 106) is a 16550A
ttyS1 at MMIO 0xe0004600 (irq = 106) is a 16550A
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered
RAMDISK driver initialized: 16 RAM disks of 32768K size 1024 blocksize
loop: loaded (max 8 devices)
eth0: Gianfar Ethernet Controller Version 1.1, 00:e0:0c:00:00:fd
eth0: Running with NAPI enabled
eth0: 256/256 RX/TX BD ring size
eth1: Gianfar Ethernet Controller Version 1.1, 00:e0:0c:00:01:f
eth1: Running with NAPI enabled
eth1: 256/256 RX/TX BD ring size
i2c /dev entries driver
Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
elevator: using anticipatory as default io scheduler
physmap flash device: 1000000 at ff000000
NET: Registered protocol family 2
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 4096 bind 8192)
NET: Registered protocol family 1
NET: Registered protoco
RAMDISK: Compressed image found at block 0
VFS: Mounted root (ext2 filesystem).
Freeing unused kernel memory: 120k init
modprobe: FATAL: Could not load /lib/modules/2.6.10_mvl401-8555cds/modules.dep:
No such file or directory
modprobe: FATAL: Could not load /lib/modules/2.6.10_mvl401-8555cds/modules.dep:
No such file or directory
INIT: version 2.85 booting
0
Mounting a tmpfs over /dev...done.
Creating initial device nodes...done.
0
Mounting local filesystems: mount none on /var/run type tmpfs (rw)
none on /tmp type tmpfs (rw)
Starting hotplug subsystem:
pci
pci [success]
usb
usb [success]
isapnp
isapnp [success]
ide
ide [success]
input
input [success]
scsi
scsi [success]
done.
Starting portmap daemon: portmap/etc/rc.d/rcS.d/S41portmap: 156: nice: not found
INIT: Entering runlevel: 3
Starting internet superserver: inetd.
MontaVista(R) Linux(R) Professional Edition 4.0.1 (0502020)
(none) login:
^ permalink raw reply
* Re: [PATCH v7 3/3] [POWERPC] MPC832x_RDB: update dts to use SPI1in QE, register mmc_spi stub
From: Timur Tabi @ 2007-09-03 13:55 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: linuxppc-dev
In-Reply-To: <ac803797588b40e3d33bbd6f758a5663@kernel.crashing.org>
Segher Boessenkool wrote:
> Not at all. The device tree describe how the hardware _is_
> set up (after firmware, bootloader etc.); now how it _should
> be_ set up by the kernel.
I agree with this general sentiment, but in the case of QE pin configuration,
then device tree, in a sense, does contain how the hardware is set up. The
par_io section in the device tree describes they layout of the wiring between
the SOC and peripherals. If the par_io registers are not programmed
correctly, the SOC won't be able to communicate with the peripheral.
Sure, the kernel currently reads the device tree and programs the par_io
registers accordingly, but that doesn't mean the information *shouldn't* be in
the device tree.
> It would make a lot of sense to do this work in the firmware
> instead, but it doesn't make sense at all to put this stuff
> into the device tree.
1) If the firmware does configure the pins, then the device tree *will*
describe how the hardware is set up.
2) How would the firmware know how to do board configuration if it doesn't
have the instructions in the device tree?
Besides, every other board does it's par_io configuration based on the device
tree. So if Anton is going to break that pattern, we should be talking about
moving all that code into U-boot, instead of just putting in a one-time
exception (especially since the patch contains no explanation as to why these
par_io pins are being configured differently than every other board).
--
Timur Tabi
Linux Kernel Developer @ Freescale
^ permalink raw reply
* PCI:cannot allocate resource region 0 of device 0001:01:00.0?
From: dnl @ 2007-09-03 13:45 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1.1: Type: text/plain, Size: 528 bytes --]
Hi all,
I using Montavista kernel for custom MPC8555CDS board and one PCI slot on the Board.
When my kernel boots i am getting the following Messages :
PCI: Probing PCI hardware
PCI: Cannot allocate resource region 0 of device 0001:01:00.0
PCI: Cannot allocate resource region 1 of device 0001:01:00.0
PCI: Failed to allocate mem resource #1:80000000@0 for 0001:01:00.
please find attached Kernel boot messages and corresponding pci directory after kernel boots.
could anyone face similar problem?
[-- Attachment #1.2: Type: text/html, Size: 1025 bytes --]
[-- Attachment #2: pci_screenshot.txt --]
[-- Type: text/plain, Size: 10599 bytes --]
U-Boot 1.1.6 (Aug 21 2007 - 18:37:07)
CPU: 8555, Version: 1.1, (0x80790011)
Core: E500, Version: 2.0, (0x80200020)
Clock Configuration:
CPU: 396 MHz, CCB: 198 MHz,
DDR: 99 MHz, LBC: 24 MHz
L1: D-cache 32 kB enabled
I-cache 32 kB enabled
Board: CDS Version 0x10, PCI Slot 1
CPU Board Revision 1.0 (0x0100)
PCI1: 32 bit, 33 MHz, sync
PCI2: disabled
DRAM: Initializing
DDR: number of ranks = 1
DDR: DDR I rank density = 0x04000000
DDR: cs0_bnds = 0x00000003
DDR: cs0_config = 0x80800101
DDR: caslat SPD bit is 1
DDR: tCKmin = 6000 ps
DDR: Module max data rate = 333 Mhz
DDR: effective data rate is 200 MHz
DDR: caslat SPD bit is 1, controller field is 0x2
DDR: ext_refrec = 0x00000000
DDR: timing_cfg_1 = 0x26241341
DDR: timing_cfg_2 = 0x00001000
DDR: sdram_mode = 0x00000062
DDR: sdram_mode_2 = 0x00000000
DDR: sdram_interval = 0x05200000
DDR: sdram_cfg_2 = 0x00000000
DDR: sdram_clk_cntl = 0x83000000
DDR: sdram_cfg = 0xc2008000
DDR: MAS0=0x10080000
DDR: MAS1=0xc0000800
DDR: MAS2=0x00000000
DDR: MAS3=0x00000015
DDR: LAWBAR1=0x00000000
DDR: LARAR1=0x80f00019
DDR: 64 MB
Top of RAM usable for U-Boot at: 04000000
Reserving 190k for U-Boot at: 03fd0000
Reserving 136k for malloc() at: 03fae000
Reserving 88 Bytes for Board Info at: 03fadfa8
Reserving 72 Bytes for Global Data at: 03fadf60
Stack Pointer at: 03fadf48
New Stack Pointer is: 03fadf48
Now running in RAM - U-Boot at: 03fd0000
L2 cache 256KB: enabled
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
U-Boot relocated to 03fd0000
Net: TSEC0: PHY id ffffffff is not supported!
TSEC0: No PHY found
TSEC1: PHY id ffffffff is not supported!
TSEC1: No PHY found
TSEC0, TSEC1
### main_loop entered: bootdelay=5
### main_loop: bootcmd="bootm 0xffd00000 0xffa00000"
Hit any key to stop autoboot: 0
## Booting image at ffd00000 ...
Image Name: Linux-2.6.10_mvl401-8555cds
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 1165078 Bytes = 1.1 MB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
## Current stack ends at 0x03FADCF0 => set upper limit to 0x00800000
## cmdline at 0x007FFF00 ... 0x007FFF2C
## Loading RAMDisk Image at ffa00000 ...
Image Name: uImage.ramdisk
Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
Data Size: 2402307 Bytes = 2.3 MB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
## initrd at 0xFFA00040 ... 0xFFC4A842 (len=2402307=0x24A803)
Loading Ramdisk to 03d62000, end 03fac803 ... OK
## Transferring control to Linux (at address 00000000) ...
Memory CAM mapping: CAM0=64Mb, CAM1=0Mb, CAM2=0Mb residual: 0Mb
Linux version 2.6.10_mvl401-8555cds (root@D12.arasor.in) (gcc version 3.4.3 (MontaVista 3.4.3-25.0.70.0501961 2005-12-18)) 7
CDS Version = 0 in PCI slot 4
Built 1 zonelists
Kernel command line: console=ttyS1,115200 root=/dev/ram rw ip=off
OpenPIC Version 1.2 (1 CPUs and 44 IRQ sources) at fbf76000
PID hash table entries: 512 (order: 9, 8192 bytes)
TODC real-time-clock was stopped. Now starting...
Warning: real time clock seems stuck!
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Memory: 59648k available (1972k kernel code, 696k data, 116k init, 0k highmem)
Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
spawn_desched_task(00000000)
desched cpu_callback 3/00000000
ksoftirqd started up.
desched cpu_callback 2/00000000
checking if image is initramfs...desched thread 0 started up.
it isn't (no cpio magic); looks like an initrd
Freeing initrd memory: 2346k freed
NET: Registered protocol family 16
PCI: Probing PCI hardware
PCI: Cannot allocate resource region 0 of device 0001:01:00.0
PCI: Cannot allocate resource region 1 of device 0001:01:00.0
PCI: Failed to allocate mem resource #1:80000000@0 for 0001:01:00.0
JFFS2 version 2.2. (NAND) (C) 2001-2003 Red Hat, Inc.
Generic RTC Driver v1.07
i8042.c: i8042 controller self test timeout.
Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing disabled
ttyS0 at MMIO 0xe0004500 (irq = 106) is a 16550A
ttyS1 at MMIO 0xe0004600 (irq = 106) is a 16550A
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered
RAMDISK driver initialized: 16 RAM disks of 8192K size 1024 blocksize
loop: loaded (max 8 devices)
eth0: Gianfar Ethernet Controller Version 1.1, 00:e0:0c:00:00:fd
eth0: Running with NAPI enabled
eth0: 256/256 RX/TX BD ring size
eth1: Gianfar Ethernet Controller Version 1.1, 00:e0:0c:00:01:fd
eth1: Running with NAPI enabled
eth1: 256/256 RX/TX BD ring size
i2c /dev entries driver
Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
elevator: using anticipatory as default io scheduler
physmap flash device: 1000000 at ff000000
NET: Registered protocol family 2
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 4096 bind 8192)
NET: Registered protocol family 1
NET: Registered protocol family 17
RAMDISK: Compressed image found at block 0
RAMDISK: incomplete write (-28 != 32768) 8388608
EXT2-fs warning: checktime reached, running e2fsck is recommended
VFS: Mounted root (ext2 filesystem).
Freeing unused kernel memory: 116k init
modprobe: FATAL: Could not load /lib/modules/2.6.10_mvl401-8555cds/modules.dep: No such file or directory
modprobe: FATAL: Could not load /lib/modules/2.6.10_mvl401-8555cds/modules.dep: No such file or directory
INIT: version 2.85 booting
0
Mounting a tmpfs over /dev...done.
Creating initial device nodes...done.
0
Mounting local filesystems: mount none on /var/run type tmpfs (rw)
none on /tmp type tmpfs (rw)
Starting hotplug subsystem:
pci
pci [success]
usb
usb [success]
isapnp
isapnp [success]
ide
ide [success]
input
input [success]
scsi
scsi [success]
done.
Starting portmap daemon: portmap/etc/rc.d/rcS.d/S41portmap: 156: nice: not found
INIT: Eintering runleveStarting internet superserver: inetd.
MontaVista(R) Linux(R) Professional Edition 4.0.1 (0502020)
(none) login: root
Welcome to MontaVista(R) Linux(R) Professional Edition 4.0.1 (0502020).
login[833]: root login on `console'
# uname -a
Linux (none) 2.6.10_mvl401-8555cds #30 Mon Aug 20 16:33:44 IST 2007 ppc unknown
# cat /proc/bus/pci/devices
0100 1057000a 0 a0000000 00000008 00000000 00000000 00000000 00000000 0
# ls /sys/bus/pci/devices/
0001:01:00.0
# ls -l /sys/bus/pci/devices/0001\:01\:00.0/
-r--r--r-- 1 root root 4096 Aug 8 20:01 class
-rw-r--r-- 1 root root 256 Aug 8 20:43 config
-rw-r--r-- 1 root root 4096 Aug 8 20:43 detach_state
-r--r--r-- 1 root root 4096 Aug 8 20:01 device
-r--r--r-- 1 root root 4096 Aug 8 20:43 irq
-r--r--r-- 1 root root 4096 Aug 8 20:43 local_cpus
-r--r--r-- 1 root root 4096 Aug 8 20:43 resource
-r--r--r-- 1 root root 4096 Aug 8 20:01 subsystem_device
-r--r--r-- 1 root root 4096 Aug 8 20:01 subsystem_vendor
-r--r--r-- 1 root root 4096 Aug 8 20:01 vendor
# ls -l /sys/bus/pci/devices/
lrwxrwxrwx 1 root root 0 Aug 8 20:01 0001:01:00.0 -> ../../../devices/pci0001:01/0001:01:00.0
#
# dmesg
Memory CAM mapping: CAM0=64Mb, CAM1=0Mb, CAM2=0Mb residual: 0Mb
Linux version 2.6.10_mvl401-8555cds (root@D12.arasor.in) (gcc version 3.4.3 (MontaVista 3.4.3-25.0.70.0501961 2005-12-18)) 7
CDS Version = 0 in PCI slot 4
On node 0 totalpages: 16384
DMA zone: 16384 pages, LIFO batch:4
Normal zone: 0 pages, LIFO batch:1
HighMem zone: 0 pages, LIFO batch:1
Built 1 zonelists
Kernel command line: console=ttyS1,115200 root=/dev/ram rw ip=off
OpenPIC Version 1.2 (1 CPUs and 44 IRQ sources) at fbf76000
PID hash table entries: 512 (order: 9, 8192 bytes)
TODC real-time-clock was stopped. Now starting...
Warning: real time clock seems stuck!
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Memory: 59648k available (1972k kernel code, 696k data, 116k init, 0k highmem)
Calibrating delay loop... 394.24 BogoMIPS (lpj=197120)
Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
spawn_desched_task(00000000)
desched cpu_callback 3/00000000
ksoftirqd started up.
desched cpu_callback 2/00000000
checking if image is initramfs...desched thread 0 started up.
it isn't (no cpio magic); looks like an initrd
Freeing initrd memory: 2346k freed
NET: Registered protocol family 16
PCI: Probing PCI hardware
PCI: Cannot allocate resource region 0 of device 0001:01:00.0
PCI: Cannot allocate resource region 1 of device 0001:01:00.0
PCI: Failed to allocate mem resource #1:80000000@0 for 0001:01:00.0
Registering openpic with sysfs...
JFFS2 version 2.2. (NAND) (C) 2001-2003 Red Hat, Inc.
Generic RTC Driver v1.07
i8042.c: i8042 controller self test timeout.
Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing disabled
ttyS0 at MMIO 0xe0004500 (irq = 106) is a 16550A
ttyS1 at MMIO 0xe0004600 (irq = 106) is a 16550A
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered
RAMDISK driver initialized: 16 RAM disks of 8192K size 1024 blocksize
loop: loaded (max 8 devices)
eth0: Gianfar Ethernet Controller Version 1.1, 00:e0:0c:00:00:fd
eth0: Running with NAPI enabled
eth0: 256/256 RX/TX BD ring size
eth1: Gianfar Ethernet Controller Version 1.1, 00:e0:0c:00:01:fd
eth1: Running with NAPI enabled
eth1: 256/256 RX/TX BD ring size
i2c /dev entries driver
Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
elevator: using anticipatory as default io scheduler
physmap flash device: 1000000 at ff000000
CFI: Found no phys_mapped_flash device at location zero
NET: Registered protocol family 2
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 4096 bind 8192)
NET: Registered protocol family 1
NET: Registered protocol family 17
RAMDISK: Compressed image found at block 0
RAMDISK: incomplete write (-28 != 32768) 8388608
EXT2-fs warning: checktime reached, running e2fsck is recommended
VFS: Mounted root (ext2 filesystem).
Freeing unused kernel memory: 116k init
^ permalink raw reply
* Re: [patch 2/6] cuimage for Bamboo board
From: Josh Boyer @ 2007-09-03 13:42 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070903010111.GC31499@localhost.localdomain>
On Mon, 2007-09-03 at 11:01 +1000, David Gibson wrote:
> On Fri, Aug 31, 2007 at 03:04:51PM -0500, Josh Boyer wrote:
> > Add a cuboot wrapper for the Bamboo board. This also removes some obsoleted
> > linker declarations that have been moved into ops.h
> >
> > Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
>
> [snip]
> > --- linux-2.6.orig/arch/powerpc/boot/bamboo.c
> > +++ linux-2.6/arch/powerpc/boot/bamboo.c
> > @@ -24,8 +24,7 @@
> > #include "4xx.h"
> > #include "44x.h"
> >
> > -extern char _dtb_start[];
> > -extern char _dtb_end[];
> > +static u8 *bamboo_mac0, *bamboo_mac1;
> >
> > static void bamboo_fixups(void)
> > {
> > @@ -34,12 +33,16 @@ static void bamboo_fixups(void)
> > ibm440ep_fixup_clocks(sysclk, 11059200);
> > ibm4xx_fixup_memsize();
> > ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00);
> > + if (bamboo_mac0 && bamboo_mac1)
> > + dt_fixup_mac_addresses(bamboo_mac0, bamboo_mac1);
>
> Bit ugly that you only set the MAC address for any ethernet if they're
> supplied for every ethernet.
Good point. Will fix.
> > simple_alloc_init(_end, avail_ram, 32, 64);
> > - bamboo_init();
> > + bamboo_init(NULL, NULL);
>
> There must surely be a way to get the MAC addresses out of OpenBIOS...
Probably. I just need to find out where they are stored.
josh
^ permalink raw reply
* Re: Newbie and linux on virtex-II ppc
From: Grant Likely @ 2007-09-03 13:41 UTC (permalink / raw)
To: schardt, Linux PPC Linux PPC
In-Reply-To: <46DBA4F9.2010703@fz-juelich.de>
On 9/3/07, schardt <g.schardt@fz-juelich.de> wrote:
> Hi Grant,
>
> i added the devices, but stil no tty access
> i have no vga-card or something to use, i'm listening on one serial
> port. i think i must forward the tty to ttyUL0 or something like that ???=
?
You should check that /etc/inittab is using the correct device.
BTW, Please remember to CC: the mailing list
Cheers,
g.
>
> Georg
>
>
> Grant Likely wrote:
> > On 8/29/07, schardt <g.schardt@fz-juelich.de> wrote:
> >
> >> me again :)
> >>
> >> i added a /dev/ttyUL0 (mknod ttyUL0 c 204 187) device and and a consol=
e
> >> link to it.
> >>
> >
> > Yeah, you don't want a symlink, you want a console device node instead:
> >
> > mknod /dev/tty 5 0
> > mknod /dev/console 5 1
> >
> >
> >> no warning anymore, but i think i'm listen on the "wrong" console ??? =
i
> >> see bootmessages
> >> and an errormessage from init ("init: can't open /dev/null: no such
> >> device or directory")
> >>
> >
> > I would say you need to add a /dev/null device node, or fix it's
> > permissions. :-)
> >
> > mknod /dev/null 1 3
> >
> >
> >> but the messages from init.d/rcS did not appear
> >>
> >> this is my inittab (from klingauf mkrootfs):
> >>
> >> ::sysinit:/etc/init.d/rcS
> >> ::askfirst:-/bin/sh
> >> ::ctrlaltdel:/sbin/reboot
> >> ::shutdown:/sbin/swapoff -a
> >> ::shutdown:/bin/umount -a -r
> >> ::restart:/sbin/init
> >> ::respawn:/sbin/getty 9600 tts/0
> >>
> >> Georg
> >>
> >> schardt wrote:
> >>
> >>> Step by step i becomes running :)
> >>>
> >>> kernel is booting, root-fs is mounting on systemace, busybox compiled
> >>> and rootfs installed (i used klingauf's mkrootfs)
> >>>
> >>> but now it says:
> >>> [ 2.964978] Freeing unused kernel memory: 92k init
> >>> [ 3.081332] Warning: unable to open an initial console.
> >>> [ 3.306406] request_module: runaway loop modprobe binfmt-4c46
> >>> [ 3.375612] request_module: runaway loop modprobe binfmt-4c46
> >>> [ 3.446800] request_module: runaway loop modprobe binfmt-4c46
> >>>
> >>> and i don't know what this is :(
> >>>
> >>> Can give me a hint, where to look ?
> >>>
> >>> thx
> >>> Georg
> >>>
> >>> Grant Likely wrote:
> >>>
> >>>
> >>>> On 8/28/07, Grant Likely <grant.likely@secretlab.ca> wrote:
> >>>>
> >>>>
> >>>>
> >>>>> On 8/28/07, schardt <g.schardt@fz-juelich.de> wrote:
> >>>>>
> >>>>>
> >>>>>
> >>>>>> Okay, im really blind i think, so i started again :
> >>>>>>
> >>>>>> - 2.6.22 kernel from kernel.org
> >>>>>> - cp /arch/ppc/configs/ml300_defconfig .config
> >>>>>>
> >>>>>>
> >>>>>>
> >>>> BTW, "make ml300_defconfig" does this for you.
> >>>>
> >>>> g.
> >>>>
> >>>>
> >>>>
> >>>>
> >>>
> >>> ---------------------------------------------------------------------=
--------------------
> >>> ---------------------------------------------------------------------=
--------------------
> >>> Forschungszentrum J=FClich GmbH
> >>> 52425 J=FClich
> >>>
> >>> Sitz der Gesellschaft: J=FClich
> >>> Eingetragen im Handelsregister des Amtsgerichts D=FCren Nr. HR B 3498
> >>> Vorsitzende des Aufsichtsrats: MinDirig'in B=E4rbel Brumme-Bothe
> >>> Vorstand: Prof. Dr. Achim Bachem (Vorsitzender), Dr. Ulrich Krafft (s=
tellv.
> >>> Vorsitzender)
> >>> ---------------------------------------------------------------------=
--------------------
> >>> ---------------------------------------------------------------------=
--------------------
> >>> _______________________________________________
> >>> Linuxppc-embedded mailing list
> >>> Linuxppc-embedded@ozlabs.org
> >>> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >>>
> >>>
> >>>
> >>
> >> ----------------------------------------------------------------------=
-------------------
> >> ----------------------------------------------------------------------=
-------------------
> >> Forschungszentrum J=FClich GmbH
> >> 52425 J=FClich
> >>
> >> Sitz der Gesellschaft: J=FClich
> >> Eingetragen im Handelsregister des Amtsgerichts D=FCren Nr. HR B 3498
> >> Vorsitzende des Aufsichtsrats: MinDirig'in B=E4rbel Brumme-Bothe
> >> Vorstand: Prof. Dr. Achim Bachem (Vorsitzender), Dr. Ulrich Krafft (st=
ellv.
> >> Vorsitzender)
> >> ----------------------------------------------------------------------=
-------------------
> >> ----------------------------------------------------------------------=
-------------------
> >> _______________________________________________
> >> Linuxppc-embedded mailing list
> >> Linuxppc-embedded@ozlabs.org
> >> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >>
> >>
> >
> >
> >
>
>
>
> -------------------------------------------------------------------------=
----------------
> -------------------------------------------------------------------------=
----------------
> Forschungszentrum J=FClich GmbH
> 52425 J=FClich
>
> Sitz der Gesellschaft: J=FClich
> Eingetragen im Handelsregister des Amtsgerichts D=FCren Nr. HR B 3498
> Vorsitzende des Aufsichtsrats: MinDirig'in B=E4rbel Brumme-Bothe
> Vorstand: Prof. Dr. Achim Bachem (Vorsitzender), Dr. Ulrich Krafft (stell=
v.
> Vorsitzender)
> -------------------------------------------------------------------------=
----------------
> -------------------------------------------------------------------------=
----------------
>
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [patch 3/6] Walnut DTS
From: Josh Boyer @ 2007-09-02 13:59 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070903010859.GD31499@localhost.localdomain>
On Mon, 2007-09-03 at 11:08 +1000, David Gibson wrote:
> On Fri, Aug 31, 2007 at 03:04:52PM -0500, Josh Boyer wrote:
> > Device tree source file for the PPC405 Walnut evaluation board.
> >
> > Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
> >
> > ---
> > arch/powerpc/boot/dts/walnut.dts | 183 +++++++++++++++++++++++++++++++++++++++
> > 1 file changed, 183 insertions(+)
> >
> > --- /dev/null
> > +++ linux-2.6/arch/powerpc/boot/dts/walnut.dts
> > @@ -0,0 +1,183 @@
> > +/*
> > + * Device Tree Source for IBM Walnut
> > + *
> > + * Copyright 2007 IBM Corp.
> > + * Josh Boyer <jwboyer@linux.vnet.ibm.com>
> > + *
> > + * This file is licensed under the terms of the GNU General Public
> > + * License version 2. This program is licensed "as is" without
> > + * any warranty of any kind, whether express or implied.
> > + */
> > +
> > +/ {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + model = "ibm,walnut";
> > + compatible = "ibm,walnut";
> > + dcr-parent = <&/cpus/PowerPC,405GP@0>;
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + PowerPC,405GP@0 {
> > + device_type = "cpu";
> > + reg = <0>;
> > + clock-frequency = <bebc200>; /* Filled in by zImage */
> > + timebase-frequency = <0>; /* Filled in by zImage */
> > + i-cache-line-size = <20>;
> > + d-cache-line-size = <20>;
> > + i-cache-size = <4000>;
> > + d-cache-size = <4000>;
> > + dcr-controller;
> > + dcr-access-method = "native";
> > + };
> > + };
> > +
> > + memory {
> > + device_type = "memory";
> > + reg = <0 0>; /* Filled in by zImage */
> > + };
> > +
> > + UIC0: interrupt-controller {
> > + compatible = "ibm,uic";
> > + interrupt-controller;
> > + cell-index = <0>;
> > + dcr-reg = <0c0 9>;
> > + #address-cells = <0>;
> > + #size-cells = <0>;
> > + #interrupt-cells = <2>;
> > + };
> > +
> > + plb {
> > + compatible = "ibm,plb3";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > + clock-frequency = <0>; /* Filled in by zImage */
> > +
> > + SDRAM0: memory-controller {
> > + compatible = "ibm,sdram-405gp";
> > + dcr-reg = <010 2>;
> > + };
> > +
> > + MAL: mcmal {
> > + compatible = "ibm,mcmal-405gp", "ibm,mcmal";
> > + dcr-reg = <180 62>;
> > + num-tx-chans = <2>;
> > + num-rx-chans = <1>;
> > + interrupt-parent = <&UIC0>;
> > + interrupts = <a 4 b 4 c 4 d 4 e 4>;
> > + };
> > +
> > + POB0: opb {
> > + compatible = "ibm,opb";
>
> Need an opb-405gp here, too.
Yep.
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <0 ef600000 a00000>;
>
> Hrm... something we ought to clarify is the interpretation of the
> POB0_BEAR register with respect to the bridge's ranges property. For
> 440 I think the BEAR will need to be interpreted as an OPB address,
> rather than a PLB address, but I'm not sure if that will work here
> with the limited ranges property you have.
Ok, I'll look at this.
josh
^ permalink raw reply
* Re: [patch 5/6] Walnut board support
From: Josh Boyer @ 2007-09-02 13:59 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070903011112.GE31499@localhost.localdomain>
On Mon, 2007-09-03 at 11:11 +1000, David Gibson wrote:
> On Fri, Aug 31, 2007 at 03:04:54PM -0500, Josh Boyer wrote:
> > Board support for the PPC405 Walnut evaluation board
> >
> > Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
>
> [snip]
> > --- linux-2.6.orig/arch/powerpc/platforms/40x/Kconfig
> > +++ linux-2.6/arch/powerpc/platforms/40x/Kconfig
> > @@ -53,13 +53,13 @@
> > # help
> > # This option enables support for the IBM PPC405GPr evaluation board.
> >
> > -#config WALNUT
> > -# bool "Walnut"
> > -# depends on 40x
> > -# default y
> > -# select 405GP
> > -# help
> > -# This option enables support for the IBM PPC405GP evaluation board.
> > +config WALNUT
> > + bool "Walnut"
> > + depends on 40x
> > + default y
> > + select 405GP
> > + help
> > + This option enables support for the IBM PPC405GP evaluation board.
>
> Surely this needs WANT_DEVICE_TREE, too.
Yes, will be fixed.
josh
^ permalink raw reply
* Re: [patch 6/6] Walnut zImage wrapper
From: Josh Boyer @ 2007-09-02 13:58 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070903011352.GF31499@localhost.localdomain>
On Mon, 2007-09-03 at 11:13 +1000, David Gibson wrote:
> On Fri, Aug 31, 2007 at 03:04:55PM -0500, Josh Boyer wrote:
> > Add zImage wrapper for walnut board
> >
> > Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
>
> [snip]
> > --- /dev/null
> > +++ linux-2.6/arch/powerpc/boot/treeboot-walnut.c
> > @@ -0,0 +1,133 @@
> > +/*
> > + * Old U-boot compatibility for Walnut
> > + *
> > + * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
> > + *
> > + * Copyright 2007 IBM Corporation
> > + * Based on cuboot-83xx.c, which is:
> > + * Copyright (c) 2007 Freescale Semiconductor, Inc.
> > + *
> > + * This program is free software; you can redistribute it and/or modify it
> > + * under the terms of the GNU General Public License version 2 as published
> > + * by the Free Software Foundation.
> > + */
> > +
> > +#include "ops.h"
> > +#include "stdio.h"
> > +#include "dcr.h"
> > +#include "4xx.h"
> > +#include "io.h"
> > +
> > +BSS_STACK(4096);
> > +
> > +void ibm405gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
> > +{
> > + u32 pllmr = mfdcr(0xb0);
>
> Please add #defines for the DCR numbers, rather than using literals.
Oops. Meant to do that cleanup before I sent out this round. Will be
fixed.
josh
^ permalink raw reply
* rc4-rt1: powerpc compile errors
From: Pradyumna Sampath @ 2007-09-03 11:23 UTC (permalink / raw)
To: linux-rt-users, linuxppc-embedded
Hi everyone,
Here are some compile errors from the latest -rt patchset for powerpc
(mpc5200).
arch/powerpc/kernel/entry_32.S: Assembler messages:
arch/powerpc/kernel/entry_32.S:231: Error: operand out of range
(0x00023d87 is not between 0x00000000 and 0x0000ffff)
arch/powerpc/kernel/entry_32.S:644: Error: operand out of range
(0x00022006 is not between 0x00000000 and 0x0000ffff)
arch/powerpc/kernel/entry_32.S:866: Error: operand out of range
(0x00020004 is not between 0x00000000 and 0x0000ffff)
arch/powerpc/kernel/entry_32.S:880: Error: operand out of range
(0x00020004 is not between 0x00000000 and 0x0000ffff)
Im not sure whether this is the right thing to do but we got around
this by replacing the linux/include/asm-powerpc/thread_info.h with an
older version of the same file from 2.6.21-rt3.
regards
/prady
--
htp://prady.livejournal.com
^ permalink raw reply
* Re: Document and implement an improved flash device binding
From: Segher Boessenkool @ 2007-09-03 10:23 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070829061300.GF3206@localhost.localdomain>
> + j) CFI or JEDEC memory-mapped NOR flash
>
> Flash chips (Memory Technology Devices) are often used for solid
> state
> file systems on embedded devices.
Well, almost everything has a NOR flash on it, not just
embedded boards ;-)
> + - bank-width : Width (in bytes) of the flash bank. Equal to the
> + device width times the number of interleaved chips.
> + - device-width : (optional) Width of a single flash chip. If
> + omitted, assumed to be equal to 'bank-width'.
Let's have bank-width optional instead, it's more natural
that way for the common case of just one chip. Or, you can
say that either is optional.
> + flash@ff000000 {
> + compatible = "amd,am29lv128ml", "cfi-flash";
> + reg = <ff000000 01000000>;
> + bank-width = <4>;
This is an 8/16-bit part, you need a device-width ;-)
Need #address-cells here for the child nodes:
> + fs@0 {
> + reg = <0 f80000>;
> + };
[big snip]
> + OpenBIOS@0 {
This show immediately why node name = partition name won't
work out. You're not supposed to start a node name with a
capital like this.
Segher
^ permalink raw reply
* Re: [RFC] AmigaOne device tree source v2
From: David Gibson @ 2007-09-03 10:12 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: linuxppc-dev
In-Reply-To: <ad58529dfd4a248ab904c2c5871258bf@kernel.crashing.org>
On Mon, Sep 03, 2007 at 12:02:58PM +0200, Segher Boessenkool wrote:
> >>> host@0 {
> >>
> >> The unit address (after the @) should be derived from the first range
> >> listed in the 'reg' property. It's a bus address, not a slot number.
> >
> > Actually... on PCI, the unit address is often the slot number, or
> > rather, "slot,function" with the second part ommited for non
> > multifunction devices.
>
> Not slot number, but "device-id". Like, if you have actual
> PCI plugin slots on your board, they likely have device ids
> 16,17,...; but slot numbers 1, 2, 3 (little labels on the box).
>
> David's point is that unit addresses are not random numbers.
You flatter me. But i'll happily make that point, now that my
ignorance is slightly alleviated ;-).
> >> All these devices should have unit addresses.
> >
> > ... which for ISA are generally in the form iPORT (8242@i60 for
> > example) though I've seen the "i" ommited. Not terribly important I
> > would say but better to follow the spec.
>
> Omitting the "i" is perfectly in line with the spec :-)
>
> >>> ide@7,1 {
> >>
> >> This will need a compatible property, at least.
> >
> > Actually, it's a PCI device, it can have a compatible property based on
> > the generic PCI device compatible property generation as defined in the
> > OF PCI binding. Since that's just derived from other fields, I suppose
> > it can be omitted in a flat DT. It would be -nice- to have a more
> > explicit cpmpatible property but in that case, not absolutely necessary
> > since that device will be probed as PCI anyway.
>
> Yeah, PCI is a special case for Linux. Maybe add a "pciclass,XXXX"
> compatible property though, for good measure. Anything else isn't
> all that useful I think.
Indeed, since PCI is probable, it's unclear whether these device nodes
are even necessary at all. Depends on whether there's anything
interesting in the omitted interrupt routing information.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [RFC] AmigaOne device tree source v2
From: Segher Boessenkool @ 2007-09-03 10:02 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, David Gibson
In-Reply-To: <1188808900.5972.133.camel@localhost.localdomain>
>>> host@0 {
>>
>> The unit address (after the @) should be derived from the first range
>> listed in the 'reg' property. It's a bus address, not a slot number.
>
> Actually... on PCI, the unit address is often the slot number, or
> rather, "slot,function" with the second part ommited for non
> multifunction devices.
Not slot number, but "device-id". Like, if you have actual
PCI plugin slots on your board, they likely have device ids
16,17,...; but slot numbers 1, 2, 3 (little labels on the box).
David's point is that unit addresses are not random numbers.
>> All these devices should have unit addresses.
>
> ... which for ISA are generally in the form iPORT (8242@i60 for
> example) though I've seen the "i" ommited. Not terribly important I
> would say but better to follow the spec.
Omitting the "i" is perfectly in line with the spec :-)
>>> ide@7,1 {
>>
>> This will need a compatible property, at least.
>
> Actually, it's a PCI device, it can have a compatible property based on
> the generic PCI device compatible property generation as defined in the
> OF PCI binding. Since that's just derived from other fields, I suppose
> it can be omitted in a flat DT. It would be -nice- to have a more
> explicit cpmpatible property but in that case, not absolutely necessary
> since that device will be probed as PCI anyway.
Yeah, PCI is a special case for Linux. Maybe add a "pciclass,XXXX"
compatible property though, for good measure. Anything else isn't
all that useful I think.
Segher
^ permalink raw reply
* Re: [RFC] AmigaOne device tree source v2
From: Benjamin Herrenschmidt @ 2007-09-03 8:41 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20070903013431.GG31499@localhost.localdomain>
> 'reg' and 'ranges' should not typically overlap. 'reg' should only
> encode control registers for the bridge, not the whole PCI space (not
> that I'm even entirely sure what you mean by that).
>
> > ranges = <01000000 0 00000000 fe000000 0 00c00000 // PCI I/O
> > 02000000 0 80000000 80000000 0 7d000000 // PCI memory
> > 02000000 0 fd000000 fd000000 0 01000000>; // PCI alias memory
> > 8259-interrupt-acknowledge = <fef00000>;
> > #address-cells = <3>;
> > #size-cells = <2>;
> >
> > host@0 {
>
> The unit address (after the @) should be derived from the first range
> listed in the 'reg' property. It's a bus address, not a slot number.
Actually... on PCI, the unit address is often the slot number, or
rather, "slot,function" with the second part ommited for non
multifunction devices.
> All these devices should have unit addresses.
... which for ISA are generally in the form iPORT (8242@i60 for
example) though I've seen the "i" ommited. Not terribly important I
would say but better to follow the spec.
> > ide@7,1 {
>
> This will need a compatible property, at least.
Actually, it's a PCI device, it can have a compatible property based on
the generic PCI device compatible property generation as defined in the
OF PCI binding. Since that's just derived from other fields, I suppose
it can be omitted in a flat DT. It would be -nice- to have a more
explicit cpmpatible property but in that case, not absolutely necessary
since that device will be probed as PCI anyway.
Ben.
^ permalink raw reply
* Re: [RFC] AmigaOne device tree source v2
From: David Gibson @ 2007-09-03 1:34 UTC (permalink / raw)
To: Gerhard Pircher; +Cc: linuxppc-dev
In-Reply-To: <20070831175006.17240@gmx.net>
On Fri, Aug 31, 2007 at 07:50:06PM +0200, Gerhard Pircher wrote:
> Hi,
>
> I updated the AmigaOne device tree based on the comments in this thread:
> http://ozlabs.org/pipermail/linuxppc-dev/2007-June/038069.html
> All the ISA devices are now subnodes of the PCI2ISA bridge, which marks
> the first 64k (of PCI address space) as I/O space. The pci node doesn't
> contain any interrupt routing information, because interrupt routing
> differs between the three AmigaOne models. Thus I would like to omit it,
> if it is not really necessary.
Interrupt routing information is really necessary. If it differs
between the models then either you will need different device tree
source for each of them, or you will need to fill in the correct
interrupt routing information from the bootwrapper, whichever approach
is easier.
> The PCI host for bus 0 is a subnode of
> the pci node, but I'm not sure if this is correct.
>
> Please take a look at the reg and ranges properties of the PCI devices.
> The PCI OF spec defined "zero" reg properties (like
> reg = <00xxxx00 00000000 00000000 00000000 00000000>, where xxxx is
> the device number), even if all the other BARs are defined. What are
> they good for?
> The BARs of the VIA IDE controller are assumed to be relocateable,
> even if the address is fixed in compatibility mode.
> BTW: Is there a way to specify the addresses for PCI config with
> indirect addressing?
I believe that's handled by the bridge's compatible and reg
properties. The platform or bridge code will have to know that this
type of bridge (as encoded in compatible) uses indirect addressing,
and which resource (from the reg property) has the indirect access
registers.
I don't know enough about PCI to answer most of the above questions,
but I spotted a bunch of problems with the device tree anyway...
> /*
> * AmigaOne Device Tree Source
> *
> * Copyright 2007 Gerhard Pircher (gerhard_pircher@gmx.net)
> *
> * This program is free software; you can redistribute it and/or modify it
> * under the terms of the GNU General Public License as published by the
> * Free Software Foundation; either version 2 of the License, or (at your
> * option) any later version.
> */
>
>
> / {
> model = "Eyetech,AmigaOne";
> compatible = "Eyetech,AmigaOne" "MAI,Teron";
> #address-cells = <1>;
> #size-cells = <1>;
>
> cpus {
> #address-cells = <1>;
> #size-cells = <0>;
>
> cpu@0 {
> device_type = "cpu";
> reg = <0>;
> d-cache-line-size = <20>; // 32 bytes
> i-cache-line-size = <20>; // 32 bytes
> d-cache-size = <8000>; // L1, 32K
> i-cache-size = <8000>; // L1, 32K
> timebase-frequency = <0>; // 33.3 MHz, from U-boot
> clock-frequency = <0>; // From U-boot
> bus-frequency = <0>; // From U-boot
> 32-bit;
> };
> };
>
> memory {
> device_type = "memory";
> reg = <0 0>; // From U-boot
> };
>
> pci@80000000 {
> device_type = "pci";
> bus-frequency = <01fca055>; // 33.3MHz
> bus-range = <0 1>;
> reg = <80000000 7f000000>; // Whole PCI space.
'reg' and 'ranges' should not typically overlap. 'reg' should only
encode control registers for the bridge, not the whole PCI space (not
that I'm even entirely sure what you mean by that).
> ranges = <01000000 0 00000000 fe000000 0 00c00000 // PCI I/O
> 02000000 0 80000000 80000000 0 7d000000 // PCI memory
> 02000000 0 fd000000 fd000000 0 01000000>; // PCI alias memory
> 8259-interrupt-acknowledge = <fef00000>;
> #address-cells = <3>;
> #size-cells = <2>;
>
> host@0 {
The unit address (after the @) should be derived from the first range
listed in the 'reg' property. It's a bus address, not a slot number.
> vendor-id = 0x000010cc;
Um.. evidentally you have never even tried compiling this device tree,
since this is invalid syntax. That would need to be:
vendor-id = <000010cc>;
and likewise all the others below.
> device-id = 0x00000660;
> revision-id = 0x00000001;
> class-code = 0x00060000;
> subsystem-id = 0x00000000;
> subsystem-vendor-id = 0x00000000;
> devsel-speed = 0x00000001;
> 66mhz-capable;
> min-grant = 0x00000000;
> max-latency = 0x00000000;
> // AGP aperture is unset.
> reg = <42000010 0 00000000 0 00400000>;
> assigned-addresses = <42000010 0 00000000 0 00400000>;
> }
>
> isa@7 {
> device_type = "isa";
> vendor-id = 0x00001106;
> device-id = 0x00000686;
> revision-id = 0x00000010;
> class-code = 0x00060100;
> subsystem-id = 0x00000000;
> subsystem-vendor-id = 0x00000000;
> devsel-speed = 0x00000001;
> min-grant = 0x00000000;
> max-latency = 0x00000000;
> /* First 64k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
> ranges = <00000001 0 01000000 0 00000000 00010000>;
> interrupt-parent = <&/pci@80000000/isa@7/interrupt-controller>;
Probably worth using a label on the interrupt node to avoid giving a
full path here.
> #interrupt-cells = <2>;
> #address-cells = <2>;
> #size-cells = <1>;
>
> dma-controller {
All these devices should have unit addresses.
> device_type = "dma-controller";
> compatible = "pnpPNP,200";
> reg = <00000001 00000000 00000010
> 00000001 00000080 00000010
> 00000001 000000c0 00000020>;
> /* Channel 4 reserverd, cascade mode, 2x32k transfer/counter
> * widths and bus master capability. Is this really necessary?
> */
> /* dma = <4 4 20 20 1>; */
> };
>
> interrupt-controller {
> device_type = "interrupt-controller";
> compatible = "pnpPNP,000";
> interrupt-controller;
> reg = <00000001 00000020 00000002
> 00000001 000000a0 00000002
> 00000001 000004d0 00000002>;
> reserved-interrupts = <2>;
> };
>
> 8042@60 {
> device_type = "8042";
> compatible = "pnpPNP,303";
> reg = <00000001 00000060 00000010>;
> interrupts = <1 3 c 3>; // IRQ1, IRQ12 (rising edge)
>
> keyboard {
> device_type = "keyboard";
> compatible = "pnpPNP,303"; // Here again?
> reg = <0 0 0>;
> };
>
> mouse {
> device_type = "mouse";
> compatible = "pnpPNP,f03";
> reg = <0 0 0>;
> };
> };
>
> timer@40 {
> /* device_type = "timer"; */ // No device type binding for now.
> compatibe = "pnpPNP,100"; // Also add pcspkr to platform devices.
> reg = <00000001 00000040 00000020>;
> };
>
> rtc@70 {
> device_type = "rtc";
> compatible = "pnpPNP,b00"; // <ds1385-rtc>; // What should be used here?
> reg = <00000001 00000070 00000002>;
> interrupts = <8 3>;
> };
>
> serial@2f8 {
> device_type = "serial";
> compatible = "pnpPNP,501" "pnpPNP,500"; // "ns16550"; add property check to OF serial code.
> reg = <00000001 000002f8 00000008>;
> interrupts = <3 3>; // IRQ3 (rising edge)
> clock-frequency = <0>; // Not necessary?
> };
>
> serial@3f8 {
> device_type = "serial";
> compatible = "pnpPNP,501" "pnpPNP,500"; // "ns16550"; add property check to OF serial code.
> reg = <00000001 000003f8 00000008>;
> interrupts = <4 3>; // IRQ4 (rising edge)
> clock-frequency = <0>; // Not necessary?
> };
>
> parallel@378 {
> device_type = "parallel";
> compatible = "pnpPNP,400"; // "pnpPNP,401" // No ECP support for now.
> reg = <00000001 00000378 00000003
> 00000001 00000778 00000003>;
> /* interrupts = <7>; */ // No IRQ free on AmigaOne!
> /* dma = <3 0 0 0>; */ // Parallel port DMA mode?
> };
>
> fdc@3f0 {
> device_type = "fdc";
> compatible = "pnpPNP,700";
> reg = <00000001 000003f0 00000008>;
> interrupts = <6 3>; // IRQ6 (rising edge)
> /* dma = < >; */ // Floppy DMA mode?
>
> disk@0 {
> device_type = "block";
> reg = <0 0 0>;
> };
> };
> };
>
> ide@7,1 {
This will need a compatible property, at least.
> // Is there a device_type defined for IDE controllers?
> vendor-id = 0x00001106;
> device-id = 0x00000571;
> revision-id = 0x00000006;
> // Class code with PCI IDE programming interface indicator.
> class-code = 0x0001018f;
> subsystem-id = 0;
> subsystem-vendor-id = 0;
> devsel-speed = 0x00000001;
> min-grant = 0;
> max-latency = 0;
> fast-back-to-back;
> // Assume base addresses are relocateable, even if
> // controller operates in compatibility mode. Right?
> reg = <21003910 0 00000000 0 00000000
> 21003914 0 00000000 0 00000000
> 21003918 0 00000000 0 00000000
> 2100391c 0 00000000 0 00000000
> 21003920 0 00000000 0 00000000>;
> assigned-addresses = <01003910 0 000001f0 0 00000008
> 01003914 0 000003f4 0 00000004
> 01003918 0 00000170 0 00000008
> 0100391c 0 00000374 0 00000004
> 01003920 0 0000cc00 0 00000010>;
> };
>
> chosen {
> linux,stdout-path = "/pci@80000000/isa@7/serial@2f8";
> };
> };
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [patch 1/6] Fix bus probe on Bamboo board
From: David Gibson @ 2007-09-03 0:58 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
In-Reply-To: <20070831200642.866425000@linux.vnet.ibm.com>
On Fri, Aug 31, 2007 at 03:04:50PM -0500, Josh Boyer wrote:
> Commit 804ace8881d21 changed the behavior of how compatible nodes are found.
> This highlighted a bug on the Bamboo board where it wasn't probing the bus
> specified in the DTS file. We fix it by being explicit about which bus to
> probe.
>
> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Acked-by: David Gibson <david@gibson.dropbvear.id.au>
>
> ---
> arch/powerpc/platforms/44x/bamboo.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> --- linux-2.6.orig/arch/powerpc/platforms/44x/bamboo.c
> +++ linux-2.6/arch/powerpc/platforms/44x/bamboo.c
> @@ -23,7 +23,7 @@
> #include "44x.h"
>
> static struct of_device_id bamboo_of_bus[] = {
> - { .compatible = "ibm,plb", },
> + { .compatible = "ibm,plb4", },
> { .compatible = "ibm,opb", },
> { .compatible = "ibm,ebc", },
> {},
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [patch 5/6] Walnut board support
From: David Gibson @ 2007-09-03 1:11 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
In-Reply-To: <20070831200643.514442000@linux.vnet.ibm.com>
On Fri, Aug 31, 2007 at 03:04:54PM -0500, Josh Boyer wrote:
> Board support for the PPC405 Walnut evaluation board
>
> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
[snip]
> --- linux-2.6.orig/arch/powerpc/platforms/40x/Kconfig
> +++ linux-2.6/arch/powerpc/platforms/40x/Kconfig
> @@ -53,13 +53,13 @@
> # help
> # This option enables support for the IBM PPC405GPr evaluation board.
>
> -#config WALNUT
> -# bool "Walnut"
> -# depends on 40x
> -# default y
> -# select 405GP
> -# help
> -# This option enables support for the IBM PPC405GP evaluation board.
> +config WALNUT
> + bool "Walnut"
> + depends on 40x
> + default y
> + select 405GP
> + help
> + This option enables support for the IBM PPC405GP evaluation board.
Surely this needs WANT_DEVICE_TREE, too.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [patch 6/6] Walnut zImage wrapper
From: David Gibson @ 2007-09-03 1:13 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
In-Reply-To: <20070831200643.675381000@linux.vnet.ibm.com>
On Fri, Aug 31, 2007 at 03:04:55PM -0500, Josh Boyer wrote:
> Add zImage wrapper for walnut board
>
> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
[snip]
> --- /dev/null
> +++ linux-2.6/arch/powerpc/boot/treeboot-walnut.c
> @@ -0,0 +1,133 @@
> +/*
> + * Old U-boot compatibility for Walnut
> + *
> + * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
> + *
> + * Copyright 2007 IBM Corporation
> + * Based on cuboot-83xx.c, which is:
> + * Copyright (c) 2007 Freescale Semiconductor, Inc.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License version 2 as published
> + * by the Free Software Foundation.
> + */
> +
> +#include "ops.h"
> +#include "stdio.h"
> +#include "dcr.h"
> +#include "4xx.h"
> +#include "io.h"
> +
> +BSS_STACK(4096);
> +
> +void ibm405gp_fixup_clocks(unsigned int sysclk, unsigned int ser_clk)
> +{
> + u32 pllmr = mfdcr(0xb0);
Please add #defines for the DCR numbers, rather than using literals.
> + u32 cpc0_cr0 = mfdcr(0xb1);
> + u32 cpc0_cr1 = mfdcr(0xb2);
> + u32 cpu, plb, opb, ebc, tb, uart0, uart1, m;
> + u32 fwdv, fbdv, cbdv, opdv, epdv, udiv;
> +
> + fwdv = (8 - ((pllmr & 0xe0000000) >> 29));
> + fbdv = (pllmr & 0x1e000000) >> 25;
> + cbdv = ((pllmr & 0x00060000) >> 17) + 1;
> + opdv = ((pllmr & 0x00018000) >> 15) + 1;
> + epdv = ((pllmr & 0x00001800) >> 13) + 2;
> + udiv = ((cpc0_cr0 & 0x3e) >> 1) + 1;
> +
> + m = fwdv * fbdv * cbdv;
> +
> + cpu = sysclk * m / fwdv;
> + plb = cpu / cbdv;
> + opb = plb / opdv;
> + ebc = plb / epdv;
> +
> + if (cpc0_cr0 & 0x80) {
> + /* uart0 uses the external clock */
> + uart0 = ser_clk;
> + } else {
> + uart0 = cpu / udiv;
> + }
> +
> + if (cpc0_cr0 & 0x40) {
> + /* uart1 uses the external clock */
> + uart1 = ser_clk;
> + } else {
> + uart1 = cpu / udiv;
> + }
> +
> + /* setup the timebase clock to tick at the cpu frequency */
> + cpc0_cr1 = cpc0_cr1 & ~ 0x00800000;
> + mtdcr(0xb2, cpc0_cr1);
> + tb = cpu;
> +
> + dt_fixup_cpu_clocks(cpu, tb, 0);
> + dt_fixup_clock("/plb", plb);
> + dt_fixup_clock("/plb/opb", opb);
> + dt_fixup_clock("/plb/ebc", ebc);
> + dt_fixup_clock("/plb/opb/serial@300", uart0);
> + dt_fixup_clock("/plb/opb/serial@400", uart1);
> +}
> +
> +static void walnut_flashsel_fixup(void)
> +{
> + void *devp, *sram;
> + u32 reg_flash[3] = {0x0, 0x0, 0x80000};
> + u32 reg_sram[3] = {0x0, 0x0, 0x80000};
> + u8 *fpga;
> + u8 fpga_brds1 = 0x0;
> +
> + devp = finddevice("/plb/ebc/fpga");
> + if (!devp)
> + fatal("Couldn't locate FPGA node\n\r");
> +
> + if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga))
> + fatal("no virtual-reg property\n\r");
> +
> + fpga_brds1 = in_8(fpga);
> +
> + printf("FPGA_BRDS1: %08x\n", fpga_brds1);
> +
> + devp = finddevice("/plb/ebc/flash");
> + if (!devp)
> + fatal("Couldn't locate flash node\n\r");
> +
> + if (getprop(devp, "reg", reg_flash, sizeof(reg_flash)) != sizeof(reg_flash))
> + fatal("flash reg property has unexpected size\n\r");
> +
> + sram = finddevice("/plb/ebc/sram");
> + if (!sram)
> + fatal("Couldn't locate sram node\n\r");
> +
> + if (getprop(sram, "reg", reg_sram, sizeof(reg_sram)) != sizeof(reg_sram))
> + fatal("sram reg property has unexpected size\n\r");
> +
> + if (fpga_brds1 & 0x1) {
> + reg_flash[1] ^= 0x80000;
> + reg_sram[1] ^= 0x80000;
> + }
> +
> + setprop(devp, "reg", reg_flash, sizeof(reg_flash));
> + setprop(sram, "reg", reg_sram, sizeof(reg_sram));
> +}
> +
> +static void walnut_fixups(void)
> +{
> + ibm4xx_fixup_memsize();
> + ibm405gp_fixup_clocks(33330000, 0xa8c000);
> + ibm4xx_quiesce_eth((u32 *)0xef600800, NULL);
> + ibm4xx_fixup_ebc_ranges("/plb/ebc");
> + walnut_flashsel_fixup();
> +}
> +
> +void platform_init(void)
> +{
> + unsigned long end_of_ram = 0x2000000;
> + unsigned long avail_ram = end_of_ram - (unsigned long) _end;
> +
> + simple_alloc_init(_end, avail_ram, 32, 32);
> + platform_ops.fixups = walnut_fixups;
> + platform_ops.exit = ibm40x_dbcr_reset;
> + ft_init(_dtb_start, _dtb_end - _dtb_start, 32);
> + serial_console_init();
> +}
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
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