* [PATCH] cpm: Describe multi-user ram in its own device node.
From: Scott Wood @ 2007-09-28 19:06 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
The way the current CPM binding describes available multi-user (a.k.a.
dual-ported) RAM doesn't work well when there are multiple free regions,
and it doesn't work at all if the region doesn't begin at the start of
the muram area (as the hardware needs to be programmed with offsets into
this area). The latter situation can happen with SMC UARTs on CPM2, as its
parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't
support moving it.
It is now described with a muram node, similar to QE. The current CPM
binding is sufficiently recent (i.e. never appeared in an official release)
that compatibility with existing device trees is not an issue.
The code supporting the new binding is shared between cpm1 and cpm2, rather
than remain separated. QE should be able to use this code as well, once
minor fixes are made to its device trees.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
Documentation/powerpc/booting-without-of.txt | 40 ++++++-
arch/powerpc/Kconfig.debug | 6 +-
arch/powerpc/boot/cpm-serial.c | 44 +++++--
arch/powerpc/boot/dts/ep88xc.dts | 13 ++-
arch/powerpc/boot/dts/mpc8272ads.dts | 11 ++
arch/powerpc/boot/dts/mpc885ads.dts | 13 ++-
arch/powerpc/boot/dts/pq2fads.dts | 13 ++-
arch/powerpc/sysdev/commproc.c | 11 ++-
arch/powerpc/sysdev/cpm2_common.c | 36 ++----
arch/powerpc/sysdev/cpm_common.c | 159 ++++++++++++++++++++++++++
drivers/serial/cpm_uart/cpm_uart_cpm2.c | 4 +-
include/asm-powerpc/commproc.h | 12 ++
include/asm-powerpc/cpm.h | 14 +++
include/asm-powerpc/cpm2.h | 10 ++
14 files changed, 338 insertions(+), 48 deletions(-)
create mode 100644 include/asm-powerpc/cpm.h
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index c36dcd2..ce5d67f 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1861,9 +1861,7 @@ platforms are moved over to use the flattened-device-tree model.
Properties:
- compatible : "fsl,cpm1", "fsl,cpm2", or "fsl,qe".
- - reg : The first resource is a 48-byte region beginning with
- CPCR. The second is the available general-purpose
- DPRAM.
+ - reg : A 48-byte region beginning with CPCR.
Example:
cpm@119c0 {
@@ -1871,7 +1869,7 @@ platforms are moved over to use the flattened-device-tree model.
#size-cells = <1>;
#interrupt-cells = <2>;
compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
- reg = <119c0 30 0 2000>;
+ reg = <119c0 30>;
}
ii) Properties common to mulitple CPM/QE devices
@@ -2017,6 +2015,40 @@ platforms are moved over to use the flattened-device-tree model.
fsl,cpm-command = <2e600000>;
};
+ viii) Multi-User RAM (MURAM)
+
+ The multi-user/dual-ported RAM is expressed as a bus under the CPM node.
+
+ Ranges must be set up subject to the following restrictions:
+
+ - Children's reg nodes must be offsets from the start of all muram, even
+ if the user-data area does not begin at zero.
+ - If multiple range entries are used, the difference between the parent
+ address and the child address must be the same in all, so that a single
+ mapping can cover them all while maintaining the ability to determine
+ CPM-side offsets with pointer subtraction. It is recommended that
+ multiple range entries not be used.
+ - A child address of zero must be translatable, even if no reg resources
+ contain it.
+
+ A child "data" node must exist, compatible with "fsl,cpm-muram-data", to
+ indicate the portion of muram that is usable by the OS for arbitrary
+ purposes. The data node may have an arbitrary number of reg resources,
+ all of which contribute to the allocatable muram pool.
+
+ Example, based on mpc8272:
+
+ muram@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 10000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 2000 9800 800>;
+ };
+ };
+
m) Chipselect/Local Bus
Properties:
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index f4e5d22..464f9b4 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -245,9 +245,9 @@ config PPC_EARLY_DEBUG_44x_PHYSHIGH
config PPC_EARLY_DEBUG_CPM_ADDR
hex "CPM UART early debug transmit descriptor address"
depends on PPC_EARLY_DEBUG_CPM
- default "0xfa202808" if PPC_EP88XC
- default "0xf0000808" if CPM2
- default "0xff002808" if CPM1
+ default "0xfa202008" if PPC_EP88XC
+ default "0xf0000008" if CPM2
+ default "0xff002008" if CPM1
help
This specifies the address of the transmit descriptor
used for early debug output. Because it is needed before
diff --git a/arch/powerpc/boot/cpm-serial.c b/arch/powerpc/boot/cpm-serial.c
index fcb8b5e..28296fa 100644
--- a/arch/powerpc/boot/cpm-serial.c
+++ b/arch/powerpc/boot/cpm-serial.c
@@ -56,7 +56,8 @@ static struct cpm_smc *smc;
static struct cpm_scc *scc;
struct cpm_bd *tbdf, *rbdf;
static u32 cpm_cmd;
-static u8 *dpram_start;
+static u8 *muram_start;
+static u32 muram_offset;
static void (*do_cmd)(int op);
static void (*enable_port)(void);
@@ -114,13 +115,12 @@ static void scc_enable_port(void)
static int cpm_serial_open(void)
{
- int dpaddr = 0x800;
disable_port();
out_8(¶m->rfcr, 0x10);
out_8(¶m->tfcr, 0x10);
- rbdf = (struct cpm_bd *)(dpram_start + dpaddr);
+ rbdf = (struct cpm_bd *)muram_start;
rbdf->addr = (u8 *)(rbdf + 2);
rbdf->sc = 0xa000;
rbdf->len = 1;
@@ -131,8 +131,8 @@ static int cpm_serial_open(void)
tbdf->len = 1;
sync();
- out_be16(¶m->rbase, dpaddr);
- out_be16(¶m->tbase, dpaddr + sizeof(struct cpm_bd));
+ out_be16(¶m->rbase, muram_offset);
+ out_be16(¶m->tbase, muram_offset + sizeof(struct cpm_bd));
do_cmd(CPM_CMD_INIT_RX_TX);
@@ -178,7 +178,7 @@ int cpm_console_init(void *devp, struct serial_console_data *scdp)
void *reg_virt[2];
int is_smc = 0, is_cpm2 = 0, n;
unsigned long reg_phys;
- void *parent;
+ void *parent, *muram;
if (dt_is_compatible(devp, "fsl,cpm1-smc-uart")) {
is_smc = 1;
@@ -229,16 +229,36 @@ int cpm_console_init(void *devp, struct serial_console_data *scdp)
n = getprop(parent, "virtual-reg", reg_virt, sizeof(reg_virt));
if (n < (int)sizeof(reg_virt)) {
- for (n = 0; n < 2; n++) {
- if (!dt_xlate_reg(parent, n, ®_phys, NULL))
- return -1;
+ if (!dt_xlate_reg(parent, 0, ®_phys, NULL))
+ return -1;
- reg_virt[n] = (void *)reg_phys;
- }
+ reg_virt[0] = (void *)reg_phys;
}
cpcr = reg_virt[0];
- dpram_start = reg_virt[1];
+
+ muram = finddevice("/soc/cpm/muram/data");
+ if (!muram)
+ return -1;
+
+ /* For bootwrapper-compatible device trees, we assume that the first
+ * entry has at least 18 bytes, and that #address-cells/#data-cells
+ * is one for both parent and child.
+ */
+
+ n = getprop(muram, "virtual-reg", reg_virt, sizeof(reg_virt));
+ if (n < (int)sizeof(reg_virt)) {
+ if (!dt_xlate_reg(muram, 0, ®_phys, NULL))
+ return -1;
+
+ reg_virt[0] = (void *)reg_phys;
+ }
+
+ muram_start = reg_virt[0];
+
+ n = getprop(muram, "reg", &muram_offset, 4);
+ if (n < 4)
+ return -1;
scdp->open = cpm_serial_open;
scdp->putc = cpm_serial_putc;
diff --git a/arch/powerpc/boot/dts/ep88xc.dts b/arch/powerpc/boot/dts/ep88xc.dts
index 0406fc5..02705f2 100644
--- a/arch/powerpc/boot/dts/ep88xc.dts
+++ b/arch/powerpc/boot/dts/ep88xc.dts
@@ -142,9 +142,20 @@
command-proc = <9c0>;
interrupts = <0>; // cpm error interrupt
interrupt-parent = <&CPM_PIC>;
- reg = <9c0 40 2000 1c00>;
+ reg = <9c0 40>;
ranges;
+ muram@2000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 2000 2000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 1c00>;
+ };
+ };
+
brg@9f0 {
compatible = "fsl,mpc885-brg",
"fsl,cpm1-brg",
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 3fe991d..188179d 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -124,6 +124,17 @@
reg = <119c0 30 0 2000>;
ranges;
+ muram@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 10000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 2000 9800 800>;
+ };
+ };
+
brg@119f0 {
compatible = "fsl,mpc8272-brg",
"fsl,cpm2-brg",
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index cbcd16f..8848e63 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -148,9 +148,20 @@
command-proc = <9c0>;
interrupts = <0>; // cpm error interrupt
interrupt-parent = <&CPM_PIC>;
- reg = <9c0 40 2000 1c00>;
+ reg = <9c0 40>;
ranges;
+ muram@2000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 2000 2000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 1c00>;
+ };
+ };
+
brg@9f0 {
compatible = "fsl,mpc885-brg",
"fsl,cpm1-brg",
diff --git a/arch/powerpc/boot/dts/pq2fads.dts b/arch/powerpc/boot/dts/pq2fads.dts
index 54e8bd1..2d56492 100644
--- a/arch/powerpc/boot/dts/pq2fads.dts
+++ b/arch/powerpc/boot/dts/pq2fads.dts
@@ -119,9 +119,20 @@
#size-cells = <1>;
#interrupt-cells = <2>;
compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
- reg = <119c0 30 0 2000>;
+ reg = <119c0 30>;
ranges;
+ muram@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 10000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 2000 9800 800>;
+ };
+ };
+
brg@119f0 {
compatible = "fsl,mpc8280-brg",
"fsl,cpm2-brg",
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index e37f0a8..4b3e93c 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -39,12 +39,15 @@
#include <asm/tlbflush.h>
#include <asm/rheap.h>
#include <asm/prom.h>
+#include <asm/cpm.h>
#include <asm/fs_pd.h>
#define CPM_MAP_SIZE (0x4000)
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
static void m8xx_cpm_dpinit(void);
+#endif
static uint host_buffer; /* One page of host buffer */
static uint host_end; /* end + 1 */
cpm8xx_t __iomem *cpmp; /* Pointer to comm processor space */
@@ -193,7 +196,7 @@ end:
return sirq;
}
-void cpm_reset(void)
+void __init cpm_reset(void)
{
sysconf8xx_t __iomem *siu_conf;
@@ -229,8 +232,12 @@ void cpm_reset(void)
out_be32(&siu_conf->sc_sdcr, 1);
immr_unmap(siu_conf);
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+ cpm_muram_init();
+#else
/* Reclaim the DP memory for our use. */
m8xx_cpm_dpinit();
+#endif
}
/* We used to do this earlier, but have to postpone as long as possible
@@ -296,6 +303,7 @@ cpm_setbrg(uint brg, uint rate)
CPM_BRG_EN | CPM_BRG_DIV16);
}
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
/*
* dpalloc / dpfree bits.
*/
@@ -397,6 +405,7 @@ uint cpm_dpram_phys(u8 *addr)
return (dpram_pbase + (uint)(addr - dpram_vbase));
}
EXPORT_SYMBOL(cpm_dpram_addr);
+#endif /* !CONFIG_PPC_CPM_NEW_BINDING */
struct cpm_ioport16 {
__be16 dir, par, sor, dat, intr;
diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index 9058da2..453f8a5 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -46,7 +46,10 @@
#include <sysdev/fsl_soc.h>
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
static void cpm2_dpinit(void);
+#endif
+
cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor space */
/* We allocate this here because it is used almost exclusively for
@@ -65,7 +68,11 @@ cpm2_reset(void)
/* Reclaim the DP memory for our use.
*/
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+ cpm_muram_init();
+#else
cpm2_dpinit();
+#endif
/* Tell everyone where the comm processor resides.
*/
@@ -312,6 +319,7 @@ int cpm2_smc_clk_setup(enum cpm_clk_target target, int clock)
return ret;
}
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
/*
* dpalloc / dpfree bits.
*/
@@ -324,28 +332,6 @@ static u8 __iomem *im_dprambase;
static void cpm2_dpinit(void)
{
- struct resource r;
-
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
- struct device_node *np;
-
- np = of_find_compatible_node(NULL, NULL, "fsl,cpm2");
- if (!np)
- panic("Cannot find CPM2 node");
-
- if (of_address_to_resource(np, 1, &r))
- panic("Cannot get CPM2 resource 1");
-
- of_node_put(np);
-#else
- r.start = CPM_MAP_ADDR + CPM_DATAONLY_BASE;
- r.end = r.start + CPM_DATAONLY_SIZE - 1;
-#endif
-
- im_dprambase = ioremap(r.start, r.end - r.start + 1);
- if (!im_dprambase)
- panic("Cannot map DPRAM");
-
spin_lock_init(&cpm_dpmem_lock);
/* initialize the info header */
@@ -354,13 +340,16 @@ static void cpm2_dpinit(void)
sizeof(cpm_boot_dpmem_rh_block[0]),
cpm_boot_dpmem_rh_block);
+ im_dprambase = cpm2_immr->im_dprambase;
+
/* Attach the usable dpmem area */
/* XXX: This is actually crap. CPM_DATAONLY_BASE and
* CPM_DATAONLY_SIZE is only a subset of the available dpram. It
* varies with the processor and the microcode patches activated.
* But the following should be at least safe.
*/
- rh_attach_region(&cpm_dpmem_info, 0, r.end - r.start + 1);
+ rh_attach_region(&cpm_dpmem_info, CPM_MAP_ADDR + CPM_DATAONLY_BASE,
+ CPM_DATAONLY_SIZE);
}
/* This function returns an index into the DPRAM area.
@@ -418,6 +407,7 @@ void *cpm_dpram_addr(unsigned long offset)
return (void *)(im_dprambase + offset);
}
EXPORT_SYMBOL(cpm_dpram_addr);
+#endif /* !CONFIG_PPC_CPM_NEW_BINDING */
struct cpm2_ioports {
u32 dir, par, sor, odr, dat;
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index 9daa6ac..66c8ad4 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -5,15 +5,27 @@
*
* Copyright 2007 Freescale Semiconductor, Inc.
*
+ * Some parts derived from commproc.c/cpm2_common.c, which is:
+ * Copyright (c) 1997 Dan error_act (dmalek@jlc.net)
+ * Copyright (c) 1999-2001 Dan Malek <dan@embeddedalley.com>
+ * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com)
+ * 2006 (c) MontaVista Software, Inc.
+ * Vitaly Bordug <vbordug@ru.mvista.com>
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License as
* published by the Free Software Foundation.
*/
#include <linux/init.h>
+#include <linux/of_device.h>
+
#include <asm/udbg.h>
#include <asm/io.h>
#include <asm/system.h>
+#include <asm/rheap.h>
+#include <asm/cpm.h>
+
#include <mm/mmu_decl.h>
#ifdef CONFIG_PPC_EARLY_DEBUG_CPM
@@ -41,6 +53,153 @@ void __init udbg_init_cpm(void)
setbat(1, 0xf0000000, 0xf0000000, 1024*1024, _PAGE_IO);
#endif
udbg_putc = udbg_putc_cpm;
+ udbg_putc('X');
}
}
#endif
+
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+static spinlock_t cpm_muram_lock;
+static rh_block_t cpm_boot_muram_rh_block[16];
+static rh_info_t cpm_muram_info;
+static u8 __iomem *muram_vbase;
+static phys_addr_t muram_pbase;
+
+/* Max address size we deal with */
+#define OF_MAX_ADDR_CELLS 4
+
+int __init cpm_muram_init(void)
+{
+ struct device_node *np;
+ struct resource r;
+ u32 zero[OF_MAX_ADDR_CELLS] = {};
+ resource_size_t max = 0;
+ int i = 0;
+ int ret = 0;
+
+ printk("cpm_muram_init\n");
+
+ spin_lock_init(&cpm_muram_lock);
+ /* initialize the info header */
+ rh_init(&cpm_muram_info, 1,
+ sizeof(cpm_boot_muram_rh_block) /
+ sizeof(cpm_boot_muram_rh_block[0]),
+ cpm_boot_muram_rh_block);
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data");
+ if (!np) {
+ printk(KERN_ERR "Cannot find CPM muram data node");
+ ret = -ENODEV;
+ goto out;
+ }
+
+ muram_pbase = of_translate_address(np, zero);
+ if (muram_pbase == (phys_addr_t)OF_BAD_ADDR) {
+ printk(KERN_ERR "Cannot translate zero through CPM muram node");
+ ret = -ENODEV;
+ goto out;
+ }
+
+ while (of_address_to_resource(np, i++, &r) == 0) {
+ if (r.end > max)
+ max = r.end;
+
+ rh_attach_region(&cpm_muram_info, r.start - muram_pbase,
+ r.end - r.start + 1);
+ }
+
+ muram_vbase = ioremap(muram_pbase, max - muram_pbase + 1);
+ if (!muram_vbase) {
+ printk(KERN_ERR "Cannot map CPM muram");
+ ret = -ENOMEM;
+ }
+
+out:
+ of_node_put(np);
+ return ret;
+}
+
+/**
+ * cpm_muram_alloc - allocate the requested size worth of multi-user ram
+ * @size: number of bytes to allocate
+ * @align: requested alignment, in bytes
+ *
+ * This function returns an offset into the muram area.
+ * Use cpm_dpram_addr() to get the virtual address of the area.
+ * Use cpm_muram_free() to free the allocation.
+ */
+unsigned long cpm_muram_alloc(unsigned long size, unsigned long align)
+{
+ unsigned long start;
+ unsigned long flags;
+
+ spin_lock_irqsave(&cpm_muram_lock, flags);
+ cpm_muram_info.alignment = align;
+ start = rh_alloc(&cpm_muram_info, size, "commproc");
+ spin_unlock_irqrestore(&cpm_muram_lock, flags);
+
+ return start;
+}
+EXPORT_SYMBOL(cpm_muram_alloc);
+
+/**
+ * cpm_muram_free - free a chunk of multi-user ram
+ * @offset: The beginning of the chunk as returned by cpm_muram_alloc().
+ */
+int cpm_muram_free(unsigned long offset)
+{
+ int ret;
+ unsigned long flags;
+
+ spin_lock_irqsave(&cpm_muram_lock, flags);
+ ret = rh_free(&cpm_muram_info, offset);
+ spin_unlock_irqrestore(&cpm_muram_lock, flags);
+
+ return ret;
+}
+EXPORT_SYMBOL(cpm_muram_free);
+
+/**
+ * cpm_muram_alloc_fixed - reserve a specific region of multi-user ram
+ * @offset: the offset into the muram area to reserve
+ * @size: the number of bytes to reserve
+ *
+ * This function returns "start" on success, -ENOMEM on failure.
+ * Use cpm_dpram_addr() to get the virtual address of the area.
+ * Use cpm_muram_free() to free the allocation.
+ */
+unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size)
+{
+ unsigned long start;
+ unsigned long flags;
+
+ spin_lock_irqsave(&cpm_muram_lock, flags);
+ cpm_muram_info.alignment = 1;
+ start = rh_alloc_fixed(&cpm_muram_info, offset, size, "commproc");
+ spin_unlock_irqrestore(&cpm_muram_lock, flags);
+
+ return start;
+}
+EXPORT_SYMBOL(cpm_muram_alloc_fixed);
+
+/**
+ * cpm_muram_addr - turn a muram offset into a virtual address
+ * @offset: muram offset to convert
+ */
+void __iomem *cpm_muram_addr(unsigned long offset)
+{
+ return muram_vbase + offset;
+}
+EXPORT_SYMBOL(cpm_muram_addr);
+
+/**
+ * cpm_muram_phys - turn a muram virtual address into a DMA address
+ * @offset: virtual address from cpm_muram_addr() to convert
+ */
+dma_addr_t cpm_muram_dma(void __iomem *addr)
+{
+ return muram_pbase + ((u8 __iomem *)addr - muram_vbase);
+}
+EXPORT_SYMBOL(cpm_muram_dma);
+
+#endif /* CONFIG_PPC_CPM_NEW_BINDING */
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index 5bd4508..882dbc1 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -235,7 +235,7 @@ void scc4_lineif(struct uart_cpm_port *pinfo)
int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
{
int dpmemsz, memsz;
- u8 *dp_mem;
+ u8 __iomem *dp_mem;
unsigned long dp_offset;
u8 *mem_addr;
dma_addr_t dma_addr = 0;
@@ -278,7 +278,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos
* pinfo->rx_fifosize);
- pinfo->rx_bd_base = (cbd_t __iomem __force *)dp_mem;
+ pinfo->rx_bd_base = (cbd_t __iomem *)dp_mem;
pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos;
return 0;
diff --git a/include/asm-powerpc/commproc.h b/include/asm-powerpc/commproc.h
index 5dec324..0307c84 100644
--- a/include/asm-powerpc/commproc.h
+++ b/include/asm-powerpc/commproc.h
@@ -19,6 +19,7 @@
#include <asm/8xx_immap.h>
#include <asm/ptrace.h>
+#include <asm/cpm.h>
/* CPM Command register.
*/
@@ -54,6 +55,7 @@
#define mk_cr_cmd(CH, CMD) ((CMD << 8) | (CH << 4))
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
/* The dual ported RAM is multi-functional. Some areas can be (and are
* being) used for microcode. There is an area that can only be used
* as data ram for buffer descriptors, which is all we use right now.
@@ -62,17 +64,27 @@
#define CPM_DATAONLY_BASE ((uint)0x0800)
#define CPM_DATAONLY_SIZE ((uint)0x0700)
#define CPM_DP_NOSPACE ((uint)0x7fffffff)
+#endif
/* Export the base address of the communication processor registers
* and dual port ram.
*/
extern cpm8xx_t __iomem *cpmp; /* Pointer to comm processor */
+
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+#define cpm_dpalloc cpm_muram_alloc
+#define cpm_dpfree cpm_muram_free
+#define cpm_dpram_addr cpm_muram_addr
+#define cpm_dpram_phys cpm_muram_dma
+#else
extern unsigned long cpm_dpalloc(uint size, uint align);
extern int cpm_dpfree(unsigned long offset);
extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
extern void cpm_dpdump(void);
extern void *cpm_dpram_addr(unsigned long offset);
extern uint cpm_dpram_phys(u8* addr);
+#endif
+
extern void cpm_setbrg(uint brg, uint rate);
extern uint m8xx_cpm_hostalloc(uint size);
diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h
new file mode 100644
index 0000000..48df9f3
--- /dev/null
+++ b/include/asm-powerpc/cpm.h
@@ -0,0 +1,14 @@
+#ifndef __CPM_H
+#define __CPM_H
+
+#include <linux/compiler.h>
+#include <linux/types.h>
+
+int cpm_muram_init(void);
+unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
+int cpm_muram_free(unsigned long offset);
+unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
+void __iomem *cpm_muram_addr(unsigned long offset);
+dma_addr_t cpm_muram_dma(void __iomem *addr);
+
+#endif
diff --git a/include/asm-powerpc/cpm2.h b/include/asm-powerpc/cpm2.h
index d7b57ac..e698b1d 100644
--- a/include/asm-powerpc/cpm2.h
+++ b/include/asm-powerpc/cpm2.h
@@ -11,6 +11,7 @@
#define __CPM2__
#include <asm/immap_cpm2.h>
+#include <asm/cpm.h>
/* CPM Command register.
*/
@@ -82,6 +83,7 @@
#define mk_cr_cmd(PG, SBC, MCN, OP) \
((PG << 26) | (SBC << 21) | (MCN << 6) | OP)
+#ifndef CONFIG_PPC_CPM_NEW_BINDING
/* Dual Port RAM addresses. The first 16K is available for almost
* any CPM use, so we put the BDs there. The first 128 bytes are
* used for SMC1 and SMC2 parameter RAM, so we start allocating
@@ -97,6 +99,7 @@
#define CPM_DATAONLY_SIZE ((uint)(16 * 1024) - CPM_DATAONLY_BASE)
#define CPM_FCC_SPECIAL_BASE ((uint)0x0000b000)
#endif
+#endif
/* The number of pages of host memory we allocate for CPM. This is
* done early in kernel initialization to get physically contiguous
@@ -109,11 +112,18 @@
*/
extern cpm_cpm2_t __iomem *cpmp; /* Pointer to comm processor */
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
+#define cpm_dpalloc cpm_muram_alloc
+#define cpm_dpfree cpm_muram_free
+#define cpm_dpram_addr cpm_muram_addr
+#else
extern unsigned long cpm_dpalloc(uint size, uint align);
extern int cpm_dpfree(unsigned long offset);
extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
extern void cpm_dpdump(void);
extern void *cpm_dpram_addr(unsigned long offset);
+#endif
+
extern void cpm_setbrg(uint brg, uint rate);
extern void cpm2_fastbrg(uint brg, uint rate, int div16);
extern void cpm2_reset(void);
--
1.5.3.2
^ permalink raw reply related
* Re: [Cbe-oss-dev] [patch 0/8] PS3 AV Settings Driver patches for 2.6.24
From: Geoff Levand @ 2007-09-28 19:29 UTC (permalink / raw)
To: michael
Cc: Geert Uytterhoeven, linuxppc-dev, linux-fbdev-devel, cbe-oss-dev,
Antonino A. Daplas
In-Reply-To: <1190968833.15970.3.camel@concordia>
Michael Ellerman wrote:
> On Thu, 2007-09-27 at 10:23 -0700, Geoff Levand wrote:
>> Michael Ellerman wrote:
>> > On Wed, 2007-09-26 at 18:33 +0200, Geert Uytterhoeven wrote:
>> >> Question: As several DVI-D displays advertise they support 1080i modes while
>> >> they actually don't (cfr. the quirk database), perhaps I should drop 1080i
>> >> modes completely from the ps3av_preferred_modes[] table? Usually 720p looks
>> >> better than 1080i anyway. What do you think?
>> >
>> > Definitely. If the autodetection fails Linux is basically unusable on
>> > PS3 unless you hack the kernel sources and build your own kboot and
>> > otheros.bld - not entirely trivial for novice users. So it's pretty
>> > important that it works 100%.
>>
>> It is not that bad. If a bootloader is configued to use autodetection
>> so that it is shown at best video mode, then it should have advertised
>> key sequences to default to known video modes, with at least a 480p 'safe'
>> mode.
>
> Oh OK, that is a good idea. What's the "safe mode" key sequence for the
> otheros.bld you provide on kernel.org?
I don't maintain that, and have no idea how it sets its video mode. Did you
have trouble with it? I know in the past it used a fixed 480p mode.
-Geoff
^ permalink raw reply
* Re: [PATCH 02/18] Add Kconfig macros for Xilinx Virtex support
From: Grant Likely @ 2007-09-28 19:35 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <46FD45FA.3000205@freescale.com>
On 9/28/07, Scott Wood <scottwood@freescale.com> wrote:
> Grant Likely wrote:
> > From: Grant Likely <grant.likely@secretlab.ca>
> >
> > Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> > ---
> >
> > arch/powerpc/platforms/40x/Kconfig | 30 +++++++++++++++++-------------
> > 1 files changed, 17 insertions(+), 13 deletions(-)
> >
> > diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
> > index c3dce3b..1aae0e6 100644
> > --- a/arch/powerpc/platforms/40x/Kconfig
> > +++ b/arch/powerpc/platforms/40x/Kconfig
> > @@ -61,13 +61,14 @@ config WALNUT
> > help
> > This option enables support for the IBM PPC405GP evaluation board.
> >
> > -#config XILINX_ML300
> > -# bool "Xilinx-ML300"
> > -# depends on 40x
> > -# default y
> > -# select VIRTEX_II_PRO
> > -# help
> > -# This option enables support for the Xilinx ML300 evaluation board.
> > +config XILINX_VIRTEX_GENERIC_BOARD
> > + bool "Generic Xilinx Virtex board"
> > + depends on 40x
> > + default y
> > + select VIRTEX_II_PRO
> > + select VIRTEX_4_FX
> > + help
> > + This option enables generic support for Xilinx Virtex based boards.
>
> I don't think we want default y here.
I just followed the lead of Walnut here. Perhaps for the embedded
targets all of them should be 'default n'. Josh, thoughts?
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH 11/18] Virtex: Port UARTLITE driver to of-platform-bus
From: Arnd Bergmann @ 2007-09-28 19:32 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070928181748.18608.62409.stgit@trillian.cg.shawcable.net>
T24gRnJpZGF5IDI4IFNlcHRlbWJlciAyMDA3LCBHcmFudCBMaWtlbHkgd3JvdGU6Cj4gLaCgoKCg
oKByZXQgPSB1YXJ0X3JlZ2lzdGVyX2RyaXZlcigmdWxpdGVfdWFydF9kcml2ZXIpOwo+IC2goKCg
oKCgaWYgKHJldCkKPiAtoKCgoKCgoKCgoKCgoKCgcmV0dXJuIHJldDsKPiAroKCgoKCgoHByX2Rl
YnVnKCJ1YXJ0bGl0ZTogY2FsbGluZyB1YXJ0X3JlZ2lzdGVyX2RyaXZlcigpXG4iKTsKPiAroKCg
oKCgoGlmICgocmV0ID0gdWFydF9yZWdpc3Rlcl9kcml2ZXIoJnVsaXRlX3VhcnRfZHJpdmVyKSkg
IT0gMCkKPiAroKCgoKCgoKCgoKCgoKCgZ290byBlcnJfdWFydDsKPiCgCj4gLaCgoKCgoKByZXQg
PSBwbGF0Zm9ybV9kcml2ZXJfcmVnaXN0ZXIoJnVsaXRlX3BsYXRmb3JtX2RyaXZlcik7Cj4gLaCg
oKCgoKBpZiAocmV0KQo+IC2goKCgoKCgoKCgoKCgoKB1YXJ0X3VucmVnaXN0ZXJfZHJpdmVyKCZ1
bGl0ZV91YXJ0X2RyaXZlcik7Cj4gK6CgoKCgoKBpZiAoKHJldCA9IHVsaXRlX29mX3JlZ2lzdGVy
KCkpICE9IDApCj4gK6CgoKCgoKCgoKCgoKCgoGdvdG8gZXJyX29mOwo+IKAKPiAroKCgoKCgoHBy
X2RlYnVnKCJ1YXJ0bGl0ZTogY2FsbGluZyBwbGF0Zm9ybV9kcml2ZXJfcmVnaXN0ZXIoKVxuIik7
Cj4gK6CgoKCgoKBpZiAoKHJldCA9IHBsYXRmb3JtX2RyaXZlcl9yZWdpc3RlcigmdWxpdGVfcGxh
dGZvcm1fZHJpdmVyKSkgIT0gMCkKPiAroKCgoKCgoKCgoKCgoKCgZ290byBlcnJfcGxhdDsKPiAr
Cj4gK6CgoKCgoKByZXR1cm4gMDsKCkkgZG9uJ3Qgc2VlIHRoaXMgYXMgbXVjaCBvZiBhbiBpbXBy
b3ZlbWVudC4gRG9pbmcgYW4gYXNzaWdubWVudCBpbiB0aGUKY29uZGl0aW9uIG1ha2VzIHRoZSBj
b2RlIGxlc3MgcmVhZGFibGUgSU1ITywgc28gaXQgc2hvdWxkIHJlYWxseQpiZSB3cml0dGVuIGFz
CgoJcmV0ID0gdHJ5X3NvbWV0aGluZygpOwoJaWYgKHJldCkKCQlnb3RvIHNvbWV0aGluZ19mYWls
ZWQ7CgpUaGlzIGtlZXBzIHRoZSBub3JtYWwgY29kZSB0byB0aGUgbGVmdCwgYW5kIHRoZSBlcnJv
ciBoYW5kbGluZyBpbmRlbnRlZAp0byB0aGUgcmlnaHQuCgoKCUFybmQgPD48Cg==
^ permalink raw reply
* Re: [PATCH 12/18] Uartlite: Let the console be initialized earlier
From: Arnd Bergmann @ 2007-09-28 19:40 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070928181754.18608.52779.stgit@trillian.cg.shawcable.net>
On Friday 28 September 2007, Grant Likely wrote:
> +#else /* CONFIG_OF */
> +static void __init ulite_console_of_find_device(int id) { /* do nothing */ }
> +#endif /* CONFIG_OF */
Shouldn't this be inline? It shouldn't matter much since most of the time
gcc -funit-at-a-time takes care of this, but it's common to make the inlining
explicit.
Arnd <><
^ permalink raw reply
* Re: [PATCH 10/18] Uartlite: improve in-code comments
From: Arnd Bergmann @ 2007-09-28 19:43 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070928181740.18608.67126.stgit@trillian.cg.shawcable.net>
On Friday 28 September 2007, Grant Likely wrote:
> +/* ---------------------------------------------------------------------
> + * Core UART driver operations
> + */
> +
This is a rather unusual style of commenting. IMHO it would be better if you
left out the ----- line.
Arnd <><
^ permalink raw reply
* Re: [PATCH 01/18] Virtex: Add uartlite bootwrapper driver
From: Arnd Bergmann @ 2007-09-28 19:45 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070928181551.18608.88418.stgit@trillian.cg.shawcable.net>
On Friday 28 September 2007, Grant Likely wrote:
> +static void uartlite_putc(unsigned char c)
> +{
> +=A0=A0=A0=A0=A0=A0=A0while ((in_be32(reg_base + 0x8) & 0x08) !=3D 0); /*=
spin */
> +=A0=A0=A0=A0=A0=A0=A0out_be32(reg_base + 0x4, c);
> +}
When coding a spin-loop, it's better to do a cpu_relax() between
each attempt.
Arnd <><
^ permalink raw reply
* Re: [PATCH 12/18] Uartlite: Let the console be initialized earlier
From: Grant Likely @ 2007-09-28 20:01 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev
In-Reply-To: <200709282140.07000.arnd@arndb.de>
On 9/28/07, Arnd Bergmann <arnd@arndb.de> wrote:
> On Friday 28 September 2007, Grant Likely wrote:
> > +#else /* CONFIG_OF */
> > +static void __init ulite_console_of_find_device(int id) { /* do nothing */ }
> > +#endif /* CONFIG_OF */
>
> Shouldn't this be inline? It shouldn't matter much since most of the time
> gcc -funit-at-a-time takes care of this, but it's common to make the inlining
> explicit.
heh, I even had the inline in there on an earlier version of the
patch. I can add it back it.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH 00/18] Virtex support in arch/powerpc
From: Arnd Bergmann @ 2007-09-28 19:46 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20070928181421.18608.74224.stgit@trillian.cg.shawcable.net>
Hi Grant!
On Friday 28 September 2007, Grant Likely wrote:
> This series adds Xilinx Virtex support to arch/powerpc. =A0Please review
> and comment. =A0It includes support for the uartlite and SystemACE devices
Very nice set of patches, I looked at all of them but couldn't find much
to complain about, just trivial details.
Arnd <><
^ permalink raw reply
* Re: [PATCH 10/18] Uartlite: improve in-code comments
From: Grant Likely @ 2007-09-28 20:02 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev
In-Reply-To: <200709282143.16815.arnd@arndb.de>
On 9/28/07, Arnd Bergmann <arnd@arndb.de> wrote:
> On Friday 28 September 2007, Grant Likely wrote:
> > +/* ---------------------------------------------------------------------
> > + * Core UART driver operations
> > + */
> > +
>
> This is a rather unusual style of commenting. IMHO it would be better if you
> left out the ----- line.
I find the horizontal breaks useful when parsing through the code. If
others agree with you, then I'll happily remove them.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH 01/18] Virtex: Add uartlite bootwrapper driver
From: Grant Likely @ 2007-09-28 20:04 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev
In-Reply-To: <200709282145.09411.arnd@arndb.de>
On 9/28/07, Arnd Bergmann <arnd@arndb.de> wrote:
> On Friday 28 September 2007, Grant Likely wrote:
> > +static void uartlite_putc(unsigned char c)
> > +{
> > +while ((in_be32(reg_base + 0x8) & 0x08) != 0); /* spin */
> > +out_be32(reg_base + 0x4, c);
> > +}
>
> When coding a spin-loop, it's better to do a cpu_relax() between
> each attempt.
Is cpu_relax even implemented in the bootwrapper?
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH 00/18] Virtex support in arch/powerpc
From: Grant Likely @ 2007-09-28 20:05 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev
In-Reply-To: <200709282146.14944.arnd@arndb.de>
On 9/28/07, Arnd Bergmann <arnd@arndb.de> wrote:
> Hi Grant!
>
> On Friday 28 September 2007, Grant Likely wrote:
> > This series adds Xilinx Virtex support to arch/powerpc. Please review
> > and comment. It includes support for the uartlite and SystemACE devices
>
> Very nice set of patches, I looked at all of them but couldn't find much
> to complain about, just trivial details.
Thank you very much for the review!
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH] cpm: Describe multi-user ram in its own device node.
From: Vitaly Bordug @ 2007-09-28 20:06 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20070928190616.GB20213@loki.buserror.net>
Hello Scott,
Looks good, only one note:
On Fri, 28 Sep 2007 14:06:16 -0500
Scott Wood wrote:
> + im_dprambase = cpm2_immr->im_dprambase;
> +
> /* Attach the usable dpmem area */
> /* XXX: This is actually crap. CPM_DATAONLY_BASE and
> * CPM_DATAONLY_SIZE is only a subset of the available dpram. It
> * varies with the processor and the microcode patches activated.
> * But the following should be at least safe.
> */
> - rh_attach_region(&cpm_dpmem_info, 0, r.end - r.start + 1);
> + rh_attach_region(&cpm_dpmem_info, CPM_MAP_ADDR + CPM_DATAONLY_BASE,
> + CPM_DATAONLY_SIZE);
> }
>
Can we have something to address upper comment? I mean,any way to have dpram beginning and size encoded in the device tree? We seem to be adding new bus, and still pulling the information from the defines. Maybe I miss something
here, but it looks a bit odd.
--
Sincerely, Vitaly
^ permalink raw reply
* Re: [PATCH] cpm: Describe multi-user ram in its own device node.
From: Scott Wood @ 2007-09-28 20:10 UTC (permalink / raw)
To: Vitaly Bordug; +Cc: linuxppc-dev
In-Reply-To: <20070929000621.2d332e86@kernel.crashing.org>
Vitaly Bordug wrote:
> Hello Scott,
>
> Looks good, only one note:
>
> On Fri, 28 Sep 2007 14:06:16 -0500
> Scott Wood wrote:
>
>> + im_dprambase = cpm2_immr->im_dprambase;
>> +
>> /* Attach the usable dpmem area */
>> /* XXX: This is actually crap. CPM_DATAONLY_BASE and
>> * CPM_DATAONLY_SIZE is only a subset of the available dpram. It
>> * varies with the processor and the microcode patches activated.
>> * But the following should be at least safe.
>> */
>> - rh_attach_region(&cpm_dpmem_info, 0, r.end - r.start + 1);
>> + rh_attach_region(&cpm_dpmem_info, CPM_MAP_ADDR + CPM_DATAONLY_BASE,
>> + CPM_DATAONLY_SIZE);
>> }
>>
>
> Can we have something to address upper comment? I mean,any way to
> have dpram beginning and size encoded in the device tree? We seem to
> be adding new bus, and still pulling the information from the
> defines. Maybe I miss something here, but it looks a bit odd.
This bit is #ifndef CONFIG_PPC_CPM_NEW_BINDING (and can come out once
all arch/powerpc boards are converted and tested -- I think it's just
mpc866ads and CPM mpc85xx left to go). The new code in
arch/powerpc/sysdev/cpm_common.c does get it from the device tree.
-Scott
^ permalink raw reply
* Re: [PATCH 03/18] Virtex: add xilinx interrupt controller driver
From: Olof Johansson @ 2007-09-28 20:17 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <20070928181606.18608.30412.stgit@trillian.cg.shawcable.net>
On Fri, Sep 28, 2007 at 12:16:07PM -0600, Grant Likely wrote:
> +/*
> + * INTC Registers
> + */
> +#define ISR 0 /* Interrupt Status */
> +#define IPR 4 /* Interrupt Pending */
> +#define IER 8 /* Interrupt Enable */
> +#define IAR 12 /* Interrupt Acknowledge */
> +#define SIE 16 /* Set Interrupt Enable bits */
> +#define CIE 20 /* Clear Interrupt Enable bits */
> +#define IVR 24 /* Interrupt Vector */
> +#define MER 28 /* Master Enable */
The defines are fairly generic, I guess you haven't ran across cases
where there's naming conflicts, but you might want to prefix them with
something more unique just in case.
> +static struct irq_host *master_irqhost;
> +
> +/*
> + * IRQ Chip operations
> + */
> +static void xilinx_intc_mask(unsigned int virq)
> +{
> + int irq = irq_map[virq].hwirq;
> + void * regs = get_irq_chip_data(virq);
> + pr_debug("mask: %d\n", irq);
> + out_be32(regs + CIE, 1 << irq);
> +}
> +
> +static void xilinx_intc_unmask(unsigned int virq)
> +{
> + int irq = irq_map[virq].hwirq;
> + void * regs = get_irq_chip_data(virq);
> + pr_debug("unmask: %d\n", irq);
> + out_be32(regs + SIE, 1 << irq);
> +}
> +
> +static void xilinx_intc_ack(unsigned int virq)
> +{
> + int irq = irq_map[virq].hwirq;
> + void * regs = get_irq_chip_data(virq);
> + pr_debug("ack: %d\n", irq);
> + out_be32(regs + IAR, 1 << irq);
> +}
I guess some of the above are open-coded instead of using virq_to_hw()
for performance reasons, it could be useful to have comments regarding
this so they aren't changed by some janitor down the road. Or, in case
they're not performance-critical, change them to use virq_to_hw.
-Olof
^ permalink raw reply
* Re: [PATCH 1/2] qemu platform, v2
From: Rob Landley @ 2007-09-28 20:14 UTC (permalink / raw)
To: Segher Boessenkool
Cc: linuxppc-dev, Paul Mackerras, Christoph Hellwig, Milton Miller,
David Gibson
In-Reply-To: <4d27912d86d1373ca01d43bd296e237b@kernel.crashing.org>
On Friday 28 September 2007 11:53:28 am Segher Boessenkool wrote:
> >> I'd be following this more closely if compiling a device tree didn't
> >> currently
> >> require an external utility (dtc or some such) that doesn't come with
> >> the
> >> Linux kernel. No other target platform I've built kernels for
> >> requires such
> >> an environmental dependency.
> >
> > No? You haven't built kernels for other platforms that have external
> > dependencies such as perl, gcc, make, binutils, etc.? :)
>
> Two of the supported Linux archs cannot be built with a mainline
> compiler, even!
Strange definition of "supported"...
> And I have to install GNU sed/awk to get builds to work, too.
I extended busybox sed until it built everything I threw at it. (I even added
a "lie to autoconf" step that replies to --version to say "This is not gnu
sed 4.0" so a regex in autoconf doesn't do something stupid.)
That's how I got into busybox development in the first place...
> OTOH, it would be nice if we didn't need DTC -- it itself doesn't
> build out-of-the-box on all systems, either ;-)
I've built x86, x86-64, mips, arm, and sparc. None of them needed anything
but the seven packages I mentioned. I'm poking at adding m68k, alpha, bfin,
and powerpc, but my free time's been spoken for recently. (I'll become
interested in sh or parisc when qemu grows support for it. I'm only
interested in bfin because I was given some free blackfin hardware at OLS.)
I've even poked at running s390 under Hercules but the setup was insane enough
to throw it way the heck down on my todo list. (Step 1: download and
configure an IBM operating system image from the 1970's... Oh yeah, fills me
with enthusiasm...)
> >> (This is a problem both for hardwiring the
> >> device tree into the kernel and for building a new boot rom from the
> >> linux
> >> kernel's ppc boot wrapper that would contain such a device tree to
> >> feed to
> >> the kernel.)
> >
> > It's only really been a problem for ps3 so far, since the embedded
> > guys don't seem to have any difficulty with installing dtc. We are
> > looking at what to do for ps3 and prep, and the answer may well
> > involve bundling dtc in the kernel source (it's not too big, around
> > 3400 lines).
>
> If only a few platforms have this problem, we could instead include
> their .dtb files in the kernel source tree.
I've had it clarified that the recent qemu-ppc patches from Milton only
require dtc to build the ROM image to boot qemu with. The Linux kernel image
you build hasn't got a device tree in it (although that means it needs one
passed in from the rom image)...
Using some other patches that floated by, I did build a prep kernel a couple
of weeks ago, which qemu happily handed control off to... which then failed
to boot because it couldn't parse the incomplete residual data left over from
open hackware. The solution the ppc list recommended? Hardwire a device
tree into said linux kernel using dtc...
>
> Segher
Rob
--
"One of my most productive days was throwing away 1000 lines of code."
- Ken Thompson.
^ permalink raw reply
* Re: [PATCH 02/18] Add Kconfig macros for Xilinx Virtex support
From: Olof Johansson @ 2007-09-28 20:19 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <20070928181558.18608.23527.stgit@trillian.cg.shawcable.net>
On Fri, Sep 28, 2007 at 12:16:01PM -0600, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> ---
>
> arch/powerpc/platforms/40x/Kconfig | 30 +++++++++++++++++-------------
> 1 files changed, 17 insertions(+), 13 deletions(-)
>
> diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
> index c3dce3b..1aae0e6 100644
> --- a/arch/powerpc/platforms/40x/Kconfig
> +++ b/arch/powerpc/platforms/40x/Kconfig
> @@ -61,13 +61,14 @@ config WALNUT
> help
> This option enables support for the IBM PPC405GP evaluation board.
>
> -#config XILINX_ML300
> -# bool "Xilinx-ML300"
> -# depends on 40x
> -# default y
> -# select VIRTEX_II_PRO
> -# help
> -# This option enables support for the Xilinx ML300 evaluation board.
> +config XILINX_VIRTEX_GENERIC_BOARD
> + bool "Generic Xilinx Virtex board"
> + depends on 40x
> + default y
> + select VIRTEX_II_PRO
> + select VIRTEX_4_FX
> + help
> + This option enables generic support for Xilinx Virtex based boards.
I would appreciate a bit verboser help text here, i.e. including what
boards are considered generic. Maybe something like "...including ML403,
<x>, <y>, and other 4FX/IIPro-based boards"?
-Olof
^ permalink raw reply
* Re: [PATCH] cpm: Describe multi-user ram in its own device node.
From: Vitaly Bordug @ 2007-09-28 20:25 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <46FD5FCB.4010908@freescale.com>
Hello Scott,
On Fri, 28 Sep 2007 15:10:51 -0500
Scott Wood wrote:
> Vitaly Bordug wrote:
> > Hello Scott,
> >
> > Looks good, only one note:
> >
> > On Fri, 28 Sep 2007 14:06:16 -0500
> > Scott Wood wrote:
> >
> >> + im_dprambase = cpm2_immr->im_dprambase;
> >> +
> >> /* Attach the usable dpmem area */
> >> /* XXX: This is actually crap. CPM_DATAONLY_BASE and
> >> * CPM_DATAONLY_SIZE is only a subset of the available dpram. It
> >> * varies with the processor and the microcode patches activated.
> >> * But the following should be at least safe.
> >> */
> >> - rh_attach_region(&cpm_dpmem_info, 0, r.end - r.start + 1);
> >> + rh_attach_region(&cpm_dpmem_info, CPM_MAP_ADDR + CPM_DATAONLY_BASE,
> >> + CPM_DATAONLY_SIZE);
> >> }
> >>
> >
> > Can we have something to address upper comment? I mean,any way to
> > have dpram beginning and size encoded in the device tree? We seem to
> > be adding new bus, and still pulling the information from the
> > defines. Maybe I miss something here, but it looks a bit odd.
>
> This bit is #ifndef CONFIG_PPC_CPM_NEW_BINDING (and can come out once
> all arch/powerpc boards are converted and tested -- I think it's just
> mpc866ads and CPM mpc85xx left to go). The new code in
> arch/powerpc/sysdev/cpm_common.c does get it from the device tree.
>
ok, sorry for the noise. If so, I'll try to test-n-fix upper two soon. Unfortunately,
there are many 8xx in ppc, that may depend on cpm (need to check).
--
Sincerely, Vitaly
^ permalink raw reply
* Re: [PATCH 03/18] Virtex: add xilinx interrupt controller driver
From: Grant Likely @ 2007-09-28 20:26 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev
In-Reply-To: <20070928201719.GA23749@lixom.net>
On 9/28/07, Olof Johansson <olof@lixom.net> wrote:
> On Fri, Sep 28, 2007 at 12:16:07PM -0600, Grant Likely wrote:
>
> > +/*
> > + * INTC Registers
> > + */
> > +#define ISR 0 /* Interrupt Status */
> > +#define IPR 4 /* Interrupt Pending */
> > +#define IER 8 /* Interrupt Enable */
> > +#define IAR 12 /* Interrupt Acknowledge */
> > +#define SIE 16 /* Set Interrupt Enable bits */
> > +#define CIE 20 /* Clear Interrupt Enable bits */
> > +#define IVR 24 /* Interrupt Vector */
> > +#define MER 28 /* Master Enable */
>
> The defines are fairly generic, I guess you haven't ran across cases
> where there's naming conflicts, but you might want to prefix them with
> something more unique just in case.
Will do
>
> > +static void xilinx_intc_ack(unsigned int virq)
> > +{
> > + int irq = irq_map[virq].hwirq;
> > + void * regs = get_irq_chip_data(virq);
> > + pr_debug("ack: %d\n", irq);
> > + out_be32(regs + IAR, 1 << irq);
> > +}
>
> I guess some of the above are open-coded instead of using virq_to_hw()
> for performance reasons, it could be useful to have comments regarding
> this so they aren't changed by some janitor down the road. Or, in case
> they're not performance-critical, change them to use virq_to_hw.
Or it was just that my example code from another driver wasn't using
virq_to_hw() either. I'll fix this.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH 01/18] Virtex: Add uartlite bootwrapper driver
From: Josh Boyer @ 2007-09-28 20:26 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, Arnd Bergmann
In-Reply-To: <fa686aa40709281304p62fe5e66k99ea934a4896d876@mail.gmail.com>
On Fri, 28 Sep 2007 14:04:04 -0600
"Grant Likely" <grant.likely@secretlab.ca> wrote:
> On 9/28/07, Arnd Bergmann <arnd@arndb.de> wrote:
> > On Friday 28 September 2007, Grant Likely wrote:
> > > +static void uartlite_putc(unsigned char c)
> > > +{
> > > +while ((in_be32(reg_base + 0x8) & 0x08) != 0); /* spin */
> > > +out_be32(reg_base + 0x4, c);
> > > +}
> >
> > When coding a spin-loop, it's better to do a cpu_relax() between
> > each attempt.
>
> Is cpu_relax even implemented in the bootwrapper?
No. And it doesn't need to be :)
josh
^ permalink raw reply
* Re: [PATCH 06/18] [POWERPC] Fix UARTLITE reg io for little-endian architectures (ie. microblaze)
From: Olof Johansson @ 2007-09-28 20:31 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <20070928181704.18608.40317.stgit@trillian.cg.shawcable.net>
On Fri, Sep 28, 2007 at 12:17:13PM -0600, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> Acked-by: John Williams <jwilliams@itee.uq.edu.au>
> ---
>
> arch/ppc/syslib/virtex_devices.c | 2 +-
> drivers/serial/uartlite.c | 32 ++++++++++++++++----------------
> 2 files changed, 17 insertions(+), 17 deletions(-)
>
> diff --git a/arch/ppc/syslib/virtex_devices.c b/arch/ppc/syslib/virtex_devices.c
> index ace4ec0..270ad3a 100644
> --- a/arch/ppc/syslib/virtex_devices.c
> +++ b/arch/ppc/syslib/virtex_devices.c
> @@ -28,7 +28,7 @@
> .num_resources = 2, \
> .resource = (struct resource[]) { \
> { \
> - .start = XPAR_UARTLITE_##num##_BASEADDR + 3, \
> + .start = XPAR_UARTLITE_##num##_BASEADDR, \
> .end = XPAR_UARTLITE_##num##_HIGHADDR, \
> .flags = IORESOURCE_MEM, \
> }, \
> diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
> index f5051cf..59b674a 100644
> --- a/drivers/serial/uartlite.c
> +++ b/drivers/serial/uartlite.c
> @@ -61,7 +61,7 @@ static int ulite_receive(struct uart_port *port, int stat)
> /* stats */
> if (stat & ULITE_STATUS_RXVALID) {
> port->icount.rx++;
> - ch = readb(port->membase + ULITE_RX);
> + ch = in_be32((void*)port->membase + ULITE_RX);
Hmm, I see the start changed, and you're now reading/writing a full
32-bit word instead of individual bytes. Still, looks a little fishy to
me. Wouldn't it be more appropriate to change the ULITE_RX offset to be
3 higher and still read/write bytes?
Or are the registers defined as 32-bit ones? (I don't remember, it was
so long since I touched uartlite myself. :-)
(Same for the other functions below, but the general principle applies.)
Also, I'm not sure you need to cast port->membase to void*, do you? The
math will still be right since it's declared as char *.
-Olof
^ permalink raw reply
* Re: [PATCH] cpm: Describe multi-user ram in its own device node.
From: Vitaly Bordug @ 2007-09-28 20:30 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
In-Reply-To: <20070928190616.GB20213@loki.buserror.net>
Kumar,
Realizing this may suffer a bit from cleanest-dts flame war, but anyway I pretty much see a lot of
sense in getting this in during next merge window. Is this possible?
On Fri, 28 Sep 2007 14:06:16 -0500
Scott Wood wrote:
> The way the current CPM binding describes available multi-user (a.k.a.
> dual-ported) RAM doesn't work well when there are multiple free regions,
> and it doesn't work at all if the region doesn't begin at the start of
> the muram area (as the hardware needs to be programmed with offsets into
> this area). The latter situation can happen with SMC UARTs on CPM2, as its
> parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't
> support moving it.
>
> It is now described with a muram node, similar to QE. The current CPM
> binding is sufficiently recent (i.e. never appeared in an official release)
> that compatibility with existing device trees is not an issue.
>
> The code supporting the new binding is shared between cpm1 and cpm2, rather
> than remain separated. QE should be able to use this code as well, once
> minor fixes are made to its device trees.
>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
Acked-by: Vitaly Bordug <vitb@kernel.crashing.org>
> ---
> Documentation/powerpc/booting-without-of.txt | 40 ++++++-
> arch/powerpc/Kconfig.debug | 6 +-
> arch/powerpc/boot/cpm-serial.c | 44 +++++--
> arch/powerpc/boot/dts/ep88xc.dts | 13 ++-
> arch/powerpc/boot/dts/mpc8272ads.dts | 11 ++
> arch/powerpc/boot/dts/mpc885ads.dts | 13 ++-
> arch/powerpc/boot/dts/pq2fads.dts | 13 ++-
> arch/powerpc/sysdev/commproc.c | 11 ++-
> arch/powerpc/sysdev/cpm2_common.c | 36 ++----
> arch/powerpc/sysdev/cpm_common.c | 159 ++++++++++++++++++++++++++
> drivers/serial/cpm_uart/cpm_uart_cpm2.c | 4 +-
> include/asm-powerpc/commproc.h | 12 ++
> include/asm-powerpc/cpm.h | 14 +++
> include/asm-powerpc/cpm2.h | 10 ++
> 14 files changed, 338 insertions(+), 48 deletions(-)
--
Sincerely, Vitaly
^ permalink raw reply
* Re: [PATCH 02/18] Add Kconfig macros for Xilinx Virtex support
From: Grant Likely @ 2007-09-28 20:39 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev
In-Reply-To: <20070928201946.GB23749@lixom.net>
On 9/28/07, Olof Johansson <olof@lixom.net> wrote:
> On Fri, Sep 28, 2007 at 12:16:01PM -0600, Grant Likely wrote:
> > From: Grant Likely <grant.likely@secretlab.ca>
> >
> > Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> > ---
> >
> > arch/powerpc/platforms/40x/Kconfig | 30 +++++++++++++++++-------------
> > 1 files changed, 17 insertions(+), 13 deletions(-)
> >
> > diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
> > index c3dce3b..1aae0e6 100644
> > --- a/arch/powerpc/platforms/40x/Kconfig
> > +++ b/arch/powerpc/platforms/40x/Kconfig
> > @@ -61,13 +61,14 @@ config WALNUT
> > help
> > This option enables support for the IBM PPC405GP evaluation board.
> >
> > -#config XILINX_ML300
> > -# bool "Xilinx-ML300"
> > -# depends on 40x
> > -# default y
> > -# select VIRTEX_II_PRO
> > -# help
> > -# This option enables support for the Xilinx ML300 evaluation board.
> > +config XILINX_VIRTEX_GENERIC_BOARD
> > + bool "Generic Xilinx Virtex board"
> > + depends on 40x
> > + default y
> > + select VIRTEX_II_PRO
> > + select VIRTEX_4_FX
> > + help
> > + This option enables generic support for Xilinx Virtex based boards.
>
> I would appreciate a bit verboser help text here, i.e. including what
> boards are considered generic. Maybe something like "...including ML403,
> <x>, <y>, and other 4FX/IIPro-based boards"?
Done.
This option enables generic support for Xilinx Virtex based boards.
+ The generic virtex board support matches any device tree which
+ specifies 'xilinx,virtex' in its compatible field. This includes
+ the Xilinx ML3xx and ML4xx reference designs using the powerpc
+ core.
+
+ Most Virtex designs should use this unless it needs to do some
+ special configuration at board probe time.
+
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH 06/18] [POWERPC] Fix UARTLITE reg io for little-endian architectures (ie. microblaze)
From: Grant Likely @ 2007-09-28 20:42 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev
In-Reply-To: <20070928203104.GC23749@lixom.net>
On 9/28/07, Olof Johansson <olof@lixom.net> wrote:
> On Fri, Sep 28, 2007 at 12:17:13PM -0600, Grant Likely wrote:
> > From: Grant Likely <grant.likely@secretlab.ca>
> >
> > Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> > Acked-by: John Williams <jwilliams@itee.uq.edu.au>
> > ---
> >
> > arch/ppc/syslib/virtex_devices.c | 2 +-
> > drivers/serial/uartlite.c | 32 ++++++++++++++++----------------
> > 2 files changed, 17 insertions(+), 17 deletions(-)
> >
> > diff --git a/arch/ppc/syslib/virtex_devices.c b/arch/ppc/syslib/virtex_devices.c
> > index ace4ec0..270ad3a 100644
> > --- a/arch/ppc/syslib/virtex_devices.c
> > +++ b/arch/ppc/syslib/virtex_devices.c
> > @@ -28,7 +28,7 @@
> > .num_resources = 2, \
> > .resource = (struct resource[]) { \
> > { \
> > - .start = XPAR_UARTLITE_##num##_BASEADDR + 3, \
> > + .start = XPAR_UARTLITE_##num##_BASEADDR, \
> > .end = XPAR_UARTLITE_##num##_HIGHADDR, \
> > .flags = IORESOURCE_MEM, \
> > }, \
> > diff --git a/drivers/serial/uartlite.c b/drivers/serial/uartlite.c
> > index f5051cf..59b674a 100644
> > --- a/drivers/serial/uartlite.c
> > +++ b/drivers/serial/uartlite.c
> > @@ -61,7 +61,7 @@ static int ulite_receive(struct uart_port *port, int stat)
> > /* stats */
> > if (stat & ULITE_STATUS_RXVALID) {
> > port->icount.rx++;
> > - ch = readb(port->membase + ULITE_RX);
> > + ch = in_be32((void*)port->membase + ULITE_RX);
>
> Hmm, I see the start changed, and you're now reading/writing a full
> 32-bit word instead of individual bytes. Still, looks a little fishy to
> me. Wouldn't it be more appropriate to change the ULITE_RX offset to be
> 3 higher and still read/write bytes?
>
> Or are the registers defined as 32-bit ones? (I don't remember, it was
> so long since I touched uartlite myself. :-)
All the registers are defined as 32 bit ones. I think it makes more
sense to access the registers as they are documented, and it
eliminates the 'magic' +3 needed to make it work now.
>
> (Same for the other functions below, but the general principle applies.)
>
> Also, I'm not sure you need to cast port->membase to void*, do you? The
> math will still be right since it's declared as char *.
membase is now defined as u32*, so the cast is needed.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH 06/18] [POWERPC] Fix UARTLITE reg io for little-endian architectures (ie. microblaze)
From: Olof Johansson @ 2007-09-28 20:47 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <fa686aa40709281342h4f8ff3fdv265e8098d2da6f52@mail.gmail.com>
On Fri, Sep 28, 2007 at 02:42:32PM -0600, Grant Likely wrote:
> On 9/28/07, Olof Johansson <olof@lixom.net> wrote:
>
> > Hmm, I see the start changed, and you're now reading/writing a full
> > 32-bit word instead of individual bytes. Still, looks a little fishy to
> > me. Wouldn't it be more appropriate to change the ULITE_RX offset to be
> > 3 higher and still read/write bytes?
> >
> > Or are the registers defined as 32-bit ones? (I don't remember, it was
> > so long since I touched uartlite myself. :-)
>
> All the registers are defined as 32 bit ones. I think it makes more
> sense to access the registers as they are documented, and it
> eliminates the 'magic' +3 needed to make it work now.
Ok, thaks for the clarification. Feel free to add it as motivation in
the patch description. :)
> > (Same for the other functions below, but the general principle applies.)
> >
> > Also, I'm not sure you need to cast port->membase to void*, do you? The
> > math will still be right since it's declared as char *.
>
> membase is now defined as u32*, so the cast is needed.
Hm, I must have looked at a stale tree.
Thanks,
-Olof
^ permalink raw reply
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