* Re: Problem with OF interrupt parsing code
From: Gerhard Pircher @ 2007-10-03 7:43 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev
In-Reply-To: <1191362607.22572.26.camel@pasglop>
-------- Original-Nachricht --------
> Datum: Wed, 03 Oct 2007 08:03:27 +1000
> Von: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> An: Gerhard Pircher <gerhard_pircher@gmx.net>
> CC: linuxppc-dev@ozlabs.org
> Betreff: Re: Problem with OF interrupt parsing code
>
> On Tue, 2007-10-02 at 14:38 +0200, Gerhard Pircher wrote:
> > I know that it's ugly, but the problem is how to distinguish the
> > boards. The only real difference I know of is the PCI interrupt
> > mapping. The northbridges chip revision for example is always the
> > same, but CPU type, amount of memory and PCI devices can appear in
> > all possible combinations. The firmware doesn't tell me, which board
> > the kernel is runnning on, so I would like to rely on this fall back
> > here until I get the chance to update the firmware (which is beyond
> > my control).
>
> And how does the firmware know ? There must be a strap somewhere...
>
> Ben.
Good question. I don't know. Anyway I changed the device tree based on
your comments and now it works (at least until the kernel deadlocks
somewhere else). :(
Gerhard
--
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^ permalink raw reply
* Re: Patches added to powerpc.git for-2.6.24 branch
From: Stephen Rothwell @ 2007-10-03 8:12 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20071003171551.7184d83b.sfr@canb.auug.org.au>
[-- Attachment #1: Type: text/plain, Size: 752 bytes --]
On Wed, 3 Oct 2007 17:15:51 +1000 Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
> Would you also consider:
>
> [POWERPC] Prepare to remove of_platform_driver name
> (http://patchwork.ozlabs.org/linuxppc/patch?id=13667)
Also:
[PATCH 07/11] [POWERPC] iSeries: missing newline in printk
(http://patchwork.ozlabs.org/linuxppc/patch?id=13661)
and
[PATCH 10/11] [POWERPC] Clean up vio.h
(http://patchwork.ozlabs.org/linuxppc/patch?id=13664)
don't actually interact with the rest of the series.
I rebuilt {ppc64,pseries,iseries}_defconfig with just the above three
patches on top of the current for-2.6.24 tree to be sure.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
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^ permalink raw reply
* Re: pata_mpc52xx - no interrupts when using bestcomm/dma?
From: Matt Sealey @ 2007-10-03 11:25 UTC (permalink / raw)
To: Domen Puncer; +Cc: linuxppc-embedded
In-Reply-To: <20070827094454.GQ13994@moe.telargo.com>
Hi guys,
I'm not sure if this is a particularly PowerPC problem - more ATA -
but I am curious if we just got rid of the MWDMA and UDMA stuff from
this patch, would it still work in a sort of PIO mode with the
BestComm task being invoked at the right times?
All BestComm needs to do is marshall the data back and forth, since
the ATA portion is covered by errata and 'hidden' bugs you can't rely
on FIFO errors or the automatic handling anyway..
On that note, seeing as it seems to be easily possible to invoke
a BestComm task on something other than a FIFO (just needs two
physical address pointers), does anyone feel motivated to try and
make some kind of memory copy handler/task which can be invoked
in the case of some memory activity required? Or, perhaps, work
out the PCI DMA TX/RX stuff and what it could be used for (I
personally don't understand how PCI DMA isn't handled by the
PCI arbiter anyway.. doesn't this mean no PCI DMA is ever done on
MPC5200 platforms right now??)
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
Domen Puncer wrote:
> Hi!
>
> I'm taking a stab at adding DMA support to pata_mpc52xx driver.
>
> It's based on patches from Freescale's ltib (old ide driver).
>
>
> The problem is that I can't seem to get any interrupts
> (not ata, not bestcomm task), when setting up MWDMA/UDMA mode.
>
> Ideas?
>
>
> My current patch:
>
> ---
> drivers/ata/pata_mpc52xx.c | 491 +++++++++++++++++++++++++++++++++++++++++++--
> include/linux/libata.h | 2
> 2 files changed, 477 insertions(+), 16 deletions(-)
>
> Index: work-powerpc.git/drivers/ata/pata_mpc52xx.c
> ===================================================================
> --- work-powerpc.git.orig/drivers/ata/pata_mpc52xx.c
> +++ work-powerpc.git/drivers/ata/pata_mpc52xx.c
> @@ -4,6 +4,7 @@
> * libata driver for the Freescale MPC52xx on-chip IDE interface
> *
> * Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com>
> + * Copyright (C) 2005,2006 Freescale - Bernard Kuhn, John Rigby
> * Copyright (C) 2003 Mipsys - Benjamin Herrenschmidt
> *
> * This file is licensed under the terms of the GNU General Public License
> @@ -22,6 +23,8 @@
> #include <asm/of_platform.h>
> #include <asm/mpc52xx.h>
>
> +#include <sysdev/bestcomm/bestcomm.h>
> +#include <sysdev/bestcomm/ata.h>
>
> #define DRV_NAME "mpc52xx_ata"
> #define DRV_VERSION "0.1.0ac2"
> @@ -31,6 +34,14 @@
> struct mpc52xx_ata_timings {
> u32 pio1;
> u32 pio2;
> + u32 mdma1;
> + u32 mdma2;
> + u32 udma1;
> + u32 udma2;
> + u32 udma3;
> + u32 udma4;
> + u32 udma5;
> + int using_udma;
> };
>
> struct mpc52xx_ata_priv {
> @@ -39,6 +50,12 @@ struct mpc52xx_ata_priv {
> int ata_irq;
> struct mpc52xx_ata_timings timings[2];
> int csel;
> +
> + /* dma stuff follows */
> + struct bcom_task * dmatsk;
> + const struct udmaspec * udmaspec;
> + const struct mdmaspec * mdmaspec;
> + int mpc52xx_ata_dma_last_write;
> };
>
>
> @@ -53,6 +70,102 @@ static const int ataspec_ta[5] = { 35
>
> #define CALC_CLKCYC(c,v) ((((v)+(c)-1)/(c)))
>
> +/* ATAPI-4 MDMA specs (in clocks) */
> +struct mdmaspec {
> + u32 t0M[3];
> + u32 td[3];
> + u32 th[3];
> + u32 tj[3];
> + u32 tkw[3];
> + u32 tm[3];
> + u32 tn[3];
> +};
> +
> +// -----------------------------------------------------------------------------------------------
> +
> +static const struct mdmaspec mdmaspec66 = {
> + {32, 10, 8},
> + {15, 6, 5},
> + {2, 1, 1},
> + {2, 1, 1},
> + {15, 4, 2},
> + {4, 2, 2},
> + {1, 1, 1}
> +};
> +
> +static const struct mdmaspec mdmaspec132 = {
> + {64, 20, 16},
> + {29, 11, 10},
> + {3, 2, 2},
> + {3, 1, 1},
> + {29, 7, 4},
> + {7, 4, 4},
> + {2, 1, 1}
> +};
> +
> +
> +/* ATAPI-4 UDMA specs (in clocks) */
> +struct udmaspec {
> + u32 tcyc[6];
> + u32 t2cyc[6];
> + u32 tds[6];
> + u32 tdh[6];
> + u32 tdvs[6];
> + u32 tdvh[6];
> + u32 tfs_min[6];
> + u32 tli_max[6];
> + u32 tmli[6];
> + u32 taz[6];
> + u32 tzah[6];
> + u32 tenv_min[6];
> + u32 tsr[6];
> + u32 trfs[6];
> + u32 trp[6];
> + u32 tack[6];
> + u32 tss[6];
> +};
> +
> +static const struct udmaspec udmaspec66 = {
> + { 8, 5, 4, 3, 2, 2},
> + {16, 11, 8, 6, 4 , 2},
> + { 1, 1, 1, 1, 1, 1},
> + { 1, 1, 1, 1, 1, 1},
> + { 5, 4, 3, 2, 1, 1},
> + { 1, 1, 1, 1, 1, 1},
> + {16, 14, 12, 9, 8, 6},
> + {10, 10, 10, 7, 8, 5},
> + { 2, 2, 2, 2, 2, 2},
> + { 1, 1, 1, 1, 1, 1},
> + { 2, 2, 2, 2, 2, 2},
> + { 2, 2, 2, 2, 2, 2},
> + { 3, 2, 2, 2, 2, 2},
> + { 5, 5, 4, 4, 4, 4},
> + {11, 9, 7, 7, 7, 6},
> + { 2, 2, 2, 2, 2, 2},
> + { 4, 4, 4, 4, 4, 4}
> +};
> +
> +static const struct udmaspec udmaspec132 = {
> + {15, 10, 6, 7, 2, 3},
> + {31, 21, 12, 12, 5, 6},
> + { 2, 2, 1, 1, 0, 1},
> + { 1, 1, 1, 1, 0, 1},
> + {10, 7, 5, 3, 1, 1},
> + { 1, 1, 1, 1, 1, 1},
> + {30, 27, 23, 15, 16, 12},
> + {20, 20, 20, 13, 14, 10},
> + { 3, 3, 3, 3, 2, 3},
> + { 2, 2, 2, 2, 1, 2},
> + { 3, 3, 3, 3, 2, 3},
> + { 3, 3, 3, 3, 2, 3},
> + { 7, 4, 3, 3, 2, 3},
> + {10, 10, 8, 8, 7, 7},
> + {22, 17, 14, 14, 13, 12},
> + { 3, 3, 3, 3, 2, 3},
> + { 7, 7, 7, 7, 6, 7},
> +};
> +
> +// -----------------------------------------------------------------------------------------------
>
> /* Bit definitions inside the registers */
> #define MPC52xx_ATA_HOSTCONF_SMR 0x80000000UL /* State machine reset */
> @@ -76,6 +189,10 @@ static const int ataspec_ta[5] = { 35
> #define MPC52xx_ATA_DMAMODE_HUT 0x40 /* Host UDMA burst terminate */
>
>
> +#define MAX_DMA_BUFFERS 128
> +#define MAX_DMA_BUFFER_SIZE 0x20000u
> +
> +
> /* Structure of the hardware registers */
> struct mpc52xx_ata {
>
> @@ -141,6 +258,19 @@ struct mpc52xx_ata {
>
> /* MPC52xx low level hw control */
>
> +static inline void
> +mpc52xx_ata_wait_tip_bit_clear(struct mpc52xx_ata __iomem *regs)
> +{
> + int timeout = 1000;
> +
> + while (in_be32(®s->host_status) & MPC52xx_ATA_HOSTSTAT_TIP)
> + if (timeout-- == 0) {
> + printk(KERN_ERR "mpc52xx-ide: Timeout waiting for TIP clear\n");
> + break;
> + }
> + udelay(10); /* FIXME: Necessary ??? */
> +}
> +
> static int
> mpc52xx_ata_compute_pio_timings(struct mpc52xx_ata_priv *priv, int dev, int pio)
> {
> @@ -165,6 +295,96 @@ mpc52xx_ata_compute_pio_timings(struct m
> return 0;
> }
>
> +static int
> +mpc52xx_ata_compute_mdma_timings(struct mpc52xx_ata_priv *priv, int dev, int speed)
> +{
> + struct mpc52xx_ata_timings *timing = &priv->timings[dev];
> + u32 t0M, td, tkw, tm, th, tj, tn;
> +
> + if (speed < 0 || speed > 2)
> + return -EINVAL;
> +
> + t0M = priv->mdmaspec->t0M[speed];
> + td = priv->mdmaspec->td[speed];
> + tkw = priv->mdmaspec->tkw[speed];
> + tm = priv->mdmaspec->tm[speed];
> + th = priv->mdmaspec->th[speed];
> + tj = priv->mdmaspec->tj[speed];
> + tn = priv->mdmaspec->tn[speed];
> +
> + /*
> + DPRINTK ("t0M = %d\n", t0M);
> + DPRINTK ("td = %d\n", td);
> + DPRINTK ("tkw = %d\n", tkw);
> + DPRINTK ("tm = %d\n", tm);
> + DPRINTK ("th = %d\n", th);
> + DPRINTK ("tj = %d\n", tj);
> + DPRINTK ("tn = %d\n", tn);
> + */
> + timing->mdma1 = (t0M << 24) | (td << 16) | (tkw << 8) | (tm);
> + timing->mdma2 = (th << 24) | (tj << 16) | (tn << 8);
> +
> + timing->using_udma = 0;
> +
> + return 0;
> +}
> +
> +static int
> +mpc52xx_ata_compute_udma_timings(struct mpc52xx_ata_priv *priv, int dev, int speed)
> +{
> + struct mpc52xx_ata_timings *timing = &priv->timings[dev];
> + u32 t2cyc, tcyc, tds, tdh, tdvs, tdvh, tfs, tli, tmli, taz, tenv, tsr, tss, trfs, trp, tack, tzah;
> +
> + if (speed < 0 || speed > 2)
> + return -EINVAL;
> +
> + t2cyc = priv->udmaspec->t2cyc[speed];
> + tcyc = priv->udmaspec->tcyc[speed];
> + tds = priv->udmaspec->tds[speed];
> + tdh = priv->udmaspec->tdh[speed];
> + tdvs = priv->udmaspec->tdvs[speed];
> + tdvh = priv->udmaspec->tdvh[speed];
> + tfs = priv->udmaspec->tfs_min[speed];
> + tmli = priv->udmaspec->tmli[speed];
> + tenv = priv->udmaspec->tenv_min[speed];
> + tss = priv->udmaspec->tss[speed];
> + trp = priv->udmaspec->trp[speed];
> + tack = priv->udmaspec->tack[speed];
> + tzah = priv->udmaspec->tzah[speed];
> + taz = priv->udmaspec->taz[speed];
> + trfs = priv->udmaspec->trfs[speed];
> + tsr = priv->udmaspec->tsr[speed];
> + tli = priv->udmaspec->tli_max[speed];
> +/*
> + DPRINTK ("UDMA t2cyc = %d\n", t2cyc);
> + DPRINTK ("UDMA tcyc = %d\n", tcyc);
> + DPRINTK ("UDMA tds = %d\n", tds);
> + DPRINTK ("UDMA tdh = %d\n", tdh);
> + DPRINTK ("UDMA tdvs = %d\n", tdvs);
> + DPRINTK ("UDMA tdvh = %d\n", tdvh);
> + DPRINTK ("UDMA tfs = %d\n", tfs);
> + DPRINTK ("UDMA tli = %d\n", tli);
> + DPRINTK ("UDMA tmli = %d\n", tmli);
> + DPRINTK ("UDMA taz = %d\n", taz);
> + DPRINTK ("UDMA tenv = %d\n", tenv);
> + DPRINTK ("UDMA tsr = %d\n", tsr);
> + DPRINTK ("UDMA tss = %d\n", tss);
> + DPRINTK ("UDMA trfs = %d\n", trfs);
> + DPRINTK ("UDMA trp = %d\n", trp);
> + DPRINTK ("UDMA tack = %d\n", tack);
> + DPRINTK ("UDMA tzah = %d\n", tzah);
> +*/
> + timing->udma1 = (t2cyc << 24) | (tcyc << 16) | (tds << 8) | (tdh);
> + timing->udma2 = (tdvs << 24) | (tdvh << 16) | (tfs << 8) | (tli);
> + timing->udma3 = (tmli << 24) | (taz << 16) | (tenv << 8) | (tsr);
> + timing->udma4 = (tss << 24) | (trfs << 16) | (trp << 8) | (tack);
> + timing->udma5 = (tzah << 24);
> +
> + timing->using_udma = 1;
> +
> + return 0;
> +}
> +
> static void
> mpc52xx_ata_apply_timings(struct mpc52xx_ata_priv *priv, int device)
> {
> @@ -173,13 +393,13 @@ mpc52xx_ata_apply_timings(struct mpc52xx
>
> out_be32(®s->pio1, timing->pio1);
> out_be32(®s->pio2, timing->pio2);
> - out_be32(®s->mdma1, 0);
> - out_be32(®s->mdma2, 0);
> - out_be32(®s->udma1, 0);
> - out_be32(®s->udma2, 0);
> - out_be32(®s->udma3, 0);
> - out_be32(®s->udma4, 0);
> - out_be32(®s->udma5, 0);
> + out_be32(®s->mdma1, timing->mdma1);
> + out_be32(®s->mdma2, timing->mdma2);
> + out_be32(®s->udma1, timing->udma1);
> + out_be32(®s->udma2, timing->udma2);
> + out_be32(®s->udma3, timing->udma3);
> + out_be32(®s->udma4, timing->udma4);
> + out_be32(®s->udma5, timing->udma5);
>
> priv->csel = device;
> }
> @@ -234,6 +454,7 @@ mpc52xx_ata_set_piomode(struct ata_port
>
> pio = adev->pio_mode - XFER_PIO_0;
>
> + // FIXME, can be called for dma mode?
> rv = mpc52xx_ata_compute_pio_timings(priv, adev->devno, pio);
>
> if (rv) {
> @@ -245,6 +466,28 @@ mpc52xx_ata_set_piomode(struct ata_port
> mpc52xx_ata_apply_timings(priv, adev->devno);
> }
> static void
> +mpc52xx_ata_set_dmamode(struct ata_port *ap, struct ata_device *adev)
> +{
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> + int rv;
> +
> + if (adev->dma_mode >= XFER_UDMA_0) {
> + int dma = adev->dma_mode - XFER_UDMA_0;
> + rv = mpc52xx_ata_compute_udma_timings(priv, adev->devno, dma);
> + } else {
> + int dma = adev->dma_mode - XFER_MW_DMA_0;
> + rv = mpc52xx_ata_compute_mdma_timings(priv, adev->devno, dma);
> + }
> +
> + if (rv) {
> + printk(KERN_ERR DRV_NAME
> + ": Trying to select invalid DMA mode %d\n", adev->dma_mode);
> + return;
> + }
> +
> + mpc52xx_ata_apply_timings(priv, adev->devno);
> +}
> +static void
> mpc52xx_ata_dev_select(struct ata_port *ap, unsigned int device)
> {
> struct mpc52xx_ata_priv *priv = ap->host->private_data;
> @@ -258,10 +501,174 @@ mpc52xx_ata_dev_select(struct ata_port *
> static void
> mpc52xx_ata_error_handler(struct ata_port *ap)
> {
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> + struct mpc52xx_ata __iomem *regs = priv->ata_regs;
> +
> + printk(KERN_ALERT "%s: status: %08x; fifo_status_frame: %08x; fifo_status: %08x\n",
> + __func__, in_be32(®s->host_status),
> + in_be32(®s->fifo_status_frame),
> + in_be32(®s->fifo_status));
> +
> ata_bmdma_drive_eh(ap, ata_std_prereset, ata_std_softreset, NULL,
> ata_std_postreset);
> }
>
> +static void
> +mpc52xx_ata_exec_command(struct ata_port *ap, const struct ata_taskfile *tf)
> +{
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> +
> + mpc52xx_ata_wait_tip_bit_clear(priv->ata_regs);
> +
> + ata_exec_command(ap, tf);
> +}
> +
> +static int
> +mpc52xx_ata_build_dmatable(struct ata_queued_cmd *qc)
> +{
> + struct ata_port *ap = qc->ap;
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> + struct mpc52xx_ata __iomem *regs = priv->ata_regs;
> + struct scatterlist *sg;
> + unsigned int read = !(qc->tf.flags & ATA_TFLAG_WRITE);
> + int count = 0;
> +
> + if (read)
> + bcom_ata_rx_prepare(priv->dmatsk);
> + else
> + bcom_ata_tx_prepare(priv->dmatsk);
> +
> +
> + ata_for_each_sg(sg, qc) {
> + u32 cur_addr = sg_dma_address(sg);
> + u32 cur_len = sg_dma_len(sg);
> +
> + while (cur_len) {
> + unsigned int tc = min(cur_len, MAX_DMA_BUFFER_SIZE);
> + struct bcom_ata_bd *bd;
> +
> + bd = (struct bcom_ata_bd *)
> + bcom_prepare_next_buffer(priv->dmatsk);
> +
> + if (read) {
> + bd->status = tc;
> + bd->dst_pa = cur_addr;
> + bd->src_pa = (__force u32)®s->fifo_data; // virt_to_phys?
> + } else {
> + bd->status = tc;
> + bd->dst_pa = (__force u32)®s->fifo_data; // virt_to_phys?
> + bd->src_pa = cur_addr;
> +
> + /* and how does bestcomm know to increase one, and not other?
> + * XXX TODO */
> + }
> +
> + bcom_submit_next_buffer(priv->dmatsk, phys_to_virt(cur_addr)); // qc is just a cookie
> +
> + cur_addr += tc;
> + cur_len -= tc;
> + count++;
> +
> + if (count == MAX_DMA_BUFFERS) {
> + printk(KERN_ALERT "%s: %i dma table too small\n",
> + __func__, __LINE__);
> + goto use_pio_instead;
> + }
> + }
> + }
> + return 1;
> +
> + use_pio_instead:
> + bcom_ata_reset_bd(priv->dmatsk);
> + //pci_unmap_sg ???
> +
> + return 0;
> +}
> +
> +static void
> +mpc52xx_bmdma_setup(struct ata_queued_cmd *qc)
> +{
> + struct ata_port *ap = qc->ap;
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> + struct mpc52xx_ata __iomem *regs = priv->ata_regs;
> + unsigned int read = !(qc->tf.flags & ATA_TFLAG_WRITE);
> + u8 dma_mode;
> +printk(KERN_ALERT "%s: %i\n", __func__, __LINE__);
> +
> + if (!mpc52xx_ata_build_dmatable(qc)) {
> + //ide_map_sg(drive, rq);
> + printk(KERN_ALERT "%s: %i, return 1?\n", __func__, __LINE__);
> + }
> +
> + if (read) {
> + dma_mode = MPC52xx_ATA_DMAMODE_IE | MPC52xx_ATA_DMAMODE_READ |
> + MPC52xx_ATA_DMAMODE_FE;
> +
> + /* Setup FIFO if direction changed */
> + if (priv->mpc52xx_ata_dma_last_write) {
> + priv->mpc52xx_ata_dma_last_write = 0;
> + mpc52xx_ata_wait_tip_bit_clear(regs);
> + out_8(®s->dma_mode, MPC52xx_ATA_DMAMODE_FR);
> + /* Configure it with granularity to 7 like sample code */
> + out_8(®s->fifo_control, 7);
> + out_be16(®s->fifo_alarm, 128);
> + }
> + } else {
> + dma_mode = MPC52xx_ATA_DMAMODE_IE | MPC52xx_ATA_DMAMODE_WRITE;
> +
> + /* Setup FIFO if direction changed */
> + if (!priv->mpc52xx_ata_dma_last_write) {
> + priv->mpc52xx_ata_dma_last_write = 1;
> + mpc52xx_ata_wait_tip_bit_clear(regs);
> + /* Configure FIFO with granularity to 4 like sample code */
> + out_8(®s->fifo_control, 4);
> + //out_be16(®s->fifo_alarm, 256);
> + out_be16(®s->fifo_alarm, 128);
> + }
> + }
> +
> + if (priv->timings[qc->dev->devno].using_udma)
> + dma_mode |= MPC52xx_ATA_DMAMODE_UDMA;
> +
> + mpc52xx_ata_wait_tip_bit_clear(regs);
> + out_8(®s->dma_mode, dma_mode);
> +
> + ap->ops->exec_command(ap, &qc->tf); // added, ata_bmdma_setup has it
> +}
> +
> +static void
> +mpc52xx_bmdma_start(struct ata_queued_cmd *qc)
> +{
> + struct ata_port *ap = qc->ap;
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> +printk(KERN_ALERT "%s: %i\n", __func__, __LINE__);
> +
> + //xlb_clear(); // WTF
> + bcom_enable(priv->dmatsk);
> +}
> +
> +static void
> +mpc52xx_bmdma_stop(struct ata_queued_cmd *qc)
> +{
> + // uh? looks like destructor for setup not start
> + struct ata_port *ap = qc->ap;
> + struct mpc52xx_ata_priv *priv = ap->host->private_data;
> +printk(KERN_ALERT "%s: %i\n", __func__, __LINE__);
> +
> + bcom_disable(priv->dmatsk);
> + //bcom_clear_irq(priv->dmatsk); //!!
> + bcom_ata_reset_bd(priv->dmatsk);
> +
> + // mpc52xx_ata_destroy_dmatable();
> +}
> +// waiting_for_dma eliminated
> +
> +static u8
> +mpc52xx_bmdma_status(struct ata_port *ap)
> +{
> +printk(KERN_ALERT "%s: %i TODO\n", __func__, __LINE__);
> + return 0;
> +}
>
>
> static struct scsi_host_template mpc52xx_ata_sht = {
> @@ -282,25 +689,47 @@ static struct scsi_host_template mpc52xx
> .bios_param = ata_std_bios_param,
> };
>
> +static void mpc52xx_ata_bmdma_freeze(struct ata_port *ap)
> +{
> + printk(KERN_ALERT "%s: %i\n", __func__, __LINE__);
> + ata_bmdma_freeze(ap);
> +}
> +static void mpc52xx_ata_bmdma_thaw(struct ata_port *ap)
> +{
> + printk(KERN_ALERT "%s: %i\n", __func__, __LINE__);
> + ata_bmdma_thaw(ap);
> +}
> +static void ata_dummy_noret(struct ata_port *ap)
> +{
> +printk(KERN_ALERT "%s: %i\n", __func__, __LINE__);
> +}
> static struct ata_port_operations mpc52xx_ata_port_ops = {
> .port_disable = ata_port_disable,
> .set_piomode = mpc52xx_ata_set_piomode,
> + .set_dmamode = mpc52xx_ata_set_dmamode,
> .dev_select = mpc52xx_ata_dev_select,
> .tf_load = ata_tf_load,
> .tf_read = ata_tf_read,
> .check_status = ata_check_status,
> - .exec_command = ata_exec_command,
> - .freeze = ata_bmdma_freeze,
> - .thaw = ata_bmdma_thaw,
> + .exec_command = mpc52xx_ata_exec_command,
> + .freeze = mpc52xx_ata_bmdma_freeze,
> + .thaw = mpc52xx_ata_bmdma_thaw,
> .error_handler = mpc52xx_ata_error_handler,
> .cable_detect = ata_cable_40wire,
> .qc_prep = ata_qc_prep,
> .qc_issue = ata_qc_issue_prot,
> .data_xfer = ata_data_xfer,
> - .irq_clear = ata_bmdma_irq_clear,
> +// .irq_clear = ata_bmdma_irq_clear,
> + .irq_clear = ata_dummy_noret,
> .irq_on = ata_irq_on,
> .irq_ack = ata_irq_ack,
> .port_start = ata_port_start,
> + .bmdma_setup = mpc52xx_bmdma_setup,
> + .bmdma_start = mpc52xx_bmdma_start,
> + .bmdma_stop = mpc52xx_bmdma_stop,
> + .bmdma_status = mpc52xx_bmdma_status,
> +
> +// not ide_dma_check int (*check_atapi_dma) (struct ata_queued_cmd *qc);
> };
>
> static int __devinit
> @@ -309,7 +738,6 @@ mpc52xx_ata_init_one(struct device *dev,
> struct ata_host *host;
> struct ata_port *ap;
> struct ata_ioports *aio;
> - int rc;
>
> host = ata_host_alloc(dev, 1);
> if (!host)
> @@ -317,9 +745,9 @@ mpc52xx_ata_init_one(struct device *dev,
>
> ap = host->ports[0];
> ap->flags |= ATA_FLAG_SLAVE_POSS;
> - ap->pio_mask = 0x1f; /* Up to PIO4 */
> - ap->mwdma_mask = 0x00; /* No MWDMA */
> - ap->udma_mask = 0x00; /* No UDMA */
> + ap->pio_mask = ATA_PIO4; /* Up to PIO4 */
> + ap->mwdma_mask = 0x07; /* Up to MWDMA2 */
> + ap->udma_mask = ATA_UDMA2; /* Up to UDMA2 */
> ap->ops = &mpc52xx_ata_port_ops;
> host->private_data = priv;
>
> @@ -359,6 +787,15 @@ mpc52xx_ata_remove_one(struct device *de
> /* OF Platform driver */
> /* ======================================================================== */
>
> +static irqreturn_t
> +mpc52xx_ata_task_irq(int irq, void *vpriv)
> +{
> + struct mpc52xx_ata_priv *priv = vpriv;
> +printk(KERN_ALERT "%s: %i\n", __func__, __LINE__);
> +
> + return IRQ_HANDLED;
> +}
> +
> static int __devinit
> mpc52xx_ata_probe(struct of_device *op, const struct of_device_id *match)
> {
> @@ -426,6 +863,30 @@ mpc52xx_ata_probe(struct of_device *op,
> priv->ata_irq = ata_irq;
> priv->csel = -1;
>
> + if (ipb_freq/1000000 == 66) {
> + priv->mdmaspec = &mdmaspec66;
> + priv->udmaspec = &udmaspec66;
> + } else {
> + priv->mdmaspec = &mdmaspec132;
> + priv->udmaspec = &udmaspec132;
> + }
> +
> + priv->dmatsk = bcom_ata_init(MAX_DMA_BUFFERS, MAX_DMA_BUFFER_SIZE);
> + if (!priv->dmatsk) {
> + printk(KERN_ALERT "%s: %i\n", __func__, __LINE__);
> + rv = -ENOMEM;
> + goto err;
> + }
> + // XXX task irq? nope, it doesn't get any irq's
> + {
> + int ret;
> + int task_irq = bcom_get_task_irq(priv->dmatsk);
> + printk(KERN_ALERT "%s: ata task irq: %i\n", __func__, task_irq);
> + ret = request_irq(task_irq, &mpc52xx_ata_task_irq, IRQF_DISABLED, "ata task", priv);
> + if (ret)
> + printk(KERN_ALERT "%s: request_irq failed with: %i\n", __func__, ret);
> + }
> +
> /* Init the hw */
> rv = mpc52xx_ata_hw_init(priv);
> if (rv) {
> Index: work-powerpc.git/include/linux/libata.h
> ===================================================================
> --- work-powerpc.git.orig/include/linux/libata.h
> +++ work-powerpc.git/include/linux/libata.h
> @@ -51,7 +51,7 @@
> * compile-time options: to be removed as soon as all the drivers are
> * converted to the new debugging mechanism
> */
> -#undef ATA_DEBUG /* debugging output */
> +#define ATA_DEBUG /* debugging output */
> #undef ATA_VERBOSE_DEBUG /* yet more debugging output */
> #undef ATA_IRQ_TRAP /* define to ack screaming irqs */
> #undef ATA_NDEBUG /* define to disable quick runtime checks */
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
^ permalink raw reply
* Re: [PATCH v3] qe: miscellaneous code improvements and fixes to the QE library
From: Anton Vorontsov @ 2007-10-03 13:30 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <11903212461510-git-send-email-timur@freescale.com>
Hi Timur,
On Thu, Sep 20, 2007 at 03:47:26PM -0500, Timur Tabi wrote:
> This patch makes numerous miscellaneous code improvements to the QE library.
...and also breaks MPC8568E-MDS. ;-) Board hangs just after ip-config stuff.
Commit 589ffa1c520355e37d5868 in galak/powerpc.git.
Unfortunately it isn't split, thus it will take time to track faulty bit.
But so far... maybe you have any ideas?
...
serial8250.0: ttyS1 at MMIO 0xe0004600 (irq = 42) is a 16550A
RAMDISK driver initialized: 16 RAM disks of 32768K size 1024 blocksize
loop: module loaded
Gianfar MII Bus: probed
eth0: Gianfar Ethernet Controller Version 1.2, 00:e0:0c:00:00:fd
eth0: Running with NAPI enabled
eth0: 256/256 RX/TX BD ring size
eth1: Gianfar Ethernet Controller Version 1.2, 00:e0:0c:00:01:fd
eth1: Running with NAPI enabled
eth1: 256/256 RX/TX BD ring size
UCC Ethernet Controller MII Bus: probed
ucc_geth: QE UCC Gigabit Ethernet Controller
ucc_geth: UCC1 at 0xe0082000 (irq = 32)
ucc_geth: UCC2 at 0xe0083000 (irq = 33)
PCI: Enabling device 0001:02:00.0 (0000 -> 0003)
sky2 0001:02:00.0: v1.18 addr 0xa0000000 irq 18 Yukon-EC (0xb6) rev 1
sky2 eth4: addr 00:00:5a:71:75:fe
Marvell 88E1101: Registered new driver
Marvell 88E1112: Registered new driver
Marvell 88E1111: Registered new driver
Marvell 88E1145: Registered new driver
netconsole: not configured, aborting
i2c /dev entries driver
rtc-ds1374 0-0068: rtc core: registered rtc-ds1374 as rtc0
TCP cubic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
rtc-ds1374 0-0068: setting the system clock to 2007-01-02 22:23:42 (1167776622)
sky2 eth4: enabling interface
Sending DHCP requests .<6>PHY: e0024520:02 - Link is Up - 100/Full
PHY: e0024520:03 - Link is Up - 100/Full
PHY: e0024520:01 - Link is Up - 100/Full
., OK
IP-Config: Got DHCP answer from 10.0.0.2, my address is 10.0.0.99
Thanks,
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: Patches added to powerpc.git for-2.6.24 branch
From: Kumar Gala @ 2007-10-03 13:41 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <18179.13902.936820.573996@cargo.ozlabs.ibm.com>
> Jochen Friedrich (4):
> [POWERPC] Fix copy'n'paste typo in commproc.c
> [PPC] Fix cpm_dpram_addr returning phys mem instead of virt mem
> [PPC] Compile fix for 8xx CPM Ehernet driver
> [POWERPC] Fix cpm_uart driver
>
Some of these should already be Linus's tree (all but the 8xx CPM
Ehernet)
- k
^ permalink raw reply
* Re: Please pull from 'for-2.6.24' branch of 4xx tree
From: Josh Boyer @ 2007-10-03 13:42 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
In-Reply-To: <20071002075420.0182bb7c@weaponx.rchland.ibm.com>
On Tue, 2 Oct 2007 07:54:20 -0500
Josh Boyer <jwboyer@linux.vnet.ibm.com> wrote:
> Hi Paul,
>
> Please pull from
>
> master.kernel.org:/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx.git for-2.6.24
>
> to pick up a handful of new items for 2.6.24. Initial Virtex support
> from Grant, some cpu setup functions for 4xx from Valentine, a compile
> fix for the Walnut wrapper, and a small number of arch/ppc fixes for
> Xilinx boards.
I've rebased my branch on top of your latest tree and added the
following two additional commits:
Grant Likely (2):
[POWERPC] Uartlite: Add macros for register names
[POWERPC] Uartlite: Revert register io access changes
Please pull
thx,
josh
^ permalink raw reply
* [PATCH] mtd: remove unnecessary memset from physmap_of driver
From: Valentine Barshak @ 2007-10-03 14:05 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linux-mtd
In-Reply-To: <18178.55231.813138.369480@cargo.ozlabs.ibm.com>
No need for memset to zero memory here, since we use kzalloc.
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
---
drivers/mtd/maps/physmap_of.c | 1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.c
index cf75a56..aeed9ea 100644
--- a/drivers/mtd/maps/physmap_of.c
+++ b/drivers/mtd/maps/physmap_of.c
@@ -232,7 +232,6 @@ static int __devinit of_flash_probe(struct of_device *dev,
info = kzalloc(sizeof(*info), GFP_KERNEL);
if (!info)
goto err_out;
- memset(info, 0, sizeof(*info));
dev_set_drvdata(&dev->dev, info);
--
1.5.2.4
^ permalink raw reply related
* Re: [PATCH v3] qe: miscellaneous code improvements and fixes to the QE library
From: Timur Tabi @ 2007-10-03 14:16 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev
In-Reply-To: <20071003133032.GA2417@localhost.localdomain>
Anton Vorontsov wrote:
> Hi Timur,
>
> On Thu, Sep 20, 2007 at 03:47:26PM -0500, Timur Tabi wrote:
>> This patch makes numerous miscellaneous code improvements to the QE library.
>
> ...and also breaks MPC8568E-MDS. ;-) Board hangs just after ip-config stuff.
>
> Commit 589ffa1c520355e37d5868 in galak/powerpc.git.
>
> Unfortunately it isn't split, thus it will take time to track faulty bit.
> But so far... maybe you have any ideas?
No. The changes are supposed to be completely transparent. I did have to
modify the ucc_geth driver because of a change in some QE library functions,
but I tested it on 8360 and it works there.
It could be something peripheral, like a general breakdown of the QE itself on
85xx.
--
Timur Tabi
Linux Kernel Developer @ Freescale
^ permalink raw reply
* Re: [PATCH] Use 1TB segments
From: Will Schmidt @ 2007-10-03 14:22 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, Jon Tollefson
In-Reply-To: <18179.2249.445607.10676@cargo.ozlabs.ibm.com>
On Wed, 2007-10-03 at 13:13 +1000, Paul Mackerras wrote:
> Will Schmidt writes:
>
> > I still need to test this code for performance issues, and this version
> > could still use some cosmetic touchups, so I dont think we want this to
> > go into a tree yet. I am reposting this primarily to indicate the prior
> > version isnt quite right, and so Jon can rebase to this version. :-)
>
> The way we scan the ibm,processor-segment-sizes property could be
> nicer. Where there any other cosmetic touchups you were thinking of,
> and if so what were they? I didn't notice any leftover debugging
> printks or anything else that obviously needed cleaning up.
Correct.. nothing in the patch really *needs* to be cleaned up. This
is mostly me being way more nit-picky than I need to be. :-) I don't
have any real issues with the patch (being candidate for) going into a
tree.
The only obvious is the MMU_SEGSIZE_* #define's in mmu-hash64.h appear
to be duplicated.
The rest I can follow up on later, none of it affects the code outside
of #ifdef DEBUG's and it should be a separate patch anyway.
Thanks,
-Will
> Paul.
^ permalink raw reply
* Re: [PATCH v3] qe: miscellaneous code improvements and fixes to the QE library
From: Anton Vorontsov @ 2007-10-03 14:34 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <4703A453.8080305@freescale.com>
On Wed, Oct 03, 2007 at 09:16:51AM -0500, Timur Tabi wrote:
> Anton Vorontsov wrote:
>> Hi Timur,
>> On Thu, Sep 20, 2007 at 03:47:26PM -0500, Timur Tabi wrote:
>>> This patch makes numerous miscellaneous code improvements to the QE
>>> library.
>> ...and also breaks MPC8568E-MDS. ;-) Board hangs just after ip-config
>> stuff.
>> Commit 589ffa1c520355e37d5868 in galak/powerpc.git.
>> Unfortunately it isn't split, thus it will take time to track faulty bit.
>> But so far... maybe you have any ideas?
>
> No. The changes are supposed to be completely transparent. I did have to
> modify the ucc_geth driver because of a change in some QE library
> functions, but I tested it on 8360 and it works there.
I see.
> It could be something peripheral, like a general breakdown of the QE itself
> on 85xx.
Doubtfully, if changes are completely transparent. Because everything works
here without that cleanup.
Ok, thanks anyway, will look further as time will permit.
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH 2 6/7] Uartlite: Add of-platform-bus binding
From: Grant Likely @ 2007-10-03 14:39 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev
In-Reply-To: <1191385456.22572.45.camel@pasglop>
On 10/2/07, Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> On Tue, 2007-10-02 at 22:18 -0600, Grant Likely wrote:
>
> > For many drivers, I think that is already the case. USB OHCI is a
> > prime example where there are both PCI and platform_bus bindings among
> > others. It seems to me that the bus binding effectively translates
> > down to "where do I go to get the needed information". I think it
> > results in less of a maintenance burden to explicitly separate bus
> > binding from device setup as opposed to adding constructor code.
>
> I think nobody consider the mess that is USB in that are to be something
> we want to reproduce.
Heh, true, but the structure of multiple bus bindings is probably not
something we can get away from.
>
> > > The important thing however, with the constructor approach is to try as
> > > much as possible to keep the proper tree structure, and thus, try to
> > > find a way to instanciate the devices with proper parent/child
> > > relationship so that ordering for things like suspend/resume operations
> > > is maintained.
> >
> > I'm not sure I follow. Example?
>
> Well, make sure that if 2 platform devices repreesnt respectively a bus
> and a device on that bus, they properly get instanciated as parent &
> child in sysfs as well.
Right, okay. Looking at platform_device_add(), the default parent is
platform_bus, but it can be overridden. of_platform_bus devices get
the hierarchy of the device tree by default. So in the platform bus
case, the constructor would need to explicitly set the parent device?
Correct?
Also, how do you see the constructor code getting executed? Called
explicitly from the platform code, or some form of auto binding? I
look at fsl_soc.c and I shudder as each constructor does a pass of the
whole tree looking for compatible nodes.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH v3] qe: miscellaneous code improvements and fixes to the QE library
From: Timur Tabi @ 2007-10-03 14:39 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev
In-Reply-To: <20071003143417.GA5123@localhost.localdomain>
Anton Vorontsov wrote:
> Doubtfully, if changes are completely transparent. Because everything works
> here without that cleanup.
>
> Ok, thanks anyway, will look further as time will permit.
I did have one idea - the programming of the GUEMR register in ucc_fast_init()
could be wrong. Can do a before/after comparison of the contents of that
register?
--
Timur Tabi
Linux Kernel Developer @ Freescale
^ permalink raw reply
* Re: [PATCH v3] qe: miscellaneous code improvements and fixes to the QE library
From: Kumar Gala @ 2007-10-03 14:43 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <4703A9B4.6010507@freescale.com>
On Oct 3, 2007, at 9:39 AM, Timur Tabi wrote:
> Anton Vorontsov wrote:
>
>> Doubtfully, if changes are completely transparent. Because
>> everything works
>> here without that cleanup.
>>
>> Ok, thanks anyway, will look further as time will permit.
>
> I did have one idea - the programming of the GUEMR register in
> ucc_fast_init()
> could be wrong. Can do a before/after comparison of the contents
> of that
> register?
I'm dropping this patch from my tree till you guys figure this out.
- k
^ permalink raw reply
* Re: [PATCH v3] qe: miscellaneous code improvements and fixes to the QE library
From: Timur Tabi @ 2007-10-03 15:01 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev
In-Reply-To: <20071003143417.GA5123@localhost.localdomain>
Anton Vorontsov wrote:
> Ok, thanks anyway, will look further as time will permit.
I think I found it. Of course, if I'm right, then that doesn't explain how
the 8360 works.
In struct ucc_geth, add this:
struct ucc_geth {
struct ucc_fast uccf;
+ u8 res9[0x100 - sizeof(struct ucc_fast)];
u32 maccfg1; /* mac configuration reg. 1 */
u32 maccfg2; /* mac configuration reg. 2 */
--
Timur Tabi
Linux Kernel Developer @ Freescale
^ permalink raw reply
* [PATCH] [POWERPC] Fixup MPC8568 dts
From: Kumar Gala @ 2007-10-03 15:19 UTC (permalink / raw)
To: linuxppc-dev
The PCI nodes on the MPC8568 dts didn't get moved up to be sibilings of the
SOC node when we did that clean up for some reason. Fix that up and some
minor whitespace and adjusting the size of the soc reg property.
---
arch/powerpc/boot/dts/mpc8568mds.dts | 125 +++++++++++++++++++---------------
1 files changed, 70 insertions(+), 55 deletions(-)
in my git tree, just posted here so everyone can see it.
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 6923e42..6ac134a 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -52,7 +52,7 @@
#size-cells = <1>;
device_type = "soc";
ranges = <0 e0000000 00100000>;
- reg = <e0000000 00100000>;
+ reg = <e0000000 00001000>;
bus-frequency = <0>;
memory-controller@2000 {
@@ -183,60 +183,6 @@
fsl,has-rstcr;
};
- pci@8000 {
- interrupt-map-mask = <f800 0 0 7>;
- interrupt-map = <
- /* IDSEL 0x12 AD18 */
- 9000 0 0 1 &mpic 5 1
- 9000 0 0 2 &mpic 6 1
- 9000 0 0 3 &mpic 7 1
- 9000 0 0 4 &mpic 4 1
-
- /* IDSEL 0x13 AD19 */
- 9800 0 0 1 &mpic 6 1
- 9800 0 0 2 &mpic 7 1
- 9800 0 0 3 &mpic 4 1
- 9800 0 0 4 &mpic 5 1>;
-
- interrupt-parent = <&mpic>;
- interrupts = <18 2>;
- bus-range = <0 ff>;
- ranges = <02000000 0 80000000 80000000 0 20000000
- 01000000 0 00000000 e2000000 0 00800000>;
- clock-frequency = <3f940aa>;
- #interrupt-cells = <1>;
- #size-cells = <2>;
- #address-cells = <3>;
- reg = <8000 1000>;
- compatible = "fsl,mpc8540-pci";
- device_type = "pci";
- };
-
- /* PCI Express */
- pcie@a000 {
- interrupt-map-mask = <f800 0 0 7>;
- interrupt-map = <
-
- /* IDSEL 0x0 (PEX) */
- 00000 0 0 1 &mpic 0 1
- 00000 0 0 2 &mpic 1 1
- 00000 0 0 3 &mpic 2 1
- 00000 0 0 4 &mpic 3 1>;
-
- interrupt-parent = <&mpic>;
- interrupts = <1a 2>;
- bus-range = <0 ff>;
- ranges = <02000000 0 a0000000 a0000000 0 10000000
- 01000000 0 00000000 e2800000 0 00800000>;
- clock-frequency = <1fca055>;
- #interrupt-cells = <1>;
- #size-cells = <2>;
- #address-cells = <3>;
- reg = <a000 1000>;
- compatible = "fsl,mpc8548-pcie";
- device_type = "pci";
- };
-
serial@4600 {
device_type = "serial";
compatible = "ns16550";
@@ -269,6 +215,7 @@
device_type = "open-pic";
big-endian;
};
+
par_io@e0100 {
reg = <e0100 100>;
device_type = "par_io";
@@ -301,6 +248,7 @@
4 13 1 0 2 0 /* GTX_CLK */
1 1f 2 0 3 0>; /* GTX125 */
};
+
pio2: ucc_pin@02 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
@@ -461,4 +409,71 @@
};
};
+
+ pci@8000 {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x12 AD18 */
+ 9000 0 0 1 &mpic 5 1
+ 9000 0 0 2 &mpic 6 1
+ 9000 0 0 3 &mpic 7 1
+ 9000 0 0 4 &mpic 4 1
+
+ /* IDSEL 0x13 AD19 */
+ 9800 0 0 1 &mpic 6 1
+ 9800 0 0 2 &mpic 7 1
+ 9800 0 0 3 &mpic 4 1
+ 9800 0 0 4 &mpic 5 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ bus-range = <0 ff>;
+ ranges = <02000000 0 80000000 80000000 0 20000000
+ 01000000 0 00000000 e2000000 0 00800000>;
+ clock-frequency = <3f940aa>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <8000 1000>;
+ compatible = "fsl,mpc8540-pci";
+ device_type = "pci";
+ };
+
+ /* PCI Express */
+ pcie@a000 {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x0 (PEX) */
+ 00000 0 0 1 &mpic 0 1
+ 00000 0 0 2 &mpic 1 1
+ 00000 0 0 3 &mpic 2 1
+ 00000 0 0 4 &mpic 3 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <1a 2>;
+ bus-range = <0 ff>;
+ ranges = <02000000 0 a0000000 a0000000 0 10000000
+ 01000000 0 00000000 e2800000 0 00800000>;
+ clock-frequency = <1fca055>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <a000 1000>;
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ ranges = <02000000 0 a0000000
+ 02000000 0 a0000000
+ 0 10000000
+
+ 01000000 0 00000000
+ 01000000 0 00000000
+ 0 00800000>;
+ };
+ };
};
--
1.5.2.4
^ permalink raw reply related
* [PATCH] [POWERPC] Cleaned up whitespace in head_fsl_booke.S
From: Kumar Gala @ 2007-10-03 15:20 UTC (permalink / raw)
To: linuxppc-dev
---
arch/powerpc/kernel/head_fsl_booke.S | 76 +++++++++++++++++-----------------
1 files changed, 38 insertions(+), 38 deletions(-)
Its just for show, this exists in my git-tree.
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index bfc3870..4dab680 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -2,27 +2,27 @@
* Kernel execution entry point code.
*
* Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
- * Initial PowerPC version.
+ * Initial PowerPC version.
* Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu>
- * Rewritten for PReP
+ * Rewritten for PReP
* Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
- * Low-level exception handers, MMU support, and rewrite.
+ * Low-level exception handers, MMU support, and rewrite.
* Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
- * PowerPC 8xx modifications.
+ * PowerPC 8xx modifications.
* Copyright (c) 1998-1999 TiVo, Inc.
- * PowerPC 403GCX modifications.
+ * PowerPC 403GCX modifications.
* Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
- * PowerPC 403GCX/405GP modifications.
+ * PowerPC 403GCX/405GP modifications.
* Copyright 2000 MontaVista Software Inc.
* PPC405 modifications
- * PowerPC 403GCX/405GP modifications.
- * Author: MontaVista Software, Inc.
- * frank_rowand@mvista.com or source@mvista.com
- * debbie_chu@mvista.com
+ * PowerPC 403GCX/405GP modifications.
+ * Author: MontaVista Software, Inc.
+ * frank_rowand@mvista.com or source@mvista.com
+ * debbie_chu@mvista.com
* Copyright 2002-2004 MontaVista Software, Inc.
- * PowerPC 44x support, Matt Porter <mporter@kernel.crashing.org>
+ * PowerPC 44x support, Matt Porter <mporter@kernel.crashing.org>
* Copyright 2004 Freescale Semiconductor, Inc
- * PowerPC e500 modifications, Kumar Gala <galak@kernel.crashing.org>
+ * PowerPC e500 modifications, Kumar Gala <galak@kernel.crashing.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -146,13 +146,13 @@ skpinv: addi r6,r6,1 /* Increment */
bne 1b /* If not, repeat */
/* Invalidate TLB0 */
- li r6,0x04
+ li r6,0x04
tlbivax 0,r6
#ifdef CONFIG_SMP
tlbsync
#endif
/* Invalidate TLB1 */
- li r6,0x0c
+ li r6,0x0c
tlbivax 0,r6
#ifdef CONFIG_SMP
tlbsync
@@ -211,7 +211,7 @@ skpinv: addi r6,r6,1 /* Increment */
mtspr SPRN_MAS1,r6
tlbwe
/* Invalidate TLB1 */
- li r9,0x0c
+ li r9,0x0c
tlbivax 0,r9
#ifdef CONFIG_SMP
tlbsync
@@ -254,7 +254,7 @@ skpinv: addi r6,r6,1 /* Increment */
mtspr SPRN_MAS1,r8
tlbwe
/* Invalidate TLB1 */
- li r9,0x0c
+ li 9,0x0c
tlbivax 0,r9
#ifdef CONFIG_SMP
tlbsync
@@ -294,7 +294,7 @@ skpinv: addi r6,r6,1 /* Increment */
#ifdef CONFIG_E200
oris r2,r2,MAS4_TLBSELD(1)@h
#endif
- mtspr SPRN_MAS4, r2
+ mtspr SPRN_MAS4, r2
#if 0
/* Enable DOZE */
@@ -305,7 +305,7 @@ skpinv: addi r6,r6,1 /* Increment */
#ifdef CONFIG_E200
/* enable dedicated debug exception handling resources (Debug APU) */
mfspr r2,SPRN_HID0
- ori r2,r2,HID0_DAPUEN@l
+ ori r2,r2,HID0_DAPUEN@l
mtspr SPRN_HID0,r2
#endif
@@ -391,7 +391,7 @@ skpinv: addi r6,r6,1 /* Increment */
#ifdef CONFIG_PTE_64BIT
#define PTE_FLAGS_OFFSET 4
#define FIND_PTE \
- rlwinm r12, r10, 13, 19, 29; /* Compute pgdir/pmd offset */ \
+ rlwinm r12, r10, 13, 19, 29; /* Compute pgdir/pmd offset */ \
lwzx r11, r12, r11; /* Get pgd/pmd entry */ \
rlwinm. r12, r11, 0, 0, 20; /* Extract pt base address */ \
beq 2f; /* Bail if no table */ \
@@ -487,7 +487,7 @@ interrupt_base:
*/
andi. r11, r11, _PAGE_HWEXEC
rlwimi r11, r11, 31, 27, 27 /* SX <- _PAGE_HWEXEC */
- ori r11, r11, (MAS3_UW|MAS3_SW|MAS3_UR|MAS3_SR)@l /* set static perms */
+ ori r11, r11, (MAS3_UW|MAS3_SW|MAS3_UR|MAS3_SR)@l /* set static perms */
/* update search PID in MAS6, AS = 0 */
mfspr r12, SPRN_PID0
@@ -694,7 +694,7 @@ interrupt_base:
START_EXCEPTION(SPEUnavailable)
NORMAL_EXCEPTION_PROLOG
bne load_up_spe
- addi r3,r1,STACK_FRAME_OVERHEAD
+ addi r3,r1,STACK_FRAME_OVERHEAD
EXC_XFER_EE_LITE(0x2010, KernelSPE)
#else
EXCEPTION(0x2020, SPEUnavailable, unknown_exception, EXC_XFER_EE)
@@ -741,10 +741,10 @@ data_access:
* Both the instruction and data TLB miss get to this
* point to load the TLB.
- * r10 - EA of fault
- * r11 - TLB (info from Linux PTE)
- * r12, r13 - available to use
- * CR5 - results of addr < TASK_SIZE
+ * r10 - EA of fault
+ * r11 - TLB (info from Linux PTE)
+ * r12, r13 - available to use
+ * CR5 - results of addr < TASK_SIZE
* MAS0, MAS1 - loaded with proper value when we get here
* MAS2, MAS3 - will need additional info from Linux PTE
* Upon exit, we reload everything and RFI.
@@ -813,7 +813,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_BIG_PHYS)
lwz r13, tlbcam_index@l(r13)
rlwimi r12, r13, 0, 20, 31
7:
- mtspr SPRN_MAS0,r12
+ mtspr SPRN_MAS0,r12
#endif /* CONFIG_E200 */
tlbwe
@@ -855,17 +855,17 @@ load_up_spe:
beq 1f
addi r4,r4,THREAD /* want THREAD of last_task_used_spe */
SAVE_32EVRS(0,r10,r4)
- evxor evr10, evr10, evr10 /* clear out evr10 */
+ evxor evr10, evr10, evr10 /* clear out evr10 */
evmwumiaa evr10, evr10, evr10 /* evr10 <- ACC = 0 * 0 + ACC */
li r5,THREAD_ACC
- evstddx evr10, r4, r5 /* save off accumulator */
+ evstddx evr10, r4, r5 /* save off accumulator */
lwz r5,PT_REGS(r4)
lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
lis r10,MSR_SPE@h
andc r4,r4,r10 /* disable SPE for previous task */
stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
1:
-#endif /* CONFIG_SMP */
+#endif /* !CONFIG_SMP */
/* enable use of SPE after return */
oris r9,r9,MSR_SPE@h
mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */
@@ -878,7 +878,7 @@ load_up_spe:
#ifndef CONFIG_SMP
subi r4,r5,THREAD
stw r4,last_task_used_spe@l(r3)
-#endif /* CONFIG_SMP */
+#endif /* !CONFIG_SMP */
/* restore registers and return */
2: REST_4GPRS(3, r11)
lwz r10,_CCR(r11)
@@ -963,10 +963,10 @@ _GLOBAL(giveup_spe)
lwz r5,PT_REGS(r3)
cmpi 0,r5,0
SAVE_32EVRS(0, r4, r3)
- evxor evr6, evr6, evr6 /* clear out evr6 */
+ evxor evr6, evr6, evr6 /* clear out evr6 */
evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */
li r4,THREAD_ACC
- evstddx evr6, r4, r3 /* save off accumulator */
+ evstddx evr6, r4, r3 /* save off accumulator */
mfspr r6,SPRN_SPEFSCR
stw r6,THREAD_SPEFSCR(r3) /* save spefscr register value */
beq 1f
@@ -979,7 +979,7 @@ _GLOBAL(giveup_spe)
li r5,0
lis r4,last_task_used_spe@ha
stw r5,last_task_used_spe@l(r4)
-#endif /* CONFIG_SMP */
+#endif /* !CONFIG_SMP */
blr
#endif /* CONFIG_SPE */
@@ -1000,15 +1000,15 @@ _GLOBAL(giveup_fpu)
*/
_GLOBAL(abort)
li r13,0
- mtspr SPRN_DBCR0,r13 /* disable all debug events */
+ mtspr SPRN_DBCR0,r13 /* disable all debug events */
isync
mfmsr r13
ori r13,r13,MSR_DE@l /* Enable Debug Events */
mtmsr r13
isync
- mfspr r13,SPRN_DBCR0
- lis r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h
- mtspr SPRN_DBCR0,r13
+ mfspr r13,SPRN_DBCR0
+ lis r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h
+ mtspr SPRN_DBCR0,r13
isync
_GLOBAL(set_context)
@@ -1043,7 +1043,7 @@ swapper_pg_dir:
/* Reserved 4k for the critical exception stack & 4k for the machine
* check stack per CPU for kernel mode exceptions */
.section .bss
- .align 12
+ .align 12
exception_stack_bottom:
.space BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS
.globl exception_stack_top
--
1.5.2.4
^ permalink raw reply related
* Re: [RFC] PPC64 Exporting memory information through /proc/iomem
From: Badari Pulavarty @ 2007-10-03 15:35 UTC (permalink / raw)
To: KAMEZAWA Hiroyuki; +Cc: linuxppc-dev, anton, Paul Mackerras, linux-mm
In-Reply-To: <20071003101954.52308f22.kamezawa.hiroyu@jp.fujitsu.com>
On Wed, 2007-10-03 at 10:19 +0900, KAMEZAWA Hiroyuki wrote:
> On Tue, 02 Oct 2007 16:10:53 -0700
> Badari Pulavarty <pbadari@us.ibm.com> wrote:
> > > > Otherwise, we need to add arch-specific hooks in hotplug-remove
> > > > code to be able to do this.
> > >
> > > Isn't it just a matter of abstracting the test for a valid range of
> > > memory? If it's really hard to abstract that, then I guess we can put
> > > RAM in iomem_resource, but I'd rather not.
> > >
> >
> > Sure. I will work on it and see how ugly it looks.
> >
> > KAME, are you okay with abstracting the find_next_system_ram() and
> > let arch provide whatever implementation they want ? (since current
> > code doesn't work for x86-64 also ?).
> >
> Hmm, registering /proc/iomem is complicated ?
Its not complicated. Like Paul mentioned, its part of user/kernel API
which he is not prefering to break (if possible) + /proc/iomem seems
like a weird place to export conventional memory.
> If too complicated, adding config
> like
> CONFIG_ARCH_SUPPORT_IORESOURCE_RAM or something can do good work.
> you can define your own "check_pages_isolated" (you can rename this to
> arch_check_apges_isolated().)
I was thinking more in the lines of
CONFIG_ARCH_HAS_VALID_MEMORY_RANGE. Then define own
find_next_system_ram() (rename to is_valid_memory_range()) - which
checks the given range is a valid memory range for memory-remove
or not. What do you think ?
Thanks,
Badari
^ permalink raw reply
* [PATCH] fsl_spi devices should use mode "cpu" or "qe"
From: Peter Korsgaard @ 2007-10-03 15:43 UTC (permalink / raw)
To: galak, linuxppc-dev
According to booting-without-of.txt, fsl_spi mode should be either
"cpu" or "qe", not "cpu-qe".
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
---
arch/powerpc/boot/dts/mpc832x_rdb.dts | 2 +-
arch/powerpc/sysdev/fsl_soc.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 388c8a7..a5158d5 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -175,7 +175,7 @@
reg = <4c0 40>;
interrupts = <2>;
interrupt-parent = <&qeic>;
- mode = "cpu-qe";
+ mode = "qe";
};
spi@500 {
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index c765d7a..a57fe56 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -1253,7 +1253,7 @@ int __init fsl_spi_init(struct spi_board_info *board_infos,
pdata.bus_num = *(u32 *)prop;
prop = of_get_property(np, "mode", NULL);
- if (prop && !strcmp(prop, "cpu-qe"))
+ if (prop && !strcmp(prop, "qe"))
pdata.qe_mode = 1;
for (j = 0; j < num_board_infos; j++) {
--
1.5.3.2
--
Bye, Peter Korsgaard
^ permalink raw reply related
* [PATCH] fsl_spi_init: Support non-QE processors
From: Peter Korsgaard @ 2007-10-03 15:43 UTC (permalink / raw)
To: galak, linuxppc-dev
On non-QE processors (mpc831x/mpc834x) the SPI clock is the SoC clock.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
---
arch/powerpc/sysdev/fsl_soc.c | 27 +++++++++++++++++++--------
1 files changed, 19 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index a57fe56..59e4188 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -1220,14 +1220,17 @@ int __init fsl_spi_init(struct spi_board_info *board_infos,
{
struct device_node *np;
unsigned int i;
- const u32 *sysclk;
+ const u32 *qe_sysclk = 0, *soc_sysclk = 0;
np = of_find_node_by_type(NULL, "qe");
- if (!np)
- return -ENODEV;
+ if (np)
+ qe_sysclk = of_get_property(np, "bus-frequency", NULL);
+
+ np = of_find_node_by_type(NULL, "soc");
+ if (np)
+ soc_sysclk = of_get_property(np, "bus-frequency", NULL);
- sysclk = of_get_property(np, "bus-frequency", NULL);
- if (!sysclk)
+ if (!(qe_sysclk || soc_sysclk))
return -ENODEV;
for (np = NULL, i = 1;
@@ -1245,16 +1248,24 @@ int __init fsl_spi_init(struct spi_board_info *board_infos,
memset(res, 0, sizeof(res));
- pdata.sysclk = *sysclk;
-
prop = of_get_property(np, "reg", NULL);
if (!prop)
goto err;
pdata.bus_num = *(u32 *)prop;
prop = of_get_property(np, "mode", NULL);
- if (prop && !strcmp(prop, "qe"))
+ if (prop && !strcmp(prop, "qe")) {
pdata.qe_mode = 1;
+ if (qe_sysclk)
+ pdata.sysclk = *qe_sysclk;
+ else
+ goto err;
+ } else {
+ if (soc_sysclk)
+ pdata.sysclk = *soc_sysclk;
+ else
+ goto err;
+ }
for (j = 0; j < num_board_infos; j++) {
if (board_infos[j].bus_num == pdata.bus_num)
--
1.5.3.2
--
Bye, Peter Korsgaard
^ permalink raw reply related
* [PATCH] SPI: Use fsl_spi instead of mpc83xx_spi
From: Peter Korsgaard @ 2007-10-03 15:44 UTC (permalink / raw)
To: galak, linuxppc-dev
According to booting-without-of.txt, compatible should be "fsl_spi" and
mode "cpu" or "qe" for the fsl SPI controllers.
Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
---
arch/powerpc/boot/dts/mpc8313erdb.dts | 4 ++--
arch/powerpc/boot/dts/mpc8349emitx.dts | 4 ++--
arch/powerpc/boot/dts/mpc8349emitxgp.dts | 4 ++--
arch/powerpc/boot/dts/mpc834x_mds.dts | 4 ++--
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index a8eadc8..9e7eba9 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -71,11 +71,11 @@
spi@7000 {
device_type = "spi";
- compatible = "mpc83xx_spi";
+ compatible = "fsl_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = < &ipic >;
- mode = <0>;
+ mode = "cpu";
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index e0cb2a7..b2b3995 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -70,11 +70,11 @@
spi@7000 {
device_type = "spi";
- compatible = "mpc83xx_spi";
+ compatible = "fsl_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = < &ipic >;
- mode = <0>;
+ mode = "cpu";
};
usb@22000 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index fa852ba..cf8c72a 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -70,11 +70,11 @@
spi@7000 {
device_type = "spi";
- compatible = "mpc83xx_spi";
+ compatible = "fsl_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = < &ipic >;
- mode = <0>;
+ mode = "cpu";
};
usb@23000 {
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 1b8882e..cf7b84f 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -76,11 +76,11 @@
spi@7000 {
device_type = "spi";
- compatible = "mpc83xx_spi";
+ compatible = "fsl_spi";
reg = <7000 1000>;
interrupts = <10 8>;
interrupt-parent = < &ipic >;
- mode = <0>;
+ mode = "cpu";
};
/* phy type (ULPI or SERIAL) are only types supportted for MPH */
--
1.5.3.2
--
Bye, Peter Korsgaard
^ permalink raw reply related
* [PATCH] [POWERPC] Update .gitignore for new vdso generated files
From: Kumar Gala @ 2007-10-03 15:45 UTC (permalink / raw)
To: linuxppc-dev
We now generate vdso[32,64].so.dbg as part of the build so
add them to .gitignore
---
arch/powerpc/kernel/vdso32/.gitignore | 1 +
arch/powerpc/kernel/vdso64/.gitignore | 1 +
2 files changed, 2 insertions(+), 0 deletions(-)
in my git tree.
diff --git a/arch/powerpc/kernel/vdso32/.gitignore b/arch/powerpc/kernel/vdso32/.gitignore
index e45fba9..fea5809 100644
--- a/arch/powerpc/kernel/vdso32/.gitignore
+++ b/arch/powerpc/kernel/vdso32/.gitignore
@@ -1 +1,2 @@
vdso32.lds
+vdso32.so.dbg
diff --git a/arch/powerpc/kernel/vdso64/.gitignore b/arch/powerpc/kernel/vdso64/.gitignore
index 3fd18cf..77a0b42 100644
--- a/arch/powerpc/kernel/vdso64/.gitignore
+++ b/arch/powerpc/kernel/vdso64/.gitignore
@@ -1 +1,2 @@
vdso64.lds
+vdso64.so.dbg
--
1.5.2.4
^ permalink raw reply related
* Re: [PATCH] fsl_spi devices should use mode "cpu" or "qe"
From: Kumar Gala @ 2007-10-03 15:51 UTC (permalink / raw)
To: Peter Korsgaard; +Cc: linuxppc-dev
In-Reply-To: <87przwxkzf.fsf@macbook.be.48ers.dk>
On Oct 3, 2007, at 10:43 AM, Peter Korsgaard wrote:
> According to booting-without-of.txt, fsl_spi mode should be either
> "cpu" or "qe", not "cpu-qe".
>
> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
I think we should update the doc instead of the code here. Thoughts?
- k
^ permalink raw reply
* Re: [PATCH] SPI: Use fsl_spi instead of mpc83xx_spi
From: Grant Likely @ 2007-10-03 15:52 UTC (permalink / raw)
To: Peter Korsgaard; +Cc: linuxppc-dev
In-Reply-To: <87hcl8xkw5.fsf@macbook.be.48ers.dk>
On 10/3/07, Peter Korsgaard <jacmet@sunsite.dk> wrote:
> According to booting-without-of.txt, compatible should be "fsl_spi" and
> mode "cpu" or "qe" for the fsl SPI controllers.
>
> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
> ---
> arch/powerpc/boot/dts/mpc8313erdb.dts | 4 ++--
> arch/powerpc/boot/dts/mpc8349emitx.dts | 4 ++--
> arch/powerpc/boot/dts/mpc8349emitxgp.dts | 4 ++--
> arch/powerpc/boot/dts/mpc834x_mds.dts | 4 ++--
> 4 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
> index a8eadc8..9e7eba9 100644
> --- a/arch/powerpc/boot/dts/mpc8313erdb.dts
> +++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
> @@ -71,11 +71,11 @@
>
> spi@7000 {
> device_type = "spi";
> - compatible = "mpc83xx_spi";
> + compatible = "fsl_spi";
Compatible is a list property; this might be more appropriate:
compatible = "fsl,mpc8313_spi", "fsl_spi";
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH] fsl_spi_init: Support non-QE processors
From: Grant Likely @ 2007-10-03 15:56 UTC (permalink / raw)
To: Peter Korsgaard; +Cc: linuxppc-dev
In-Reply-To: <87lkakxky1.fsf@macbook.be.48ers.dk>
On 10/3/07, Peter Korsgaard <jacmet@sunsite.dk> wrote:
> On non-QE processors (mpc831x/mpc834x) the SPI clock is the SoC clock.
>
> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
> ---
> arch/powerpc/sysdev/fsl_soc.c | 27 +++++++++++++++++++--------
> 1 files changed, 19 insertions(+), 8 deletions(-)
>
> diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
> index a57fe56..59e4188 100644
> --- a/arch/powerpc/sysdev/fsl_soc.c
> +++ b/arch/powerpc/sysdev/fsl_soc.c
> @@ -1220,14 +1220,17 @@ int __init fsl_spi_init(struct spi_board_info *board_infos,
> {
> struct device_node *np;
> unsigned int i;
> - const u32 *sysclk;
> + const u32 *qe_sysclk = 0, *soc_sysclk = 0;
>
> np = of_find_node_by_type(NULL, "qe");
> - if (!np)
> - return -ENODEV;
> + if (np)
> + qe_sysclk = of_get_property(np, "bus-frequency", NULL);
> +
> + np = of_find_node_by_type(NULL, "soc");
> + if (np)
> + soc_sysclk = of_get_property(np, "bus-frequency", NULL);
Why not just:
np = of_find_node_by_type(NULL, "qe");
+ if (!np)
+ np = of_find_node_by_type(NULL, "soc");
if (!np)
return -ENODEV;
The other changes aren't needed that way.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH] fsl_spi devices should use mode "cpu" or "qe"
From: Peter Korsgaard @ 2007-10-03 15:56 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <085BE1E4-945F-4690-9DFC-627F242831A6@kernel.crashing.org>
>>>>> "Kumar" == Kumar Gala <galak@kernel.crashing.org> writes:
Kumar> On Oct 3, 2007, at 10:43 AM, Peter Korsgaard wrote:
>> According to booting-without-of.txt, fsl_spi mode should be either
>> "cpu" or "qe", not "cpu-qe".
>>
>> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
Kumar> I think we should update the doc instead of the code here. Thoughts?
Same for me, but qe is shorter..
--
Bye, Peter Korsgaard
^ permalink raw reply
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