* [PATCH 6/9] add documentation for SerDes nodes
From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
In-Reply-To: <1192010804-20071-5-git-send-email-leoli@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
Documentation/powerpc/booting-without-of.txt | 29 ++++++++++++++++++++++++++
1 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index f499f76..84bce42 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1856,6 +1856,35 @@ platforms are moved over to use the flattened-device-tree model.
phy-handle = < &serdes1 >;
};
+ m) SerDes nodes
+
+ SerDes is a serializer/deserializer used by some Freescale SoC.
+
+ Required properties:
+
+ - compatible : Should specify what this SerDes controller is compatible
+ with. Currently, this is most likely to be "fsl,serdes".
+ - reg : Offset and length of the register set for the device.
+ - protocol : Which up layer protocol is running on the serial
+ interface. Could be "sata", "pcie", "sgmii".
+ - clock : Input clock frequency for SerDes in unit of MHz.
+
+ Optional properties:
+
+ - vdd-1v : Define this property when Vdd is 1V.
+ - pcie-x2 : Define this property when using PCI Express x2 interface.
+ Valid only when protocol is set to "pcie".
+
+ Example:
+
+ serdes1:serdes@e3000 {
+ compatible = "fsl,serdes";
+ reg = <e3000 100>;
+ vdd-1v;
+ protocol = "sata";
+ clock = <d#100>;
+ };
+
More devices will be defined as this spec matures.
VII - Specifying interrupt information for devices
--
1.5.3.2.104.g41ef
^ permalink raw reply related
* [PATCH 5/9] add documentation for SATA nodes
From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
In-Reply-To: <1192010804-20071-4-git-send-email-leoli@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
Documentation/powerpc/booting-without-of.txt | 32 ++++++++++++++++++++++++++
1 files changed, 32 insertions(+), 0 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 76733a3..f499f76 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1824,6 +1824,38 @@ platforms are moved over to use the flattened-device-tree model.
fsl,has-rstcr;
};
+ l) SATA nodes
+
+ SATA nodes are defined to describe on-chip Serial ATA controllers.
+
+ Required properties:
+
+ - compatible : Should specify what this SATA controller is compatible
+ with.
+ - reg : Offset and length of the register set for the device.
+ - interrupts : <a b> where a is the interrupt number and b is a
+ field that represents an encoding of the sense and level
+ information for the interrupt. This should be encoded based on
+ the information in section 2) depending on the type of interrupt
+ controller you have.
+ - interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+
+ Recommended properties :
+
+ - phy-handle : Some SATA controller uses a shared SerDes PHY. This
+ property should specify the phandle of the SerDes node.
+
+ Example:
+
+ sata@19000 {
+ compatible = "fsl,mpc8315-sata";
+ reg = <19000 1000>;
+ interrupts = <2d 8>;
+ interrupt-parent = < &ipic >;
+ phy-handle = < &serdes1 >;
+ };
+
More devices will be defined as this spec matures.
VII - Specifying interrupt information for devices
--
1.5.3.2.104.g41ef
^ permalink raw reply related
* [PATCH 3/9] add Freescale SerDes PHY support
From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
In-Reply-To: <1192010804-20071-2-git-send-email-leoli@freescale.com>
The SerDes(serializer/deserializer) PHY block is a new SoC block used
in Freescale chips to support multiple serial interfaces, such as PCI
Express, SGMII, SATA.
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/platforms/Kconfig | 4 +
arch/powerpc/sysdev/Makefile | 1 +
arch/powerpc/sysdev/fsl_serdes.c | 170 ++++++++++++++++++++++++++++++++++++++
arch/powerpc/sysdev/fsl_serdes.h | 36 ++++++++
4 files changed, 211 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/sysdev/fsl_serdes.c
create mode 100644 arch/powerpc/sysdev/fsl_serdes.h
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 19d4628..e89f803 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -291,4 +291,8 @@ config FSL_ULI1575
Freescale reference boards. The boards all use the ULI in pretty
much the same way.
+config FSL_SERDES
+ bool
+ default n
+
endmenu
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 08ce31e..315aa36 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -19,6 +19,7 @@ mv64x60-$(CONFIG_PCI) += mv64x60_pci.o
obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o
obj-$(CONFIG_RTC_DRV_CMOS) += rtc_cmos_setup.o
obj-$(CONFIG_AXON_RAM) += axonram.o
+obj-$(CONFIG_FSL_SERDES) += fsl_serdes.o
# contains only the suspend handler for time
ifeq ($(CONFIG_RTC_CLASS),)
diff --git a/arch/powerpc/sysdev/fsl_serdes.c b/arch/powerpc/sysdev/fsl_serdes.c
new file mode 100644
index 0000000..8a04395
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_serdes.c
@@ -0,0 +1,170 @@
+/*
+ * arch/powerpc/sysdev/fsl_serdes.c
+ *
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Li Yang <leoli@freescale.com>
+ *
+ * Freescale SerDes initialization routines
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/prom.h>
+
+#include "fsl_serdes.h"
+
+static int __init setup_serdes(struct device_node *np)
+{
+ void __iomem *regs;
+ const void *prot;
+ const unsigned int *freq;
+ struct resource res;
+ u32 tmp, rfcks;
+
+ of_address_to_resource(np, 0, &res);
+ regs = ioremap(res.start, res.end - res.start + 1);
+
+ prot = of_get_property(np, "protocol", NULL);
+ if (!prot)
+ return -EINVAL;
+ freq = of_get_property(np, "clock", NULL);
+ switch (*freq) {
+ case 100:
+ rfcks = FSL_SRDSCR4_RFCKS_100;
+ break;
+ case 125:
+ rfcks = FSL_SRDSCR4_RFCKS_125;
+ break;
+ case 150:
+ rfcks = FSL_SRDSCR4_RFCKS_150;
+ break;
+ default:
+ printk(KERN_ERR "SerDes: Wrong frequency\n");
+ return -EINVAL;
+ }
+
+ /* Use default prescale and counter */
+
+ /* 1.0V corevdd */
+ if (of_get_property(np, "vdd-1v", NULL)) {
+ /* DPPE/DPPA = 0 */
+ tmp = in_be32(regs + FSL_SRDSCR0_OFFS);
+ tmp &= ~FSL_SRDSCR0_DPP_1V2;
+ out_be32(regs + FSL_SRDSCR0_OFFS, tmp);
+
+ /* VDD = 0 */
+ tmp = in_be32(regs + FSL_SRDSCR2_OFFS);
+ tmp &= ~FSL_SRDSCR2_VDD_1V2;
+ out_be32(regs + FSL_SRDSCR2_OFFS, tmp);
+ }
+
+ /* protocol specific configuration */
+ if (!strcmp(prot, "sata")) {
+ /* Set and clear reset bits */
+ tmp = in_be32(regs + FSL_SRDSRSTCTL_OFFS);
+ tmp |= FSL_SRDSRSTCTL_SATA_RESET;
+ out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp);
+ mdelay(1);
+ tmp &= ~FSL_SRDSRSTCTL_SATA_RESET;
+ out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp);
+
+ /* Configure SRDSCR1 */
+ tmp = in_be32(regs + FSL_SRDSCR1_OFFS);
+ tmp &= ~FSL_SRDSCR1_PLLBW;
+ out_be32(regs + FSL_SRDSCR1_OFFS, tmp);
+
+ /* Configure SRDSCR2 */
+ tmp = in_be32(regs + FSL_SRDSCR2_OFFS);
+ tmp &= ~FSL_SRDSCR2_SEIC_MASK;
+ tmp |= FSL_SRDSCR2_SEIC_SATA;
+ out_be32(regs + FSL_SRDSCR2_OFFS, tmp);
+
+ /* Configure SRDSCR3 */
+ tmp = FSL_SRDSCR3_KFR_SATA | FSL_SRDSCR3_KPH_SATA |
+ FSL_SRDSCR3_SDFM_SATA_PEX |
+ FSL_SRDSCR3_SDTXL_SATA;
+ out_be32(regs + FSL_SRDSCR3_OFFS, tmp);
+
+ /* Configure SRDSCR4 */
+ tmp = rfcks | FSL_SRDSCR4_PROT_SATA;
+ out_be32(regs + FSL_SRDSCR4_OFFS, tmp);
+
+ } else if (!strcmp(prot, "pcie")) {
+ /* Configure SRDSCR1 */
+ tmp = in_be32(regs + FSL_SRDSCR1_OFFS);
+ tmp |= FSL_SRDSCR1_PLLBW;
+ out_be32(regs + FSL_SRDSCR1_OFFS, tmp);
+
+ /* Configure SRDSCR2 */
+ tmp = in_be32(regs + FSL_SRDSCR2_OFFS);
+ tmp &= ~FSL_SRDSCR2_SEIC_MASK;
+ tmp |= FSL_SRDSCR2_SEIC_PEX;
+ out_be32(regs + FSL_SRDSCR2_OFFS, tmp);
+
+ /* Configure SRDSCR3 */
+ tmp = FSL_SRDSCR3_SDFM_SATA_PEX;
+ out_be32(regs + FSL_SRDSCR3_OFFS, tmp);
+
+ /* Configure SRDSCR4 */
+ tmp = rfcks | FSL_SRDSCR4_PROT_PEX;
+ if (of_get_property(np, "pcie-x2", NULL))
+ tmp |= FSL_SRDSCR4_PLANE_X2;
+ out_be32(regs + FSL_SRDSCR4_OFFS, tmp);
+
+ } else if (!strcmp(prot, "sgmii")) {
+ /* Configure SRDSCR1 */
+ tmp = in_be32(regs + FSL_SRDSCR1_OFFS);
+ tmp &= ~FSL_SRDSCR1_PLLBW;
+ out_be32(regs + FSL_SRDSCR1_OFFS, tmp);
+
+ /* Configure SRDSCR2 */
+ tmp = in_be32(regs + FSL_SRDSCR2_OFFS);
+ tmp &= ~FSL_SRDSCR2_SEIC_MASK;
+ tmp |= FSL_SRDSCR2_SEIC_SGMII;
+ out_be32(regs + FSL_SRDSCR2_OFFS, tmp);
+
+ /* Configure SRDSCR3 */
+ out_be32(regs + FSL_SRDSCR3_OFFS, 0);
+
+ /* Configure SRDSCR4 */
+ tmp = rfcks | FSL_SRDSCR4_PROT_SGMII;
+ out_be32(regs + FSL_SRDSCR4_OFFS, tmp);
+
+ } else {
+ printk(KERN_ERR "SerDes: Wrong protocol\n");
+ return -EINVAL;
+ }
+
+ /* Do a software reset */
+ tmp = in_be32(regs + FSL_SRDSRSTCTL_OFFS);
+ tmp |= FSL_SRDSRSTCTL_RST;
+ out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp);
+
+ printk(KERN_INFO "Freescale SerDes at %8x initialized\n", res.start);
+
+ return 0;
+}
+
+static int __init fsl_serdes_init(void) {
+ struct device_node *np;
+
+ for (np = NULL; (np = of_find_compatible_node(np, NULL, "fsl,serdes")) != NULL;)
+ setup_serdes(np);
+
+ return 0;
+}
+
+arch_initcall(fsl_serdes_init);
diff --git a/arch/powerpc/sysdev/fsl_serdes.h b/arch/powerpc/sysdev/fsl_serdes.h
new file mode 100644
index 0000000..d4e5570
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_serdes.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/* SerDes registers */
+#define FSL_SRDSCR0_OFFS 0x0
+#define FSL_SRDSCR0_DPP_1V2 0x00008800
+#define FSL_SRDSCR1_OFFS 0x4
+#define FSL_SRDSCR1_PLLBW 0x00000040
+#define FSL_SRDSCR2_OFFS 0x8
+#define FSL_SRDSCR2_VDD_1V2 0x00800000
+#define FSL_SRDSCR2_SEIC_MASK 0x00001c1c
+#define FSL_SRDSCR2_SEIC_SATA 0x00001414
+#define FSL_SRDSCR2_SEIC_PEX 0x00001010
+#define FSL_SRDSCR2_SEIC_SGMII 0x00000101
+#define FSL_SRDSCR3_OFFS 0xc
+#define FSL_SRDSCR3_KFR_SATA 0x10100000
+#define FSL_SRDSCR3_KPH_SATA 0x04040000
+#define FSL_SRDSCR3_SDFM_SATA_PEX 0x01010000
+#define FSL_SRDSCR3_SDTXL_SATA 0x00000505
+#define FSL_SRDSCR4_OFFS 0x10
+#define FSL_SRDSCR4_PROT_SATA 0x00000808
+#define FSL_SRDSCR4_PROT_PEX 0x00000101
+#define FSL_SRDSCR4_PROT_SGMII 0x00000505
+#define FSL_SRDSCR4_PLANE_X2 0x01000000
+#define FSL_SRDSCR4_RFCKS_100 0x00000000
+#define FSL_SRDSCR4_RFCKS_125 0x10000000
+#define FSL_SRDSCR4_RFCKS_150 0x30000000
+#define FSL_SRDSRSTCTL_OFFS 0x20
+#define FSL_SRDSRSTCTL_RST 0x80000000
+#define FSL_SRDSRSTCTL_SATA_RESET 0xf
--
1.5.3.2.104.g41ef
^ permalink raw reply related
* [PATCH 4/9] add platform support for MPC837x MDS board
From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
In-Reply-To: <1192010804-20071-3-git-send-email-leoli@freescale.com>
The MPC837x MDS is a new member of Freescale MDS reference system.
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/platforms/83xx/Kconfig | 12 ++++
arch/powerpc/platforms/83xx/Makefile | 1 +
arch/powerpc/platforms/83xx/mpc837x_mds.c | 102 +++++++++++++++++++++++++++++
3 files changed, 115 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/83xx/mpc837x_mds.c
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index ec305f1..0c61e7a 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -50,6 +50,11 @@ config MPC836x_MDS
help
This option enables support for the MPC836x MDS Processor Board.
+config MPC837x_MDS
+ bool "Freescale MPC837x MDS"
+ select DEFAULT_UIMAGE
+ help
+ This option enables support for the MPC837x MDS Processor Board.
endchoice
config PPC_MPC831x
@@ -75,3 +80,10 @@ config PPC_MPC836x
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
default y if MPC836x_MDS
+
+config PPC_MPC837x
+ bool
+ select PPC_UDBG_16550
+ select PPC_INDIRECT_PCI
+ select FSL_SERDES
+ default y if MPC837x_MDS
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index 5a98f88..df46629 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o
obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o
+obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
new file mode 100644
index 0000000..4342173
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -0,0 +1,102 @@
+/*
+ * arch/powerpc/platforms/83xx/mpc837x_mds.c
+ *
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * MPC837x MDS board specific routines
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/pci.h>
+
+#include <asm/time.h>
+#include <asm/ipic.h>
+#include <asm/udbg.h>
+#include <asm/of_platform.h>
+
+#include "mpc83xx.h"
+
+#ifndef CONFIG_PCI
+unsigned long isa_io_base = 0;
+unsigned long isa_mem_base = 0;
+#endif
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+static void __init mpc837x_mds_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("mpc837x_mds_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+ for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
+ mpc83xx_add_bridge(np);
+#endif
+}
+
+static struct of_device_id mpc837x_ids[] = {
+ { .type = "soc", },
+ { .compatible = "soc", },
+ {},
+};
+
+static int __init mpc837x_declare_of_platform_devices(void)
+{
+ if (!machine_is(mpc837x_mds))
+ return 0;
+
+ /* Publish of_device */
+ of_platform_bus_probe(NULL, mpc837x_ids, NULL);
+
+ return 0;
+}
+device_initcall(mpc837x_declare_of_platform_devices);
+
+static void __init mpc837x_mds_init_IRQ(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
+ if (!np)
+ return;
+
+ ipic_init(np, 0);
+
+ /* Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ ipic_set_default_priority();
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc837x_mds_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "fsl,mpc837xmds");
+}
+
+define_machine(mpc837x_mds) {
+ .name = "MPC837x MDS",
+ .probe = mpc837x_mds_probe,
+ .setup_arch = mpc837x_mds_setup_arch,
+ .init_IRQ = mpc837x_mds_init_IRQ,
+ .get_irq = ipic_get_irq,
+ .restart = mpc83xx_restart,
+ .time_init = mpc83xx_time_init,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
--
1.5.3.2.104.g41ef
^ permalink raw reply related
* [PATCH 2/9] ipic: add new interrupts introduced by new chip
From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
In-Reply-To: <1192010804-20071-1-git-send-email-leoli@freescale.com>
These interrupts are introduced by the latest Freescale SoC such as
MPC837x. The patch also adds comment to interrupts.
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/sysdev/ipic.c | 224 ++++++++++++++++++++++++++++++++++----------
arch/powerpc/sysdev/ipic.h | 7 +-
include/asm-powerpc/ipic.h | 12 ++-
3 files changed, 186 insertions(+), 57 deletions(-)
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 473c415..ea4f695 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -33,7 +33,31 @@ static struct ipic * primary_ipic;
static DEFINE_SPINLOCK(ipic_lock);
static struct ipic_info ipic_info[] = {
- [9] = {
+ [1] = { /* PEX1 CNT */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_C,
+ .force = IPIC_SIFCR_H,
+ .bit = 16,
+ .prio_mask = 0,
+ },
+ [2] = { /* PEX2 CNT */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_C,
+ .force = IPIC_SIFCR_H,
+ .bit = 17,
+ .prio_mask = 1,
+ },
+ [4] = { /* MSIR1 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_C,
+ .force = IPIC_SIFCR_H,
+ .bit = 19,
+ .prio_mask = 3,
+ },
+ [9] = { /* UART1 */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
@@ -41,7 +65,7 @@ static struct ipic_info ipic_info[] = {
.bit = 24,
.prio_mask = 0,
},
- [10] = {
+ [10] = { /* UART2 */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
@@ -49,7 +73,7 @@ static struct ipic_info ipic_info[] = {
.bit = 25,
.prio_mask = 1,
},
- [11] = {
+ [11] = { /* SEC */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
@@ -57,7 +81,23 @@ static struct ipic_info ipic_info[] = {
.bit = 26,
.prio_mask = 2,
},
- [14] = {
+ [12] = { /* eTSEC1 1588 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_D,
+ .force = IPIC_SIFCR_H,
+ .bit = 27,
+ .prio_mask = 3,
+ },
+ [13] = { /* eTSEC2 1588 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_D,
+ .force = IPIC_SIFCR_H,
+ .bit = 28,
+ .prio_mask = 4,
+ },
+ [14] = { /* I2C1 */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
@@ -65,7 +105,7 @@ static struct ipic_info ipic_info[] = {
.bit = 29,
.prio_mask = 5,
},
- [15] = {
+ [15] = { /* I2C2 */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
@@ -73,7 +113,7 @@ static struct ipic_info ipic_info[] = {
.bit = 30,
.prio_mask = 6,
},
- [16] = {
+ [16] = { /* SPI */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
@@ -81,7 +121,7 @@ static struct ipic_info ipic_info[] = {
.bit = 31,
.prio_mask = 7,
},
- [17] = {
+ [17] = { /* IRQ1 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
@@ -89,7 +129,7 @@ static struct ipic_info ipic_info[] = {
.bit = 1,
.prio_mask = 5,
},
- [18] = {
+ [18] = { /* IRQ2 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
@@ -97,7 +137,7 @@ static struct ipic_info ipic_info[] = {
.bit = 2,
.prio_mask = 6,
},
- [19] = {
+ [19] = { /* IRQ3 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
@@ -105,7 +145,7 @@ static struct ipic_info ipic_info[] = {
.bit = 3,
.prio_mask = 7,
},
- [20] = {
+ [20] = { /* IRQ4 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_B,
@@ -113,7 +153,7 @@ static struct ipic_info ipic_info[] = {
.bit = 4,
.prio_mask = 4,
},
- [21] = {
+ [21] = { /* IRQ5 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_B,
@@ -121,7 +161,7 @@ static struct ipic_info ipic_info[] = {
.bit = 5,
.prio_mask = 5,
},
- [22] = {
+ [22] = { /* IRQ 6 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_B,
@@ -129,7 +169,7 @@ static struct ipic_info ipic_info[] = {
.bit = 6,
.prio_mask = 6,
},
- [23] = {
+ [23] = { /* IRQ7 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_B,
@@ -137,7 +177,7 @@ static struct ipic_info ipic_info[] = {
.bit = 7,
.prio_mask = 7,
},
- [32] = {
+ [32] = { /* TSEC1 Tx/QE High */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -145,7 +185,7 @@ static struct ipic_info ipic_info[] = {
.bit = 0,
.prio_mask = 0,
},
- [33] = {
+ [33] = { /* TSEC1 Rx/QE Low */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -153,7 +193,7 @@ static struct ipic_info ipic_info[] = {
.bit = 1,
.prio_mask = 1,
},
- [34] = {
+ [34] = { /* TSEC1 Err */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -161,7 +201,7 @@ static struct ipic_info ipic_info[] = {
.bit = 2,
.prio_mask = 2,
},
- [35] = {
+ [35] = { /* TSEC2 Tx */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -169,7 +209,7 @@ static struct ipic_info ipic_info[] = {
.bit = 3,
.prio_mask = 3,
},
- [36] = {
+ [36] = { /* TSEC2 Rx */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -177,7 +217,7 @@ static struct ipic_info ipic_info[] = {
.bit = 4,
.prio_mask = 4,
},
- [37] = {
+ [37] = { /* TSEC2 Err */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -185,7 +225,7 @@ static struct ipic_info ipic_info[] = {
.bit = 5,
.prio_mask = 5,
},
- [38] = {
+ [38] = { /* USB DR */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -193,7 +233,7 @@ static struct ipic_info ipic_info[] = {
.bit = 6,
.prio_mask = 6,
},
- [39] = {
+ [39] = { /* USB MPH */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -201,7 +241,47 @@ static struct ipic_info ipic_info[] = {
.bit = 7,
.prio_mask = 7,
},
- [48] = {
+ [42] = { /* eSDHC */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 10,
+ .prio_mask = 2,
+ },
+ [44] = { /* SATA1 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 12,
+ .prio_mask = 4,
+ },
+ [45] = { /* SATA2 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 13,
+ .prio_mask = 5,
+ },
+ [46] = { /* SATA3 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 14,
+ .prio_mask = 6,
+ },
+ [47] = { /* SATA4 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 15,
+ .prio_mask = 7,
+ },
+ [48] = { /* IRQ0 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
@@ -209,7 +289,7 @@ static struct ipic_info ipic_info[] = {
.bit = 0,
.prio_mask = 4,
},
- [64] = {
+ [64] = { /* RTC SEC */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_A,
@@ -217,7 +297,7 @@ static struct ipic_info ipic_info[] = {
.bit = 0,
.prio_mask = 0,
},
- [65] = {
+ [65] = { /* PIT */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_A,
@@ -225,7 +305,7 @@ static struct ipic_info ipic_info[] = {
.bit = 1,
.prio_mask = 1,
},
- [66] = {
+ [66] = { /* PCI */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_A,
@@ -233,7 +313,7 @@ static struct ipic_info ipic_info[] = {
.bit = 2,
.prio_mask = 2,
},
- [67] = {
+ [67] = { /* MSIR0 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_A,
@@ -241,7 +321,7 @@ static struct ipic_info ipic_info[] = {
.bit = 3,
.prio_mask = 3,
},
- [68] = {
+ [68] = { /* RTC ALR */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_B,
@@ -249,7 +329,7 @@ static struct ipic_info ipic_info[] = {
.bit = 4,
.prio_mask = 0,
},
- [69] = {
+ [69] = { /* MU */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_B,
@@ -257,7 +337,7 @@ static struct ipic_info ipic_info[] = {
.bit = 5,
.prio_mask = 1,
},
- [70] = {
+ [70] = { /* SBA */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_B,
@@ -265,7 +345,7 @@ static struct ipic_info ipic_info[] = {
.bit = 6,
.prio_mask = 2,
},
- [71] = {
+ [71] = { /* DMA */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_B,
@@ -273,91 +353,133 @@ static struct ipic_info ipic_info[] = {
.bit = 7,
.prio_mask = 3,
},
- [72] = {
+ [72] = { /* GTM4 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 8,
},
- [73] = {
+ [73] = { /* GTM8 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 9,
},
- [74] = {
+ [74] = { /* GPIO1/QE Ports */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 10,
},
- [75] = {
+ [75] = { /* GPIO2/SDDR */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 11,
},
- [76] = {
+ [76] = { /* DDR */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 12,
},
- [77] = {
+ [77] = { /* LBC */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 13,
},
- [78] = {
+ [78] = { /* GTM2 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 14,
},
- [79] = {
+ [79] = { /* GTM6 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 15,
},
- [80] = {
+ [80] = { /* PMC */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 16,
},
- [84] = {
+ [81] = { /* MSIR2 */
+ .pend = IPIC_SIPNR_L,
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 17,
+ },
+ [82] = { /* MSIR3 */
+ .pend = IPIC_SIPNR_L,
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 18,
+ },
+ [84] = { /* GTM3 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 20,
},
- [85] = {
+ [85] = { /* GTM7 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 21,
},
- [90] = {
+ [86] = { /* MSIR4 */
+ .pend = IPIC_SIPNR_L,
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 22,
+ },
+ [87] = { /* MSIR5 */
+ .pend = IPIC_SIPNR_L,
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 23,
+ },
+ [88] = { /* MSIR6 */
+ .pend = IPIC_SIPNR_L,
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 24,
+ },
+ [89] = { /* MSIR7 */
+ .pend = IPIC_SIPNR_L,
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 25,
+ },
+ [90] = { /* GTM1 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 26,
},
- [91] = {
+ [91] = { /* GTM5 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
@@ -596,6 +718,10 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
* configure SICFR accordingly */
if (flags & IPIC_SPREADMODE_GRP_A)
temp |= SICFR_IPSA;
+ if (flags & IPIC_SPREADMODE_GRP_B)
+ temp |= SICFR_IPSB;
+ if (flags & IPIC_SPREADMODE_GRP_C)
+ temp |= SICFR_IPSC;
if (flags & IPIC_SPREADMODE_GRP_D)
temp |= SICFR_IPSD;
if (flags & IPIC_SPREADMODE_MIX_A)
@@ -603,7 +729,7 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
if (flags & IPIC_SPREADMODE_MIX_B)
temp |= SICFR_MPSB;
- ipic_write(ipic->regs, IPIC_SICNR, temp);
+ ipic_write(ipic->regs, IPIC_SICFR, temp);
/* handle MCP route */
temp = 0;
@@ -675,10 +801,12 @@ void ipic_set_highest_priority(unsigned int virq)
void ipic_set_default_priority(void)
{
- ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_SIPRR_A_DEFAULT);
- ipic_write(primary_ipic->regs, IPIC_SIPRR_D, IPIC_SIPRR_D_DEFAULT);
- ipic_write(primary_ipic->regs, IPIC_SMPRR_A, IPIC_SMPRR_A_DEFAULT);
- ipic_write(primary_ipic->regs, IPIC_SMPRR_B, IPIC_SMPRR_B_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SIPRR_B, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SIPRR_C, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SIPRR_D, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SMPRR_A, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SMPRR_B, IPIC_PRIORITY_DEFAULT);
}
void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq)
diff --git a/arch/powerpc/sysdev/ipic.h b/arch/powerpc/sysdev/ipic.h
index c28e589..cd74302 100644
--- a/arch/powerpc/sysdev/ipic.h
+++ b/arch/powerpc/sysdev/ipic.h
@@ -23,13 +23,12 @@
#define IPIC_IRQ_EXT7 23
/* Default Priority Registers */
-#define IPIC_SIPRR_A_DEFAULT 0x05309770
-#define IPIC_SIPRR_D_DEFAULT 0x05309770
-#define IPIC_SMPRR_A_DEFAULT 0x05309770
-#define IPIC_SMPRR_B_DEFAULT 0x05309770
+#define IPIC_PRIORITY_DEFAULT 0x05309770
/* System Global Interrupt Configuration Register */
#define SICFR_IPSA 0x00010000
+#define SICFR_IPSB 0x00020000
+#define SICFR_IPSC 0x00040000
#define SICFR_IPSD 0x00080000
#define SICFR_MPSA 0x00200000
#define SICFR_MPSB 0x00400000
diff --git a/include/asm-powerpc/ipic.h b/include/asm-powerpc/ipic.h
index edec79d..8ff08be 100644
--- a/include/asm-powerpc/ipic.h
+++ b/include/asm-powerpc/ipic.h
@@ -20,11 +20,13 @@
/* Flags when we init the IPIC */
#define IPIC_SPREADMODE_GRP_A 0x00000001
-#define IPIC_SPREADMODE_GRP_D 0x00000002
-#define IPIC_SPREADMODE_MIX_A 0x00000004
-#define IPIC_SPREADMODE_MIX_B 0x00000008
-#define IPIC_DISABLE_MCP_OUT 0x00000010
-#define IPIC_IRQ0_MCP 0x00000020
+#define IPIC_SPREADMODE_GRP_B 0x00000002
+#define IPIC_SPREADMODE_GRP_C 0x00000004
+#define IPIC_SPREADMODE_GRP_D 0x00000008
+#define IPIC_SPREADMODE_MIX_A 0x00000010
+#define IPIC_SPREADMODE_MIX_B 0x00000020
+#define IPIC_DISABLE_MCP_OUT 0x00000040
+#define IPIC_IRQ0_MCP 0x00000080
/* IPIC registers offsets */
#define IPIC_SICFR 0x00 /* System Global Interrupt Configuration Register */
--
1.5.3.2.104.g41ef
^ permalink raw reply related
* [PATCH 1/9] add e300c4 entry to cputable
From: Li Yang @ 2007-10-10 10:06 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/kernel/cputable.c | 13 ++++++++++++-
1 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index b1f8000..d80c365 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -910,7 +910,7 @@ static struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_603,
.platform = "ppc603",
},
- { /* e300c3 on 83xx */
+ { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
.pvr_mask = 0x7fff0000,
.pvr_value = 0x00850000,
.cpu_name = "e300c3",
@@ -921,6 +921,17 @@ static struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_603,
.platform = "ppc603",
},
+ { /* e300c4 (e300c1, plus one IU) */
+ .pvr_mask = 0x7fff0000,
+ .pvr_value = 0x00860000,
+ .cpu_name = "e300c4",
+ .cpu_features = CPU_FTRS_E300,
+ .cpu_user_features = COMMON_USER,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .cpu_setup = __setup_cpu_603,
+ .platform = "ppc603",
+ },
{ /* default match, we assume split I/D cache & TB (non-601)... */
.pvr_mask = 0x00000000,
.pvr_value = 0x00000000,
--
1.5.3.2.104.g41ef
^ permalink raw reply related
* Re: [linux-usb-devel] [PATCH 0/3] usb: ehci ppc device-tree-aware driver
From: Stefan Roese @ 2007-10-10 8:30 UTC (permalink / raw)
To: linuxppc-dev; +Cc: David Brownell, linux-usb-devel, Arnd Bergmann
In-Reply-To: <200710101015.46308.arnd@arndb.de>
On Wednesday 10 October 2007, Arnd Bergmann wrote:
> > Do PPC folk sign off on how this is done?
> >
> > I don't follow all the ins/outs of the OF devtree stuff...
>
> The driver looks good to me, both the interaction with the of_platform_bus
> layer and the handling of I/O addresses. I haven't actually tried running
> it, but I'm rather confident that if it works on the Sequoia, it should
> also do the right thing on any other powerpc system that has an EHCI on
> some other (non-PCI) bus.
>
> Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Stefan Roese <sr@denx.de>
Best regards,
Stefan
^ permalink raw reply
* Re: [linux-usb-devel] [PATCH 0/3] usb: ehci ppc device-tree-aware driver
From: Arnd Bergmann @ 2007-10-10 8:15 UTC (permalink / raw)
To: linuxppc-dev; +Cc: David Brownell, linux-usb-devel
In-Reply-To: <200710092327.26109.david-b@pacbell.net>
On Wednesday 10 October 2007, David Brownell wrote:
> On Monday 24 September 2007, Valentine Barshak wrote:
> > Some PowerPC systems have a built-in EHCI controller.
> > This is a device tree aware version of the EHCI controller driver.
> > Currently it's been tested on the PowerPC 440EPx Sequoia board.
> > Other platforms can be added later.
> > The code is based on the ehci-ppc-soc driver by Stefan Roese <sr@denx.de>.
>
> Do PPC folk sign off on how this is done?
>
> I don't follow all the ins/outs of the OF devtree stuff...
The driver looks good to me, both the interaction with the of_platform_bus
layer and the handling of I/O addresses. I haven't actually tried running
it, but I'm rather confident that if it works on the Sequoia, it should
also do the right thing on any other powerpc system that has an EHCI on
some other (non-PCI) bus.
Acked-by: Arnd Bergmann <arnd@arndb.de>
^ permalink raw reply
* Plz can anyone provide me link for downloading the mpc82xx package to configure the BDI2000
From: Pothina Satya Narayana, TLS,Chennai @ 2007-10-10 7:34 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 1336 bytes --]
Hi,
I'm new to this mailing list.
In my current project I'm using BDI2000 to program and debug the target
board contains MPC8247.
I struck up at initial stage itself. I don't have MPC82xx suitable
package ( loader file to BDI2000 ).
Please provide me the link or the file itself.
Thanks & Regards
satya
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^ permalink raw reply
* MPC8548 PCI Burst issue
From: FabioJo @ 2007-10-10 7:31 UTC (permalink / raw)
To: linuxppc-dev
I have an issue with a 8548 while I memcpy a block from DDR over a Tundra-60X
bridge.
I have been told by FS that the best way in my case is to use the DMA for
DDR to PCI transfer.
I can't find any reference or API for this implementation. May someone
points me on the right documentation or API.
My board looks like a CDS.
Thanks for any info.
--
View this message in context: http://www.nabble.com/MPC8548-PCI-Burst-issue-tf4599073.html#a13130850
Sent from the linuxppc-dev mailing list archive at Nabble.com.
^ permalink raw reply
* libfdt: Add functions to get/add/delete memory reservemap entries
From: David Gibson @ 2007-10-10 7:12 UTC (permalink / raw)
To: Jon Loeliger; +Cc: linuxppc-dev
This patch adds functions to libfdt for accessing the memory
reservation map section of a device tree blob. fdt_num_mem_rsv()
retreives the number of reservation entries in a dtb, and
fdt_get_mem_rsv() retreives a specific reservation entry.
fdt_add_mem_rsv() adds a new entry, and fdt_del_mem_rsv() removes a
specific numbered entry.
Testcases for these new functions are also included.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Index: dtc/libfdt/fdt_ro.c
===================================================================
--- dtc.orig/libfdt/fdt_ro.c 2007-10-10 17:04:09.000000000 +1000
+++ dtc/libfdt/fdt_ro.c 2007-10-10 17:04:09.000000000 +1000
@@ -87,6 +87,23 @@ char *fdt_string(const void *fdt, int st
return (char *)fdt + fdt_off_dt_strings(fdt) + stroffset;
}
+int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size)
+{
+ CHECK_HEADER(fdt);
+ *address = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->address);
+ *size = fdt64_to_cpu(_fdt_mem_rsv(fdt, n)->size);
+ return 0;
+}
+
+int fdt_num_mem_rsv(const void *fdt)
+{
+ int i = 0;
+
+ while (fdt64_to_cpu(_fdt_mem_rsv(fdt, i)->size) != 0)
+ i++;
+ return i;
+}
+
int fdt_subnode_offset_namelen(const void *fdt, int parentoffset,
const char *name, int namelen)
{
Index: dtc/libfdt/libfdt.h
===================================================================
--- dtc.orig/libfdt/libfdt.h 2007-10-10 17:04:09.000000000 +1000
+++ dtc/libfdt/libfdt.h 2007-10-10 17:04:09.000000000 +1000
@@ -112,6 +112,9 @@ int fdt_move(const void *fdt, void *buf,
/* Read-only functions */
char *fdt_string(const void *fdt, int stroffset);
+int fdt_get_mem_rsv(const void *fdt, int n, uint64_t *address, uint64_t *size);
+int fdt_num_mem_rsv(const void *fdt);
+
int fdt_subnode_offset_namelen(const void *fdt, int parentoffset,
const char *name, int namelen);
int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name);
@@ -183,6 +186,9 @@ int fdt_finish(void *fdt);
int fdt_open_into(void *fdt, void *buf, int bufsize);
int fdt_pack(void *fdt);
+int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size);
+int fdt_del_mem_rsv(void *fdt, int n);
+
int fdt_setprop(void *fdt, int nodeoffset, const char *name,
const void *val, int len);
#define fdt_setprop_typed(fdt, nodeoffset, name, val) \
Index: dtc/tests/trees.S
===================================================================
--- dtc.orig/tests/trees.S 2007-10-10 17:04:09.000000000 +1000
+++ dtc/tests/trees.S 2007-10-10 17:04:09.000000000 +1000
@@ -37,6 +37,11 @@ tree: \
FDTQUAD(addr) ; \
FDTQUAD(len) ;
+#define EMPTY_RSVMAP(tree) \
+ .balign 8 ; \
+tree##_rsvmap: ; \
+ RSVMAP_ENTRY(0, 0)
+
#define PROPHDR(tree, name, len) \
FDTLONG(FDT_PROP) ; \
FDTLONG(len) ; \
@@ -70,7 +75,10 @@ tree##_##name: \
TREE_HDR(test_tree1)
+ .balign 8
test_tree1_rsvmap:
+ RSVMAP_ENTRY(TEST_ADDR_1, TEST_SIZE_1)
+ RSVMAP_ENTRY(TEST_ADDR_2, TEST_SIZE_2)
RSVMAP_ENTRY(0, 0)
test_tree1_struct:
@@ -103,8 +111,7 @@ test_tree1_strings:
test_tree1_end:
TREE_HDR(truncated_property)
-truncated_property_rsvmap:
- RSVMAP_ENTRY(0, 0)
+ EMPTY_RSVMAP(truncated_property)
truncated_property_struct:
BEGIN_NODE("")
Index: dtc/tests/testdata.h
===================================================================
--- dtc.orig/tests/testdata.h 2007-10-10 17:04:09.000000000 +1000
+++ dtc/tests/testdata.h 2007-10-10 17:04:09.000000000 +1000
@@ -9,6 +9,17 @@
| (((x) << 8) & 0xff0000) | (((x) << 24) & 0xff000000))
#endif
+#ifdef __ASSEMBLY__
+#define ASM_CONST_LL(x) (x)
+#else
+#define ASM_CONST_LL(x) (x##ULL)
+#endif
+
+#define TEST_ADDR_1 ASM_CONST_LL(0xdeadbeef00000000)
+#define TEST_SIZE_1 ASM_CONST_LL(0x100000)
+#define TEST_ADDR_2 ASM_CONST_LL(0xabcd1234)
+#define TEST_SIZE_2 ASM_CONST_LL(0x1234)
+
#define TEST_VALUE_1 cell_to_fdt(0xdeadbeef)
#define TEST_VALUE_2 cell_to_fdt(0xabcd1234)
Index: dtc/tests/Makefile.tests
===================================================================
--- dtc.orig/tests/Makefile.tests 2007-10-10 17:04:09.000000000 +1000
+++ dtc/tests/Makefile.tests 2007-10-10 17:04:09.000000000 +1000
@@ -1,4 +1,5 @@
-LIB_TESTS_L = root_node find_property subnode_offset path_offset \
+LIB_TESTS_L = get_mem_rsv \
+ root_node find_property subnode_offset path_offset \
get_name getprop get_path supernode_atdepth_offset parent_offset \
node_offset_by_prop_value \
notfound \
Index: dtc/tests/run_tests.sh
===================================================================
--- dtc.orig/tests/run_tests.sh 2007-10-10 17:04:09.000000000 +1000
+++ dtc/tests/run_tests.sh 2007-10-10 17:04:09.000000000 +1000
@@ -31,6 +31,7 @@ tree1_tests () {
TREE=$1
# Read-only tests
+ run_test get_mem_rsv $TREE
run_test root_node $TREE
run_test find_property $TREE
run_test subnode_offset $TREE
Index: dtc/tests/sw_tree1.c
===================================================================
--- dtc.orig/tests/sw_tree1.c 2007-10-10 17:04:09.000000000 +1000
+++ dtc/tests/sw_tree1.c 2007-10-10 17:04:09.000000000 +1000
@@ -49,7 +49,10 @@ int main(int argc, char *argv[])
fdt = xmalloc(SPACE);
CHECK(fdt_create(fdt, SPACE));
+ CHECK(fdt_add_reservemap_entry(fdt, TEST_ADDR_1, TEST_SIZE_1));
+ CHECK(fdt_add_reservemap_entry(fdt, TEST_ADDR_2, TEST_SIZE_2));
CHECK(fdt_finish_reservemap(fdt));
+
CHECK(fdt_begin_node(fdt, ""));
CHECK(fdt_property_typed(fdt, "prop-int", TEST_VALUE_1));
CHECK(fdt_property_string(fdt, "prop-str", TEST_STRING_1));
Index: dtc/tests/test_tree1.dts
===================================================================
--- dtc.orig/tests/test_tree1.dts 2007-10-10 17:04:09.000000000 +1000
+++ dtc/tests/test_tree1.dts 2007-10-10 17:04:09.000000000 +1000
@@ -1,3 +1,6 @@
+/memreserve/ deadbeef00000000-deadbeef000fffff;
+/memreserve/ abcd1234 00001234;
+
/ {
prop-int = <deadbeef>;
prop-str = "hello world";
Index: dtc/libfdt/libfdt_internal.h
===================================================================
--- dtc.orig/libfdt/libfdt_internal.h 2007-10-10 17:04:09.000000000 +1000
+++ dtc/libfdt/libfdt_internal.h 2007-10-10 17:04:09.000000000 +1000
@@ -73,6 +73,18 @@ static inline void *_fdt_offset_ptr_w(vo
return (void *)_fdt_offset_ptr(fdt, offset);
}
+static inline const struct fdt_reserve_entry *_fdt_mem_rsv(const void *fdt, int n)
+{
+ const struct fdt_reserve_entry *rsv_table =
+ fdt + fdt_off_mem_rsvmap(fdt);
+
+ return rsv_table + n;
+}
+static inline struct fdt_reserve_entry *_fdt_mem_rsv_w(void *fdt, int n)
+{
+ return (void *)_fdt_mem_rsv(fdt, n);
+}
+
#define SW_MAGIC (~FDT_MAGIC)
#endif /* _LIBFDT_INTERNAL_H */
Index: dtc/tests/tests.h
===================================================================
--- dtc.orig/tests/tests.h 2007-10-10 17:04:09.000000000 +1000
+++ dtc/tests/tests.h 2007-10-10 17:04:09.000000000 +1000
@@ -108,6 +108,8 @@ static inline void *xrealloc(void *p, si
return p;
}
+void check_mem_rsv(void *fdt, int n, uint64_t addr, uint64_t size);
+
void check_property(void *fdt, int nodeoffset, const char *name,
int len, const void *val);
#define check_property_typed(fdt, nodeoffset, name, val) \
Index: dtc/tests/testutils.c
===================================================================
--- dtc.orig/tests/testutils.c 2007-10-10 17:04:09.000000000 +1000
+++ dtc/tests/testutils.c 2007-10-10 17:04:09.000000000 +1000
@@ -69,6 +69,21 @@ void test_init(int argc, char *argv[])
test_name, getpid());
}
+void check_mem_rsv(void *fdt, int n, uint64_t addr, uint64_t size)
+{
+ int err;
+ uint64_t addr_v, size_v;
+
+ err = fdt_get_mem_rsv(fdt, n, &addr_v, &size_v);
+ if (err < 0)
+ FAIL("fdt_get_mem_rsv(%d): %s", n, fdt_strerror(err));
+ if ((addr_v != addr) || (size_v != size))
+ FAIL("fdt_get_mem_rsv() returned (0x%llx,0x%llx) "
+ "instead of (0x%llx,0x%llx)",
+ (unsigned long long)addr_v, (unsigned long long)size_v,
+ (unsigned long long)addr, (unsigned long long)size);
+}
+
void check_property(void *fdt, int nodeoffset, const char *name,
int len, const void *val)
{
Index: dtc/libfdt/fdt_rw.c
===================================================================
--- dtc.orig/libfdt/fdt_rw.c 2007-10-10 17:04:09.000000000 +1000
+++ dtc/libfdt/fdt_rw.c 2007-10-10 17:04:09.000000000 +1000
@@ -101,6 +101,19 @@ static int _blob_splice(void *fdt, void
return 0;
}
+static int _blob_splice_mem_rsv(void *fdt, struct fdt_reserve_entry *p,
+ int oldn, int newn)
+{
+ int delta = (newn - oldn) * sizeof(*p);
+ int err;
+ err = _blob_splice(fdt, p, oldn * sizeof(*p), newn * sizeof(*p));
+ if (err)
+ return err;
+ fdt_set_header(fdt, off_dt_struct, fdt_off_dt_struct(fdt) + delta);
+ fdt_set_header(fdt, off_dt_strings, fdt_off_dt_strings(fdt) + delta);
+ return 0;
+}
+
static int _blob_splice_struct(void *fdt, void *p,
int oldlen, int newlen)
{
@@ -149,6 +162,40 @@ static int _find_add_string(void *fdt, c
return (new - strtab);
}
+int fdt_add_mem_rsv(void *fdt, uint64_t address, uint64_t size)
+{
+ struct fdt_reserve_entry *re;
+ int err;
+
+ if ((err = rw_check_header(fdt)))
+ return err;
+
+ re = _fdt_mem_rsv_w(fdt, fdt_num_mem_rsv(fdt));
+ err = _blob_splice_mem_rsv(fdt, re, 0, 1);
+ if (err)
+ return err;
+
+ re->address = cpu_to_fdt64(address);
+ re->size = cpu_to_fdt64(size);
+ return 0;
+}
+
+int fdt_del_mem_rsv(void *fdt, int n)
+{
+ struct fdt_reserve_entry *re = _fdt_mem_rsv_w(fdt, n);
+ int err;
+
+ if ((err = rw_check_header(fdt)))
+ return err;
+ if (n >= fdt_num_mem_rsv(fdt))
+ return -FDT_ERR_NOTFOUND;
+
+ err = _blob_splice_mem_rsv(fdt, re, 1, 0);
+ if (err)
+ return err;
+ return 0;
+}
+
static int _resize_property(void *fdt, int nodeoffset, const char *name, int len,
struct fdt_property **prop)
{
Index: dtc/tests/rw_tree1.c
===================================================================
--- dtc.orig/tests/rw_tree1.c 2007-10-10 17:04:09.000000000 +1000
+++ dtc/tests/rw_tree1.c 2007-10-10 17:04:09.000000000 +1000
@@ -69,6 +69,9 @@ int main(int argc, char *argv[])
CHECK(fdt_open_into(fdt, fdt, SPACE));
+ CHECK(fdt_add_mem_rsv(fdt, TEST_ADDR_1, TEST_SIZE_1));
+ CHECK(fdt_add_mem_rsv(fdt, TEST_ADDR_2, TEST_SIZE_2));
+
CHECK(fdt_setprop_typed(fdt, 0, "prop-int", TEST_VALUE_1));
CHECK(fdt_setprop_string(fdt, 0, "prop-str", TEST_STRING_1));
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [RFC][POWERPC] Add arch/powerpc 4xx NDFC (NAND) support
From: David Gibson @ 2007-10-10 6:38 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev
In-Reply-To: <200710100832.13105.sr@denx.de>
On Wed, Oct 10, 2007 at 08:32:12AM +0200, Stefan Roese wrote:
> This patch makes the PPC4xx NAND flash controller (NDFC) device-tree
> friendly using OF glue code to create and insert necessary platform
> devices. Such "constructor" approach makes NAND usable under
> arch/powerpc yet keeping full compatibility with arch/ppc.
>
> This patch also introduces a "common" (not NOR only)
> of_parse_flash_partitions() routine in mtdpart.c that can/should be
> used by all drivers parsing device-tree partition informations. The
> current implementation is not compatible with the current physmap_of
> version and needs some additional work to make it really usable from
> both "drivers", physmap_of and ndfc_of. I'm just posting it right now
> to get some feedback, since this stuff is already sitting here too
> long on my disk and waiting for upstream merge.
>
> Any feedback welcome. Thanks.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
>
> ---
> commit 721a340398e66872b9cc7e8b630fc92a7681ca04
> tree ffbe1194146cb4fc324755f35c9062025b7ec0f6
> parent 26f571d7c968dbd30656fc1421eeb0d9088aaad9
> author Stefan Roese <sr@denx.de> Mon, 08 Oct 2007 16:00:49 +0200
> committer Stefan Roese <sr@denx.de> Mon, 08 Oct 2007 16:00:49 +0200
>
> arch/powerpc/boot/dts/sequoia.dts | 32 +++++++
> arch/powerpc/platforms/44x/Makefile | 6 +
> arch/powerpc/platforms/44x/ndfc_of.c | 158 ++++++++++++++++++++++++++++++++++
> drivers/mtd/mtdpart.c | 61 +++++++++++++
> drivers/mtd/nand/ndfc.c | 6 +
> include/linux/mtd/partitions.h | 2
> 6 files changed, 264 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
> index 36be75b..9b15482 100644
> --- a/arch/powerpc/boot/dts/sequoia.dts
> +++ b/arch/powerpc/boot/dts/sequoia.dts
> @@ -122,6 +122,38 @@
> interrupt-map-mask = <ffffffff>;
> };
>
> + ndfc@1d0000000, {
> + device_type = "nand";
Ditch the device_type. There's no call for it here.
> + compatible = "ibm,ndfc";
This should probably have a more specific value for the revision in
addition to ibm,ndfc.
> + reg = <1 d0000000 2000>;
> +
> + #address-cells = <1>;
> + #size-cells = <1>;
> + /* ndfc stuff, composed off ndfc_settings. */
> + /* select bank on CE[3], 4 Addr, 1 Col 3 Row 512b page */
> + ccr-settings = <3001000>;
> +
> + chip@0 {
> + device_type = "nand-chip";
Ditch this device_type too, it makes absolutely no sense here. You
probably should have a compatible, though.
> + reg = <0 1>;
I don't really know how the ndfc works. Can the reg size here ever be
anything other than 1 sensibly? If not, then you should set
#size-cells=0 instead.
> + chip-nr = <1>;
> + chip-offset = <3>;
> + chip-delay = <50>;
> + chip-bank-settings = <80002222>;
> +
> + /* normal NAND ECC stuff */
> + ecc-bytes = <6>;
> + ecc-pos = <0 1 2 3 6 7>;
> + /* list of tuples assumed here */
> + ecc-oobfree = <8 8>;
> +
> + partition@0 {
Ok, the partitions really are per-chip, not across the controller's
domain as a whole? Oh and if this is here, then the chip needs
#address-cells and #size-cells.
> + label = "content";
> + reg = <0 0>;
> + };
> + };
> + };
> +
> POB0: opb {
> compatible = "ibm,opb-440epx", "ibm,opb";
> #address-cells = <1>;
> diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
> index 10ce674..d6195ee 100644
> --- a/arch/powerpc/platforms/44x/Makefile
> +++ b/arch/powerpc/platforms/44x/Makefile
> @@ -1,4 +1,8 @@
> obj-$(CONFIG_44x) := misc_44x.o
> obj-$(CONFIG_EBONY) += ebony.o
> -obj-$(CONFIG_BAMBOO) += bamboo.o
> +obj-$(CONFIG_BAMBOO) += bamboo.o
> obj-$(CONFIG_SEQUOIA) += sequoia.o
> +
> +ifeq ($(CONFIG_MTD_NAND_NDFC),y)
> +obj-y += ndfc_of.o
> +endif
> diff --git a/arch/powerpc/platforms/44x/ndfc_of.c b/arch/powerpc/platforms/44x/ndfc_of.c
> new file mode 100644
> index 0000000..e5b41cf
> --- /dev/null
> +++ b/arch/powerpc/platforms/44x/ndfc_of.c
> @@ -0,0 +1,158 @@
> +/*
> + * PPC4xx NAND wrapper from device tree to platform device
> + *
> + * Stefan Roese <sr@denx.de>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +#include <linux/stddef.h>
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/errno.h>
> +#include <linux/io.h>
> +#include <linux/mtd/mtd.h>
> +#include <linux/mtd/partitions.h>
> +#include <linux/mtd/nand.h>
> +#include <linux/mtd/ndfc.h>
> +#include <linux/of.h>
> +
> +static struct ndfc_controller_settings ndfc_settings;
> +static struct platform_nand_ctrl nand_ctrl = {
> + .priv = &ndfc_settings,
> +};
> +
> +static struct ndfc_chip_settings chip_settings;
> +static struct nand_ecclayout ecclayout;
> +static struct mtd_partition *nand_parts;
> +
> +static struct platform_nand_chip nand_chip = {
> + .ecclayout = &ecclayout,
> + .priv = &chip_settings,
> +};
> +
> +static struct resource r;
> +
> +static struct platform_device ndfc_dev = {
> + .name = "ndfc-nand",
> + .id = 0,
> + .num_resources = 1,
> + .resource = &r,
> + .dev = {
> + .platform_data = &nand_ctrl,
> + }
> +};
> +
> +static struct platform_device nand_dev = {
> + .name = "ndfc-chip",
> + .id = 0,
> + .num_resources = 1,
> + .resource = &r,
> + .dev = {
> + .platform_data = &nand_chip,
> + .parent = &ndfc_dev.dev,
> + }
> +};
> +
> +/* Until this will be settled */
> +static inline u32 of_get_int(struct device_node *np, const char *name)
> +{
> + unsigned int size;
> + const u32 *prop = of_get_property(np, name, &size);
> +
> + if ((prop == NULL) || (size != sizeof(int))) {
> + printk(KERN_WARNING "%s property missing!\n", __FUNCTION__);
> + return 0;
> + }
> +
> + return *prop;
> +}
> +
> +static int ppc4xx_setup_nand_chip_node(struct device_node *dev)
> +{
> + unsigned int what = -ENODEV;
> + unsigned int size, amnt;
> + const u32 *prop;
> + int i;
> +
> + /* process necessary properties */
> + what = of_get_int(dev, "chip-nr");
> + nand_chip.nr_chips = what;
> +
> + what = of_get_int(dev, "chip-offset");
> + nand_chip.chip_offset = what;
> +
> + what = of_get_int(dev, "chip-delay");
> + nand_chip.chip_delay = what;
> +
> + what = of_get_int(dev, "ecc-bytes");
> + ecclayout.eccbytes = what;
> +
> + what = of_get_int(dev, "chip-bank-settings");
> + chip_settings.bank_settings = what;
> +
> + prop = of_get_property(dev, "ecc-pos", &size);
> + for (i = 0; i < (size/sizeof(unsigned int)); i++)
> + ecclayout.eccpos[i] = prop[i];
> +
> + prop = of_get_property(dev, "ecc-oobfree", &size);
> + amnt = size/sizeof(unsigned int);
> +
> + for (i = 0; i < amnt; i += 2) {
> + nand_chip.ecclayout->oobfree[i].offset = prop[i];
> + nand_chip.ecclayout->oobfree[i].length = prop[i+1];
> + }
> +
> + nand_chip.nr_partitions = of_parse_flash_partitions(dev, &nand_parts);
> + nand_chip.partitions = nand_parts;
> +
> + return 0;
> +}
> +
> +static int __init ppc4xx_setup_nand_node(struct device_node *dev)
> +{
> + struct device_node *child = NULL;
> + int ret = 0;
> +
> + memset(&r, 0, sizeof(r));
> +
> + /* generic NDFC register */
> + ret = of_address_to_resource(dev, 0, &r);
> + if (ret)
> + goto err;
> +
> + /* Now let's create platform_data stuff based on dts entries */
> + ret = of_get_int(dev, "ccr-settings");
> +
> + ndfc_settings.ccr_settings = ret;
> + ndfc_settings.ndfc_erpn = r.start & 0xf00000000ULL;
> +
> + child = of_get_next_child(dev, NULL);
> + /* NAND platform device is sole, so assuming one child of ndfc node */
> + if (child != NULL)
> + ppc4xx_setup_nand_chip_node(child);
> +
> + ndfc_dev.resource = &r;
> + nand_dev.resource = &r;
> +
> + platform_device_register(&ndfc_dev);
> + platform_device_register(&nand_dev);
> +
> +err:
> + return ret;
> +}
> +
> +static int ppc4xx_init_nand(void)
> +{
> + struct device_node *np =
> + of_find_compatible_node(NULL, "nand", "ibm,ndfc");
> +
> + if (np != NULL)
> + ppc4xx_setup_nand_node(np);
> +
> + return 0;
> +}
> +arch_initcall(ppc4xx_init_nand);
> diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
> index 6174a97..cc620ee 100644
> --- a/drivers/mtd/mtdpart.c
> +++ b/drivers/mtd/mtdpart.c
> @@ -21,6 +21,10 @@
> #include <linux/mtd/partitions.h>
> #include <linux/mtd/compatmac.h>
>
> +#ifdef CONFIG_PPC_MERGE
> +#include <linux/of.h>
> +#endif
> +
> /* Our partition linked list */
> static LIST_HEAD(mtd_partitions);
>
> @@ -557,6 +561,63 @@ int parse_mtd_partitions(struct mtd_info *master, const char **types,
> return ret;
> }
>
> +#ifdef CONFIG_PPC_MERGE
> +int of_parse_flash_partitions(struct device_node *dp,
> + struct mtd_partition **mparts)
> +{
> + int nr_parts = 0;
> + int i;
> + struct device_node *pp;
> + const char *partname;
> + struct mtd_partition *parts;
> +
> + /* First count the subnodes */
> + for (pp = dp->child; pp; pp = pp->sibling)
> + nr_parts++;
> +
> + if (nr_parts) {
> + parts = kzalloc(nr_parts * sizeof(struct mtd_partition),
> + GFP_KERNEL);
> + if (!parts) {
> + printk(KERN_ERR
> + "Can't allocate the flash partition data!\n");
> + return -ENOMEM;
> + }
> +
> + for (pp = dp->child, i = 0 ; pp; pp = pp->sibling, i++) {
> + const u32 *reg;
> + int len;
> +
> + reg = of_get_property(pp, "reg", &len);
> + if (!reg || (len != 2*sizeof(u32))) {
> + printk(KERN_ERR "Invalid 'reg' on %s\n",
> + dp->full_name);
> + kfree(parts);
> + parts = NULL;
> + return -EINVAL;
> + }
> + parts[i].offset = reg[0];
> + parts[i].size = reg[1];
> +
> + partname = of_get_property(pp, "label", &len);
> + if (!partname)
> + partname = of_get_property(pp, "name", &len);
> + parts[i].name = (char *)partname;
> + if (of_get_property(pp, "read-only", &len))
> + parts[i].mask_flags = MTD_WRITEABLE;
> + (*mparts) = parts;
> + }
> + } else {
> + printk(KERN_ERR
> + "Node %s does not seem to contain partitions definition!\n",
> + dp->full_name);
> + return -EINVAL;
> + }
> +
> + return nr_parts;
> +}
> +#endif
> +
> EXPORT_SYMBOL_GPL(parse_mtd_partitions);
> EXPORT_SYMBOL_GPL(register_mtd_parser);
> EXPORT_SYMBOL_GPL(deregister_mtd_parser);
> diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
> index fd7a8d5..7901019 100644
> --- a/drivers/mtd/nand/ndfc.c
> +++ b/drivers/mtd/nand/ndfc.c
> @@ -24,7 +24,9 @@
> #include <linux/platform_device.h>
>
> #include <asm/io.h>
> +#ifndef CONFIG_PPC_MERGE
> #include <asm/ibm44x.h>
> +#endif
>
> struct ndfc_nand_mtd {
> struct mtd_info mtd;
> @@ -230,7 +232,11 @@ static int ndfc_nand_probe(struct platform_device *pdev)
> struct ndfc_controller *ndfc = &ndfc_ctrl;
> unsigned long long phys = settings->ndfc_erpn | res->start;
>
> +#if !defined(CONFIG_PHYS_64BIT) || defined(CONFIG_PPC_MERGE)
> + ndfc->ndfcbase = ioremap((phys_addr_t)phys, res->end - res->start + 1);
> +#else
> ndfc->ndfcbase = ioremap64(phys, res->end - res->start + 1);
> +#endif
> if (!ndfc->ndfcbase) {
> printk(KERN_ERR "NDFC: ioremap failed\n");
> return -EIO;
> diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
> index da6b3d6..546a098 100644
> --- a/include/linux/mtd/partitions.h
> +++ b/include/linux/mtd/partitions.h
> @@ -68,6 +68,8 @@ extern int register_mtd_parser(struct mtd_part_parser *parser);
> extern int deregister_mtd_parser(struct mtd_part_parser *parser);
> extern int parse_mtd_partitions(struct mtd_info *master, const char **types,
> struct mtd_partition **pparts, unsigned long origin);
> +extern int of_parse_flash_partitions(struct device_node *node,
> + struct mtd_partition **parts);
>
> #define put_partition_parser(p) do { module_put((p)->owner); } while(0)
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [linux-usb-devel] [PATCH 0/3] usb: ehci ppc device-tree-aware driver
From: David Brownell @ 2007-10-10 6:27 UTC (permalink / raw)
To: linux-usb-devel; +Cc: linuxppc-dev
In-Reply-To: <20070924192519.GA4192@ru.mvista.com>
On Monday 24 September 2007, Valentine Barshak wrote:
> Some PowerPC systems have a built-in EHCI controller.
> This is a device tree aware version of the EHCI controller driver.
> Currently it's been tested on the PowerPC 440EPx Sequoia board.
> Other platforms can be added later.
> The code is based on the ehci-ppc-soc driver by Stefan Roese <sr@denx.de>.
Do PPC folk sign off on how this is done?
I don't follow all the ins/outs of the OF devtree stuff...
^ permalink raw reply
* [RFC][POWERPC] Add arch/powerpc 4xx NDFC (NAND) support
From: Stefan Roese @ 2007-10-10 6:32 UTC (permalink / raw)
To: linuxppc-dev
This patch makes the PPC4xx NAND flash controller (NDFC) device-tree
friendly using OF glue code to create and insert necessary platform
devices. Such "constructor" approach makes NAND usable under
arch/powerpc yet keeping full compatibility with arch/ppc.
This patch also introduces a "common" (not NOR only)
of_parse_flash_partitions() routine in mtdpart.c that can/should be
used by all drivers parsing device-tree partition informations. The
current implementation is not compatible with the current physmap_of
version and needs some additional work to make it really usable from
both "drivers", physmap_of and ndfc_of. I'm just posting it right now
to get some feedback, since this stuff is already sitting here too
long on my disk and waiting for upstream merge.
Any feedback welcome. Thanks.
Signed-off-by: Stefan Roese <sr@denx.de>
---
commit 721a340398e66872b9cc7e8b630fc92a7681ca04
tree ffbe1194146cb4fc324755f35c9062025b7ec0f6
parent 26f571d7c968dbd30656fc1421eeb0d9088aaad9
author Stefan Roese <sr@denx.de> Mon, 08 Oct 2007 16:00:49 +0200
committer Stefan Roese <sr@denx.de> Mon, 08 Oct 2007 16:00:49 +0200
arch/powerpc/boot/dts/sequoia.dts | 32 +++++++
arch/powerpc/platforms/44x/Makefile | 6 +
arch/powerpc/platforms/44x/ndfc_of.c | 158 ++++++++++++++++++++++++++++++++++
drivers/mtd/mtdpart.c | 61 +++++++++++++
drivers/mtd/nand/ndfc.c | 6 +
include/linux/mtd/partitions.h | 2
6 files changed, 264 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index 36be75b..9b15482 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -122,6 +122,38 @@
interrupt-map-mask = <ffffffff>;
};
+ ndfc@1d0000000, {
+ device_type = "nand";
+ compatible = "ibm,ndfc";
+ reg = <1 d0000000 2000>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* ndfc stuff, composed off ndfc_settings. */
+ /* select bank on CE[3], 4 Addr, 1 Col 3 Row 512b page */
+ ccr-settings = <3001000>;
+
+ chip@0 {
+ device_type = "nand-chip";
+ reg = <0 1>;
+ chip-nr = <1>;
+ chip-offset = <3>;
+ chip-delay = <50>;
+ chip-bank-settings = <80002222>;
+
+ /* normal NAND ECC stuff */
+ ecc-bytes = <6>;
+ ecc-pos = <0 1 2 3 6 7>;
+ /* list of tuples assumed here */
+ ecc-oobfree = <8 8>;
+
+ partition@0 {
+ label = "content";
+ reg = <0 0>;
+ };
+ };
+ };
+
POB0: opb {
compatible = "ibm,opb-440epx", "ibm,opb";
#address-cells = <1>;
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 10ce674..d6195ee 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -1,4 +1,8 @@
obj-$(CONFIG_44x) := misc_44x.o
obj-$(CONFIG_EBONY) += ebony.o
-obj-$(CONFIG_BAMBOO) += bamboo.o
+obj-$(CONFIG_BAMBOO) += bamboo.o
obj-$(CONFIG_SEQUOIA) += sequoia.o
+
+ifeq ($(CONFIG_MTD_NAND_NDFC),y)
+obj-y += ndfc_of.o
+endif
diff --git a/arch/powerpc/platforms/44x/ndfc_of.c b/arch/powerpc/platforms/44x/ndfc_of.c
new file mode 100644
index 0000000..e5b41cf
--- /dev/null
+++ b/arch/powerpc/platforms/44x/ndfc_of.c
@@ -0,0 +1,158 @@
+/*
+ * PPC4xx NAND wrapper from device tree to platform device
+ *
+ * Stefan Roese <sr@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/ndfc.h>
+#include <linux/of.h>
+
+static struct ndfc_controller_settings ndfc_settings;
+static struct platform_nand_ctrl nand_ctrl = {
+ .priv = &ndfc_settings,
+};
+
+static struct ndfc_chip_settings chip_settings;
+static struct nand_ecclayout ecclayout;
+static struct mtd_partition *nand_parts;
+
+static struct platform_nand_chip nand_chip = {
+ .ecclayout = &ecclayout,
+ .priv = &chip_settings,
+};
+
+static struct resource r;
+
+static struct platform_device ndfc_dev = {
+ .name = "ndfc-nand",
+ .id = 0,
+ .num_resources = 1,
+ .resource = &r,
+ .dev = {
+ .platform_data = &nand_ctrl,
+ }
+};
+
+static struct platform_device nand_dev = {
+ .name = "ndfc-chip",
+ .id = 0,
+ .num_resources = 1,
+ .resource = &r,
+ .dev = {
+ .platform_data = &nand_chip,
+ .parent = &ndfc_dev.dev,
+ }
+};
+
+/* Until this will be settled */
+static inline u32 of_get_int(struct device_node *np, const char *name)
+{
+ unsigned int size;
+ const u32 *prop = of_get_property(np, name, &size);
+
+ if ((prop == NULL) || (size != sizeof(int))) {
+ printk(KERN_WARNING "%s property missing!\n", __FUNCTION__);
+ return 0;
+ }
+
+ return *prop;
+}
+
+static int ppc4xx_setup_nand_chip_node(struct device_node *dev)
+{
+ unsigned int what = -ENODEV;
+ unsigned int size, amnt;
+ const u32 *prop;
+ int i;
+
+ /* process necessary properties */
+ what = of_get_int(dev, "chip-nr");
+ nand_chip.nr_chips = what;
+
+ what = of_get_int(dev, "chip-offset");
+ nand_chip.chip_offset = what;
+
+ what = of_get_int(dev, "chip-delay");
+ nand_chip.chip_delay = what;
+
+ what = of_get_int(dev, "ecc-bytes");
+ ecclayout.eccbytes = what;
+
+ what = of_get_int(dev, "chip-bank-settings");
+ chip_settings.bank_settings = what;
+
+ prop = of_get_property(dev, "ecc-pos", &size);
+ for (i = 0; i < (size/sizeof(unsigned int)); i++)
+ ecclayout.eccpos[i] = prop[i];
+
+ prop = of_get_property(dev, "ecc-oobfree", &size);
+ amnt = size/sizeof(unsigned int);
+
+ for (i = 0; i < amnt; i += 2) {
+ nand_chip.ecclayout->oobfree[i].offset = prop[i];
+ nand_chip.ecclayout->oobfree[i].length = prop[i+1];
+ }
+
+ nand_chip.nr_partitions = of_parse_flash_partitions(dev, &nand_parts);
+ nand_chip.partitions = nand_parts;
+
+ return 0;
+}
+
+static int __init ppc4xx_setup_nand_node(struct device_node *dev)
+{
+ struct device_node *child = NULL;
+ int ret = 0;
+
+ memset(&r, 0, sizeof(r));
+
+ /* generic NDFC register */
+ ret = of_address_to_resource(dev, 0, &r);
+ if (ret)
+ goto err;
+
+ /* Now let's create platform_data stuff based on dts entries */
+ ret = of_get_int(dev, "ccr-settings");
+
+ ndfc_settings.ccr_settings = ret;
+ ndfc_settings.ndfc_erpn = r.start & 0xf00000000ULL;
+
+ child = of_get_next_child(dev, NULL);
+ /* NAND platform device is sole, so assuming one child of ndfc node */
+ if (child != NULL)
+ ppc4xx_setup_nand_chip_node(child);
+
+ ndfc_dev.resource = &r;
+ nand_dev.resource = &r;
+
+ platform_device_register(&ndfc_dev);
+ platform_device_register(&nand_dev);
+
+err:
+ return ret;
+}
+
+static int ppc4xx_init_nand(void)
+{
+ struct device_node *np =
+ of_find_compatible_node(NULL, "nand", "ibm,ndfc");
+
+ if (np != NULL)
+ ppc4xx_setup_nand_node(np);
+
+ return 0;
+}
+arch_initcall(ppc4xx_init_nand);
diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c
index 6174a97..cc620ee 100644
--- a/drivers/mtd/mtdpart.c
+++ b/drivers/mtd/mtdpart.c
@@ -21,6 +21,10 @@
#include <linux/mtd/partitions.h>
#include <linux/mtd/compatmac.h>
+#ifdef CONFIG_PPC_MERGE
+#include <linux/of.h>
+#endif
+
/* Our partition linked list */
static LIST_HEAD(mtd_partitions);
@@ -557,6 +561,63 @@ int parse_mtd_partitions(struct mtd_info *master, const char **types,
return ret;
}
+#ifdef CONFIG_PPC_MERGE
+int of_parse_flash_partitions(struct device_node *dp,
+ struct mtd_partition **mparts)
+{
+ int nr_parts = 0;
+ int i;
+ struct device_node *pp;
+ const char *partname;
+ struct mtd_partition *parts;
+
+ /* First count the subnodes */
+ for (pp = dp->child; pp; pp = pp->sibling)
+ nr_parts++;
+
+ if (nr_parts) {
+ parts = kzalloc(nr_parts * sizeof(struct mtd_partition),
+ GFP_KERNEL);
+ if (!parts) {
+ printk(KERN_ERR
+ "Can't allocate the flash partition data!\n");
+ return -ENOMEM;
+ }
+
+ for (pp = dp->child, i = 0 ; pp; pp = pp->sibling, i++) {
+ const u32 *reg;
+ int len;
+
+ reg = of_get_property(pp, "reg", &len);
+ if (!reg || (len != 2*sizeof(u32))) {
+ printk(KERN_ERR "Invalid 'reg' on %s\n",
+ dp->full_name);
+ kfree(parts);
+ parts = NULL;
+ return -EINVAL;
+ }
+ parts[i].offset = reg[0];
+ parts[i].size = reg[1];
+
+ partname = of_get_property(pp, "label", &len);
+ if (!partname)
+ partname = of_get_property(pp, "name", &len);
+ parts[i].name = (char *)partname;
+ if (of_get_property(pp, "read-only", &len))
+ parts[i].mask_flags = MTD_WRITEABLE;
+ (*mparts) = parts;
+ }
+ } else {
+ printk(KERN_ERR
+ "Node %s does not seem to contain partitions definition!\n",
+ dp->full_name);
+ return -EINVAL;
+ }
+
+ return nr_parts;
+}
+#endif
+
EXPORT_SYMBOL_GPL(parse_mtd_partitions);
EXPORT_SYMBOL_GPL(register_mtd_parser);
EXPORT_SYMBOL_GPL(deregister_mtd_parser);
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index fd7a8d5..7901019 100644
--- a/drivers/mtd/nand/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c
@@ -24,7 +24,9 @@
#include <linux/platform_device.h>
#include <asm/io.h>
+#ifndef CONFIG_PPC_MERGE
#include <asm/ibm44x.h>
+#endif
struct ndfc_nand_mtd {
struct mtd_info mtd;
@@ -230,7 +232,11 @@ static int ndfc_nand_probe(struct platform_device *pdev)
struct ndfc_controller *ndfc = &ndfc_ctrl;
unsigned long long phys = settings->ndfc_erpn | res->start;
+#if !defined(CONFIG_PHYS_64BIT) || defined(CONFIG_PPC_MERGE)
+ ndfc->ndfcbase = ioremap((phys_addr_t)phys, res->end - res->start + 1);
+#else
ndfc->ndfcbase = ioremap64(phys, res->end - res->start + 1);
+#endif
if (!ndfc->ndfcbase) {
printk(KERN_ERR "NDFC: ioremap failed\n");
return -EIO;
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index da6b3d6..546a098 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -68,6 +68,8 @@ extern int register_mtd_parser(struct mtd_part_parser *parser);
extern int deregister_mtd_parser(struct mtd_part_parser *parser);
extern int parse_mtd_partitions(struct mtd_info *master, const char **types,
struct mtd_partition **pparts, unsigned long origin);
+extern int of_parse_flash_partitions(struct device_node *node,
+ struct mtd_partition **parts);
#define put_partition_parser(p) do { module_put((p)->owner); } while(0)
^ permalink raw reply related
* Re: bootwrapper: relative finddevice()
From: David Gibson @ 2007-10-10 5:47 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev@ozlabs.org list
In-Reply-To: <470AA012.9080401@freescale.com>
On Mon, Oct 08, 2007 at 04:24:34PM -0500, Scott Wood wrote:
> I'd like to expose flatdevtree's ability to do relative path lookups in
> ops, and I'd prefer to extend the existing finddevice method rather than
> add a new finddevice_rel. However, I'm not very familiar with real OF
> -- how would one go about fixing its implementation?
Well, it should be possible to do package-to-path on the start node,
join the paths then finddevice on the result. I'm not sure if there's
an easier way.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* concern related to Functions For executing Longer delay in driver
From: Misbah khan @ 2007-10-10 4:55 UTC (permalink / raw)
To: linuxppc-embedded
Hi all....
I am working on a driver which is Pooling for a bit in hardware. And here is
my concern :-
1. The worst case time delay could be 400 ms for which i am pooling every 50
ms eg :-
while((test_bit(PIC_BUSY,(volatile UINT32*)((void
*)mmap_reg_ptr+FR_FPGA_STATUS_REG))==1)&& (delay < MAX_DELAY_PIC)){
KDEBUG1(" In PIC busy state \n");
msleep_interruptible(PIC_DELAY);
delay +=PIC_DELAY;
}/* End of if() */
2. This function will be called after every 1 min and i do have to poll for
400 ms (worst case) after every 1 min.
3. i have a wait queue Implimented in the driver which will be schedule to
be executed every time interrupt occurs (worst case 1ms).
3. The delay function which will make the driver to poll for the bit in the
hardware which you could see in the above example is
msleep_interruptible(PIC_DELAY);
4. As far as my knowledge we could use either mdelay() ,msleep(),
msleep_interruptible(), or schedule_timeout() for such long delays. I have
used msleep_interruptible() but still i feel as per the senario if i could
get a better option which will make my driver more effecient.
5. Please let me know which could be the best and reliable fn() for this
approach and please let me know the reason also .
Thank you
Misbah
--
View this message in context: http://www.nabble.com/concern-related-to-Functions-For-executing-Longer-delay-in-driver-tf4598583.html#a13129401
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* Re: include/asm/cpm2.h:14:21: error: asm/cpm.h: No such file or directory
From: Misbah khan @ 2007-10-10 4:03 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <13090379.post@talk.nabble.com>
Please Let me know the Status
Misbah
Misbah khan wrote:
>
>
>
>
> Timur Tabi-3 wrote:
>>
>> Kumar, this is what I get when I compile your 2.6.24 branch for the 8610:
>>
>> CC arch/powerpc/sysdev/fsl_soc.o
>> In file included from arch/powerpc/sysdev/fsl_soc.c:40:
>> include/asm/cpm2.h:14:21: error: asm/cpm.h: No such file or directory
>> make[1]: *** [arch/powerpc/sysdev/fsl_soc.o] Error 1
>> make: *** [arch/powerpc/sysdev] Error 2
>>
>> I guess the file /asm/cpm2.h is not present in the kernel source , You
>> need to go through the source and see what asm file is being provided for
>> you to access the communication processor specific register (i assume you
>> are accessing/assigning to processor register)
>>
>> Commenting out the "#include <asm/cpm.h>" in cpm2.h makes the compilation
>> failure go away, but I don't know if that's the proper fix, since the
>> 8610
>> doesn't have a CPM.
>>
>> Are u including #include <asm/cpm.h> or <asm/cpm2.h> ???????
>>
>> Processor registers are memory mapped and you can access it directly by
>> including proper asm file ,and writing to the structure element of the
>> file by using Pointer to comm processor
>>
>> If you could let me know what is the operation that you need to perform
>> on comm process register and which register you need to access then i
>> could be in better position to help you
>>
>> Misbah
>> --
>> Timur Tabi
>> Linux Kernel Developer @ Freescale
>> _______________________________________________
>> Linuxppc-dev mailing list
>> Linuxppc-dev@ozlabs.org
>> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>>
>>
>
>
--
View this message in context: http://www.nabble.com/include-asm-cpm2.h%3A14%3A21%3A-error%3A-asm-cpm.h%3A-No-such-file-or-directory-tf4571911.html#a13129025
Sent from the linuxppc-dev mailing list archive at Nabble.com.
^ permalink raw reply
* Re: Build failure on treeboot-walnut.cg
From: David Gibson @ 2007-10-10 2:35 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, Paul Mackerras, Timur Tabi
In-Reply-To: <20071009160645.GA4304@loki.buserror.net>
On Tue, Oct 09, 2007 at 11:06:45AM -0500, Scott Wood wrote:
> On Tue, Oct 09, 2007 at 01:07:29PM +1000, David Gibson wrote:
> > On Mon, Oct 08, 2007 at 04:33:24PM -0500, Timur Tabi wrote:
> > > Question: I'm building a kernel for the 8610. Why is treeboot-walnut.c
> > > being compiled at all?
> >
> > Policy. Compiling everything means build bugs - like this one - can
> > be found by everybody, not just those building for the specific
> > obscure platform.
>
> Of course, it also introduces bugs that wouldn't have been an issue if we
> didn't try to build everything with the same toolchain. :-P
>
> I'm also somewhat worried what it'll do to build time as platforms
> accumulate.
It also provides incentive to keep the bootwrapper small...
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: Build failure on treeboot-walnut.cg
From: David Gibson @ 2007-10-10 2:35 UTC (permalink / raw)
To: Timur Tabi; +Cc: Paul Mackerras, linuxppc-dev
In-Reply-To: <470BA6ED.3020504@freescale.com>
On Tue, Oct 09, 2007 at 11:06:05AM -0500, Timur Tabi wrote:
> David Gibson wrote:
>
> > Policy. Compiling everything means build bugs - like this one - can
> > be found by everybody, not just those building for the specific
> > obscure platform.
>
> Is this a new policy? Modules in the kernel are not built unless you want
> them. Even in arch/powerpc/platforms, only the specific platform file I'm
> targeting is built. So I don't really understand why you claim it's normal
> for platform-specific files to be built, regardless of the actual
> platform.
It has been policy as long as we've had the platform+library structure
in arch/powerpc/boot.
> And frankly, I don't like this "policy". Build bugs for 4xx should not
> interfere in my 83xx development. I can't build any kernels now because of
> this bug!
Argue with Paulus.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH] ehea: use kernel event queue
From: Jeff Garzik @ 2007-10-10 0:39 UTC (permalink / raw)
To: Jan-Bernd Themann
Cc: Thomas Klein, Jan-Bernd Themann, netdev, linux-kernel, linux-ppc,
Christoph Raisch, Marcus Eder, Stefan Roscher, Anton Blanchard
In-Reply-To: <200710081601.34067.ossthema@de.ibm.com>
Jan-Bernd Themann wrote:
> eHEA recovery and DLPAR functions are called seldomly. The eHEA workqueues
> are replaced by the kernel event queue.
>
> Signed-off-by: Jan-Bernd Themann <themann@de.ibm.com>
>
> ---
> The patch has been built against upstream git
>
> drivers/net/ehea/ehea.h | 3 +--
> drivers/net/ehea/ehea_main.c | 28 ++++++++--------------------
> drivers/net/ehea/ehea_qmr.c | 3 +--
> 3 files changed, 10 insertions(+), 24 deletions(-)
applied
^ permalink raw reply
* [PATCH v2] powerpc: don't enable cpu hotplug on mpic-based pseries
From: Olof Johansson @ 2007-10-10 0:38 UTC (permalink / raw)
To: Stephen Rothwell
Cc: Greg KH, Greg KH, linux-kernel, Chris Wedgwood, linuxppc-dev,
paulus, tgall.foo, Thomas Gleixner, Linus Torvalds, stable
In-Reply-To: <20071010101826.186f1f24.sfr@canb.auug.org.au>
Don't allow cpu hotplug on systems lacking XICS interrupt controller,
since current code is hardcoded for it.
Signed-off-by: Olof Johansson <olof@lixom.net>
---
On Wed, Oct 10, 2007 at 10:18:26AM +1000, Stephen Rothwell wrote:
> > + struct device_node *np;
> > + const char *typep;
> > +
> > + for (np = NULL; (np = of_find_node_by_name(np,
> > + "interrupt-controller"));) {
> > + typep = of_get_property(np, "compatible", NULL);
> > + if (strstr(typep, "open-pic")) {
> > + printk(KERN_INFO "CPU Hotplug not supported on "
> > + "systems using MPIC\n");
>
> You need an of_node_put(np) here.
Grmbl, you're right.
pseries_discover_pic() doesn't have one, that's where I took the above
logic from. So we're obviously already leaking device node references.
Still, no reason to make it worse.
-Olof
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index 9711eb0..ae85fc0 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -252,6 +252,21 @@ static struct notifier_block pseries_smp_nb = {
static int __init pseries_cpu_hotplug_init(void)
{
+ struct device_node *np;
+ const char *typep;
+
+ for (np = NULL; (np = of_find_node_by_name(np,
+ "interrupt-controller"));) {
+ typep = of_get_property(np, "compatible", NULL);
+ if (strstr(typep, "open-pic")) {
+ of_node_put(np);
+
+ printk(KERN_INFO "CPU Hotplug not supported on "
+ "systems using MPIC\n");
+ return 0;
+ }
+ }
+
rtas_stop_self_args.token = rtas_token("stop-self");
qcss_tok = rtas_token("query-cpu-stopped-state");
^ permalink raw reply related
* Re: [PATCH] powerpc: don't enable cpu hotplug on mpic-based pseries
From: Stephen Rothwell @ 2007-10-10 0:18 UTC (permalink / raw)
To: Olof Johansson
Cc: Greg KH, Greg KH, linux-kernel, Chris Wedgwood, linuxppc-dev,
paulus, tgall.foo, Thomas Gleixner, Linus Torvalds, stable
In-Reply-To: <20071010000815.GB7875@lixom.net>
[-- Attachment #1: Type: text/plain, Size: 1146 bytes --]
Hi Olof,
On Tue, 9 Oct 2007 19:08:15 -0500 Olof Johansson <olof@lixom.net> wrote:
>
> Don't allow cpu hotplug on systems lacking XICS interrupt controller,
> since current platform code is hardcoded for it.
>
>
> Signed-off-by: Olof Johansson <olof@lixom.net>
>
>
> diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
> index 9711eb0..e29b890 100644
> --- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
> +++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
> @@ -252,6 +252,19 @@ static struct notifier_block pseries_smp_nb = {
>
> static int __init pseries_cpu_hotplug_init(void)
> {
> + struct device_node *np;
> + const char *typep;
> +
> + for (np = NULL; (np = of_find_node_by_name(np,
> + "interrupt-controller"));) {
> + typep = of_get_property(np, "compatible", NULL);
> + if (strstr(typep, "open-pic")) {
> + printk(KERN_INFO "CPU Hotplug not supported on "
> + "systems using MPIC\n");
You need an of_node_put(np) here.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
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^ permalink raw reply
* [PATCH] powerpc: don't enable cpu hotplug on mpic-based pseries
From: Olof Johansson @ 2007-10-10 0:08 UTC (permalink / raw)
To: Linus Torvalds
Cc: Greg KH, Greg KH, linux-kernel, Chris Wedgwood, linuxppc-dev,
paulus, tgall.foo, Thomas Gleixner, stable
In-Reply-To: <alpine.LFD.0.999.0710091625520.3838@woody.linux-foundation.org>
Don't allow cpu hotplug on systems lacking XICS interrupt controller,
since current platform code is hardcoded for it.
Signed-off-by: Olof Johansson <olof@lixom.net>
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index 9711eb0..e29b890 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -252,6 +252,19 @@ static struct notifier_block pseries_smp_nb = {
static int __init pseries_cpu_hotplug_init(void)
{
+ struct device_node *np;
+ const char *typep;
+
+ for (np = NULL; (np = of_find_node_by_name(np,
+ "interrupt-controller"));) {
+ typep = of_get_property(np, "compatible", NULL);
+ if (strstr(typep, "open-pic")) {
+ printk(KERN_INFO "CPU Hotplug not supported on "
+ "systems using MPIC\n");
+ return 0;
+ }
+ }
+
rtas_stop_self_args.token = rtas_token("stop-self");
qcss_tok = rtas_token("query-cpu-stopped-state");
^ permalink raw reply related
* Re: [stable] [patch 09/12] Fix SMP poweroff hangs
From: Olof Johansson @ 2007-10-10 0:03 UTC (permalink / raw)
To: Linus Torvalds
Cc: Mark Lord, Theodore Ts'o, Zwane Mwaikambo, linuxppc-dev,
Greg KH, Greg KH, Justin Forbes, linux-kernel, Chris Wedgwood,
Domenico Andreoli, Rafael J. Wysocki, stable, Randy Dunlap,
Michael Krufky, Chuck Ebbert, Dave Jones, Thomas Gleixner,
Chuck Wolber, akpm, alan
In-Reply-To: <alpine.LFD.0.999.0710091625520.3838@woody.linux-foundation.org>
On Tue, Oct 09, 2007 at 04:27:06PM -0700, Linus Torvalds wrote:
>
>
> On Wed, 10 Oct 2007, Thomas Gleixner wrote:
> >
> > Wrapping it into a #ifdef CONFIG_X86 would be sufficient.
>
> Well, the ppc oops seems to be a ppc bug regardless.
>
> If CPU_HOTPLUG isn't defined, the thing does nothing. And if it is
> defined, I don't see why/how ppc can validly oops. So I think the first
> thing to do is to try to figure out why it oopses, not to disable it for
> ppc.
The machine Paul tried on most likely has MPIC interrupt controller, and
the oops was when the pseries_cpu_disable tried calling XICS code instead.
It's not surprising that it failed, I don't think IBM has (traditionally)
cared about cpu hotplug on those machines.
So the PPC-side fix is to not enable cpu hotplug on mpic-based
systems. I'll follow up with a patch, but I have no way to test it since
I only have one POWER5 machine, no other IBM hardware. I'd appreciate
it if someone with hardware could verify it.
-Olof
^ permalink raw reply
* never mind .. [was Re: Hard hang in hypervisor!?
From: Linas Vepstas @ 2007-10-09 23:22 UTC (permalink / raw)
To: Nathan Lynch; +Cc: linuxppc-dev
In-Reply-To: <20071009212810.GN4350@austin.ibm.com>
On Tue, Oct 09, 2007 at 04:28:10PM -0500, Linas Vepstas wrote:
>
> Perhaps I should IRC this ...
yeah. I guess I'd forgotten how funky things can get. So never mind ...
--linas
^ permalink raw reply
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