* Re: [PATCH v2] powerpc: don't enable cpu hotplug on mpic-based pseries
From: Olof Johansson @ 2007-10-11 5:59 UTC (permalink / raw)
To: Paul Mackerras
Cc: Stephen Rothwell, Greg KH, Greg KH, linux-kernel, Chris Wedgwood,
linuxppc-dev, tgall.foo, Thomas Gleixner, Linus Torvalds, stable
In-Reply-To: <18189.47620.466515.645055@cargo.ozlabs.ibm.com>
On Thu, Oct 11, 2007 at 03:52:04PM +1000, Paul Mackerras wrote:
> Olof Johansson writes:
>
> > Don't allow cpu hotplug on systems lacking XICS interrupt controller,
> > since current code is hardcoded for it.
> ...
> > + for (np = NULL; (np = of_find_node_by_name(np,
> > + "interrupt-controller"));) {
>
> Looks like for_each_node_by_name would be nicer here.
>
> If you agree, I'll hand-edit your patch to do that and apply it.
Go for it, I just stole that out of the detection code. That
could be changed accordingly as well at some point (I'm guessing
for_each_node_by_name didn't exist when that was written).
> Of course, ultimately we should implement the necessary mpic bits to
> support cpu hotplug.
Yep. I'll leave that to people who have hardware access. :-)
Thanks,
-Olof
^ permalink raw reply
* Re: [PATCH 2/3] [POWERPC] Add AMCC Kilauea eval board support to platforms/40x
From: Stefan Roese @ 2007-10-11 6:06 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Olof Johansson
In-Reply-To: <1192045466.5534.60.camel@localhost.localdomain>
On Wednesday 10 October 2007, Josh Boyer wrote:
> > > Do you really need config options for 405EP/EX? I don't seem them used
> > > anywhere else in the code (and it's also contradictory to the whole new
> > > multiplatform way of looking at stuff :).
> > >
> > > I know the 405/440 is still somewhat #ifdef:ed on the cpu here and
> > > there, but since this doesn't add any such code I don't see a need for
> > > the config options?
> >
> > Yes, I'm still used to needing these defines from arch/ppc (for example
> > for the 4xx EMAC driver). But its possible, that we really don't need it
> > at all in arch/powerpc with all the device tree information. Not sure
> > though.
> >
> > Josh, what do you think? Should I remove the 405EX define completely?
>
> If it's not needed, it can go. As Olof said, it doesn't appear to be
> used anywhere in the code so I think it's fine.
OK, I'll remove it. If we later see that we need it, we can always add it
again.
> One question I do have is if 405EX and 405EP need any of the 405GP
> errata config options selected. I would like to think those don't apply
> because the hardware is fixed, but I haven't checked to be sure.
Yes, the 2 405 errata's IBM405_ERR51 and IBM405_ERR77 do not apply to "newer"
405 cores. Only 405GP (and 405CR I assume) are affected.
Best regards,
Stefan
^ permalink raw reply
* [patch 0/2] add Altivec/VMX state to coredumps
From: markn @ 2007-10-11 7:15 UTC (permalink / raw)
To: linuxppc-dev
--
Here's the new and improved patch to add Altivec/VMX state into the coredump.
It's now two patches:
* the first patch makes the note type of the state dumped by
elf_core_copy_task_xfpregs() a #define and adds the appropriate #defines so
that archs that support SSE still have their note type as NT_PRXFPREG
* the second patch actually adds the Altivec/VMX state to the coredumps and
uses a note type of NT_PPC_VMX that's #defined as 0x100. Thus SPE could use
a note type of NT_PPC_SPE and 0x101, for example.
The second patch is essentially the same as the single patch that was posted on
2007-09-25, but with the addition of the new NT_PPC_VMX note type.
^ permalink raw reply
* [patch 1/2] Replace NT_PRXFPREG with ELF_CORE_XFPREG_TYPE #define
From: markn @ 2007-10-11 7:15 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20071011071558.676463639@au1.ibm.com>
Replace NT_PRXFPREG with ELF_CORE_XFPREG_TYPE in the coredump code which
allows for more flexibility in the note type for the state of 'extended
floating point' implementations in coredumps. New note types can now be
added with an appropriate #define.
#define ELF_CORE_XFPREG_TYPE to be NT_PRXFPREG in all current users so
there's are no change in behaviour.
Signed-off-by: Mark Nelson <markn@au1.ibm.com>
---
arch/ia64/ia32/elfcore32.h | 1 +
arch/x86_64/ia32/ia32_binfmt.c | 1 +
fs/binfmt_elf.c | 4 ++--
include/asm-i386/elf.h | 1 +
4 files changed, 5 insertions(+), 2 deletions(-)
Index: linux/arch/ia64/ia32/elfcore32.h
===================================================================
--- linux.orig/arch/ia64/ia32/elfcore32.h
+++ linux/arch/ia64/ia32/elfcore32.h
@@ -117,6 +117,7 @@ elf_core_copy_task_fpregs(struct task_st
}
#define ELF_CORE_COPY_XFPREGS 1
+#define ELF_CORE_XFPREG_TYPE NT_PRXFPREG
static inline int
elf_core_copy_task_xfpregs(struct task_struct *tsk, elf_fpxregset_t *xfpu)
{
Index: linux/arch/x86_64/ia32/ia32_binfmt.c
===================================================================
--- linux.orig/arch/x86_64/ia32/ia32_binfmt.c
+++ linux/arch/x86_64/ia32/ia32_binfmt.c
@@ -188,6 +188,7 @@ elf_core_copy_task_fpregs(struct task_st
}
#define ELF_CORE_COPY_XFPREGS 1
+#define ELF_CORE_XFPREG_TYPE NT_PRXFPREG
static inline int
elf_core_copy_task_xfpregs(struct task_struct *t, elf_fpxregset_t *xfpu)
{
Index: linux/fs/binfmt_elf.c
===================================================================
--- linux.orig/fs/binfmt_elf.c
+++ linux/fs/binfmt_elf.c
@@ -1446,8 +1446,8 @@ static int elf_dump_thread_status(long s
#ifdef ELF_CORE_COPY_XFPREGS
if (elf_core_copy_task_xfpregs(p, &t->xfpu)) {
- fill_note(&t->notes[2], "LINUX", NT_PRXFPREG, sizeof(t->xfpu),
- &t->xfpu);
+ fill_note(&t->notes[2], "LINUX", ELF_CORE_XFPREG_TYPE,
+ sizeof(t->xfpu), &t->xfpu);
t->num_notes++;
sz += notesize(&t->notes[2]);
}
Index: linux/include/asm-i386/elf.h
===================================================================
--- linux.orig/include/asm-i386/elf.h
+++ linux/include/asm-i386/elf.h
@@ -129,6 +129,7 @@ extern int dump_task_extended_fpu (struc
#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
#define ELF_CORE_COPY_XFPREGS(tsk, elf_xfpregs) dump_task_extended_fpu(tsk, elf_xfpregs)
+#define ELF_CORE_XFPREG_TYPE NT_PRXFPREG
#define VDSO_HIGH_BASE (__fix_to_virt(FIX_VDSO))
#define VDSO_CURRENT_BASE ((unsigned long)current->mm->context.vdso)
--
^ permalink raw reply
* [patch 2/2] add Altivec/VMX state to coredumps
From: markn @ 2007-10-11 7:16 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20071011071558.676463639@au1.ibm.com>
Update dump_task_altivec() (that has so far never been put to use)
so that it dumps the Altivec/VMX registers (VR[0] - VR[31], VSCR
and VRSAVE) in the same format as the ptrace get_vrregs() and add
the appropriate glue typedef and #defines to make it work.
A new note type of NT_PPC_VMX was chosen to be 0x100 (arbitrarily)
because it allows the low range values to be used for more generic
purposes and 0x100 seems an adequate starting point for PowerPC
extensions.
Signed-off-by: Mark Nelson <markn@au1.ibm.com>
---
arch/powerpc/kernel/process.c | 28 +++++++++++++++++++++++++---
include/asm-powerpc/elf.h | 8 ++++++++
include/linux/elf.h | 1 +
3 files changed, 34 insertions(+), 3 deletions(-)
Index: linux/arch/powerpc/kernel/process.c
===================================================================
--- linux.orig/arch/powerpc/kernel/process.c
+++ linux/arch/powerpc/kernel/process.c
@@ -149,10 +149,32 @@ void flush_altivec_to_thread(struct task
}
}
-int dump_task_altivec(struct pt_regs *regs, elf_vrregset_t *vrregs)
+int dump_task_altivec(struct task_struct *tsk, elf_vrregset_t *vrregs)
{
- flush_altivec_to_thread(current);
- memcpy(vrregs, ¤t->thread.vr[0], sizeof(*vrregs));
+ /* ELF_NVRREG includes the VSCR and VRSAVE which we need to save
+ * separately, see below */
+ const int nregs = ELF_NVRREG - 2;
+ elf_vrreg_t *reg;
+ u32 *dest;
+
+ if (tsk == current)
+ flush_altivec_to_thread(tsk);
+
+ reg = (elf_vrreg_t *)vrregs;
+
+ /* copy the 32 vr registers */
+ memcpy(reg, &tsk->thread.vr[0], nregs * sizeof(*reg));
+ reg += nregs;
+
+ /* copy the vscr */
+ memcpy(reg, &tsk->thread.vscr, sizeof(*reg));
+ reg++;
+
+ /* vrsave is stored in the high 32bit slot of the final 128bits */
+ memset(reg, 0, sizeof(*reg));
+ dest = (u32 *)reg;
+ *dest = tsk->thread.vrsave;
+
return 1;
}
#endif /* CONFIG_ALTIVEC */
Index: linux/include/asm-powerpc/elf.h
===================================================================
--- linux.orig/include/asm-powerpc/elf.h
+++ linux/include/asm-powerpc/elf.h
@@ -212,6 +212,14 @@ static inline int dump_task_regs(struct
extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *);
#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
+typedef elf_vrregset_t elf_fpxregset_t;
+
+#ifdef CONFIG_ALTIVEC
+extern int dump_task_altivec(struct task_struct *, elf_vrregset_t *vrregs);
+#define ELF_CORE_COPY_XFPREGS(tsk, regs) dump_task_altivec(tsk, regs)
+#define ELF_CORE_XFPREG_TYPE NT_PPC_VMX
+#endif
+
#endif /* __KERNEL__ */
/* ELF_HWCAP yields a mask that user programs can use to figure out what
Index: linux/include/linux/elf.h
===================================================================
--- linux.orig/include/linux/elf.h
+++ linux/include/linux/elf.h
@@ -355,6 +355,7 @@ typedef struct elf64_shdr {
#define NT_TASKSTRUCT 4
#define NT_AUXV 6
#define NT_PRXFPREG 0x46e62b7f /* copied from gdb5.1/include/elf/common.h */
+#define NT_PPC_VMX 0x100 /* PowerPC Altivec/VMX registers */
/* Note header in a PT_NOTE section */
--
^ permalink raw reply
* RE: [PATCH 4/9] add platform support for MPC837x MDS board
From: Li Yang-r58472 @ 2007-10-11 7:28 UTC (permalink / raw)
To: Stephen Rothwell; +Cc: linuxppc-dev, paulus
In-Reply-To: <20071011110546.99239e24.sfr@canb.auug.org.au>
> -----Original Message-----
> From: Stephen Rothwell [mailto:sfr@canb.auug.org.au]=20
> Sent: Thursday, October 11, 2007 9:06 AM
> To: Li Yang-r58472
> Cc: galak@kernel.crashing.org; paulus@samba.org;=20
> linuxppc-dev@ozlabs.org
> Subject: Re: [PATCH 4/9] add platform support for MPC837x MDS board
>=20
> On Wed, 10 Oct 2007 18:06:39 +0800 Li Yang=20
> <leoli@freescale.com> wrote:
> >
> > +++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
> >
> > +#include <asm/of_platform.h>
>=20
> You actually neeed linux/of.h (for of_ routines) and=20
> asm/prom.h (for of_flat_dt_is_compatible).
Thanks for the comments. Updated version on the way.
- Leo
^ permalink raw reply
* [PATCH v2] Fix regression. Make hot unlplug of CPU0 work again.
From: Tony Breeds @ 2007-10-11 7:30 UTC (permalink / raw)
To: Milton Miller, Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <200710051716.l95HG1cV019434@sullivan.realtime.net>
Early in the 2.6.23 cycle we broke the ability to offline cpu0
(7ccb4a662462616f6be5053e26b79580e02f1529). This patch fixes that by
ensuring that the (xics) default irq server, will not be 0 when taking
cpu0 offline.
Also catches a use of irq, when virq should be used (I think that's the
last one).
This patch also include the fix from Milton which makes JS21 work
aswell. In the commit message for that patch Milton writes:
xics_set_affinity no longer looks at the cpu_mask arg, instead
get_irq_server reads it from the irq descriptor.
Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Signed-off-by: Milton Miller <miltonm@bga.com>
---
Milton also says in his patch:
> A more complete fix might be to pass the cpu_mask struct to get_irq_server,
> but kernel/irq/manage.c currently sets the descriptor first.
arch/powerpc/platforms/pseries/xics.c | 11 ++++++++++-
1 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
index f0b5ff1..217ae5d 100644
--- a/arch/powerpc/platforms/pseries/xics.c
+++ b/arch/powerpc/platforms/pseries/xics.c
@@ -837,6 +837,15 @@ void xics_migrate_irqs_away(void)
/* Allow IPIs again... */
xics_set_cpu_priority(cpu, DEFAULT_PRIORITY);
+ /* It would be bad to migrate any IRQs to the CPU we're taking down */
+ if (default_server == cpu) {
+ unsigned int new_server = first_cpu(cpu_online_map);
+
+ default_server = get_hard_smp_processor_id(new_server);
+ printk(KERN_WARNING "%s: default server was %d, reset to %d\n",
+ __func__, cpu, default_server);
+ }
+
for_each_irq(virq) {
struct irq_desc *desc;
int xics_status[2];
@@ -881,8 +890,8 @@ void xics_migrate_irqs_away(void)
virq, cpu);
/* Reset affinity to all cpus */
+ irq_desc[virq].affinity = CPU_MASK_ALL;
desc->chip->set_affinity(virq, CPU_MASK_ALL);
- irq_desc[irq].affinity = CPU_MASK_ALL;
unlock:
spin_unlock_irqrestore(&desc->lock, flags);
}
Yours Tony
linux.conf.au http://linux.conf.au/ || http://lca2008.linux.org.au/
Jan 28 - Feb 02 2008 The Australian Linux Technical Conference!
^ permalink raw reply related
* port gnome
From: Bai Shuwei @ 2007-10-11 8:22 UTC (permalink / raw)
To: linuxppc-embedded, linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 339 bytes --]
all, hi
I want to port the GNOME or KDE to AMCC PowerPC 440EP board. I want to
know whether it will run and whether the monitor work if I use PCI to
connect the monitor card? Thank you very much!
Buroc
--
Add: Tianshui South Road 222, Lanzhou, P.R.China
Tel: +86-931-8912025
Zip Code: 730000
Email: baishuwei@gmail.com, buroc@126.com
[-- Attachment #2: Type: text/html, Size: 516 bytes --]
^ permalink raw reply
* Re: port gnome
From: Benjamin Herrenschmidt @ 2007-10-11 8:32 UTC (permalink / raw)
To: Bai Shuwei; +Cc: linuxppc-dev, linuxppc-embedded
In-Reply-To: <f3566d60710110122q23a0c49bkf0b8e8fd4f66b1e9@mail.gmail.com>
On Thu, 2007-10-11 at 16:22 +0800, Bai Shuwei wrote:
>
> all, hi
> I want to port the GNOME or KDE to AMCC PowerPC 440EP board. I want
> to know whether it will run and whether the monitor work if I use PCI
> to connect the monitor card? Thank you very much!
Gnome and KDE themselves should just work...
The problem is to get a video card working. The main issue is to
soft-boot it with some kind of x86 emulator such as x86emu. Once
that's done, the second main problem is that 440 tend to have
PCI memory space above 32bits, which totally defeats broken X
hacks through /dev/mem.
There's a way to work around the later by doing a kernel tweak to
create a "window" in /dev/mem that gets remapped to the appropriate
PCI space, but you still need to fake the card base address for
X ... pretty hard overall (doable though).
Ben.
^ permalink raw reply
* Kconfig selects non-existent IBM_NEW_EMAC_ZMII
From: Robert P. J. Day @ 2007-10-11 8:29 UTC (permalink / raw)
To: Linux PPC Mailing List
just FYI, from arch/powerpc/platforms/4xx/Kconfig:
...
config 440GP
bool
select IBM_NEW_EMAC_ZMII
...
there is no such Kconfig variable IBM_NEW_EMAC_ZMII.
rday
--
========================================================================
Robert P. J. Day
Linux Consulting, Training and Annoying Kernel Pedantry
Waterloo, Ontario, CANADA
http://crashcourse.ca
========================================================================
^ permalink raw reply
* Re: [PATCH v2] Fix regression. Make hot unlplug of CPU0 work again.
From: Michael Neuling @ 2007-10-11 8:37 UTC (permalink / raw)
To: Tony Breeds; +Cc: linuxppc-dev, Paul Mackerras, Milton Miller
In-Reply-To: <20071011073040.GD9814@bakeyournoodle.com>
In message <20071011073040.GD9814@bakeyournoodle.com> you wrote:
>
> Early in the 2.6.23 cycle we broke the ability to offline cpu0
> (7ccb4a662462616f6be5053e26b79580e02f1529). This patch fixes that by
> ensuring that the (xics) default irq server, will not be 0 when taking
> cpu0 offline.
>
> Also catches a use of irq, when virq should be used (I think that's the
> last one).
>
> This patch also include the fix from Milton which makes JS21 work
> aswell. In the commit message for that patch Milton writes:
> xics_set_affinity no longer looks at the cpu_mask arg, instead
> get_irq_server reads it from the irq descriptor.
This doesn't fix the problem for me.
If I offline CPU0, then online it again, it's fine, but doing the same
for CPU1 kills the machine.
Mikey
>
> Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
> Signed-off-by: Milton Miller <miltonm@bga.com>
>
> ---
> Milton also says in his patch:
> > A more complete fix might be to pass the cpu_mask struct to get_irq_server,
> > but kernel/irq/manage.c currently sets the descriptor first.
>
> arch/powerpc/platforms/pseries/xics.c | 11 ++++++++++-
> 1 files changed, 10 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/p
series/xics.c
> index f0b5ff1..217ae5d 100644
> --- a/arch/powerpc/platforms/pseries/xics.c
> +++ b/arch/powerpc/platforms/pseries/xics.c
> @@ -837,6 +837,15 @@ void xics_migrate_irqs_away(void)
> /* Allow IPIs again... */
> xics_set_cpu_priority(cpu, DEFAULT_PRIORITY);
>
> + /* It would be bad to migrate any IRQs to the CPU we're taking down */
> + if (default_server == cpu) {
> + unsigned int new_server = first_cpu(cpu_online_map);
> +
> + default_server = get_hard_smp_processor_id(new_server);
> + printk(KERN_WARNING "%s: default server was %d, reset to %d\n",
> + __func__, cpu, default_server);
> + }
> +
> for_each_irq(virq) {
> struct irq_desc *desc;
> int xics_status[2];
> @@ -881,8 +890,8 @@ void xics_migrate_irqs_away(void)
> virq, cpu);
>
> /* Reset affinity to all cpus */
> + irq_desc[virq].affinity = CPU_MASK_ALL;
> desc->chip->set_affinity(virq, CPU_MASK_ALL);
> - irq_desc[irq].affinity = CPU_MASK_ALL;
> unlock:
> spin_unlock_irqrestore(&desc->lock, flags);
> }
>
> Yours Tony
>
> linux.conf.au http://linux.conf.au/ || http://lca2008.linux.org.au/
> Jan 28 - Feb 02 2008 The Australian Linux Technical Conference!
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
^ permalink raw reply
* Re: [PATCH 3/3] [POWERPC] Kilauea DTS
From: Stefan Roese @ 2007-10-11 8:49 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
In-Reply-To: <1192047714.5534.81.camel@localhost.localdomain>
On Wednesday 10 October 2007, Josh Boyer wrote:
> On Mon, 2007-10-08 at 11:10 +0200, Stefan Roese wrote:
> > Signed-off-by: Stefan Roese <sr@denx.de>
>
> Looks pretty good. Just a couple of questions.
>
> > ---
> > arch/powerpc/boot/dts/kilauea.dts | 253
> > +++++++++++++++++++++++++++++++++++++ 1 files changed, 253 insertions(+),
> > 0 deletions(-)
> > create mode 100644 arch/powerpc/boot/dts/kilauea.dts
> >
> > diff --git a/arch/powerpc/boot/dts/kilauea.dts
> > b/arch/powerpc/boot/dts/kilauea.dts new file mode 100644
> > index 0000000..4683174
> > --- /dev/null
> > +++ b/arch/powerpc/boot/dts/kilauea.dts
> > @@ -0,0 +1,253 @@
> > +/*
> > + * Device Tree Source for AMCC Kilauea (405EX)
> > + *
> > + * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
> > + *
> > + * This file is licensed under the terms of the GNU General Public
> > + * License version 2. This program is licensed "as is" without
> > + * any warranty of any kind, whether express or implied.
> > + */
> > +
> > +/ {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + model = "amcc,kilauea";
> > + compatible = "amcc,kilauea";
> > + dcr-parent = <&/cpus/PowerPC,405EX@0>;
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + PowerPC,405EX@0 {
> > + device_type = "cpu";
> > + reg = <0>;
> > + clock-frequency = <0>; /* Filled in by U-Boot */
>
> Filled in by U-Boot itself? Or by a cuboot wrapper? (which I can't find
> in the patches.)
By U-Boot itself. I have a U-Boot patch in the queue to add device tree
support for 4xx. Therefor I don't plan adding a cuboot wrapper for Kilauea.
> > + timebase-frequency = <0>; /* Filled in by U-Boot */
> > + i-cache-line-size = <20>;
> > + d-cache-line-size = <20>;
> > + i-cache-size = <4000>; /* 16 kB */
> > + d-cache-size = <4000>; /* 16 kB */
> > + dcr-controller;
> > + dcr-access-method = "native";
> > + };
> > + };
> > +
> > + memory {
> > + device_type = "memory";
> > + reg = <0 0>; /* Filled in by U-Boot */
> > + };
> > +
> > + UIC0: interrupt-controller {
> > + compatible = "ibm,uic-405ex", "ibm,uic";
> > + interrupt-controller;
> > + cell-index = <0>;
> > + dcr-reg = <0c0 009>;
> > + #address-cells = <0>;
> > + #size-cells = <0>;
> > + #interrupt-cells = <2>;
> > + };
> > +
> > + UIC1: interrupt-controller1 {
> > + compatible = "ibm,uic-405ex","ibm,uic";
> > + interrupt-controller;
> > + cell-index = <1>;
> > + dcr-reg = <0d0 009>;
> > + #address-cells = <0>;
> > + #size-cells = <0>;
> > + #interrupt-cells = <2>;
> > + interrupts = <1e 4 1f 4>; /* cascade */
> > + interrupt-parent = <&UIC0>;
> > + };
> > +
> > + UIC2: interrupt-controller2 {
> > + compatible = "ibm,uic-405ex","ibm,uic";
> > + interrupt-controller;
> > + cell-index = <2>;
> > + dcr-reg = <0e0 009>;
> > + #address-cells = <0>;
> > + #size-cells = <0>;
> > + #interrupt-cells = <2>;
> > + interrupts = <1c 4 1d 4>; /* cascade */
> > + interrupt-parent = <&UIC0>;
> > + };
> > +
> > + plb {
> > + compatible = "ibm,plb-405ex", "ibm,plb4";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > + clock-frequency = <0>; /* Filled in by U-Boot */
> > +
> > + SDRAM0: memory-controller {
> > + compatible = "ibm,sdram-405ex";
> > + dcr-reg = <010 2>;
> > + };
> > +
> > + MAL0: mcmal {
> > + compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
> > + dcr-reg = <180 62>;
> > + num-tx-chans = <2>;
> > + num-rx-chans = <2>;
> > + interrupt-parent = <&MAL0>;
> > + interrupts = <0 1 2 3 4>;
> > + #interrupt-cells = <1>;
> > + #address-cells = <0>;
> > + #size-cells = <0>;
> > + interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
> > + /*RXEOB*/ 1 &UIC0 b 4
> > + /*SERR*/ 2 &UIC1 0 4
> > + /*TXDE*/ 3 &UIC1 1 4
> > + /*RXDE*/ 4 &UIC1 2 4>;
> > + interrupt-map-mask = <ffffffff>;
> > + };
> > +
> > + POB0: opb {
> > + compatible = "ibm,opb-405ex", "ibm,opb";
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges = <ef600000 ef600000 a00000>;
> > + dcr-reg = <0a0 5>;
> > + clock-frequency = <0>; /* Filled in by U-Boot */
> > +
> > + EBC0: ebc {
> > + compatible = "ibm,ebc-405ex", "ibm,ebc";
> > + dcr-reg = <012 2>;
> > + #address-cells = <2>;
> > + #size-cells = <1>;
> > + clock-frequency = <0>; /* Filled in by U-Boot */
> > + interrupts = <5 1>;
>
> This interrupt is really rising edge? Just double checking.
Yes, it is rising edge. I have to admit though, that I'm not sure if this
interrupt will ever be used at all.
> > + interrupt-parent = <&UIC1>;
> > +
> > + nor_flash@0,0 {
>
> You have no ranges property for the ebc parent node. Is if filled in by
> U-Boot? If so, please add a comment because otherwise I don't see how
> this mapping will work.
Yes, it's filled in by U-Boot too. I'll add a comment here.
> > + compatible = "amd,s29gl256n", "cfi-flash";
> > + bank-width = <2>;
> > + reg = <0 000000 4000000>;
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + partition@0 {
> > + label = "Kernel";
> > + reg = <0 180000>;
> > + };
> > + partition@180000 {
> > + label = "ramdisk";
> > + reg = <180000 200000>;
> > + };
> > + partition@380000 {
> > + label = "file system";
> > + reg = <380000 3aa0000>;
> > + };
> > + partition@3e20000 {
> > + label = "kozio";
> > + reg = <3e20000 140000>;
> > + };
> > + partition@3f60000 {
> > + label = "env";
> > + reg = <3f60000 40000>;
> > + };
> > + partition@3fa0000 {
> > + label = "u-boot";
> > + reg = <3fa0000 60000>;
> > + };
> > + };
> > + };
> > +
> > + UART0: serial@ef600200 {
> > + device_type = "serial";
> > + compatible = "ns16550";
> > + reg = <ef600200 8>;
> > + virtual-reg = <ef600200>;
> > + clock-frequency = <0>; /* Filled in by U-Boot */
> > + current-speed = <0>;
> > + interrupt-parent = <&UIC0>;
> > + interrupts = <1a 4>;
> > + };
> > +
> > + UART1: serial@ef600300 {
> > + device_type = "serial";
> > + compatible = "ns16550";
> > + reg = <ef600300 8>;
> > + virtual-reg = <ef600300>;
> > + clock-frequency = <0>; /* Filled in by U-Boot */
> > + current-speed = <0>;
> > + interrupt-parent = <&UIC0>;
> > + interrupts = <1 4>;
> > + };
> > +
> > + IIC0: i2c@ef600400 {
> > + device_type = "i2c";
> > + compatible = "ibm,iic-405ex", "ibm,iic";
> > + reg = <ef600400 14>;
> > + interrupt-parent = <&UIC0>;
> > + interrupts = <2 4>;
> > + };
> > +
> > + IIC1: i2c@ef600500 {
> > + device_type = "i2c";
> > + compatible = "ibm,iic-405ex", "ibm,iic";
> > + reg = <ef600500 14>;
> > + interrupt-parent = <&UIC0>;
> > + interrupts = <7 4>;
> > + };
> > +
> > +
> > + RGMII0: emac-rgmii@ef600b00 {
> > + device_type = "rgmii-interface";
> > + compatible = "ibm,rgmii-405ex", "ibm,rgmii";
> > + reg = <ef600b00 104>;
> > + };
> > +
> > + EMAC0: ethernet@ef600900 {
> > + linux,network-index = <0>;
> > + device_type = "network";
> > + compatible = "ibm,emac-405ex", "ibm,emac4";
> > + interrupt-parent = <&EMAC0>;
> > + interrupts = <0 1>;
> > + #interrupt-cells = <1>;
> > + #address-cells = <0>;
> > + #size-cells = <0>;
> > + interrupt-map = </*Status*/ 0 &UIC0 18 4
> > + /*Wake*/ 1 &UIC1 1d 4>;
> > + reg = <ef600900 70>;
> > + local-mac-address = [000000000000];
>
> Does U-Boot (or the wrapper) poke these values as well?
Yes, I'll add a comment here too.
> > + mal-device = <&MAL0>;
> > + mal-tx-channel = <0>;
> > + mal-rx-channel = <0>;
> > + cell-index = <0>;
> > + max-frame-size = <5dc>;
> > + rx-fifo-size = <1000>;
> > + tx-fifo-size = <800>;
> > + phy-mode = "rgmii";
> > + phy-map = <00000000>;
> > + rgmii-device = <&RGMII0>;
> > + rgmii-channel = <0>;
> > + };
> > +
> > + EMAC1: ethernet@ef600a00 {
> > + linux,network-index = <1>;
> > + device_type = "network";
> > + compatible = "ibm,emac-405ex", "ibm,emac4";
> > + interrupt-parent = <&EMAC1>;
> > + interrupts = <0 1>;
> > + #interrupt-cells = <1>;
> > + #address-cells = <0>;
> > + #size-cells = <0>;
> > + interrupt-map = </*Status*/ 0 &UIC0 19 4
> > + /*Wake*/ 1 &UIC1 1f 4>;
> > + reg = <ef600a00 70>;
> > + local-mac-address = [000000000000];
> > + mal-device = <&MAL0>;
> > + mal-tx-channel = <1>;
> > + mal-rx-channel = <1>;
> > + cell-index = <1>;
> > + max-frame-size = <5dc>;
> > + rx-fifo-size = <1000>;
> > + tx-fifo-size = <800>;
> > + phy-mode = "rgmii";
> > + phy-map = <00000000>;
> > + rgmii-device = <&RGMII0>;
> > + rgmii-channel = <1>;
> > + };
> > + };
> > + };
>
> No chosen node?
No. U-Boot will provide all needed information here.
Thanks.
Best regards,
Stefan
^ permalink raw reply
* [PATCH 3/9 v2] add Freescale SerDes PHY support
From: Li Yang @ 2007-10-11 9:53 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
The SerDes(serializer/deserializer) PHY block is a new SoC block used
in Freescale chips to support multiple serial interfaces, such as PCI
Express, SGMII, SATA.
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/platforms/Kconfig | 4 +
arch/powerpc/sysdev/Makefile | 1 +
arch/powerpc/sysdev/fsl_serdes.c | 170 ++++++++++++++++++++++++++++++++++++++
arch/powerpc/sysdev/fsl_serdes.h | 36 ++++++++
4 files changed, 211 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/sysdev/fsl_serdes.c
create mode 100644 arch/powerpc/sysdev/fsl_serdes.h
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 19d4628..e89f803 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -291,4 +291,8 @@ config FSL_ULI1575
Freescale reference boards. The boards all use the ULI in pretty
much the same way.
+config FSL_SERDES
+ bool
+ default n
+
endmenu
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 08ce31e..315aa36 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -19,6 +19,7 @@ mv64x60-$(CONFIG_PCI) += mv64x60_pci.o
obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o
obj-$(CONFIG_RTC_DRV_CMOS) += rtc_cmos_setup.o
obj-$(CONFIG_AXON_RAM) += axonram.o
+obj-$(CONFIG_FSL_SERDES) += fsl_serdes.o
# contains only the suspend handler for time
ifeq ($(CONFIG_RTC_CLASS),)
diff --git a/arch/powerpc/sysdev/fsl_serdes.c b/arch/powerpc/sysdev/fsl_serdes.c
new file mode 100644
index 0000000..8a04395
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_serdes.c
@@ -0,0 +1,170 @@
+/*
+ * arch/powerpc/sysdev/fsl_serdes.c
+ *
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Li Yang <leoli@freescale.com>
+ *
+ * Freescale SerDes initialization routines
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/of.h>
+
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+
+#include "fsl_serdes.h"
+
+static int __init setup_serdes(struct device_node *np)
+{
+ void __iomem *regs;
+ const void *prot;
+ const unsigned int *freq;
+ struct resource res;
+ u32 tmp, rfcks;
+
+ of_address_to_resource(np, 0, &res);
+ regs = ioremap(res.start, res.end - res.start + 1);
+
+ prot = of_get_property(np, "protocol", NULL);
+ if (!prot)
+ return -EINVAL;
+ freq = of_get_property(np, "clock", NULL);
+ switch (*freq) {
+ case 100:
+ rfcks = FSL_SRDSCR4_RFCKS_100;
+ break;
+ case 125:
+ rfcks = FSL_SRDSCR4_RFCKS_125;
+ break;
+ case 150:
+ rfcks = FSL_SRDSCR4_RFCKS_150;
+ break;
+ default:
+ printk(KERN_ERR "SerDes: Wrong frequency\n");
+ return -EINVAL;
+ }
+
+ /* Use default prescale and counter */
+
+ /* 1.0V corevdd */
+ if (of_get_property(np, "vdd-1v", NULL)) {
+ /* DPPE/DPPA = 0 */
+ tmp = in_be32(regs + FSL_SRDSCR0_OFFS);
+ tmp &= ~FSL_SRDSCR0_DPP_1V2;
+ out_be32(regs + FSL_SRDSCR0_OFFS, tmp);
+
+ /* VDD = 0 */
+ tmp = in_be32(regs + FSL_SRDSCR2_OFFS);
+ tmp &= ~FSL_SRDSCR2_VDD_1V2;
+ out_be32(regs + FSL_SRDSCR2_OFFS, tmp);
+ }
+
+ /* protocol specific configuration */
+ if (!strcmp(prot, "sata")) {
+ /* Set and clear reset bits */
+ tmp = in_be32(regs + FSL_SRDSRSTCTL_OFFS);
+ tmp |= FSL_SRDSRSTCTL_SATA_RESET;
+ out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp);
+ mdelay(1);
+ tmp &= ~FSL_SRDSRSTCTL_SATA_RESET;
+ out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp);
+
+ /* Configure SRDSCR1 */
+ tmp = in_be32(regs + FSL_SRDSCR1_OFFS);
+ tmp &= ~FSL_SRDSCR1_PLLBW;
+ out_be32(regs + FSL_SRDSCR1_OFFS, tmp);
+
+ /* Configure SRDSCR2 */
+ tmp = in_be32(regs + FSL_SRDSCR2_OFFS);
+ tmp &= ~FSL_SRDSCR2_SEIC_MASK;
+ tmp |= FSL_SRDSCR2_SEIC_SATA;
+ out_be32(regs + FSL_SRDSCR2_OFFS, tmp);
+
+ /* Configure SRDSCR3 */
+ tmp = FSL_SRDSCR3_KFR_SATA | FSL_SRDSCR3_KPH_SATA |
+ FSL_SRDSCR3_SDFM_SATA_PEX |
+ FSL_SRDSCR3_SDTXL_SATA;
+ out_be32(regs + FSL_SRDSCR3_OFFS, tmp);
+
+ /* Configure SRDSCR4 */
+ tmp = rfcks | FSL_SRDSCR4_PROT_SATA;
+ out_be32(regs + FSL_SRDSCR4_OFFS, tmp);
+
+ } else if (!strcmp(prot, "pcie")) {
+ /* Configure SRDSCR1 */
+ tmp = in_be32(regs + FSL_SRDSCR1_OFFS);
+ tmp |= FSL_SRDSCR1_PLLBW;
+ out_be32(regs + FSL_SRDSCR1_OFFS, tmp);
+
+ /* Configure SRDSCR2 */
+ tmp = in_be32(regs + FSL_SRDSCR2_OFFS);
+ tmp &= ~FSL_SRDSCR2_SEIC_MASK;
+ tmp |= FSL_SRDSCR2_SEIC_PEX;
+ out_be32(regs + FSL_SRDSCR2_OFFS, tmp);
+
+ /* Configure SRDSCR3 */
+ tmp = FSL_SRDSCR3_SDFM_SATA_PEX;
+ out_be32(regs + FSL_SRDSCR3_OFFS, tmp);
+
+ /* Configure SRDSCR4 */
+ tmp = rfcks | FSL_SRDSCR4_PROT_PEX;
+ if (of_get_property(np, "pcie-x2", NULL))
+ tmp |= FSL_SRDSCR4_PLANE_X2;
+ out_be32(regs + FSL_SRDSCR4_OFFS, tmp);
+
+ } else if (!strcmp(prot, "sgmii")) {
+ /* Configure SRDSCR1 */
+ tmp = in_be32(regs + FSL_SRDSCR1_OFFS);
+ tmp &= ~FSL_SRDSCR1_PLLBW;
+ out_be32(regs + FSL_SRDSCR1_OFFS, tmp);
+
+ /* Configure SRDSCR2 */
+ tmp = in_be32(regs + FSL_SRDSCR2_OFFS);
+ tmp &= ~FSL_SRDSCR2_SEIC_MASK;
+ tmp |= FSL_SRDSCR2_SEIC_SGMII;
+ out_be32(regs + FSL_SRDSCR2_OFFS, tmp);
+
+ /* Configure SRDSCR3 */
+ out_be32(regs + FSL_SRDSCR3_OFFS, 0);
+
+ /* Configure SRDSCR4 */
+ tmp = rfcks | FSL_SRDSCR4_PROT_SGMII;
+ out_be32(regs + FSL_SRDSCR4_OFFS, tmp);
+
+ } else {
+ printk(KERN_ERR "SerDes: Wrong protocol\n");
+ return -EINVAL;
+ }
+
+ /* Do a software reset */
+ tmp = in_be32(regs + FSL_SRDSRSTCTL_OFFS);
+ tmp |= FSL_SRDSRSTCTL_RST;
+ out_be32(regs + FSL_SRDSRSTCTL_OFFS, tmp);
+
+ printk(KERN_INFO "Freescale SerDes at %8x initialized\n", res.start);
+
+ return 0;
+}
+
+static int __init fsl_serdes_init(void) {
+ struct device_node *np;
+
+ for (np = NULL; (np = of_find_compatible_node(np, NULL, "fsl,serdes")) != NULL;)
+ setup_serdes(np);
+
+ return 0;
+}
+
+arch_initcall(fsl_serdes_init);
diff --git a/arch/powerpc/sysdev/fsl_serdes.h b/arch/powerpc/sysdev/fsl_serdes.h
new file mode 100644
index 0000000..d4e5570
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_serdes.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/* SerDes registers */
+#define FSL_SRDSCR0_OFFS 0x0
+#define FSL_SRDSCR0_DPP_1V2 0x00008800
+#define FSL_SRDSCR1_OFFS 0x4
+#define FSL_SRDSCR1_PLLBW 0x00000040
+#define FSL_SRDSCR2_OFFS 0x8
+#define FSL_SRDSCR2_VDD_1V2 0x00800000
+#define FSL_SRDSCR2_SEIC_MASK 0x00001c1c
+#define FSL_SRDSCR2_SEIC_SATA 0x00001414
+#define FSL_SRDSCR2_SEIC_PEX 0x00001010
+#define FSL_SRDSCR2_SEIC_SGMII 0x00000101
+#define FSL_SRDSCR3_OFFS 0xc
+#define FSL_SRDSCR3_KFR_SATA 0x10100000
+#define FSL_SRDSCR3_KPH_SATA 0x04040000
+#define FSL_SRDSCR3_SDFM_SATA_PEX 0x01010000
+#define FSL_SRDSCR3_SDTXL_SATA 0x00000505
+#define FSL_SRDSCR4_OFFS 0x10
+#define FSL_SRDSCR4_PROT_SATA 0x00000808
+#define FSL_SRDSCR4_PROT_PEX 0x00000101
+#define FSL_SRDSCR4_PROT_SGMII 0x00000505
+#define FSL_SRDSCR4_PLANE_X2 0x01000000
+#define FSL_SRDSCR4_RFCKS_100 0x00000000
+#define FSL_SRDSCR4_RFCKS_125 0x10000000
+#define FSL_SRDSCR4_RFCKS_150 0x30000000
+#define FSL_SRDSRSTCTL_OFFS 0x20
+#define FSL_SRDSRSTCTL_RST 0x80000000
+#define FSL_SRDSRSTCTL_SATA_RESET 0xf
--
1.5.3.2.104.g41ef
^ permalink raw reply related
* [PATCH 4/9 v2] add platform support for MPC837x MDS board
From: Li Yang @ 2007-10-11 9:54 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
The MPC837x MDS is a new member of Freescale MDS reference system.
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/platforms/83xx/Kconfig | 12 ++++
arch/powerpc/platforms/83xx/Makefile | 1 +
arch/powerpc/platforms/83xx/mpc837x_mds.c | 102 +++++++++++++++++++++++++++++
3 files changed, 115 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/83xx/mpc837x_mds.c
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index ec305f1..0c61e7a 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -50,6 +50,11 @@ config MPC836x_MDS
help
This option enables support for the MPC836x MDS Processor Board.
+config MPC837x_MDS
+ bool "Freescale MPC837x MDS"
+ select DEFAULT_UIMAGE
+ help
+ This option enables support for the MPC837x MDS Processor Board.
endchoice
config PPC_MPC831x
@@ -75,3 +80,10 @@ config PPC_MPC836x
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
default y if MPC836x_MDS
+
+config PPC_MPC837x
+ bool
+ select PPC_UDBG_16550
+ select PPC_INDIRECT_PCI
+ select FSL_SERDES
+ default y if MPC837x_MDS
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index 5a98f88..df46629 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o
obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o
+obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o
diff --git a/arch/powerpc/platforms/83xx/mpc837x_mds.c b/arch/powerpc/platforms/83xx/mpc837x_mds.c
new file mode 100644
index 0000000..4342173
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc837x_mds.c
@@ -0,0 +1,103 @@
+/*
+ * arch/powerpc/platforms/83xx/mpc837x_mds.c
+ *
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * MPC837x MDS board specific routines
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/pci.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+
+#include <asm/time.h>
+#include <asm/ipic.h>
+#include <asm/udbg.h>
+
+#include "mpc83xx.h"
+
+#ifndef CONFIG_PCI
+unsigned long isa_io_base = 0;
+unsigned long isa_mem_base = 0;
+#endif
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+static void __init mpc837x_mds_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("mpc837x_mds_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+ for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
+ mpc83xx_add_bridge(np);
+#endif
+}
+
+static struct of_device_id mpc837x_ids[] = {
+ { .type = "soc", },
+ { .compatible = "soc", },
+ {},
+};
+
+static int __init mpc837x_declare_of_platform_devices(void)
+{
+ if (!machine_is(mpc837x_mds))
+ return 0;
+
+ /* Publish of_device */
+ of_platform_bus_probe(NULL, mpc837x_ids, NULL);
+
+ return 0;
+}
+device_initcall(mpc837x_declare_of_platform_devices);
+
+static void __init mpc837x_mds_init_IRQ(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
+ if (!np)
+ return;
+
+ ipic_init(np, 0);
+
+ /* Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ ipic_set_default_priority();
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc837x_mds_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "fsl,mpc837xmds");
+}
+
+define_machine(mpc837x_mds) {
+ .name = "MPC837x MDS",
+ .probe = mpc837x_mds_probe,
+ .setup_arch = mpc837x_mds_setup_arch,
+ .init_IRQ = mpc837x_mds_init_IRQ,
+ .get_irq = ipic_get_irq,
+ .restart = mpc83xx_restart,
+ .time_init = mpc83xx_time_init,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
--
1.5.3.2.104.g41ef
^ permalink raw reply related
* [PATCH v4 or so] Use 1TB segments
From: Paul Mackerras @ 2007-10-11 10:37 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Jon Tollefson, Will Schmidt
This makes the kernel use 1TB segments for all kernel mappings and for
user addresses of 1TB and above, on machines which support them
(currently POWER5+, POWER6 and PA6T).
We detect that the machine supports 1TB segments by looking at the
ibm,processor-segment-sizes property in the device tree.
We don't currently use 1TB segments for user addresses < 1T, since
that would effectively prevent 32-bit processes from using huge pages
unless we also had a way to revert to using 256MB segments. That
would be possible but would involve extra complications (such as
keeping track of which segment size was used when HPTEs were inserted)
and is not addressed here.
Parts of this patch were originally written by Ben Herrenschmidt.
Signed-off-by: Paul Mackerras <paulus@samba.org>
---
Will, do you want to send in a Reviewed-by or a Tested-by for this?
PA6T mentioned in commit message, duplicate MMU_SEGSIZE_* definitions
removed. I hope that's everything. :)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index fbbd3f6..0ec1340 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -373,8 +373,16 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
ld r8,KSP(r4) /* new stack pointer */
BEGIN_FTR_SECTION
+ b 2f
+END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
+BEGIN_FTR_SECTION
clrrdi r6,r8,28 /* get its ESID */
clrrdi r9,r1,28 /* get current sp ESID */
+END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT)
+BEGIN_FTR_SECTION
+ clrrdi r6,r8,40 /* get its 1T ESID */
+ clrrdi r9,r1,40 /* get current sp 1T ESID */
+END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
clrldi. r0,r6,2 /* is new ESID c00000000? */
cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
cror eq,4*cr1+eq,eq
@@ -384,6 +392,11 @@ BEGIN_FTR_SECTION
ld r7,KSP_VSID(r4) /* Get new stack's VSID */
oris r0,r6,(SLB_ESID_V)@h
ori r0,r0,(SLB_NUM_BOLTED-1)@l
+BEGIN_FTR_SECTION
+ li r9,MMU_SEGSIZE_1T /* insert B field */
+ oris r6,r6,(MMU_SEGSIZE_1T << SLBIE_SSIZE_SHIFT)@h
+ rldimi r7,r9,SLB_VSID_SSIZE_SHIFT,0
+END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
/* Update the last bolted SLB. No write barriers are needed
* here, provided we only update the current CPU's SLB shadow
@@ -401,7 +414,6 @@ BEGIN_FTR_SECTION
isync
2:
-END_FTR_SECTION_IFSET(CPU_FTR_SLB)
clrrdi r7,r8,THREAD_SHIFT /* base of new stack */
/* Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
because we don't need to leave the 288-byte ABI gap at the
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 22ac245..97c5857 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -935,7 +935,7 @@ _GLOBAL(do_stab_bolted)
/* Calculate VSID */
/* This is a kernel address, so protovsid = ESID */
- ASM_VSID_SCRAMBLE(r11, r9)
+ ASM_VSID_SCRAMBLE(r11, r9, 256M)
rldic r9,r11,12,16 /* r9 = vsid << 12 */
/* Search the primary group for a free entry */
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 15998b5..7949c20 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -564,10 +564,15 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
#ifdef CONFIG_PPC64
if (cpu_has_feature(CPU_FTR_SLB)) {
- unsigned long sp_vsid = get_kernel_vsid(sp);
+ unsigned long sp_vsid;
unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
- sp_vsid <<= SLB_VSID_SHIFT;
+ if (cpu_has_feature(CPU_FTR_1T_SEGMENT))
+ sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
+ << SLB_VSID_SHIFT_1T;
+ else
+ sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_256M)
+ << SLB_VSID_SHIFT;
sp_vsid |= SLB_VSID_KERNEL | llp;
p->thread.ksp_vsid = sp_vsid;
}
diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S
index 35eabfb..ad253b9 100644
--- a/arch/powerpc/mm/hash_low_64.S
+++ b/arch/powerpc/mm/hash_low_64.S
@@ -54,7 +54,7 @@
/*
* _hash_page_4K(unsigned long ea, unsigned long access, unsigned long vsid,
- * pte_t *ptep, unsigned long trap, int local)
+ * pte_t *ptep, unsigned long trap, int local, int ssize)
*
* Adds a 4K page to the hash table in a segment of 4K pages only
*/
@@ -66,6 +66,7 @@ _GLOBAL(__hash_page_4K)
/* Save all params that we need after a function call */
std r6,STK_PARM(r6)(r1)
std r8,STK_PARM(r8)(r1)
+ std r9,STK_PARM(r9)(r1)
/* Add _PAGE_PRESENT to access */
ori r4,r4,_PAGE_PRESENT
@@ -117,6 +118,10 @@ _GLOBAL(__hash_page_4K)
* r4 (access) is re-useable, we use it for the new HPTE flags
*/
+BEGIN_FTR_SECTION
+ cmpdi r9,0 /* check segment size */
+ bne 3f
+END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
/* Calc va and put it in r29 */
rldicr r29,r5,28,63-28
rldicl r3,r3,0,36
@@ -126,9 +131,20 @@ _GLOBAL(__hash_page_4K)
rldicl r5,r5,0,25 /* vsid & 0x0000007fffffffff */
rldicl r0,r3,64-12,48 /* (ea >> 12) & 0xffff */
xor r28,r5,r0
+ b 4f
+
+3: /* Calc VA and hash in r29 and r28 for 1T segment */
+ sldi r29,r5,40 /* vsid << 40 */
+ clrldi r3,r3,24 /* ea & 0xffffffffff */
+ rldic r28,r5,25,25 /* (vsid << 25) & 0x7fffffffff */
+ clrldi r5,r5,40 /* vsid & 0xffffff */
+ rldicl r0,r3,64-12,36 /* (ea >> 12) & 0xfffffff */
+ xor r28,r28,r5
+ or r29,r3,r29 /* VA */
+ xor r28,r28,r0 /* hash */
/* Convert linux PTE bits into HW equivalents */
- andi. r3,r30,0x1fe /* Get basic set of flags */
+4: andi. r3,r30,0x1fe /* Get basic set of flags */
xori r3,r3,HPTE_R_N /* _PAGE_EXEC -> NOEXEC */
rlwinm r0,r30,32-9+1,30,30 /* _PAGE_RW -> _PAGE_USER (r0) */
rlwinm r4,r30,32-7+1,30,30 /* _PAGE_DIRTY -> _PAGE_USER (r4) */
@@ -183,6 +199,7 @@ htab_insert_pte:
mr r4,r29 /* Retreive va */
li r7,0 /* !bolted, !secondary */
li r8,MMU_PAGE_4K /* page size */
+ ld r9,STK_PARM(r9)(r1) /* segment size */
_GLOBAL(htab_call_hpte_insert1)
bl . /* Patched by htab_finish_init() */
cmpdi 0,r3,0
@@ -205,6 +222,7 @@ _GLOBAL(htab_call_hpte_insert1)
mr r4,r29 /* Retreive va */
li r7,HPTE_V_SECONDARY /* !bolted, secondary */
li r8,MMU_PAGE_4K /* page size */
+ ld r9,STK_PARM(r9)(r1) /* segment size */
_GLOBAL(htab_call_hpte_insert2)
bl . /* Patched by htab_finish_init() */
cmpdi 0,r3,0
@@ -273,7 +291,8 @@ htab_modify_pte:
/* Call ppc_md.hpte_updatepp */
mr r5,r29 /* va */
li r6,MMU_PAGE_4K /* page size */
- ld r7,STK_PARM(r8)(r1) /* get "local" param */
+ ld r7,STK_PARM(r9)(r1) /* segment size */
+ ld r8,STK_PARM(r8)(r1) /* get "local" param */
_GLOBAL(htab_call_hpte_updatepp)
bl . /* Patched by htab_finish_init() */
@@ -325,6 +344,7 @@ _GLOBAL(__hash_page_4K)
/* Save all params that we need after a function call */
std r6,STK_PARM(r6)(r1)
std r8,STK_PARM(r8)(r1)
+ std r9,STK_PARM(r9)(r1)
/* Add _PAGE_PRESENT to access */
ori r4,r4,_PAGE_PRESENT
@@ -383,18 +403,33 @@ _GLOBAL(__hash_page_4K)
/* Load the hidx index */
rldicl r25,r3,64-12,60
+BEGIN_FTR_SECTION
+ cmpdi r9,0 /* check segment size */
+ bne 3f
+END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
/* Calc va and put it in r29 */
rldicr r29,r5,28,63-28 /* r29 = (vsid << 28) */
rldicl r3,r3,0,36 /* r3 = (ea & 0x0fffffff) */
- or r29,r3,r29 /* r29 = va
+ or r29,r3,r29 /* r29 = va */
/* Calculate hash value for primary slot and store it in r28 */
rldicl r5,r5,0,25 /* vsid & 0x0000007fffffffff */
rldicl r0,r3,64-12,48 /* (ea >> 12) & 0xffff */
xor r28,r5,r0
+ b 4f
+
+3: /* Calc VA and hash in r29 and r28 for 1T segment */
+ sldi r29,r5,40 /* vsid << 40 */
+ clrldi r3,r3,24 /* ea & 0xffffffffff */
+ rldic r28,r5,25,25 /* (vsid << 25) & 0x7fffffffff */
+ clrldi r5,r5,40 /* vsid & 0xffffff */
+ rldicl r0,r3,64-12,36 /* (ea >> 12) & 0xfffffff */
+ xor r28,r28,r5
+ or r29,r3,r29 /* VA */
+ xor r28,r28,r0 /* hash */
/* Convert linux PTE bits into HW equivalents */
- andi. r3,r30,0x1fe /* Get basic set of flags */
+4: andi. r3,r30,0x1fe /* Get basic set of flags */
xori r3,r3,HPTE_R_N /* _PAGE_EXEC -> NOEXEC */
rlwinm r0,r30,32-9+1,30,30 /* _PAGE_RW -> _PAGE_USER (r0) */
rlwinm r4,r30,32-7+1,30,30 /* _PAGE_DIRTY -> _PAGE_USER (r4) */
@@ -462,6 +497,7 @@ htab_special_pfn:
mr r4,r29 /* Retreive va */
li r7,0 /* !bolted, !secondary */
li r8,MMU_PAGE_4K /* page size */
+ ld r9,STK_PARM(r9)(r1) /* segment size */
_GLOBAL(htab_call_hpte_insert1)
bl . /* patched by htab_finish_init() */
cmpdi 0,r3,0
@@ -488,6 +524,7 @@ _GLOBAL(htab_call_hpte_insert1)
mr r4,r29 /* Retreive va */
li r7,HPTE_V_SECONDARY /* !bolted, secondary */
li r8,MMU_PAGE_4K /* page size */
+ ld r9,STK_PARM(r9)(r1) /* segment size */
_GLOBAL(htab_call_hpte_insert2)
bl . /* patched by htab_finish_init() */
cmpdi 0,r3,0
@@ -586,7 +623,8 @@ htab_modify_pte:
/* Call ppc_md.hpte_updatepp */
mr r5,r29 /* va */
li r6,MMU_PAGE_4K /* page size */
- ld r7,STK_PARM(r8)(r1) /* get "local" param */
+ ld r7,STK_PARM(r9)(r1) /* segment size */
+ ld r8,STK_PARM(r8)(r1) /* get "local" param */
_GLOBAL(htab_call_hpte_updatepp)
bl . /* patched by htab_finish_init() */
@@ -634,6 +672,7 @@ _GLOBAL(__hash_page_64K)
/* Save all params that we need after a function call */
std r6,STK_PARM(r6)(r1)
std r8,STK_PARM(r8)(r1)
+ std r9,STK_PARM(r9)(r1)
/* Add _PAGE_PRESENT to access */
ori r4,r4,_PAGE_PRESENT
@@ -690,6 +729,10 @@ END_FTR_SECTION_IFCLR(CPU_FTR_CI_LARGE_PAGE)
* r4 (access) is re-useable, we use it for the new HPTE flags
*/
+BEGIN_FTR_SECTION
+ cmpdi r9,0 /* check segment size */
+ bne 3f
+END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
/* Calc va and put it in r29 */
rldicr r29,r5,28,63-28
rldicl r3,r3,0,36
@@ -699,9 +742,20 @@ END_FTR_SECTION_IFCLR(CPU_FTR_CI_LARGE_PAGE)
rldicl r5,r5,0,25 /* vsid & 0x0000007fffffffff */
rldicl r0,r3,64-16,52 /* (ea >> 16) & 0xfff */
xor r28,r5,r0
+ b 4f
+
+3: /* Calc VA and hash in r29 and r28 for 1T segment */
+ sldi r29,r5,40 /* vsid << 40 */
+ clrldi r3,r3,24 /* ea & 0xffffffffff */
+ rldic r28,r5,25,25 /* (vsid << 25) & 0x7fffffffff */
+ clrldi r5,r5,40 /* vsid & 0xffffff */
+ rldicl r0,r3,64-16,40 /* (ea >> 16) & 0xffffff */
+ xor r28,r28,r5
+ or r29,r3,r29 /* VA */
+ xor r28,r28,r0 /* hash */
/* Convert linux PTE bits into HW equivalents */
- andi. r3,r30,0x1fe /* Get basic set of flags */
+4: andi. r3,r30,0x1fe /* Get basic set of flags */
xori r3,r3,HPTE_R_N /* _PAGE_EXEC -> NOEXEC */
rlwinm r0,r30,32-9+1,30,30 /* _PAGE_RW -> _PAGE_USER (r0) */
rlwinm r4,r30,32-7+1,30,30 /* _PAGE_DIRTY -> _PAGE_USER (r4) */
@@ -756,6 +810,7 @@ ht64_insert_pte:
mr r4,r29 /* Retreive va */
li r7,0 /* !bolted, !secondary */
li r8,MMU_PAGE_64K
+ ld r9,STK_PARM(r9)(r1) /* segment size */
_GLOBAL(ht64_call_hpte_insert1)
bl . /* patched by htab_finish_init() */
cmpdi 0,r3,0
@@ -778,6 +833,7 @@ _GLOBAL(ht64_call_hpte_insert1)
mr r4,r29 /* Retreive va */
li r7,HPTE_V_SECONDARY /* !bolted, secondary */
li r8,MMU_PAGE_64K
+ ld r9,STK_PARM(r9)(r1) /* segment size */
_GLOBAL(ht64_call_hpte_insert2)
bl . /* patched by htab_finish_init() */
cmpdi 0,r3,0
@@ -846,7 +902,8 @@ ht64_modify_pte:
/* Call ppc_md.hpte_updatepp */
mr r5,r29 /* va */
li r6,MMU_PAGE_64K
- ld r7,STK_PARM(r8)(r1) /* get "local" param */
+ ld r7,STK_PARM(r9)(r1) /* segment size */
+ ld r8,STK_PARM(r8)(r1) /* get "local" param */
_GLOBAL(ht64_call_hpte_updatepp)
bl . /* patched by htab_finish_init() */
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 6ba9b47..34e5c0b 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -38,7 +38,7 @@
static DEFINE_SPINLOCK(native_tlbie_lock);
-static inline void __tlbie(unsigned long va, unsigned int psize)
+static inline void __tlbie(unsigned long va, int psize, int ssize)
{
unsigned int penc;
@@ -48,18 +48,20 @@ static inline void __tlbie(unsigned long va, unsigned int psize)
switch (psize) {
case MMU_PAGE_4K:
va &= ~0xffful;
+ va |= ssize << 8;
asm volatile("tlbie %0,0" : : "r" (va) : "memory");
break;
default:
penc = mmu_psize_defs[psize].penc;
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
+ va |= ssize << 8;
asm volatile("tlbie %0,1" : : "r" (va) : "memory");
break;
}
}
-static inline void __tlbiel(unsigned long va, unsigned int psize)
+static inline void __tlbiel(unsigned long va, int psize, int ssize)
{
unsigned int penc;
@@ -69,6 +71,7 @@ static inline void __tlbiel(unsigned long va, unsigned int psize)
switch (psize) {
case MMU_PAGE_4K:
va &= ~0xffful;
+ va |= ssize << 8;
asm volatile(".long 0x7c000224 | (%0 << 11) | (0 << 21)"
: : "r"(va) : "memory");
break;
@@ -76,6 +79,7 @@ static inline void __tlbiel(unsigned long va, unsigned int psize)
penc = mmu_psize_defs[psize].penc;
va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
va |= penc << 12;
+ va |= ssize << 8;
asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
: : "r"(va) : "memory");
break;
@@ -83,7 +87,7 @@ static inline void __tlbiel(unsigned long va, unsigned int psize)
}
-static inline void tlbie(unsigned long va, int psize, int local)
+static inline void tlbie(unsigned long va, int psize, int ssize, int local)
{
unsigned int use_local = local && cpu_has_feature(CPU_FTR_TLBIEL);
int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE);
@@ -94,10 +98,10 @@ static inline void tlbie(unsigned long va, int psize, int local)
spin_lock(&native_tlbie_lock);
asm volatile("ptesync": : :"memory");
if (use_local) {
- __tlbiel(va, psize);
+ __tlbiel(va, psize, ssize);
asm volatile("ptesync": : :"memory");
} else {
- __tlbie(va, psize);
+ __tlbie(va, psize, ssize);
asm volatile("eieio; tlbsync; ptesync": : :"memory");
}
if (lock_tlbie && !use_local)
@@ -126,7 +130,7 @@ static inline void native_unlock_hpte(struct hash_pte *hptep)
static long native_hpte_insert(unsigned long hpte_group, unsigned long va,
unsigned long pa, unsigned long rflags,
- unsigned long vflags, int psize)
+ unsigned long vflags, int psize, int ssize)
{
struct hash_pte *hptep = htab_address + hpte_group;
unsigned long hpte_v, hpte_r;
@@ -153,7 +157,7 @@ static long native_hpte_insert(unsigned long hpte_group, unsigned long va,
if (i == HPTES_PER_GROUP)
return -1;
- hpte_v = hpte_encode_v(va, psize) | vflags | HPTE_V_VALID;
+ hpte_v = hpte_encode_v(va, psize, ssize) | vflags | HPTE_V_VALID;
hpte_r = hpte_encode_r(pa, psize) | rflags;
if (!(vflags & HPTE_V_BOLTED)) {
@@ -215,13 +219,14 @@ static long native_hpte_remove(unsigned long hpte_group)
}
static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
- unsigned long va, int psize, int local)
+ unsigned long va, int psize, int ssize,
+ int local)
{
struct hash_pte *hptep = htab_address + slot;
unsigned long hpte_v, want_v;
int ret = 0;
- want_v = hpte_encode_v(va, psize);
+ want_v = hpte_encode_v(va, psize, ssize);
DBG_LOW(" update(va=%016lx, avpnv=%016lx, hash=%016lx, newpp=%x)",
va, want_v & HPTE_V_AVPN, slot, newpp);
@@ -243,39 +248,32 @@ static long native_hpte_updatepp(unsigned long slot, unsigned long newpp,
native_unlock_hpte(hptep);
/* Ensure it is out of the tlb too. */
- tlbie(va, psize, local);
+ tlbie(va, psize, ssize, local);
return ret;
}
-static long native_hpte_find(unsigned long va, int psize)
+static long native_hpte_find(unsigned long va, int psize, int ssize)
{
struct hash_pte *hptep;
unsigned long hash;
- unsigned long i, j;
+ unsigned long i;
long slot;
unsigned long want_v, hpte_v;
- hash = hpt_hash(va, mmu_psize_defs[psize].shift);
- want_v = hpte_encode_v(va, psize);
+ hash = hpt_hash(va, mmu_psize_defs[psize].shift, ssize);
+ want_v = hpte_encode_v(va, psize, ssize);
- for (j = 0; j < 2; j++) {
- slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
- for (i = 0; i < HPTES_PER_GROUP; i++) {
- hptep = htab_address + slot;
- hpte_v = hptep->v;
+ /* Bolted mappings are only ever in the primary group */
+ slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
+ for (i = 0; i < HPTES_PER_GROUP; i++) {
+ hptep = htab_address + slot;
+ hpte_v = hptep->v;
- if (HPTE_V_COMPARE(hpte_v, want_v)
- && (hpte_v & HPTE_V_VALID)
- && ( !!(hpte_v & HPTE_V_SECONDARY) == j)) {
- /* HPTE matches */
- if (j)
- slot = -slot;
- return slot;
- }
- ++slot;
- }
- hash = ~hash;
+ if (HPTE_V_COMPARE(hpte_v, want_v) && (hpte_v & HPTE_V_VALID))
+ /* HPTE matches */
+ return slot;
+ ++slot;
}
return -1;
@@ -289,16 +287,16 @@ static long native_hpte_find(unsigned long va, int psize)
* No need to lock here because we should be the only user.
*/
static void native_hpte_updateboltedpp(unsigned long newpp, unsigned long ea,
- int psize)
+ int psize, int ssize)
{
unsigned long vsid, va;
long slot;
struct hash_pte *hptep;
- vsid = get_kernel_vsid(ea);
- va = (vsid << 28) | (ea & 0x0fffffff);
+ vsid = get_kernel_vsid(ea, ssize);
+ va = hpt_va(ea, vsid, ssize);
- slot = native_hpte_find(va, psize);
+ slot = native_hpte_find(va, psize, ssize);
if (slot == -1)
panic("could not find page to bolt\n");
hptep = htab_address + slot;
@@ -308,11 +306,11 @@ static void native_hpte_updateboltedpp(unsigned long newpp, unsigned long ea,
(newpp & (HPTE_R_PP | HPTE_R_N));
/* Ensure it is out of the tlb too. */
- tlbie(va, psize, 0);
+ tlbie(va, psize, ssize, 0);
}
static void native_hpte_invalidate(unsigned long slot, unsigned long va,
- int psize, int local)
+ int psize, int ssize, int local)
{
struct hash_pte *hptep = htab_address + slot;
unsigned long hpte_v;
@@ -323,7 +321,7 @@ static void native_hpte_invalidate(unsigned long slot, unsigned long va,
DBG_LOW(" invalidate(va=%016lx, hash: %x)\n", va, slot);
- want_v = hpte_encode_v(va, psize);
+ want_v = hpte_encode_v(va, psize, ssize);
native_lock_hpte(hptep);
hpte_v = hptep->v;
@@ -335,7 +333,7 @@ static void native_hpte_invalidate(unsigned long slot, unsigned long va,
hptep->v = 0;
/* Invalidate the TLB */
- tlbie(va, psize, local);
+ tlbie(va, psize, ssize, local);
local_irq_restore(flags);
}
@@ -345,7 +343,7 @@ static void native_hpte_invalidate(unsigned long slot, unsigned long va,
#define LP_MASK(i) ((0xFF >> (i)) << LP_SHIFT)
static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
- int *psize, unsigned long *va)
+ int *psize, int *ssize, unsigned long *va)
{
unsigned long hpte_r = hpte->r;
unsigned long hpte_v = hpte->v;
@@ -401,6 +399,7 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot,
*va = avpn;
*psize = size;
+ *ssize = hpte_v >> HPTE_V_SSIZE_SHIFT;
}
/*
@@ -417,7 +416,7 @@ static void native_hpte_clear(void)
struct hash_pte *hptep = htab_address;
unsigned long hpte_v, va;
unsigned long pteg_count;
- int psize;
+ int psize, ssize;
pteg_count = htab_hash_mask + 1;
@@ -443,9 +442,9 @@ static void native_hpte_clear(void)
* already hold the native_tlbie_lock.
*/
if (hpte_v & HPTE_V_VALID) {
- hpte_decode(hptep, slot, &psize, &va);
+ hpte_decode(hptep, slot, &psize, &ssize, &va);
hptep->v = 0;
- __tlbie(va, psize);
+ __tlbie(va, psize, ssize);
}
}
@@ -468,6 +467,7 @@ static void native_flush_hash_range(unsigned long number, int local)
real_pte_t pte;
struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
unsigned long psize = batch->psize;
+ int ssize = batch->ssize;
int i;
local_irq_save(flags);
@@ -477,14 +477,14 @@ static void native_flush_hash_range(unsigned long number, int local)
pte = batch->pte[i];
pte_iterate_hashed_subpages(pte, psize, va, index, shift) {
- hash = hpt_hash(va, shift);
+ hash = hpt_hash(va, shift, ssize);
hidx = __rpte_to_hidx(pte, index);
if (hidx & _PTEIDX_SECONDARY)
hash = ~hash;
slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
slot += hidx & _PTEIDX_GROUP_IX;
hptep = htab_address + slot;
- want_v = hpte_encode_v(va, psize);
+ want_v = hpte_encode_v(va, psize, ssize);
native_lock_hpte(hptep);
hpte_v = hptep->v;
if (!HPTE_V_COMPARE(hpte_v, want_v) ||
@@ -504,7 +504,7 @@ static void native_flush_hash_range(unsigned long number, int local)
pte_iterate_hashed_subpages(pte, psize, va, index,
shift) {
- __tlbiel(va, psize);
+ __tlbiel(va, psize, ssize);
} pte_iterate_hashed_end();
}
asm volatile("ptesync":::"memory");
@@ -521,7 +521,7 @@ static void native_flush_hash_range(unsigned long number, int local)
pte_iterate_hashed_subpages(pte, psize, va, index,
shift) {
- __tlbie(va, psize);
+ __tlbie(va, psize, ssize);
} pte_iterate_hashed_end();
}
asm volatile("eieio; tlbsync; ptesync":::"memory");
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index d525f2e..611ad08 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -93,6 +93,8 @@ int mmu_linear_psize = MMU_PAGE_4K;
int mmu_virtual_psize = MMU_PAGE_4K;
int mmu_vmalloc_psize = MMU_PAGE_4K;
int mmu_io_psize = MMU_PAGE_4K;
+int mmu_kernel_ssize = MMU_SEGSIZE_256M;
+int mmu_highuser_ssize = MMU_SEGSIZE_256M;
#ifdef CONFIG_HUGETLB_PAGE
int mmu_huge_psize = MMU_PAGE_16M;
unsigned int HPAGE_SHIFT;
@@ -145,7 +147,8 @@ struct mmu_psize_def mmu_psize_defaults_gp[] = {
int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
- unsigned long pstart, unsigned long mode, int psize)
+ unsigned long pstart, unsigned long mode,
+ int psize, int ssize)
{
unsigned long vaddr, paddr;
unsigned int step, shift;
@@ -158,8 +161,8 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
for (vaddr = vstart, paddr = pstart; vaddr < vend;
vaddr += step, paddr += step) {
unsigned long hash, hpteg;
- unsigned long vsid = get_kernel_vsid(vaddr);
- unsigned long va = (vsid << 28) | (vaddr & 0x0fffffff);
+ unsigned long vsid = get_kernel_vsid(vaddr, ssize);
+ unsigned long va = hpt_va(vaddr, vsid, ssize);
tmp_mode = mode;
@@ -167,14 +170,14 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
if (!in_kernel_text(vaddr))
tmp_mode = mode | HPTE_R_N;
- hash = hpt_hash(va, shift);
+ hash = hpt_hash(va, shift, ssize);
hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
DBG("htab_bolt_mapping: calling %p\n", ppc_md.hpte_insert);
BUG_ON(!ppc_md.hpte_insert);
ret = ppc_md.hpte_insert(hpteg, va, paddr,
- tmp_mode, HPTE_V_BOLTED, psize);
+ tmp_mode, HPTE_V_BOLTED, psize, ssize);
if (ret < 0)
break;
@@ -186,6 +189,37 @@ int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
return ret < 0 ? ret : 0;
}
+static int __init htab_dt_scan_seg_sizes(unsigned long node,
+ const char *uname, int depth,
+ void *data)
+{
+ char *type = of_get_flat_dt_prop(node, "device_type", NULL);
+ u32 *prop;
+ unsigned long size = 0;
+
+ /* We are scanning "cpu" nodes only */
+ if (type == NULL || strcmp(type, "cpu") != 0)
+ return 0;
+
+ prop = (u32 *)of_get_flat_dt_prop(node, "ibm,processor-segment-sizes",
+ &size);
+ if (prop == NULL)
+ return 0;
+ for (; size >= 4; size -= 4, ++prop) {
+ if (prop[0] == 40) {
+ DBG("1T segment support detected\n");
+ cur_cpu_spec->cpu_features |= CPU_FTR_1T_SEGMENT;
+ }
+ return 1;
+ }
+ return 0;
+}
+
+static void __init htab_init_seg_sizes(void)
+{
+ of_scan_flat_dt(htab_dt_scan_seg_sizes, NULL);
+}
+
static int __init htab_dt_scan_page_sizes(unsigned long node,
const char *uname, int depth,
void *data)
@@ -265,7 +299,6 @@ static int __init htab_dt_scan_page_sizes(unsigned long node,
return 0;
}
-
static void __init htab_init_page_sizes(void)
{
int rc;
@@ -398,7 +431,7 @@ void create_section_mapping(unsigned long start, unsigned long end)
{
BUG_ON(htab_bolt_mapping(start, end, __pa(start),
_PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX,
- mmu_linear_psize));
+ mmu_linear_psize, mmu_kernel_ssize));
}
#endif /* CONFIG_MEMORY_HOTPLUG */
@@ -449,9 +482,18 @@ void __init htab_initialize(void)
DBG(" -> htab_initialize()\n");
+ /* Initialize segment sizes */
+ htab_init_seg_sizes();
+
/* Initialize page sizes */
htab_init_page_sizes();
+ if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) {
+ mmu_kernel_ssize = MMU_SEGSIZE_1T;
+ mmu_highuser_ssize = MMU_SEGSIZE_1T;
+ printk(KERN_INFO "Using 1TB segments\n");
+ }
+
/*
* Calculate the required size of the htab. We want the number of
* PTEGs to equal one half the number of real pages.
@@ -523,18 +565,20 @@ void __init htab_initialize(void)
if (base != dart_tablebase)
BUG_ON(htab_bolt_mapping(base, dart_tablebase,
__pa(base), mode_rw,
- mmu_linear_psize));
+ mmu_linear_psize,
+ mmu_kernel_ssize));
if ((base + size) > dart_table_end)
BUG_ON(htab_bolt_mapping(dart_tablebase+16*MB,
base + size,
__pa(dart_table_end),
mode_rw,
- mmu_linear_psize));
+ mmu_linear_psize,
+ mmu_kernel_ssize));
continue;
}
#endif /* CONFIG_U3_DART */
BUG_ON(htab_bolt_mapping(base, base + size, __pa(base),
- mode_rw, mmu_linear_psize));
+ mode_rw, mmu_linear_psize, mmu_kernel_ssize));
}
/*
@@ -553,7 +597,7 @@ void __init htab_initialize(void)
BUG_ON(htab_bolt_mapping(tce_alloc_start, tce_alloc_end,
__pa(tce_alloc_start), mode_rw,
- mmu_linear_psize));
+ mmu_linear_psize, mmu_kernel_ssize));
}
htab_finish_init();
@@ -621,7 +665,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
pte_t *ptep;
cpumask_t tmp;
int rc, user_region = 0, local = 0;
- int psize;
+ int psize, ssize;
DBG_LOW("hash_page(ea=%016lx, access=%lx, trap=%lx\n",
ea, access, trap);
@@ -640,20 +684,22 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
DBG_LOW(" user region with no mm !\n");
return 1;
}
- vsid = get_vsid(mm->context.id, ea);
#ifdef CONFIG_PPC_MM_SLICES
psize = get_slice_psize(mm, ea);
#else
psize = mm->context.user_psize;
#endif
+ ssize = user_segment_size(ea);
+ vsid = get_vsid(mm->context.id, ea, ssize);
break;
case VMALLOC_REGION_ID:
mm = &init_mm;
- vsid = get_kernel_vsid(ea);
+ vsid = get_kernel_vsid(ea, mmu_kernel_ssize);
if (ea < VMALLOC_END)
psize = mmu_vmalloc_psize;
else
psize = mmu_io_psize;
+ ssize = mmu_kernel_ssize;
break;
default:
/* Not a valid range
@@ -758,10 +804,10 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
#ifdef CONFIG_PPC_HAS_HASH_64K
if (psize == MMU_PAGE_64K)
- rc = __hash_page_64K(ea, access, vsid, ptep, trap, local);
+ rc = __hash_page_64K(ea, access, vsid, ptep, trap, local, ssize);
else
#endif /* CONFIG_PPC_HAS_HASH_64K */
- rc = __hash_page_4K(ea, access, vsid, ptep, trap, local);
+ rc = __hash_page_4K(ea, access, vsid, ptep, trap, local, ssize);
#ifndef CONFIG_PPC_64K_PAGES
DBG_LOW(" o-pte: %016lx\n", pte_val(*ptep));
@@ -783,6 +829,7 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
cpumask_t mask;
unsigned long flags;
int local = 0;
+ int ssize;
BUG_ON(REGION_ID(ea) != USER_REGION_ID);
@@ -815,7 +862,8 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
#endif /* CONFIG_PPC_64K_PAGES */
/* Get VSID */
- vsid = get_vsid(mm->context.id, ea);
+ ssize = user_segment_size(ea);
+ vsid = get_vsid(mm->context.id, ea, ssize);
/* Hash doesn't like irqs */
local_irq_save(flags);
@@ -828,28 +876,29 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
/* Hash it in */
#ifdef CONFIG_PPC_HAS_HASH_64K
if (mm->context.user_psize == MMU_PAGE_64K)
- __hash_page_64K(ea, access, vsid, ptep, trap, local);
+ __hash_page_64K(ea, access, vsid, ptep, trap, local, ssize);
else
#endif /* CONFIG_PPC_HAS_HASH_64K */
- __hash_page_4K(ea, access, vsid, ptep, trap, local);
+ __hash_page_4K(ea, access, vsid, ptep, trap, local, ssize);
local_irq_restore(flags);
}
-void flush_hash_page(unsigned long va, real_pte_t pte, int psize, int local)
+void flush_hash_page(unsigned long va, real_pte_t pte, int psize, int ssize,
+ int local)
{
unsigned long hash, index, shift, hidx, slot;
DBG_LOW("flush_hash_page(va=%016x)\n", va);
pte_iterate_hashed_subpages(pte, psize, va, index, shift) {
- hash = hpt_hash(va, shift);
+ hash = hpt_hash(va, shift, ssize);
hidx = __rpte_to_hidx(pte, index);
if (hidx & _PTEIDX_SECONDARY)
hash = ~hash;
slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
slot += hidx & _PTEIDX_GROUP_IX;
DBG_LOW(" sub %d: hash=%x, hidx=%x\n", index, slot, hidx);
- ppc_md.hpte_invalidate(slot, va, psize, local);
+ ppc_md.hpte_invalidate(slot, va, psize, ssize, local);
} pte_iterate_hashed_end();
}
@@ -864,7 +913,7 @@ void flush_hash_range(unsigned long number, int local)
for (i = 0; i < number; i++)
flush_hash_page(batch->vaddr[i], batch->pte[i],
- batch->psize, local);
+ batch->psize, batch->ssize, local);
}
}
@@ -890,17 +939,19 @@ void low_hash_fault(struct pt_regs *regs, unsigned long address)
#ifdef CONFIG_DEBUG_PAGEALLOC
static void kernel_map_linear_page(unsigned long vaddr, unsigned long lmi)
{
- unsigned long hash, hpteg, vsid = get_kernel_vsid(vaddr);
- unsigned long va = (vsid << 28) | (vaddr & 0x0fffffff);
+ unsigned long hash, hpteg;
+ unsigned long vsid = get_kernel_vsid(vaddr, mmu_kernel_ssize);
+ unsigned long va = hpt_va(vaddr, vsid, mmu_kernel_ssize);
unsigned long mode = _PAGE_ACCESSED | _PAGE_DIRTY |
_PAGE_COHERENT | PP_RWXX | HPTE_R_N;
int ret;
- hash = hpt_hash(va, PAGE_SHIFT);
+ hash = hpt_hash(va, PAGE_SHIFT, mmu_kernel_ssize);
hpteg = ((hash & htab_hash_mask) * HPTES_PER_GROUP);
ret = ppc_md.hpte_insert(hpteg, va, __pa(vaddr),
- mode, HPTE_V_BOLTED, mmu_linear_psize);
+ mode, HPTE_V_BOLTED,
+ mmu_linear_psize, mmu_kernel_ssize);
BUG_ON (ret < 0);
spin_lock(&linear_map_hash_lock);
BUG_ON(linear_map_hash_slots[lmi] & 0x80);
@@ -910,10 +961,11 @@ static void kernel_map_linear_page(unsigned long vaddr, unsigned long lmi)
static void kernel_unmap_linear_page(unsigned long vaddr, unsigned long lmi)
{
- unsigned long hash, hidx, slot, vsid = get_kernel_vsid(vaddr);
- unsigned long va = (vsid << 28) | (vaddr & 0x0fffffff);
+ unsigned long hash, hidx, slot;
+ unsigned long vsid = get_kernel_vsid(vaddr, mmu_kernel_ssize);
+ unsigned long va = hpt_va(vaddr, vsid, mmu_kernel_ssize);
- hash = hpt_hash(va, PAGE_SHIFT);
+ hash = hpt_hash(va, PAGE_SHIFT, mmu_kernel_ssize);
spin_lock(&linear_map_hash_lock);
BUG_ON(!(linear_map_hash_slots[lmi] & 0x80));
hidx = linear_map_hash_slots[lmi] & 0x7f;
@@ -923,7 +975,7 @@ static void kernel_unmap_linear_page(unsigned long vaddr, unsigned long lmi)
hash = ~hash;
slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
slot += hidx & _PTEIDX_GROUP_IX;
- ppc_md.hpte_invalidate(slot, va, mmu_linear_psize, 0);
+ ppc_md.hpte_invalidate(slot, va, mmu_linear_psize, mmu_kernel_ssize, 0);
}
void kernel_map_pages(struct page *page, int numpages, int enable)
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index ba5f12a..08f0d9f 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -403,11 +403,12 @@ int hash_huge_page(struct mm_struct *mm, unsigned long access,
unsigned long va, rflags, pa;
long slot;
int err = 1;
+ int ssize = user_segment_size(ea);
ptep = huge_pte_offset(mm, ea);
/* Search the Linux page table for a match with va */
- va = (vsid << 28) | (ea & 0x0fffffff);
+ va = hpt_va(ea, vsid, ssize);
/*
* If no pte found or not present, send the problem up to
@@ -458,19 +459,19 @@ int hash_huge_page(struct mm_struct *mm, unsigned long access,
/* There MIGHT be an HPTE for this pte */
unsigned long hash, slot;
- hash = hpt_hash(va, HPAGE_SHIFT);
+ hash = hpt_hash(va, HPAGE_SHIFT, ssize);
if (old_pte & _PAGE_F_SECOND)
hash = ~hash;
slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
slot += (old_pte & _PAGE_F_GIX) >> 12;
if (ppc_md.hpte_updatepp(slot, rflags, va, mmu_huge_psize,
- local) == -1)
+ ssize, local) == -1)
old_pte &= ~_PAGE_HPTEFLAGS;
}
if (likely(!(old_pte & _PAGE_HASHPTE))) {
- unsigned long hash = hpt_hash(va, HPAGE_SHIFT);
+ unsigned long hash = hpt_hash(va, HPAGE_SHIFT, ssize);
unsigned long hpte_group;
pa = pte_pfn(__pte(old_pte)) << PAGE_SHIFT;
@@ -489,7 +490,7 @@ repeat:
/* Insert into the hash table, primary slot */
slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags, 0,
- mmu_huge_psize);
+ mmu_huge_psize, ssize);
/* Primary is full, try the secondary */
if (unlikely(slot == -1)) {
@@ -497,7 +498,7 @@ repeat:
HPTES_PER_GROUP) & ~0x7UL;
slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags,
HPTE_V_SECONDARY,
- mmu_huge_psize);
+ mmu_huge_psize, ssize);
if (slot == -1) {
if (mftb() & 0x1)
hpte_group = ((hash & htab_hash_mask) *
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 60fd52c..3ef0ad2 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -87,8 +87,8 @@ static int map_io_page(unsigned long ea, unsigned long pa, int flags)
* entry in the hardware page table.
*
*/
- if (htab_bolt_mapping(ea, (unsigned long)ea + PAGE_SIZE,
- pa, flags, mmu_io_psize)) {
+ if (htab_bolt_mapping(ea, ea + PAGE_SIZE, pa, flags,
+ mmu_io_psize, mmu_kernel_ssize)) {
printk(KERN_ERR "Failed to do bolted mapping IO "
"memory at %016lx !\n", pa);
return -ENOMEM;
diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
index 4bee1cf..6c164ce 100644
--- a/arch/powerpc/mm/slb.c
+++ b/arch/powerpc/mm/slb.c
@@ -43,17 +43,26 @@ static void slb_allocate(unsigned long ea)
slb_allocate_realmode(ea);
}
-static inline unsigned long mk_esid_data(unsigned long ea, unsigned long slot)
+static inline unsigned long mk_esid_data(unsigned long ea, int ssize,
+ unsigned long slot)
{
- return (ea & ESID_MASK) | SLB_ESID_V | slot;
+ unsigned long mask;
+
+ mask = (ssize == MMU_SEGSIZE_256M)? ESID_MASK: ESID_MASK_1T;
+ return (ea & mask) | SLB_ESID_V | slot;
}
-static inline unsigned long mk_vsid_data(unsigned long ea, unsigned long flags)
+#define slb_vsid_shift(ssize) \
+ ((ssize) == MMU_SEGSIZE_256M? SLB_VSID_SHIFT: SLB_VSID_SHIFT_1T)
+
+static inline unsigned long mk_vsid_data(unsigned long ea, int ssize,
+ unsigned long flags)
{
- return (get_kernel_vsid(ea) << SLB_VSID_SHIFT) | flags;
+ return (get_kernel_vsid(ea, ssize) << slb_vsid_shift(ssize)) | flags |
+ ((unsigned long) ssize << SLB_VSID_SSIZE_SHIFT);
}
-static inline void slb_shadow_update(unsigned long ea,
+static inline void slb_shadow_update(unsigned long ea, int ssize,
unsigned long flags,
unsigned long entry)
{
@@ -63,8 +72,8 @@ static inline void slb_shadow_update(unsigned long ea,
* we only update the current CPU's SLB shadow buffer.
*/
get_slb_shadow()->save_area[entry].esid = 0;
- get_slb_shadow()->save_area[entry].vsid = mk_vsid_data(ea, flags);
- get_slb_shadow()->save_area[entry].esid = mk_esid_data(ea, entry);
+ get_slb_shadow()->save_area[entry].vsid = mk_vsid_data(ea, ssize, flags);
+ get_slb_shadow()->save_area[entry].esid = mk_esid_data(ea, ssize, entry);
}
static inline void slb_shadow_clear(unsigned long entry)
@@ -72,7 +81,8 @@ static inline void slb_shadow_clear(unsigned long entry)
get_slb_shadow()->save_area[entry].esid = 0;
}
-static inline void create_shadowed_slbe(unsigned long ea, unsigned long flags,
+static inline void create_shadowed_slbe(unsigned long ea, int ssize,
+ unsigned long flags,
unsigned long entry)
{
/*
@@ -80,11 +90,11 @@ static inline void create_shadowed_slbe(unsigned long ea, unsigned long flags,
* we don't get a stale entry here if we get preempted by PHYP
* between these two statements.
*/
- slb_shadow_update(ea, flags, entry);
+ slb_shadow_update(ea, ssize, flags, entry);
asm volatile("slbmte %0,%1" :
- : "r" (mk_vsid_data(ea, flags)),
- "r" (mk_esid_data(ea, entry))
+ : "r" (mk_vsid_data(ea, ssize, flags)),
+ "r" (mk_esid_data(ea, ssize, entry))
: "memory" );
}
@@ -93,7 +103,7 @@ void slb_flush_and_rebolt(void)
/* If you change this make sure you change SLB_NUM_BOLTED
* appropriately too. */
unsigned long linear_llp, vmalloc_llp, lflags, vflags;
- unsigned long ksp_esid_data;
+ unsigned long ksp_esid_data, ksp_vsid_data;
WARN_ON(!irqs_disabled());
@@ -102,13 +112,15 @@ void slb_flush_and_rebolt(void)
lflags = SLB_VSID_KERNEL | linear_llp;
vflags = SLB_VSID_KERNEL | vmalloc_llp;
- ksp_esid_data = mk_esid_data(get_paca()->kstack, 2);
- if ((ksp_esid_data & ESID_MASK) == PAGE_OFFSET) {
+ ksp_esid_data = mk_esid_data(get_paca()->kstack, mmu_kernel_ssize, 2);
+ if ((ksp_esid_data & ~0xfffffffUL) <= PAGE_OFFSET) {
ksp_esid_data &= ~SLB_ESID_V;
+ ksp_vsid_data = 0;
slb_shadow_clear(2);
} else {
/* Update stack entry; others don't change */
- slb_shadow_update(get_paca()->kstack, lflags, 2);
+ slb_shadow_update(get_paca()->kstack, mmu_kernel_ssize, lflags, 2);
+ ksp_vsid_data = get_slb_shadow()->save_area[2].vsid;
}
/* We need to do this all in asm, so we're sure we don't touch
@@ -120,9 +132,9 @@ void slb_flush_and_rebolt(void)
/* Slot 2 - kernel stack */
"slbmte %2,%3\n"
"isync"
- :: "r"(mk_vsid_data(VMALLOC_START, vflags)),
- "r"(mk_esid_data(VMALLOC_START, 1)),
- "r"(mk_vsid_data(ksp_esid_data, lflags)),
+ :: "r"(mk_vsid_data(VMALLOC_START, mmu_kernel_ssize, vflags)),
+ "r"(mk_esid_data(VMALLOC_START, mmu_kernel_ssize, 1)),
+ "r"(ksp_vsid_data),
"r"(ksp_esid_data)
: "memory");
}
@@ -132,7 +144,7 @@ void slb_vmalloc_update(void)
unsigned long vflags;
vflags = SLB_VSID_KERNEL | mmu_psize_defs[mmu_vmalloc_psize].sllp;
- slb_shadow_update(VMALLOC_START, vflags, 1);
+ slb_shadow_update(VMALLOC_START, mmu_kernel_ssize, vflags, 1);
slb_flush_and_rebolt();
}
@@ -140,7 +152,7 @@ void slb_vmalloc_update(void)
void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
{
unsigned long offset = get_paca()->slb_cache_ptr;
- unsigned long esid_data = 0;
+ unsigned long slbie_data = 0;
unsigned long pc = KSTK_EIP(tsk);
unsigned long stack = KSTK_ESP(tsk);
unsigned long unmapped_base;
@@ -149,9 +161,12 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
int i;
asm volatile("isync" : : : "memory");
for (i = 0; i < offset; i++) {
- esid_data = ((unsigned long)get_paca()->slb_cache[i]
- << SID_SHIFT) | SLBIE_C;
- asm volatile("slbie %0" : : "r" (esid_data));
+ slbie_data = (unsigned long)get_paca()->slb_cache[i]
+ << SID_SHIFT; /* EA */
+ slbie_data |= user_segment_size(slbie_data)
+ << SLBIE_SSIZE_SHIFT;
+ slbie_data |= SLBIE_C; /* C set for user addresses */
+ asm volatile("slbie %0" : : "r" (slbie_data));
}
asm volatile("isync" : : : "memory");
} else {
@@ -160,7 +175,7 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
/* Workaround POWER5 < DD2.1 issue */
if (offset == 1 || offset > SLB_CACHE_ENTRIES)
- asm volatile("slbie %0" : : "r" (esid_data));
+ asm volatile("slbie %0" : : "r" (slbie_data));
get_paca()->slb_cache_ptr = 0;
get_paca()->context = mm->context;
@@ -243,9 +258,9 @@ void slb_initialize(void)
asm volatile("isync":::"memory");
asm volatile("slbmte %0,%0"::"r" (0) : "memory");
asm volatile("isync; slbia; isync":::"memory");
- create_shadowed_slbe(PAGE_OFFSET, lflags, 0);
+ create_shadowed_slbe(PAGE_OFFSET, mmu_kernel_ssize, lflags, 0);
- create_shadowed_slbe(VMALLOC_START, vflags, 1);
+ create_shadowed_slbe(VMALLOC_START, mmu_kernel_ssize, vflags, 1);
/* We don't bolt the stack for the time being - we're in boot,
* so the stack is in the bolted segment. By the time it goes
diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
index cd1a93d..1328a81 100644
--- a/arch/powerpc/mm/slb_low.S
+++ b/arch/powerpc/mm/slb_low.S
@@ -57,7 +57,10 @@ _GLOBAL(slb_allocate_realmode)
*/
_GLOBAL(slb_miss_kernel_load_linear)
li r11,0
+BEGIN_FTR_SECTION
b slb_finish_load
+END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT)
+ b slb_finish_load_1T
1: /* vmalloc/ioremap mapping encoding bits, the "li" instructions below
* will be patched by the kernel at boot
@@ -68,13 +71,16 @@ BEGIN_FTR_SECTION
cmpldi r11,(VMALLOC_SIZE >> 28) - 1
bgt 5f
lhz r11,PACAVMALLOCSLLP(r13)
- b slb_finish_load
+ b 6f
5:
END_FTR_SECTION_IFCLR(CPU_FTR_CI_LARGE_PAGE)
_GLOBAL(slb_miss_kernel_load_io)
li r11,0
+6:
+BEGIN_FTR_SECTION
b slb_finish_load
-
+END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT)
+ b slb_finish_load_1T
0: /* user address: proto-VSID = context << 15 | ESID. First check
* if the address is within the boundaries of the user region
@@ -122,7 +128,13 @@ _GLOBAL(slb_miss_kernel_load_io)
#endif /* CONFIG_PPC_MM_SLICES */
ld r9,PACACONTEXTID(r13)
+BEGIN_FTR_SECTION
+ cmpldi r10,0x1000
+END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
rldimi r10,r9,USER_ESID_BITS,0
+BEGIN_FTR_SECTION
+ bge slb_finish_load_1T
+END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
b slb_finish_load
8: /* invalid EA */
@@ -188,7 +200,7 @@ _GLOBAL(slb_allocate_user)
* r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9, cr7 = <> PAGE_OFFSET
*/
slb_finish_load:
- ASM_VSID_SCRAMBLE(r10,r9)
+ ASM_VSID_SCRAMBLE(r10,r9,256M)
rldimi r11,r10,SLB_VSID_SHIFT,16 /* combine VSID and flags */
/* r3 = EA, r11 = VSID data */
@@ -213,7 +225,7 @@ BEGIN_FW_FTR_SECTION
END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
#endif /* CONFIG_PPC_ISERIES */
- ld r10,PACASTABRR(r13)
+7: ld r10,PACASTABRR(r13)
addi r10,r10,1
/* use a cpu feature mask if we ever change our slb size */
cmpldi r10,SLB_NUM_ENTRIES
@@ -259,3 +271,20 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
crclr 4*cr0+eq /* set result to "success" */
blr
+/*
+ * Finish loading of a 1T SLB entry (for the kernel linear mapping) and return.
+ * We assume legacy iSeries will never have 1T segments.
+ *
+ * r3 = EA, r10 = proto-VSID, r11 = flags, clobbers r9
+ */
+slb_finish_load_1T:
+ srdi r10,r10,40-28 /* get 1T ESID */
+ ASM_VSID_SCRAMBLE(r10,r9,1T)
+ rldimi r11,r10,SLB_VSID_SHIFT_1T,16 /* combine VSID and flags */
+ li r10,MMU_SEGSIZE_1T
+ rldimi r11,r10,SLB_VSID_SSIZE_SHIFT,0 /* insert segment size */
+
+ /* r3 = EA, r11 = VSID data */
+ clrrdi r3,r3,SID_SHIFT_1T /* clear out non-ESID bits */
+ b 7b
+
diff --git a/arch/powerpc/mm/stab.c b/arch/powerpc/mm/stab.c
index 28492bb..9e85bda 100644
--- a/arch/powerpc/mm/stab.c
+++ b/arch/powerpc/mm/stab.c
@@ -122,12 +122,12 @@ static int __ste_allocate(unsigned long ea, struct mm_struct *mm)
/* Kernel or user address? */
if (is_kernel_addr(ea)) {
- vsid = get_kernel_vsid(ea);
+ vsid = get_kernel_vsid(ea, MMU_SEGSIZE_256M);
} else {
if ((ea >= TASK_SIZE_USER64) || (! mm))
return 1;
- vsid = get_vsid(mm->context.id, ea);
+ vsid = get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M);
}
stab_entry = make_ste(get_paca()->stab_addr, GET_ESID(ea), vsid);
@@ -261,7 +261,7 @@ void __init stabs_alloc(void)
*/
void stab_initialize(unsigned long stab)
{
- unsigned long vsid = get_kernel_vsid(PAGE_OFFSET);
+ unsigned long vsid = get_kernel_vsid(PAGE_OFFSET, MMU_SEGSIZE_256M);
unsigned long stabreal;
asm volatile("isync; slbia; isync":::"memory");
diff --git a/arch/powerpc/mm/tlb_64.c b/arch/powerpc/mm/tlb_64.c
index cbd34fc..eafbca5 100644
--- a/arch/powerpc/mm/tlb_64.c
+++ b/arch/powerpc/mm/tlb_64.c
@@ -132,6 +132,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
unsigned long vsid, vaddr;
unsigned int psize;
+ int ssize;
real_pte_t rpte;
int i;
@@ -161,11 +162,14 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
/* Build full vaddr */
if (!is_kernel_addr(addr)) {
- vsid = get_vsid(mm->context.id, addr);
+ ssize = user_segment_size(addr);
+ vsid = get_vsid(mm->context.id, addr, ssize);
WARN_ON(vsid == 0);
- } else
- vsid = get_kernel_vsid(addr);
- vaddr = (vsid << 28 ) | (addr & 0x0fffffff);
+ } else {
+ vsid = get_kernel_vsid(addr, mmu_kernel_ssize);
+ ssize = mmu_kernel_ssize;
+ }
+ vaddr = hpt_va(addr, vsid, ssize);
rpte = __real_pte(__pte(pte), ptep);
/*
@@ -175,7 +179,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
* and decide to use local invalidates instead...
*/
if (!batch->active) {
- flush_hash_page(vaddr, rpte, psize, 0);
+ flush_hash_page(vaddr, rpte, psize, ssize, 0);
return;
}
@@ -189,13 +193,15 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
* We also need to ensure only one page size is present in a given
* batch
*/
- if (i != 0 && (mm != batch->mm || batch->psize != psize)) {
+ if (i != 0 && (mm != batch->mm || batch->psize != psize ||
+ batch->ssize != ssize)) {
__flush_tlb_pending(batch);
i = 0;
}
if (i == 0) {
batch->mm = mm;
batch->psize = psize;
+ batch->ssize = ssize;
}
batch->pte[i] = rpte;
batch->vaddr[i] = vaddr;
@@ -222,7 +228,7 @@ void __flush_tlb_pending(struct ppc64_tlb_batch *batch)
local = 1;
if (i == 1)
flush_hash_page(batch->vaddr[0], batch->pte[0],
- batch->psize, local);
+ batch->psize, batch->ssize, local);
else
flush_hash_range(i, local);
batch->index = 0;
diff --git a/arch/powerpc/platforms/iseries/htab.c b/arch/powerpc/platforms/iseries/htab.c
index b4e2c7a..5ab0f90 100644
--- a/arch/powerpc/platforms/iseries/htab.c
+++ b/arch/powerpc/platforms/iseries/htab.c
@@ -41,7 +41,7 @@ static inline void iSeries_hunlock(unsigned long slot)
long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va,
unsigned long pa, unsigned long rflags,
- unsigned long vflags, int psize)
+ unsigned long vflags, int psize, int ssize)
{
long slot;
struct hash_pte lhpte;
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index ea327ca..9142e46 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -284,7 +284,7 @@ void vpa_init(int cpu)
static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
unsigned long va, unsigned long pa,
unsigned long rflags, unsigned long vflags,
- int psize)
+ int psize, int ssize)
{
unsigned long lpar_rc;
unsigned long flags;
@@ -296,7 +296,7 @@ static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
"rflags=%lx, vflags=%lx, psize=%d)\n",
hpte_group, va, pa, rflags, vflags, psize);
- hpte_v = hpte_encode_v(va, psize) | vflags | HPTE_V_VALID;
+ hpte_v = hpte_encode_v(va, psize, ssize) | vflags | HPTE_V_VALID;
hpte_r = hpte_encode_r(pa, psize) | rflags;
if (!(vflags & HPTE_V_BOLTED))
@@ -392,6 +392,22 @@ static void pSeries_lpar_hptab_clear(void)
}
/*
+ * This computes the AVPN and B fields of the first dword of a HPTE,
+ * for use when we want to match an existing PTE. The bottom 7 bits
+ * of the returned value are zero.
+ */
+static inline unsigned long hpte_encode_avpn(unsigned long va, int psize,
+ int ssize)
+{
+ unsigned long v;
+
+ v = (va >> 23) & ~(mmu_psize_defs[psize].avpnm);
+ v <<= HPTE_V_AVPN_SHIFT;
+ v |= ((unsigned long) ssize) << HPTE_V_SSIZE_SHIFT;
+ return v;
+}
+
+/*
* NOTE: for updatepp ops we are fortunate that the linux "newpp" bits and
* the low 3 bits of flags happen to line up. So no transform is needed.
* We can probably optimize here and assume the high bits of newpp are
@@ -400,18 +416,18 @@ static void pSeries_lpar_hptab_clear(void)
static long pSeries_lpar_hpte_updatepp(unsigned long slot,
unsigned long newpp,
unsigned long va,
- int psize, int local)
+ int psize, int ssize, int local)
{
unsigned long lpar_rc;
unsigned long flags = (newpp & 7) | H_AVPN;
unsigned long want_v;
- want_v = hpte_encode_v(va, psize);
+ want_v = hpte_encode_avpn(va, psize, ssize);
DBG_LOW(" update: avpnv=%016lx, hash=%016lx, f=%x, psize: %d ... ",
- want_v & HPTE_V_AVPN, slot, flags, psize);
+ want_v, slot, flags, psize);
- lpar_rc = plpar_pte_protect(flags, slot, want_v & HPTE_V_AVPN);
+ lpar_rc = plpar_pte_protect(flags, slot, want_v);
if (lpar_rc == H_NOT_FOUND) {
DBG_LOW("not found !\n");
@@ -444,32 +460,25 @@ static unsigned long pSeries_lpar_hpte_getword0(unsigned long slot)
return dword0;
}
-static long pSeries_lpar_hpte_find(unsigned long va, int psize)
+static long pSeries_lpar_hpte_find(unsigned long va, int psize, int ssize)
{
unsigned long hash;
- unsigned long i, j;
+ unsigned long i;
long slot;
unsigned long want_v, hpte_v;
- hash = hpt_hash(va, mmu_psize_defs[psize].shift);
- want_v = hpte_encode_v(va, psize);
-
- for (j = 0; j < 2; j++) {
- slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
- for (i = 0; i < HPTES_PER_GROUP; i++) {
- hpte_v = pSeries_lpar_hpte_getword0(slot);
-
- if (HPTE_V_COMPARE(hpte_v, want_v)
- && (hpte_v & HPTE_V_VALID)
- && (!!(hpte_v & HPTE_V_SECONDARY) == j)) {
- /* HPTE matches */
- if (j)
- slot = -slot;
- return slot;
- }
- ++slot;
- }
- hash = ~hash;
+ hash = hpt_hash(va, mmu_psize_defs[psize].shift, ssize);
+ want_v = hpte_encode_avpn(va, psize, ssize);
+
+ /* Bolted entries are always in the primary group */
+ slot = (hash & htab_hash_mask) * HPTES_PER_GROUP;
+ for (i = 0; i < HPTES_PER_GROUP; i++) {
+ hpte_v = pSeries_lpar_hpte_getword0(slot);
+
+ if (HPTE_V_COMPARE(hpte_v, want_v) && (hpte_v & HPTE_V_VALID))
+ /* HPTE matches */
+ return slot;
+ ++slot;
}
return -1;
@@ -477,14 +486,14 @@ static long pSeries_lpar_hpte_find(unsigned long va, int psize)
static void pSeries_lpar_hpte_updateboltedpp(unsigned long newpp,
unsigned long ea,
- int psize)
+ int psize, int ssize)
{
unsigned long lpar_rc, slot, vsid, va, flags;
- vsid = get_kernel_vsid(ea);
- va = (vsid << 28) | (ea & 0x0fffffff);
+ vsid = get_kernel_vsid(ea, ssize);
+ va = hpt_va(ea, vsid, ssize);
- slot = pSeries_lpar_hpte_find(va, psize);
+ slot = pSeries_lpar_hpte_find(va, psize, ssize);
BUG_ON(slot == -1);
flags = newpp & 7;
@@ -494,7 +503,7 @@ static void pSeries_lpar_hpte_updateboltedpp(unsigned long newpp,
}
static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long va,
- int psize, int local)
+ int psize, int ssize, int local)
{
unsigned long want_v;
unsigned long lpar_rc;
@@ -503,9 +512,8 @@ static void pSeries_lpar_hpte_invalidate(unsigned long slot, unsigned long va,
DBG_LOW(" inval : slot=%lx, va=%016lx, psize: %d, local: %d",
slot, va, psize, local);
- want_v = hpte_encode_v(va, psize);
- lpar_rc = plpar_pte_remove(H_AVPN, slot, want_v & HPTE_V_AVPN,
- &dummy1, &dummy2);
+ want_v = hpte_encode_avpn(va, psize, ssize);
+ lpar_rc = plpar_pte_remove(H_AVPN, slot, want_v, &dummy1, &dummy2);
if (lpar_rc == H_NOT_FOUND)
return;
@@ -533,18 +541,19 @@ static void pSeries_lpar_flush_hash_range(unsigned long number, int local)
unsigned long va;
unsigned long hash, index, shift, hidx, slot;
real_pte_t pte;
- int psize;
+ int psize, ssize;
if (lock_tlbie)
spin_lock_irqsave(&pSeries_lpar_tlbie_lock, flags);
psize = batch->psize;
+ ssize = batch->ssize;
pix = 0;
for (i = 0; i < number; i++) {
va = batch->vaddr[i];
pte = batch->pte[i];
pte_iterate_hashed_subpages(pte, psize, va, index, shift) {
- hash = hpt_hash(va, shift);
+ hash = hpt_hash(va, shift, ssize);
hidx = __rpte_to_hidx(pte, index);
if (hidx & _PTEIDX_SECONDARY)
hash = ~hash;
@@ -552,11 +561,11 @@ static void pSeries_lpar_flush_hash_range(unsigned long number, int local)
slot += hidx & _PTEIDX_GROUP_IX;
if (!firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
pSeries_lpar_hpte_invalidate(slot, va, psize,
- local);
+ ssize, local);
} else {
param[pix] = HBR_REQUEST | HBR_AVPN | slot;
- param[pix+1] = hpte_encode_v(va, psize) &
- HPTE_V_AVPN;
+ param[pix+1] = hpte_encode_avpn(va, psize,
+ ssize);
pix += 2;
if (pix == 8) {
rc = plpar_hcall9(H_BULK_REMOVE, param,
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index c9b8f64..24ec7e2 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -163,6 +163,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
#define CPU_FTR_CELL_TB_BUG LONG_ASM_CONST(0x0000800000000000)
#define CPU_FTR_SPURR LONG_ASM_CONST(0x0001000000000000)
#define CPU_FTR_DSCR LONG_ASM_CONST(0x0002000000000000)
+#define CPU_FTR_1T_SEGMENT LONG_ASM_CONST(0x0004000000000000)
#ifndef __ASSEMBLY__
@@ -373,7 +374,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
#define CPU_FTRS_POSSIBLE \
(CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \
CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \
- CPU_FTRS_CELL | CPU_FTRS_PA6T)
+ CPU_FTRS_CELL | CPU_FTRS_PA6T | CPU_FTR_1T_SEGMENT)
#else
enum {
CPU_FTRS_POSSIBLE =
diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h
index 71c6e7e..9fad19c 100644
--- a/include/asm-powerpc/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -51,22 +51,22 @@ struct machdep_calls {
#ifdef CONFIG_PPC64
void (*hpte_invalidate)(unsigned long slot,
unsigned long va,
- int psize,
+ int psize, int ssize,
int local);
long (*hpte_updatepp)(unsigned long slot,
unsigned long newpp,
unsigned long va,
- int pize,
+ int psize, int ssize,
int local);
void (*hpte_updateboltedpp)(unsigned long newpp,
unsigned long ea,
- int psize);
+ int psize, int ssize);
long (*hpte_insert)(unsigned long hpte_group,
unsigned long va,
unsigned long prpn,
unsigned long rflags,
unsigned long vflags,
- int psize);
+ int psize, int ssize);
long (*hpte_remove)(unsigned long hpte_group);
void (*flush_hash_range)(unsigned long number, int local);
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h
index b22b0d2..0ede62a 100644
--- a/include/asm-powerpc/mmu-hash64.h
+++ b/include/asm-powerpc/mmu-hash64.h
@@ -47,6 +47,8 @@ extern char initial_stab[];
/* Bits in the SLB VSID word */
#define SLB_VSID_SHIFT 12
+#define SLB_VSID_SHIFT_1T 24
+#define SLB_VSID_SSIZE_SHIFT 62
#define SLB_VSID_B ASM_CONST(0xc000000000000000)
#define SLB_VSID_B_256M ASM_CONST(0x0000000000000000)
#define SLB_VSID_B_1T ASM_CONST(0x4000000000000000)
@@ -66,6 +68,7 @@ extern char initial_stab[];
#define SLB_VSID_USER (SLB_VSID_KP|SLB_VSID_KS|SLB_VSID_C)
#define SLBIE_C (0x08000000)
+#define SLBIE_SSIZE_SHIFT 25
/*
* Hash table
@@ -77,7 +80,7 @@ extern char initial_stab[];
#define HPTE_V_AVPN_SHIFT 7
#define HPTE_V_AVPN ASM_CONST(0x3fffffffffffff80)
#define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT)
-#define HPTE_V_COMPARE(x,y) (!(((x) ^ (y)) & HPTE_V_AVPN))
+#define HPTE_V_COMPARE(x,y) (!(((x) ^ (y)) & 0xffffffffffffff80))
#define HPTE_V_BOLTED ASM_CONST(0x0000000000000010)
#define HPTE_V_LOCK ASM_CONST(0x0000000000000008)
#define HPTE_V_LARGE ASM_CONST(0x0000000000000004)
@@ -164,16 +167,19 @@ struct mmu_psize_def
#define MMU_SEGSIZE_256M 0
#define MMU_SEGSIZE_1T 1
+
#ifndef __ASSEMBLY__
/*
- * The current system page sizes
+ * The current system page and segment sizes
*/
extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
extern int mmu_linear_psize;
extern int mmu_virtual_psize;
extern int mmu_vmalloc_psize;
extern int mmu_io_psize;
+extern int mmu_kernel_ssize;
+extern int mmu_highuser_ssize;
/*
* If the processor supports 64k normal pages but not 64k cache
@@ -195,13 +201,15 @@ extern int mmu_huge_psize;
* This function sets the AVPN and L fields of the HPTE appropriately
* for the page size
*/
-static inline unsigned long hpte_encode_v(unsigned long va, int psize)
+static inline unsigned long hpte_encode_v(unsigned long va, int psize,
+ int ssize)
{
- unsigned long v =
+ unsigned long v;
v = (va >> 23) & ~(mmu_psize_defs[psize].avpnm);
v <<= HPTE_V_AVPN_SHIFT;
if (psize != MMU_PAGE_4K)
v |= HPTE_V_LARGE;
+ v |= ((unsigned long) ssize) << HPTE_V_SSIZE_SHIFT;
return v;
}
@@ -226,20 +234,40 @@ static inline unsigned long hpte_encode_r(unsigned long pa, int psize)
}
/*
- * This hashes a virtual address for a 256Mb segment only for now
+ * Build a VA given VSID, EA and segment size
*/
+static inline unsigned long hpt_va(unsigned long ea, unsigned long vsid,
+ int ssize)
+{
+ if (ssize == MMU_SEGSIZE_256M)
+ return (vsid << 28) | (ea & 0xfffffffUL);
+ return (vsid << 40) | (ea & 0xffffffffffUL);
+}
-static inline unsigned long hpt_hash(unsigned long va, unsigned int shift)
+/*
+ * This hashes a virtual address
+ */
+
+static inline unsigned long hpt_hash(unsigned long va, unsigned int shift,
+ int ssize)
{
- return ((va >> 28) & 0x7fffffffffUL) ^ ((va & 0x0fffffffUL) >> shift);
+ unsigned long hash, vsid;
+
+ if (ssize == MMU_SEGSIZE_256M) {
+ hash = (va >> 28) ^ ((va & 0x0fffffffUL) >> shift);
+ } else {
+ vsid = va >> 40;
+ hash = vsid ^ (vsid << 25) ^ ((va & 0xffffffffffUL) >> shift);
+ }
+ return hash & 0x7fffffffffUL;
}
extern int __hash_page_4K(unsigned long ea, unsigned long access,
unsigned long vsid, pte_t *ptep, unsigned long trap,
- unsigned int local);
+ unsigned int local, int ssize);
extern int __hash_page_64K(unsigned long ea, unsigned long access,
unsigned long vsid, pte_t *ptep, unsigned long trap,
- unsigned int local);
+ unsigned int local, int ssize);
struct mm_struct;
extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap);
extern int hash_huge_page(struct mm_struct *mm, unsigned long access,
@@ -248,7 +276,7 @@ extern int hash_huge_page(struct mm_struct *mm, unsigned long access,
extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
unsigned long pstart, unsigned long mode,
- int psize);
+ int psize, int ssize);
extern void htab_initialize(void);
extern void htab_initialize_secondary(void);
@@ -317,12 +345,17 @@ extern void slb_vmalloc_update(void);
* which are used by the iSeries firmware.
*/
-#define VSID_MULTIPLIER ASM_CONST(200730139) /* 28-bit prime */
-#define VSID_BITS 36
-#define VSID_MODULUS ((1UL<<VSID_BITS)-1)
+#define VSID_MULTIPLIER_256M ASM_CONST(200730139) /* 28-bit prime */
+#define VSID_BITS_256M 36
+#define VSID_MODULUS_256M ((1UL<<VSID_BITS_256M)-1)
-#define CONTEXT_BITS 19
-#define USER_ESID_BITS 16
+#define VSID_MULTIPLIER_1T ASM_CONST(12538073) /* 24-bit prime */
+#define VSID_BITS_1T 24
+#define VSID_MODULUS_1T ((1UL<<VSID_BITS_1T)-1)
+
+#define CONTEXT_BITS 19
+#define USER_ESID_BITS 16
+#define USER_ESID_BITS_1T 4
#define USER_VSID_RANGE (1UL << (USER_ESID_BITS + SID_SHIFT))
@@ -336,17 +369,17 @@ extern void slb_vmalloc_update(void);
* rx = scratch register (clobbered)
*
* - rt and rx must be different registers
- * - The answer will end up in the low 36 bits of rt. The higher
+ * - The answer will end up in the low VSID_BITS bits of rt. The higher
* bits may contain other garbage, so you may need to mask the
* result.
*/
-#define ASM_VSID_SCRAMBLE(rt, rx) \
- lis rx,VSID_MULTIPLIER@h; \
- ori rx,rx,VSID_MULTIPLIER@l; \
+#define ASM_VSID_SCRAMBLE(rt, rx, size) \
+ lis rx,VSID_MULTIPLIER_##size@h; \
+ ori rx,rx,VSID_MULTIPLIER_##size@l; \
mulld rt,rt,rx; /* rt = rt * MULTIPLIER */ \
\
- srdi rx,rt,VSID_BITS; \
- clrldi rt,rt,(64-VSID_BITS); \
+ srdi rx,rt,VSID_BITS_##size; \
+ clrldi rt,rt,(64-VSID_BITS_##size); \
add rt,rt,rx; /* add high and low bits */ \
/* Now, r3 == VSID (mod 2^36-1), and lies between 0 and \
* 2^36-1+2^28-1. That in particular means that if r3 >= \
@@ -355,7 +388,7 @@ extern void slb_vmalloc_update(void);
* doesn't, the answer is the low 36 bits of r3+1. So in all \
* cases the answer is the low 36 bits of (r3 + ((r3+1) >> 36))*/\
addi rx,rt,1; \
- srdi rx,rx,VSID_BITS; /* extract 2^36 bit */ \
+ srdi rx,rx,VSID_BITS_##size; /* extract 2^VSID_BITS bit */ \
add rt,rt,rx
@@ -377,36 +410,58 @@ typedef struct {
} mm_context_t;
-static inline unsigned long vsid_scramble(unsigned long protovsid)
-{
#if 0
- /* The code below is equivalent to this function for arguments
- * < 2^VSID_BITS, which is all this should ever be called
- * with. However gcc is not clever enough to compute the
- * modulus (2^n-1) without a second multiply. */
- return ((protovsid * VSID_MULTIPLIER) % VSID_MODULUS);
-#else /* 1 */
- unsigned long x;
+/*
+ * The code below is equivalent to this function for arguments
+ * < 2^VSID_BITS, which is all this should ever be called
+ * with. However gcc is not clever enough to compute the
+ * modulus (2^n-1) without a second multiply.
+ */
+#define vsid_scrample(protovsid, size) \
+ ((((protovsid) * VSID_MULTIPLIER_##size) % VSID_MODULUS_##size))
- x = protovsid * VSID_MULTIPLIER;
- x = (x >> VSID_BITS) + (x & VSID_MODULUS);
- return (x + ((x+1) >> VSID_BITS)) & VSID_MODULUS;
+#else /* 1 */
+#define vsid_scramble(protovsid, size) \
+ ({ \
+ unsigned long x; \
+ x = (protovsid) * VSID_MULTIPLIER_##size; \
+ x = (x >> VSID_BITS_##size) + (x & VSID_MODULUS_##size); \
+ (x + ((x+1) >> VSID_BITS_##size)) & VSID_MODULUS_##size; \
+ })
#endif /* 1 */
-}
/* This is only valid for addresses >= KERNELBASE */
-static inline unsigned long get_kernel_vsid(unsigned long ea)
+static inline unsigned long get_kernel_vsid(unsigned long ea, int ssize)
{
- return vsid_scramble(ea >> SID_SHIFT);
+ if (ssize == MMU_SEGSIZE_256M)
+ return vsid_scramble(ea >> SID_SHIFT, 256M);
+ return vsid_scramble(ea >> SID_SHIFT_1T, 1T);
}
-/* This is only valid for user addresses (which are below 2^41) */
-static inline unsigned long get_vsid(unsigned long context, unsigned long ea)
+/* Returns the segment size indicator for a user address */
+static inline int user_segment_size(unsigned long addr)
{
- return vsid_scramble((context << USER_ESID_BITS)
- | (ea >> SID_SHIFT));
+ /* Use 1T segments if possible for addresses >= 1T */
+ if (addr >= (1UL << SID_SHIFT_1T))
+ return mmu_highuser_ssize;
+ return MMU_SEGSIZE_256M;
}
+/* This is only valid for user addresses (which are below 2^44) */
+static inline unsigned long get_vsid(unsigned long context, unsigned long ea,
+ int ssize)
+{
+ if (ssize == MMU_SEGSIZE_256M)
+ return vsid_scramble((context << USER_ESID_BITS)
+ | (ea >> SID_SHIFT), 256M);
+ return vsid_scramble((context << USER_ESID_BITS_1T)
+ | (ea >> SID_SHIFT_1T), 1T);
+}
+
+/*
+ * This is only used on legacy iSeries in lparmap.c,
+ * hence the 256MB segment assumption.
+ */
#define VSID_SCRAMBLE(pvsid) (((pvsid) * VSID_MULTIPLIER) % VSID_MODULUS)
#define KERNEL_VSID(ea) VSID_SCRAMBLE(GET_ESID(ea))
diff --git a/include/asm-powerpc/page_64.h b/include/asm-powerpc/page_64.h
index 56a2df0..4ee82c6 100644
--- a/include/asm-powerpc/page_64.h
+++ b/include/asm-powerpc/page_64.h
@@ -26,12 +26,18 @@
*/
#define PAGE_FACTOR (PAGE_SHIFT - HW_PAGE_SHIFT)
-/* Segment size */
+/* Segment size; normal 256M segments */
#define SID_SHIFT 28
#define SID_MASK ASM_CONST(0xfffffffff)
#define ESID_MASK 0xfffffffff0000000UL
#define GET_ESID(x) (((x) >> SID_SHIFT) & SID_MASK)
+/* 1T segments */
+#define SID_SHIFT_1T 40
+#define SID_MASK_1T 0xffffffUL
+#define ESID_MASK_1T 0xffffff0000000000UL
+#define GET_ESID_1T(x) (((x) >> SID_SHIFT_1T) & SID_MASK_1T)
+
#ifndef __ASSEMBLY__
#include <asm/cache.h>
diff --git a/include/asm-powerpc/tlbflush.h b/include/asm-powerpc/tlbflush.h
index 99a0439..a022f80 100644
--- a/include/asm-powerpc/tlbflush.h
+++ b/include/asm-powerpc/tlbflush.h
@@ -97,6 +97,7 @@ struct ppc64_tlb_batch {
real_pte_t pte[PPC64_TLB_BATCH_NR];
unsigned long vaddr[PPC64_TLB_BATCH_NR];
unsigned int psize;
+ int ssize;
};
DECLARE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
@@ -127,7 +128,7 @@ static inline void arch_leave_lazy_mmu_mode(void)
extern void flush_hash_page(unsigned long va, real_pte_t pte, int psize,
- int local);
+ int ssize, int local);
extern void flush_hash_range(unsigned long number, int local);
^ permalink raw reply related
* [PATCH] Make clockevents work on PPC601 processors
From: Paul Mackerras @ 2007-10-11 11:46 UTC (permalink / raw)
To: linuxppc-dev
In testing the new clocksource and clockevent code on a PPC601
processor, I discovered that the clockevent multiplier value for the
decrementer clockevent was overflowing. Because the RTCL register in
the 601 effectively counts at 1GHz (it doesn't actually, but it
increases by 128 every 128ns), and the shift value was 32, that meant
the multiplier value had to be 2^32, which won't fit in an unsigned
long on 32-bit. The same problem would arise on any platform where
the timebase frequency was 1GHz or more (not that we actually have any
such machines today).
This fixes it by reducing the shift value to 16. Doing the
calculations with a resolution of 2^-16 nanoseconds (15 femtoseconds)
should be quite adequate. :)
Signed-off-by: Paul Mackerras <paulus@samba.org>
---
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 64b503c..9368da3 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -108,7 +108,7 @@ static void decrementer_set_mode(enum clock_event_mode mode,
static struct clock_event_device decrementer_clockevent = {
.name = "decrementer",
.rating = 200,
- .shift = 32,
+ .shift = 16,
.mult = 0, /* To be filled in */
.irq = 0,
.set_next_event = decrementer_set_next_event,
^ permalink raw reply related
* Re: [PATCH 3/3] [POWERPC] Kilauea DTS
From: Josh Boyer @ 2007-10-11 11:51 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev
In-Reply-To: <200710111049.02253.sr@denx.de>
On Thu, 2007-10-11 at 10:49 +0200, Stefan Roese wrote:
> > > + PowerPC,405EX@0 {
> > > + device_type = "cpu";
> > > + reg = <0>;
> > > + clock-frequency = <0>; /* Filled in by U-Boot */
> >
> > Filled in by U-Boot itself? Or by a cuboot wrapper? (which I can't find
> > in the patches.)
>
> By U-Boot itself. I have a U-Boot patch in the queue to add device tree
> support for 4xx. Therefor I don't plan adding a cuboot wrapper for Kilauea.
Very cool!
> > > + interrupt-parent = <&UIC1>;
> > > +
> > > + nor_flash@0,0 {
> >
> > You have no ranges property for the ebc parent node. Is if filled in by
> > U-Boot? If so, please add a comment because otherwise I don't see how
> > this mapping will work.
>
> Yes, it's filled in by U-Boot too. I'll add a comment here.
Ok.
> >
> > No chosen node?
>
> No. U-Boot will provide all needed information here.
Does it provide it by creating the chosen node? Or by still using the
bd_t method?
josh
^ permalink raw reply
* Re: [PATCH 3/3] [POWERPC] Kilauea DTS
From: Stefan Roese @ 2007-10-11 12:02 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1192103498.5534.101.camel@localhost.localdomain>
On Thursday 11 October 2007, Josh Boyer wrote:
> On Thu, 2007-10-11 at 10:49 +0200, Stefan Roese wrote:
> > > > + PowerPC,405EX@0 {
> > > > + device_type = "cpu";
> > > > + reg = <0>;
> > > > + clock-frequency = <0>; /* Filled in by U-Boot */
> > >
> > > Filled in by U-Boot itself? Or by a cuboot wrapper? (which I can't
> > > find in the patches.)
> >
> > By U-Boot itself. I have a U-Boot patch in the queue to add device tree
> > support for 4xx. Therefor I don't plan adding a cuboot wrapper for
> > Kilauea.
>
> Very cool!
You can take a look at the kilauea-405ex branch of my 4xx custodian repository
for a latest development snapshort:
http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot/u-boot-ppc4xx.git;a=shortlog;h=kilauea-405ex
> > > > + interrupt-parent = <&UIC1>;
> > > > +
> > > > + nor_flash@0,0 {
> > >
> > > You have no ranges property for the ebc parent node. Is if filled in
> > > by U-Boot? If so, please add a comment because otherwise I don't see
> > > how this mapping will work.
> >
> > Yes, it's filled in by U-Boot too. I'll add a comment here.
>
> Ok.
>
> > > No chosen node?
> >
> > No. U-Boot will provide all needed information here.
>
> Does it provide it by creating the chosen node? Or by still using the
> bd_t method?
bd_t? What's that? ;)
Best regards,
Stefan
^ permalink raw reply
* [PATCH 1/4 v2] [POWERPC] Add AMCC 405EX support to cputable.c
From: Stefan Roese @ 2007-10-11 12:08 UTC (permalink / raw)
To: linuxppc-dev
Signed-off-by: Stefan Roese <sr@denx.de>
---
arch/powerpc/kernel/cputable.c | 11 +++++++++++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index b03a442..eccdad0 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1103,6 +1103,17 @@ static struct cpu_spec cpu_specs[] = {
.dcache_bsize = 32,
.platform = "ppc405",
},
+ { /* 405EX */
+ .pvr_mask = 0xffff0000,
+ .pvr_value = 0x12910000,
+ .cpu_name = "405EX",
+ .cpu_features = CPU_FTRS_40X,
+ .cpu_user_features = PPC_FEATURE_32 |
+ PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .platform = "ppc405",
+ },
#endif /* CONFIG_40x */
#ifdef CONFIG_44x
--
1.5.3.4
^ permalink raw reply related
* [PATCH 3/4 v2] [POWERPC] Kilauea DTS
From: Stefan Roese @ 2007-10-11 12:08 UTC (permalink / raw)
To: linuxppc-dev
Signed-off-by: Stefan Roese <sr@denx.de>
---
arch/powerpc/boot/dts/kilauea.dts | 252 +++++++++++++++++++++++++++++++++++++
1 files changed, 252 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/kilauea.dts
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts
new file mode 100644
index 0000000..c824e8f
--- /dev/null
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -0,0 +1,252 @@
+/*
+ * Device Tree Source for AMCC Kilauea (405EX)
+ *
+ * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "amcc,kilauea";
+ compatible = "amcc,kilauea";
+ dcr-parent = <&/cpus/PowerPC,405EX@0>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,405EX@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ timebase-frequency = <0>; /* Filled in by U-Boot */
+ i-cache-line-size = <20>;
+ d-cache-line-size = <20>;
+ i-cache-size = <4000>; /* 16 kB */
+ d-cache-size = <4000>; /* 16 kB */
+ dcr-controller;
+ dcr-access-method = "native";
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0 0>; /* Filled in by U-Boot */
+ };
+
+ UIC0: interrupt-controller {
+ compatible = "ibm,uic-405ex", "ibm,uic";
+ interrupt-controller;
+ cell-index = <0>;
+ dcr-reg = <0c0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ };
+
+ UIC1: interrupt-controller1 {
+ compatible = "ibm,uic-405ex","ibm,uic";
+ interrupt-controller;
+ cell-index = <1>;
+ dcr-reg = <0d0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <1e 4 1f 4>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ UIC2: interrupt-controller2 {
+ compatible = "ibm,uic-405ex","ibm,uic";
+ interrupt-controller;
+ cell-index = <2>;
+ dcr-reg = <0e0 009>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <1c 4 1d 4>; /* cascade */
+ interrupt-parent = <&UIC0>;
+ };
+
+ plb {
+ compatible = "ibm,plb-405ex", "ibm,plb4";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+
+ SDRAM0: memory-controller {
+ compatible = "ibm,sdram-405ex";
+ dcr-reg = <010 2>;
+ };
+
+ MAL0: mcmal {
+ compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
+ dcr-reg = <180 62>;
+ num-tx-chans = <2>;
+ num-rx-chans = <2>;
+ interrupt-parent = <&MAL0>;
+ interrupts = <0 1 2 3 4>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
+ /*RXEOB*/ 1 &UIC0 b 4
+ /*SERR*/ 2 &UIC1 0 4
+ /*TXDE*/ 3 &UIC1 1 4
+ /*RXDE*/ 4 &UIC1 2 4>;
+ interrupt-map-mask = <ffffffff>;
+ };
+
+ POB0: opb {
+ compatible = "ibm,opb-405ex", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <80000000 80000000 10000000
+ ef600000 ef600000 a00000
+ f0000000 f0000000 10000000>;
+ dcr-reg = <0a0 5>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+
+ EBC0: ebc {
+ compatible = "ibm,ebc-405ex", "ibm,ebc";
+ dcr-reg = <012 2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ /* ranges property is supplied by U-Boot */
+ interrupts = <5 1>;
+ interrupt-parent = <&UIC1>;
+
+ nor_flash@0,0 {
+ compatible = "amd,s29gl512n", "cfi-flash";
+ bank-width = <2>;
+ reg = <0 000000 4000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "kernel";
+ reg = <0 200000>;
+ };
+ partition@200000 {
+ label = "root";
+ reg = <200000 200000>;
+ };
+ partition@400000 {
+ label = "user";
+ reg = <400000 3b60000>;
+ };
+ partition@3f60000 {
+ label = "env";
+ reg = <3f60000 40000>;
+ };
+ partition@3fa0000 {
+ label = "u-boot";
+ reg = <3fa0000 60000>;
+ };
+ };
+ };
+
+ UART0: serial@ef600200 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ef600200 8>;
+ virtual-reg = <ef600200>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ current-speed = <0>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <1a 4>;
+ };
+
+ UART1: serial@ef600300 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <ef600300 8>;
+ virtual-reg = <ef600300>;
+ clock-frequency = <0>; /* Filled in by U-Boot */
+ current-speed = <0>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <1 4>;
+ };
+
+ IIC0: i2c@ef600400 {
+ device_type = "i2c";
+ compatible = "ibm,iic-405ex", "ibm,iic";
+ reg = <ef600400 14>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <2 4>;
+ };
+
+ IIC1: i2c@ef600500 {
+ device_type = "i2c";
+ compatible = "ibm,iic-405ex", "ibm,iic";
+ reg = <ef600500 14>;
+ interrupt-parent = <&UIC0>;
+ interrupts = <7 4>;
+ };
+
+
+ RGMII0: emac-rgmii@ef600b00 {
+ device_type = "rgmii-interface";
+ compatible = "ibm,rgmii-405ex", "ibm,rgmii";
+ reg = <ef600b00 104>;
+ };
+
+ EMAC0: ethernet@ef600900 {
+ linux,network-index = <0>;
+ device_type = "network";
+ compatible = "ibm,emac-405ex", "ibm,emac4";
+ interrupt-parent = <&EMAC0>;
+ interrupts = <0 1>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = </*Status*/ 0 &UIC0 18 4
+ /*Wake*/ 1 &UIC1 1d 4>;
+ reg = <ef600900 70>;
+ local-mac-address = [000000000000]; /* Filled in by U-Boot */
+ mal-device = <&MAL0>;
+ mal-tx-channel = <0>;
+ mal-rx-channel = <0>;
+ cell-index = <0>;
+ max-frame-size = <5dc>;
+ rx-fifo-size = <1000>;
+ tx-fifo-size = <800>;
+ phy-mode = "rgmii";
+ phy-map = <00000000>;
+ rgmii-device = <&RGMII0>;
+ rgmii-channel = <0>;
+ };
+
+ EMAC1: ethernet@ef600a00 {
+ linux,network-index = <1>;
+ device_type = "network";
+ compatible = "ibm,emac-405ex", "ibm,emac4";
+ interrupt-parent = <&EMAC1>;
+ interrupts = <0 1>;
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ interrupt-map = </*Status*/ 0 &UIC0 19 4
+ /*Wake*/ 1 &UIC1 1f 4>;
+ reg = <ef600a00 70>;
+ local-mac-address = [000000000000]; /* Filled in by U-Boot */
+ mal-device = <&MAL0>;
+ mal-tx-channel = <1>;
+ mal-rx-channel = <1>;
+ cell-index = <1>;
+ max-frame-size = <5dc>;
+ rx-fifo-size = <1000>;
+ tx-fifo-size = <800>;
+ phy-mode = "rgmii";
+ phy-map = <00000000>;
+ rgmii-device = <&RGMII0>;
+ rgmii-channel = <1>;
+ };
+ };
+ };
+};
--
1.5.3.4
^ permalink raw reply related
* [PATCH 4/4 v2] [POWERPC] Kilauea defconfig file
From: Stefan Roese @ 2007-10-11 12:08 UTC (permalink / raw)
To: linuxppc-dev
Signed-off-by: Stefan Roese <sr@denx.de>
---
arch/powerpc/configs/kilauea_defconfig | 768 ++++++++++++++++++++++++++++++++
1 files changed, 768 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/configs/kilauea_defconfig
diff --git a/arch/powerpc/configs/kilauea_defconfig b/arch/powerpc/configs/kilauea_defconfig
new file mode 100644
index 0000000..0ce0a58
--- /dev/null
+++ b/arch/powerpc/configs/kilauea_defconfig
@@ -0,0 +1,768 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.23-rc9
+# Thu Oct 11 10:57:30 2007
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+# CONFIG_6xx is not set
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+CONFIG_40x=y
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_4xx=y
+# CONFIG_PPC_MM_SLICES is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+# CONFIG_PPC_UDBG_16550 is not set
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+CONFIG_PPC_DCR_NATIVE=y
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_PPC_DCR=y
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_SYSFS_DEPRECATED=y
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+CONFIG_EMBEDDED=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLAB=y
+# CONFIG_SLUB is not set
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_KMOD=y
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# Platform support
+#
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_KILAUEA=y
+# CONFIG_WALNUT is not set
+# CONFIG_XILINX_VIRTEX_GENERIC_BOARD is not set
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPM2 is not set
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_TICK_ONESHOT is not set
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+# CONFIG_MATH_EMULATION is not set
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_RESOURCES_64BIT=y
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SUSPEND_UP_POSSIBLE=y
+CONFIG_HIBERNATION_UP_POSSIBLE=y
+CONFIG_SECCOMP=y
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE="walnut.dts"
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+# CONFIG_PCI is not set
+# CONFIG_PCI_DOMAINS is not set
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x00400000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+CONFIG_CONNECTOR=y
+CONFIG_PROC_EVENTS=y
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=m
+CONFIG_MTD_BLOCK=m
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=35000
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_XILINX_SYSACE is not set
+# CONFIG_MISC_DEVICES is not set
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_MACINTOSH_DRIVERS is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_NET_ETHERNET is not set
+# CONFIG_NETDEV_1000 is not set
+# CONFIG_NETDEV_10000 is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+# CONFIG_WAN is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+# CONFIG_INPUT is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+CONFIG_SERIAL_8250_EXTENDED=y
+# CONFIG_SERIAL_8250_MANY_PORTS is not set
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_8250_DETECT_IRQ is not set
+# CONFIG_SERIAL_8250_RSA is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_WATCHDOG is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_FB_IBM_GXT4500 is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+# CONFIG_USB_SUPPORT is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_EDAC is not set
+# CONFIG_RTC_CLASS is not set
+
+#
+# DMA Engine support
+#
+# CONFIG_DMA_ENGINE is not set
+
+#
+# DMA Clients
+#
+
+#
+# DMA Devices
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4DEV_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+CONFIG_CRAMFS=y
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Distributed Lock Manager
+#
+# CONFIG_DLM is not set
+# CONFIG_UCC_SLOW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+
+#
+# Instrumentation Support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_MAGIC_SYSRQ=y
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_DEBUG_INFO is not set
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_LIST is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_DEBUG_STACKOVERFLOW is not set
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_PAGEALLOC is not set
+# CONFIG_DEBUGGER is not set
+# CONFIG_BDI_SWITCH is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+CONFIG_CRYPTO=y
+CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_XCBC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+# CONFIG_CRYPTO_GF128MUL is not set
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_CBC=y
+CONFIG_CRYPTO_PCBC=y
+# CONFIG_CRYPTO_LRW is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
+# CONFIG_CRYPTO_TEST is not set
+CONFIG_CRYPTO_HW=y
+# CONFIG_PPC_CLOCK is not set
--
1.5.3.4
^ permalink raw reply related
* [PATCH 2/4 v2] [POWERPC] Add AMCC Kilauea eval board support to platforms/40x
From: Stefan Roese @ 2007-10-11 12:08 UTC (permalink / raw)
To: linuxppc-dev
This patch adds basic support for the new 405EX and the AMCC eval board
Kilauea to arch/powerpc.
Signed-off-by: Stefan Roese <sr@denx.de>
---
arch/powerpc/platforms/40x/Kconfig | 7 ++++
arch/powerpc/platforms/40x/Makefile | 5 ++-
arch/powerpc/platforms/40x/kilauea.c | 58 ++++++++++++++++++++++++++++++++++
3 files changed, 68 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/platforms/40x/kilauea.c
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
index a0a50b1..47b3b0a 100644
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -29,6 +29,13 @@
# help
# This option enables support for the extra features of the EP405PC board.
+config KILAUEA
+ bool "Kilauea"
+ depends on 40x
+ default n
+ help
+ This option enables support for the AMCC PPC405EX evaluation board.
+
#config REDWOOD_5
# bool "Redwood-5"
# depends on 40x
diff --git a/arch/powerpc/platforms/40x/Makefile b/arch/powerpc/platforms/40x/Makefile
index 0a3cfe9..51dadee 100644
--- a/arch/powerpc/platforms/40x/Makefile
+++ b/arch/powerpc/platforms/40x/Makefile
@@ -1,2 +1,3 @@
-obj-$(CONFIG_WALNUT) += walnut.o
-obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD) += virtex.o
+obj-$(CONFIG_KILAUEA) += kilauea.o
+obj-$(CONFIG_WALNUT) += walnut.o
+obj-$(CONFIG_XILINX_VIRTEX_GENERIC_BOARD) += virtex.o
diff --git a/arch/powerpc/platforms/40x/kilauea.c b/arch/powerpc/platforms/40x/kilauea.c
new file mode 100644
index 0000000..1bffdbd
--- /dev/null
+++ b/arch/powerpc/platforms/40x/kilauea.c
@@ -0,0 +1,58 @@
+/*
+ * Kilauea board specific routines
+ *
+ * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
+ *
+ * Based on the Walnut code by
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>
+ * Copyright 2007 IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+#include <linux/init.h>
+#include <linux/of_platform.h>
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/time.h>
+#include <asm/uic.h>
+
+static struct of_device_id kilauea_of_bus[] = {
+ { .compatible = "ibm,plb4", },
+ { .compatible = "ibm,opb", },
+ { .compatible = "ibm,ebc", },
+ {},
+};
+
+static int __init kilauea_device_probe(void)
+{
+ if (!machine_is(kilauea))
+ return 0;
+
+ of_platform_bus_probe(NULL, kilauea_of_bus, NULL);
+
+ return 0;
+}
+device_initcall(kilauea_device_probe);
+
+static int __init kilauea_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (!of_flat_dt_is_compatible(root, "amcc,kilauea"))
+ return 0;
+
+ return 1;
+}
+
+define_machine(kilauea) {
+ .name = "Kilauea",
+ .probe = kilauea_probe,
+ .progress = udbg_progress,
+ .init_IRQ = uic_init_tree,
+ .get_irq = uic_get_irq,
+ .calibrate_decr = generic_calibrate_decr,
+};
--
1.5.3.4
^ permalink raw reply related
* Re: [PATCH 3/3] [POWERPC] Kilauea DTS
From: Josh Boyer @ 2007-10-11 12:13 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev
In-Reply-To: <200710111402.12449.sr@denx.de>
On Thu, 2007-10-11 at 14:02 +0200, Stefan Roese wrote:
> On Thursday 11 October 2007, Josh Boyer wrote:
> > On Thu, 2007-10-11 at 10:49 +0200, Stefan Roese wrote:
> > > > > + PowerPC,405EX@0 {
> > > > > + device_type = "cpu";
> > > > > + reg = <0>;
> > > > > + clock-frequency = <0>; /* Filled in by U-Boot */
> > > >
> > > > Filled in by U-Boot itself? Or by a cuboot wrapper? (which I can't
> > > > find in the patches.)
> > >
> > > By U-Boot itself. I have a U-Boot patch in the queue to add device tree
> > > support for 4xx. Therefor I don't plan adding a cuboot wrapper for
> > > Kilauea.
> >
> > Very cool!
>
> You can take a look at the kilauea-405ex branch of my 4xx custodian repository
> for a latest development snapshort:
>
> http://www.denx.de/cgi-bin/gitweb.cgi?p=u-boot/u-boot-ppc4xx.git;a=shortlog;h=kilauea-405ex
Ok, so how does the DTS file from the kernel get to U-Boot? Since there
is no defconfig provided and no wrapper bits, I'm assuming this port
takes a raw uImage. Is that correct? If so, do you expect a separate
DTB file to be built for this that is passed to U-Boot?
josh
^ permalink raw reply
* Re: [PATCH 3/3] [POWERPC] Kilauea DTS
From: Stefan Roese @ 2007-10-11 12:22 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1192104819.5534.109.camel@localhost.localdomain>
Hi Josh,
On Thursday 11 October 2007, Josh Boyer wrote:
> Ok, so how does the DTS file from the kernel get to U-Boot? Since there
> is no defconfig provided and no wrapper bits, I'm assuming this port
> takes a raw uImage. Is that correct?
Yes, correct.
> If so, do you expect a separate
> DTB file to be built for this that is passed to U-Boot?
For booting on such a platform the "raw" uImage is needed plus the dtb file,
generated from the dts file in arch/powerpc. At least that's how I'm doing
it, and I'm still very new to this device tree stuff.
Best regards,
Stefan
^ permalink raw reply
* powerpc commits for 2.6.24
From: Paul Mackerras @ 2007-10-11 12:30 UTC (permalink / raw)
To: linuxppc-dev
Below is the list of commits that I plan to ask Linus to pull
tomorrow. This is the last call for anything else or for objections
to any of these commits going in. These commits are in powerpc.git on
the master and for-2.6.24 branches.
Paul.
Adrian Bunk (2):
[POWERPC] Remove APUS support from arch/ppc
[POWERPC] Select proper defconfig for crosscompiles
Andre Detsch (1):
[POWERPC] spufs: Fix race condition on gang->aff_ref_spu
Anton Vorontsov (11):
[POWERPC] QE: extern par_io_config_pin and par_io_data_set funcs
[POWERPC] fsl_soc: add support for fsl_spi
[POWERPC] MPC832x_RDB: Update dts to use SPI1 in QE, register mmc_spi stub
[POWERPC] fsl_soc: fix uninitialized i2c_board_info structure
[POWERPC] MPC8568E-MDS: add support for ds1374 rtc
[POWERPC] mpc8568mds.dts: fix PCIe I/O address space location and size
[POWERPC] mpc85xx_mds: select QUICC_ENGINE
[POWERPC] QEIC: Implement pluggable handlers, fix MPIC cascading
[POWERPC] QE: pario - support for MPC85xx layout
[POWERPC] 85xx: mpc8568mds - update dts to be able to use UCCs
[POWERPC] 85xx: mpc85xx_mds - reset UCC ethernet properly
Aristeu Rozanski (1):
[POWERPC] adbhid: Enable KEY_FN key reporting
Arnd Bergmann (3):
[POWERPC] add Kconfig option for optimizing for cell
[POWERPC] Move embedded6xx into multiplatform
[POWERPC] Fix pci domain detection
Becky Bruce (1):
[POWERPC] Update lmb.h include protection to ASM_POWERPC
Benjamin Herrenschmidt (3):
[POWERPC] Fix platinumfb framebuffer
[POWERPC] cell: Move cbe_regs.h to include/asm-powerpc/cell-regs.h
[POWERPC] cell: Add Cell memory controller register defs and expose it
Cyrill Gorcunov (6):
[POWERPC] Sky Cpu and Nexus: code style improvement
[POWERPC] Sky Cpu and Nexus: include io.h
[POWERPC] Sky Cpu and Nexus: check for platform_get_resource retcode
[POWERPC] Sky Cpu and Nexus: check for create_proc_entry ret code
[POWERPC] Sky Cpu: use C99 style for struct init
[POWERPC] Sky Cpu and Nexus: use seq_file/single_open on proc interface
Dale Farnsworth (2):
[POWERPC] Add Marvell mv64x60 udbg putc/getc functions
[POWERPC] 85xx: Failure with odd memory sizes and CONFIG_HIGHMEM
David Gibson (7):
[POWERPC] Fixes to allow use of Ebony's flash chips through physmap_of
[POWERPC] Fix setting of irq trigger type in UIC driver
[POWERPC] Fix irq flow handler for 4xx UIC
[POWERPC] Improve robustness of the UIC cascade handler
[POWERPC] Move bootwrapper's strchr() and strncmp() from .h to string.S
[POWERPC] Document and implement an improved flash device binding for powerpc
[POWERPC] Cleanups for physmap_of.c (v2)
David Woodhouse (1):
[POWERPC] Optionally use new device number for pmac_zilog
Domen Puncer (2):
[POWERPC] MPC5200 low power mode
[POWERPC] clk.h interface for platforms
Ed Swarthout (1):
[POWERPC] Add memory regions to the kcore list for 32-bit machines
Emil Medve (2):
[POWERPC] Fix build errors when BLOCK=n
[POWERPC] QE: Added missing CEURNR register
Gabriel C (1):
[POWERPC] Typo fixes interrrupt -> interrupt
Geert Uytterhoeven (1):
[POWERPC] PS3: Add new LV1 error codes
Geoff Levand (7):
[POWERPC] PS3: Enhance storage probe debug output
[POWERPC] PS3: Cleanup of os-area.c
[POWERPC] PS3: Remove unused os-area params
[POWERPC] PS3: os-area workqueue processing
[POWERPC] PS3: Add os-area rtc_diff set/get routines
[POWERPC] PS3: Save os-area params to device tree
[POWERPC] PS3: Add os-area database routines
Grant Likely (25):
[POWERPC] Only ignore arch/ppc/include, not arch/ppc/boot/include
[POWERPC] mpc8349: Add linux,network-index to ethernet nodes in device tree
[POWERPC] mpc5200: Add cuimage support for mpc5200 boards
[POWERPC] Virtex: Add uartlite bootwrapper driver
[POWERPC] Virtex: Add Kconfig macros for Xilinx Virtex board support
[POWERPC] Virtex: add xilinx interrupt controller driver
[POWERPC] Virtex: Add generic Xilinx Virtex board support
[POWERPC] Add PowerPC Xilinx Virtex entry to maintainers
[POWERPC] Uartlite: Fix reg io to access documented register size
[POWERPC] Uartlite: change name of ports to ulite_ports
[POWERPC] Uartlite: Add macro for uartlite device name
[POWERPC] Uartlite: Separate the bus binding from the driver proper
[POWERPC] Uartlite: Comment block tidy
[POWERPC] Uartlite: Add of-platform-bus binding
[POWERPC] Uartlite: Let the console be initialized earlier
[POWERPC] Uartlite: Flush RX fifo in bootwrapper
[POWERPC] XilinxFB: Move xilinxfb_platform_data definition to a shared header file
[POWERPC] Setup default eth addr in embed_config for Xilinx Virtex platforms
[POWERPC] Uartlite: Add macros for register names
[POWERPC] Uartlite: Revert register io access changes
[POWERPC] Lite5200: Use comma delimiter format for lists in device tree
[POWERPC] Enable debug info on boot wrapper
[POWERPC] Only call ppc_md.setup_arch() if it is provided
[POWERPC] Remove empty ppc_md.setup_arch hooks
[POWERPC] Platforms shouldn't mess with ROOT_DEV
Guennadi Liakhovetski (2):
[POWERPC] Fix i2c device string format
[POWERPC] linkstation updates
Hollis Blanchard (1):
[POWERPC] 4xx: Implement udbg_getc() for 440
Hugh Dickins (1):
[POWERPC] ppc64: support CONFIG_DEBUG_PREEMPT
Ishizaki Kou (9):
[POWERPC] Fix celleb pci section warnings
[POWERPC] Fix celleb sio section warning
[POWERPC] Init markings for celleb
[POWERPC] Init markings for hvc_beat
[POWERPC] Celleb: Move pause, kexec_cpu_down to beat.c
[POWERPC] Celleb: Support for Power/Reset buttons
[POWERPC] Celleb: New HTAB Guest OS Interface on Beat
[POWERPC] Celleb: Serial I/O update
[POWERPC] Celleb: update for PCI
Jason Jin (1):
[POWERPC] Treat 8610 PCIe host bridge as transparent
Jeremy Kerr (8):
[POWERPC] PS3: Fix CONFIG_SMP=n, CONFIG_KEXEC=y build
[POWERPC] spufs: Remove asmlinkage from do_spu_create
[POWERPC] spufs: Remove spu_harvest
[POWERPC] cell: Unify spufs syscall path
[POWERPC] spufs: Remove asmlinkage from spufs_calls
[POWERPC] spufs: Fix restore_decr_wrapped() to match CBE Handbook
[POWERPC] cell: Remove DEBUG for SPU callbacks
[POWERPC] cell: Don't cast the result of of_get_property()
Jesper Juhl (2):
[POWERPC] Clean out a bunch of duplicate includes
[POWERPC] Don't cast kmalloc return value in ibmebus.c
Joachim Fenkes (1):
[POWERPC] ibmebus: More descriptive error return code in ibmebus_store_probe()
Jochen Friedrich (4):
[POWERPC] Fix copy'n'paste typo in commproc.c
[PPC] Fix cpm_dpram_addr returning phys mem instead of virt mem
[PPC] Compile fix for 8xx CPM Ehernet driver
[POWERPC] Fix cpm_uart driver
John Rigby (1):
[POWERPC] 52xx: Fix mpc52xx_uart_of_assign to use correct index
John Traill (1):
[POWERPC] 8xx: Set initial memory limit.
Jon Loeliger (5):
[POWERPC] 52xx: Remove unnecessary loops_per_jiffy initialization code
[POWERPC] 8xx: Remove unnecessary loops_per_jiffy initialization code
[POWERPC] embedded6xx: Remove unnecessary loops_per_jiffy initialization code
[POWERPC] 86xx: Remove unnecessary loops_per_jiffy initialization code.
[POWERPC] 85xx: Remove unnecessary loops_per_jiffy initialization code.
Josh Boyer (23):
[POWERPC] Rename 4xx paths to 40x
[POWERPC] 4xx Kconfig cleanup
[POWERPC] Rename 44x bootwrapper
[POWERPC] 4xx bootwrapper reworks
[POWERPC] 40x MMU
[POWERPC] 40x decrementer fixes
[POWERPC] Fix 40x build
[POWERPC] Bamboo DTS
[POWERPC] Bamboo board support
[POWERPC] Bamboo zImage wrapper
[POWERPC] Remove dtc build cruft from DTS files
[POWERPC] Fix bus probe on Bamboo board
[POWERPC] Walnut DTS
[POWERPC] Walnut defconfig
[POWERPC] Walnut board support
[POWERPC] Walnut zImage wrapper
[POWERPC] cuimage for Bamboo board
[POWERPC] Make partitions optional in physmap_of
[POWERPC] 4xx: Convert Walnut flash mappings to new binding
[POWERPC] 4xx: Convert Seqouia flash mappings to new binding
[POWERPC] Update PowerPC 4xx entry in MAINTAINERS
[POWERPC] 4xx: Fix Walnut wrapper compile errors
[POWERPC] Add treeImage to .gitignore
Kumar Gala (19):
[POWERPC] Remove old includes from arch/ppc
[POWERPC] Copy over headers from arch/ppc to arch/powerpc that we need
[POWERPC] Stop include asm-ppc when building ARCH=powerpc for ppc32
ucc_geth: kill unused include
[POWERPC] 85xx: Renamed mpc8544_ds.c to mpc85xx_ds.c
[POWERPC] 85xx: Clean up from 85xx_ds rename
[POWERPC] Handle alignment faults on SPE load/store instructions
[POWERPC] 85xx: Add basic Uniprocessor MPC8572 DS port
[POWERPC] DTS cleanup
[POWERPC] Move PCI nodes to be sibilings with SOC nodes
[POWERPC] 83xx: Removed PCI exclude of PHB
[POWERPC] Add cpu feature for SPE handling
[POWERPC] Fix modpost warnings from head*.S on ppc32
[POWERPC] Cleaned up whitespace in head_fsl_booke.S
[POWERPC] Fixup MPC8568 dts
[POWERPC] Update .gitignore for new vdso generated files
[POWERPC] FSL: Access PCIe LTSSM register with correct size
[POWERPC] Use for_each_ matching routinues for pci PHBs
[POWERPC] 85xx/86xx: refactor RSTCR reset code
Linas Vepstas (16):
[POWERPC] EEH: Tweak printk message
[POWERPC] EEH: Fix PCI bridge handling bug
[POWERPC] EEH: Dump PCI bridge status on event
[POWERPC] pseries: Avoid excess rtas_token calls
[POWERPC] pseries: Use rtas_token instead of hand-rolled code
[POWERPC] pseries: Simplify rtasd initialization
[POWERPC] Remove nvram forward declarations
[POWERPC] pseries: Fix jumbled no_logging flag
[POWERPC] pseries: Eliminate global error_log_cnt variable
[POWERPC] pseries: Remove dead EEH video code
[POWERPC] IOMMU virtual merge is no longer experimental
[POWERPC] prom_init whitespace cleanup, typo fix
[POWERPC] prom.c whitespace cleanup
[POWERPC] setup_64.c and prom.c comment cleanup
[POWERPC] pseries: device node status can be "ok" or "okay"
[POWERPC] Use alloc_maybe_bootmem() in pcibios_alloc_controller
Mariusz Kozlowski (1):
[POWERPC] drivers/macintosh/therm_adt746x.c: kmalloc + memset conversion to kzalloc
Mark A. Greer (1):
[POWERPC] MAINTAINERS shouldn't reference linuxppc-embedded
Mathieu Desnoyers (1):
[POWERPC] Include pagemap.h in asm/powerpc/tlb.h
Meelis Roos (1):
[POWERPC] Fix ppc kernels after build-id addition
Michael Buesch (1):
[POWERPC] via-pmu: Fix typo in printk
Michael Ellerman (28):
[POWERPC] Add an optional device_node pointer to the irq_host
[POWERPC] Invert null match behaviour for irq_hosts
[POWERPC] Provide a default irq_host match, which matches on an exact of_node
[POWERPC] Initialise hwirq for legacy irqs
[POWERPC] Export virq mapping via debugfs
[POWERPC] spufs: Extract the file descriptor search logic in SPU coredump code
[POWERPC] spufs: Remove ctx_info and ctx_info_list
[POWERPC] spufs: Call spu_acquire_saved() before calculating the SPU note sizes
[POWERPC] spufs: Use computed sizes/#defines rather than literals in SPU coredump code
[POWERPC] spufs: Write some SPU coredump values as ASCII
[POWERPC] spufs: Correctly calculate the size of the local-store to dump
[POWERPC] spufs: Don't return -ENOSYS as extra notes size if spufs is not loaded
[POWERPC] spufs: Get rid of spufs_coredump_num_notes, it's not needed if we NULL terminate
[POWERPC] spufs: Internal __spufs_get_foo() routines should take a spu_context *
[POWERPC] spufs: Add contents of npc file to SPU coredumps
[POWERPC] spufs: Combine spufs_coredump_calls with spufs_calls
[POWERPC] spufs: Cleanup ELF coredump extra notes logic
[POWERPC] spufs: Handle errors in SPU coredump code, and support coredump to a pipe
[POWERPC] spufs: Respect RLIMIT_CORE in spu coredump code
[POWERPC] spufs: Add DEFINE_SPUFS_ATTRIBUTE()
[POWERPC] Make sure to of_node_get() the result of pci_device_to_OF_node()
[POWERPC] Simplify error logic in u3msi_setup_msi_irqs()
[POWERPC] Simplify error logic in rtas_setup_msi_irqs()
[POWERPC] Simplify rtas_change_msi() error semantics
[POWERPC] Inline u3msi_compose_msi_msg()
[POWERPC] Store the base address in dcr_host_t
[POWERPC] Update mpic to use dcr_host_t.base
[POWERPC] Update axon_msi to use dcr_host_t.base
Michael Neuling (1):
[POWERPC] Remove barriers from the SLB shadow buffer update
Mike Frysinger (1):
[POWERPC] Use __attribute__ in asm-powerpc
Milton Miller (2):
[POWERPC] boot: Record header bytes in gunzip_start
[POWERPC] boot: Simplify gunzip_finish
Murali Iyer (1):
[POWERPC] Export DCR symbols for modules
Nathan Lynch (14):
[POWERPC] Remove gratuitous reads from maple PCI config space methods
[POWERPC] rtas_pci_ops: Use named structure member initializers
[POWERPC] celleb_fake_pci_ops: Use named structure member initializers
[POWERPC] celleb_epci_ops: Use named structure member initializers
[POWERPC] maple pci_ops: Use named structure member initializers
[POWERPC] pa_pxp_ops: Use named structure member initializers
[POWERPC] powermac pci_ops: Use named structure member initializers
[POWERPC] null_pci_ops: Use named structure member initializers
[POWERPC] efika rtas_pci_ops: Use named structure member initializers
[POWERPC] chrp pci_ops: Use named structure member initializers
[POWERPC] indirect_pci_ops: Use named structure member initializers
[POWERPC] tsi108_direct_pci_ops: Use named structure member initializers
[POWERPC] Remove gratuitous reads from pasemi pci config space methods
[POWERPC] Remove gratuitous reads from powermac pci config space methods
Olaf Hering (2):
[POWERPC] Advertise correct IDE mode on Pegasos2
[POWERPC] Fix pmac_zilog debug arg
Olof Johansson (14):
[POWERPC] Rework SMP timebase handoff for pasemi
[POWERPC] Export new __io{re,un}map_at() symbols
[POWERPC] pasemi: Add pasemi_pci_getcfgaddr()
[POWERPC] pasemi: Add workaround for erratum 5945
[POWERPC] pasemi: Export more SPRs to sysfs when CONFIG_DEBUG_KERNEL=y
[POWERPC] pasemi: Print more information at machine check
[POWERPC] pasemi: Move pasemi_idle_init() to late_initcall()
[POWERPC] Remove unused platform_machine_check()
[POWERPC] Move lowlevel runlatch calls under cpu feature control
[POWERPC] Remove warning in arch/powerpc/kernel/sysfs.c
[POWERPC] Add workaround for MPICs with broken register reads
[POWERPC] Support setting affinity for U3/U4 MSI sources
[POWERPC] Separate out legacy machine check exception parsers
[POWERPC] Don't enable cpu hotplug on pSeries machines with MPIC
Paul Mackerras (8):
[POWERPC] Handle alignment faults on new FP load/store instructions
[POWERPC] Disable power management for arch/ppc
[PPC] Use cpu setup routines from cpu_setup_44x.S for ARCH=ppc
[POWERPC] Use cache-inhibited large page bit from firmware
[POWERPC] Remove unused old code from powermac setup code
[POWERPC] Fix performance monitor on machines with logical PVR
[POWERPC] Prevent decrementer clockevents from firing early
[POWERPC] Make clockevents work on PPC601 processors
Peter Korsgaard (5):
[POWERPC] fsl_soc: Fix trivial printk typo.
[POWERPC] fsl_soc: rtc-ds1307 support
[POWERPC] spi: Use fsl_spi instead of mpc83xx_spi
[POWERPC] spi: mode should be "cpu-qe" instead of "qe"
[POWERPC] spi: Support non-QE processors
Robert P. J. Day (2):
[POWERPC] Prevent direct inclusion of <asm/rwsem.h>.
[POWERPC] Remove redundant reference to non-existent CONFIG_BOOTIMG
Roland McGrath (2):
[POWERPC] Add CHECK_FULL_REGS in several places in ptrace code
[POWERPC] powerpc vDSO: install unstripped copies on disk
Roy Zang (1):
[POWERPC] bootwrapper: adds cuboot for MPC7448HPC2 platform
Satyam Sharma (1):
[POWERPC] Avoid pointless WARN_ON(irqs_disabled()) from panic codepath
Scott Wood (52):
[POWERPC] Whitespace cleanup in arch/powerpc
[POWERPC] Add clrbits8 and setbits8
[POWERPC] Use strcasecmp() rather than strncasecmp() when determining device node compatibility
[POWERPC] bootwrapper: Update .gitignore
[POWERPC] bootwrapper: Set timebase_period_ns from dt_fixup_cpu_clocks
[POWERPC] bootwrapper: dt_xlate_range() bugfixes
[POWERPC] bootwrapper: Add dt_is_compatible()
[POWERPC] bootwrapper: Add 16-bit I/O, sync(), eieio(), and barrier()
[POWERPC] bootwrapper: Add TARGET_HAS_ETHn tests to ppcboot.h
[POWERPC] bootwrapper: serial_console_init() fixes
[POWERPC] bootwrapper: Declare udelay() in ops.h
[POWERPC] bootwrapper: Add CPM serial driver
[POWERPC] bootwrapper: Move linker symbols into ops.h
[POWERPC] bootwrapper: Add 8xx cuboot support
[POWERPC] bootwrapper: Add PowerQUICC II (82xx with CPM) cuboot support
[POWERPC] bootwrapper: flatdevtree fixes
[POWERPC] bootwrapper: Add strtoull()
[POWERPC] bootwrapper: Add get_path()
[POWERPC] bootwrapper: Only print MAC addresses when the node is actually present
[POWERPC] Check _PAGE_RW and _PAGE_PRESENT on kernel addresses
[POWERPC] fsl_soc.c cleanup
[PPC] Add clrbits8 and setbits8.
[POWERPC] bootwrapper: Factor out dt_set_mac_address()
[POWERPC] bootwrapper: Add PlanetCore firmware support
[POWERPC] Make instruction dumping work in real mode
[POWERPC] CPM: Change from fsl,brg-frequency to brg/clock-frequency
[POWERPC] Introduce new CPM device bindings.
[POWERPC] Add early debug console for CPM serial ports.
[POWERPC] bootwrapper: Support all-in-one PCI nodes in cuboot-pq2.
[POWERPC] bootwrapper: Add fsl_get_immr() and 8xx/pq2 clock functions.
[POWERPC] bootwrapper: Use fsl_get_immr() in cuboot-pq2.c.
[POWERPC] cpm_uart: Be an of_platform device when CONFIG_PPC_CPM_NEW_BINDING is set.
[POWERPC] cpm_uart: sparse fixes
[POWERPC] cpm_uart: Issue STOP_TX command before initializing console.
[POWERPC] 8xx: Fix CONFIG_PIN_TLB.
[POWERPC] 8xx: Infrastructure code cleanup.
[POWERPC] 8xx: Add pin and clock setting functions.
[POWERPC] 8xx: Work around CPU15 erratum.
[POWERPC] cpm2: Infrastructure code cleanup.
[POWERPC] cpm2: Add SCCs to cpm2_clk_setup(), and cpm2_smc_clk_setup().
[POWERPC] cpm2: Add cpm2_set_pin().
[POWERPC] mpc82xx: Define CPU_FTR_NEED_COHERENT
[POWERPC] mpc82xx: Remove a bunch of cruft that duplicates generic functionality.
[POWERPC] mpc82xx: Rename mpc82xx_ads to mpc8272_ads.
[POWERPC] mpc8272ads: Change references from 82xx_ADS to 8272_ADS.
[POWERPC] Document local bus nodes in the device tree, and update cuboot-pq2.
[POWERPC] 8xx: mpc885ads cleanup
[POWERPC] 8xx/wrapper: Embedded Planet EP88xC support
[POWERPC] mpc82xx: Update mpc8272ads, and factor out PCI and reset.
[POWERPC] mpc82xx: Add pq2fads board support.
[POWERPC] 8xx: Move softemu8xx.c from arch/ppc
[POWERPC] cpm: Describe multi-user ram in its own device node.
Sebastian Siewior (2):
[POWERPC] spufs: Make file-internal functions & variables static
[POWERPC] spufs: Make isolated loader properly aligned
Segher Boessenkool (2):
[POWERPC] Replace a few #defines with empty inline functions
[POWERPC] Implement atomic{, 64}_{read, write}() without volatile
Stephen Rothwell (37):
[POWERPC] Fix non HUGETLB_PAGE build warning
[POWERPC] Use of_get_property in ipmi code
[POWERPC] Remove get_property and device_is_compatible
[POWERPC] Tidy up CONFIG_PPC_MM_SLICES code
[POWERPC] Comment out a currently unused function
[POWERPC] Fix section mismatch in crash_dump.c
[POWERPC] Fix section mismatch in dart_iommu.c
[POWERPC] Fix section mismatches in udbg_adb.c
[POWERPC] Fix section mismatch in pasemi/iommu.c
[POWERPC] Remove some duplicate declarations from pmac.h
[POWERPC] iSeries: Clean up lparmap mess
[POWERPC] Move iSeries startup code out of head_64.S
[POWERPC] Move the exception macros into a header file
[POWERPC] Move the iSeries exception vectors
[POWERPC] Split out iSeries specific exception macros
[POWERPC] Exception numbers are not relevant to iSeries
[POWERPC] Fix section mismatch in PCI code
[POWERPC] Remove cmd_line from head*.S
[POWERPC] Size swapper_pg_dir correctly
[POWERPC] FWNMI is only used on pSeries
[POWERPC] Create and use CONFIG_WORD_SIZE
[POWERPC] Remove debug printk from vio_bus_init
[POWERPC] Simplify vio_bus_init a little for legacy iSeries
[POWERPC] Make vio_bus_type static
[POWERPC] Limit range of __init_ref_ok somewhat
[POWERPC] iSeries: Correct missing newline in printk
[POWERPC] Prepare to remove of_platform_driver name
[POWERPC] Remove some more section mismatch warnings
[POWERPC] Align the sys_call_table
[POWERPC] Clean up vio.h
[POWERPC] iSeries: Simplify viocd initialisation
[POWERPC] Remove iSeries_vio_dev
[POWERPC] Remove more iSeries-specific stuff from vio.c
[POWERPC] iSeries: Move detection of virtual cdroms
[POWERPC] iSeries: Move detection of virtual tapes
[POWERPC] iSeries: Move viodasd probing
[POWERPC] Move of_platform_driver initialisations: arch/powerpc
Timur Tabi (4):
[POWERPC] add clrsetbits macros
[POWERPC] 86xx: Fix definition of global-utilites structure
[POWERPC] qe: miscellaneous code improvements and fixes to the QE library
[POWERPC] 86xx: update immap_86xx.h for the 8610
Tony Breeds (6):
[POWERPC] Convert define_machine(mpc885_ads) to C99 initializer syntax
[POWERPC] Implement {read,update}_persistent_clock
[POWERPC] Implement generic time of day clocksource for powerpc
[POWERPC] Fix panic in RTAS code
[POWERPC] Implement clockevents driver for powerpc
[POWERPC] Enable tickless idle and high res timers for powerpc
Valentine Barshak (10):
[POWERPC] PowerPC 440EPx: Sequoia device tree
[POWERPC] PowerPC 440EPx: Sequoia defconfig
[POWERPC] PowerPC 440EPx: Sequoia board support
[POWERPC] PowerPC 440EPx: Sequoia bootwrapper
[POWERPC] Add 64-bit resources support to pci_iomap
[POWERPC] 4xx: Fix Bamboo MAL0 dts entry.
[POWERPC] 4xx: Fix Sequoia MAL0 and EMAC dts entries.
[POWERPC] 4xx: Introduce cpu_setup functionality to 44x platform
[POWERPC] 4xx: Move 440EP(x) FPU setup from head_44x to cpu_setup_4xx
[POWERPC] 4xx: 440EPx/GRx incorrect write to DDR SDRAM errata workaround
Wolfgang Denk (1):
[POWERPC] Disable vDSO support for ARCH=ppc where it's not implemented
Xianghua Xiao (2):
[POWERPC] Add initial MPC8610 HPCD Device Tree Source file.
[POWERPC] Add initial MPC8610 HPCD Platform files.
Documentation/powerpc/booting-without-of.txt | 335 ++++
MAINTAINERS | 27
arch/powerpc/Kconfig | 47 +
arch/powerpc/Kconfig.debug | 31
arch/powerpc/Makefile | 56 -
arch/powerpc/boot/.gitignore | 9
arch/powerpc/boot/44x.c | 85 -
arch/powerpc/boot/44x.h | 5
arch/powerpc/boot/4xx.c | 300 ++++
arch/powerpc/boot/4xx.h | 22
arch/powerpc/boot/Makefile | 25
arch/powerpc/boot/bamboo.c | 47 +
arch/powerpc/boot/cpm-serial.c | 269 ++++
arch/powerpc/boot/cuboot-52xx.c | 59 +
arch/powerpc/boot/cuboot-83xx.c | 1
arch/powerpc/boot/cuboot-85xx.c | 1
arch/powerpc/boot/cuboot-8xx.c | 47 +
arch/powerpc/boot/cuboot-bamboo.c | 30
arch/powerpc/boot/cuboot-hpc2.c | 48 +
arch/powerpc/boot/cuboot-pq2.c | 261 +++
arch/powerpc/boot/cuboot-sequoia.c | 56 +
arch/powerpc/boot/cuboot.c | 3
arch/powerpc/boot/dcr.h | 18
arch/powerpc/boot/devtree.c | 99 +
arch/powerpc/boot/dts/bamboo.dts | 244 +++
arch/powerpc/boot/dts/ebony.dts | 35
arch/powerpc/boot/dts/ep88xc.dts | 214 +++
arch/powerpc/boot/dts/holly.dts | 5
arch/powerpc/boot/dts/kuroboxHD.dts | 9
arch/powerpc/boot/dts/kuroboxHG.dts | 9
arch/powerpc/boot/dts/lite5200.dts | 59 -
arch/powerpc/boot/dts/lite5200b.dts | 119 +-
arch/powerpc/boot/dts/mpc7448hpc2.dts | 9
arch/powerpc/boot/dts/mpc8272ads.dts | 431 +++---
arch/powerpc/boot/dts/mpc8313erdb.dts | 67 -
arch/powerpc/boot/dts/mpc832x_mds.dts | 122 +-
arch/powerpc/boot/dts/mpc832x_rdb.dts | 72 -
arch/powerpc/boot/dts/mpc8349emitx.dts | 104 +
arch/powerpc/boot/dts/mpc8349emitxgp.dts | 52 -
arch/powerpc/boot/dts/mpc834x_mds.dts | 249 ++-
arch/powerpc/boot/dts/mpc836x_mds.dts | 123 +-
arch/powerpc/boot/dts/mpc8540ads.dts | 175 +-
arch/powerpc/boot/dts/mpc8541cds.dts | 196 +--
arch/powerpc/boot/dts/mpc8544ds.dts | 377 +++--
arch/powerpc/boot/dts/mpc8548cds.dts | 404 +++--
arch/powerpc/boot/dts/mpc8555cds.dts | 196 +--
arch/powerpc/boot/dts/mpc8560ads.dts | 185 +-
arch/powerpc/boot/dts/mpc8568mds.dts | 160 +-
arch/powerpc/boot/dts/mpc8572ds.dts | 404 +++++
arch/powerpc/boot/dts/mpc8610_hpcd.dts | 191 +++
arch/powerpc/boot/dts/mpc8641_hpcn.dts | 289 ++--
arch/powerpc/boot/dts/mpc866ads.dts | 5
arch/powerpc/boot/dts/mpc885ads.dts | 211 ++-
arch/powerpc/boot/dts/pq2fads.dts | 240 +++
arch/powerpc/boot/dts/prpmc2800.dts | 5
arch/powerpc/boot/dts/sequoia.dts | 302 ++++
arch/powerpc/boot/dts/walnut.dts | 190 +++
arch/powerpc/boot/ebony.c | 45 +
arch/powerpc/boot/ep88xc.c | 54 +
arch/powerpc/boot/fixed-head.S | 4
arch/powerpc/boot/flatdevtree.c | 100 +
arch/powerpc/boot/flatdevtree.h | 8
arch/powerpc/boot/flatdevtree_env.h | 20
arch/powerpc/boot/flatdevtree_misc.c | 8
arch/powerpc/boot/fsl-soc.c | 57 +
arch/powerpc/boot/fsl-soc.h | 8
arch/powerpc/boot/gunzip_util.c | 8
arch/powerpc/boot/holly.c | 5
arch/powerpc/boot/io.h | 49 +
arch/powerpc/boot/main.c | 10
arch/powerpc/boot/mpc52xx-psc.c | 69 +
arch/powerpc/boot/mpc8xx.c | 82 +
arch/powerpc/boot/mpc8xx.h | 11
arch/powerpc/boot/mpsc.c | 1
arch/powerpc/boot/mv64x60_i2c.c | 2
arch/powerpc/boot/of.c | 2
arch/powerpc/boot/ops.h | 36
arch/powerpc/boot/planetcore.c | 166 ++
arch/powerpc/boot/planetcore.h | 49 +
arch/powerpc/boot/ppcboot.h | 7
arch/powerpc/boot/pq2.c | 102 +
arch/powerpc/boot/pq2.h | 11
arch/powerpc/boot/prpmc2800.c | 6
arch/powerpc/boot/ps3.c | 4
arch/powerpc/boot/serial.c | 23
arch/powerpc/boot/stdlib.c | 45 +
arch/powerpc/boot/stdlib.h | 6
arch/powerpc/boot/string.S | 24
arch/powerpc/boot/string.h | 2
arch/powerpc/boot/treeboot-bamboo.c | 43 +
arch/powerpc/boot/treeboot-ebony.c | 2
arch/powerpc/boot/treeboot-walnut.c | 131 ++
arch/powerpc/boot/uartlite.c | 79 +
arch/powerpc/boot/wrapper | 20
arch/powerpc/configs/bamboo_defconfig | 775 ++++++++++
arch/powerpc/configs/ebony_defconfig | 85 +
arch/powerpc/configs/ep88xc_defconfig | 751 ++++++++++
arch/powerpc/configs/mpc8272_ads_defconfig | 248 ++-
arch/powerpc/configs/mpc8544_ds_defconfig | 2
arch/powerpc/configs/mpc8572_ds_defconfig | 1496 ++++++++++++++++++++
arch/powerpc/configs/mpc8610_hpcd_defconfig | 1023 ++++++++++++++
arch/powerpc/configs/mpc885_ads_defconfig | 297 ++--
arch/powerpc/configs/pq2fads_defconfig | 1003 +++++++++++++
arch/powerpc/configs/sequoia_defconfig | 861 ++++++++++++
arch/powerpc/configs/walnut_defconfig | 773 ++++++++++
arch/powerpc/kernel/Makefile | 43 -
arch/powerpc/kernel/align.c | 307 ++++
arch/powerpc/kernel/asm-offsets.c | 12
arch/powerpc/kernel/btext.c | 1
arch/powerpc/kernel/clock.c | 82 +
arch/powerpc/kernel/cpu_setup_44x.S | 56 +
arch/powerpc/kernel/cputable.c | 108 +
arch/powerpc/kernel/crash.c | 1
arch/powerpc/kernel/crash_dump.c | 4
arch/powerpc/kernel/entry_32.S | 4
arch/powerpc/kernel/entry_64.S | 8
arch/powerpc/kernel/head_32.S | 53 -
arch/powerpc/kernel/head_40x.S | 22
arch/powerpc/kernel/head_44x.S | 24
arch/powerpc/kernel/head_64.S | 602 --------
arch/powerpc/kernel/head_8xx.S | 27
arch/powerpc/kernel/head_fsl_booke.S | 90 +
arch/powerpc/kernel/ibmebus.c | 7
arch/powerpc/kernel/idle.c | 3
arch/powerpc/kernel/iomap.c | 4
arch/powerpc/kernel/iommu.c | 1
arch/powerpc/kernel/irq.c | 97 +
arch/powerpc/kernel/lparcfg.c | 2
arch/powerpc/kernel/lparmap.c | 32
arch/powerpc/kernel/nvram_64.c | 23
arch/powerpc/kernel/of_platform.c | 17
arch/powerpc/kernel/pci-common.c | 7
arch/powerpc/kernel/pci_32.c | 4
arch/powerpc/kernel/pci_64.c | 2
arch/powerpc/kernel/pci_dn.c | 7
arch/powerpc/kernel/ppc_ksyms.c | 8
arch/powerpc/kernel/process.c | 23
arch/powerpc/kernel/prom.c | 24
arch/powerpc/kernel/prom_init.c | 23
arch/powerpc/kernel/ptrace.c | 10
arch/powerpc/kernel/ptrace32.c | 8
arch/powerpc/kernel/rtas_pci.c | 4
arch/powerpc/kernel/setup-common.c | 2
arch/powerpc/kernel/setup_32.c | 10
arch/powerpc/kernel/setup_64.c | 9
arch/powerpc/kernel/smp.c | 29
arch/powerpc/kernel/softemu8xx.c | 202 +++
arch/powerpc/kernel/sysfs.c | 64 +
arch/powerpc/kernel/systbl.S | 2
arch/powerpc/kernel/time.c | 503 +++----
arch/powerpc/kernel/traps.c | 85 +
arch/powerpc/kernel/udbg.c | 2
arch/powerpc/kernel/udbg_16550.c | 11
arch/powerpc/kernel/vdso.c | 2
arch/powerpc/kernel/vdso32/.gitignore | 1
arch/powerpc/kernel/vdso32/Makefile | 20
arch/powerpc/kernel/vdso64/.gitignore | 1
arch/powerpc/kernel/vdso64/Makefile | 19
arch/powerpc/kernel/vio.c | 104 -
arch/powerpc/kernel/vmlinux.lds.S | 2
arch/powerpc/lib/Makefile | 7
arch/powerpc/lib/alloc.c | 29
arch/powerpc/mm/40x_mmu.c | 4
arch/powerpc/mm/Makefile | 15
arch/powerpc/mm/fsl_booke_mmu.c | 2
arch/powerpc/mm/hash_utils_64.c | 7
arch/powerpc/mm/hugetlbpage.c | 3
arch/powerpc/mm/init_32.c | 41 +
arch/powerpc/mm/init_64.c | 2
arch/powerpc/mm/mem.c | 1
arch/powerpc/mm/mmu_context_64.c | 11
arch/powerpc/mm/pgtable_64.c | 2
arch/powerpc/mm/slb.c | 6
arch/powerpc/mm/slice.c | 1
arch/powerpc/oprofile/cell/pr_util.h | 3
arch/powerpc/oprofile/op_model_cell.c | 2
arch/powerpc/platforms/40x/Kconfig | 127 --
arch/powerpc/platforms/40x/Makefile | 2
arch/powerpc/platforms/40x/virtex.c | 45 +
arch/powerpc/platforms/40x/walnut.c | 63 +
arch/powerpc/platforms/44x/Kconfig | 32
arch/powerpc/platforms/44x/Makefile | 2
arch/powerpc/platforms/44x/bamboo.c | 61 +
arch/powerpc/platforms/44x/ebony.c | 5
arch/powerpc/platforms/44x/sequoia.c | 61 +
arch/powerpc/platforms/4xx/Makefile | 1
arch/powerpc/platforms/52xx/Kconfig | 2
arch/powerpc/platforms/52xx/Makefile | 3
arch/powerpc/platforms/52xx/efika.c | 13
arch/powerpc/platforms/52xx/lite5200.c | 28
arch/powerpc/platforms/52xx/lite5200_pm.c | 213 +++
arch/powerpc/platforms/52xx/lite5200_sleep.S | 412 ++++++
arch/powerpc/platforms/52xx/mpc52xx_pic.c | 11
arch/powerpc/platforms/82xx/Kconfig | 24
arch/powerpc/platforms/82xx/Makefile | 6
arch/powerpc/platforms/82xx/m82xx_pci.h | 2
arch/powerpc/platforms/82xx/mpc8272_ads.c | 196 +++
arch/powerpc/platforms/82xx/mpc82xx.c | 110 -
arch/powerpc/platforms/82xx/mpc82xx_ads.c | 641 ---------
arch/powerpc/platforms/82xx/pq2.c | 82 +
arch/powerpc/platforms/82xx/pq2.h | 20
arch/powerpc/platforms/82xx/pq2ads-pci-pic.c | 195 +++
arch/powerpc/platforms/82xx/pq2ads.h | 9
arch/powerpc/platforms/82xx/pq2fads.c | 198 +++
arch/powerpc/platforms/83xx/mpc8313_rdb.c | 4
arch/powerpc/platforms/83xx/mpc832x_mds.c | 6
arch/powerpc/platforms/83xx/mpc832x_rdb.c | 52 +
arch/powerpc/platforms/83xx/mpc834x_itx.c | 5
arch/powerpc/platforms/83xx/mpc834x_mds.c | 5
arch/powerpc/platforms/83xx/mpc836x_mds.c | 6
arch/powerpc/platforms/83xx/mpc83xx.h | 2
arch/powerpc/platforms/83xx/pci.c | 7
arch/powerpc/platforms/85xx/Kconfig | 10
arch/powerpc/platforms/85xx/Makefile | 3
arch/powerpc/platforms/85xx/misc.c | 55 -
arch/powerpc/platforms/85xx/mpc85xx.h | 17
arch/powerpc/platforms/85xx/mpc85xx_ads.c | 19
arch/powerpc/platforms/85xx/mpc85xx_cds.c | 37
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 86 +
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 54 -
arch/powerpc/platforms/86xx/Kconfig | 13
arch/powerpc/platforms/86xx/Makefile | 1
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 216 +++
arch/powerpc/platforms/86xx/mpc8641_hpcn.h | 21
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 37
arch/powerpc/platforms/8xx/Kconfig | 28
arch/powerpc/platforms/8xx/Makefile | 1
arch/powerpc/platforms/8xx/ep88xc.c | 176 ++
arch/powerpc/platforms/8xx/m8xx_setup.c | 154 +-
arch/powerpc/platforms/8xx/mpc86xads.h | 4
arch/powerpc/platforms/8xx/mpc86xads_setup.c | 25
arch/powerpc/platforms/8xx/mpc885ads.h | 42 -
arch/powerpc/platforms/8xx/mpc885ads_setup.c | 472 ++----
arch/powerpc/platforms/Kconfig | 32
arch/powerpc/platforms/Kconfig.cputype | 14
arch/powerpc/platforms/Makefile | 2
arch/powerpc/platforms/cell/Makefile | 4
arch/powerpc/platforms/cell/axon_msi.c | 35
arch/powerpc/platforms/cell/cbe_cpufreq.c | 2
.../powerpc/platforms/cell/cbe_cpufreq_pervasive.c | 2
arch/powerpc/platforms/cell/cbe_cpufreq_pmi.c | 2
arch/powerpc/platforms/cell/cbe_regs.c | 3
arch/powerpc/platforms/cell/cbe_thermal.c | 2
arch/powerpc/platforms/cell/interrupt.c | 4
arch/powerpc/platforms/cell/iommu.c | 2
arch/powerpc/platforms/cell/pervasive.c | 2
arch/powerpc/platforms/cell/pmu.c | 2
arch/powerpc/platforms/cell/ras.c | 2
arch/powerpc/platforms/cell/setup.c | 17
arch/powerpc/platforms/cell/spider-pic.c | 22
arch/powerpc/platforms/cell/spu_base.c | 2
arch/powerpc/platforms/cell/spu_callbacks.c | 4
arch/powerpc/platforms/cell/spu_coredump.c | 79 -
arch/powerpc/platforms/cell/spu_manage.c | 4
arch/powerpc/platforms/cell/spu_syscalls.c | 142 +-
arch/powerpc/platforms/cell/spufs/coredump.c | 236 ++-
arch/powerpc/platforms/cell/spufs/file.c | 251 +--
arch/powerpc/platforms/cell/spufs/inode.c | 15
arch/powerpc/platforms/cell/spufs/run.c | 4
arch/powerpc/platforms/cell/spufs/sched.c | 49 -
arch/powerpc/platforms/cell/spufs/spufs.h | 7
arch/powerpc/platforms/cell/spufs/switch.c | 29
arch/powerpc/platforms/cell/spufs/syscalls.c | 48 -
arch/powerpc/platforms/celleb/Kconfig | 1
arch/powerpc/platforms/celleb/Makefile | 5
arch/powerpc/platforms/celleb/beat.c | 106 +
arch/powerpc/platforms/celleb/beat.h | 2
arch/powerpc/platforms/celleb/beat_syscall.h | 4
arch/powerpc/platforms/celleb/beat_wrapper.h | 68 +
arch/powerpc/platforms/celleb/htab.c | 130 ++
arch/powerpc/platforms/celleb/interrupt.c | 9
arch/powerpc/platforms/celleb/io-workarounds.c | 279 ++++
arch/powerpc/platforms/celleb/pci.c | 98 +
arch/powerpc/platforms/celleb/pci.h | 9
arch/powerpc/platforms/celleb/scc.h | 2
arch/powerpc/platforms/celleb/scc_epci.c | 88 +
arch/powerpc/platforms/celleb/scc_sio.c | 56 -
arch/powerpc/platforms/celleb/setup.c | 27
arch/powerpc/platforms/chrp/gg2.h | 61 +
arch/powerpc/platforms/chrp/pci.c | 39 -
arch/powerpc/platforms/chrp/setup.c | 13
arch/powerpc/platforms/chrp/smp.c | 2
arch/powerpc/platforms/embedded6xx/Kconfig | 12
arch/powerpc/platforms/embedded6xx/holly.c | 14
arch/powerpc/platforms/embedded6xx/linkstation.c | 8
arch/powerpc/platforms/embedded6xx/ls_uart.c | 18
arch/powerpc/platforms/embedded6xx/mpc10x.h | 180 ++
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | 5
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h | 21
arch/powerpc/platforms/embedded6xx/prpmc2800.c | 8
arch/powerpc/platforms/iseries/Makefile | 3
arch/powerpc/platforms/iseries/dt.c | 17
arch/powerpc/platforms/iseries/exception.S | 251 +++
arch/powerpc/platforms/iseries/exception.h | 58 +
arch/powerpc/platforms/iseries/iommu.c | 52 +
arch/powerpc/platforms/iseries/irq.c | 10
arch/powerpc/platforms/iseries/it_lp_naca.h | 2
arch/powerpc/platforms/iseries/mf.c | 23
arch/powerpc/platforms/iseries/setup.c | 7
arch/powerpc/platforms/iseries/vio.c | 553 +++++++
arch/powerpc/platforms/iseries/viopath.c | 8
arch/powerpc/platforms/maple/pci.c | 21
arch/powerpc/platforms/pasemi/Kconfig | 1
arch/powerpc/platforms/pasemi/gpio_mdio.c | 4
arch/powerpc/platforms/pasemi/idle.c | 8
arch/powerpc/platforms/pasemi/iommu.c | 4
arch/powerpc/platforms/pasemi/pasemi.h | 4
arch/powerpc/platforms/pasemi/pci.c | 74 +
arch/powerpc/platforms/pasemi/setup.c | 134 ++
arch/powerpc/platforms/powermac/bootx_init.c | 1
arch/powerpc/platforms/powermac/low_i2c.c | 1
arch/powerpc/platforms/powermac/pci.c | 25
arch/powerpc/platforms/powermac/pic.c | 2
arch/powerpc/platforms/powermac/pmac.h | 4
arch/powerpc/platforms/powermac/setup.c | 77 -
arch/powerpc/platforms/powermac/udbg_adb.c | 5
arch/powerpc/platforms/ps3/device-init.c | 24
arch/powerpc/platforms/ps3/interrupt.c | 9
arch/powerpc/platforms/ps3/os-area.c | 646 ++++++++-
arch/powerpc/platforms/ps3/platform.h | 10
arch/powerpc/platforms/ps3/setup.c | 3
arch/powerpc/platforms/ps3/time.c | 14
arch/powerpc/platforms/pseries/eeh.c | 54 -
arch/powerpc/platforms/pseries/eeh_cache.c | 9
arch/powerpc/platforms/pseries/hotplug-cpu.c | 14
arch/powerpc/platforms/pseries/lpar.c | 1
arch/powerpc/platforms/pseries/msi.c | 35
arch/powerpc/platforms/pseries/rtasd.c | 99 +
arch/powerpc/platforms/pseries/setup.c | 5
arch/powerpc/platforms/pseries/xics.c | 2
arch/powerpc/sysdev/Makefile | 10
arch/powerpc/sysdev/axonram.c | 8
arch/powerpc/sysdev/commproc.c | 299 +++-
arch/powerpc/sysdev/commproc.h | 12
arch/powerpc/sysdev/cpm2_common.c | 178 ++
arch/powerpc/sysdev/cpm2_pic.c | 13
arch/powerpc/sysdev/cpm_common.c | 205 +++
arch/powerpc/sysdev/dart_iommu.c | 4
arch/powerpc/sysdev/dcr.c | 6
arch/powerpc/sysdev/fsl_pci.c | 7
arch/powerpc/sysdev/fsl_soc.c | 187 ++-
arch/powerpc/sysdev/fsl_soc.h | 8
arch/powerpc/sysdev/i8259.c | 8
arch/powerpc/sysdev/indirect_pci.c | 4
arch/powerpc/sysdev/ipic.c | 7
arch/powerpc/sysdev/ipic.h | 3
arch/powerpc/sysdev/mpc8xx_pic.c | 30
arch/powerpc/sysdev/mpic.c | 53 -
arch/powerpc/sysdev/mpic.h | 1
arch/powerpc/sysdev/mpic_msi.c | 13
arch/powerpc/sysdev/mpic_u3msi.c | 36
arch/powerpc/sysdev/mv64x60.h | 1
arch/powerpc/sysdev/mv64x60_pic.c | 12
arch/powerpc/sysdev/mv64x60_udbg.c | 152 ++
arch/powerpc/sysdev/pmi.c | 6
arch/powerpc/sysdev/qe_lib/qe.c | 36
arch/powerpc/sysdev/qe_lib/qe_ic.c | 38 -
arch/powerpc/sysdev/qe_lib/qe_ic.h | 3
arch/powerpc/sysdev/qe_lib/qe_io.c | 38 -
arch/powerpc/sysdev/qe_lib/ucc.c | 270 ++--
arch/powerpc/sysdev/qe_lib/ucc_fast.c | 127 +-
arch/powerpc/sysdev/qe_lib/ucc_slow.c | 48 -
arch/powerpc/sysdev/timer.c | 81 -
arch/powerpc/sysdev/tsi108_pci.c | 16
arch/powerpc/sysdev/uic.c | 75 +
arch/powerpc/sysdev/xilinx_intc.c | 151 ++
arch/ppc/.gitignore | 2
arch/ppc/8xx_io/enet.c | 1
arch/ppc/Kconfig | 154 --
arch/ppc/Makefile | 1
arch/ppc/amiga/Makefile | 8
arch/ppc/amiga/amiga_ksyms.c | 1
arch/ppc/amiga/amiints.c | 322 ----
arch/ppc/amiga/amisound.c | 1
arch/ppc/amiga/bootinfo.c | 78 -
arch/ppc/amiga/chipram.c | 1
arch/ppc/amiga/cia.c | 176 --
arch/ppc/amiga/config.c | 953 -------------
arch/ppc/amiga/ints.c | 158 --
arch/ppc/amiga/pcmcia.c | 1
arch/ppc/amiga/time.c | 57 -
arch/ppc/boot/simple/embed_config.c | 8
arch/ppc/boot/simple/misc-embedded.c | 4
arch/ppc/boot/simple/uartlite_tty.c | 8
arch/ppc/configs/apus_defconfig | 920 ------------
arch/ppc/kernel/head.S | 117 --
arch/ppc/kernel/head_44x.S | 10
arch/ppc/kernel/ppc_ksyms.c | 3
arch/ppc/kernel/setup.c | 1
arch/ppc/kernel/vmlinux.lds.S | 2
arch/ppc/mm/pgtable.c | 38 -
arch/ppc/platforms/Makefile | 4
arch/ppc/platforms/apus_pci.c | 207 ---
arch/ppc/platforms/apus_pci.h | 34
arch/ppc/platforms/apus_setup.c | 798 -----------
arch/ppc/platforms/ev64360.c | 3
arch/ppc/platforms/katana.c | 3
arch/ppc/syslib/ocp.c | 2
arch/ppc/syslib/virtex_devices.h | 8
drivers/block/viodasd.c | 77 -
drivers/cdrom/viocd.c | 128 --
drivers/char/hvc_beat.c | 4
drivers/char/ipmi/ipmi_si_intf.c | 6
drivers/char/viotape.c | 125 --
drivers/macintosh/adb-iop.c | 1
drivers/macintosh/adbhid.c | 21
drivers/macintosh/ans-lcd.c | 3
drivers/macintosh/ans-lcd.h | 0
drivers/macintosh/therm_adt746x.c | 5
drivers/macintosh/via-pmu.c | 2
drivers/macintosh/windfarm_smu_sat.c | 2
drivers/misc/hdpuftrs/hdpu_cpustate.c | 107 +
drivers/misc/hdpuftrs/hdpu_nexus.c | 88 +
drivers/mtd/maps/Kconfig | 2
drivers/mtd/maps/physmap_of.c | 349 +++--
drivers/net/ucc_geth.c | 2
drivers/net/ucc_geth.h | 1
drivers/net/ucc_geth_mii.c | 1
drivers/serial/Kconfig | 25
drivers/serial/cpm_uart/cpm_uart.h | 48 -
drivers/serial/cpm_uart/cpm_uart_core.c | 539 +++++--
drivers/serial/cpm_uart/cpm_uart_cpm1.c | 18
drivers/serial/cpm_uart/cpm_uart_cpm1.h | 16
drivers/serial/cpm_uart/cpm_uart_cpm2.c | 24
drivers/serial/cpm_uart/cpm_uart_cpm2.h | 16
drivers/serial/mpc52xx_uart.c | 2
drivers/serial/pmac_zilog.c | 22
drivers/serial/uartlite.c | 286 +++-
drivers/video/platinumfb.c | 48 -
drivers/video/xilinxfb.c | 2
fs/binfmt_elf.c | 14
include/asm-powerpc/8xx_immap.h | 564 ++++++++
include/asm-powerpc/atomic.h | 34
include/asm-powerpc/cell-regs.h | 48 +
include/asm-powerpc/clk_interface.h | 20
include/asm-powerpc/commproc.h | 755 ++++++++++
include/asm-powerpc/cpm.h | 14
include/asm-powerpc/cpm2.h | 1270 +++++++++++++++++
include/asm-powerpc/cputable.h | 37
include/asm-powerpc/dcr-mmio.h | 6
include/asm-powerpc/dcr-native.h | 6
include/asm-powerpc/dma-mapping.h | 24
include/asm-powerpc/elf.h | 9
include/asm-powerpc/exception.h | 311 ++++
include/asm-powerpc/fs_pd.h | 38 -
include/asm-powerpc/highmem.h | 135 ++
include/asm-powerpc/hydra.h | 102 +
include/asm-powerpc/ide.h | 2
include/asm-powerpc/immap_86xx.h | 219 ++-
include/asm-powerpc/immap_cpm2.h | 650 +++++++++
include/asm-powerpc/immap_qe.h | 35
include/asm-powerpc/io.h | 28
include/asm-powerpc/irq.h | 8
include/asm-powerpc/iseries/hv_call_event.h | 10
include/asm-powerpc/iseries/iommu.h | 4
include/asm-powerpc/iseries/lpar_map.h | 3
include/asm-powerpc/iseries/vio.h | 116 +-
include/asm-powerpc/kgdb.h | 57 +
include/asm-powerpc/lmb.h | 6
include/asm-powerpc/machdep.h | 2
include/asm-powerpc/mmu-40x.h | 65 +
include/asm-powerpc/mmu-hash64.h | 1
include/asm-powerpc/mmu.h | 3
include/asm-powerpc/mpc52xx.h | 10
include/asm-powerpc/mpc52xx_psc.h | 191 +++
include/asm-powerpc/mpic.h | 13
include/asm-powerpc/nvram.h | 6
include/asm-powerpc/paca.h | 11
include/asm-powerpc/page_64.h | 9
include/asm-powerpc/percpu.h | 2
include/asm-powerpc/pgtable-4k.h | 2
include/asm-powerpc/pgtable-64k.h | 2
include/asm-powerpc/ppc_asm.h | 18
include/asm-powerpc/processor.h | 4
include/asm-powerpc/prom.h | 3
include/asm-powerpc/ps3.h | 9
include/asm-powerpc/qe.h | 246 ++-
include/asm-powerpc/qe_ic.h | 68 +
include/asm-powerpc/reg.h | 52 -
include/asm-powerpc/rwsem.h | 4
include/asm-powerpc/smp.h | 2
include/asm-powerpc/spu.h | 28
include/asm-powerpc/system.h | 3
include/asm-powerpc/time.h | 3
include/asm-powerpc/tlb.h | 2
include/asm-powerpc/types.h | 2
include/asm-powerpc/ucc.h | 40 -
include/asm-powerpc/ucc_slow.h | 9
include/asm-powerpc/udbg.h | 1
include/asm-powerpc/vio.h | 6
include/asm-powerpc/xilinx_intc.h | 20
include/asm-ppc/amigahw.h | 16
include/asm-ppc/amigaints.h | 133 --
include/asm-ppc/amigappc.h | 85 -
include/asm-ppc/bootinfo.h | 5
include/asm-ppc/io.h | 51 -
include/asm-ppc/machdep.h | 4
include/asm-ppc/ocp.h | 2
include/asm-ppc/page.h | 44 -
include/asm-ppc/pgtable.h | 8
include/asm-ppc/prom.h | 1
include/linux/elf.h | 14
include/linux/of.h | 1
include/linux/pci_ids.h | 3
include/linux/xilinxfb.h | 23
lib/Kconfig.debug | 2
506 files changed, 28847 insertions(+), 12688 deletions(-)
delete mode 100644 arch/powerpc/boot/44x.c
create mode 100644 arch/powerpc/boot/4xx.c
create mode 100644 arch/powerpc/boot/4xx.h
create mode 100644 arch/powerpc/boot/bamboo.c
create mode 100644 arch/powerpc/boot/cpm-serial.c
create mode 100644 arch/powerpc/boot/cuboot-52xx.c
create mode 100644 arch/powerpc/boot/cuboot-8xx.c
create mode 100644 arch/powerpc/boot/cuboot-bamboo.c
create mode 100644 arch/powerpc/boot/cuboot-hpc2.c
create mode 100644 arch/powerpc/boot/cuboot-pq2.c
create mode 100644 arch/powerpc/boot/cuboot-sequoia.c
create mode 100644 arch/powerpc/boot/dts/bamboo.dts
create mode 100644 arch/powerpc/boot/dts/ep88xc.dts
create mode 100644 arch/powerpc/boot/dts/mpc8572ds.dts
create mode 100644 arch/powerpc/boot/dts/mpc8610_hpcd.dts
create mode 100644 arch/powerpc/boot/dts/pq2fads.dts
create mode 100644 arch/powerpc/boot/dts/sequoia.dts
create mode 100644 arch/powerpc/boot/dts/walnut.dts
create mode 100644 arch/powerpc/boot/ep88xc.c
create mode 100644 arch/powerpc/boot/fixed-head.S
create mode 100644 arch/powerpc/boot/fsl-soc.c
create mode 100644 arch/powerpc/boot/fsl-soc.h
create mode 100644 arch/powerpc/boot/mpc52xx-psc.c
create mode 100644 arch/powerpc/boot/mpc8xx.c
create mode 100644 arch/powerpc/boot/mpc8xx.h
create mode 100644 arch/powerpc/boot/planetcore.c
create mode 100644 arch/powerpc/boot/planetcore.h
create mode 100644 arch/powerpc/boot/pq2.c
create mode 100644 arch/powerpc/boot/pq2.h
create mode 100644 arch/powerpc/boot/stdlib.c
create mode 100644 arch/powerpc/boot/stdlib.h
create mode 100644 arch/powerpc/boot/treeboot-bamboo.c
create mode 100644 arch/powerpc/boot/treeboot-walnut.c
create mode 100644 arch/powerpc/boot/uartlite.c
create mode 100644 arch/powerpc/configs/bamboo_defconfig
create mode 100644 arch/powerpc/configs/ep88xc_defconfig
create mode 100644 arch/powerpc/configs/mpc8572_ds_defconfig
create mode 100644 arch/powerpc/configs/mpc8610_hpcd_defconfig
create mode 100644 arch/powerpc/configs/pq2fads_defconfig
create mode 100644 arch/powerpc/configs/sequoia_defconfig
create mode 100644 arch/powerpc/configs/walnut_defconfig
create mode 100644 arch/powerpc/kernel/clock.c
create mode 100644 arch/powerpc/kernel/cpu_setup_44x.S
rename arch/powerpc/kernel/{head_4xx.S => head_40x.S} (98%)
delete mode 100644 arch/powerpc/kernel/lparmap.c
create mode 100644 arch/powerpc/kernel/softemu8xx.c
create mode 100644 arch/powerpc/lib/alloc.c
rename arch/powerpc/mm/{4xx_mmu.c => 40x_mmu.c} (96%)
rename arch/powerpc/platforms/{4xx/Kconfig => 40x/Kconfig} (58%)
create mode 100644 arch/powerpc/platforms/40x/Makefile
create mode 100644 arch/powerpc/platforms/40x/virtex.c
create mode 100644 arch/powerpc/platforms/40x/walnut.c
create mode 100644 arch/powerpc/platforms/44x/bamboo.c
create mode 100644 arch/powerpc/platforms/44x/sequoia.c
delete mode 100644 arch/powerpc/platforms/4xx/Makefile
create mode 100644 arch/powerpc/platforms/52xx/lite5200_pm.c
create mode 100644 arch/powerpc/platforms/52xx/lite5200_sleep.S
create mode 100644 arch/powerpc/platforms/82xx/mpc8272_ads.c
delete mode 100644 arch/powerpc/platforms/82xx/mpc82xx.c
delete mode 100644 arch/powerpc/platforms/82xx/mpc82xx_ads.c
create mode 100644 arch/powerpc/platforms/82xx/pq2.c
create mode 100644 arch/powerpc/platforms/82xx/pq2.h
create mode 100644 arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
create mode 100644 arch/powerpc/platforms/82xx/pq2fads.c
delete mode 100644 arch/powerpc/platforms/85xx/misc.c
delete mode 100644 arch/powerpc/platforms/85xx/mpc85xx.h
rename arch/powerpc/platforms/85xx/{mpc8544_ds.c => mpc85xx_ds.c} (66%)
create mode 100644 arch/powerpc/platforms/86xx/mpc8610_hpcd.c
delete mode 100644 arch/powerpc/platforms/86xx/mpc8641_hpcn.h
create mode 100644 arch/powerpc/platforms/8xx/ep88xc.c
delete mode 100644 arch/powerpc/platforms/cell/spu_coredump.c
create mode 100644 arch/powerpc/platforms/celleb/io-workarounds.c
create mode 100644 arch/powerpc/platforms/chrp/gg2.h
create mode 100644 arch/powerpc/platforms/embedded6xx/mpc10x.h
delete mode 100644 arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.h
create mode 100644 arch/powerpc/platforms/iseries/exception.S
create mode 100644 arch/powerpc/platforms/iseries/exception.h
create mode 100644 arch/powerpc/platforms/iseries/vio.c
create mode 100644 arch/powerpc/sysdev/commproc.h
create mode 100644 arch/powerpc/sysdev/cpm_common.c
create mode 100644 arch/powerpc/sysdev/mv64x60_udbg.c
delete mode 100644 arch/powerpc/sysdev/timer.c
create mode 100644 arch/powerpc/sysdev/xilinx_intc.c
delete mode 100644 arch/ppc/amiga/Makefile
delete mode 100644 arch/ppc/amiga/amiga_ksyms.c
delete mode 100644 arch/ppc/amiga/amiints.c
delete mode 100644 arch/ppc/amiga/amisound.c
delete mode 100644 arch/ppc/amiga/bootinfo.c
delete mode 100644 arch/ppc/amiga/chipram.c
delete mode 100644 arch/ppc/amiga/cia.c
delete mode 100644 arch/ppc/amiga/config.c
delete mode 100644 arch/ppc/amiga/ints.c
delete mode 100644 arch/ppc/amiga/pcmcia.c
delete mode 100644 arch/ppc/amiga/time.c
delete mode 100644 arch/ppc/configs/apus_defconfig
delete mode 100644 arch/ppc/platforms/apus_pci.c
delete mode 100644 arch/ppc/platforms/apus_pci.h
delete mode 100644 arch/ppc/platforms/apus_setup.c
rename include/asm-ppc/ans-lcd.h => drivers/macintosh/ans-lcd.h (100%)
create mode 100644 include/asm-powerpc/8xx_immap.h
rename arch/powerpc/platforms/cell/cbe_regs.h => include/asm-powerpc/cell-regs.h (76%)
create mode 100644 include/asm-powerpc/clk_interface.h
create mode 100644 include/asm-powerpc/commproc.h
create mode 100644 include/asm-powerpc/cpm.h
create mode 100644 include/asm-powerpc/cpm2.h
create mode 100644 include/asm-powerpc/exception.h
create mode 100644 include/asm-powerpc/highmem.h
create mode 100644 include/asm-powerpc/hydra.h
create mode 100644 include/asm-powerpc/immap_cpm2.h
create mode 100644 include/asm-powerpc/kgdb.h
create mode 100644 include/asm-powerpc/mmu-40x.h
create mode 100644 include/asm-powerpc/mpc52xx_psc.h
create mode 100644 include/asm-powerpc/xilinx_intc.h
delete mode 100644 include/asm-ppc/amigahw.h
delete mode 100644 include/asm-ppc/amigaints.h
delete mode 100644 include/asm-ppc/amigappc.h
create mode 100644 include/linux/xilinxfb.h
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