* [PATCH v3 2/9] ipic: add new interrupts introduced by new chip
From: Li Yang @ 2007-10-12 13:28 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
In-Reply-To: <1192195728-24189-2-git-send-email-leoli@freescale.com>
These interrupts are introduced by the latest Freescale SoC such as
MPC837x. The patch also adds comment to interrupts.
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/sysdev/ipic.c | 224 ++++++++++++++++++++++++++++++++++----------
arch/powerpc/sysdev/ipic.h | 7 +-
include/asm-powerpc/ipic.h | 12 ++-
3 files changed, 186 insertions(+), 57 deletions(-)
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 05a56e5..cd8590d 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -33,7 +33,31 @@ static struct ipic * primary_ipic;
static DEFINE_SPINLOCK(ipic_lock);
static struct ipic_info ipic_info[] = {
- [9] = {
+ [1] = { /* PEX1 CNT */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_C,
+ .force = IPIC_SIFCR_H,
+ .bit = 16,
+ .prio_mask = 0,
+ },
+ [2] = { /* PEX2 CNT */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_C,
+ .force = IPIC_SIFCR_H,
+ .bit = 17,
+ .prio_mask = 1,
+ },
+ [4] = { /* MSIR1 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_C,
+ .force = IPIC_SIFCR_H,
+ .bit = 19,
+ .prio_mask = 3,
+ },
+ [9] = { /* UART1 */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
@@ -41,7 +65,7 @@ static struct ipic_info ipic_info[] = {
.bit = 24,
.prio_mask = 0,
},
- [10] = {
+ [10] = { /* UART2 */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
@@ -49,7 +73,7 @@ static struct ipic_info ipic_info[] = {
.bit = 25,
.prio_mask = 1,
},
- [11] = {
+ [11] = { /* SEC */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
@@ -57,7 +81,23 @@ static struct ipic_info ipic_info[] = {
.bit = 26,
.prio_mask = 2,
},
- [14] = {
+ [12] = { /* eTSEC1 1588 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_D,
+ .force = IPIC_SIFCR_H,
+ .bit = 27,
+ .prio_mask = 3,
+ },
+ [13] = { /* eTSEC2 1588 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_D,
+ .force = IPIC_SIFCR_H,
+ .bit = 28,
+ .prio_mask = 4,
+ },
+ [14] = { /* I2C1 */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
@@ -65,7 +105,7 @@ static struct ipic_info ipic_info[] = {
.bit = 29,
.prio_mask = 5,
},
- [15] = {
+ [15] = { /* I2C2 */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
@@ -73,7 +113,7 @@ static struct ipic_info ipic_info[] = {
.bit = 30,
.prio_mask = 6,
},
- [16] = {
+ [16] = { /* SPI */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_D,
@@ -81,7 +121,7 @@ static struct ipic_info ipic_info[] = {
.bit = 31,
.prio_mask = 7,
},
- [17] = {
+ [17] = { /* IRQ1 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
@@ -89,7 +129,7 @@ static struct ipic_info ipic_info[] = {
.bit = 1,
.prio_mask = 5,
},
- [18] = {
+ [18] = { /* IRQ2 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
@@ -97,7 +137,7 @@ static struct ipic_info ipic_info[] = {
.bit = 2,
.prio_mask = 6,
},
- [19] = {
+ [19] = { /* IRQ3 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
@@ -105,7 +145,7 @@ static struct ipic_info ipic_info[] = {
.bit = 3,
.prio_mask = 7,
},
- [20] = {
+ [20] = { /* IRQ4 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_B,
@@ -113,7 +153,7 @@ static struct ipic_info ipic_info[] = {
.bit = 4,
.prio_mask = 4,
},
- [21] = {
+ [21] = { /* IRQ5 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_B,
@@ -121,7 +161,7 @@ static struct ipic_info ipic_info[] = {
.bit = 5,
.prio_mask = 5,
},
- [22] = {
+ [22] = { /* IRQ 6 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_B,
@@ -129,7 +169,7 @@ static struct ipic_info ipic_info[] = {
.bit = 6,
.prio_mask = 6,
},
- [23] = {
+ [23] = { /* IRQ7 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_B,
@@ -137,7 +177,7 @@ static struct ipic_info ipic_info[] = {
.bit = 7,
.prio_mask = 7,
},
- [32] = {
+ [32] = { /* TSEC1 Tx/QE High */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -145,7 +185,7 @@ static struct ipic_info ipic_info[] = {
.bit = 0,
.prio_mask = 0,
},
- [33] = {
+ [33] = { /* TSEC1 Rx/QE Low */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -153,7 +193,7 @@ static struct ipic_info ipic_info[] = {
.bit = 1,
.prio_mask = 1,
},
- [34] = {
+ [34] = { /* TSEC1 Err */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -161,7 +201,7 @@ static struct ipic_info ipic_info[] = {
.bit = 2,
.prio_mask = 2,
},
- [35] = {
+ [35] = { /* TSEC2 Tx */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -169,7 +209,7 @@ static struct ipic_info ipic_info[] = {
.bit = 3,
.prio_mask = 3,
},
- [36] = {
+ [36] = { /* TSEC2 Rx */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -177,7 +217,7 @@ static struct ipic_info ipic_info[] = {
.bit = 4,
.prio_mask = 4,
},
- [37] = {
+ [37] = { /* TSEC2 Err */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -185,7 +225,7 @@ static struct ipic_info ipic_info[] = {
.bit = 5,
.prio_mask = 5,
},
- [38] = {
+ [38] = { /* USB DR */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -193,7 +233,7 @@ static struct ipic_info ipic_info[] = {
.bit = 6,
.prio_mask = 6,
},
- [39] = {
+ [39] = { /* USB MPH */
.pend = IPIC_SIPNR_H,
.mask = IPIC_SIMSR_H,
.prio = IPIC_SIPRR_A,
@@ -201,7 +241,47 @@ static struct ipic_info ipic_info[] = {
.bit = 7,
.prio_mask = 7,
},
- [48] = {
+ [42] = { /* eSDHC */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 10,
+ .prio_mask = 2,
+ },
+ [44] = { /* SATA1 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 12,
+ .prio_mask = 4,
+ },
+ [45] = { /* SATA2 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 13,
+ .prio_mask = 5,
+ },
+ [46] = { /* SATA3 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 14,
+ .prio_mask = 6,
+ },
+ [47] = { /* SATA4 */
+ .pend = IPIC_SIPNR_H,
+ .mask = IPIC_SIMSR_H,
+ .prio = IPIC_SIPRR_B,
+ .force = IPIC_SIFCR_H,
+ .bit = 15,
+ .prio_mask = 7,
+ },
+ [48] = { /* IRQ0 */
.pend = IPIC_SEPNR,
.mask = IPIC_SEMSR,
.prio = IPIC_SMPRR_A,
@@ -209,7 +289,7 @@ static struct ipic_info ipic_info[] = {
.bit = 0,
.prio_mask = 4,
},
- [64] = {
+ [64] = { /* RTC SEC */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_A,
@@ -217,7 +297,7 @@ static struct ipic_info ipic_info[] = {
.bit = 0,
.prio_mask = 0,
},
- [65] = {
+ [65] = { /* PIT */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_A,
@@ -225,7 +305,7 @@ static struct ipic_info ipic_info[] = {
.bit = 1,
.prio_mask = 1,
},
- [66] = {
+ [66] = { /* PCI */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_A,
@@ -233,7 +313,7 @@ static struct ipic_info ipic_info[] = {
.bit = 2,
.prio_mask = 2,
},
- [67] = {
+ [67] = { /* MSIR0 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_A,
@@ -241,7 +321,7 @@ static struct ipic_info ipic_info[] = {
.bit = 3,
.prio_mask = 3,
},
- [68] = {
+ [68] = { /* RTC ALR */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_B,
@@ -249,7 +329,7 @@ static struct ipic_info ipic_info[] = {
.bit = 4,
.prio_mask = 0,
},
- [69] = {
+ [69] = { /* MU */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_B,
@@ -257,7 +337,7 @@ static struct ipic_info ipic_info[] = {
.bit = 5,
.prio_mask = 1,
},
- [70] = {
+ [70] = { /* SBA */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_B,
@@ -265,7 +345,7 @@ static struct ipic_info ipic_info[] = {
.bit = 6,
.prio_mask = 2,
},
- [71] = {
+ [71] = { /* DMA */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = IPIC_SMPRR_B,
@@ -273,91 +353,133 @@ static struct ipic_info ipic_info[] = {
.bit = 7,
.prio_mask = 3,
},
- [72] = {
+ [72] = { /* GTM4 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 8,
},
- [73] = {
+ [73] = { /* GTM8 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 9,
},
- [74] = {
+ [74] = { /* GPIO1/QE Ports */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 10,
},
- [75] = {
+ [75] = { /* GPIO2/SDDR */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 11,
},
- [76] = {
+ [76] = { /* DDR */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 12,
},
- [77] = {
+ [77] = { /* LBC */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 13,
},
- [78] = {
+ [78] = { /* GTM2 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 14,
},
- [79] = {
+ [79] = { /* GTM6 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 15,
},
- [80] = {
+ [80] = { /* PMC */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 16,
},
- [84] = {
+ [81] = { /* MSIR2 */
+ .pend = IPIC_SIPNR_L,
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 17,
+ },
+ [82] = { /* MSIR3 */
+ .pend = IPIC_SIPNR_L,
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 18,
+ },
+ [84] = { /* GTM3 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 20,
},
- [85] = {
+ [85] = { /* GTM7 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 21,
},
- [90] = {
+ [86] = { /* MSIR4 */
+ .pend = IPIC_SIPNR_L,
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 22,
+ },
+ [87] = { /* MSIR5 */
+ .pend = IPIC_SIPNR_L,
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 23,
+ },
+ [88] = { /* MSIR6 */
+ .pend = IPIC_SIPNR_L,
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 24,
+ },
+ [89] = { /* MSIR7 */
+ .pend = IPIC_SIPNR_L,
+ .mask = IPIC_SIMSR_L,
+ .prio = 0,
+ .force = IPIC_SIFCR_L,
+ .bit = 25,
+ },
+ [90] = { /* GTM1 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
.force = IPIC_SIFCR_L,
.bit = 26,
},
- [91] = {
+ [91] = { /* GTM5 */
.pend = IPIC_SIPNR_L,
.mask = IPIC_SIMSR_L,
.prio = 0,
@@ -593,6 +715,10 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
* configure SICFR accordingly */
if (flags & IPIC_SPREADMODE_GRP_A)
temp |= SICFR_IPSA;
+ if (flags & IPIC_SPREADMODE_GRP_B)
+ temp |= SICFR_IPSB;
+ if (flags & IPIC_SPREADMODE_GRP_C)
+ temp |= SICFR_IPSC;
if (flags & IPIC_SPREADMODE_GRP_D)
temp |= SICFR_IPSD;
if (flags & IPIC_SPREADMODE_MIX_A)
@@ -600,7 +726,7 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
if (flags & IPIC_SPREADMODE_MIX_B)
temp |= SICFR_MPSB;
- ipic_write(ipic->regs, IPIC_SICNR, temp);
+ ipic_write(ipic->regs, IPIC_SICFR, temp);
/* handle MCP route */
temp = 0;
@@ -672,10 +798,12 @@ void ipic_set_highest_priority(unsigned int virq)
void ipic_set_default_priority(void)
{
- ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_SIPRR_A_DEFAULT);
- ipic_write(primary_ipic->regs, IPIC_SIPRR_D, IPIC_SIPRR_D_DEFAULT);
- ipic_write(primary_ipic->regs, IPIC_SMPRR_A, IPIC_SMPRR_A_DEFAULT);
- ipic_write(primary_ipic->regs, IPIC_SMPRR_B, IPIC_SMPRR_B_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SIPRR_A, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SIPRR_B, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SIPRR_C, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SIPRR_D, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SMPRR_A, IPIC_PRIORITY_DEFAULT);
+ ipic_write(primary_ipic->regs, IPIC_SMPRR_B, IPIC_PRIORITY_DEFAULT);
}
void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq)
diff --git a/arch/powerpc/sysdev/ipic.h b/arch/powerpc/sysdev/ipic.h
index bb309a5..1158b8f 100644
--- a/arch/powerpc/sysdev/ipic.h
+++ b/arch/powerpc/sysdev/ipic.h
@@ -23,13 +23,12 @@
#define IPIC_IRQ_EXT7 23
/* Default Priority Registers */
-#define IPIC_SIPRR_A_DEFAULT 0x05309770
-#define IPIC_SIPRR_D_DEFAULT 0x05309770
-#define IPIC_SMPRR_A_DEFAULT 0x05309770
-#define IPIC_SMPRR_B_DEFAULT 0x05309770
+#define IPIC_PRIORITY_DEFAULT 0x05309770
/* System Global Interrupt Configuration Register */
#define SICFR_IPSA 0x00010000
+#define SICFR_IPSB 0x00020000
+#define SICFR_IPSC 0x00040000
#define SICFR_IPSD 0x00080000
#define SICFR_MPSA 0x00200000
#define SICFR_MPSB 0x00400000
diff --git a/include/asm-powerpc/ipic.h b/include/asm-powerpc/ipic.h
index edec79d..8ff08be 100644
--- a/include/asm-powerpc/ipic.h
+++ b/include/asm-powerpc/ipic.h
@@ -20,11 +20,13 @@
/* Flags when we init the IPIC */
#define IPIC_SPREADMODE_GRP_A 0x00000001
-#define IPIC_SPREADMODE_GRP_D 0x00000002
-#define IPIC_SPREADMODE_MIX_A 0x00000004
-#define IPIC_SPREADMODE_MIX_B 0x00000008
-#define IPIC_DISABLE_MCP_OUT 0x00000010
-#define IPIC_IRQ0_MCP 0x00000020
+#define IPIC_SPREADMODE_GRP_B 0x00000002
+#define IPIC_SPREADMODE_GRP_C 0x00000004
+#define IPIC_SPREADMODE_GRP_D 0x00000008
+#define IPIC_SPREADMODE_MIX_A 0x00000010
+#define IPIC_SPREADMODE_MIX_B 0x00000020
+#define IPIC_DISABLE_MCP_OUT 0x00000040
+#define IPIC_IRQ0_MCP 0x00000080
/* IPIC registers offsets */
#define IPIC_SICFR 0x00 /* System Global Interrupt Configuration Register */
--
1.5.3.2.104.g41ef
^ permalink raw reply related
* [PATCH v3 1/9] add e300c4 entry to cputable
From: Li Yang @ 2007-10-12 13:28 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
In-Reply-To: <1192195728-24189-1-git-send-email-leoli@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/kernel/cputable.c | 13 ++++++++++++-
1 files changed, 12 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index d3fb7d0..03b973f 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -888,7 +888,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
.cpu_setup = __setup_cpu_603,
.platform = "ppc603",
},
- { /* e300c3 on 83xx */
+ { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
.pvr_mask = 0x7fff0000,
.pvr_value = 0x00850000,
.cpu_name = "e300c3",
@@ -899,6 +899,17 @@ static struct cpu_spec __initdata cpu_specs[] = {
.cpu_setup = __setup_cpu_603,
.platform = "ppc603",
},
+ { /* e300c4 (e300c1, plus one IU) */
+ .pvr_mask = 0x7fff0000,
+ .pvr_value = 0x00860000,
+ .cpu_name = "e300c4",
+ .cpu_features = CPU_FTRS_E300,
+ .cpu_user_features = COMMON_USER,
+ .icache_bsize = 32,
+ .dcache_bsize = 32,
+ .cpu_setup = __setup_cpu_603,
+ .platform = "ppc603",
+ },
{ /* default match, we assume split I/D cache & TB (non-601)... */
.pvr_mask = 0x00000000,
.pvr_value = 0x00000000,
--
1.5.3.2.104.g41ef
^ permalink raw reply related
* [PATCH v3 0/9] Add MPC837x generic support and MPC837xE MDS support
From: Li Yang @ 2007-10-12 13:28 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
The patch series has been re-built to apply on the latest Linus' HEAD after
pulling Paul's for-2.6.24. All comments on list are addressed.
^ permalink raw reply
* Re: [PATCH] PowerPC: Add NEW EMAC driver support to 440EPx Sequoia board.
From: Valentine Barshak @ 2007-10-12 13:07 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20071012130305.GA14682@ru.mvista.com>
This one has to be applied on top of the previously submitted RGMII patch:
http://ozlabs.org/pipermail/linuxppc-dev/2007-October/043435.html
Josh, are these OK, since Paul has NEW EMAC driver in his tree now?
Thanks,
Valentine.
^ permalink raw reply
* [PATCH] NEW EMAC Fix RGMII build error: use of_device_is_compatible
From: Valentine Barshak @ 2007-10-12 13:04 UTC (permalink / raw)
To: linuxppc-dev; +Cc: netdev
Fix build RGMII error: use of_device_is_compatible()
insteadof now deprecated device_is_compatible() function.
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
---
drivers/net/ibm_newemac/rgmii.c | 2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
diff -pruN linux-2.6.orig/drivers/net/ibm_newemac/rgmii.c linux-2.6/drivers/net/ibm_newemac/rgmii.c
--- linux-2.6.orig/drivers/net/ibm_newemac/rgmii.c 2007-10-12 16:02:41.000000000 +0400
+++ linux-2.6/drivers/net/ibm_newemac/rgmii.c 2007-10-12 16:49:07.000000000 +0400
@@ -251,7 +251,7 @@ static int __devinit rgmii_probe(struct
}
/* Check for RGMII type */
- if (device_is_compatible(ofdev->node, "ibm,rgmii-axon"))
+ if (of_device_is_compatible(ofdev->node, "ibm,rgmii-axon"))
dev->type = RGMII_AXON;
else
dev->type = RGMII_STANDARD;
^ permalink raw reply
* [PATCH] PowerPC: Add NEW EMAC driver support to 440EPx Sequoia board.
From: Valentine Barshak @ 2007-10-12 13:03 UTC (permalink / raw)
To: linuxppc-dev
This patch enables NEW EMAC support for PowerPC 440EPx Sequoia board
and adds BCM5248 and Marvell 88E1111 PHY support to NEW EMAC driver.
These PHY chips are used on PowerPC440EPx boards.
The PHY code is based on the previous work by Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
---
arch/powerpc/platforms/44x/Kconfig | 7 ++----
drivers/net/ibm_newemac/phy.c | 39 +++++++++++++++++++++++++++++++++++++
2 files changed, 42 insertions(+), 4 deletions(-)
--- linux.orig/arch/powerpc/platforms/44x/Kconfig 2007-07-30 15:05:50.000000000 +0400
+++ linux/arch/powerpc/platforms/44x/Kconfig 2007-07-30 17:59:05.000000000 +0400
@@ -48,10 +48,9 @@
config 440EPX
bool
select PPC_FPU
-# Disabled until the new EMAC Driver is merged.
-# select IBM_NEW_EMAC_EMAC4
-# select IBM_NEW_EMAC_RGMII
-# select IBM_NEW_EMAC_ZMII
+ select IBM_NEW_EMAC_EMAC4
+ select IBM_NEW_EMAC_RGMII
+ select IBM_NEW_EMAC_ZMII
config 440GP
bool
--- linux.orig/drivers/net/ibm_newemac/phy.c 2007-06-15 21:45:18.000000000 +0400
+++ linux/drivers/net/ibm_newemac/phy.c 2007-06-15 20:45:15.000000000 +0400
@@ -306,8 +306,47 @@
.ops = &cis8201_phy_ops
};
+static struct mii_phy_def bcm5248_phy_def = {
+
+ .phy_id = 0x0143bc00,
+ .phy_id_mask = 0x0ffffff0,
+ .name = "BCM5248 10/100 SMII Ethernet",
+ .ops = &generic_phy_ops
+};
+
+static int m88e1111_init(struct mii_phy *phy)
+{
+ printk("%s: Marvell 88E1111 Ethernet\n", __FUNCTION__);
+ phy_write(phy, 0x14, 0x0ce3);
+ phy_write(phy, 0x18, 0x4101);
+ phy_write(phy, 0x09, 0x0e00);
+ phy_write(phy, 0x04, 0x01e1);
+ phy_write(phy, 0x00, 0x9140);
+ phy_write(phy, 0x00, 0x1140);
+
+ return 0;
+}
+
+static struct mii_phy_ops m88e1111_phy_ops = {
+ .init = m88e1111_init,
+ .setup_aneg = genmii_setup_aneg,
+ .setup_forced = genmii_setup_forced,
+ .poll_link = genmii_poll_link,
+ .read_link = genmii_read_link
+};
+
+static struct mii_phy_def m88e1111_phy_def = {
+
+ .phy_id = 0x01410CC0,
+ .phy_id_mask = 0x0ffffff0,
+ .name = "Marvell 88E1111 Ethernet",
+ .ops = &m88e1111_phy_ops,
+};
+
static struct mii_phy_def *mii_phy_table[] = {
&cis8201_phy_def,
+ &bcm5248_phy_def,
+ &m88e1111_phy_def,
&genmii_phy_def,
NULL
};
^ permalink raw reply
* Re: [PATCH] [POWERPC] Use PAGE_OFFSET to tell if an address is user/kernel in SW TLB handlers
From: Josh Boyer @ 2007-10-12 11:56 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20071012033032.GH21056@localhost.localdomain>
On Fri, 2007-10-12 at 13:30 +1000, David Gibson wrote:
> On Thu, Oct 11, 2007 at 01:42:30PM -0500, Kumar Gala wrote:
> > Move to using PAGE_OFFSET instead of TASK_SIZE or KERNELBASE value on
> > 6xx/40x/44x/fsl-booke to determine if the faulting address is a kernel or
> > user space address. This mimics how the macro is_kernel_addr()
> > works.
>
> Actually it's ambiguous whether TASK_SIZE or PAGE_OFFSET is correct in
> most of these cases (KERNELBASE is certainly wrong, though).
>
> TASK_SIZE is the top of the userspace mapped area, PAGE_OFFSET is the
> bottom of the linear mapping. So, strictly speaking there are 3 paths
> for the miss handlers: < TASK_SIZE => user mapping, >= PAGE_OFFSET =>
> kernel mapping, between the two => immediate fault.
>
> We get away with a two way comparison on 32-bit because, a) they have
> the same value and b) none of the pagetables, user or kernel, should
> have any entries in the in between region so we'll end up in
> do_page_fault in the end, anyway.
Kumar's other patch removes the gap. He changed the default
CONFIG_TASK_SIZE to 0xc0000000.
josh
^ permalink raw reply
* Re: [PATCH] PowerPC: Fix find_legacy_serial_ports on OPB.
From: Josh Boyer @ 2007-10-12 11:49 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev, Arnd Bergmann
In-Reply-To: <20071012023149.GA21056@localhost.localdomain>
On Fri, 2007-10-12 at 12:31 +1000, David Gibson wrote:
> On Thu, Oct 11, 2007 at 01:31:53PM -0500, Josh Boyer wrote:
> > On Thu, 2007-10-11 at 21:26 +0400, Valentine Barshak wrote:
> > > Josh Boyer wrote:
> > > > On Thu, 2007-10-11 at 17:50 +0200, Arnd Bergmann wrote:
> > > >> On Thursday 11 October 2007, Valentine Barshak wrote:
> > > >>> Currently find_legacy_serial_ports() can find no serial ports on the OPB.
> > > >>> Thus no legacy boot console can be initialized. Just the early udbg console
> > > >>> works, which is initialized with udbg_init_44x_as1() on the UART's physical
> > > >>> address specified in kernel config. This happens because we look for ns16750
> > > >>> and higher serial devices only and expect opb node to have a device type
> > > >>> property. This patch makes it look for ns16550 compatible devices and use
> > > >>> of_device_is_compatible() for opb instead of checking device type.
> > > >>> Lack of legacy serial ports found causes problems for KGDB over serial.
> > > >>>
> > > >>> Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
> > > >> The patch would make sense if we were only dealing with flattened device
> > > >> tree systems at this point. Unfortunately, IBM is shipping hardware that
> > > >> encodes the serial port in exactly the way that find_legacy_serial_ports
> > > >> is looking for (parent->type == "opb", compatible = "ns16750" "ns16550"
> > > >> "ns16450" i8250").
> > > >>
> > > >> Changing the search for ns16750 to ns16550 should be fine, but unnecessary
> > > >> because AFAIK, all OPB serial imlpementations are actually ns16750 and
> > > >> should have that in the device tree as well.
> > > >>
> > > >> For the device type of the bus, please check for both compatible and
> > > >> type, so that it still works on machines that are missing the compatible
> > > >> property.
> > > >
> > > > Wait, no. We already had this discussion months ago when David was
> > > > working on the original Ebony port. It was declared that legacy_serial
> > > > is not how serial should be done on 4xx and the serial_of driver was
> > > > supposed to be used instead.
> > > >
> > > > Have we changed our stance on that? If not, then perhaps KGDB should be
> > > > fixed to work with serial_of.
> > >
> > > Actually I don't see any reason not to use legacy_serial stuff for early
> > > console. We could split the kernel configured very early debug output,
> > > which uses PPC_EARLY_DEBUG_44x_PHYSLOW/PHYSHIGH (since it's really
> > > dangerous) and early console things by using legacy serial. We could use
> > > early boot console without PPC_EARLY_DEBUG_44x.
> >
> > That was exactly my thinking when this first came up. I'd like to hear
> > David's opinion on it.
>
> Yeah, I think I misinterpreted BenH way back when. This looks ok, and
> means serial will be initialized earlier than of_serial, which would
> be nice.
Great. It seems Paul pulled it into his tree already as well, which
suits me just fine.
josh
^ permalink raw reply
* RE: [PATCH 3/9 v2] add Freescale SerDes PHY support
From: Li Yang-r58472 @ 2007-10-12 11:39 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev, paulus
In-Reply-To: <20071011200938.GC4247@loki.buserror.net>
=20
> -----Original Message-----
> From: Wood Scott-B07421=20
> Sent: Friday, October 12, 2007 4:10 AM
> To: Li Yang-r58472
> Cc: galak@kernel.crashing.org; paulus@samba.org;=20
> linuxppc-dev@ozlabs.org
> Subject: Re: [PATCH 3/9 v2] add Freescale SerDes PHY support
>=20
> On Thu, Oct 11, 2007 at 05:53:45PM +0800, Li Yang wrote:
> > diff --git a/arch/powerpc/platforms/Kconfig=20
> > b/arch/powerpc/platforms/Kconfig index 19d4628..e89f803 100644
> > --- a/arch/powerpc/platforms/Kconfig
> > +++ b/arch/powerpc/platforms/Kconfig
> > @@ -291,4 +291,8 @@ config FSL_ULI1575
> > Freescale reference boards. The boards all use the=20
> ULI in pretty
> > much the same way.
> > =20
> > +config FSL_SERDES
> > + bool
> > + default n
>=20
> "default n" is the default -- no need to specify it explicitly.
>=20
> > + /* Configure SRDSCR1 */
> > + tmp =3D in_be32(regs + FSL_SRDSCR1_OFFS);
> > + tmp &=3D ~FSL_SRDSCR1_PLLBW;
> > + out_be32(regs + FSL_SRDSCR1_OFFS, tmp);
>=20
> clrbits32?
>=20
> > + /* Configure SRDSCR2 */
> > + tmp =3D in_be32(regs + FSL_SRDSCR2_OFFS);
> > + tmp &=3D ~FSL_SRDSCR2_SEIC_MASK;
> > + tmp |=3D FSL_SRDSCR2_SEIC_SATA;
> > + out_be32(regs + FSL_SRDSCR2_OFFS, tmp);
>=20
> clrsetbits_be32?
Ok, I will try the up-to-the-minute arsenal. :)
- Leo
^ permalink raw reply
* [PATCH/RFT] powerpc: 64-bit irqtrace support
From: Johannes Berg @ 2007-10-11 12:10 UTC (permalink / raw)
To: linuxppc-dev list; +Cc: Paul Mackerras, Christoph Hellwig
In-Reply-To: <1184159028.6669.10.camel@johannes.berg>
This adds irqtrace support to 64-bit powerpc to enable lockdep.
Signed-off-by: Johannes Berg <johannes@sipsolutions.net>
---
Requires Christoph's stack trace patch to really enable lockdep.
This patch is updated against the current powerpc master branch, mostly
required because of the introduction of exception.h
I'd like see this tested on some other platforms (maybe iSeries, Cell)
to make sure it doesn't blow up there and also reviewed by someone more
familiar with the exception handling; maybe some of the calls don't need
to be wrapped this excessively.
I haven't succeeded in making it work on 32-bit yet, somebody else can
take that if they want to :)
arch/powerpc/Kconfig | 9 ++++
arch/powerpc/kernel/Makefile | 1
arch/powerpc/kernel/entry_64.S | 21 +++++++++
arch/powerpc/kernel/head_64.S | 37 +++++++++++++----
arch/powerpc/kernel/irq.c | 3 -
arch/powerpc/kernel/irqtrace.S | 87 ++++++++++++++++++++++++++++++++++++++++
arch/powerpc/kernel/ppc_ksyms.c | 4 -
arch/powerpc/kernel/setup_64.c | 6 ++
include/asm-powerpc/exception.h | 7 +--
include/asm-powerpc/hw_irq.h | 13 +++--
include/asm-powerpc/irqflags.h | 23 +++++-----
include/asm-powerpc/rwsem.h | 38 +++++++++++++----
include/asm-powerpc/spinlock.h | 1
13 files changed, 208 insertions(+), 42 deletions(-)
--- powerpc.orig/arch/powerpc/Kconfig 2007-10-11 13:35:59.034629802 +0200
+++ powerpc/arch/powerpc/Kconfig 2007-10-11 13:40:13.844629802 +0200
@@ -50,6 +50,15 @@ config STACKTRACE_SUPPORT
bool
default y
+config TRACE_IRQFLAGS_SUPPORT
+ bool
+ depends on PPC64
+ default y
+
+config LOCKDEP_SUPPORT
+ bool
+ default y
+
config RWSEM_GENERIC_SPINLOCK
bool
--- powerpc.orig/arch/powerpc/kernel/irq.c 2007-10-11 13:32:39.399629802 +0200
+++ powerpc/arch/powerpc/kernel/irq.c 2007-10-11 13:40:13.848629802 +0200
@@ -114,7 +114,7 @@ static inline void set_soft_enabled(unsi
: : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
}
-void local_irq_restore(unsigned long en)
+void raw_local_irq_restore(unsigned long en)
{
/*
* get_paca()->soft_enabled = en;
@@ -175,6 +175,7 @@ void local_irq_restore(unsigned long en)
__hard_irq_enable();
}
+EXPORT_SYMBOL(raw_local_irq_restore);
#endif /* CONFIG_PPC64 */
int show_interrupts(struct seq_file *p, void *v)
--- powerpc.orig/arch/powerpc/kernel/ppc_ksyms.c 2007-10-11 13:32:39.422629802 +0200
+++ powerpc/arch/powerpc/kernel/ppc_ksyms.c 2007-10-11 13:40:13.850629802 +0200
@@ -49,10 +49,6 @@
#include <asm/commproc.h>
#endif
-#ifdef CONFIG_PPC64
-EXPORT_SYMBOL(local_irq_restore);
-#endif
-
#ifdef CONFIG_PPC32
extern void transfer_to_handler(void);
extern void do_IRQ(struct pt_regs *regs);
--- powerpc.orig/include/asm-powerpc/hw_irq.h 2007-10-11 13:28:06.923629802 +0200
+++ powerpc/include/asm-powerpc/hw_irq.h 2007-10-11 13:40:13.853629802 +0200
@@ -27,7 +27,7 @@ static inline unsigned long local_get_fl
return flags;
}
-static inline unsigned long local_irq_disable(void)
+static inline unsigned long raw_local_irq_disable(void)
{
unsigned long flags, zero;
@@ -39,14 +39,15 @@ static inline unsigned long local_irq_di
return flags;
}
-extern void local_irq_restore(unsigned long);
+extern void raw_local_irq_restore(unsigned long);
extern void iseries_handle_interrupts(void);
-#define local_irq_enable() local_irq_restore(1)
-#define local_save_flags(flags) ((flags) = local_get_flags())
-#define local_irq_save(flags) ((flags) = local_irq_disable())
+#define raw_local_irq_enable() raw_local_irq_restore(1)
+#define raw_local_save_flags(flags) ((flags) = local_get_flags())
+#define raw_local_irq_save(flags) ((flags) = raw_local_irq_disable())
-#define irqs_disabled() (local_get_flags() == 0)
+#define raw_irqs_disabled() (local_get_flags() == 0)
+#define raw_irqs_disabled_flags(flags) ((flags) == 0)
#define __hard_irq_enable() __mtmsrd(mfmsr() | MSR_EE, 1)
#define __hard_irq_disable() __mtmsrd(mfmsr() & ~MSR_EE, 1)
--- powerpc.orig/include/asm-powerpc/irqflags.h 2007-10-11 13:28:06.943629802 +0200
+++ powerpc/include/asm-powerpc/irqflags.h 2007-10-11 13:40:13.856629802 +0200
@@ -2,30 +2,29 @@
* include/asm-powerpc/irqflags.h
*
* IRQ flags handling
- *
- * This file gets included from lowlevel asm headers too, to provide
- * wrapped versions of the local_irq_*() APIs, based on the
- * raw_local_irq_*() macros from the lowlevel headers.
*/
#ifndef _ASM_IRQFLAGS_H
#define _ASM_IRQFLAGS_H
+#ifndef __ASSEMBLY__
/*
* Get definitions for raw_local_save_flags(x), etc.
*/
#include <asm-powerpc/hw_irq.h>
+#else
+#ifdef CONFIG_TRACE_IRQFLAGS
/*
- * Do the CPU's IRQ-state tracing from assembly code. We call a
- * C function, so save all the C-clobbered registers:
+ * Most of the CPU's IRQ-state tracing is done from assembly code; we
+ * have to call a C function so call a wrapper that saves all the
+ * C-clobbered registers.
*/
-#ifdef CONFIG_TRACE_IRQFLAGS
-
-#error No support on PowerPC yet for CONFIG_TRACE_IRQFLAGS
-
+#define TRACE_ENABLE_INTS_WRAPPED bl .powerpc_trace_hardirqs_on
+#define TRACE_DISABLE_INTS_WRAPPED bl .powerpc_trace_hardirqs_off
#else
-# define TRACE_IRQS_ON
-# define TRACE_IRQS_OFF
+#define TRACE_ENABLE_INTS_WRAPPED
+#define TRACE_DISABLE_INTS_WRAPPED
+#endif
#endif
#endif
--- powerpc.orig/include/asm-powerpc/rwsem.h 2007-10-11 13:34:16.677629802 +0200
+++ powerpc/include/asm-powerpc/rwsem.h 2007-10-11 13:40:13.859629802 +0200
@@ -5,6 +5,10 @@
#error "Please don't include <asm/rwsem.h> directly, use <linux/rwsem.h> instead."
#endif
+#ifndef _LINUX_RWSEM_H
+#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
+#endif
+
#ifdef __KERNEL__
/*
@@ -32,11 +36,21 @@ struct rw_semaphore {
#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
spinlock_t wait_lock;
struct list_head wait_list;
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+ struct lockdep_map dep_map;
+#endif
};
+#ifdef CONFIG_DEBUG_LOCK_ALLOC
+# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
+#else
+# define __RWSEM_DEP_MAP_INIT(lockname)
+#endif
+
#define __RWSEM_INITIALIZER(name) \
{ RWSEM_UNLOCKED_VALUE, SPIN_LOCK_UNLOCKED, \
- LIST_HEAD_INIT((name).wait_list) }
+ LIST_HEAD_INIT((name).wait_list) \
+ __RWSEM_DEP_MAP_INIT(name) }
#define DECLARE_RWSEM(name) \
struct rw_semaphore name = __RWSEM_INITIALIZER(name)
@@ -46,12 +60,15 @@ extern struct rw_semaphore *rwsem_down_w
extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
-static inline void init_rwsem(struct rw_semaphore *sem)
-{
- sem->count = RWSEM_UNLOCKED_VALUE;
- spin_lock_init(&sem->wait_lock);
- INIT_LIST_HEAD(&sem->wait_list);
-}
+extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
+ struct lock_class_key *key);
+
+#define init_rwsem(sem) \
+ do { \
+ static struct lock_class_key __key; \
+ \
+ __init_rwsem((sem), #sem, &__key); \
+ } while (0)
/*
* lock for reading
@@ -78,7 +95,7 @@ static inline int __down_read_trylock(st
/*
* lock for writing
*/
-static inline void __down_write(struct rw_semaphore *sem)
+static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
{
int tmp;
@@ -88,6 +105,11 @@ static inline void __down_write(struct r
rwsem_down_write_failed(sem);
}
+static inline void __down_write(struct rw_semaphore *sem)
+{
+ __down_write_nested(sem, 0);
+}
+
static inline int __down_write_trylock(struct rw_semaphore *sem)
{
int tmp;
--- powerpc.orig/include/asm-powerpc/spinlock.h 2007-10-11 13:28:06.993629802 +0200
+++ powerpc/include/asm-powerpc/spinlock.h 2007-10-11 13:40:13.861629802 +0200
@@ -19,6 +19,7 @@
*
* (the type definitions are in asm/spinlock_types.h)
*/
+#include <linux/irqflags.h>
#ifdef CONFIG_PPC64
#include <asm/paca.h>
#include <asm/hvcall.h>
--- powerpc.orig/include/asm-powerpc/exception.h 2007-10-11 13:34:13.733629802 +0200
+++ powerpc/include/asm-powerpc/exception.h 2007-10-11 13:40:13.864629802 +0200
@@ -232,14 +232,15 @@ BEGIN_FW_FTR_SECTION; \
mfmsr r10; \
ori r10,r10,MSR_EE; \
mtmsrd r10,1; \
-END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
+END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES); \
+ TRACE_DISABLE_INTS_WRAPPED
#else
#define DISABLE_INTS \
li r11,0; \
stb r11,PACASOFTIRQEN(r13); \
- stb r11,PACAHARDIRQEN(r13)
-
+ stb r11,PACAHARDIRQEN(r13); \
+ TRACE_DISABLE_INTS_WRAPPED
#endif /* CONFIG_PPC_ISERIES */
#define ENABLE_INTS \
--- powerpc.orig/arch/powerpc/kernel/head_64.S 2007-10-11 13:32:39.357629802 +0200
+++ powerpc/arch/powerpc/kernel/head_64.S 2007-10-11 13:40:13.868629802 +0200
@@ -36,6 +36,7 @@
#include <asm/firmware.h>
#include <asm/page_64.h>
#include <asm/exception.h>
+#include <asm/irqflags.h>
#define DO_SOFT_DISABLE
@@ -450,24 +451,35 @@ bad_stack:
*/
fast_exc_return_irq: /* restores irq state too */
ld r3,SOFTE(r1)
- ld r12,_MSR(r1)
+#ifdef CONFIG_TRACE_IRQFLAGS
+ cmpdi r3,0
+ bne 1f
+ stb r3,PACASOFTIRQEN(r13) /* restore paca->soft_enabled */
+ bl .trace_hardirqs_off
+ b 2f
+1:
+ bl .trace_hardirqs_on
+ ld r3,SOFTE(r1)
+#endif
stb r3,PACASOFTIRQEN(r13) /* restore paca->soft_enabled */
+2:
+ ld r12,_MSR(r1)
rldicl r4,r12,49,63 /* get MSR_EE to LSB */
stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */
- b 1f
+ b 3f
.globl fast_exception_return
fast_exception_return:
ld r12,_MSR(r1)
-1: ld r11,_NIP(r1)
+3: ld r11,_NIP(r1)
andi. r3,r12,MSR_RI /* check if RI is set */
beq- unrecov_fer
#ifdef CONFIG_VIRT_CPU_ACCOUNTING
andi. r3,r12,MSR_PR
- beq 2f
+ beq 4f
ACCOUNT_CPU_USER_EXIT(r3, r4)
-2:
+4:
#endif
ld r3,_CCR(r1)
@@ -874,11 +886,22 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISER
/*
* hash_page couldn't handle it, set soft interrupt enable back
- * to what it was before the trap. Note that .local_irq_restore
+ * to what it was before the trap. Note that .raw_local_irq_restore
* handles any interrupts pending at this point.
*/
ld r3,SOFTE(r1)
- bl .local_irq_restore
+#ifdef CONFIG_TRACE_IRQFLAGS
+ cmpdi r3,0
+ bne 14f
+ bl .raw_local_irq_restore
+ bl .trace_hardirqs_off
+ b 15f
+14:
+ bl .trace_hardirqs_on
+ li r3,1
+#endif
+ bl .raw_local_irq_restore
+15:
b 11f
/* Here we have a page fault that hash_page can't handle. */
--- powerpc.orig/arch/powerpc/kernel/setup_64.c 2007-10-11 13:32:39.482629802 +0200
+++ powerpc/arch/powerpc/kernel/setup_64.c 2007-10-11 13:40:13.871629802 +0200
@@ -33,6 +33,7 @@
#include <linux/serial_8250.h>
#include <linux/bootmem.h>
#include <linux/pci.h>
+#include <linux/lockdep.h>
#include <asm/io.h>
#include <asm/kdump.h>
#include <asm/prom.h>
@@ -359,6 +360,11 @@ void __init setup_system(void)
&__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
/*
+ * start lockdep
+ */
+ lockdep_init();
+
+ /*
* Unflatten the device-tree passed by prom_init or kexec
*/
unflatten_device_tree();
--- powerpc.orig/arch/powerpc/kernel/entry_64.S 2007-10-11 13:32:39.347629802 +0200
+++ powerpc/arch/powerpc/kernel/entry_64.S 2007-10-11 13:40:13.875629802 +0200
@@ -29,6 +29,7 @@
#include <asm/cputable.h>
#include <asm/firmware.h>
#include <asm/bug.h>
+#include <asm/irqflags.h>
/*
* System calls.
@@ -88,6 +89,13 @@ system_call_common:
addi r9,r1,STACK_FRAME_OVERHEAD
ld r11,exception_marker@toc(r2)
std r11,-16(r9) /* "regshere" marker */
+#ifdef CONFIG_TRACE_IRQFLAGS
+ bl .trace_hardirqs_on
+ REST_GPR(0,r1)
+ REST_4GPRS(3,r1)
+ REST_2GPRS(7,r1)
+ addi r9,r1,STACK_FRAME_OVERHEAD
+#endif
li r10,1
stb r10,PACASOFTIRQEN(r13)
stb r10,PACAHARDIRQEN(r13)
@@ -494,8 +502,18 @@ BEGIN_FW_FTR_SECTION
4:
END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
#endif
+#ifdef CONFIG_TRACE_IRQFLAGS
+ cmpdi r5,0
+ bne 5f
stb r5,PACASOFTIRQEN(r13)
-
+ bl .trace_hardirqs_off
+ b 6f
+5:
+ bl .trace_hardirqs_on
+ li r5,1
+#endif
+ stb r5,PACASOFTIRQEN(r13)
+6:
/* extract EE bit and use it to restore paca->hard_enabled */
ld r3,_MSR(r1)
rldicl r4,r3,49,63 /* r0 = (r3 >> 15) & 1 */
@@ -562,6 +580,7 @@ do_work:
bne restore
/* here we are preempting the current task */
1:
+ TRACE_ENABLE_INTS_WRAPPED
li r0,1
stb r0,PACASOFTIRQEN(r13)
stb r0,PACAHARDIRQEN(r13)
--- powerpc.orig/arch/powerpc/kernel/Makefile 2007-10-11 13:35:59.037629802 +0200
+++ powerpc/arch/powerpc/kernel/Makefile 2007-10-11 13:40:13.877629802 +0200
@@ -66,6 +66,7 @@ obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_KPROBES) += kprobes.o
obj-$(CONFIG_PPC_UDBG_16550) += legacy_serial.o udbg_16550.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o
+obj-$(CONFIG_TRACE_IRQFLAGS) += irqtrace.o
pci64-$(CONFIG_PPC64) += pci_dn.o isa-bridge.o
obj-$(CONFIG_PCI) += pci_$(CONFIG_WORD_SIZE).o $(pci64-y) \
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ powerpc/arch/powerpc/kernel/irqtrace.S 2007-10-11 13:40:13.880629802 +0200
@@ -0,0 +1,87 @@
+/*
+ * helpers for irq-trace
+ *
+ * We invoke the hardirq trace functions from various inconvenient
+ * places; these helpers save all callee-saved registers.
+ *
+ * Copyright 2007 Johannes Berg <johannes@sipsolutions.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+
+#ifdef CONFIG_PPC64
+#define ST std
+#define STU stdu
+#define L ld
+#define WSZ 8
+#define FREE 32
+#else
+#error double-check please
+#define ST stw
+#define STU stwu
+#define L lwz
+#define WSZ 4
+#define FREE 16
+#endif
+
+#define STACKSPACE (FREE + 16*WSZ)
+#define SAVE(n) (FREE + n*WSZ)
+
+_GLOBAL(powerpc_trace_hardirqs_on)
+ ST r3, (SAVE(2)-STACKSPACE)(r1)
+ LOAD_REG_IMMEDIATE(r3, .trace_hardirqs_on)
+ b powerpc_trace_hardirqs
+
+_GLOBAL(powerpc_trace_hardirqs_off)
+ ST r3, (SAVE(2)-STACKSPACE)(r1)
+ LOAD_REG_IMMEDIATE(r3, .trace_hardirqs_off)
+
+powerpc_trace_hardirqs:
+ ST r0, (SAVE(0)-STACKSPACE)(r1)
+ mflr r0
+ ST r0, LRSAVE(r1)
+ STU r1, -STACKSPACE(r1)
+ mfctr r0
+ ST r0, SAVE(14)(r1)
+ mtctr r3
+ ST r2, SAVE(1)(r1)
+ ST r4, SAVE(3)(r1)
+ ST r5, SAVE(4)(r1)
+ ST r6, SAVE(5)(r1)
+ ST r7, SAVE(6)(r1)
+ ST r8, SAVE(7)(r1)
+ ST r9, SAVE(8)(r1)
+ ST r10, SAVE(9)(r1)
+ ST r11, SAVE(10)(r1)
+ ST r12, SAVE(11)(r1)
+ ST r13, SAVE(12)(r1)
+ mfcr r0
+ ST r0, SAVE(13)(r1)
+ bctrl
+ L r2, SAVE(1)(r1)
+ L r3, SAVE(2)(r1)
+ L r4, SAVE(3)(r1)
+ L r5, SAVE(4)(r1)
+ L r6, SAVE(5)(r1)
+ L r7, SAVE(6)(r1)
+ L r8, SAVE(7)(r1)
+ L r9, SAVE(8)(r1)
+ L r10, SAVE(9)(r1)
+ L r11, SAVE(10)(r1)
+ L r12, SAVE(11)(r1)
+ L r13, SAVE(12)(r1)
+ L r0, SAVE(13)(r1)
+ mtcr r0
+ L r0, SAVE(14)(r1)
+ mtctr r0
+ L r1, 0(r1)
+ L r0, LRSAVE(r1)
+ mtlr r0
+ L r0, (SAVE(0)-STACKSPACE)(r1)
+ blr
^ permalink raw reply
* Re: Set up device tree for PCI bus
From: Benjamin Herrenschmidt @ 2007-10-12 11:27 UTC (permalink / raw)
To: Hommel, Thomas (GE Indust, GE Fanuc); +Cc: linuxppc-dev
In-Reply-To: <62DDBB9E5E23CC4A929EE46F9427CEAF3682BB@BUDMLVEM04.e2k.ad.ge.com>
On Fri, 2007-10-12 at 12:48 +0200, Hommel, Thomas (GE Indust, GE Fanuc)
wrote:
> Hi all,
> I'm wondering how to set up a proper device tree for a PCI bus. The bus
> has a tree-like structure with several bridges and can be extended
> dynamically (by adding PMC/XMC modules).
.../...
> A problem is that the modules in the Expansion/PMC slot can contain more
> bridges and therefore the bus numbering isn't fixed. For example, if the
> PMC adds one more bus, #5 becomes #6 and #6 becomes #7.
> Can I assign fixed resources for all the bridge parts of the system?
ppc32 should cope with renumbering... though ppc64 will probably not.
What you can do perhaps is to assign wide bus ranges to your slots. For
example, slot 0 would provide bus 0x10...0x1f, slot 1 bus 0x20 to 0x2f
etc... You would thus only put the switch busses in the device-tree.
There is still a potential issue if you connect enough sub busses to
blow that range of 16 away but that's unlikely.
Such a solution would work for the time being. In the long run, I do
intend to make the kernel more flexible overall with bus renumbering vs.
OF tree.
^ permalink raw reply
* Set up device tree for PCI bus
From: Hommel, Thomas (GE Indust, GE Fanuc) @ 2007-10-12 10:48 UTC (permalink / raw)
To: linuxppc-dev
Hi all,
I'm wondering how to set up a proper device tree for a PCI bus. The bus
has a tree-like structure with several bridges and can be extended
dynamically (by adding PMC/XMC modules).
The structure looks like this:
----------------------
| MPC8641 |
| |
| BDF 0:0:0 |
----------------------
|
|Bus #1
|PCIe 8x
|
-----------------------------------------------
| PCIe switch | |
| ------------- |
| | BDF 1:0:0 | | =20
| ------------- |
| |Bus #2 |
| ----------------------------- |
| | | | |
| ----------- ------------ ----------- |
| |BDF 2:1:0| |BDF 2:2:0 | |BDF 2:3:0| |
| ----------- ------------ ----------- |
| |Bus #3 |Bus #5 |Bus #6 |
| |PCIe 4x |PCIe 2x |PCIe 2x |
-----------------------------------------------
| | |
----------- ------------ ----------- =20
|Bridge | |Expansion | |SATA | =20
|BDF 3:0:0| |Slot | |BDF 6:0:0| =20
----------- ------------ ----------- =20
|
|Bus #4
|PCI-X
----------------------
| |
------------ ------------=20
|VME Bridge| |PMC Slot | =20
|BDF 4:e:0 | |BDF 4:c:0 | =20
------------ ------------ =20
A problem is that the modules in the Expansion/PMC slot can contain more
bridges and therefore the bus numbering isn't fixed. For example, if the
PMC adds one more bus, #5 becomes #6 and #6 becomes #7.
Can I assign fixed resources for all the bridge parts of the system?
Thanks
Thomas
^ permalink raw reply
* linux-2.6.git: cannot build PS3 image
From: Geert Uytterhoeven @ 2007-10-12 9:56 UTC (permalink / raw)
To: Linux/PPC Development
[-- Attachment #1: Type: TEXT/PLAIN, Size: 1319 bytes --]
On current linux-2.6.git (782e3b3b3804c38d5130c7f21d7ec7bf6709023f), I get:
| WRAP arch/powerpc/boot/zImage.ps3
| DTC: dts->dtb on file "/usr/people/geert.nba/ps3/ps3-linux-2.6/arch/powerpc/boot/dts/ps3.dts"
| ln: accessing `arch/powerpc/boot/zImage.ps3': No such file or directory
`make V=1' gives:
| /bin/sh ps3-linux-2.6/arch/powerpc/boot/wrapper -c -o arch/powerpc/boot/zImage.ps3 -p ps3 -C "ppu-" -s ps3-linux-2.6/arch/powerpc/boot/dts/ps3.dts vmlinux
| DTC: dts->dtb on file "ps3-linux-2.6/arch/powerpc/boot/dts/ps3.dts"
| ln: accessing `arch/powerpc/boot/zImage.ps3': No such file or directory
I don't see a change to arch/powerpc/boot/Makefile that could explain this.
Anyone with a clue? Thx!
With kind regards,
Geert Uytterhoeven
Software Architect
Sony Network and Software Technology Center Europe
The Corporate Village · Da Vincilaan 7-D1 · B-1935 Zaventem · Belgium
Phone: +32 (0)2 700 8453
Fax: +32 (0)2 700 8622
E-mail: Geert.Uytterhoeven@sonycom.com
Internet: http://www.sony-europe.com/
Sony Network and Software Technology Center Europe
A division of Sony Service Centre (Europe) N.V.
Registered office: Technologielaan 7 · B-1840 Londerzeel · Belgium
VAT BE 0413.825.160 · RPR Brussels
Fortis Bank Zaventem · Swift GEBABEBB08A · IBAN BE39001382358619
^ permalink raw reply
* Re: nfs mounting problem
From: Abhijit Naik @ 2007-10-12 9:13 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <OF08754E94.1194DC2D-ON6525726C.0043EADB-6525726C.0044D6F4@lntemsys.com>
Hello Manjunath,
You open the ports of portmaper and nfs from firewall. Refer
http://www.linuxquestions.org/questions/linux-security-4/firewall-blocking-nfs-even-though-ports-are-open-294069/.
Hope you get your problem solved.
All teh best
Manjunath AM wrote:
>
> Hi,
>
> We are using MPC8272 based target board, we are trying to mount montavista
> Linux version 2.6.10 kernel image (with NFS enabled) to our target board,
> we are setting following bootargs in bootloader
>
> "setenv bootargs root=/dev/nfs
> nfsroot=192.168.178.110:/opt/montavista/pro/devkit/ppc/82xx/target
> ip=192.168.178.234:192.168.178.110:192.168.178.47:255.255.255.0:cashel:eth1:off"
>
> when we boot the board, it is not able to mount nfs file system to board,
> but the same image and configuration works with MPC8272ADS board.
> please suggest me, what could be the problem.
>
> Booting image at 00200000 ...
> Image Name: Linux-2.6.10_mvl401-8272ads
> Image Type: PowerPC Linux Kernel Image (gzip compressed)
> Data Size: 948607 Bytes = 926.4 kB
> Load Address: 00000000
> Entry Point: 00000000
> Verifying Checksum ... OK
> Uncompressing Kernel Image ... OK
> Linux version 2.6.10_mvl401-8272ads (root@em178110) (gcc version 3.4.3
> (MontaVista 3.4.3-25.0.70.050
> 1961 2005-12-18)) #2 Tue Jan 23 16:54:50 IST 2007
> Motorola PQ2 ADS PowerPC port
> Built 1 zonelists
> Kernel command line: root=/dev/nfs
> nfsroot=192.168.178.110:/opt/montavista/pro/devkit/ppc/82xx/targe
> t
> ip=192.168.178.234:192.168.178.110:192.168.178.47:255.255.255.0:cashel:eth1:off
> PID hash table entries: 128 (order: 7, 2048 bytes)
> hr_time_init: arch_to_nsec = 83886080, nsec_to_arch = 107374182
> Warning: real time clock seems stuck!
> Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
> Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
> Memory: 13952k available (1684k kernel code, 468k data, 100k init, 0k
> highmem)
> Mount-cache hash table entries: 512 (order: 0, 4096 bytes)
> spawn_desched_task(00000000)
> desched cpu_callback 3/00000000
> ksoftirqd started up.
> desched cpu_callback 2/00000000
> desched thread 0 started up.
> NET: Registered protocol family 16
> Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
> Initializing Cryptographic API
> Serial: CPM driver $Revision: 0.01 $
> ttyCPM0 at MMIO 0xf0011a00 (irq = 40) is a CPM UART
> ttyCPM1 at MMIO 0xf0011a60 (irq = 43) is a CPM UART
> io scheduler noop registered
> io scheduler anticipatory registered
> io scheduler deadline registered
> io scheduler cfq registered
> RAMDISK driver initialized: 16 RAM disks of 8192K size 1024 blocksize
> loop: loaded (max 8 devices)
> fs_enet.c:v1.0 (Aug 8, 2005)
> Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
> ide: Assuming 50MHz system bus speed for PIO modes; override with
> idebus=xx
> eth0: FCC ENET Version 0.3, 00:99:23:c4:ad:de
> eth1: FCC ENET Version 0.3, 00:99:23:44:ad:de
> eth2: FCC ENET Version 0.3, 00:99:23:64:ad:de
> NET: Registered protocol family 2
> IP: routing cache hash table of 512 buckets, 4Kbytes
> TCP: Hash tables configured (established 1024 bind 2048)
> NET: Registered protocol family 1
> NET: Registered protocol family 17
> IP-Config: Complete:
> device=eth1, addr=192.168.178.234, mask=255.255.255.0,
> gw=192.168.178.47,
> host=cashel, domain=, nis-domain=(none),
> bootserver=192.168.178.110, rootserver=192.168.178.110, rootpath=
> Looking up port of RPC 100003/2 on 192.168.178.110
> portmap: server 192.168.178.110 not responding, timed out
> Root-NFS: Unable to get nfsd port number from server, using default
> Looking up port of RPC 100005/1 on 192.168.178.110
> portmap: server 192.168.178.110 not responding, timed out
> Root-NFS: Unable to get mountd port number from server, using default
> mount: server 192.168.178.110 not responding, timed out
> Root-NFS: Server returned error -5 while mounting
> /opt/montavista/pro/devkit/ppc/82xx/target
> VFS: Unable to mount root fs via NFS, trying floppy.
> VFS: Cannot open root device "nfs" or unknown-block(2,0)
> Please append a correct "root=" boot option
> Kernel panic - not syncing: VFS: Unable to mount root fs on
> unknown-block(2,0)
> <0>Rebooting in 180 seconds..
>
> Thanks and awaiting for your valuable feedback
>
>
>
> Thanks & Regards
> MANJUNATH AM
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
:-)
--
View this message in context: http://www.nabble.com/nfs-mounting-problem-tf3063819.html#a13171747
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* Re: powerpc commits for 2.6.24
From: Stefan Roese @ 2007-10-12 8:41 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Mackerras
In-Reply-To: <1192140461.3061.11.camel@localhost.localdomain>
On Friday 12 October 2007, Josh Boyer wrote:
> I added Stefan's latest patch set to my tree as well. They look good.
Thanks Josh.
Best regards,
Stefan
^ permalink raw reply
* [PATCH] powerpc: Add 1TB workaround for PA6T
From: Olof Johansson @ 2007-10-12 6:49 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
PA6T has a bug where the slbie instruction does not honor the large
segment bit. As a result, we have to always use slbia when switching
context.
We don't have to worry about changing the slbie's during fault processing,
since they should never be replacing one VSID with another using the
same ESID. I.e. there's no risk for inserting duplicate entries due to a
failed slbie of the old entry. So as long as we clear it out on context
switch we should be fine.
Signed-off-by: Olof Johansson <olof@lixom.net>
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 09da90b..c78dc91 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -212,6 +212,7 @@ static int __init htab_dt_scan_seg_sizes(unsigned long node,
return 1;
}
}
+ cur_cpu_spec->cpu_features &= ~CPU_FTR_NO_SLBIE_B;
return 0;
}
diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
index 6c164ce..bbd2c51 100644
--- a/arch/powerpc/mm/slb.c
+++ b/arch/powerpc/mm/slb.c
@@ -157,7 +157,8 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
unsigned long stack = KSTK_ESP(tsk);
unsigned long unmapped_base;
- if (offset <= SLB_CACHE_ENTRIES) {
+ if (!cpu_has_feature(CPU_FTR_NO_SLBIE_B) &&
+ offset <= SLB_CACHE_ENTRIES) {
int i;
asm volatile("isync" : : : "memory");
for (i = 0; i < offset; i++) {
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index ae093ef..2ca0633 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -165,6 +165,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
#define CPU_FTR_SPURR LONG_ASM_CONST(0x0001000000000000)
#define CPU_FTR_DSCR LONG_ASM_CONST(0x0002000000000000)
#define CPU_FTR_1T_SEGMENT LONG_ASM_CONST(0x0004000000000000)
+#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000)
#ifndef __ASSEMBLY__
@@ -367,7 +368,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
- CPU_FTR_PURR | CPU_FTR_REAL_LE)
+ CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_NO_SLBIE_B)
#define CPU_FTRS_COMPATIBLE (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2)
@@ -375,7 +376,8 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start,
#define CPU_FTRS_POSSIBLE \
(CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 | \
CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 | \
- CPU_FTRS_CELL | CPU_FTRS_PA6T | CPU_FTR_1T_SEGMENT)
+ CPU_FTRS_CELL | CPU_FTRS_PA6T | CPU_FTR_1T_SEGMENT | \
+ CPU_FTR_NO_SLBIE_B)
#else
enum {
CPU_FTRS_POSSIBLE =
^ permalink raw reply related
* [PATCH] powerpc: Fix 1TB segment detection
From: Olof Johansson @ 2007-10-12 6:44 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
Buglet in the 1TB detection makes it return after checking the first
property word, even if it's not a match.
Signed-off-by: Olof Johansson <olof@lixom.net>
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 611ad08..09da90b 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -209,8 +209,8 @@ static int __init htab_dt_scan_seg_sizes(unsigned long node,
if (prop[0] == 40) {
DBG("1T segment support detected\n");
cur_cpu_spec->cpu_features |= CPU_FTR_1T_SEGMENT;
+ return 1;
}
- return 1;
}
return 0;
}
^ permalink raw reply related
* RE: Plz can anyone provide me link for downloading the mpc82xxpackage to configure the BDI2000
From: Leonid @ 2007-10-12 6:35 UTC (permalink / raw)
To: Pothina Satya Narayana, TLS,Chennai; +Cc: linuxppc-embedded
In-Reply-To: <20071012063223.398162486E@gemini.denx.de>
If you need configuration file and registers' definitions, look on
www.ultsol.com.=20
-----Original Message-----
From: linuxppc-embedded-bounces+leonid=3Da-k-a.net@ozlabs.org
[mailto:linuxppc-embedded-bounces+leonid=3Da-k-a.net@ozlabs.org] On =
Behalf
Of Wolfgang Denk
Sent: Thursday, October 11, 2007 11:32 PM
To: Pothina Satya Narayana, TLS,Chennai
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Plz can anyone provide me link for downloading the
mpc82xxpackage to configure the BDI2000
In message
<CE54F2377C0FB8439A290BF5A88BF13D06D22C09@CHN-HCLT-EVS01.HCLT.CORP.HCL.I
N> you wrote:
>=20
> In my current project I'm using BDI2000 to program and debug the
target
> board contains MPC8247.
>=20
> I struck up at initial stage itself. I don't have MPC82xx suitable
> package ( loader file to BDI2000 ).
If you mean the BDI2000 firmware: you cannot download this for free.
You must buy a license from your BDI2000 distributor or Abatron.
Best regards,
Wolfgang Denk
--=20
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
The IQ of the group is the lowest IQ of a member of the group divided
by the number of people in the group.
_______________________________________________
Linuxppc-embedded mailing list
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^ permalink raw reply
* Re: Plz can anyone provide me link for downloading the mpc82xx package to configure the BDI2000
From: Wolfgang Denk @ 2007-10-12 6:32 UTC (permalink / raw)
To: Pothina Satya Narayana, TLS,Chennai; +Cc: linuxppc-embedded
In-Reply-To: <CE54F2377C0FB8439A290BF5A88BF13D06D22C09@CHN-HCLT-EVS01.HCLT.CORP.HCL.IN>
In message <CE54F2377C0FB8439A290BF5A88BF13D06D22C09@CHN-HCLT-EVS01.HCLT.CORP.HCL.IN> you wrote:
>
> In my current project I'm using BDI2000 to program and debug the target
> board contains MPC8247.
>
> I struck up at initial stage itself. I don't have MPC82xx suitable
> package ( loader file to BDI2000 ).
If you mean the BDI2000 firmware: you cannot download this for free.
You must buy a license from your BDI2000 distributor or Abatron.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
The IQ of the group is the lowest IQ of a member of the group divided
by the number of people in the group.
^ permalink raw reply
* [PATCH] [POWERPC] Fix iSeries_hpte_insert prototype
From: Stephen Rothwell @ 2007-10-12 6:05 UTC (permalink / raw)
To: paulus; +Cc: ppc-dev
Commit 1189be6508d45183013ddb82b18f4934193de274 ([POWERPC] Use 1TB
segments) added an argument to hpte_insert.
Also make iSeries_hpte_insert static.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
arch/powerpc/platforms/iseries/htab.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
diff --git a/arch/powerpc/platforms/iseries/htab.c b/arch/powerpc/platforms/iseries/htab.c
index 15a7097..f99c6c4 100644
--- a/arch/powerpc/platforms/iseries/htab.c
+++ b/arch/powerpc/platforms/iseries/htab.c
@@ -39,9 +39,9 @@ static inline void iSeries_hunlock(unsigned long slot)
spin_unlock(&iSeries_hlocks[(slot >> 4) & 0x3f]);
}
-long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va,
+static long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va,
unsigned long pa, unsigned long rflags,
- unsigned long vflags, int psize)
+ unsigned long vflags, int psize, int ssize)
{
long slot;
struct hash_pte lhpte;
--
1.5.3.4
^ permalink raw reply related
* [PATCH] [POWERPC] Fix axonram bio_io_error and bio_endio calls
From: Stephen Rothwell @ 2007-10-12 6:03 UTC (permalink / raw)
To: paulus; +Cc: Maxim Shchetynin, Bergmann, Neil Brown, Jens, Axboe, ppc-dev,
Arnd
Commit 6712ecf8f648118c3363c142196418f89a510b90 (Drop 'size' argument
from bio_endio and bi_end_io) dropped the second argument.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
arch/powerpc/sysdev/axonram.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
I am not sure if this is all that is required, but it does build.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
diff --git a/arch/powerpc/sysdev/axonram.c b/arch/powerpc/sysdev/axonram.c
index 4d3ba63..5eaf3e3 100644
--- a/arch/powerpc/sysdev/axonram.c
+++ b/arch/powerpc/sysdev/axonram.c
@@ -117,7 +117,7 @@ axon_ram_make_request(struct request_queue *queue, struct bio *bio)
transfered = 0;
bio_for_each_segment(vec, bio, idx) {
if (unlikely(phys_mem + vec->bv_len > phys_end)) {
- bio_io_error(bio, bio->bi_size);
+ bio_io_error(bio);
rc = -ERANGE;
break;
}
@@ -131,7 +131,7 @@ axon_ram_make_request(struct request_queue *queue, struct bio *bio)
phys_mem += vec->bv_len;
transfered += vec->bv_len;
}
- bio_endio(bio, transfered, 0);
+ bio_endio(bio, 0);
return rc;
}
--
1.5.3.4
^ permalink raw reply related
* [PATCH 1/2] Lite5200 shouldn't mess with ROOT_DEV
From: Grant Likely @ 2007-10-12 6:01 UTC (permalink / raw)
To: paulus, linuxppc-dev
In-Reply-To: <20071012055826.9718.2510.stgit@trillian.cg.shawcable.net>
From: Grant Likely <grant.likely@secretlab.ca>
There is no good reason for board platform code to mess with the ROOT_DEV.
Remove it from all in-tree platforms except powermac
This is a follow on to commit 745e1027751acbc1f14f8bbef378b491242b9c83.
The original patch had this change to lite5200.c, but it got dropped in
the psycho madness that is the 2.6.24 merge window.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
arch/powerpc/platforms/52xx/lite5200.c | 12 ------------
1 files changed, 0 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/lite5200.c b/arch/powerpc/platforms/52xx/lite5200.c
index 0caa3d9..a0b4934 100644
--- a/arch/powerpc/platforms/52xx/lite5200.c
+++ b/arch/powerpc/platforms/52xx/lite5200.c
@@ -156,18 +156,6 @@ static void __init lite5200_setup_arch(void)
of_node_put(np);
}
#endif
-
-#ifdef CONFIG_BLK_DEV_INITRD
- if (initrd_start)
- ROOT_DEV = Root_RAM0;
- else
-#endif
-#ifdef CONFIG_ROOT_NFS
- ROOT_DEV = Root_NFS;
-#else
- ROOT_DEV = Root_HDA1;
-#endif
-
}
/*
^ permalink raw reply related
* [PATCH 2/2] XilinxFB: typo bugfix
From: Grant Likely @ 2007-10-12 6:01 UTC (permalink / raw)
To: paulus, linuxppc-dev
In-Reply-To: <20071012055826.9718.2510.stgit@trillian.cg.shawcable.net>
From: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
drivers/video/xilinxfb.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c
index 6ef99b2..e38d3b7 100644
--- a/drivers/video/xilinxfb.c
+++ b/drivers/video/xilinxfb.c
@@ -84,7 +84,7 @@ static struct xilinxfb_platform_data xilinx_fb_default_pdata = {
.xres = 640,
.yres = 480,
.xvirt = 1024,
- .yvirt = 480;
+ .yvirt = 480,
};
/*
^ permalink raw reply related
* [PATCH 0/2] Fixups to powerpc tree.
From: Grant Likely @ 2007-10-12 6:01 UTC (permalink / raw)
To: paulus, linuxppc-dev
Hi Paulus,
Here are 2 fixups to the powerpc tree. The first is a change to
lite5200.c that somehow got dropped from the ROOT_DEV patch. The
second is a simple typo fix to the xilinxfb driver. (I had noticed
the typo after posting the patch, but had thought in the back of my
mind that I'd get to spin another version before they got merged)
Cheers,
g.
--
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* [PATCH] missed bio_endio() in axonram
From: Al Viro @ 2007-10-12 6:00 UTC (permalink / raw)
To: Linus Torvalds; +Cc: axboe, linuxppc-dev, linux-kernel
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
---
diff --git a/arch/powerpc/sysdev/axonram.c b/arch/powerpc/sysdev/axonram.c
index ab037a3..46fd9c6 100644
--- a/arch/powerpc/sysdev/axonram.c
+++ b/arch/powerpc/sysdev/axonram.c
@@ -117,7 +117,7 @@ axon_ram_make_request(struct request_queue *queue, struct bio *bio)
transfered = 0;
bio_for_each_segment(vec, bio, idx) {
if (unlikely(phys_mem + vec->bv_len > phys_end)) {
- bio_io_error(bio, bio->bi_size);
+ bio_io_error(bio);
rc = -ERANGE;
break;
}
@@ -131,7 +131,7 @@ axon_ram_make_request(struct request_queue *queue, struct bio *bio)
phys_mem += vec->bv_len;
transfered += vec->bv_len;
}
- bio_endio(bio, transfered, 0);
+ bio_endio(bio, 0);
return rc;
}
^ permalink raw reply related
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