* Re: [PATCH] PowerPC: Add NEW EMAC driver support to 440EPx Sequoia board.
From: Josh Boyer @ 2007-10-15 17:26 UTC (permalink / raw)
To: Valentine Barshak; +Cc: linuxppc-dev
In-Reply-To: <20071012130305.GA14682@ru.mvista.com>
On Fri, 12 Oct 2007 17:03:05 +0400
Valentine Barshak <vbarshak@ru.mvista.com> wrote:
> This patch enables NEW EMAC support for PowerPC 440EPx Sequoia board
> and adds BCM5248 and Marvell 88E1111 PHY support to NEW EMAC driver.
> These PHY chips are used on PowerPC440EPx boards.
> The PHY code is based on the previous work by Stefan Roese <sr@denx.de>
Could you send the phy part to Jeff Garzik and the netdev list by
itself? That way it will get picked up and we'll update the Kconfig
with a later patch.
josh
^ permalink raw reply
* Re: mpc 860 boot linux2.6.23 problem
From: Scott Wood @ 2007-10-15 17:17 UTC (permalink / raw)
To: keng_629; +Cc: linuxppc-embedded@ozlabs.org
In-Reply-To: <200710151115352659084@126.com>
keng_629 wrote:
>
> i am proting linux2.63.23 to mpc860t board with uboot1.1.4 as bootloader.
> my bootargs is root=/dev/ram rw init=/linuxrc.
> i use debugger to see the regedits, find pc is run in the cpu_idle().
> what is wrong with my kernel, plese give me some advice.thank you .
Posting the same thing over and over again isn't going to change the
response. Try head-of-Linus's-git, make sure you're using arch/powerpc,
and post the device tree you're using. Without more information, we
can't help you.
-Scott
^ permalink raw reply
* Re: Refactor booting-without-of.txt
From: Grant Likely @ 2007-10-15 17:14 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev, microblaze-uclinux
In-Reply-To: <20071015165505.GA16040@lixom.net>
On 10/15/07, Olof Johansson <olof@lixom.net> wrote:
> On Mon, Oct 15, 2007 at 10:08:44AM -0600, Grant Likely wrote:
> > Adding the Linux expected device tree bindings to
> > booting-without-of.txt seems to be getting a little unwieldy. Plus
> > with more than one arch using the device tree (powerpc, sparc &
> > microblaze) the device tree bindings aren't necessarily powerpc only
> > (the Xilinx devices certainly fall in this category).
> >
> > Anyone have comments about splitting the expected device tree bindings
> > out of booting-without-of.txt into a separate directory?
>
> The flat device tree is, in spite of what some people would like it to be,
> not open firmware, nor is it the same as their bindings. So I think we'd
> be doing ourselves a disservice by continuing to associate them together.
> All it would take is a rename of the directory, unfortunately i don't
> have any suggestions on better names though.
I think I need to stick with the of prefix. All the support API in
include/linux/of_* is prefixed with "of_" already, so convention is
established.
How about Documentation/of-device-tree?
>
> > Perhaps something like this; each file contains common bindings for
> > the type of device and device specific properties:
> >
> > Documentation/of/
> > Documentation/of/README - Description of the purpose and layout of
> > this directory
> > Documentation/of/net.txt - network device bindings (eth, MDIO, phy, etc)
> > Documentation/of/serial.txt - serial device bindings
> > Documentation/of/misc.txt - anything that doesn't fit anywhere else yet.
> > Documentation/of/soc/* - System on chip stuff that doesn't fit will
> > into established device types; possibly a separate file for each chip.
> > Documentation/of/usb.txt - usb blah blah blah
> > Documentation/of/whatever - you get the picture.
> >
> > Thoughts?
>
> Looks reasonable. The other way to cut it would be to slice along vendor
> boundaries, but I think I like the functional partitioning you suggested
> better.
I think vendor partitioning makes sense for non-common devices that
don't easily fit into a particular mold (soc glue nodes come to mind).
Other than that, the functional partitioning
lets us start with defining common property usage for a given device
type and follow up with device specific properties.
Thanks for the feedback,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH 2/2] i2c: Add devtree-aware iic support for PPC4xx
From: Grant Likely @ 2007-10-15 16:57 UTC (permalink / raw)
To: Eugene Surovegin; +Cc: Jean Delvare, linuxppc-dev, Stefan Roese, i2c
In-Reply-To: <20071015163216.GA8127@gate.ebshome.net>
On 10/15/07, Eugene Surovegin <ebs@ebshome.net> wrote:
> On Mon, Oct 15, 2007 at 03:29:11PM +0200, Stefan Roese wrote:
>
> <snip>
>
> > +#ifdef CONFIG_PPC_MERGE
> > +static int device_idx = -1;
> > +#endif
> > +
>
> <snip>
>
> > + dev->idx = ++device_idx;
> > + adap->nr = dev->idx;
>
> Hmm, this doesn't look right. That mighty powerpc device everybody
> was so excited about for the last years doesn't provide a device
> instance number/index?
>
> I think this approach is wrong, because I want i2c bus numbers for the
> on-chip i2c to be fixed. This code makes it dependent on the order
> devices were described in the device tree; how do you handle a
> situation when only the second i2c adapter is connected? For OCP I
> would just remove ocp_def for the IIC0.
Segher is recommending that we use an aliases node as per the open
firmware example for this. I think in this case it would look
something like this (but I'm not the expert):
aliases {
IIC0 = "/path/to/bus/iic@0x2000";
IIC1 = "/path/to/bus/iic@0x2000";
};
Which seems to make sense to me. And it keeps it easy to have
multiple iic bus types sharing the same IIC bus number space (each
device does not try to maintain it's own little 'next index' value).
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* RE: Override timer interrupt
From: Rune Torgersen @ 2007-10-15 16:49 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev, linuxppc-embedded
In-Reply-To: <1192229894.22054.29.camel@pasglop>
> From: Benjamin Herrenschmidt
> In fact, I'm not sure what is your problem with the DEC=20
> proper as the TB
> will be used ultimately and thus it shouldn't drift more than the TB
> does. Can your part use an externally clocked TB ?
>=20
> If not, and you still have a drift despite calibration, you can always
> use NTP services to adjust timekeeping.
We use NTP, which is why I didn't see it until recently. (Happened to
have a board without NTP configured
The main couse is that our main bus frequency cannort be divided into
1kHz evently by the decrementer.
Main bus freq =3D 99532800 Hz.
Decrementer then becomes 24883, which gives us 999991.9624485600nsec per
jiffy.
That is not a number easilly converted into time without drift.
Changing HZ to 100 fixes it, but is for varous reasons not an option
right now.
What I did do is change the timer interrupt to be called by an ecxternal
1kHz interrupt source instead of the decrementer.
The TB register is only ued for offsets from the last jiffie, not as a
continous offset, so then it works out pretty good.
There is a discontinuity in the sub ms resolution of the clock that I
can live with. msec and up are dead accurate.
^ permalink raw reply
* Re: Refactor booting-without-of.txt
From: Olof Johansson @ 2007-10-15 16:55 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, microblaze-uclinux
In-Reply-To: <fa686aa40710150908o55d1f5d2t264cbb8ed800a12f@mail.gmail.com>
On Mon, Oct 15, 2007 at 10:08:44AM -0600, Grant Likely wrote:
> Adding the Linux expected device tree bindings to
> booting-without-of.txt seems to be getting a little unwieldy. Plus
> with more than one arch using the device tree (powerpc, sparc &
> microblaze) the device tree bindings aren't necessarily powerpc only
> (the Xilinx devices certainly fall in this category).
>
> Anyone have comments about splitting the expected device tree bindings
> out of booting-without-of.txt into a separate directory?
The flat device tree is, in spite of what some people would like it to be,
not open firmware, nor is it the same as their bindings. So I think we'd
be doing ourselves a disservice by continuing to associate them together.
All it would take is a rename of the directory, unfortunately i don't
have any suggestions on better names though.
> Perhaps something like this; each file contains common bindings for
> the type of device and device specific properties:
>
> Documentation/of/
> Documentation/of/README - Description of the purpose and layout of
> this directory
> Documentation/of/net.txt - network device bindings (eth, MDIO, phy, etc)
> Documentation/of/serial.txt - serial device bindings
> Documentation/of/misc.txt - anything that doesn't fit anywhere else yet.
> Documentation/of/soc/* - System on chip stuff that doesn't fit will
> into established device types; possibly a separate file for each chip.
> Documentation/of/usb.txt - usb blah blah blah
> Documentation/of/whatever - you get the picture.
>
> Thoughts?
Looks reasonable. The other way to cut it would be to slice along vendor
boundaries, but I think I like the functional partitioning you suggested
better.
-Olof
^ permalink raw reply
* Re: [PATCH 2/2] i2c: Add devtree-aware iic support for PPC4xx
From: Grant Likely @ 2007-10-15 16:46 UTC (permalink / raw)
To: Stefan Roese; +Cc: Jean Delvare, linuxppc-dev, i2c
In-Reply-To: <200710151529.11485.sr@denx.de>
On 10/15/07, Stefan Roese <sr@denx.de> wrote:
> This patch reworks existing ibm-iic driver to support of_platform_device
> and enables it to talk to device tree directly. The "old" OCP interface
> for arch/ppc is still supported via #ifdef's and shall be removed when
> arch/ppc is gone in a few months.
>
> This is done to enable I2C support for the PPC4xx platforms now
> being moved from arch/ppc (ocp) to arch/powerpc (of).
May I suggest another approach?
Take a look at driver/video/xilinxfb.c.
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=blob;f=drivers/video/xilinxfb.c;h=6ef99b2d13ca6f8a4809d5914cbab6309255b3e3;hb=287e5d6fcccfa38b953cebe307e1ddfd32363355
That driver supports both the platform bus and the of_platform bus.
(xilinxfb_of_probe and xilinxfb_platform_probe) and both functions
call a common setup routine (xilinxfb_assign; but I probably should
have named it xilinxfb_setup).
Rather than writing an entirely new probe function; I suggest
splitting the binding code from the initialization code. The binding
code translates from the device description (be that platform bus,
of_platform bus, ocp, whatever) to the values the driver needs. The
initialization code needs to do the same thing for both bus bindings,
and the bus binding code is only concerned with getting the
appropriate values from the device descripton.
It's a little bit more work to refactor the driver to follow this
mode, but it results in far less code which is easier to review and
understand. Plus the device description is incomplete, you can bail
out before you start allocating and mapping memory that needs to be
unwound.
Cheers,
g.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> ---
> drivers/i2c/busses/Kconfig | 2 +-
> drivers/i2c/busses/i2c-ibm_iic.c | 209 +++++++++++++++++++++++++++++++++++++-
> drivers/i2c/busses/i2c-ibm_iic.h | 2 +
> 3 files changed, 211 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> index de95c75..a47b5e6 100644
> --- a/drivers/i2c/busses/Kconfig
> +++ b/drivers/i2c/busses/Kconfig
> @@ -241,7 +241,7 @@ config I2C_PIIX4
>
> config I2C_IBM_IIC
> tristate "IBM PPC 4xx on-chip I2C interface"
> - depends on IBM_OCP
> + depends on 4xx
> help
> Say Y here if you want to use IIC peripheral found on
> embedded IBM PPC 4xx based systems.
> diff --git a/drivers/i2c/busses/i2c-ibm_iic.c b/drivers/i2c/busses/i2c-ibm_iic.c
> index 956b947..78c6bf4 100644
> --- a/drivers/i2c/busses/i2c-ibm_iic.c
> +++ b/drivers/i2c/busses/i2c-ibm_iic.c
> @@ -39,8 +39,13 @@
> #include <asm/io.h>
> #include <linux/i2c.h>
> #include <linux/i2c-id.h>
> +
> +#ifdef CONFIG_PPC_MERGE
> +#include <linux/of_platform.h>
> +#else
> #include <asm/ocp.h>
> #include <asm/ibm4xx.h>
> +#endif
>
> #include "i2c-ibm_iic.h"
>
> @@ -57,6 +62,10 @@ static int iic_force_fast;
> module_param(iic_force_fast, bool, 0);
> MODULE_PARM_DESC(iic_fast_poll, "Force fast mode (400 kHz)");
>
> +#ifdef CONFIG_PPC_MERGE
> +static int device_idx = -1;
> +#endif
> +
> #define DBG_LEVEL 0
>
> #ifdef DBG
> @@ -660,8 +669,205 @@ static inline u8 iic_clckdiv(unsigned int opb)
> /*
> * Register single IIC interface
> */
> -static int __devinit iic_probe(struct ocp_device *ocp){
>
> +#ifdef CONFIG_PPC_MERGE
> +/*
> + * device-tree (of) when used from arch/powerpc
> + */
> +static int __devinit iic_probe(struct of_device *ofdev,
> + const struct of_device_id *match)
> +{
> + struct ibm_iic_private* dev;
> + struct i2c_adapter* adap;
> + struct device_node *np;
> + int ret = -ENODEV;
> + int irq, len;
> + const u32 *prop;
> + struct resource res;
> +
> + np = ofdev->node;
> + if (!(dev = kzalloc(sizeof(*dev), GFP_KERNEL))) {
> + printk(KERN_CRIT "ibm-iic(%s): failed to allocate device data\n",
> + np->full_name);
> + return -ENOMEM;
> + }
> +
> + dev_set_drvdata(&ofdev->dev, dev);
> +
> + dev->np = np;
> + irq = irq_of_parse_and_map(np, 0);
> +
> + if (of_address_to_resource(np, 0, &res)) {
> + printk(KERN_ERR "ibd-iic(%s): Can't get registers address\n",
> + np->full_name);
> + goto fail1;
> + }
> + dev->paddr = res.start;
> +
> + if (!request_mem_region(dev->paddr, sizeof(struct iic_regs), "ibm_iic")) {
> + ret = -EBUSY;
> + goto fail1;
> + }
> + dev->vaddr = ioremap(dev->paddr, sizeof(struct iic_regs));
> +
> + if (dev->vaddr == NULL) {
> + printk(KERN_CRIT "ibm-iic(%s): failed to ioremap device regs\n",
> + dev->np->full_name);
> + ret = -ENXIO;
> + goto fail2;
> + }
> +
> + init_waitqueue_head(&dev->wq);
> +
> + dev->irq = iic_force_poll ? -1 : (irq == NO_IRQ) ? -1 : irq;
> + if (dev->irq >= 0){
> + /* Disable interrupts until we finish initialization,
> + * assumes level-sensitive IRQ setup...
> + */
> + iic_interrupt_mode(dev, 0);
> + if (request_irq(dev->irq, iic_handler, 0, "IBM IIC", dev)) {
> + printk(KERN_ERR "ibm-iic(%s): request_irq %d failed\n",
> + dev->np->full_name, dev->irq);
> + /* Fallback to the polling mode */
> + dev->irq = -1;
> + }
> + }
> +
> + if (dev->irq < 0)
> + printk(KERN_WARNING "ibm-iic(%s): using polling mode\n",
> + dev->np->full_name);
> +
> + /* Board specific settings */
> + prop = of_get_property(np, "iic-mode", &len);
> + /* use 400kHz only if stated in dts, 100kHz otherwise */
> + dev->fast_mode = (prop && (*prop == 400));
> + /* clckdiv is the same for *all* IIC interfaces,
> + * but I'd rather make a copy than introduce another global. --ebs
> + */
> + /* Parent bus should have frequency filled */
> + prop = of_get_property(of_get_parent(np), "clock-frequency", &len);
> + if (prop == NULL) {
> + printk(KERN_ERR
> + "ibm-iic(%s):no clock-frequency prop on parent bus!\n",
> + dev->np->full_name);
> + goto fail;
> + }
> +
> + dev->clckdiv = iic_clckdiv(*prop);
> + DBG("%s: clckdiv = %d\n", dev->np->full_name, dev->clckdiv);
> +
> + /* Initialize IIC interface */
> + iic_dev_init(dev);
> +
> + /* Register it with i2c layer */
> + adap = &dev->adap;
> + adap->dev.parent = &ofdev->dev;
> + strcpy(adap->name, "IBM IIC");
> + i2c_set_adapdata(adap, dev);
> + adap->id = I2C_HW_OCP;
> + adap->class = I2C_CLASS_HWMON;
> + adap->algo = &iic_algo;
> + adap->client_register = NULL;
> + adap->client_unregister = NULL;
> + adap->timeout = 1;
> + adap->retries = 1;
> +
> + dev->idx = ++device_idx;
> + adap->nr = dev->idx;
> + if ((ret = i2c_add_numbered_adapter(adap)) < 0) {
> + printk(KERN_CRIT"ibm-iic(%s): failed to register i2c adapter\n",
> + dev->np->full_name);
> + goto fail;
> + }
> +
> + printk(KERN_INFO "ibm-iic(%s): using %s mode\n", dev->np->full_name,
> + dev->fast_mode ?
> + "fast (400 kHz)" : "standard (100 kHz)");
> +
> + return 0;
> +
> +fail:
> + if (dev->irq >= 0){
> + iic_interrupt_mode(dev, 0);
> + free_irq(dev->irq, dev);
> + }
> +
> + iounmap(dev->vaddr);
> +fail2:
> + release_mem_region(dev->paddr, sizeof(struct iic_regs));
> +fail1:
> + dev_set_drvdata(&ofdev->dev, NULL);
> + kfree(dev);
> +
> + return ret;
> +}
> +
> +/*
> + * Cleanup initialized IIC interface
> + */
> +static int __devexit iic_remove(struct of_device *ofdev)
> +{
> + struct ibm_iic_private *dev =
> + (struct ibm_iic_private *)dev_get_drvdata(&ofdev->dev);
> + BUG_ON(dev == NULL);
> + if (i2c_del_adapter(&dev->adap)){
> + printk(KERN_CRIT "ibm-iic(%s): failed to delete i2c adapter\n",
> + dev->np->full_name);
> + /* That's *very* bad, just shutdown IRQ ... */
> + if (dev->irq >= 0){
> + iic_interrupt_mode(dev, 0);
> + free_irq(dev->irq, dev);
> + dev->irq = -1;
> + }
> + } else {
> + if (dev->irq >= 0){
> + iic_interrupt_mode(dev, 0);
> + free_irq(dev->irq, dev);
> + }
> + iounmap(dev->vaddr);
> + release_mem_region(dev->paddr, sizeof(struct iic_regs));
> + kfree(dev);
> + }
> + return 0;
> +}
> +
> +static struct of_device_id ibm_iic_match[] = {
> + {
> + .type = "i2c",
> + .compatible = "ibm,iic",
> + },
> + {},
> +};
> +
> +MODULE_DEVICE_TABLE(of, ibm_iic_match);
> +
> +static struct of_platform_driver ibm_iic_driver = {
> + .name = "ibm-iic",
> + .match_table = ibm_iic_match,
> + .probe = iic_probe,
> + .remove = iic_remove,
> +#if defined(CONFIG_PM)
> + .suspend = NULL,
> + .resume = NULL,
> +#endif
> +};
> +
> +static int __init iic_init(void)
> +{
> + printk(KERN_INFO "IBM IIC driver v" DRIVER_VERSION "\n");
> + return of_register_platform_driver(&ibm_iic_driver);
> +}
> +
> +static void __exit iic_exit(void)
> +{
> + of_unregister_platform_driver(&ibm_iic_driver);
> +}
> +#else
> +/*
> + * OCP when used from arch/ppc
> + */
> +static int __devinit iic_probe(struct ocp_device *ocp)
> +{
> struct ibm_iic_private* dev;
> struct i2c_adapter* adap;
> struct ocp_func_iic_data* iic_data = ocp->def->additions;
> @@ -828,6 +1034,7 @@ static void __exit iic_exit(void)
> {
> ocp_unregister_driver(&ibm_iic_driver);
> }
> +#endif /* CONFIG_PPC_MERGE */
>
> module_init(iic_init);
> module_exit(iic_exit);
> diff --git a/drivers/i2c/busses/i2c-ibm_iic.h b/drivers/i2c/busses/i2c-ibm_iic.h
> index fdaa482..c15b091 100644
> --- a/drivers/i2c/busses/i2c-ibm_iic.h
> +++ b/drivers/i2c/busses/i2c-ibm_iic.h
> @@ -50,6 +50,8 @@ struct ibm_iic_private {
> int irq;
> int fast_mode;
> u8 clckdiv;
> + struct device_node *np;
> + phys_addr_t paddr;
> };
>
> /* IICx_CNTL register */
> --
> 1.5.3.4
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH 2/2] i2c: Add devtree-aware iic support for PPC4xx
From: Eugene Surovegin @ 2007-10-15 16:32 UTC (permalink / raw)
To: Stefan Roese; +Cc: Jean Delvare, linuxppc-dev, i2c
In-Reply-To: <200710151529.11485.sr@denx.de>
On Mon, Oct 15, 2007 at 03:29:11PM +0200, Stefan Roese wrote:
<snip>
> +#ifdef CONFIG_PPC_MERGE
> +static int device_idx = -1;
> +#endif
> +
<snip>
> + dev->idx = ++device_idx;
> + adap->nr = dev->idx;
Hmm, this doesn't look right. That mighty powerpc device everybody
was so excited about for the last years doesn't provide a device
instance number/index?
I think this approach is wrong, because I want i2c bus numbers for the
on-chip i2c to be fixed. This code makes it dependent on the order
devices were described in the device tree; how do you handle a
situation when only the second i2c adapter is connected? For OCP I
would just remove ocp_def for the IIC0.
--
Eugene
^ permalink raw reply
* [PATCH v2 2/2] [POWERPC] MPC8568E-MDS: add support for flash
From: Anton Vorontsov @ 2007-10-15 16:16 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20071015155730.GA30008@localhost.localdomain>
MPC8568E-MDS have 1 32MB Spansion x16 CFI flash chip. Let's use it.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
Patch is against galak/powerpc.git master branch.
arch/powerpc/boot/dts/mpc8568mds.dts | 35 +++++++++++++++++++++++++++++++++-
1 files changed, 34 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 8e15dba..1198363 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -47,12 +47,45 @@
#address-cells = <2>;
#size-cells = <1>;
reg = <e0005000 d8>;
- ranges = <1 0 f8000000 0008000>;
+ ranges = <1 0 f8000000 0008000
+ 0 0 fe000000 2000000>;
bcsr@1,0 {
device_type = "board-control";
reg = <1 0 8000>;
};
+
+ flash@0,0 {
+ compatible = "Spansion,S29GL256N11TFIV2O", "cfi-flash";
+ reg = <0 0 2000000>;
+ probe-type = "CFI";
+ bank-width = <2>;
+ device-width = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ hrcw@0 {
+ label = "hrcw";
+ reg = <0 20001>;
+ read-only;
+ };
+
+ kernel@20000 {
+ label = "kernel";
+ reg = <20000 200000>;
+ };
+
+ rootfs@220000 {
+ label = "rootfs";
+ reg = <220000 1d60000>;
+ };
+
+ uboot@1f80000 {
+ label = "u-boot";
+ reg = <1f80000 80000>;
+ read-only;
+ };
+ };
};
soc8568@e0000000 {
--
1.5.0.6
^ permalink raw reply related
* [PATCH v2 1/2] [RFC][POWERPC] MPC8568E-MDS: create localbus node
From: Anton Vorontsov @ 2007-10-15 16:16 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20071015155730.GA30008@localhost.localdomain>
This patch creates localbus node, moves bcsr into it, and adds
localbus to the probe path.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
Notice that localbus control registers are in the soc address
space, but ranges are not. Just the same situation as with PCI
nodes.
Patch is against galak/powerpc.git master branch.
arch/powerpc/boot/dts/mpc8568mds.dts | 14 +++++++++++---
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 1 +
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 5439437..8e15dba 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -42,9 +42,17 @@
reg = <00000000 10000000>;
};
- bcsr@f8000000 {
- device_type = "board-control";
- reg = <f8000000 8000>;
+ localbus@e0005000 {
+ compatible = "fsl,mpc8568mds-localbus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <e0005000 d8>;
+ ranges = <1 0 f8000000 0008000>;
+
+ bcsr@1,0 {
+ device_type = "board-control";
+ reg = <1 0 8000>;
+ };
};
soc8568@e0000000 {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 61b3eed..0cf994b 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -139,6 +139,7 @@ static struct of_device_id mpc85xx_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "qe", },
+ { .compatible = "fsl,mpc8568mds-localbus", },
{},
};
--
1.5.0.6
^ permalink raw reply related
* Refactor booting-without-of.txt
From: Grant Likely @ 2007-10-15 16:08 UTC (permalink / raw)
To: linuxppc-dev, microblaze-uclinux
Adding the Linux expected device tree bindings to
booting-without-of.txt seems to be getting a little unwieldy. Plus
with more than one arch using the device tree (powerpc, sparc &
microblaze) the device tree bindings aren't necessarily powerpc only
(the Xilinx devices certainly fall in this category).
Anyone have comments about splitting the expected device tree bindings
out of booting-without-of.txt into a separate directory?
Perhaps something like this; each file contains common bindings for
the type of device and device specific properties:
Documentation/of/
Documentation/of/README - Description of the purpose and layout of
this directory
Documentation/of/net.txt - network device bindings (eth, MDIO, phy, etc)
Documentation/of/serial.txt - serial device bindings
Documentation/of/misc.txt - anything that doesn't fit anywhere else yet.
Documentation/of/soc/* - System on chip stuff that doesn't fit will
into established device types; possibly a separate file for each chip.
Documentation/of/usb.txt - usb blah blah blah
Documentation/of/whatever - you get the picture.
Thoughts?
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH 1/2] [RFC][POWERPC] MPC8568E-MDS: create localbus node
From: Anton Vorontsov @ 2007-10-15 15:57 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: linuxppc-dev
In-Reply-To: <47138A54.8030307@ru.mvista.com>
On Mon, Oct 15, 2007 at 07:42:12PM +0400, Sergei Shtylyov wrote:
> Anton Vorontsov wrote:
>
>> This patch creates localbus node, moves bcsr into it, and adds
>> localbus to the probe path.
>
>> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
>
>> diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts
>> b/arch/powerpc/boot/dts/mpc8568mds.dts
>> index 5439437..296adc3 100644
>> --- a/arch/powerpc/boot/dts/mpc8568mds.dts
>> +++ b/arch/powerpc/boot/dts/mpc8568mds.dts
>> @@ -42,9 +42,17 @@
>> reg = <00000000 10000000>;
>> };
>> - bcsr@f8000000 {
Heh, this is wrong.
>> - device_type = "board-control";
>> - reg = <f8000000 8000>;
>> + localbus@f0000000 {
>> + compatible = "fsl,mpc8568mds-localbus";
>
> Is the entity described as "localbus" indeed so *board* specific?
That's what booting-without-of.txt gives as an example.
>> + #address-cells = <2>;
>> + #size-cells = <1>;
>> + reg = <f0000000 10000000>;
>> + ranges = <0 0 f8000000 0008000>;
>
> Isn't that range a part of "reg"?
Heh. Right you are.
>> +
>> + bcsr@0,0 {
Hrm, wrong.
>> + device_type = "board-control";
>> + reg = <0 0 8000>;
>> + };
>> };
>> soc8568@e0000000 {
>
> WBR, Sergei
I'll repost fixed version shortly.
Thanks,
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* [PATCH v2] Device tree bindings for Xilinx devices
From: Grant Likely @ 2007-10-15 15:53 UTC (permalink / raw)
To: linuxppc-dev, Wolfgang Reissnegger, Leonid, Stephen Neuendorffer,
microblaze-uclinux
From: Grant Likely <grant.likely@secretlab.ca>
Here's my second version of xilinx device tree bindings. Please review
and comment. I'd like to push these out to Paulus in the next couple
of days.
Cheers,
g.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
Documentation/powerpc/booting-without-of.txt | 55 ++++++++++++++++++++++++++
1 files changed, 55 insertions(+), 0 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 7a6c5f2..21afaea 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2089,6 +2089,61 @@ platforms are moved over to use the flattened-device-tree model.
More devices will be defined as this spec matures.
+ l) Xilinx ML300 Framebuffer
+
+ Simple framebuffer device from the ML300 reference design (also on the
+ ML403 reference design as well as others).
+
+ Required properties:
+ - compatible : Must include "xilinx,ml300-fb"
+ - reg : offset and length of the framebuffer register set
+
+ Optional properties:
+ - resolution : <xres yres> pixel resolution of framebuffer. Some
+ implementations use a different resolution. Default
+ is <d#640 d#480>
+ - virt-resolution : <xvirt yvirt> Size of framebuffer in memory.
+ Default is <d#1024 d#480>.
+ - rotate-display (empty) : rotate display 180 degrees.
+
+ m) Xilinx SystemACE
+
+ The Xilinx SystemACE device is used to program FPGAs from an FPGA
+ bitstream stored on a CF card. It can also be used as a generic CF
+ interface device.
+
+ Required properties:
+ - compatible : Must include "xilinx,sysace"
+ - reg : offset and length of SystemACE register set
+
+ Recommended properties:
+ - interrupt-parent, interrupts : Connection of device irq signal.
+
+ Optional properties:
+ - 8-bit (empty) : Set this property if the SystemACE must be in 8 bit mode
+
+ n) Xilinx EMAC and Xilinx TEMAC
+
+ Xilinx Ethernet devices. Uses common properties from other Ethernet
+ devices with the following constraints:
+
+ Required properties:
+ - compatible : Must include one of: "xilinx,plb-temac",
+ "xilinx,plb-emac", "xilinx-opb-emac"
+ - dma-mode : Must be one of "none", "simple", "sg" (sg == scatter gather)
+
+ o) Xilinx Uartlite
+
+ Xilinx uartlite devices are simple fixed speed serial ports. Uartlite
+ ports should be described in a node with the following properties.
+
+ Requred properties:
+ - compatible : Must include "xilinx,uartlite"
+ - reg : offset and length of uartlite register set
+
+ Recommended properties:
+ - interrupt-parent, interrupts : Connection of device irq signal.
+
VII - Specifying interrupt information for devices
===================================================
^ permalink raw reply related
* Re: [PATCH 1/2] [RFC][POWERPC] MPC8568E-MDS: create localbus node
From: Sergei Shtylyov @ 2007-10-15 15:42 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev
In-Reply-To: <20071015153525.GA28761@localhost.localdomain>
Anton Vorontsov wrote:
> This patch creates localbus node, moves bcsr into it, and adds
> localbus to the probe path.
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
> index 5439437..296adc3 100644
> --- a/arch/powerpc/boot/dts/mpc8568mds.dts
> +++ b/arch/powerpc/boot/dts/mpc8568mds.dts
> @@ -42,9 +42,17 @@
> reg = <00000000 10000000>;
> };
>
> - bcsr@f8000000 {
> - device_type = "board-control";
> - reg = <f8000000 8000>;
> + localbus@f0000000 {
> + compatible = "fsl,mpc8568mds-localbus";
Is the entity described as "localbus" indeed so *board* specific?
> + #address-cells = <2>;
> + #size-cells = <1>;
> + reg = <f0000000 10000000>;
> + ranges = <0 0 f8000000 0008000>;
Isn't that range a part of "reg"?
> +
> + bcsr@0,0 {
> + device_type = "board-control";
> + reg = <0 0 8000>;
> + };
> };
>
> soc8568@e0000000 {
WBR, Sergei
^ permalink raw reply
* kernel stops booting on quad powermac
From: Johannes Berg @ 2007-10-15 14:56 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 504 bytes --]
Oddly, a recent kernel (23fd50450a34f2558070ceabb0bfebc1c9604af5) stops
booting at "windfarm: Drive bay control loop started.", while previously
"windfarm: CPUs control loops started" was displayed a long time, i.e.
Backside took very long to start.
Haven't had a chance to look into it yet, any ideas? I do have NO_HZ
enabled. I wanted to test the irqtrace patch but I doubt it would be
causing this, usually bugs there caused hangs very early, not this late
in the boot sequence.
johannes
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 828 bytes --]
^ permalink raw reply
* [PATCH 2/2] [POWERPC] MPC8568E-MDS: add support for flash
From: Anton Vorontsov @ 2007-10-15 15:35 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <9aefd05e0d526cb1c6b5c7905581ec781093eb88.1192462414.git.avorontsov@ru.mvista.com>
MPC8568E-MDS have 1 32MB Spansion x16 CFI flash chip. Let's use it.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
Patch is against galak/powerpc.git master branch.
arch/powerpc/boot/dts/mpc8568mds.dts | 35 +++++++++++++++++++++++++++++++++-
1 files changed, 34 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 296adc3..c3b2138 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -47,12 +47,45 @@
#address-cells = <2>;
#size-cells = <1>;
reg = <f0000000 10000000>;
- ranges = <0 0 f8000000 0008000>;
+ ranges = <0 0 f8000000 0008000
+ 1 0 fe000000 2000000>;
bcsr@0,0 {
device_type = "board-control";
reg = <0 0 8000>;
};
+
+ flash@1,0 {
+ compatible = "Spansion,S29GL256N11TFIV2O", "cfi-flash";
+ reg = <1 0 2000000>;
+ probe-type = "CFI";
+ bank-width = <2>;
+ device-width = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ hrcw@0 {
+ label = "hrcw";
+ reg = <0 20001>;
+ read-only;
+ };
+
+ kernel@20000 {
+ label = "kernel";
+ reg = <20000 200000>;
+ };
+
+ rootfs@220000 {
+ label = "rootfs";
+ reg = <220000 1d60000>;
+ };
+
+ uboot@1f80000 {
+ label = "u-boot";
+ reg = <1f80000 80000>;
+ read-only;
+ };
+ };
};
soc8568@e0000000 {
--
1.5.0.6
^ permalink raw reply related
* [PATCH 1/2] [RFC][POWERPC] MPC8568E-MDS: create localbus node
From: Anton Vorontsov @ 2007-10-15 15:35 UTC (permalink / raw)
To: linuxppc-dev
This patch creates localbus node, moves bcsr into it, and adds
localbus to the probe path.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
Patch is against galak/powerpc.git master branch.
arch/powerpc/boot/dts/mpc8568mds.dts | 14 +++++++++++---
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 1 +
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 5439437..296adc3 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -42,9 +42,17 @@
reg = <00000000 10000000>;
};
- bcsr@f8000000 {
- device_type = "board-control";
- reg = <f8000000 8000>;
+ localbus@f0000000 {
+ compatible = "fsl,mpc8568mds-localbus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ reg = <f0000000 10000000>;
+ ranges = <0 0 f8000000 0008000>;
+
+ bcsr@0,0 {
+ device_type = "board-control";
+ reg = <0 0 8000>;
+ };
};
soc8568@e0000000 {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 61b3eed..0cf994b 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -139,6 +139,7 @@ static struct of_device_id mpc85xx_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
{ .type = "qe", },
+ { .compatible = "fsl,mpc8568mds-localbus", },
{},
};
--
1.5.0.6
^ permalink raw reply related
* Re: [PATCH v2 2/7] rheap: Changes config mechanism
From: Grant Likely @ 2007-10-15 15:09 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, paulus, domen.puncer
In-Reply-To: <47137F41.6000404@freescale.com>
On 10/15/07, Timur Tabi <timur@freescale.com> wrote:
> Kumar Gala wrote:
>
> >> If you turn on the QE but don't turn on RHEAP, the build will fail.
> >> Do we want to allow that?
> >
> > nope.
>
> Is there any way to force RHEAP to be selected when it's a user-selectable option?
Yes, you just add menu text line after the "bool". Bestcomm, QE and
others still select it unconditionally.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH v2 2/7] rheap: Changes config mechanism
From: Timur Tabi @ 2007-10-15 14:54 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, paulus, domen.puncer
In-Reply-To: <4540BB4B-8A7C-4D8F-9BBE-0B6F6DAD4DA3@kernel.crashing.org>
Kumar Gala wrote:
>> If you turn on the QE but don't turn on RHEAP, the build will fail.
>> Do we want to allow that?
>
> nope.
Is there any way to force RHEAP to be selected when it's a user-selectable option?
--
Timur Tabi
Linux Kernel Developer @ Freescale
^ permalink raw reply
* Re: [PATCH v4 3/9] add Freescale SerDes PHY support
From: Arnd Bergmann @ 2007-10-15 14:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Li Yang, paulus
In-Reply-To: <1192460190-26891-1-git-send-email-leoli@freescale.com>
On Monday 15 October 2007, Li Yang wrote:
> The SerDes(serializer/deserializer) PHY block is a new SoC block used
> in Freescale chips to support multiple serial interfaces, such as PCI
> Express, SGMII, SATA.
looks good now
> Signed-off-by: Li Yang <leoli@freescale.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
^ permalink raw reply
* Re: [PATCH v2 2/7] rheap: Changes config mechanism
From: Kumar Gala @ 2007-10-15 14:54 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, paulus, domen.puncer
In-Reply-To: <47137ECD.9020103@freescale.com>
On Oct 15, 2007, at 9:53 AM, Timur Tabi wrote:
> Kumar Gala wrote:
>
>> I don't see why we can't let users select it (saying that
>> differently, we should let users have this ability)
>
> If you turn on the QE but don't turn on RHEAP, the build will
> fail. Do we want to allow that?
nope.
- k
^ permalink raw reply
* Re: [PATCH v2 2/7] rheap: Changes config mechanism
From: Timur Tabi @ 2007-10-15 14:53 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, paulus, domen.puncer
In-Reply-To: <5D5FEAFA-AFB9-4F8D-941E-11686E8992F4@kernel.crashing.org>
Kumar Gala wrote:
> I don't see why we can't let users select it (saying that
> differently, we should let users have this ability)
If you turn on the QE but don't turn on RHEAP, the build will fail. Do we
want to allow that?
--
Timur Tabi
Linux Kernel Developer @ Freescale
^ permalink raw reply
* [PATCH v2] powerpc: Add 1TB workaround for PA6T
From: Olof Johansson @ 2007-10-15 14:58 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
In-Reply-To: <20071012064942.GB30829@lixom.net>
PA6T has a bug where the slbie instruction does not honor the large
segment bit. As a result, we have to always use slbia when switching
context.
We don't have to worry about changing the slbie's during fault processing,
since they should never be replacing one VSID with another using the
same ESID. I.e. there's no risk for inserting duplicate entries due to a
failed slbie of the old entry. So as long as we clear it out on context
switch we should be fine.
Signed-off-by: Olof Johansson <olof@lixom.net>
Index: k.org/arch/powerpc/mm/hash_utils_64.c
===================================================================
--- k.org.orig/arch/powerpc/mm/hash_utils_64.c
+++ k.org/arch/powerpc/mm/hash_utils_64.c
@@ -212,6 +212,7 @@ static int __init htab_dt_scan_seg_sizes
return 1;
}
}
+ cur_cpu_spec->cpu_features &= ~CPU_FTR_NO_SLBIE_B;
return 0;
}
Index: k.org/arch/powerpc/mm/slb.c
===================================================================
--- k.org.orig/arch/powerpc/mm/slb.c
+++ k.org/arch/powerpc/mm/slb.c
@@ -157,7 +157,8 @@ void switch_slb(struct task_struct *tsk,
unsigned long stack = KSTK_ESP(tsk);
unsigned long unmapped_base;
- if (offset <= SLB_CACHE_ENTRIES) {
+ if (!cpu_has_feature(CPU_FTR_NO_SLBIE_B) &&
+ offset <= SLB_CACHE_ENTRIES) {
int i;
asm volatile("isync" : : : "memory");
for (i = 0; i < offset; i++) {
Index: k.org/include/asm-powerpc/cputable.h
===================================================================
--- k.org.orig/include/asm-powerpc/cputable.h
+++ k.org/include/asm-powerpc/cputable.h
@@ -165,6 +165,7 @@ extern void do_feature_fixups(unsigned l
#define CPU_FTR_SPURR LONG_ASM_CONST(0x0001000000000000)
#define CPU_FTR_DSCR LONG_ASM_CONST(0x0002000000000000)
#define CPU_FTR_1T_SEGMENT LONG_ASM_CONST(0x0004000000000000)
+#define CPU_FTR_NO_SLBIE_B LONG_ASM_CONST(0x0008000000000000)
#ifndef __ASSEMBLY__
@@ -367,7 +368,7 @@ extern void do_feature_fixups(unsigned l
#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
- CPU_FTR_PURR | CPU_FTR_REAL_LE)
+ CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_NO_SLBIE_B)
#define CPU_FTRS_COMPATIBLE (CPU_FTR_USE_TB | \
CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2)
Index: k.org/arch/powerpc/kernel/entry_64.S
===================================================================
--- k.org.orig/arch/powerpc/kernel/entry_64.S
+++ k.org/arch/powerpc/kernel/entry_64.S
@@ -408,6 +408,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT
std r7,SLBSHADOW_STACKVSID(r9) /* Save VSID */
std r0,SLBSHADOW_STACKESID(r9) /* Save ESID */
+ /* No need to check for CPU_FTR_NO_SLBIE_B here, since when
+ * we have 1TB segments, the only CPUs known to have the errata
+ * only support less than 1TB of system memory and we'll never
+ * actually hit this code path.
+ */
+
slbie r6
slbie r6 /* Workaround POWER5 < DD2.1 issue */
slbmte r7,r0
^ permalink raw reply
* [PATCH v4 9/9] add MPC837x MDS board default device tree
From: Li Yang @ 2007-10-15 14:56 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/boot/dts/mpc8377_mds.dts | 281 +++++++++++++++++++++++++++++++
arch/powerpc/boot/dts/mpc8378_mds.dts | 263 +++++++++++++++++++++++++++++
arch/powerpc/boot/dts/mpc8379_mds.dts | 299 +++++++++++++++++++++++++++++++++
3 files changed, 843 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/mpc8377_mds.dts
create mode 100644 arch/powerpc/boot/dts/mpc8378_mds.dts
create mode 100644 arch/powerpc/boot/dts/mpc8379_mds.dts
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
new file mode 100644
index 0000000..d0bd326
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -0,0 +1,281 @@
+/*
+ * MPC8377E MDS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/ {
+ model = "fsl,mpc8377emds";
+ compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,837x@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <20>;
+ i-cache-line-size = <20>;
+ d-cache-size = <8000>; // L1, 32K
+ i-cache-size = <8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ 32-bit;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <00000000 20000000>; // 512MB at 0
+ };
+
+ soc837x@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0 e0000000 00100000>;
+ reg = <e0000000 00000200>;
+ bus-frequency = <0>;
+
+ wdt@200 {
+ compatible = "mpc83xx_wdt";
+ reg = <200 100>;
+ };
+
+ i2c@3000 {
+ compatible = "fsl-i2c";
+ reg = <3000 100>;
+ interrupts = <e 8>;
+ interrupt-parent = < &ipic >;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ compatible = "fsl-i2c";
+ reg = <3100 100>;
+ interrupts = <f 8>;
+ interrupt-parent = < &ipic >;
+ dfsrr;
+ };
+
+ spi@7000 {
+ compatible = "mpc83xx_spi";
+ reg = <7000 1000>;
+ interrupts = <10 8>;
+ interrupt-parent = < &ipic >;
+ mode = <0>;
+ };
+
+ /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
+ usb@23000 {
+ device_type = "usb";
+ compatible = "fsl-usb2-dr";
+ reg = <23000 1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = < &ipic >;
+ interrupts = <26 8>;
+ phy_type = "utmi_wide";
+ };
+
+ mdio@24520 {
+ device_type = "mdio";
+ compatible = "gianfar";
+ reg = <24520 20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy2: ethernet-phy@2 {
+ interrupt-parent = < &ipic >;
+ interrupts = <11 8>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupt-parent = < &ipic >;
+ interrupts = <12 8>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@24000 {
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <24000 1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <20 8 21 8 22 8>;
+ phy-connection-type = "mii";
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy2 >;
+ };
+
+ ethernet@25000 {
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <25000 1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <23 8 24 8 25 8>;
+ phy-connection-type = "mii";
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy3 >;
+ };
+
+ serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4500 100>;
+ clock-frequency = <0>;
+ interrupts = <9 8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4600 100>;
+ clock-frequency = <0>;
+ interrupts = <a 8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ crypto@30000 {
+ model = "SEC3";
+ compatible = "talitos";
+ reg = <30000 10000>;
+ interrupts = <b 8>;
+ interrupt-parent = < &ipic >;
+ /* Rev. 3.0 geometry */
+ num-channels = <4>;
+ channel-fifo-len = <18>;
+ exec-units-mask = <000009fe>;
+ descriptor-types-mask = <03ab0ebf>;
+ };
+
+ sdhc@2e000 {
+ model = "eSDHC";
+ compatible = "fsl,esdhc";
+ reg = <2e000 1000>;
+ interrupts = <2a 8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ sata@18000 {
+ model = "SATA-300";
+ compatible = "fsl,mpc8379-sata";
+ reg = <18000 1000>;
+ interrupts = <2c 8>;
+ interrupt-parent = < &ipic >;
+ phy-handle = < &serdes1 >;
+ };
+
+ sata@19000 {
+ model = "SATA-300";
+ compatible = "fsl,mpc8379-sata";
+ reg = <19000 1000>;
+ interrupts = <2d 8>;
+ interrupt-parent = < &ipic >;
+ phy-handle = < &serdes1 >;
+ };
+
+ serdes1:serdes@e3000 {
+ compatible = "fsl,serdes";
+ reg = <e3000 100>;
+ vdd-1v;
+ protocol = "sata";
+ clock = <d#100>;
+ };
+
+ serdes2:serdes@e3100 {
+ compatible = "fsl,serdes";
+ reg = <e3100 100>;
+ vdd-1v;
+ protocol = "pcie";
+ clock = <d#100>;
+ };
+
+ /* IPIC
+ * interrupts cell = <intr #, sense>
+ * sense values match linux IORESOURCE_IRQ_* defines:
+ * sense == 8: Level, low assertion
+ * sense == 2: Edge, high-to-low change
+ */
+ ipic: pic@700 {
+ compatible = "fsl,ipic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <700 100>;
+ };
+ };
+
+ pci@e0008500 {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x11 */
+ 8800 0 0 1 &ipic 14 8
+ 8800 0 0 2 &ipic 15 8
+ 8800 0 0 3 &ipic 16 8
+ 8800 0 0 4 &ipic 17 8
+
+ /* IDSEL 0x12 */
+ 9000 0 0 1 &ipic 16 8
+ 9000 0 0 2 &ipic 17 8
+ 9000 0 0 3 &ipic 14 8
+ 9000 0 0 4 &ipic 15 8
+
+ /* IDSEL 0x13 */
+ 9800 0 0 1 &ipic 17 8
+ 9800 0 0 2 &ipic 14 8
+ 9800 0 0 3 &ipic 15 8
+ 9800 0 0 4 &ipic 16 8
+
+ /* IDSEL 0x15 */
+ a800 0 0 1 &ipic 14 8
+ a800 0 0 2 &ipic 15 8
+ a800 0 0 3 &ipic 16 8
+ a800 0 0 4 &ipic 17 8
+
+ /* IDSEL 0x16 */
+ b000 0 0 1 &ipic 17 8
+ b000 0 0 2 &ipic 14 8
+ b000 0 0 3 &ipic 15 8
+ b000 0 0 4 &ipic 16 8
+
+ /* IDSEL 0x17 */
+ b800 0 0 1 &ipic 16 8
+ b800 0 0 2 &ipic 17 8
+ b800 0 0 3 &ipic 14 8
+ b800 0 0 4 &ipic 15 8
+
+ /* IDSEL 0x18 */
+ c000 0 0 1 &ipic 15 8
+ c000 0 0 2 &ipic 16 8
+ c000 0 0 3 &ipic 17 8
+ c000 0 0 4 &ipic 14 8>;
+ interrupt-parent = < &ipic >;
+ interrupts = <42 8>;
+ bus-range = <0 0>;
+ ranges = <02000000 0 90000000 90000000 0 10000000
+ 42000000 0 80000000 80000000 0 10000000
+ 01000000 0 00000000 e2000000 0 00100000>;
+ clock-frequency = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <e0008500 100>;
+ compatible = "fsl,mpc83xx-pci", "83xx";
+ device_type = "pci";
+ };
+};
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
new file mode 100644
index 0000000..9f31e09
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -0,0 +1,263 @@
+/*
+ * MPC8378E MDS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/ {
+ model = "fsl,mpc8378emds";
+ compatible = "fsl,mpc8378emds","fsl,mpc837xmds";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,837x@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <20>;
+ i-cache-line-size = <20>;
+ d-cache-size = <8000>; // L1, 32K
+ i-cache-size = <8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ 32-bit;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <00000000 20000000>; // 512MB at 0
+ };
+
+ soc837x@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0 e0000000 00100000>;
+ reg = <e0000000 00000200>;
+ bus-frequency = <0>;
+
+ wdt@200 {
+ compatible = "mpc83xx_wdt";
+ reg = <200 100>;
+ };
+
+ i2c@3000 {
+ compatible = "fsl-i2c";
+ reg = <3000 100>;
+ interrupts = <e 8>;
+ interrupt-parent = < &ipic >;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ compatible = "fsl-i2c";
+ reg = <3100 100>;
+ interrupts = <f 8>;
+ interrupt-parent = < &ipic >;
+ dfsrr;
+ };
+
+ spi@7000 {
+ compatible = "mpc83xx_spi";
+ reg = <7000 1000>;
+ interrupts = <10 8>;
+ interrupt-parent = < &ipic >;
+ mode = <0>;
+ };
+
+ /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
+ usb@23000 {
+ device_type = "usb";
+ compatible = "fsl-usb2-dr";
+ reg = <23000 1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = < &ipic >;
+ interrupts = <26 8>;
+ phy_type = "utmi_wide";
+ };
+
+ mdio@24520 {
+ device_type = "mdio";
+ compatible = "gianfar";
+ reg = <24520 20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy2: ethernet-phy@2 {
+ interrupt-parent = < &ipic >;
+ interrupts = <11 8>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupt-parent = < &ipic >;
+ interrupts = <12 8>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@24000 {
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <24000 1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <20 8 21 8 22 8>;
+ phy-connection-type = "mii";
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy2 >;
+ };
+
+ ethernet@25000 {
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <25000 1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <23 8 24 8 25 8>;
+ phy-connection-type = "mii";
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy3 >;
+ };
+
+ serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4500 100>;
+ clock-frequency = <0>;
+ interrupts = <9 8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4600 100>;
+ clock-frequency = <0>;
+ interrupts = <a 8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ crypto@30000 {
+ model = "SEC3";
+ compatible = "talitos";
+ reg = <30000 10000>;
+ interrupts = <b 8>;
+ interrupt-parent = < &ipic >;
+ /* Rev. 3.0 geometry */
+ num-channels = <4>;
+ channel-fifo-len = <18>;
+ exec-units-mask = <000009fe>;
+ descriptor-types-mask = <03ab0ebf>;
+ };
+
+ sdhc@2e000 {
+ model = "eSDHC";
+ compatible = "fsl,esdhc";
+ reg = <2e000 1000>;
+ interrupts = <2a 8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ serdes1:serdes@e3000 {
+ compatible = "fsl,serdes";
+ reg = <e3000 100>;
+ vdd-1v;
+ protocol = "sgmii";
+ clock = <d#100>;
+ };
+
+ serdes2:serdes@e3100 {
+ compatible = "fsl,serdes";
+ reg = <e3100 100>;
+ vdd-1v;
+ protocol = "pcie";
+ clock = <d#100>;
+ };
+
+ /* IPIC
+ * interrupts cell = <intr #, sense>
+ * sense values match linux IORESOURCE_IRQ_* defines:
+ * sense == 8: Level, low assertion
+ * sense == 2: Edge, high-to-low change
+ */
+ ipic: pic@700 {
+ compatible = "fsl,ipic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <700 100>;
+ };
+ };
+
+ pci@e0008500 {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x11 */
+ 8800 0 0 1 &ipic 14 8
+ 8800 0 0 2 &ipic 15 8
+ 8800 0 0 3 &ipic 16 8
+ 8800 0 0 4 &ipic 17 8
+
+ /* IDSEL 0x12 */
+ 9000 0 0 1 &ipic 16 8
+ 9000 0 0 2 &ipic 17 8
+ 9000 0 0 3 &ipic 14 8
+ 9000 0 0 4 &ipic 15 8
+
+ /* IDSEL 0x13 */
+ 9800 0 0 1 &ipic 17 8
+ 9800 0 0 2 &ipic 14 8
+ 9800 0 0 3 &ipic 15 8
+ 9800 0 0 4 &ipic 16 8
+
+ /* IDSEL 0x15 */
+ a800 0 0 1 &ipic 14 8
+ a800 0 0 2 &ipic 15 8
+ a800 0 0 3 &ipic 16 8
+ a800 0 0 4 &ipic 17 8
+
+ /* IDSEL 0x16 */
+ b000 0 0 1 &ipic 17 8
+ b000 0 0 2 &ipic 14 8
+ b000 0 0 3 &ipic 15 8
+ b000 0 0 4 &ipic 16 8
+
+ /* IDSEL 0x17 */
+ b800 0 0 1 &ipic 16 8
+ b800 0 0 2 &ipic 17 8
+ b800 0 0 3 &ipic 14 8
+ b800 0 0 4 &ipic 15 8
+
+ /* IDSEL 0x18 */
+ c000 0 0 1 &ipic 15 8
+ c000 0 0 2 &ipic 16 8
+ c000 0 0 3 &ipic 17 8
+ c000 0 0 4 &ipic 14 8>;
+ interrupt-parent = < &ipic >;
+ interrupts = <42 8>;
+ bus-range = <0 0>;
+ ranges = <02000000 0 90000000 90000000 0 10000000
+ 42000000 0 80000000 80000000 0 10000000
+ 01000000 0 00000000 e2000000 0 00100000>;
+ clock-frequency = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <e0008500 100>;
+ compatible = "fsl,mpc83xx-pci", "83xx";
+ device_type = "pci";
+ };
+};
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
new file mode 100644
index 0000000..5510e18
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -0,0 +1,299 @@
+/*
+ * MPC8379E MDS Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/ {
+ model = "fsl,mpc8379emds";
+ compatible = "fsl,mpc8379emds","fsl,mpc837xmds";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,837x@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <20>;
+ i-cache-line-size = <20>;
+ d-cache-size = <8000>; // L1, 32K
+ i-cache-size = <8000>; // L1, 32K
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ 32-bit;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <00000000 20000000>; // 512MB at 0
+ };
+
+ soc837x@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0 e0000000 00100000>;
+ reg = <e0000000 00000200>;
+ bus-frequency = <0>;
+
+ wdt@200 {
+ compatible = "mpc83xx_wdt";
+ reg = <200 100>;
+ };
+
+ i2c@3000 {
+ compatible = "fsl-i2c";
+ reg = <3000 100>;
+ interrupts = <e 8>;
+ interrupt-parent = < &ipic >;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ compatible = "fsl-i2c";
+ reg = <3100 100>;
+ interrupts = <f 8>;
+ interrupt-parent = < &ipic >;
+ dfsrr;
+ };
+
+ spi@7000 {
+ compatible = "mpc83xx_spi";
+ reg = <7000 1000>;
+ interrupts = <10 8>;
+ interrupt-parent = < &ipic >;
+ mode = <0>;
+ };
+
+ /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
+ usb@23000 {
+ device_type = "usb";
+ compatible = "fsl-usb2-dr";
+ reg = <23000 1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupt-parent = < &ipic >;
+ interrupts = <26 8>;
+ phy_type = "utmi_wide";
+ };
+
+ mdio@24520 {
+ device_type = "mdio";
+ compatible = "gianfar";
+ reg = <24520 20>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy2: ethernet-phy@2 {
+ interrupt-parent = < &ipic >;
+ interrupts = <11 8>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupt-parent = < &ipic >;
+ interrupts = <12 8>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ ethernet@24000 {
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <24000 1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <20 8 21 8 22 8>;
+ phy-connection-type = "mii";
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy2 >;
+ };
+
+ ethernet@25000 {
+ device_type = "network";
+ model = "eTSEC";
+ compatible = "gianfar";
+ reg = <25000 1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <23 8 24 8 25 8>;
+ phy-connection-type = "mii";
+ interrupt-parent = < &ipic >;
+ phy-handle = < &phy3 >;
+ };
+
+ serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4500 100>;
+ clock-frequency = <0>;
+ interrupts = <9 8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4600 100>;
+ clock-frequency = <0>;
+ interrupts = <a 8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ crypto@30000 {
+ model = "SEC3";
+ compatible = "talitos";
+ reg = <30000 10000>;
+ interrupts = <b 8>;
+ interrupt-parent = < &ipic >;
+ /* Rev. 3.0 geometry */
+ num-channels = <4>;
+ channel-fifo-len = <18>;
+ exec-units-mask = <000009fe>;
+ descriptor-types-mask = <03ab0ebf>;
+ };
+
+ sdhc@2e000 {
+ model = "eSDHC";
+ compatible = "fsl,esdhc";
+ reg = <2e000 1000>;
+ interrupts = <2a 8>;
+ interrupt-parent = < &ipic >;
+ };
+
+ sata@18000 {
+ model = "SATA-300";
+ compatible = "fsl,mpc8379-sata";
+ reg = <18000 1000>;
+ interrupts = <2c 8>;
+ interrupt-parent = < &ipic >;
+ phy-handle = < &serdes1 >;
+ };
+
+ sata@19000 {
+ model = "SATA-300";
+ compatible = "fsl,mpc8379-sata";
+ reg = <19000 1000>;
+ interrupts = <2d 8>;
+ interrupt-parent = < &ipic >;
+ phy-handle = < &serdes1 >;
+ };
+
+ sata@1a000 {
+ model = "SATA-300";
+ compatible = "fsl,mpc8379-sata";
+ reg = <1a000 1000>;
+ interrupts = <2e 8>;
+ interrupt-parent = < &ipic >;
+ phy-handle = < &serdes2 >;
+ };
+
+ sata@1b000 {
+ model = "SATA-300";
+ compatible = "fsl,mpc8379-sata";
+ reg = <1b000 1000>;
+ interrupts = <2f 8>;
+ interrupt-parent = < &ipic >;
+ phy-handle = < &serdes2 >;
+ };
+
+ serdes1:serdes@e3000 {
+ compatible = "fsl,serdes";
+ reg = <e3000 100>;
+ vdd-1v;
+ protocol = "sata";
+ clock = <d#100>;
+ };
+
+ serdes2:serdes@e3100 {
+ compatible = "fsl,serdes";
+ reg = <e3100 100>;
+ vdd-1v;
+ protocol = "sata";
+ clock = <d#100>;
+ };
+
+ /* IPIC
+ * interrupts cell = <intr #, sense>
+ * sense values match linux IORESOURCE_IRQ_* defines:
+ * sense == 8: Level, low assertion
+ * sense == 2: Edge, high-to-low change
+ */
+ ipic: pic@700 {
+ compatible = "fsl,ipic";
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <700 100>;
+ };
+ };
+
+ pci@e0008500 {
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+
+ /* IDSEL 0x11 */
+ 8800 0 0 1 &ipic 14 8
+ 8800 0 0 2 &ipic 15 8
+ 8800 0 0 3 &ipic 16 8
+ 8800 0 0 4 &ipic 17 8
+
+ /* IDSEL 0x12 */
+ 9000 0 0 1 &ipic 16 8
+ 9000 0 0 2 &ipic 17 8
+ 9000 0 0 3 &ipic 14 8
+ 9000 0 0 4 &ipic 15 8
+
+ /* IDSEL 0x13 */
+ 9800 0 0 1 &ipic 17 8
+ 9800 0 0 2 &ipic 14 8
+ 9800 0 0 3 &ipic 15 8
+ 9800 0 0 4 &ipic 16 8
+
+ /* IDSEL 0x15 */
+ a800 0 0 1 &ipic 14 8
+ a800 0 0 2 &ipic 15 8
+ a800 0 0 3 &ipic 16 8
+ a800 0 0 4 &ipic 17 8
+
+ /* IDSEL 0x16 */
+ b000 0 0 1 &ipic 17 8
+ b000 0 0 2 &ipic 14 8
+ b000 0 0 3 &ipic 15 8
+ b000 0 0 4 &ipic 16 8
+
+ /* IDSEL 0x17 */
+ b800 0 0 1 &ipic 16 8
+ b800 0 0 2 &ipic 17 8
+ b800 0 0 3 &ipic 14 8
+ b800 0 0 4 &ipic 15 8
+
+ /* IDSEL 0x18 */
+ c000 0 0 1 &ipic 15 8
+ c000 0 0 2 &ipic 16 8
+ c000 0 0 3 &ipic 17 8
+ c000 0 0 4 &ipic 14 8>;
+ interrupt-parent = < &ipic >;
+ interrupts = <42 8>;
+ bus-range = <0 0>;
+ ranges = <02000000 0 90000000 90000000 0 10000000
+ 42000000 0 80000000 80000000 0 10000000
+ 01000000 0 00000000 e2000000 0 00100000>;
+ clock-frequency = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <e0008500 100>;
+ compatible = "fsl,mpc83xx-pci", "83xx";
+ device_type = "pci";
+ };
+};
--
1.5.3.2.104.g41ef
^ permalink raw reply related
* [PATCH v4 3/9] add Freescale SerDes PHY support
From: Li Yang @ 2007-10-15 14:56 UTC (permalink / raw)
To: galak, paulus, linuxppc-dev; +Cc: Li Yang
The SerDes(serializer/deserializer) PHY block is a new SoC block used
in Freescale chips to support multiple serial interfaces, such as PCI
Express, SGMII, SATA.
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/platforms/Kconfig | 3 +
arch/powerpc/sysdev/Makefile | 1 +
arch/powerpc/sysdev/fsl_serdes.c | 195 ++++++++++++++++++++++++++++++++++++++
3 files changed, 199 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/sysdev/fsl_serdes.c
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index cc6013f..ff4fddc 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -313,4 +313,7 @@ config FSL_ULI1575
config CPM
bool
+config FSL_SERDES
+ bool
+
endmenu
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 1a6f564..a892aa0 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_MV64X60) += $(mv64x60-y) mv64x60_pic.o mv64x60_dev.o \
mv64x60_udbg.o
obj-$(CONFIG_RTC_DRV_CMOS) += rtc_cmos_setup.o
obj-$(CONFIG_AXON_RAM) += axonram.o
+obj-$(CONFIG_FSL_SERDES) += fsl_serdes.o
ifeq ($(CONFIG_PPC_MERGE),y)
obj-$(CONFIG_PPC_INDIRECT_PCI) += indirect_pci.o
diff --git a/arch/powerpc/sysdev/fsl_serdes.c b/arch/powerpc/sysdev/fsl_serdes.c
new file mode 100644
index 0000000..670015d
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_serdes.c
@@ -0,0 +1,195 @@
+/*
+ * arch/powerpc/sysdev/fsl_serdes.c
+ *
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: Li Yang <leoli@freescale.com>
+ *
+ * Freescale SerDes initialization routines
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/delay.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+
+#define FSL_SRDSCR0_OFFS 0x0
+#define FSL_SRDSCR0_DPP_1V2 0x00008800
+#define FSL_SRDSCR1_OFFS 0x4
+#define FSL_SRDSCR1_PLLBW 0x00000040
+#define FSL_SRDSCR2_OFFS 0x8
+#define FSL_SRDSCR2_VDD_1V2 0x00800000
+#define FSL_SRDSCR2_SEIC_MASK 0x00001c1c
+#define FSL_SRDSCR2_SEIC_SATA 0x00001414
+#define FSL_SRDSCR2_SEIC_PEX 0x00001010
+#define FSL_SRDSCR2_SEIC_SGMII 0x00000101
+#define FSL_SRDSCR3_OFFS 0xc
+#define FSL_SRDSCR3_KFR_SATA 0x10100000
+#define FSL_SRDSCR3_KPH_SATA 0x04040000
+#define FSL_SRDSCR3_SDFM_SATA_PEX 0x01010000
+#define FSL_SRDSCR3_SDTXL_SATA 0x00000505
+#define FSL_SRDSCR4_OFFS 0x10
+#define FSL_SRDSCR4_PROT_SATA 0x00000808
+#define FSL_SRDSCR4_PROT_PEX 0x00000101
+#define FSL_SRDSCR4_PROT_SGMII 0x00000505
+#define FSL_SRDSCR4_PLANE_X2 0x01000000
+#define FSL_SRDSCR4_RFCKS_100 0x00000000
+#define FSL_SRDSCR4_RFCKS_125 0x10000000
+#define FSL_SRDSCR4_RFCKS_150 0x30000000
+#define FSL_SRDSRSTCTL_OFFS 0x20
+#define FSL_SRDSRSTCTL_RST 0x80000000
+#define FSL_SRDSRSTCTL_SATA_RESET 0xf
+
+static int fsl_serdes_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct device_node *np = ofdev->node;
+ void __iomem *regs;
+ const char *prot;
+ const unsigned int *freq;
+ u32 rfcks;
+
+ regs = of_iomap(np, 0);
+ if (!regs)
+ return -ENOMEM;
+
+ prot = of_get_property(np, "protocol", NULL);
+ if (!prot)
+ goto out;
+ freq = of_get_property(np, "clock", NULL);
+ if (!freq)
+ goto out;
+ switch (*freq) {
+ case 100:
+ rfcks = FSL_SRDSCR4_RFCKS_100;
+ break;
+ case 125:
+ rfcks = FSL_SRDSCR4_RFCKS_125;
+ break;
+ case 150:
+ rfcks = FSL_SRDSCR4_RFCKS_150;
+ break;
+ default:
+ printk(KERN_ERR "SerDes: Wrong frequency\n");
+ goto out;
+ }
+
+ /* Use default prescale and counter */
+
+ /* 1.0V corevdd */
+ if (of_get_property(np, "vdd-1v", NULL)) {
+ /* DPPE/DPPA = 0 */
+ clrbits32(regs + FSL_SRDSCR0_OFFS, FSL_SRDSCR0_DPP_1V2);
+
+ /* VDD = 0 */
+ clrbits32(regs + FSL_SRDSCR2_OFFS, FSL_SRDSCR2_VDD_1V2);
+ }
+
+ /* protocol specific configuration */
+ if (!strcmp(prot, "sata")) {
+ /* Set and clear reset bits */
+ setbits32(regs + FSL_SRDSRSTCTL_OFFS,
+ FSL_SRDSRSTCTL_SATA_RESET);
+ mdelay(1);
+ clrbits32(regs + FSL_SRDSRSTCTL_OFFS,
+ FSL_SRDSRSTCTL_SATA_RESET);
+
+ /* Configure SRDSCR1 */
+ clrbits32(regs + FSL_SRDSCR1_OFFS, FSL_SRDSCR1_PLLBW);
+
+ /* Configure SRDSCR2 */
+ clrsetbits_be32(regs + FSL_SRDSCR2_OFFS,
+ FSL_SRDSCR2_SEIC_MASK, FSL_SRDSCR2_SEIC_SATA);
+
+ /* Configure SRDSCR3 */
+ out_be32(regs + FSL_SRDSCR3_OFFS, FSL_SRDSCR3_KFR_SATA |
+ FSL_SRDSCR3_KPH_SATA |
+ FSL_SRDSCR3_SDFM_SATA_PEX |
+ FSL_SRDSCR3_SDTXL_SATA);
+
+ /* Configure SRDSCR4 */
+ out_be32(regs + FSL_SRDSCR4_OFFS, rfcks |
+ FSL_SRDSCR4_PROT_SATA);
+
+ } else if (!strcmp(prot, "pcie")) {
+ /* Configure SRDSCR1 */
+ setbits32(regs + FSL_SRDSCR1_OFFS, FSL_SRDSCR1_PLLBW);
+
+ /* Configure SRDSCR2 */
+ clrsetbits_be32(regs + FSL_SRDSCR2_OFFS, FSL_SRDSCR2_SEIC_MASK,
+ FSL_SRDSCR2_SEIC_PEX);
+
+ /* Configure SRDSCR3 */
+ out_be32(regs + FSL_SRDSCR3_OFFS, FSL_SRDSCR3_SDFM_SATA_PEX);
+
+ /* Configure SRDSCR4 */
+ if (of_get_property(np, "pcie-x2", NULL))
+ out_be32(regs + FSL_SRDSCR4_OFFS, rfcks |
+ FSL_SRDSCR4_PROT_PEX | FSL_SRDSCR4_PLANE_X2);
+ else
+ out_be32(regs + FSL_SRDSCR4_OFFS, rfcks |
+ FSL_SRDSCR4_PROT_PEX);
+
+ } else if (!strcmp(prot, "sgmii")) {
+ /* Configure SRDSCR1 */
+ clrbits32(regs + FSL_SRDSCR1_OFFS, FSL_SRDSCR1_PLLBW);
+
+ /* Configure SRDSCR2 */
+ clrsetbits_be32(regs + FSL_SRDSCR2_OFFS, FSL_SRDSCR2_SEIC_MASK,
+ FSL_SRDSCR2_SEIC_SGMII);
+
+ /* Configure SRDSCR3 */
+ out_be32(regs + FSL_SRDSCR3_OFFS, 0);
+
+ /* Configure SRDSCR4 */
+ out_be32(regs + FSL_SRDSCR4_OFFS, rfcks |
+ FSL_SRDSCR4_PROT_SGMII);
+
+ } else {
+ printk(KERN_ERR "SerDes: Wrong protocol\n");
+ goto out;
+ }
+
+ /* Do a software reset */
+ setbits32(regs + FSL_SRDSRSTCTL_OFFS, FSL_SRDSRSTCTL_RST);
+ iounmap(regs);
+
+ dev_printk(KERN_INFO, &ofdev->dev, "Initialized as %s\n", prot);
+
+ return 0;
+out:
+ iounmap(regs);
+ return -EINVAL;
+}
+
+static struct of_device_id fsl_serdes_match[] = {
+ {
+ .compatible = "fsl,serdes",
+ },
+ {},
+};
+
+static struct of_platform_driver fsl_serdes_driver = {
+ .name = "fsl-serdes",
+ .match_table = fsl_serdes_match,
+ .probe = fsl_serdes_probe,
+};
+
+static int __init fsl_serdes_init(void)
+{
+ of_register_platform_driver(&fsl_serdes_driver);
+ return 0;
+}
+device_initcall(fsl_serdes_init);
--
1.5.3.2.104.g41ef
^ permalink raw reply related
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox