* Re: dtc: Restore missing code for testcases
From: Jon Loeliger @ 2007-10-17 12:11 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20071017012357.GE28260@localhost.localdomain>
So, like, the other day David Gibson mumbled:
> Recent commits 333542fabf8720b881e992a5abca32ef4bcb841a and
> fd1bf3a5ae46962528ef89a824261a88830758a2 added new testcases to dtc.
> However, although the testcases were added to the Makefile and
> run_tests.sh, one of the .c files for the testcase was omitted from
> the patch in each case.
>
> This patch restores the missing testcase code.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Applied.
> jdl, you should
> really run a "make check" before committing my patches...
In the past, I have. I confess, this last round I only
compiled tested things. I'm really still catching up some...
jdl
^ permalink raw reply
* Re: dtc: Improve -Odts output
From: Jon Loeliger @ 2007-10-17 12:15 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20071017023910.GH28260@localhost.localdomain>
So, like, the other day David Gibson mumbled:
> This patch makes improvements to the way properties are printed when
> in dtc is producing dts output.
> - Characters which need escaping are now properly handled when
> printing properties as strings
> - The heuristics for what format to use for a property are
> improved so that 'compatible' properties will be displayed as
> expected.
> - escapes.dts is altered to better demonstrate the changes,
> and the string_escapes testcase is adjusted accordingly.
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Applied.
Thanks,
jdl
^ permalink raw reply
* Re: PPC440EPx GPIO control help
From: Misbah khan @ 2007-10-17 12:17 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <1192618194.13993.25.camel@localhost.localdomain>
I Prefer that you write a coustem driver. map the GPIO address (Either make
use of mapped area of GPIO that u may find in the source for comercial
kernel or else map the physical address in the driver and access it ).
---Misbah
Josh Boyer-4 wrote:
>
> On Tue, 2007-10-16 at 23:21 -0700, Jeff Mock wrote:
>> David Hawkins wrote:
>> >> I have a PPC440EPx Sequoia Evaluation board that runs on Linux 2.6.21.
>> >> What I would want to do is to control (write and read values to) its
>> >> GPIO. Perhaps similar to Turbo C's outputb(0x378,0x01) to write and
>> >> inportb(0x378) to read. I read the PPC440EPx manual but I find it
>> >> difficult to understand.
>> >>
>> >> Could anyone show me any tutorial or some sample codes?
>> >
>> > I copied the code below from some test code I wrote for a TS7300
>> > board (uses an ARM EP9302 processor). However, since its user-space
>> > code it should work fine.
>> >
>>
>> I might be a little out of date, but I think you must write your own
>> driver to wiggle the GPIO pins on a 440 processor. I just finished a
>> project using a 440GX with a 2.6.15 kernel (we froze the code about 8
>> months ago).
>>
>> The 440 powerPC core is a 32-bit processor with 36-bit physical
>> addresses. The physical address for the GPIO pins is someplace above
>> 4GB. An mmap() of /dev/mem only lets you map the lower 4GB of the
>> address space, as a result you can't write a user space program on the
>> 440 to wiggle the GPIO pins. (This was true with 2.6.15, I can't speak
>> for later kernels).
>
> This depends on the 440 chip itself. If I recall correctly, the
> 440EP(x) chips don't have I/O above 4GB.
>
> josh
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
>
--
View this message in context: http://www.nabble.com/PPC440EPx-GPIO-control-help-tf4638058.html#a13252501
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* Re: [PATCH 04/15] [POWERPC] CM5200 DTS
From: Marian Balakowicz @ 2007-10-17 12:22 UTC (permalink / raw)
To: David Gibson, linuxppc-dev
In-Reply-To: <20071008015021.GA12499@localhost.localdomain>
David Gibson wrote:
> [snip]
>> + flash@c000000 {
>> + device_type = "rom";
>> + compatible = "direct-mapped";
>> + reg = <0c000000 02000000>;
>> + probe-type = "CFI";
>> + bank-width = <2>;
>> + partitions = <00000000 00060000
>> + 00060000 00020000
>> + 00080000 00020000
>> + 000a0000 00020000
>> + 000c0000 00200000
>> + 002c0000 01b40000
>> + 01e00000 00200000>;
>> + partition-names = "uboot\0env\0redund_env\0dtb\0kernel\0rootfs\0config";
>> + };
>
> First, this is the old flash binding, please use the new one.
Ok.
> Second, is the flash really part of the SoC?
Not directly, it is attached to LocalPlus Bus Controller, which is
part of the SoC. And the soc@ is currently the only recognized of bus
for mpc5200, so if we want to move it to some other place new bindings
will need to be defined for lpc (LocalPlus Controller) bus. But I am
not quite sure where this should be attached. Bus is under LPC which
is a part of the SoC, but on the other hand Soc address range covers
only device control registers not the address space LPC may handle
(that may be varied). Any ideas?
m.
^ permalink raw reply
* Re: [PATCH v2 1/4] Implement {read,update}_persistent_clock.
From: Sergei Shtylyov @ 2007-10-17 12:45 UTC (permalink / raw)
To: benh
Cc: linuxppc-dev, Thomas Gleixner, Paul Mackerras, Realtime Kernel,
Steven Rostedt
In-Reply-To: <1192497543.19073.0.camel@pasglop>
Hello.
Benjamin Herrenschmidt wrote:
>> Eh... poor you. Tony got clockevent driver reengineered for no apparent
>>reason. And he's introduced the jiffy drift by deleting the main loop from
>>timer_interrupt(). Yet this borken version was preferred to what was known
>>working since about 2.6.18 and included into 2.6.21-rt patchset. I don't like
>>that policy. Will you be pushing fixes from -rt to PowerPC, or will it fall on
>>my shoulders now?
> Possibly because whatever implementation existed before was never
> provided in a mergeable form
The fact that vDSO calls were removed out of the necessity (because having
the broken TOD stuff removed was better than to leave it in place producing
inexact results) doesn't mean that everything in the patches provided was
broken and of no use. Yet you want everything removed in favor of somewhat
dubious implementation.
> and pushed to -rt bypassing the powerpc architecture maintainer ?
There was no bypassing, everything was submitted publicly via this list.
The -rt patch (via the hrtimers patchset) was the place to merge the hrtimers
code at thiat time, and nobody showed any interest in making the code better,
i.e. amending vDSO stuff, for months... (The question also is why Tony was
submitting his patches also to linux-rt-users while they were known not to
apply to the -rt patch.)
> Ben.
WBR, Sergei
^ permalink raw reply
* Please pull powerpc.git merge branch
From: Paul Mackerras @ 2007-10-17 12:49 UTC (permalink / raw)
To: torvalds; +Cc: linuxppc-dev
Linus,
Please do
git pull \
git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc.git merge
to get some a collection of fixes for powerpc, plus a set of commits
that add some new driver code for the "bestcomm" hardware on some
Freescale embedded PowerPC chips.
Thanks,
Paul.
arch/powerpc/Kconfig | 4
arch/powerpc/boot/dts/lite5200b.dts | 18 +
arch/powerpc/configs/bamboo_defconfig | 7
arch/powerpc/configs/celleb_defconfig | 7
arch/powerpc/configs/chrp32_defconfig | 7
arch/powerpc/configs/ebony_defconfig | 7
arch/powerpc/configs/g5_defconfig | 7
arch/powerpc/configs/holly_defconfig | 7
arch/powerpc/configs/iseries_defconfig | 7
arch/powerpc/configs/kilauea_defconfig | 7
arch/powerpc/configs/linkstation_defconfig | 7
arch/powerpc/configs/lite5200_defconfig | 7
arch/powerpc/configs/maple_defconfig | 8
arch/powerpc/configs/mpc7448_hpc2_defconfig | 5
arch/powerpc/configs/mpc8272_ads_defconfig | 7
arch/powerpc/configs/mpc8313_rdb_defconfig | 7
arch/powerpc/configs/mpc832x_mds_defconfig | 5
arch/powerpc/configs/mpc832x_rdb_defconfig | 5
arch/powerpc/configs/mpc834x_itx_defconfig | 5
arch/powerpc/configs/mpc834x_itxgp_defconfig | 5
arch/powerpc/configs/mpc834x_mds_defconfig | 5
arch/powerpc/configs/mpc836x_mds_defconfig | 5
arch/powerpc/configs/mpc8540_ads_defconfig | 7
arch/powerpc/configs/mpc8544_ds_defconfig | 7
arch/powerpc/configs/mpc8560_ads_defconfig | 7
arch/powerpc/configs/mpc8568mds_defconfig | 7
arch/powerpc/configs/mpc8572_ds_defconfig | 7
arch/powerpc/configs/mpc85xx_cds_defconfig | 7
arch/powerpc/configs/mpc8610_hpcd_defconfig | 7
arch/powerpc/configs/mpc8641_hpcn_defconfig | 7
arch/powerpc/configs/mpc866_ads_defconfig | 5
arch/powerpc/configs/pasemi_defconfig | 7
arch/powerpc/configs/pmac32_defconfig | 7
arch/powerpc/configs/ppc64_defconfig | 11
arch/powerpc/configs/pq2fads_defconfig | 7
arch/powerpc/configs/prpmc2800_defconfig | 5
arch/powerpc/configs/ps3_defconfig | 7
arch/powerpc/configs/pseries_defconfig | 11
arch/powerpc/configs/sequoia_defconfig | 7
arch/powerpc/configs/walnut_defconfig | 7
arch/powerpc/kernel/entry_64.S | 6
arch/powerpc/kernel/ibmebus.c | 263 +++-------
arch/powerpc/kernel/of_device.c | 80 +++
arch/powerpc/kernel/of_platform.c | 70 ---
arch/powerpc/kernel/setup_64.c | 13
arch/powerpc/kernel/time.c | 2
arch/powerpc/kernel/vdso64/sigtramp.S | 11
arch/powerpc/lib/Makefile | 5
arch/powerpc/lib/rheap.c | 15 +
arch/powerpc/math-emu/math.c | 13
arch/powerpc/mm/hash_utils_64.c | 3
arch/powerpc/mm/init_64.c | 2
arch/powerpc/mm/slb.c | 3
arch/powerpc/platforms/Kconfig | 4
arch/powerpc/platforms/Kconfig.cputype | 1
arch/powerpc/platforms/iseries/htab.c | 4
arch/powerpc/platforms/iseries/vio.c | 2
arch/powerpc/sysdev/Makefile | 1
arch/powerpc/sysdev/bestcomm/Kconfig | 39 +
arch/powerpc/sysdev/bestcomm/Makefile | 14 +
arch/powerpc/sysdev/bestcomm/ata.c | 154 ++++++
arch/powerpc/sysdev/bestcomm/ata.h | 37 +
arch/powerpc/sysdev/bestcomm/bcom_ata_task.c | 67 +++
arch/powerpc/sysdev/bestcomm/bcom_fec_rx_task.c | 78 +++
arch/powerpc/sysdev/bestcomm/bcom_fec_tx_task.c | 91 +++
arch/powerpc/sysdev/bestcomm/bcom_gen_bd_rx_task.c | 63 ++
arch/powerpc/sysdev/bestcomm/bcom_gen_bd_tx_task.c | 69 +++
arch/powerpc/sysdev/bestcomm/bestcomm.c | 528 ++++++++++++++++++++
arch/powerpc/sysdev/bestcomm/bestcomm.h | 190 +++++++
arch/powerpc/sysdev/bestcomm/bestcomm_priv.h | 334 +++++++++++++
arch/powerpc/sysdev/bestcomm/fec.c | 270 ++++++++++
arch/powerpc/sysdev/bestcomm/fec.h | 61 ++
arch/powerpc/sysdev/bestcomm/gen_bd.c | 260 ++++++++++
arch/powerpc/sysdev/bestcomm/gen_bd.h | 48 ++
arch/powerpc/sysdev/bestcomm/sram.c | 177 +++++++
arch/powerpc/sysdev/bestcomm/sram.h | 54 ++
arch/powerpc/sysdev/fsl_pci.c | 2
arch/ppc/Kconfig | 6
drivers/infiniband/hw/ehca/ehca_classes.h | 2
drivers/infiniband/hw/ehca/ehca_eq.c | 6
drivers/infiniband/hw/ehca/ehca_main.c | 32 +
drivers/net/ehea/ehea.h | 2
drivers/net/ehea/ehea_main.c | 72 +--
include/asm-powerpc/cputable.h | 3
include/asm-powerpc/ibmebus.h | 38 -
include/asm-powerpc/of_device.h | 4
include/asm-ppc/mpc52xx_psc.h | 10
include/linux/of_device.h | 5
88 files changed, 3010 insertions(+), 483 deletions(-)
create mode 100644 arch/powerpc/sysdev/bestcomm/Kconfig
create mode 100644 arch/powerpc/sysdev/bestcomm/Makefile
create mode 100644 arch/powerpc/sysdev/bestcomm/ata.c
create mode 100644 arch/powerpc/sysdev/bestcomm/ata.h
create mode 100644 arch/powerpc/sysdev/bestcomm/bcom_ata_task.c
create mode 100644 arch/powerpc/sysdev/bestcomm/bcom_fec_rx_task.c
create mode 100644 arch/powerpc/sysdev/bestcomm/bcom_fec_tx_task.c
create mode 100644 arch/powerpc/sysdev/bestcomm/bcom_gen_bd_rx_task.c
create mode 100644 arch/powerpc/sysdev/bestcomm/bcom_gen_bd_tx_task.c
create mode 100644 arch/powerpc/sysdev/bestcomm/bestcomm.c
create mode 100644 arch/powerpc/sysdev/bestcomm/bestcomm.h
create mode 100644 arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
create mode 100644 arch/powerpc/sysdev/bestcomm/fec.c
create mode 100644 arch/powerpc/sysdev/bestcomm/fec.h
create mode 100644 arch/powerpc/sysdev/bestcomm/gen_bd.c
create mode 100644 arch/powerpc/sysdev/bestcomm/gen_bd.h
create mode 100644 arch/powerpc/sysdev/bestcomm/sram.c
create mode 100644 arch/powerpc/sysdev/bestcomm/sram.h
Anton Blanchard (4):
[POWERPC] Enable SLUB in *_defconfig
[POWERPC] Quieten clockevent printk
[POWERPC] Quieten cache information at boot
[POWERPC] Enable NO_HZ and high res timers for pseries and ppc64 configs
Benjamin Herrenschmidt (1):
[POWERPC] Fix 64 bits vDSO DWARF info for CR register
Domen Puncer (1):
[POWERPC] mpc52xx: device tree changes for FEC and MDIO
Joachim Fenkes (4):
[POWERPC] Move of_device allocation into of_device.[ch]
[POWERPC] ibmebus: Remove bus match/probe/remove functions
[POWERPC] ibmebus: Add device creation and bus probing based on of_device
[POWERPC] ibmebus: Move to of_device and of_platform_driver, match eHCA and eHEA drivers
Kumar Gala (1):
[POWERPC] Fix handling of stfiwx math emulation
Olof Johansson (2):
[POWERPC] Fix 1TB segment detection
[POWERPC] Add 1TB workaround for PA6T
Stephen Rothwell (2):
[POWERPC] Fix copyright symbol
[POWERPC] Fix iSeries_hpte_insert prototype
Sylvain Munaut (7):
[POWERPC] exports rheap symbol to modules
[POWERPC] rheap: Changes config mechanism
[POWERPC] mpc52xx: Update mpc52xx_psc structure with B revision changes
[POWERPC] bestcomm: core bestcomm support for Freescale MPC5200
[POWERPC] bestcomm: ATA task support
[POWERPC] bestcomm: FEC task support
[POWERPC] bestcomm: GenBD task support
Tony Breeds (1):
[POWERPC] Fix vmemmap warning in init_64.c
Tony Li (1):
[POWERPC] Add missing semicolon for fsl_pci.c
^ permalink raw reply
* [PATCH 0/4] [POWERPC] MPC5200: update gpt binding, add restart support
From: Marian Balakowicz @ 2007-10-17 12:56 UTC (permalink / raw)
To: linuxppc-dev
This is a reworked version of patches to MPC5200 common code that were send
together with the TQM5200/CM5200/Motion-PRO board support chnages.
As there are some open issues in a board support code and to avoid
additional respin I would like to have those reviewed first.
[PATCH 1/4] [POWERPC] Add mpc52xx_find_and_map_path(), refactor utility functions
[PATCH 2/4] [POWERPC] Update device tree binding for mpc5200 gpt
[PATCH 3/4] [POWERPC] Add restart support for mpc52xx based platforms
[PATCH 4/4] [POWERPC] Enable restart support for lite5200 board
Cheers,
Marian Balakowicz
^ permalink raw reply
* [PATCH 1/4] [POWERPC] Add mpc52xx_find_and_map_path(), refactor utility functions
From: Marian Balakowicz @ 2007-10-17 12:58 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <47160689.4020301@semihalf.com>
Add helper routine mpc52xx_find_and_map_path(). Extract common code to
mpc52xx_map_node() and refactor mpc52xx_find_and_map().
Signed-off-by: Jan Wrobel <wrr@semihalf.com>
Reviewed-by: Grant Likely <grant.likely@secretlab.ca>
---
arch/powerpc/platforms/52xx/mpc52xx_common.c | 21 +++++++++++++++++----
include/asm-powerpc/mpc52xx.h | 1 +
2 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c
index 3bc201e..74b4b41 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -19,14 +19,12 @@ #include <asm/prom.h>
#include <asm/mpc52xx.h>
-void __iomem *
-mpc52xx_find_and_map(const char *compatible)
+static void __iomem *
+mpc52xx_map_node(struct device_node *ofn)
{
- struct device_node *ofn;
const u32 *regaddr_p;
u64 regaddr64, size64;
- ofn = of_find_compatible_node(NULL, NULL, compatible);
if (!ofn)
return NULL;
@@ -42,8 +40,23 @@ mpc52xx_find_and_map(const char *compati
return ioremap((u32)regaddr64, (u32)size64);
}
+
+void __iomem *
+mpc52xx_find_and_map(const char *compatible)
+{
+ return mpc52xx_map_node(
+ of_find_compatible_node(NULL, NULL, compatible));
+}
+
EXPORT_SYMBOL(mpc52xx_find_and_map);
+void __iomem *
+mpc52xx_find_and_map_path(const char *path)
+{
+ return mpc52xx_map_node(of_find_node_by_path(path));
+}
+
+EXPORT_SYMBOL(mpc52xx_find_and_map_path);
/**
* mpc52xx_find_ipb_freq - Find the IPB bus frequency for a device
diff --git a/include/asm-powerpc/mpc52xx.h b/include/asm-powerpc/mpc52xx.h
index 24751df..9cf05f9 100644
--- a/include/asm-powerpc/mpc52xx.h
+++ b/include/asm-powerpc/mpc52xx.h
@@ -242,6 +242,7 @@ #endif /* __ASSEMBLY__ */
#ifndef __ASSEMBLY__
extern void __iomem * mpc52xx_find_and_map(const char *);
+extern void __iomem * mpc52xx_find_and_map_path(const char *path);
extern unsigned int mpc52xx_find_ipb_freq(struct device_node *node);
extern void mpc5200_setup_xlb_arbiter(void);
extern void mpc52xx_declare_of_platform_devices(void);
^ permalink raw reply related
* [PATCH 2/4] [POWERPC] Update device tree binding for mpc5200 gpt
From: Marian Balakowicz @ 2007-10-17 12:59 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <47160689.4020301@semihalf.com>
Add 'fsl,' prefix to 'compatible' property for gpt nodes.
Add 'fsl,' prefix to empty, GPT0 specific 'has-wdt' property.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
---
Documentation/powerpc/mpc52xx-device-tree-bindings.txt | 4 +-
arch/powerpc/boot/dts/lite5200.dts | 26 +++++------------
arch/powerpc/boot/dts/lite5200b.dts | 26 +++++------------
drivers/char/watchdog/mpc5200_wdt.c | 4 +-
4 files changed, 22 insertions(+), 38 deletions(-)
diff --git a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
index e59fcbb..fedf7ef 100644
--- a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
+++ b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
@@ -185,7 +185,7 @@ bestcomm@<addr> dma-controller mpc5200-
Recommended soc5200 child nodes; populate as needed for your board
name device_type compatible Description
---- ----------- ---------- -----------
-gpt@<addr> gpt mpc5200-gpt General purpose timers
+gpt@<addr> gpt fsl,mpc5200-gpt General purpose timers
rtc@<addr> rtc mpc5200-rtc Real time clock
mscan@<addr> mscan mpc5200-mscan CAN bus controller
pci@<addr> pci mpc5200-pci PCI bridge
@@ -213,7 +213,7 @@ cell-index int When multiple devices ar
5) General Purpose Timer nodes (child of soc5200 node)
On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board
design supports the internal wdt, then the device node for GPT0 should
-include the empty property 'has-wdt'.
+include the empty property 'fsl,has-wdt'.
6) PSC nodes (child of soc5200 node)
PSC nodes can define the optional 'port-number' property to force assignment
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index bc45f5f..6731763 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -70,18 +70,16 @@
};
gpt@600 { // General Purpose Timer
- compatible = "mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200-gpt";
cell-index = <0>;
reg = <600 10>;
interrupts = <1 9 0>;
interrupt-parent = <&mpc5200_pic>;
- has-wdt;
+ fsl,has-wdt;
};
gpt@610 { // General Purpose Timer
- compatible = "mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200-gpt";
cell-index = <1>;
reg = <610 10>;
interrupts = <1 a 0>;
@@ -89,8 +87,7 @@
};
gpt@620 { // General Purpose Timer
- compatible = "mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200-gpt";
cell-index = <2>;
reg = <620 10>;
interrupts = <1 b 0>;
@@ -98,8 +95,7 @@
};
gpt@630 { // General Purpose Timer
- compatible = "mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200-gpt";
cell-index = <3>;
reg = <630 10>;
interrupts = <1 c 0>;
@@ -107,8 +103,7 @@
};
gpt@640 { // General Purpose Timer
- compatible = "mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200-gpt";
cell-index = <4>;
reg = <640 10>;
interrupts = <1 d 0>;
@@ -116,8 +111,7 @@
};
gpt@650 { // General Purpose Timer
- compatible = "mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200-gpt";
cell-index = <5>;
reg = <650 10>;
interrupts = <1 e 0>;
@@ -125,8 +119,7 @@
};
gpt@660 { // General Purpose Timer
- compatible = "mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200-gpt";
cell-index = <6>;
reg = <660 10>;
interrupts = <1 f 0>;
@@ -134,8 +127,7 @@
};
gpt@670 { // General Purpose Timer
- compatible = "mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200-gpt";
cell-index = <7>;
reg = <670 10>;
interrupts = <1 10 0>;
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index a6bb1d0..9d12f28 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -70,18 +70,16 @@
};
gpt@600 { // General Purpose Timer
- compatible = "mpc5200b-gpt","mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <0>;
reg = <600 10>;
interrupts = <1 9 0>;
interrupt-parent = <&mpc5200_pic>;
- has-wdt;
+ fsl,has-wdt;
};
gpt@610 { // General Purpose Timer
- compatible = "mpc5200b-gpt","mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <1>;
reg = <610 10>;
interrupts = <1 a 0>;
@@ -89,8 +87,7 @@
};
gpt@620 { // General Purpose Timer
- compatible = "mpc5200b-gpt","mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <2>;
reg = <620 10>;
interrupts = <1 b 0>;
@@ -98,8 +95,7 @@
};
gpt@630 { // General Purpose Timer
- compatible = "mpc5200b-gpt","mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <3>;
reg = <630 10>;
interrupts = <1 c 0>;
@@ -107,8 +103,7 @@
};
gpt@640 { // General Purpose Timer
- compatible = "mpc5200b-gpt","mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <4>;
reg = <640 10>;
interrupts = <1 d 0>;
@@ -116,8 +111,7 @@
};
gpt@650 { // General Purpose Timer
- compatible = "mpc5200b-gpt","mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <5>;
reg = <650 10>;
interrupts = <1 e 0>;
@@ -125,8 +119,7 @@
};
gpt@660 { // General Purpose Timer
- compatible = "mpc5200b-gpt","mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <6>;
reg = <660 10>;
interrupts = <1 f 0>;
@@ -134,8 +127,7 @@
};
gpt@670 { // General Purpose Timer
- compatible = "mpc5200b-gpt","mpc5200-gpt";
- device_type = "gpt";
+ compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
cell-index = <7>;
reg = <670 10>;
interrupts = <1 10 0>;
diff --git a/drivers/char/watchdog/mpc5200_wdt.c b/drivers/char/watchdog/mpc5200_wdt.c
index 564143d..9aaba7a 100644
--- a/drivers/char/watchdog/mpc5200_wdt.c
+++ b/drivers/char/watchdog/mpc5200_wdt.c
@@ -174,7 +174,7 @@ static int mpc5200_wdt_probe(struct of_d
const void *has_wdt;
int size;
- has_wdt = of_get_property(op->node, "has-wdt", NULL);
+ has_wdt = of_get_property(op->node, "fsl,has-wdt", NULL);
if (!has_wdt)
return -ENODEV;
@@ -253,7 +253,7 @@ static int mpc5200_wdt_shutdown(struct o
}
static struct of_device_id mpc5200_wdt_match[] = {
- { .compatible = "mpc5200-gpt", },
+ { .compatible = "fsl,mpc5200-gpt", },
{},
};
static struct of_platform_driver mpc5200_wdt_driver = {
^ permalink raw reply related
* [PATCH 3/4] [POWERPC] Add restart support for mpc52xx based platforms
From: Marian Balakowicz @ 2007-10-17 13:01 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <47160689.4020301@semihalf.com>
Add common helper routines: mpc52xx_map_wdt() and mpc52xx_restart().
This patch relies on Sascha Hauer's patch published in:
http://patchwork.ozlabs.org/linuxppc/patch?id=8910.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
arch/powerpc/platforms/52xx/mpc52xx_common.c | 45 +++++++++++++++++++++++++++
include/asm-powerpc/mpc52xx.h | 3 +
2 files changed, 48 insertions(+)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_common.c b/arch/powerpc/platforms/52xx/mpc52xx_common.c
index 74b4b41..553937b 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_common.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_common.c
@@ -18,6 +18,13 @@ #include <asm/io.h>
#include <asm/prom.h>
#include <asm/mpc52xx.h>
+/*
+ * This variable is mapped in mpc52xx_map_wdt() and used in mpc52xx_restart().
+ * Permanent mapping is required because mpc52xx_restart() can be called
+ * from interrupt context while node mapping (which calls iorenmap())
+ * cannot be used at such point.
+ */
+static volatile struct mpc52xx_gpt *mpc52xx_wdt = NULL;
static void __iomem *
mpc52xx_map_node(struct device_node *ofn)
@@ -126,3 +133,41 @@ mpc52xx_declare_of_platform_devices(void
"Error while probing of_platform bus\n");
}
+void __init
+mpc52xx_map_wdt(void)
+{
+ const void *has_wdt;
+ struct device_node *np;
+
+ /* mpc52xx_wdt is mapped here and used in mpc52xx_restart,
+ * possibly from a interrupt context. */
+
+ for (np = NULL;
+ (np = of_find_compatible_node(np, NULL, "fsl,mpc5200-gpt")) != NULL;
+ ) {
+ /* wdt is only implement on gpt0, check has-wdt property. */
+ has_wdt = of_get_property(np, "fsl,has-wdt", NULL);
+ if (has_wdt) {
+ mpc52xx_wdt = mpc52xx_map_node(np);
+ break;
+ }
+ }
+}
+
+void
+mpc52xx_restart(char *cmd)
+{
+ local_irq_disable();
+
+ /* Turn on the watchdog and wait for it to expire.
+ * It effectively does a reset. */
+ if (mpc52xx_wdt) {
+ out_be32(&mpc52xx_wdt->mode, 0x00000000);
+ out_be32(&mpc52xx_wdt->count, 0x000000ff);
+ out_be32(&mpc52xx_wdt->mode, 0x00009004);
+ } else
+ printk("mpc52xx_restart: Can't access wdt. "
+ "Restart impossible, system halted.\n");
+
+ while (1);
+}
diff --git a/include/asm-powerpc/mpc52xx.h b/include/asm-powerpc/mpc52xx.h
index 9cf05f9..39f619f 100644
--- a/include/asm-powerpc/mpc52xx.h
+++ b/include/asm-powerpc/mpc52xx.h
@@ -252,6 +252,9 @@ extern unsigned int mpc52xx_get_irq(void
extern int __init mpc52xx_add_bridge(struct device_node *node);
+extern void __init mpc52xx_map_wdt(void);
+extern void mpc52xx_restart(char *cmd);
+
#endif /* __ASSEMBLY__ */
#ifdef CONFIG_PM
^ permalink raw reply related
* [PATCH 4/4] [POWERPC] Enable restart support for lite5200 board
From: Marian Balakowicz @ 2007-10-17 13:02 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <47160689.4020301@semihalf.com>
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
---
lite5200.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/platforms/52xx/lite5200.c b/arch/powerpc/platforms/52xx/lite5200.c
index 0caa3d9..ce9e3ee 100644
--- a/arch/powerpc/platforms/52xx/lite5200.c
+++ b/arch/powerpc/platforms/52xx/lite5200.c
@@ -143,6 +143,9 @@ #endif
/* Some mpc5200 & mpc5200b related configuration */
mpc5200_setup_xlb_arbiter();
+ /* Map wdt for mpc52xx_restart() */
+ mpc52xx_map_wdt();
+
#ifdef CONFIG_PM
mpc52xx_suspend.board_suspend_prepare = lite5200_suspend_prepare;
mpc52xx_suspend.board_resume_finish = lite5200_resume_finish;
@@ -193,5 +196,6 @@ define_machine(lite5200) {
.init = mpc52xx_declare_of_platform_devices,
.init_IRQ = mpc52xx_init_irq,
.get_irq = mpc52xx_get_irq,
+ .restart = mpc52xx_restart,
.calibrate_decr = generic_calibrate_decr,
};
^ permalink raw reply related
* Re: Please pull linux-2.6-mpc52xx.git
From: Grant Likely @ 2007-10-17 13:13 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <18197.58241.482810.3553@cargo.ozlabs.ibm.com>
On 10/17/07, Paul Mackerras <paulus@samba.org> wrote:
> Grant Likely writes:
>
> > There are remaining outstanding comments; but my opinion is that they
> > should be addressed in subsequent patches (performance optimization
> > for mp5200b boards and making the sram management code a generic
> > interface usable by other SoC support code).
> >
> > If you agree; please pull into your tree.
>
> I'll pull it on the understanding that the remaining issues will in
> fact be addressed in the near term.
agreed
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: Merge dtc
From: Grant Likely @ 2007-10-17 13:15 UTC (permalink / raw)
To: Grant Likely, Paul Mackerras, Josh Boyer, linuxppc-dev
In-Reply-To: <20071017052220.GA3801@localhost.localdomain>
On 10/16/07, David Gibson <dwg@au1.ibm.com> wrote:
> On Tue, Oct 16, 2007 at 07:17:01AM -0600, Grant Likely wrote:
> > On 10/15/07, David Gibson <david@gibson.dropbear.id.au> wrote:
> > > This very large patch incorporates a copy of dtc into the kernel
> > > source, in arch/powerpc/boot/dtc-src. This means that dtc is no
> > > longer an external dependency to build kernels with configurations
> > > which need a dtb file.
> >
> > Powerpc is probably not going to be the only user of dtc. Microblaze
> > will be using it too. Can it be put somewhere more common?
>
> Well, I guess we can move it to scripts/ when microblaze starts using
> it.
>
> Also, tell me more about this microblaze, I'm certainly interested in
> new users of dtc...
It's a 'soft processor'. Implemented in the fabric of an FPGA. It's
a ucLinux target. Xilinx Virtex and Xilinx MicroBlaze targets share a
lot of common devices.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: linux-2.6.git: cannot build PS3 image
From: Geert Uytterhoeven @ 2007-10-17 13:23 UTC (permalink / raw)
To: Scott Wood, Kumar Gala; +Cc: Linux/PPC Development
In-Reply-To: <Pine.LNX.4.62.0710121531250.757@pademelon.sonytel.be>
[-- Attachment #1: Type: TEXT/PLAIN, Size: 2283 bytes --]
On Fri, 12 Oct 2007, Geert Uytterhoeven wrote:
> On Fri, 12 Oct 2007, Geert Uytterhoeven wrote:
> > On current linux-2.6.git (782e3b3b3804c38d5130c7f21d7ec7bf6709023f), I get:
> >
> > | WRAP arch/powerpc/boot/zImage.ps3
> > | DTC: dts->dtb on file "/usr/people/geert.nba/ps3/ps3-linux-2.6/arch/powerpc/boot/dts/ps3.dts"
> > | ln: accessing `arch/powerpc/boot/zImage.ps3': No such file or directory
> >
> > `make V=1' gives:
> >
> > | /bin/sh ps3-linux-2.6/arch/powerpc/boot/wrapper -c -o arch/powerpc/boot/zImage.ps3 -p ps3 -C "ppu-" -s ps3-linux-2.6/arch/powerpc/boot/dts/ps3.dts vmlinux
> > | DTC: dts->dtb on file "ps3-linux-2.6/arch/powerpc/boot/dts/ps3.dts"
> > | ln: accessing `arch/powerpc/boot/zImage.ps3': No such file or directory
> >
> > I don't see a change to arch/powerpc/boot/Makefile that could explain this.
>
> After bisecting between 2.6.23 and current, I found the culprit:
>
> > commit 11c146cc19df337f4af42dade9e4fca33c5a54ee
> > Author: Scott Wood <scottwood@freescale.com>
> > Date: Fri Sep 14 14:58:25 2007 -0500
> >
> > [POWERPC] 8xx/wrapper: Embedded Planet EP88xC support
> Below is a quick and dirty temporary fix:
>
> diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
> index 39b27e5..795f988 100755
> --- a/arch/powerpc/boot/wrapper
> +++ b/arch/powerpc/boot/wrapper
> @@ -232,7 +232,7 @@ base=0x`${CROSS}nm "$ofile" | grep ' _start$' | cut -d' ' -f1`
> entry=`${CROSS}objdump -f "$ofile" | grep '^start address ' | cut -d' ' -f3`
>
> if [ -n "$binary" ]; then
> - mv "$ofile" "$ofile".elf
> + cp "$ofile" "$ofile".elf
> ${CROSS}objcopy -O binary "$ofile".elf "$ofile".bin
> fi
No comments?
With kind regards,
Geert Uytterhoeven
Software Architect
Sony Network and Software Technology Center Europe
The Corporate Village · Da Vincilaan 7-D1 · B-1935 Zaventem · Belgium
Phone: +32 (0)2 700 8453
Fax: +32 (0)2 700 8622
E-mail: Geert.Uytterhoeven@sonycom.com
Internet: http://www.sony-europe.com/
Sony Network and Software Technology Center Europe
A division of Sony Service Centre (Europe) N.V.
Registered office: Technologielaan 7 · B-1840 Londerzeel · Belgium
VAT BE 0413.825.160 · RPR Brussels
Fortis Bank Zaventem · Swift GEBABEBB08A · IBAN BE39001382358619
^ permalink raw reply
* Re: Please pull powerpc.git merge branch
From: Josh Boyer @ 2007-10-17 13:31 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <18198.1222.253923.277227@cargo.ozlabs.ibm.com>
On Wed, 17 Oct 2007 22:49:10 +1000
Paul Mackerras <paulus@samba.org> wrote:
> Linus,
>
> Please do
>
> git pull \
> git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc.git merge
Could you please pull this into your master and/or for-2.6.24
branches? It'll make it easier on those of us tracking your tree.
josh
^ permalink raw reply
* Re: [PATCH v3 2/9] ipic: add new interrupts introduced by new chip
From: Kumar Gala @ 2007-10-17 13:45 UTC (permalink / raw)
To: Li Yang; +Cc: linuxppc-dev, paulus
In-Reply-To: <1192195728-24189-3-git-send-email-leoli@freescale.com>
On Oct 12, 2007, at 8:28 AM, Li Yang wrote:
> These interrupts are introduced by the latest Freescale SoC such as
> MPC837x. The patch also adds comment to interrupts.
>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/sysdev/ipic.c | 224 +++++++++++++++++++++++++++++++++
> +----------
> arch/powerpc/sysdev/ipic.h | 7 +-
> include/asm-powerpc/ipic.h | 12 ++-
> 3 files changed, 186 insertions(+), 57 deletions(-)
>
> diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
> index 05a56e5..cd8590d 100644
> --- a/arch/powerpc/sysdev/ipic.c
> +++ b/arch/powerpc/sysdev/ipic.c
> @@ -33,7 +33,31 @@ static struct ipic * primary_ipic;
> static DEFINE_SPINLOCK(ipic_lock);
>
> static struct ipic_info ipic_info[] = {
> - [9] = {
> + [1] = { /* PEX1 CNT */
Remove the comments, they are not correct for all IPIC users and thus
misleading.
> + .pend = IPIC_SIPNR_H,
> + .mask = IPIC_SIMSR_H,
> + .prio = IPIC_SIPRR_C,
> + .force = IPIC_SIFCR_H,
> + .bit = 16,
> + .prio_mask = 0,
> + },
[snip]
- k
^ permalink raw reply
* Re: [PATCH v3 4/9] add platform support for MPC837x MDS board
From: Kumar Gala @ 2007-10-17 13:47 UTC (permalink / raw)
To: Li Yang; +Cc: linuxppc-dev, paulus
In-Reply-To: <1192195728-24189-5-git-send-email-leoli@freescale.com>
On Oct 12, 2007, at 8:28 AM, Li Yang wrote:
> The MPC837x MDS is a new member of Freescale MDS reference system.
>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/platforms/83xx/Kconfig | 12 ++++
> arch/powerpc/platforms/83xx/Makefile | 1 +
> arch/powerpc/platforms/83xx/mpc837x_mds.c | 103 ++++++++++++++++++
> +++++++++++
> 3 files changed, 116 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/platforms/83xx/mpc837x_mds.c
>
> diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/
> platforms/83xx/Kconfig
> index ec305f1..0c61e7a 100644
> --- a/arch/powerpc/platforms/83xx/Kconfig
> +++ b/arch/powerpc/platforms/83xx/Kconfig
> @@ -50,6 +50,11 @@ config MPC836x_MDS
> help
> This option enables support for the MPC836x MDS Processor Board.
>
> +config MPC837x_MDS
> + bool "Freescale MPC837x MDS"
> + select DEFAULT_UIMAGE
> + help
> + This option enables support for the MPC837x MDS Processor Board.
> endchoice
>
> config PPC_MPC831x
> @@ -75,3 +80,10 @@ config PPC_MPC836x
> select PPC_UDBG_16550
> select PPC_INDIRECT_PCI
> default y if MPC836x_MDS
> +
> +config PPC_MPC837x
> + bool
> + select PPC_UDBG_16550
> + select PPC_INDIRECT_PCI
> + select FSL_SERDES
> + default y if MPC837x_MDS
Do we really need this Kconfig option for anything?
- k
^ permalink raw reply
* Re: [PATCH] powerpc: Fix 64 bits vDSO dwarf info for CR register
From: Jakub Jelinek @ 2007-10-17 13:50 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: Deepak Bhole, linuxppc-dev list, Andrew Haley, Paul Mackerras,
Alan Modra
In-Reply-To: <1192595210.11899.149.camel@pasglop>
On Wed, Oct 17, 2007 at 02:26:50PM +1000, Benjamin Herrenschmidt wrote:
> Unfortunately, a bug in gcc cause it to not quite work either, but that
> is being fixed separately with something around the lines of:
>
> linux-unwind.h:
>
> fs->regs.reg[R_CR2].loc.offset = (long) ®s->ccr - new_cfa;
> + /* CR? regs are just 32-bit and PPC is big-endian. */
> + fs->regs.reg[R_CR2].loc.offset += sizeof (long) - 4;
Small correction. If vdso is present, then fixing the vdso is all that is
needed, the above mentioned code is used only if the vdso is not present
(or if glibc doesn't support the vdso).
Jakub
^ permalink raw reply
* Re: [PATCH v4 9/9] add MPC837x MDS board default device tree
From: Kumar Gala @ 2007-10-17 13:54 UTC (permalink / raw)
To: Li Yang; +Cc: linuxppc-dev, paulus
In-Reply-To: <1192460210-26920-1-git-send-email-leoli@freescale.com>
On Oct 15, 2007, at 9:56 AM, Li Yang wrote:
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/boot/dts/mpc8377_mds.dts | 281 ++++++++++++++++++++++
> +++++++++
> arch/powerpc/boot/dts/mpc8378_mds.dts | 263 ++++++++++++++++++++++
> +++++++
> arch/powerpc/boot/dts/mpc8379_mds.dts | 299 ++++++++++++++++++++++
> +++++++++++
> 3 files changed, 843 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/mpc8377_mds.dts
> create mode 100644 arch/powerpc/boot/dts/mpc8378_mds.dts
> create mode 100644 arch/powerpc/boot/dts/mpc8379_mds.dts
>
> diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/
> boot/dts/mpc8377_mds.dts
> new file mode 100644
> index 0000000..d0bd326
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
> @@ -0,0 +1,281 @@
> +/*
> + * MPC8377E MDS Device Tree Source
> + *
> + * Copyright 2007 Freescale Semiconductor Inc.
> + *
> + * This program is free software; you can redistribute it and/or
> modify it
> + * under the terms of the GNU General Public License as
> published by the
> + * Free Software Foundation; either version 2 of the License, or
> (at your
> + * option) any later version.
> + */
> +
> +/ {
> + model = "fsl,mpc8377emds";
> + compatible = "fsl,mpc8377emds","fsl,mpc837xmds";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + PowerPC,837x@0 {
> + device_type = "cpu";
> + reg = <0>;
> + d-cache-line-size = <20>;
> + i-cache-line-size = <20>;
> + d-cache-size = <8000>; // L1, 32K
> + i-cache-size = <8000>; // L1, 32K
> + timebase-frequency = <0>;
> + bus-frequency = <0>;
> + clock-frequency = <0>;
> + 32-bit;
remove 32-bit.
> + };
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <00000000 20000000>; // 512MB at 0
> + };
> +
> + soc837x@e0000000 {
make this just 'soc@e0000000'
> + #address-cells = <1>;
> + #size-cells = <1>;
> + device_type = "soc";
> + ranges = <0 e0000000 00100000>;
> + reg = <e0000000 00000200>;
> + bus-frequency = <0>;
> +
> +
> + i2c@3000 {
> + compatible = "fsl-i2c";
> + reg = <3000 100>;
> + interrupts = <e 8>;
> + interrupt-parent = < &ipic >;
> + dfsrr;
add #address-cells & #size-cells to i2c and device_type = "i2c" (Yes
I know there is discussion about this however the code still expects
it to be here for things to work properly).
> + };
> +
> + i2c@3100 {
> + compatible = "fsl-i2c";
> + reg = <3100 100>;
> + interrupts = <f 8>;
> + interrupt-parent = < &ipic >;
> + dfsrr;
ditto.
> + };
> +
> +
[snip]
> + serial@4500 {
> + device_type = "serial";
> + compatible = "ns16550";
> + reg = <4500 100>;
> + clock-frequency = <0>;
> + interrupts = <9 8>;
> + interrupt-parent = < &ipic >;
> + };
> +
> + serial@4600 {
> + device_type = "serial";
> + compatible = "ns16550";
> + reg = <4600 100>;
> + clock-frequency = <0>;
> + interrupts = <a 8>;
> + interrupt-parent = < &ipic >;
> + };
> +
> + crypto@30000 {
> + model = "SEC3";
> + compatible = "talitos";
> + reg = <30000 10000>;
> + interrupts = <b 8>;
> + interrupt-parent = < &ipic >;
> + /* Rev. 3.0 geometry */
> + num-channels = <4>;
> + channel-fifo-len = <18>;
> + exec-units-mask = <000009fe>;
> + descriptor-types-mask = <03ab0ebf>;
is this all correct for sec on 837x?
> + };
> +
[snip]
- k
^ permalink raw reply
* Re: [PATCH v3 9/9] add MPC837x MDS board default device tree
From: Kumar Gala @ 2007-10-17 13:59 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev, Li Yang, paulus
In-Reply-To: <20071015003703.GA14108@localhost.localdomain>
On Oct 14, 2007, at 7:37 PM, David Gibson wrote:
> On Fri, Oct 12, 2007 at 09:28:48PM +0800, Li Yang wrote:
>> Signed-off-by: Li Yang <leoli@freescale.com>
>> ---
>> arch/powerpc/boot/dts/mpc8377_mds.dts | 288 +++++++++++++++++++++
>> +++++++++
>> arch/powerpc/boot/dts/mpc8378_mds.dts | 268 +++++++++++++++++++++
>> +++++++
>> arch/powerpc/boot/dts/mpc8379_mds.dts | 308 +++++++++++++++++++++
>> ++++++++++++
>> 3 files changed, 864 insertions(+), 0 deletions(-)
>> create mode 100644 arch/powerpc/boot/dts/mpc8377_mds.dts
>> create mode 100644 arch/powerpc/boot/dts/mpc8378_mds.dts
>> create mode 100644 arch/powerpc/boot/dts/mpc8379_mds.dts
>>
>> diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts
>> b/arch/powerpc/boot/dts/mpc8377_mds.dts
> [snip]
>> + soc837x@e0000000 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + device_type = "soc";
>> + ranges = <0 e0000000 00100000>;
>> + reg = <e0000000 00000200>;
>> + bus-frequency = <0>;
>> +
>> + wdt@200 {
>> + device_type = "watchdog";
>
> Drop this device_type.
>
>> + compatible = "mpc83xx_wdt";
>> + reg = <200 100>;
>> + };
>> +
>> + i2c@3000 {
>> + device_type = "i2c";
>
> And this one.
I've asked Leo to leave this one as all other fsl boards do this and
the code depends on it. There was some discussion about this but I
wasn't sure if it was closed or not.
>> + compatible = "fsl-i2c";
>> + reg = <3000 100>;
>> + interrupts = <e 8>;
>> + interrupt-parent = < &ipic >;
>> + dfsrr;
>> + };
>> +
- k
^ permalink raw reply
* Re: [PATCH 3/4] [POWERPC] Add restart support for mpc52xx based platforms
From: Stephen Rothwell @ 2007-10-17 14:02 UTC (permalink / raw)
To: Marian Balakowicz; +Cc: linuxppc-dev
In-Reply-To: <471607A8.6050203@semihalf.com>
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On Wed, 17 Oct 2007 15:01:28 +0200 Marian Balakowicz <m8@semihalf.com> wrote:
>
> +void __init
> +mpc52xx_map_wdt(void)
> +{
> + const void *has_wdt;
^^^^^^^^
white space damage
> + struct device_node *np;
> +
> + /* mpc52xx_wdt is mapped here and used in mpc52xx_restart,
> + * possibly from a interrupt context. */
> +
> + for (np = NULL;
> + (np = of_find_compatible_node(np, NULL, "fsl,mpc5200-gpt")) != NULL;
> + ) {
for_each_compatible_node(np, NULL, "fsl,mpc5200-gpt") {
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
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^ permalink raw reply
* Re: [PATCH v3 3/9] add Freescale SerDes PHY support
From: Kumar Gala @ 2007-10-17 14:13 UTC (permalink / raw)
To: Li Yang; +Cc: linuxppc-dev, paulus
In-Reply-To: <1192195728-24189-4-git-send-email-leoli@freescale.com>
> diff --git a/arch/powerpc/sysdev/fsl_serdes.c b/arch/powerpc/sysdev/
> fsl_serdes.c
> new file mode 100644
> index 0000000..5e91eb7
> --- /dev/null
> +++ b/arch/powerpc/sysdev/fsl_serdes.c
> @@ -0,0 +1,152 @@
> +/*
> + * arch/powerpc/sysdev/fsl_serdes.c
> + *
> + * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights
> reserved.
> + *
> + * Author: Li Yang <leoli@freescale.com>
> + *
> + * Freescale SerDes initialization routines
> + *
> + * This program is free software; you can redistribute it and/or
> modify it
> + * under the terms of the GNU General Public License as published
> by the
> + * Free Software Foundation; either version 2 of the License, or
> (at your
> + * option) any later version.
> + */
> +
> +#include <linux/stddef.h>
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/errno.h>
> +#include <linux/delay.h>
> +#include <linux/of.h>
> +
> +#include <asm/system.h>
> +#include <asm/io.h>
> +#include <asm/machdep.h>
> +
> +#include "fsl_serdes.h"
just move the #defines into the .c file and kill the header.
> +
> +static int __init setup_serdes(struct device_node *np)
> +{
> + void __iomem *regs;
> + const void *prot;
> + const unsigned int *freq;
> + struct resource res;
> + u32 rfcks;
> +
> + of_address_to_resource(np, 0, &res);
> + regs = ioremap(res.start, res.end - res.start + 1);
you don't unmap this ever (on error or exit of the function).
> +
> + prot = of_get_property(np, "protocol", NULL);
> + if (!prot)
> + return -EINVAL;
> + freq = of_get_property(np, "clock", NULL);
> + switch (*freq) {
> + case 100:
> + rfcks = FSL_SRDSCR4_RFCKS_100;
> + break;
> + case 125:
> + rfcks = FSL_SRDSCR4_RFCKS_125;
> + break;
> + case 150:
> + rfcks = FSL_SRDSCR4_RFCKS_150;
> + break;
> + default:
> + printk(KERN_ERR "SerDes: Wrong frequency\n");
> + return -EINVAL;
> + }
> +
> + /* Use default prescale and counter */
> +
> + /* 1.0V corevdd */
> + if (of_get_property(np, "vdd-1v", NULL)) {
> + /* DPPE/DPPA = 0 */
> + clrbits32(regs + FSL_SRDSCR0_OFFS, FSL_SRDSCR0_DPP_1V2);
> +
> + /* VDD = 0 */
> + clrbits32(regs + FSL_SRDSCR2_OFFS, FSL_SRDSCR2_VDD_1V2);
> + }
> +
> + /* protocol specific configuration */
> + if (!strcmp(prot, "sata")) {
> + /* Set and clear reset bits */
> + setbits32(regs + FSL_SRDSRSTCTL_OFFS,
> + FSL_SRDSRSTCTL_SATA_RESET);
> + mdelay(1);
> + clrbits32(regs + FSL_SRDSRSTCTL_OFFS,
> + FSL_SRDSRSTCTL_SATA_RESET);
> +
> + /* Configure SRDSCR1 */
> + clrbits32(regs + FSL_SRDSCR1_OFFS, FSL_SRDSCR1_PLLBW);
> +
> + /* Configure SRDSCR2 */
> + clrsetbits_be32(regs + FSL_SRDSCR2_OFFS,
> + FSL_SRDSCR2_SEIC_MASK, FSL_SRDSCR2_SEIC_SATA);
> +
> + /* Configure SRDSCR3 */
> + out_be32(regs + FSL_SRDSCR3_OFFS, FSL_SRDSCR3_KFR_SATA |
> + FSL_SRDSCR3_KPH_SATA |
> + FSL_SRDSCR3_SDFM_SATA_PEX |
> + FSL_SRDSCR3_SDTXL_SATA);
> +
> + /* Configure SRDSCR4 */
> + out_be32(regs + FSL_SRDSCR4_OFFS, rfcks |
> + FSL_SRDSCR4_PROT_SATA);
> +
> + } else if (!strcmp(prot, "pcie")) {
> + /* Configure SRDSCR1 */
> + setbits32(regs + FSL_SRDSCR1_OFFS, FSL_SRDSCR1_PLLBW);
> +
> + /* Configure SRDSCR2 */
> + clrsetbits_be32(regs + FSL_SRDSCR2_OFFS, FSL_SRDSCR2_SEIC_MASK,
> + FSL_SRDSCR2_SEIC_PEX);
> +
> + /* Configure SRDSCR3 */
> + out_be32(regs + FSL_SRDSCR3_OFFS, FSL_SRDSCR3_SDFM_SATA_PEX);
> +
> + /* Configure SRDSCR4 */
> + if (of_get_property(np, "pcie-x2", NULL))
> + out_be32(regs + FSL_SRDSCR4_OFFS, rfcks |
> + FSL_SRDSCR4_PROT_PEX | FSL_SRDSCR4_PLANE_X2);
> + else
> + out_be32(regs + FSL_SRDSCR4_OFFS, rfcks |
> + FSL_SRDSCR4_PROT_PEX);
> +
> + } else if (!strcmp(prot, "sgmii")) {
> + /* Configure SRDSCR1 */
> + clrbits32(regs + FSL_SRDSCR1_OFFS, FSL_SRDSCR1_PLLBW);
> +
> + /* Configure SRDSCR2 */
> + clrsetbits_be32(regs + FSL_SRDSCR2_OFFS, FSL_SRDSCR2_SEIC_MASK,
> + FSL_SRDSCR2_SEIC_SGMII);
> +
> + /* Configure SRDSCR3 */
> + out_be32(regs + FSL_SRDSCR3_OFFS, 0);
> +
> + /* Configure SRDSCR4 */
> + out_be32(regs + FSL_SRDSCR4_OFFS, rfcks |
> + FSL_SRDSCR4_PROT_SGMII);
> +
> + } else {
> + printk(KERN_ERR "SerDes: Wrong protocol\n");
> + return -EINVAL;
> + }
> +
> + /* Do a software reset */
> + setbits32(regs + FSL_SRDSRSTCTL_OFFS, FSL_SRDSRSTCTL_RST);
> +
> + printk(KERN_INFO "Freescale SerDes at %8x initialized\n",
> res.start);
> +
> + return 0;
> +}
> +
> +static int __init fsl_serdes_init(void) {
> + struct device_node *np;
> +
> + for (np = NULL; (np = of_find_compatible_node(np, NULL,
> "fsl,serdes")) != NULL;)
use for_each_compatible_node
> + setup_serdes(np);
> +
> + return 0;
> +}
> +
> +arch_initcall(fsl_serdes_init);
>
- k
^ permalink raw reply
* Re: [PATCH v2 3/4] Implement clockevents driver for powerpc
From: Sergei Shtylyov @ 2007-10-17 14:29 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, Thomas Gleixner, Realtime Kernel
In-Reply-To: <18195.64334.985238.848522@cargo.ozlabs.ibm.com>
Hello.
Paul Mackerras wrote:
>> I don't see my own signoff or at least a reference to my prior work in
>>this patch or even at -rt patch -- despite this code ha clearly borrowed from
>>it. And I'm not sure why this crippled version (lacking 40x/ Book E specific
>>clockevents implementation) is preferred over mine, unless this implementation
>>was only aimed at PPC64 machines...
> Tony started from an earlier patch by John Stultz, not from your
> patches.
Well, that I can believe, yet the clockevents patch has traces of my
former work, and looking at read_persisitent_time() it looks suspiciously
close to my version too...
> The main reason your patches were rejected were that you completely
> broke the VDSO and the deterministic time accounting, and made no
That's just not true!
They didn't broke vDSO (to be precise it was John's patch that broke it),
they just removed the vDSO code known to already be broken by -rt patch for
several months by then. And they didn't broke determinictic accounting --
they just made two things mutually exclusive. I haven't yet seen how the
patches that were preferred dealt with it at all.
> attempt to fix them.
I lacked time to do this, so did what I could.
> As for 40x/Book E, the main thing there is the auto-reload. However,
> since the generic core can use a oneshot clock event source to
> generate periodic ticks, there is no advantage to using the
> auto-reload.
Really? IMO, the harware does keep a constant interrupt rate better than
software.
>> Also, have the deterministic CPU accounting incompatibility with
>>clockevents been dealt with?
> The S390 guys looked at that and solved it with Ingo's and Thomas's
> help (although I did see something on linux-kernel about some further
> problems).
Good to hear. Nobody offered any help to me (except maybe Thomas -- but we
never came to any viable approach).
>> I'd use (evt - 1) since the interrupt gets generated at 0xffffffff count,
>>not 0 (on classic CPUs). With you removing of the code that compensated for
> See commit d968014b7280e2c447b20363e576999040ac72ef; I already fixed
> that.
Good to hear this has been dealt with, along with that PowerMAC "IRQ
simulation" nuisance -- I didn't care about it, sorry. :-)
>>the errors, they will accumulate. And no, this wouldn't be enough anyway,
> No, they don't accumulate. See tick_setup_periodic(). The interval
> until the next tick is determined using ktime_get() rather than just
> being a constant.
The interrupt always happens 1 clock later depsite what value
have been selected for the decrementer. Well, OK, that should still get
compensated by the tick_setup_periodic() by selecting shorter next period.
Well, I'm taking comfot in that you've finally had to sutract 1. :-)
>>since on 40x and Book E you'll need to set it for evt anyway, since the
>>interrupt happens at 0 count...
>> NAK the patch. And I really don't understand why you're throwing alway
>>already tested/working code...
> Because you broke important features
That is *not true*.
And nobody had interest to fix them for months (quite strange if they're
so important) while I had neither time nor interest to deal with them anymore
having written the code that *did work*, and not only for me.
> and because you seem to have some
> fundamental misconceptions (e.g. the comment about errors accumulating
Where's the misconception in the patch? ;-)
> you just made).
I see, I'm a bad guy... but still not convinced. :-)
> Paul.
WBR, Sergei
^ permalink raw reply
* Re: [PATCH v2 3/4] Implement clockevents driver for powerpc
From: Sergei Shtylyov @ 2007-10-17 14:34 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, Thomas Gleixner, Realtime Kernel
In-Reply-To: <18195.64334.985238.848522@cargo.ozlabs.ibm.com>
Hello.
Paul Mackerras wrote:
>> I'd use (evt - 1) since the interrupt gets generated at 0xffffffff count,
>>not 0 (on classic CPUs). With you removing of the code that compensated for
> See commit d968014b7280e2c447b20363e576999040ac72ef; I already fixed
> that.
BTW, while fixing that for classic PPC, but you've broke it for 40x / book
E CPU which interrupt at 0. Congratulations. :-)
WBR, Sergei
^ permalink raw reply
* Re: can and mpc5200b
From: S. Fricke @ 2007-10-17 14:41 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <f87351060710150705l5e4d1ba5v6806686cd25418bb@mail.gmail.com>
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Hello list,
> > Hello Friends,
> > what is the reasonable can-driver for a mpc5200b?
> >
> > I have seen for the peak-3.17 driver a port for the mpc5200 from denx on their
> > website, but with kernel 2.6.23 I dont have a chance to use this?
>
> Check this out http://developer.berlios.de/projects/socketcan/ . This
> is the CAN driver we use and it works pretty well for us. It is very
> updated and supports the mscan chipset that is available with the
> mpc5200b.
Socketcan works for me perfectly with the canconfig tool.
Thank you.
Silvio
Mit freundlichen Gruessen
Silvio Fricke
--
-- S. Fricke ----------------------------- MAILTO:silvio.fricke@gmail.com --
Diplom-Informatiker (FH)
Linux-Entwicklung
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^ permalink raw reply
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