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* RE: RFC:  replace device_type with new "class" property?
From: Yoder Stuart-B08248 @ 2007-10-30 14:56 UTC (permalink / raw)
  To: David Gibson, Olof Johansson; +Cc: linuxppc-dev
In-Reply-To: <20071030005146.GF29263@localhost.localdomain>

=20

> -----Original Message-----
> From: David Gibson [mailto:david@gibson.dropbear.id.au]=20
> Sent: Monday, October 29, 2007 7:52 PM
> To: Olof Johansson
> Cc: Yoder Stuart-B08248; linuxppc-dev@ozlabs.org
> Subject: Re: RFC: replace device_type with new "class" property?
>=20
> On Mon, Oct 29, 2007 at 04:22:13PM -0500, Olof Johansson wrote:
> [snip]
> > I don't see how switching the property name from "device_type" to
> > "class" is going to stop people from misunderstanding it's intended
> > use. There's nothing inherently more understandable in calling it
> > "class" -- it also invites people to make up their own class names
> > as they go along, just as what happened to "device_type".
> >=20
> > I also don't understand the people wanting to use "compatible"
> > for _everything_. It's just mashing together two separate pieces of
> > information into one property, and I seriously don't see=20
> how that helps
> > anything or anyone. It's absolutely useless for a driver to=20
> be able to
> > bind to a compatible field of "standard,network" or=20
> whatever it might be,
> > since there's no way that "standard," will imply that the=20
> register layout
> > and programming model is somehow the same as all other=20
> standard-labelled
> > devices.
> >=20
> > So yes, there is a problem with the device trees and how=20
> people build
> > them, and it requires education on how to properly craft=20
> one. I don't
> > think changing the layout to either be flatter (only using=20
> compatible),
> > or changing names of a property (device_type->class) will=20
> help anything
> > at all.
> >=20
> > I actually prefer keeping device_type myself, since it=20
> means existing
> > OF-based device trees will already have some of the labels.
>=20
> Yeah.. what he said.
>=20
> The *only* substantive change with the "class" proposal is the fact
> that multiple classes can be specified.  That's nice, but I don't
> think it's worth the trouble of attempting to define a whole new chunk
> of standard for.

I tend to agree, but I think device_type serves a useful
purpose.   I don't think we should deprecate it.

> Stuart, I think you overestimate the value of this class property to a
> human reader.  The generic names convention (not followed as much as
> it should be) means the name should give the reader some idea of what
> the device is, in most cases.  For trickier cases, if we really want
> something for humans reading the tree, we could add an optional
> "comment" or "description" property with purely human readable
> information.
>=20
> I think we should leave existing IEEE1275 defined uses of device_type,
> in order not to make flat trees gratuitously different from real-OF
> trees, but we should avoid any new use of device_type.

I'm fine with keeping device_type, but there are a few
of things I don't like about the 'no new use'.

1.  There are types of nodes that don't have a programming
    inteface per se and thus no compatible.
    "cpu", "memory", "cache" are 3 that come to mind.

    What if there is a _new_ class of nodes of this type?
    What is wrong with a new use of device_type for something
    say like "i2c"?

    Conceptually and ideally, what _is_ the right way to
    represent these types of devices.

2.  'Existing IEEE1275 defined uses' of device_type is=20
    actually very vague.  There are a conglomeration of
    old bindings, recommended practices, proposals and
    it is not clear at all which are useful or not.  What
    are the existing IEEE1275 uses???   I actually went
    through all the OF documents and there are dozens
    of device types that have no practical use.

    Also, many 'real-OF' trees seem to follow no published
    binding at all.

    Conceptually, I'd like to a crisp list of 'official'
    bindings and hope that the current ePAPR work in
    power.org will establish this list.   =20

3.  You're advocating deprecating device_class, but still
    requiring it for certain node types.  So a "network"
    node is _required_ to have the deprecated
    device_type=3D"network".   But a "i2c" node is required
    _not_ to have device_type.  Long term, I'd like to see
    any inconsitency be removed.  If device_type is=20
    deprecated, it's use should be optional in flat=20
    device trees.   That goes for "cpu", "memory", etc.

I think what we should do is keep device_type, including
permitting new uses of it in a limited way-- only permitting
the use of device_type when there is an official binding
(like in the power.org ePAPR) defined.   =20

> Explicitly specifying what device class bindings / conventions the
> node complies with is cute, but not actually all that useful in
> practice.  If it looks like a "duck" class device node, and it
> quacks^Whas the properties of a "duck" class device node, it's "duck"
> class compliant.
>=20
> Or to look at it another way, "class bindings" aren't really bindings,
> but rather a set of conventions that device bindings for specific
> devices in that class ought to follow.

I tend to think of a 'binding' as a 'set of conventions'.

^ permalink raw reply

* Re: [POWERPC] Fix off-by-one error in setting decrementer on Book E
From: Sergei Shtylyov @ 2007-10-30 14:23 UTC (permalink / raw)
  To: Kumar Gala; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <42A23BAB-6081-41CC-870C-7C7F094D69C3@kernel.crashing.org>

Hello.

Kumar Gala wrote:

>>The decrementer in Book E and 4xx processors interrupts on the
>>transition from 1 to 0, rather than on the 0 to -1 transition as on
>>64-bit server and 32-bit "classic" (6xx/7xx/7xxx) processors.

>>This fixes the problem by making set_dec subtract 1 from the count for
>>server and classic processors.  Since set_dec already had a bunch of
>>ifdefs to handle different processor types, there is no net increase
>>in ugliness. :)

>>This also removes a redundant call to set the decrementer to
>>0x7fffffff - it was already set to that earlier in timer_interrupt.

>>Signed-off-by: Paul Mackerras <paulus@samba.org>
>>---

> ...

>>diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h
>>index f058955..eed64bd 100644
>>--- a/include/asm-powerpc/time.h
>>+++ b/include/asm-powerpc/time.h
>>@@ -183,6 +183,7 @@ static inline void set_dec(int val)
>> #elif defined(CONFIG_8xx_CPU6)
>> 	set_dec_cpu6(val);
>> #else
>>+	--val;	/* classic decrementer interrupts when dec goes negative */
>> #ifdef CONFIG_PPC_ISERIES
>> 	int cur_dec;

> Unless I'm reading set_dec() you are getting --val on booke.

    You meant "misreading"?
    Indeed the patch is decrementing count for *both* book E and classic CPUs 
now, and that slipped past my attention the first time.  The patch summary 
("Fix off-by-one error in setting decrementer on Book E") also looks stange -- 
there is *no* off-by-one error on Book E, and the description correctly says 
that we're fixing off-by-one on classic/server CPUs.
     Maybe I should even go and post my patch variant instead...

WBR, Sergei

^ permalink raw reply

* Re: [PATCH 0/3] Add device-tree aware NDFC driver
From: Valentine Barshak @ 2007-10-30 14:13 UTC (permalink / raw)
  To: Thomas Gleixner; +Cc: linuxppc-dev, sr, linux-mtd
In-Reply-To: <alpine.LFD.0.9999.0710300235580.3186@localhost.localdomain>

Thomas Gleixner wrote:
> On Mon, 29 Oct 2007, Valentine Barshak wrote:
> 
>> This adds a device-tree aware PowerPC 44x NanD Flash Controller driver
>> The code is based on the original NDFC driver by Thomas Gleixner, but
>> since it's been changed much and has initialization/clean-up completely
>> reworked it's been put into a separate ndfc_of.c file. This version
>> supports both separate mtd devices on each chip attached to NDFC banks and
>> single mtd device spread across identical chips (not using mtdconcat) as well.
>> The choice is selected with device tree settings. This has been tested
>> on PowerPC 440EPx Sequoia board.
>> Any comments are greatly appreciated.
> 
> Did I express myself not clear enough in my first reply or is this
> just a repeated epiphany in my inbox ? 
> 
> You got plenty of comments to your patches, but you decided to ignore
> them silently.
> 
> Darn, fix it the right way once and forever and please don't try to
> tell me another heartrending "why I did it my way" story.
> 
> This all can be done with a nice series of incremental patches
> including a fixup to the existing users.
> 
> We have enough dump and run shit in the kernel already.
> 
> No thanks,
> 
>    tglx

You know, you're really too tense Thomas. I'm not sure of the reason why 
you're being a complete nerve, but I'm feeling sorry for you.
I'm not saying my approach is the best, but I was hoping for a discussion.
I've reworked the patches according to the comments to the previous 
version and used my arguments to explain why I don't see much reason to 
mess with the code we currently have and added a separate _of version.
I'm sure you'd find some time to do it yourself "the right way once and 
forever" with a "nice series of incremental patches" to fix what we 
currently have (call it a "dump" or anything you like) and even maybe 
add new device tree support.
I'm sorry if for some reason I've made you feel bad.
This is the last time I disturb you with my e-mail, so please, forget it.
Thank you very much for your comments anyway.
It's been nice talking to you,
Valentine.

^ permalink raw reply

* Re: libfdt: Correctly handle versions > 17
From: Jon Loeliger @ 2007-10-30 12:50 UTC (permalink / raw)
  To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20071030022212.GB30041@localhost.localdomain>

So, like, the other day David Gibson mumbled:
> If future dtb version > 17 are defined, that are still backwards
> compatible with v16, libfdt will of course be able to read and
> understand them.  However, when modifying such a tree, it can't
> guarantee that it won't clobber additional structure from the new
> version which it doesn't know about.  Therefore, before making
> modifications to a tree of version >17, we must change it's version to
> be exactly 17.
> 
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

Applied.

jdl

^ permalink raw reply

* Re: dtc: Remove leftover debugging printf() from mangle-layout
From: Jon Loeliger @ 2007-10-30 12:50 UTC (permalink / raw)
  To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20071030021715.GA30041@localhost.localdomain>

So, like, the other day David Gibson mumbled:
> The mangle-layout testcase/utility had a leftover debugging printf().
> This patch removes it.
> 
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

Applied.

jdl

^ permalink raw reply

* Re: [RFC/PATCH] powerpc: Deal with 44x virtually tagged icache
From: Josh Boyer @ 2007-10-30 12:23 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <20071030051713.5B8B9DE174@ozlabs.org>

On Tue, 30 Oct 2007 16:16:54 +1100
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:

> The 44x family has an interesting "feature" which is a virtually
> tagged instruction cache (yuck !). So far, we haven't dealt with
> it properly, which means we've been mostly lucky or people didn't
> report the problems, unless people have been running custom patches
> in their distro...
> 
> This is an attempt at fixing it properly. I chose to do it by
> setting a global flag whenever we change a PTE that was previously
> marked executable, and flush the entire instruction cache upon
> return to user space when that happens.
> 
> This is a bit heavy handed, but it's hard to do more fine grained
> flushes as the icbi instruction, on those processor, for some very
> strange reasons (since the cache is virtually mapped) still requires
> a valid TLB entry for reading in the target address space, which
> isn't something I want to deal with.
> 
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> ---
> 
> Fortunately, we don't support SMP on these or this solution wouldn't
> work.

We should mark 44x BROKEN on SMP in Kconfig.

> 
> It does mean we do a bit of over-flushing on swap but on the
> other hand, the code is simple. Another option would have been
> to do the iccci after any syscall that potentially unmaps or
> changes a mapping, like sys_munmap, sys_mremap, sys_sbrk, but
> also the shmem stuff etc... I decided there was just too many
> and was worried I would miss one.
> 
> This not very tested as I don't have a test case at hand showing the
> problem and didn't feel like writing one today :-) It boots though.
> 
> Careful eyes will notice I didn't do the flush on fast_exception_return,
> which shouldn't be necessary.
> 
>  arch/powerpc/kernel/entry_32.S      |   25 +++++++++++++++++++++++++
>  arch/powerpc/kernel/misc_32.S       |    9 +++++++++
>  arch/powerpc/mm/44x_mmu.c           |    1 +
>  include/asm-powerpc/pgtable-ppc32.h |   13 +++++++++++++
>  4 files changed, 48 insertions(+)

No arch/ppc fix?  I know we all want it to die as soon as possible, but
still... :)

> Index: linux-work/arch/powerpc/kernel/entry_32.S
> ===================================================================
> --- linux-work.orig/arch/powerpc/kernel/entry_32.S	2007-10-15 11:19:35.000000000 +1000
> +++ linux-work/arch/powerpc/kernel/entry_32.S	2007-10-30 16:09:51.000000000 +1100
> @@ -244,6 +244,13 @@ syscall_exit_cont:
>  	andis.	r10,r0,DBCR0_IC@h
>  	bnel-	load_dbcr0
>  #endif
> +#ifdef CONFIG_44x
> +	lis	r4,icache_44x_need_flush@ha
> +	lwz	r5,icache_44x_need_flush@l(r4)
> +	cmplwi	cr0,r5,0
> +	bne-	2f
> +1:
> +#endif /* CONFIG_44x */
>  	stwcx.	r0,0,r1			/* to clear the reservation */
>  	lwz	r4,_LINK(r1)
>  	lwz	r5,_CCR(r1)
> @@ -259,6 +266,13 @@ syscall_exit_cont:
>  	SYNC
>  	RFI
> 
> +#ifdef CONFIG_44x
> +2:	li	r7,0
> +	iccci	r0,r0
> +	stw	r7,icache_44x_need_flush@l(r4)
> +	b	1b
> +#endif  /* CONFIG_44x */
> +
>  66:	li	r3,-ENOSYS
>  	b	ret_from_syscall
> 
> @@ -683,6 +697,17 @@ resume_kernel:
> 
>  	/* interrupts are hard-disabled at this point */
>  restore:
> +#ifdef CONFIG_44x
> +	lis	r4,icache_44x_need_flush@ha
> +	lwz	r5,icache_44x_need_flush@l(r4)
> +	cmplwi	cr0,r5,0
> +	beq+	1f
> +	iccci	r0,r0
> +	li	r6,0
> +	iccci	r0,r0
> +	stw	r6,icache_44x_need_flush@l(r4)
> +1:

Why two iccci's here?

> +#endif  /* CONFIG_44x */
>  	lwz	r0,GPR0(r1)
>  	lwz	r2,GPR2(r1)
>  	REST_4GPRS(3, r1)
> Index: linux-work/arch/powerpc/mm/44x_mmu.c
> ===================================================================
> --- linux-work.orig/arch/powerpc/mm/44x_mmu.c	2007-09-28 11:42:05.000000000 +1000
> +++ linux-work/arch/powerpc/mm/44x_mmu.c	2007-10-30 15:30:50.000000000 +1100
> @@ -35,6 +35,7 @@
>   */
>  unsigned int tlb_44x_index; /* = 0 */
>  unsigned int tlb_44x_hwater = PPC44x_TLB_SIZE - 1 - PPC44x_EARLY_TLBS;
> +int icache_44x_need_flush;
> 
>  /*
>   * "Pins" a 256MB TLB entry in AS0 for kernel lowmem
> Index: linux-work/include/asm-powerpc/pgtable-ppc32.h
> ===================================================================
> --- linux-work.orig/include/asm-powerpc/pgtable-ppc32.h	2007-09-28 11:42:10.000000000 +1000
> +++ linux-work/include/asm-powerpc/pgtable-ppc32.h	2007-10-30 15:30:50.000000000 +1100
> @@ -11,6 +11,11 @@
>  extern unsigned long va_to_phys(unsigned long address);
>  extern pte_t *va_to_pte(unsigned long address);
>  extern unsigned long ioremap_bot, ioremap_base;
> +
> +#ifdef CONFIG_44x
> +extern int icache_44x_need_flush;
> +#endif
> +
>  #endif /* __ASSEMBLY__ */
> 
>  /*
> @@ -562,6 +567,10 @@ static inline unsigned long pte_update(p
>  	: "=&r" (old), "=&r" (tmp), "=m" (*p)
>  	: "r" (p), "r" (clr), "r" (set), "m" (*p)
>  	: "cc" );
> +#ifdef CONFIG_44x
> +	if ((old & _PAGE_USER) && (old & _PAGE_HWEXEC))
> +		icache_44x_need_flush = 1;
> +#endif
>  	return old;
>  }
>  #else
> @@ -582,6 +591,10 @@ static inline unsigned long long pte_upd
>  	: "=&r" (old), "=&r" (tmp), "=m" (*p)
>  	: "r" (p), "r" ((unsigned long)(p) + 4), "r" (clr), "r" (set), "m" (*p)
>  	: "cc" );
> +#ifdef CONFIG_44x
> +	if ((old & _PAGE_USER) && (old & _PAGE_HWEXEC))
> +		icache_44x_need_flush = 1;
> +#endif
>  	return old;
>  }
>  #endif
> Index: linux-work/arch/powerpc/kernel/misc_32.S
> ===================================================================
> --- linux-work.orig/arch/powerpc/kernel/misc_32.S	2007-10-30 15:15:03.000000000 +1100
> +++ linux-work/arch/powerpc/kernel/misc_32.S	2007-10-30 15:30:50.000000000 +1100
> @@ -543,12 +543,21 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_I
>  	addi	r3,r3,L1_CACHE_BYTES
>  	bdnz	0b
>  	sync
> +#ifndef CONFIG_44x
> +	/* We don't flush the icache on 44x. Those have a virtual icache
> +	 * and we don't have access to the virtual address here (it's
> +	 * not the page vaddr but where it's mapped in user space). The
> +	 * flushing of the icache on these is handled elsewhere, when
> +	 * a change in the address space occurs, before returning to
> +	 * user space
> +	 */
>  	mtctr	r4
>  1:	icbi	0,r6
>  	addi	r6,r6,L1_CACHE_BYTES
>  	bdnz	1b
>  	sync
>  	isync
> +#endif /* CONFIG_44x */
>  	blr
> 
>  /*
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

^ permalink raw reply

* Execute user program in kernel mode?
From: Wang, Baojun @ 2007-10-30 11:45 UTC (permalink / raw)
  To: linuxppc-dev

[-- Attachment #1: Type: text/plain, Size: 2533 bytes --]

hi,

  Is it possible to run user program (statically linked) in kernel mode? for 
example the user program entry is 0x10000000, can we call it directly from 
kernel? I've tried many times, but I got the following Error(Oops):

Oops: Exception in kernel mode, sig: 5 [#1]
NIP: 10000094 LR: 10000094 CTR: C001CBF4
REGS: d1072e90 TRAP: 0700   Not tainted  (2.6.19.2-eldk-xm.1.0)
MSR: 00021000 <ME>  CR: 00000000  XER: 00000000
TASK = cf31dc70[809385534] '�1� �˸' THREAD: c001ca38
GPR00: 00000000 D1072F40 C0555B70 10000094 C02C41C0 D1066000 10000094 D106C000
GPR08: C02CCAE4 D106A000 28000022 00021000 00000000 00000000 00000000 00000000
GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
GPR24: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
NIP [10000094] 0x10000094
LR [10000094] 0x10000094
Call Trace:
Instruction dump:
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
Oops: kernel access of bad area, sig: 11 [#2]
NIP: C00598C8 LR: C000A108 CTR: C001C2A4
REGS: d1072060 TRAP: 0300   Not tainted  (2.6.19.2-eldk-xm.1.0)
MSR: 00021000 <ME>  CR: 84000044  XER: 00000000
DAR: 3E20736D, DSISR: 00000000
TASK = cf31dc70[809385534] '�1� �˸' THREAD: c001ca38
GPR00: C000A0FC D1072110 CF31DC70 3E207365 3E20736D 00000000 00000000 C0240000
GPR08: CF31DD14 D1072000 00021002 C0002038 C001CBE8 00000000 00000000 00000000
GPR16: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
GPR24: CF31DD48 00000000 D10721E0 3E20736D 00000000 CF31DD14 CF31DD48 00000000
NIP [C00598C8] find_vma+0x24/0x90
LR [C000A108] do_page_fault+0x50/0x3e0
Call Trace:
Instruction dump:
4c9d0020 91230020 4e800020 7c681b79 38600000 4d820020 4800000c 7d2a4b78
48000070 80680008 2f830000 419e001c <80030008> 7f802040 409d0010 80030004
Kernel panic - not syncing: Aiee, killing interrupt handler!
 <0>Rebooting in 180 seconds..


  Does that mean we can not call user space entry code directly, can we? 

  Regards,
Wang
-- 
Wang, Baojun                                        Lanzhou University
Distributed & Embedded System Lab              http://dslab.lzu.edu.cn
School of Information Science and Engeneering        wangbj@lzu.edu.cn
Tianshui South Road 222. Lanzhou 730000                     .P.R.China
Tel:+86-931-8912025                                Fax:+86-931-8912022

[-- Attachment #2: This is a digitally signed message part. --]
[-- Type: application/pgp-signature, Size: 189 bytes --]

^ permalink raw reply

* Re: Bootup support for watchdog with short timeout (touch_nmi_watchdog()?)
From: Stefan Roese @ 2007-10-30 11:16 UTC (permalink / raw)
  To: Josh Boyer; +Cc: linuxppc-dev, linux-kernel, Lennart Sorensen
In-Reply-To: <20071029215454.0d644ca7@vader.jdub.homelinux.org>

[added linuxppc-dev since it's PPC relevant too]

On Tuesday 30 October 2007, Josh Boyer wrote:
> On Mon, 29 Oct 2007 15:45:03 -0400
>
> lsorense@csclub.uwaterloo.ca (Lennart Sorensen) wrote:
> > On Mon, Oct 29, 2007 at 03:22:27PM +0100, Stefan Roese wrote:
> > > I'm trying to implement support for a board specific watchdog on a
> > > PPC440EPx board with a very short timeout. In this case, the watchdog
> > > has to be "kicked" at least every 100ms, even while booting and the
> > > real watchdog driver not running yet. While looking for trigger places
> > > in the kernel source, I noticed the already existing
> > > "touch_nmi_watchdog()" function, which seems to be doing what I need.
> > > Even if the name not exactly matches my hardware setup.
> > >
> > > My question now is, is it recommended to use this
> > > touch_nmi_watchdog() "infrastructure" for my PPC custom specific
> > > watchdog during bootup? And if yes, should it perhaps be renamed to a
> > > more generic name, like "touch_watchdog"?
> > >
> > > Please advise. Thanks.
> >
> > No idea really.  Who would design a watchdog with such a short trigger
> > time?  That doesn't seem to be useful in any way.

It definitely is useful in our case, since its a requirement for 
this "critical" project. It's not needed to have such a short trigger time 
while booting, but unfortunately this external watchdog only supports one 
fixed timeout.

> To some degree, it's configurable.

No, I'm afraid it's not configurable in this case.

> But the generic question still 
> stands.  It seems like a decent idea to me.  Making touch_watchdog (or
> whatever it winds up being called) nice across arches might be fun.

I already have it running on my system using a quick hack (see patch below) in 
include/asm-ppc/nmi.h (yes, still arch/ppc for now :-( ). But for a clean 
implementation, that has chances for upstream merge (in arch/powerpc later), 
I would really like to hear if I should move on further this way. 

My impression is, that changing the name from touch_nmi_watchdog() to 
something like touch_watchdog(), and therefore touching lots of files, makes 
it more unlikely that this resulting patch will get accepted. But 
implementing this bootup watchdog support in asm-ppc(asm-powerpc)/nmi.h 
header seems also not totally correct, since it's not really an NMI in this 
case.

Any thoughts on this?

Thanks.

Best regards,
Stefan

diff --git a/include/asm-ppc/nmi.h b/include/asm-ppc/nmi.h
new file mode 100644
index 0000000..f18862b
--- /dev/null
+++ b/include/asm-ppc/nmi.h
@@ -0,0 +1,16 @@
+/*
+ *  linux/include/asm-ppc/nmi.h
+ */
+#ifndef ASM_NMI_H
+#define ASM_NMI_H
+
+#ifdef BOARD_WATCHDOG_FUNC
+#define touch_nmi_watchdog	BOARD_WATCHDOG_FUNC
+#else
+static inline void touch_nmi_watchdog(void)
+{
+	touch_softlockup_watchdog();
+}
+#endif
+
+#endif /* ASM_NMI_H */

^ permalink raw reply related

* Re: [PATCH] pegasos_eth.c: Fix compile error over MV643XX_ defines
From: Dale Farnsworth @ 2007-10-30 10:22 UTC (permalink / raw)
  To: Sven Luther
  Cc: Tzachi Perelstein, Jeff Garzik, netdev, linuxppc-dev,
	Luis R. Rodriguez, Lennert Buytenhek
In-Reply-To: <20071030093606.GA20920@powerlinux.fr>

On Tue, Oct 30, 2007 at 10:36:06AM +0100, Sven Luther wrote:
> On Tue, Oct 30, 2007 at 03:44:59AM -0400, Luis R. Rodriguez wrote:
> > On 10/29/07, Dale Farnsworth <dale@farnsworth.org> wrote:
> > > On Mon, Oct 29, 2007 at 05:27:29PM -0400, Luis R. Rodriguez wrote:
> > > > This commit made an incorrect assumption:
> > > > --
> > > > Author: Lennert Buytenhek <buytenh@wantstofly.org>
> > > >  Date:   Fri Oct 19 04:10:10 2007 +0200
> > > >
> > > >     mv643xx_eth: Move ethernet register definitions into private header
> > > >
> > > >     Move the mv643xx's ethernet-related register definitions from
> > > >     include/linux/mv643xx.h into drivers/net/mv643xx_eth.h, since
> > > >     they aren't of any use outside the ethernet driver.
> > > >
> > > >     Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
> > > >     Acked-by: Tzachi Perelstein <tzachi@marvell.com>
> > > >     Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
> > > > --
> > > >
> > > > arch/powerpc/platforms/chrp/pegasos_eth.c made use of a 3 defines there.
> > > >
> > > > mcgrof@pogo:~/devel/wireless-2.6$ git-describe
> > > >
> > > > v2.6.24-rc1-138-g0119130
> > > >
> > > > This patch fixes this by internalizing 3 defines onto pegasos which are
> > > > simply no longer available elsewhere. Without this your compile will fail
> > >
> > > That compile failure was fixed in commit
> > > 30e69bf4cce16d4c2dcfd629a60fcd8e1aba9fee by Al Viro.
> > >
> > > However, as I examine that commit, I see that it defines offsets from
> > > the eth block in the chip, rather than the full chip registeri block
> > > as the Pegasos 2 code expects.  So, I think it fixes the compile
> > > failure, but leaves the Pegasos 2 broken.
> > >
> > > Luis, do you have Pegasos 2 hardware?  Can you (or anyone) verify that
> > > the following patch is needed for the Pegasos 2?
> > 
> > Nope, sorry.
> 
> I am busy right now, but have various pegasos machines available for
> testing. What exactly should i test ? 

Thanks Sven.

Test whether an Ethernet port works at all.  I think it's currently
broken, but should work with the patch I supplied.

-Dale

^ permalink raw reply

* Re: [PATCH] pegasos_eth.c: Fix compile error over MV643XX_ defines
From: Sven Luther @ 2007-10-30  9:36 UTC (permalink / raw)
  To: Luis R. Rodriguez
  Cc: Tzachi Perelstein, Jeff Garzik, linuxppc-dev, netdev,
	Lennert Buytenhek
In-Reply-To: <43e72e890710300044o60bfc46cv8815226e39634996@mail.gmail.com>

On Tue, Oct 30, 2007 at 03:44:59AM -0400, Luis R. Rodriguez wrote:
> On 10/29/07, Dale Farnsworth <dale@farnsworth.org> wrote:
> > On Mon, Oct 29, 2007 at 05:27:29PM -0400, Luis R. Rodriguez wrote:
> > > This commit made an incorrect assumption:
> > > --
> > > Author: Lennert Buytenhek <buytenh@wantstofly.org>
> > >  Date:   Fri Oct 19 04:10:10 2007 +0200
> > >
> > >     mv643xx_eth: Move ethernet register definitions into private header
> > >
> > >     Move the mv643xx's ethernet-related register definitions from
> > >     include/linux/mv643xx.h into drivers/net/mv643xx_eth.h, since
> > >     they aren't of any use outside the ethernet driver.
> > >
> > >     Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
> > >     Acked-by: Tzachi Perelstein <tzachi@marvell.com>
> > >     Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
> > > --
> > >
> > > arch/powerpc/platforms/chrp/pegasos_eth.c made use of a 3 defines there.
> > >
> > > mcgrof@pogo:~/devel/wireless-2.6$ git-describe
> > >
> > > v2.6.24-rc1-138-g0119130
> > >
> > > This patch fixes this by internalizing 3 defines onto pegasos which are
> > > simply no longer available elsewhere. Without this your compile will fail
> >
> > That compile failure was fixed in commit
> > 30e69bf4cce16d4c2dcfd629a60fcd8e1aba9fee by Al Viro.
> >
> > However, as I examine that commit, I see that it defines offsets from
> > the eth block in the chip, rather than the full chip registeri block
> > as the Pegasos 2 code expects.  So, I think it fixes the compile
> > failure, but leaves the Pegasos 2 broken.
> >
> > Luis, do you have Pegasos 2 hardware?  Can you (or anyone) verify that
> > the following patch is needed for the Pegasos 2?
> 
> Nope, sorry.

I am busy right now, but have various pegasos machines available for
testing. What exactly should i test ? 

Friendly,

Sven Luther

^ permalink raw reply

* Re: boot/wrap assumes a biarch toolchain?
From: Andreas Schwab @ 2007-10-30  9:20 UTC (permalink / raw)
  To: Jan Dittmer; +Cc: linuxppc-dev, Anton Blanchard
In-Reply-To: <4726DD82.8050200@l4x.org>

Jan Dittmer <jdi@l4x.org> writes:

> Your mail from 2007-10-29 4:39 pm (CET)
>
>>> Your compiler still needs -m32 to generate 32-bit code (or use
>>> --with-cpu=default32 to make that the default).
>
> See the 'still' ?

How would the compiler know whether to generate 64bit or 32bit code??

Andreas.

-- 
Andreas Schwab, SuSE Labs, schwab@suse.de
SuSE Linux Products GmbH, Maxfeldstraße 5, 90409 Nürnberg, Germany
PGP key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
"And now for something completely different."

^ permalink raw reply

* MPC8360: Support for two SDRAM banks in the Kernel memory management?
From: Jens Gehrlein @ 2007-10-30  8:50 UTC (permalink / raw)
  To: linuxppc-embedded Mailinglist

Hi,

the MPC8360 has two DDR SDRAM controllers. In the 2x32 bit mode
data transfers from/to the SDRAM can be handled by the MPC and the
QUICC Engine independently. For instance, the core can access one
bank and the QUICC Engine can access the other bank via DMA for
lookup tables, temporary buffers, etc. in the same time.

IMHO the Linux Kernel supports only one linear virtual address space.
So how could the kernel memory management (DMA, alloc, etc.) ensure,
that data transfers go from/to the QUICC Engine to/from the second
SDRAM bank?

Does anybody know if bank-separated memory management is supported
by the Linux Kernel, especially for the MPC8360?

Thanks in advance
   Jens

^ permalink raw reply

* [PATCH 2/2 v2] Add DMA engine and SOC device support to mpc8641hpcn board
From: Zhang Wei @ 2007-10-30  9:23 UTC (permalink / raw)
  To: paulus; +Cc: linuxppc-dev
In-Reply-To: <11937362292747-git-send-email-wei.zhang@freescale.com>

Add DMA engine and SOC device support to mpc8641hpcn board

Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
---
 arch/powerpc/boot/dts/mpc8641_hpcn.dts     |   32 ++++++++++++++++++++++++++++
 arch/powerpc/platforms/86xx/mpc86xx_hpcn.c |   16 ++++++++++++++
 2 files changed, 48 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 3677659..ad6c528 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -380,5 +380,37 @@
 				  01000000 0 00000000
 				  0 00100000>;
 		};
+
+		dma@21000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "fsl,mpc8540-dma";
+			reg = <21300 4>;
+			ranges = <0 21100 200>;
+			dma-channel@0 {
+				compatible = "fsl,mpc8540-dma-channel";
+				reg = <0 80>;
+				interrupt-parent = <&mpic>;
+				interrupts = <14 2>;
+			};
+			dma-channel@80 {
+				compatible = "fsl,mpc8540-dma-channel";
+				reg = <80 80>;
+				interrupt-parent = <&mpic>;
+				interrupts = <15 2>;
+			};
+			dma-channel@100 {
+				compatible = "fsl,mpc8540-dma-channel";
+				reg = <100 80>;
+				interrupt-parent = <&mpic>;
+				interrupts = <16 2>;
+			};
+			dma-channel@180 {
+				compatible = "fsl,mpc8540-dma-channel";
+				reg = <180 80>;
+				interrupt-parent = <&mpic>;
+				interrupts = <17 2>;
+			};
+		};
 	};
 };
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 32a531a..92dcc22 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -18,6 +18,7 @@
 #include <linux/kdev_t.h>
 #include <linux/delay.h>
 #include <linux/seq_file.h>
+#include <linux/of_platform.h>
 
 #include <asm/system.h>
 #include <asm/time.h>
@@ -227,3 +228,18 @@ define_machine(mpc86xx_hpcn) {
 	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
 #endif
 };
+
+static struct of_device_id mpc86xx_of_ids[] = {
+	{ .type = "soc", },
+	{},
+};
+
+static __init int mpc86xx_of_device_init(void)
+{
+	if (!machine_is(mpc86xx_hpcn))
+		return 0;
+
+	return of_platform_bus_probe(NULL, mpc86xx_of_ids, NULL);
+}
+
+device_initcall(mpc86xx_of_device_init);
-- 
1.5.2

^ permalink raw reply related

* [PATCH 1/2 v2] Add Freescale DMA and DMA channel to Documentation/powerpc/booting-without-of.txt file.
From: Zhang Wei @ 2007-10-30  9:23 UTC (permalink / raw)
  To: paulus; +Cc: linuxppc-dev

This patch adds Freescale DMA and DMA channel definition to
Documentation/powerpc/booting-without-of.txt file.

Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
---
 Documentation/powerpc/booting-without-of.txt |   59 ++++++++++++++++++++++++++
 1 files changed, 59 insertions(+), 0 deletions(-)

diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index a96e853..bc3f250 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -52,6 +52,8 @@ Table of Contents
       i) Freescale QUICC Engine module (QE)
       j) CFI or JEDEC memory-mapped NOR flash
       k) Global Utilities Block
+      l) Freescale DMA
+      m) Freescale DMA channel
 
   VII - Specifying interrupt information for devices
     1) interrupts property
@@ -2242,6 +2244,63 @@ platforms are moved over to use the flattened-device-tree model.
 			   available.
 			   For Axon: 0x0000012a
 
+   l) Freescale DMA
+
+   The DMA for dma-engine driver of Freescale MPC8540 silicon DMA
+   controller which also fit for MPC8560, MPC8555,
+   MPC8548, MPC8641 and MPC8349 silicon DMA controller,
+
+   For each DMA node, you should define channels included.
+   Please see below 'm) Freescale DMA channel' for DMA channel's definition.
+
+   Required properties:
+
+    - compatible : Should be "fsl,mpc8540-dma" or "fsl,mpc8349-dma"
+    - reg : Offset and length of DMA general status register.
+    - ranges : Should be defined as specified in 1) to describe the
+               DMA controller channels.
+
+  Example:
+	dma@21000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "fsl,mpc8540-dma";
+		reg = <21300 4>;
+		ranges = <0 21100 200>;
+		dma-channel@0 {
+			compatible = "fsl,mpc8540-dma-channel";
+			reg = <0 80>;
+			interrupt-parent = <&mpic>;
+			interrupts = <14 2>;
+		};
+		dma-channel@80 {
+			compatible = "fsl,mpc8540-dma-channel";
+			reg = <80 80>;
+			interrupt-parent = <&mpic>;
+			interrupts = <15 2>;
+		};
+		dma-channel@100 {
+			compatible = "fsl,mpc8540-dma-channel";
+			reg = <100 80>;
+			interrupt-parent = <&mpic>;
+			interrupts = <16 2>;
+		};
+		dma-channel@180 {
+			compatible = "fsl,mpc8540-dma-channel";
+			reg = <180 80>;
+			interrupt-parent = <&mpic>;
+			interrupts = <17 2>;
+		};
+	};
+
+   m) Freescale DMA channel
+
+   Required properties:
+
+    - compatible : Should be "fsl,mpc8540-dma-channel"
+                   or "fsl,mpc8349-dma-channel"
+    - reg : Offset and length of the register set for the DMA channel.
+
    More devices will be defined as this spec matures.
 
 VII - Specifying interrupt information for devices
-- 
1.5.2

^ permalink raw reply related

* Re: compile warning
From: Arnd Bergmann @ 2007-10-30  9:05 UTC (permalink / raw)
  To: linuxppc-dev
In-Reply-To: <1193730224.4997.13.camel@p60635-ste.ids.de>

On Tuesday 30 October 2007, Sergej Stepanov wrote:

> -void
> +void __init
>  cpm2_reset(void)
>  {
>  #ifdef CONFIG_PPC_85xx
> 
> ------------------
> I am not sure it is ok.

Yes, this looks good.

> 
> But i have other 2 warnings (no modules).
> 
> WARNING: vmlinux.o(.exit.text+0x5da): Section mismatch: reference to
> .init.data:of_platform_serial_driver (between 'of_platform_serial_exit'
> and 'phy_exit')  
> WARNING: vmlinux.o(.exit.text+0x5e2): Section mismatch: reference to
> .init.data:of_platform_serial_driver (between 'of_platform_serial_exit' 
> and 'phy_exit')  

This seems to be my fault. I'll try to come up with the right fix.

	Arnd <><

^ permalink raw reply

* Re: [Cbe-oss-dev] [PATCH] Fix build failure in platforms/celleb/setup.c which CONFIG_VIRT_CPU_ACCOUNTING is not defined.
From: Arnd Bergmann @ 2007-10-30  8:52 UTC (permalink / raw)
  To: cbe-oss-dev; +Cc: LinuxPPC-dev
In-Reply-To: <20071030035504.GW24243@bakeyournoodle.com>

On Tuesday 30 October 2007, Tony Breeds wrote:
> Without this patch I get the following build failure
> =A0 CC =A0 =A0 =A0arch/powerpc/platforms/celleb/setup.o
> arch/powerpc/platforms/celleb/setup.c:151: error: 'generic_calibrate_decr=
' undeclared here (not in a function)
>=20
> Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>

Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>

^ permalink raw reply

* RE: [PATCH 0/5 v3] Porting RapidIO driver from ppc to powerpc architecture and adding memory mapped RapidIO driver.
From: Zhang Wei-r63237 @ 2007-10-30  8:40 UTC (permalink / raw)
  To: Kumar Gala, pterry; +Cc: linuxppc-dev, paulus, linux-kernel
In-Reply-To: <B485F0BB-A5C5-4059-8BE1-7020701EB818@kernel.crashing.org>

Yes, I'm working on it. Do not worry about it.

Wei.=20

> -----Original Message-----
> From: Kumar Gala [mailto:galak@kernel.crashing.org]=20
> Sent: Tuesday, October 30, 2007 4:31 AM
> To: pterry@micromemory.com
> Cc: Zhang Wei-r63237; mporter@kernel.crashing.org;=20
> paulus@samba.org; linuxppc-dev@ozlabs.org;=20
> linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 0/5 v3] Porting RapidIO driver from ppc=20
> to powerpc architecture and adding memory mapped RapidIO driver.
>=20
>=20
> On Oct 29, 2007, at 2:38 PM, Phil Terry wrote:
>=20
> > Can anyone tell me what the status of these are? What kernel =20
> > release are
> > they targetted for? Currently I'm trying to work with 2.6.23 plus =20
> > these
> > patches locally.
>=20
> hopefully 2.6.25.  I'd like to get the documentation updates in =20
> 2.6.24 if we have agreement on them.
>=20
> - k
>=20

^ permalink raw reply

* Re: [PATCH] ehea: add kexec support
From: Christoph Raisch @ 2007-10-30  8:39 UTC (permalink / raw)
  To: michael
  Cc: Thomas Q Klein, ossthema, Jeff Garzik, Jan-Bernd Themann, netdev,
	linux-kernel, linux-ppc, Marcus Eder, Stefan Roscher
In-Reply-To: <1193610737.9637.1.camel@concordia>



Michael Ellerman <michael@ellerman.id.au> wrote on 28.10.2007 23:32:17:
>
>
> How do you plan to support kdump?
>

When kexec is fully supported kdump should work out of the box
as for any other ethernet card (if you load the right eth driver).
There's nothing specific to kdump you have to handle in
ethernet device drivers.
Hope I didn't miss anything here...

Gruss / Regards
Christoph R

^ permalink raw reply

* Re: [PATCH] pegasos_eth.c: Fix compile error over MV643XX_ defines
From: Luis R. Rodriguez @ 2007-10-30  7:44 UTC (permalink / raw)
  To: Dale Farnsworth
  Cc: netdev, Tzachi Perelstein, Lennert Buytenhek, Jeff Garzik,
	linuxppc-dev
In-Reply-To: <20071029223900.GA7097@xyzzy.farnsworth.org>

On 10/29/07, Dale Farnsworth <dale@farnsworth.org> wrote:
> On Mon, Oct 29, 2007 at 05:27:29PM -0400, Luis R. Rodriguez wrote:
> > This commit made an incorrect assumption:
> > --
> > Author: Lennert Buytenhek <buytenh@wantstofly.org>
> >  Date:   Fri Oct 19 04:10:10 2007 +0200
> >
> >     mv643xx_eth: Move ethernet register definitions into private header
> >
> >     Move the mv643xx's ethernet-related register definitions from
> >     include/linux/mv643xx.h into drivers/net/mv643xx_eth.h, since
> >     they aren't of any use outside the ethernet driver.
> >
> >     Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
> >     Acked-by: Tzachi Perelstein <tzachi@marvell.com>
> >     Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
> > --
> >
> > arch/powerpc/platforms/chrp/pegasos_eth.c made use of a 3 defines there.
> >
> > mcgrof@pogo:~/devel/wireless-2.6$ git-describe
> >
> > v2.6.24-rc1-138-g0119130
> >
> > This patch fixes this by internalizing 3 defines onto pegasos which are
> > simply no longer available elsewhere. Without this your compile will fail
>
> That compile failure was fixed in commit
> 30e69bf4cce16d4c2dcfd629a60fcd8e1aba9fee by Al Viro.
>
> However, as I examine that commit, I see that it defines offsets from
> the eth block in the chip, rather than the full chip registeri block
> as the Pegasos 2 code expects.  So, I think it fixes the compile
> failure, but leaves the Pegasos 2 broken.
>
> Luis, do you have Pegasos 2 hardware?  Can you (or anyone) verify that
> the following patch is needed for the Pegasos 2?

Nope, sorry.

  Luis

^ permalink raw reply

* Re: compile warning
From: Sergej Stepanov @ 2007-10-30  7:43 UTC (permalink / raw)
  To: linux-ppc, Kumar Gala
In-Reply-To: <77CDBB94-A21E-4A84-9818-4622CB2F572C@kernel.crashing.org>

thanks for your reply.
> >
> > WARNING: vmlinux.o(.text+0x10f5c): Section mismatch: reference
> > to .init.text:cpm_muram_init (between 'cpm2_reset' and
> > 'cpm2_smc_clk_setup')
> >
> It should be fixed, but its highly unlikely you'll see a problem  
> unless you start trying to build core parts of the CPM code as modules.
> 
> - k
we have no modules for CPM.
Fix it i could with :

diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index f8a621e..f507ada 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -61,7 +61,7 @@ cpm2_map_t __iomem *cpm2_immr;
 					   of space for CPM as it is larger
 					   than on PQ2 */
 
-void
+void __init
 cpm2_reset(void)
 {
 #ifdef CONFIG_PPC_85xx

------------------
I am not sure it is ok.

But i have other 2 warnings (no modules).

WARNING: vmlinux.o(.exit.text+0x5da): Section mismatch: reference to .init.data:of_platform_serial_driver (between 'of_platform_serial_exit' and 'phy_exit')
WARNING: vmlinux.o(.exit.text+0x5e2): Section mismatch: reference to .init.data:of_platform_serial_driver (between 'of_platform_serial_exit' and 'phy_exit')
 
Regards.
-- 
Sergej Stepanov
IDS GmbH
Nobelstr. 18, Zim. 2.1.05
D-76275 Ettlingen
T +49 (0) 72 43/2 18-615
F +49 (0) 72 43/2 18-400
http://www.ids.de
Email: Sergej.Stepanov@ids.de

^ permalink raw reply related

* Re: boot/wrap assumes a biarch toolchain?
From: Jan Dittmer @ 2007-10-30  7:30 UTC (permalink / raw)
  To: Andreas Schwab; +Cc: linuxppc-dev, Anton Blanchard
In-Reply-To: <je640pebqn.fsf@sykes.suse.de>

Andreas Schwab wrote:
> Jan Dittmer <jdi@l4x.org> writes:
> 
>> Same error, you write above that a newer compiler version should
>> not need -m32 or --with-cpu=default32 any more?
> 
> ??? Where did I say that?

Your mail from 2007-10-29 4:39 pm (CET)

 >> Your compiler still needs -m32 to generate 32-bit code (or use
 >> --with-cpu=default32 to make that the default).

See the 'still' ? I just assumed that it must have been changed
in newer versions.

But to sum up. I've to compile with '--with-cpu=default32' and all
should be fine? Because I have no idea how to pass the -m32 flag
just to the 32-bit code generation. Passing it via CFLAGS obviously
does not work as it also passes it to the 64 bit code generation.

Jan

^ permalink raw reply

* Re: [PATCH 05/11] [POWERPC] TQM5200 DTS
From: Grant Likely @ 2007-10-30  5:58 UTC (permalink / raw)
  To: Grant Likely, Marian Balakowicz, linuxppc-dev, Martin Krause
In-Reply-To: <20071030005833.GI29263@localhost.localdomain>

On 10/29/07, David Gibson <david@gibson.dropbear.id.au> wrote:
> On Mon, Oct 29, 2007 at 09:40:23AM -0600, Grant Likely wrote:
> > It's probably more appropriate to have the flash partition layout in
> > the u-boot environment and have u-boot populate the partition
> > information in the device tree.
>
> That sounds like a reasonable idea.
>
> But if the flash partition layout is *not* fixed - but selectable by
> the board installer, then it should certainly not be hardcoded into a
> fixed dts.

Exactly my point!  :-)

Cheers,
g.

-- 
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195

^ permalink raw reply

* [Fwd: mpc8xx, i2c read DB busy issue]
From: Ankur Maheshwari @ 2007-10-30  5:55 UTC (permalink / raw)
  To: linuxppc-embedded

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From: Ankur Maheshwari <ankur_maheshwari@procsys.com>
To: linuxppc-embedded@ozlabs.org
Subject: mpc8xx, i2c read DB busy issue
Date: Fri, 26 Oct 2007 15:00:31 +0530
Message-ID: <4721B3B7.8070602@procsys.com>

Hi all,

I am trying to use mpc860 as i2c-SLAVE. Kernel, I am using is 
Linux-2.4.4, which I can't change due to some reasons.

I am able to do I2C read/write operations on mpc8xx-i2c slave only after 
re-insmoding my driver module (i2c-algo-8xx.c, and adapter layer drive, 
code I took form i2c-rpx/r360.c ).

The issue I am facing is when I insmod i2c-driver on fresh Linux boot, 
any i2c-mpc860 as slave read/write operation gives me busy status (which 
is for Rx BD not available) in Controller's i2c Event Registers. When I 
get busy status I have to do force_close() and re-init of bd, then only 
busy status goes off.

I tried calling cpm_iic_init(); twice while __init but with no change in 
busy status.

After some initial try, i2c slave write works but i2c read gives no data 
to the master. After re-insmoding driver, read/write works with some 
times (1 out of 15 times) i2c-read failing.

But still I can't understand why busy is coming....

Any help or suggestions are highly appreciated.

thanks,
Ankur Maheshwari

 


^ permalink raw reply

* [RFC/PATCH] powerpc: Deal with 44x virtually tagged icache
From: Benjamin Herrenschmidt @ 2007-10-30  5:16 UTC (permalink / raw)
  To: linuxppc-dev

The 44x family has an interesting "feature" which is a virtually
tagged instruction cache (yuck !). So far, we haven't dealt with
it properly, which means we've been mostly lucky or people didn't
report the problems, unless people have been running custom patches
in their distro...

This is an attempt at fixing it properly. I chose to do it by
setting a global flag whenever we change a PTE that was previously
marked executable, and flush the entire instruction cache upon
return to user space when that happens.

This is a bit heavy handed, but it's hard to do more fine grained
flushes as the icbi instruction, on those processor, for some very
strange reasons (since the cache is virtually mapped) still requires
a valid TLB entry for reading in the target address space, which
isn't something I want to deal with.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---

Fortunately, we don't support SMP on these or this solution wouldn't
work.

It does mean we do a bit of over-flushing on swap but on the
other hand, the code is simple. Another option would have been
to do the iccci after any syscall that potentially unmaps or
changes a mapping, like sys_munmap, sys_mremap, sys_sbrk, but
also the shmem stuff etc... I decided there was just too many
and was worried I would miss one.

This not very tested as I don't have a test case at hand showing the
problem and didn't feel like writing one today :-) It boots though.

Careful eyes will notice I didn't do the flush on fast_exception_return,
which shouldn't be necessary.

 arch/powerpc/kernel/entry_32.S      |   25 +++++++++++++++++++++++++
 arch/powerpc/kernel/misc_32.S       |    9 +++++++++
 arch/powerpc/mm/44x_mmu.c           |    1 +
 include/asm-powerpc/pgtable-ppc32.h |   13 +++++++++++++
 4 files changed, 48 insertions(+)

Index: linux-work/arch/powerpc/kernel/entry_32.S
===================================================================
--- linux-work.orig/arch/powerpc/kernel/entry_32.S	2007-10-15 11:19:35.000000000 +1000
+++ linux-work/arch/powerpc/kernel/entry_32.S	2007-10-30 16:09:51.000000000 +1100
@@ -244,6 +244,13 @@ syscall_exit_cont:
 	andis.	r10,r0,DBCR0_IC@h
 	bnel-	load_dbcr0
 #endif
+#ifdef CONFIG_44x
+	lis	r4,icache_44x_need_flush@ha
+	lwz	r5,icache_44x_need_flush@l(r4)
+	cmplwi	cr0,r5,0
+	bne-	2f
+1:
+#endif /* CONFIG_44x */
 	stwcx.	r0,0,r1			/* to clear the reservation */
 	lwz	r4,_LINK(r1)
 	lwz	r5,_CCR(r1)
@@ -259,6 +266,13 @@ syscall_exit_cont:
 	SYNC
 	RFI
 
+#ifdef CONFIG_44x
+2:	li	r7,0
+	iccci	r0,r0
+	stw	r7,icache_44x_need_flush@l(r4)
+	b	1b
+#endif  /* CONFIG_44x */
+
 66:	li	r3,-ENOSYS
 	b	ret_from_syscall
 
@@ -683,6 +697,17 @@ resume_kernel:
 
 	/* interrupts are hard-disabled at this point */
 restore:
+#ifdef CONFIG_44x
+	lis	r4,icache_44x_need_flush@ha
+	lwz	r5,icache_44x_need_flush@l(r4)
+	cmplwi	cr0,r5,0
+	beq+	1f
+	iccci	r0,r0
+	li	r6,0
+	iccci	r0,r0
+	stw	r6,icache_44x_need_flush@l(r4)
+1:
+#endif  /* CONFIG_44x */
 	lwz	r0,GPR0(r1)
 	lwz	r2,GPR2(r1)
 	REST_4GPRS(3, r1)
Index: linux-work/arch/powerpc/mm/44x_mmu.c
===================================================================
--- linux-work.orig/arch/powerpc/mm/44x_mmu.c	2007-09-28 11:42:05.000000000 +1000
+++ linux-work/arch/powerpc/mm/44x_mmu.c	2007-10-30 15:30:50.000000000 +1100
@@ -35,6 +35,7 @@
  */
 unsigned int tlb_44x_index; /* = 0 */
 unsigned int tlb_44x_hwater = PPC44x_TLB_SIZE - 1 - PPC44x_EARLY_TLBS;
+int icache_44x_need_flush;
 
 /*
  * "Pins" a 256MB TLB entry in AS0 for kernel lowmem
Index: linux-work/include/asm-powerpc/pgtable-ppc32.h
===================================================================
--- linux-work.orig/include/asm-powerpc/pgtable-ppc32.h	2007-09-28 11:42:10.000000000 +1000
+++ linux-work/include/asm-powerpc/pgtable-ppc32.h	2007-10-30 15:30:50.000000000 +1100
@@ -11,6 +11,11 @@
 extern unsigned long va_to_phys(unsigned long address);
 extern pte_t *va_to_pte(unsigned long address);
 extern unsigned long ioremap_bot, ioremap_base;
+
+#ifdef CONFIG_44x
+extern int icache_44x_need_flush;
+#endif
+
 #endif /* __ASSEMBLY__ */
 
 /*
@@ -562,6 +567,10 @@ static inline unsigned long pte_update(p
 	: "=&r" (old), "=&r" (tmp), "=m" (*p)
 	: "r" (p), "r" (clr), "r" (set), "m" (*p)
 	: "cc" );
+#ifdef CONFIG_44x
+	if ((old & _PAGE_USER) && (old & _PAGE_HWEXEC))
+		icache_44x_need_flush = 1;
+#endif
 	return old;
 }
 #else
@@ -582,6 +591,10 @@ static inline unsigned long long pte_upd
 	: "=&r" (old), "=&r" (tmp), "=m" (*p)
 	: "r" (p), "r" ((unsigned long)(p) + 4), "r" (clr), "r" (set), "m" (*p)
 	: "cc" );
+#ifdef CONFIG_44x
+	if ((old & _PAGE_USER) && (old & _PAGE_HWEXEC))
+		icache_44x_need_flush = 1;
+#endif
 	return old;
 }
 #endif
Index: linux-work/arch/powerpc/kernel/misc_32.S
===================================================================
--- linux-work.orig/arch/powerpc/kernel/misc_32.S	2007-10-30 15:15:03.000000000 +1100
+++ linux-work/arch/powerpc/kernel/misc_32.S	2007-10-30 15:30:50.000000000 +1100
@@ -543,12 +543,21 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_I
 	addi	r3,r3,L1_CACHE_BYTES
 	bdnz	0b
 	sync
+#ifndef CONFIG_44x
+	/* We don't flush the icache on 44x. Those have a virtual icache
+	 * and we don't have access to the virtual address here (it's
+	 * not the page vaddr but where it's mapped in user space). The
+	 * flushing of the icache on these is handled elsewhere, when
+	 * a change in the address space occurs, before returning to
+	 * user space
+	 */
 	mtctr	r4
 1:	icbi	0,r6
 	addi	r6,r6,L1_CACHE_BYTES
 	bdnz	1b
 	sync
 	isync
+#endif /* CONFIG_44x */
 	blr
 
 /*

^ permalink raw reply

* Re: [PATCH] [Powerpc V2] fix switch_slb handling of 1T ESID values
From: Benjamin Herrenschmidt @ 2007-10-30  4:17 UTC (permalink / raw)
  To: Will Schmidt; +Cc: linuxppc-dev, paulus
In-Reply-To: <20071029183218.19914.51410.stgit@farscape.rchland.ibm.com>


On Mon, 2007-10-29 at 13:32 -0500, Will Schmidt wrote:
> [Powerpc V2] fix switch_slb handling of 1T ESID values
> 
> Now that we have 1TB segment size support, we need to be using the
> GET_ESID_1T macro when comparing ESID values for pc,stack, and
> unmapped_base within switch_slb().    A new helper function called
> esids_match() contains the logic for deciding when to call GET_ESID
> and GET_ESID_1T.
> 
> This also happens to fix a duplicate-slb-entry inspired machine-check
> exception I was seeing when trying to run java on a power6 partition.
> 
> Tested on power6 and power5.
> 
> Signed-Off-By:  Will Schmidt <will_schmidt@vnet.ibm.com>
> ---

Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

^ permalink raw reply


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