* [PATCH 4/5] PowerPC 74xx: Katana Qp base support
From: Andrei Dolnikov @ 2007-11-16 16:31 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20071116154344.GA25062@ru.mvista.com>
Emerson Katana Qp platform specific code
Signed-off-by: Andrei Dolnikov <adolnikov@ru.mvista.com>
---
arch/powerpc/platforms/embedded6xx/Kconfig | 9 +
arch/powerpc/platforms/embedded6xx/Makefile | 1
arch/powerpc/platforms/embedded6xx/katanaqp.c | 180 ++++++++++++++++++++++++++
3 files changed, 190 insertions(+)
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 8924095..33190bd 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -46,6 +46,15 @@ config PPC_PRPMC2800
help
This option enables support for the Motorola PrPMC2800 board
+config PPC_KATANAQP
+ bool "Emerson-Katana Qp"
+ depends on EMBEDDED6xx
+ select MV64X60
+ select NOT_COHERENT_CACHE
+ select WANT_DEVICE_TREE
+ help
+ This option enables support for the Emerson Katana Qp board
+
config TSI108_BRIDGE
bool
depends on MPC7448HPC2 || PPC_HOLLY
diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile
index 844947c..c83558f 100644
--- a/arch/powerpc/platforms/embedded6xx/Makefile
+++ b/arch/powerpc/platforms/embedded6xx/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_MPC7448HPC2) += mpc7448_hpc2.o
obj-$(CONFIG_LINKSTATION) += linkstation.o ls_uart.o
obj-$(CONFIG_PPC_HOLLY) += holly.o
obj-$(CONFIG_PPC_PRPMC2800) += prpmc2800.o
+obj-$(CONFIG_PPC_KATANAQP) += katanaqp.o
diff --git a/arch/powerpc/platforms/embedded6xx/katanaqp.c b/arch/powerpc/platforms/embedded6xx/katanaqp.c
new file mode 100644
index 0000000..c0a8469
--- /dev/null
+++ b/arch/powerpc/platforms/embedded6xx/katanaqp.c
@@ -0,0 +1,180 @@
+/*
+ * Board setup routines for the Emerson Katana Qp
+ *
+ * Authors: Vladislav Buzov <vbuzov@ru.mvista.com>
+ * Andrei Dolnikov <adolnikov@ru.mvista.com>
+ *
+ * Based on prpmc2800.c by Dale Farnsworth <dale@farnsworth.org>
+ *
+ * 2007 (c) MontaVista, Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/seq_file.h>
+#include <linux/of_platform.h>
+#include <linux/pci.h>
+
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/kexec.h>
+
+#include <mm/mmu_decl.h>
+
+#include <sysdev/mv64x60.h>
+
+#define PLATFORM_NAME_MAX 64
+
+/* CPLD registers definitions */
+#define KATANAQP_CPLD_RCR 0x0004 /* Reset command */
+#define KATANAQP_CPLD_RCR_CPUHR (1 << 7)
+
+#define KATANAQP_CPLD_HVR 0x0020
+
+#define KATANAQP_CPLD_PSR 0x0030 /* PCI status */
+#define KATANAQP_CPLD_PSR_PMCM (1 << 1)
+
+#define KATANAQP_CPLD_HCR 0x0044
+
+static char katanaqp_platform_name[PLATFORM_NAME_MAX];
+
+static void __iomem *cpld_base;
+
+int katanaqp_exclude_device(struct pci_controller *hose, u_char bus,
+ u_char devfn)
+{
+ if (bus == 0 && PCI_SLOT(devfn) == 0)
+ return PCIBIOS_DEVICE_NOT_FOUND;
+ else
+ return PCIBIOS_SUCCESSFUL;
+}
+
+static int __init katanaqp_is_monarch(void)
+{
+ return !(in_8((volatile char *)(cpld_base + KATANAQP_CPLD_PSR)) &
+ KATANAQP_CPLD_PSR_PMCM);
+}
+
+static void __init katanaqp_setup_arch(void)
+{
+ struct device_node *cpld;
+ const unsigned int *reg;
+
+ /*
+ * ioremap cpld registers in case they are later
+ * needed by katanaqp_reset_board().
+ */
+ cpld = of_find_node_by_path("/mv64x60@f8100000/cpld@f8200000");
+ reg = of_get_property(cpld, "reg", NULL);
+ of_node_put(cpld);
+ cpld_base = ioremap(reg[0], reg[1]);
+
+#ifdef CONFIG_PCI
+ if (katanaqp_is_monarch()) {
+ mv64x60_pci_init();
+ ppc_md.pci_exclude_device = katanaqp_exclude_device;
+ }
+#endif
+
+ printk("Emerson Network Power %s\n", katanaqp_platform_name);
+}
+
+static void katanaqp_reset_board(void)
+{
+ local_irq_disable();
+
+ /* issue hard reset to the reset command register */
+ out_8((volatile char *)(cpld_base + KATANAQP_CPLD_RCR),
+ KATANAQP_CPLD_RCR_CPUHR);
+ for (;;) ;
+}
+
+static void katanaqp_restart(char *cmd)
+{
+ katanaqp_reset_board();
+}
+
+#ifdef CONFIG_NOT_COHERENT_CACHE
+#define KATANAQP_COHERENCY_SETTING "off"
+#else
+#define KATANAQP_COHERENCY_SETTING "on"
+#endif
+
+void katanaqp_show_cpuinfo(struct seq_file *m)
+{
+ uint memsize = total_memory;
+
+ seq_printf(m, "vendor\t\t: Emerson Network Power\n");
+
+ seq_printf(m, "hardware rev\t: %d\n",
+ in_8((volatile char *)(cpld_base + KATANAQP_CPLD_HVR)));
+
+ seq_printf(m, "hardware config\t: %d\n",
+ in_8((volatile char *)(cpld_base + KATANAQP_CPLD_HCR)));
+
+ seq_printf(m, "memory size\t: %d MB\n", memsize / (1024 * 1024));
+
+ seq_printf(m, "voherency\t: %s\n", KATANAQP_COHERENCY_SETTING);
+
+ seq_printf(m, "PCI\t\t: %sMonarch\n",
+ katanaqp_is_monarch() ? "" : "Non-");
+}
+
+static int __init katanaqp_of_init(void)
+{
+ struct device_node *np;
+
+ np = of_find_compatible_node(NULL, NULL, "cfi-flash");
+ if (np)
+ of_platform_device_create(np, "of-flash", NULL);
+
+ return 0;
+}
+
+device_initcall(katanaqp_of_init);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init katanaqp_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+ unsigned long len = PLATFORM_NAME_MAX;
+ void *m;
+
+ if (!of_flat_dt_is_compatible(root, "emerson,Katana-Qp"))
+ return 0;
+
+ /* Update ppc_md.name with name from dt */
+ m = of_get_flat_dt_prop(root, "model", &len);
+ if (m)
+ strncpy(katanaqp_platform_name, m,
+ min((int)len, PLATFORM_NAME_MAX - 1));
+
+ return 1;
+}
+
+define_machine(katanaqp)
+{
+ .name = katanaqp_platform_name,
+ .probe = katanaqp_probe,
+ .setup_arch = katanaqp_setup_arch,
+ .init_early = mv64x60_init_early,
+ .show_cpuinfo = katanaqp_show_cpuinfo,
+ .init_IRQ = mv64x60_init_irq,
+ .get_irq = mv64x60_get_irq,
+ .restart = katanaqp_restart,
+ .calibrate_decr = generic_calibrate_decr,
+#ifdef CONFIG_KEXEC
+ .machine_kexec = default_machine_kexec,
+ .machine_kexec_prepare = default_machine_kexec_prepare,
+ .machine_crash_shutdown = default_machine_crash_shutdown,
+#endif
+};
^ permalink raw reply related
* [PATCH 3/5] PowerPC 74xx: Katana Qp bootwrapper
From: Andrei Dolnikov @ 2007-11-16 16:25 UTC (permalink / raw)
To: linuxppc-dev
Bootwrapper sources for Emerson Katana Qp
Signed-off-by: Andrei Dolnikov <adolnikov@ru.mvista.com>
---
arch/powerpc/boot/Makefile | 3
arch/powerpc/boot/cuboot-katanaqp.c | 470 ++++++++++++++++++++++++++++++++++++
2 files changed, 472 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 18e3271..92b8fac 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -56,7 +56,7 @@ src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c holly.c \
cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \
- fixed-head.S ep88xc.c cuboot-hpc2.c
+ fixed-head.S ep88xc.c cuboot-hpc2.c cuboot-katanaqp.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -159,6 +159,7 @@ image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo
image-$(CONFIG_SEQUOIA) += cuImage.sequoia
image-$(CONFIG_WALNUT) += treeImage.walnut
+image-$(CONFIG_PPC_KATANAQP) += cuImage.katanaqp
endif
# For 32-bit powermacs, build the COFF and miboot images
diff --git a/arch/powerpc/boot/cuboot-katanaqp.c b/arch/powerpc/boot/cuboot-katanaqp.c
new file mode 100644
index 0000000..905ad6a
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-katanaqp.c
@@ -0,0 +1,470 @@
+/*
+ * Emerson Katana Qp platform code.
+ *
+ * Authors: Vladislav Buzov <buzov@ru.mvista.com>
+ * Andrei Dolnikov <adolnikov@ru.mvista.com>
+ *
+ * Based on prpmc2800.c by Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2007 (c) MontaVista, Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <stdarg.h>
+#include <stddef.h>
+#include "cuboot.h"
+#include "ppcboot.h"
+#include "types.h"
+#include "page.h"
+#include "string.h"
+#include "stdio.h"
+#include "io.h"
+#include "ops.h"
+#include "mv64x60.h"
+
+#define Mb (1024U * 1024U)
+#define Gb (Mb * 1024U)
+
+#define MHz (1000U * 1000U)
+#define GHz (MHz * 1000U)
+
+#define BOARD_MODEL "Katana-Qp"
+#define BOARD_MODEL_MAX 12 /* max strlen(BOARD_MODEL) + 1 */
+#define BOARD_CFG_MAX 28 /* max strlen(BOARD_CFG) + 1 */
+#define BOARD_MODEL_LEN (BOARD_MODEL_MAX + BOARD_CFG_MAX)
+
+#define MTD_PART_NODE "partition"
+#define MTD_PART_NUM 3
+#define MTD_PART_NODE_LEN 20
+#define MTD_PART_MONITOR_SIZE (1*Mb)
+#define MTD_PART_KERNEL_SIZE (2*Mb)
+
+/*
+ * CPLD registers definitions
+ */
+#define KATANAQP_CPLD_RCR 0x0004 /* Reset command */
+#define KATANAQP_CPLD_RCR_CPUHR (1 << 7)
+
+#define KATANAQP_CPLD_JSR 0x0020 /* Jumper settings */
+#define KATANAQP_CPLD_JSR_EBFM (1 << 6)
+
+#define KATANAQP_CPLD_PSR 0x0030 /* PCI status */
+#define KATANAQP_CPLD_PSR_PMCM (1 << 1)
+
+#define KATANAQP_CPLD_HCR 0x0044 /* Hardware config */
+
+static bd_t bd;
+
+static u8 *bridge_base;
+static u8 *cpld_base;
+
+typedef enum {
+ KATANAQP_UNKNOWN,
+ KATANAQP_CFG_PRPMC_SINGLE,
+ KATANAQP_CFG_PRPMC_DUAL,
+ KATANAQP_CFG_PT2CC_SINGLE,
+ KATANAQP_CFG_PT5CC_SINGLE,
+ KATANAQP_CFG_MEDIA_DUAL,
+ KATANAQP_CFG_PT2CC_DUAL,
+ KATANAQP_CFG_PT5CC_DUAL,
+ KATANAQP_CFG_PT5CC_CUSTOM,
+ KATANAQP_CFG_MEDIA_SINGLE,
+ KATANAQP_CFG_UNKNOWN,
+} katanaqp_board_model;
+
+static katanaqp_board_model katanaqp_cfg;
+
+struct katanaqp_board_info {
+ char *cfg_name;
+ char eth_phys[3];
+};
+
+struct katanaqp_mtd_part {
+ char *name;
+ u32 size;
+ u32 ro;
+};
+
+static struct katanaqp_board_info katanaqp_board_info[] = {
+
+ [KATANAQP_CFG_PRPMC_SINGLE] = {
+ .cfg_name = "PrPMC Single Core",
+ .eth_phys = {10, 13, 6},
+ },
+
+ [KATANAQP_CFG_PRPMC_DUAL] = {
+ .cfg_name = "PrPMC Dual Core",
+ .eth_phys = {10, 13, 6}
+ },
+
+ [KATANAQP_CFG_PT2CC_SINGLE] = {
+ .cfg_name = "PT2CC Single Core",
+ .eth_phys = {9, 8, 6},
+ },
+
+ [KATANAQP_CFG_PT5CC_SINGLE] = {
+ .cfg_name = "PT5CC Single Core",
+ .eth_phys = {10, 13, 6},
+ },
+
+ [KATANAQP_CFG_MEDIA_DUAL] = {
+ .cfg_name = "Dual Core Media Blade",
+ .eth_phys = {10, 13, 6},
+ },
+
+ [KATANAQP_CFG_PT2CC_DUAL] = {
+ .cfg_name = "PT2CC Dual Core",
+ .eth_phys = {9, 8, 6},
+ },
+
+ [KATANAQP_CFG_PT5CC_DUAL] = {
+ .cfg_name = "PT5CC Dual Core",
+ .eth_phys = {10, 13, 6},
+ },
+
+ [KATANAQP_CFG_MEDIA_SINGLE] = {
+ .cfg_name = "Single Core Media Blade",
+ .eth_phys = {10, 13, 6},
+ },
+};
+
+/*
+ * Second flash bank partition layout.
+ */
+static struct katanaqp_mtd_part katanaqp_mtd_parts[MTD_PART_NUM] = {
+ {
+ .name = "Secondary Monitor",
+ .size = MTD_PART_MONITOR_SIZE,
+ .ro = 1,
+ },
+
+ {
+ .name = "Secondary Kernel",
+ .size = MTD_PART_KERNEL_SIZE,
+ },
+
+ {
+ /* Size depends on actual flash bank size */
+ .name = "Secondary FS",
+ },
+};
+
+static u8 *katanaqp_get_cpld_base(void)
+{
+ u32 v;
+ void *devp;
+
+ devp = finddevice("/mv64x60/cpld");
+ if (devp == NULL)
+ fatal("Error: Missing CPLD device tree node\n\r");
+
+ if (getprop(devp, "virtual-reg", &v, sizeof(v)) != sizeof(v))
+ fatal("Error: Can't get CPLD base address\n\r");
+
+ return (u8 *) v;
+}
+
+static void katanaqp_get_cfg(void)
+{
+ katanaqp_cfg = in_8(cpld_base + KATANAQP_CPLD_HCR) & 0xf;
+
+ if (katanaqp_cfg > 9)
+ katanaqp_cfg = KATANAQP_UNKNOWN;
+}
+
+static int katanaqp_is_monarch(void)
+{
+ return !(in_8(cpld_base + KATANAQP_CPLD_PSR) &
+ KATANAQP_CPLD_PSR_PMCM);
+}
+
+static void katanaqp_bridge_setup(void)
+{
+ u32 i, v[12], enables, acc_bits;
+ u32 pci_base_hi, pci_base_lo, size, buf[2];
+ unsigned long cpu_base;
+ int rc;
+ void *devp;
+ u8 *bridge_pbase, is_coherent;
+ struct mv64x60_cpu2pci_win *tbl;
+
+ bridge_pbase = mv64x60_get_bridge_pbase();
+ is_coherent = mv64x60_is_coherent();
+
+ if (is_coherent)
+ acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_WB
+ | MV64x60_PCI_ACC_CNTL_SWAP_NONE
+ | MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES
+ | MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES;
+ else
+ acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_NONE
+ | MV64x60_PCI_ACC_CNTL_SWAP_NONE
+ | MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES
+ | MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES;
+
+ /*
+ * MV64x60 boot code expects PCI host bridge to have 0 device
+ * number and access PCI configuration bridge registers by
+ * DEVFN(0, fn). This is not correct for bridges working in PCI-X
+ * mode since by default it has 0x1f device number stored in P2P
+ * configuration register.
+ */
+ mv64x60_set_pci_bus(bridge_base, 1, 0, 0);
+
+ mv64x60_config_ctlr_windows(bridge_base, bridge_pbase, is_coherent);
+ mv64x60_config_pci_windows(bridge_base, bridge_pbase, 1, 0, acc_bits);
+
+ /* Get the cpu -> pci i/o & mem mappings from the device tree */
+ devp = finddevice("/mv64x60/pci");
+ if (devp == NULL)
+ fatal("Error: Missing /mv64x60/pci device tree node\n\r");
+
+ rc = getprop(devp, "ranges", v, sizeof(v));
+ if (rc != sizeof(v))
+ fatal("Error: Can't find /mv64x60/pci/ranges property\n\r");
+
+ /* Get the cpu -> pci i/o & mem mappings from the device tree */
+ devp = finddevice("/mv64x60");
+ if (devp == NULL)
+ fatal("Error: Missing /mv64x60 device tree node\n\r");
+
+
+ enables = in_le32((u32 *) (bridge_base + MV64x60_CPU_BAR_ENABLE));
+ enables |= 0x0007fe00; /* Disable all cpu->pci windows */
+ out_le32((u32 *) (bridge_base + MV64x60_CPU_BAR_ENABLE), enables);
+
+ for (i = 0; i < 12; i += 6) {
+ switch (v[i] & 0xff000000) {
+ case 0x01000000: /* PCI I/O Space */
+ tbl = mv64x60_cpu2pci_io;
+ break;
+ case 0x02000000: /* PCI MEM Space */
+ tbl = mv64x60_cpu2pci_mem;
+ break;
+ default:
+ continue;
+ }
+
+ pci_base_hi = v[i + 1];
+ pci_base_lo = v[i + 2];
+ cpu_base = v[i + 3];
+ size = v[i + 5];
+
+ buf[0] = cpu_base;
+ buf[1] = size;
+
+ if (!dt_xlate_addr(devp, buf, sizeof(buf), &cpu_base))
+ fatal("Error: Can't translate PCI address 0x%x\n\r",
+ (u32) cpu_base);
+
+ mv64x60_config_cpu2pci_window(bridge_base, 1, pci_base_hi,
+ pci_base_lo, cpu_base, size, tbl);
+ }
+
+ /* Enable cpu->pci1 i/o, cpu->pci1 mem0 */
+ enables &= ~0x0000c000;
+ out_le32((u32 *) (bridge_base + MV64x60_CPU_BAR_ENABLE), enables);
+
+}
+
+/*
+ * Different Katana Qp configurations have different flash sizes varying
+ * from 16Mb to 64Mb. This routine determines an exact flash size and
+ * updates the device tree accordingly.
+ */
+static void katanaqp_flash_fixup(void)
+{
+ u32 flash0_size = 0, flash1_size = 0;
+ u32 total_size, size_left;
+ u32 part, part_offset;
+ u32 rc, v[2];
+ void *devp = NULL, *pp = NULL;
+ char part_node[MTD_PART_NODE_LEN];
+
+ devp = finddevice("/mv64x60/flash");
+ if (devp == NULL) {
+ printf("Missing flash device tree node\n\r");
+ return;
+ }
+
+ /*
+ * Get fist flash size: bank0, bank1 and total
+ */
+ flash0_size = mv64x60_get_devcs_size(bridge_base, 0);
+ if (flash0_size == 0)
+ return;
+
+ flash1_size = mv64x60_get_devcs_size(bridge_base, 1);
+ total_size = flash0_size + flash1_size;
+
+ /*
+ * Set total flash size
+ */
+ rc = getprop(devp, "reg", v, sizeof(v));
+ if (rc != sizeof(v))
+ fatal("Error: Can't find /mv64x60/flash/reg property\n\r");
+ v[1] = total_size;
+ setprop(devp, "reg", v, sizeof(v));
+
+ /*
+ * Set Primary FS partition size: up to the end of first flash bank
+ */
+ pp = find_node_by_prop_value_str(NULL, "label", "Primary FS");
+ if (pp == NULL)
+ fatal("Error: Missing flash Primary FS device tree node\n\r");
+
+ rc = getprop(pp, "reg", v, sizeof(v));
+ if (rc != sizeof(v))
+ fatal("Error: Can't find /mv64x60/flash/partition@3000000 "
+ "property\n\r");
+
+ v[1] = flash0_size - MTD_PART_MONITOR_SIZE - MTD_PART_KERNEL_SIZE;
+ setprop(pp, "reg", v, sizeof(v));
+
+ if (flash1_size == 0)
+ /* Only 1 flash bank is presented */
+ return;
+
+ /*
+ * Ok, there is a second flash bank. Let's split it to partitions.
+ */
+
+ part_offset = flash0_size;
+ size_left = flash1_size;
+
+ /* Skip Secondary Monitor if Boot Failover mechanism is disabled */
+ rc = in_8(cpld_base + KATANAQP_CPLD_JSR) & KATANAQP_CPLD_JSR_EBFM;
+ part = rc ? 0 : 1;
+
+ for (; part < MTD_PART_NUM; part++) {
+
+ sprintf(part_node, "%s@%x", MTD_PART_NODE, part_offset);
+ pp = create_node(devp, part_node);
+ if (pp == NULL)
+ fatal("Error: Can't create new partition node\n\r");
+
+ setprop_str(pp, "label", katanaqp_mtd_parts[part].name);
+
+ if (katanaqp_mtd_parts[part].ro)
+ setprop(pp, "read-only", NULL, 0);
+
+ v[0] = part_offset;
+ v[1] = katanaqp_mtd_parts[part].size;
+ if (v[1] == 0)
+ /* Take all remaining space */
+ v[1] = size_left;
+
+ part_offset += v[1];
+ size_left -= v[1];
+
+ setprop(pp, "reg", v, sizeof(v));
+
+ }
+}
+
+static void katanaqp_fixups(void)
+{
+ u32 l, p, pnum;
+ void *devp = NULL;
+ struct katanaqp_board_info katanaqp_bif;
+ char model[BOARD_MODEL_LEN];
+
+ /* Check Katana Qp configuration */
+ katanaqp_get_cfg();
+ if (katanaqp_cfg == KATANAQP_CFG_UNKNOWN)
+ fatal("Error: Unsupported Katana Qp board configuration\n\r");
+
+ if (katanaqp_cfg == KATANAQP_CFG_PT5CC_CUSTOM) {
+ printf("Katana Qp board custom configuration detected, "
+ "using device tree defaults. Please, supply a correct "
+ "device tree\n\r");
+ return;
+ }
+
+ katanaqp_bif = katanaqp_board_info[katanaqp_cfg];
+
+ /*
+ * Set /model appropriately
+ */
+ devp = finddevice("/");
+ if (devp == NULL)
+ fatal("Error: Missing '/' device tree node\n\r");
+
+ /*
+ * Fix Board model name in device tree
+ */
+ memset(model, 0, BOARD_MODEL_LEN);
+
+ strncpy(model, BOARD_MODEL, BOARD_MODEL_MAX - 1);
+ l = strlen(model);
+ model[l++] = ' ';
+
+ strncpy(&model[l], katanaqp_bif.cfg_name, BOARD_CFG_MAX - 1);
+ l += strlen(&model[l]);
+ model[l++] = '\0';
+
+ setprop(devp, "model", model, l);
+
+ /*
+ * Do necessary bridge setup if we are monarch
+ */
+ if (katanaqp_is_monarch())
+ katanaqp_bridge_setup();
+
+ /*
+ * Fix RAM size and setup MV64460 bridge
+ */
+ dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+
+ /*
+ * Fix flash size and partition layout
+ */
+ katanaqp_flash_fixup();
+
+ /*
+ * Fix clocks
+ */
+ dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
+
+ /*
+ * Fix phy addresses
+ */
+ while ((devp = find_node_by_prop_value_str(devp, "comaptible",
+ "marvell,mv88e1111"))) {
+ getprop(devp, "block-index", &p, sizeof(p));
+ pnum = katanaqp_bif.eth_phys[p];
+ setprop_val(devp, "reg", pnum);
+ }
+}
+
+static void katanaqp_reset(void)
+{
+
+ /* issue hard reset to the reset command register */
+ if (cpld_base)
+ out_8(cpld_base + KATANAQP_CPLD_RCR,
+ KATANAQP_CPLD_RCR_CPUHR);
+
+ for (;;) ;
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+
+ CUBOOT_INIT();
+
+ if (ft_init(_dtb_start, _dtb_end - _dtb_start, 16))
+ exit();
+
+ bridge_base = mv64x60_get_bridge_base();
+ cpld_base = katanaqp_get_cpld_base();
+
+ platform_ops.fixups = katanaqp_fixups;
+ platform_ops.exit = katanaqp_reset;
+
+ if (serial_console_init() < 0)
+ exit();
+}
^ permalink raw reply related
* [PATCH 2/5] PowerPC 74xx: Minor updates to MV64x60 boot code
From: Andrei Dolnikov @ 2007-11-16 16:18 UTC (permalink / raw)
To: linuxppc-dev
This patch adds new functionality to MV64x60 boot code. The changes are required
to access DevCS windows registers and set PCI bus and devfn numbers for MV644x60
PCI/PCI-X interfaces.
Signed-off-by: Andrei Dolnikov <adolnikov@ru.mvista.com>
---
arch/powerpc/boot/mv64x60.c | 74 ++++++++++++++++++++++++++++++++++++++++++++
arch/powerpc/boot/mv64x60.h | 10 +++++
2 files changed, 84 insertions(+)
diff --git a/arch/powerpc/boot/mv64x60.c b/arch/powerpc/boot/mv64x60.c
index d207a0b..787a124 100644
--- a/arch/powerpc/boot/mv64x60.c
+++ b/arch/powerpc/boot/mv64x60.c
@@ -32,6 +32,16 @@
#define MV64x60_CPU2MEM_3_BASE 0x0218
#define MV64x60_CPU2MEM_3_SIZE 0x0220
+#define MV64x60_DEV2MEM_WINDOWS 4
+#define MV64x60_DEV2MEM_0_BASE 0x0028
+#define MV64x60_DEV2MEM_0_SIZE 0x0030
+#define MV64x60_DEV2MEM_1_BASE 0x0228
+#define MV64x60_DEV2MEM_1_SIZE 0x0230
+#define MV64x60_DEV2MEM_2_BASE 0x0248
+#define MV64x60_DEV2MEM_2_SIZE 0x0250
+#define MV64x60_DEV2MEM_3_BASE 0x0038
+#define MV64x60_DEV2MEM_3_SIZE 0x0040
+
#define MV64x60_ENET2MEM_BAR_ENABLE 0x2290
#define MV64x60_ENET2MEM_0_BASE 0x2200
#define MV64x60_ENET2MEM_0_SIZE 0x2204
@@ -219,6 +229,25 @@ static struct mv64x60_mem_win mv64x60_cpu2mem[MV64x60_CPU2MEM_WINDOWS] = {
},
};
+static struct mv64x60_mem_win mv64x60_devcs[MV64x60_DEV2MEM_WINDOWS] = {
+ [0] = {
+ .lo = MV64x60_DEV2MEM_0_BASE,
+ .size = MV64x60_DEV2MEM_0_SIZE,
+ },
+ [1] = {
+ .lo = MV64x60_DEV2MEM_1_BASE,
+ .size = MV64x60_DEV2MEM_1_SIZE,
+ },
+ [2] = {
+ .lo = MV64x60_DEV2MEM_2_BASE,
+ .size = MV64x60_DEV2MEM_2_SIZE,
+ },
+ [3] = {
+ .lo = MV64x60_DEV2MEM_3_BASE,
+ .size = MV64x60_DEV2MEM_3_SIZE,
+ },
+};
+
static struct mv64x60_mem_win mv64x60_enet2mem[MV64x60_CPU2MEM_WINDOWS] = {
[0] = {
.lo = MV64x60_ENET2MEM_0_BASE,
@@ -567,6 +596,36 @@ void mv64x60_config_cpu2pci_window(u8 *bridge_base, u8 hose, u32 pci_base_hi,
out_le32((u32 *)(bridge_base + offset_tbl[hose].size), size);
}
+/* Set PCI bus number for a PCI interface and force its devnum to 0 */
+void mv64x60_set_pci_bus(u8 *bridge_base, u8 hose, u32 bus, u32 devnum)
+{
+ u8 *pci_mode_reg, *p2p_cfg_reg;
+ u32 pci_mode, p2p_cfg;
+ u32 pci_cfg_offset;
+
+ if (hose == 0) {
+ pci_mode_reg = bridge_base + MV64x60_PCI0_MODE;
+ p2p_cfg_reg = bridge_base + MV64x60_PCI0_P2P_CONF;
+ pci_cfg_offset = 0x64;
+ } else {
+ pci_mode_reg = bridge_base + MV64x60_PCI1_MODE;
+ p2p_cfg_reg = bridge_base + MV64x60_PCI1_P2P_CONF;
+ pci_cfg_offset = 0xe4;
+ }
+
+ pci_mode = in_le32((u32*)pci_mode_reg) & MV64x60_PCI_MODE_MASK;
+ p2p_cfg = in_le32((u32*)p2p_cfg_reg);
+
+ if (pci_mode == MV64x60_PCI_CONVENTIONAL_MODE) {
+ p2p_cfg &= 0xe0000000;
+ p2p_cfg |= (devnum << 24) | (bus << 16) | 0xff;
+ out_le32((u32*)p2p_cfg_reg, p2p_cfg);
+ } else
+ mv64x60_cfg_write(bridge_base, hose, (p2p_cfg >> 16) & 0xff,
+ PCI_DEVFN((p2p_cfg >> 24) & 0x1f, 0),
+ pci_cfg_offset, (devnum << 3) | (bus << 8));
+}
+
/* Read mem ctlr to get the amount of mem in system */
u32 mv64x60_get_mem_size(u8 *bridge_base)
{
@@ -586,6 +645,21 @@ u32 mv64x60_get_mem_size(u8 *bridge_base)
return mem;
}
+/* Read a size of DEV_CS window */
+u32 mv64x60_get_devcs_size(u8 *bridge_base, u32 devcs)
+{
+ u32 enables, size = 0;
+
+ enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)) & 0xf0;
+
+ if (devcs < 4 && !(enables && (0x10 << devcs))) {
+ size = in_le32((u32*)(bridge_base + mv64x60_devcs[devcs].size));
+ size = ((size & 0xffff) + 1) << 16;
+ }
+
+ return size;
+}
+
/* Get physical address of bridge's registers */
u8 *mv64x60_get_bridge_pbase(void)
{
diff --git a/arch/powerpc/boot/mv64x60.h b/arch/powerpc/boot/mv64x60.h
index d0b29a7..a633d2e 100644
--- a/arch/powerpc/boot/mv64x60.h
+++ b/arch/powerpc/boot/mv64x60.h
@@ -12,6 +12,14 @@
#define MV64x60_CPU_BAR_ENABLE 0x0278
+#define MV64x60_PCI0_MODE 0x0d00
+#define MV64x60_PCI1_MODE 0x0d80
+#define MV64x60_PCI0_P2P_CONF 0x1d14
+#define MV64x60_PCI1_P2P_CONF 0x1d94
+
+#define MV64x60_PCI_MODE_MASK 0x00000030
+#define MV64x60_PCI_CONVENTIONAL_MODE 0x00000000
+
#define MV64x60_PCI_ACC_CNTL_ENABLE (1<<0)
#define MV64x60_PCI_ACC_CNTL_REQ64 (1<<1)
#define MV64x60_PCI_ACC_CNTL_SNOOP_NONE 0x00000000
@@ -57,7 +65,9 @@ void mv64x60_config_pci_windows(u8 *bridge_base, u8 *bridge_pbase, u8 hose,
void mv64x60_config_cpu2pci_window(u8 *bridge_base, u8 hose, u32 pci_base_hi,
u32 pci_base_lo, u32 cpu_base, u32 size,
struct mv64x60_cpu2pci_win *offset_tbl);
+void mv64x60_set_pci_bus(u8 *bridge_base, u8 hose, u32 bus, u32 devnum);
u32 mv64x60_get_mem_size(u8 *bridge_base);
+u32 mv64x60_get_devcs_size(u8 *bridge_base, u32 devcs);
u8 *mv64x60_get_bridge_pbase(void);
u8 *mv64x60_get_bridge_base(void);
u8 mv64x60_is_coherent(void);
^ permalink raw reply related
* [PATCH 1/5] PowerPC 74xx: Katana Qp device tree
From: Andrei Dolnikov @ 2007-11-16 16:12 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20071116154344.GA25062@ru.mvista.com>
Device tree source file for the Emerson Katana Qp board
Signed-off-by: Andrei Dolnikov <adolnikov@ru.mvisa.com>
---
arch/powerpc/boot/dts/katanaqp.dts | 357 +++++++++++++++++++++++++++++++++++++
1 files changed, 357 insertions(+)
diff --git a/arch/powerpc/boot/dts/katanaqp.dts b/arch/powerpc/boot/dts/katanaqp.dts
new file mode 100644
index 0000000..9273c4e
--- /dev/null
+++ b/arch/powerpc/boot/dts/katanaqp.dts
@@ -0,0 +1,357 @@
+/* Device Tree Source for Emerson Katana Qp
+ *
+ * Authors: Vladislav Buzov <vbuzov@ru.mvista.com>
+ * Andrei Dolnikov <adolnikov@ru.mvista.com>
+ *
+ * Based on prpmc8200.dts by Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2007 (c) MontaVista, Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ */
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "Katana-Qp"; /* Default */
+ compatible = "emerson,Katana-Qp";
+ coherency-off;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,7448@0 {
+ device_type = "cpu";
+ reg = <0>;
+ clock-frequency = <0>; /* From U-boot */
+ bus-frequency = <0>; /* From U-boot */
+ timebase-frequency = <0>; /* From U-boot */
+ i-cache-line-size = <20>;
+ d-cache-line-size = <20>;
+ i-cache-size = <8000>;
+ d-cache-size = <8000>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <00000000 20000000>; /* Default (512MB) */
+ };
+
+ mv64x60@f8100000 { /* Marvell Discovery */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ model = "mv64460"; /* Default */
+ compatible = "marvell,mv64x60";
+ clock-frequency = <7f28155>; /* 133.333333 MHz */
+ reg = <f8100000 00010000>;
+ virtual-reg = <f8100000>;
+ ranges = <c1000000 c1000000 01000000 /* PCI 1 I/O Space */
+ 90000000 90000000 30000000 /* PCI 1 MEM Space */
+ e8000000 e8000000 04000000 /* User FLASH: Up to 64Mb */
+ 00000000 f8100000 00010000 /* Bridge's regs */
+ f8500000 f8500000 00040000>; /* Integrated SRAM */
+
+ flash@e8000000 {
+ compatible = "cfi-flash";
+ reg = <e8000000 1000000>; /* Default (16MB) */
+ probe-type = "CFI";
+ bank-width = <4>;
+
+ partition@0 {
+ label = "Primary Monitor";
+ reg = <0 100000>; /* 1Mb */
+ read-only;
+ };
+
+ partition@100000 {
+ label = "Primary Kernel";
+ reg = <100000 200000>; /* 2 Mb */
+ };
+
+ partition@300000 {
+ label = "Primary FS";
+ reg = <300000 d00000>; /* 13 Mb */
+ };
+
+ };
+
+ cpld@f8200000 {
+ compatible = "altera,maxii";
+ reg = <f8200000 40000>;
+ virtual-reg = <f8200000>;
+ };
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "marvell,mv64x60-mdio";
+ ethernet-phy@0 {
+ block-index = <0>;
+ compatible = "marvell,mv88e1111";
+ reg = <a>;
+ };
+ ethernet-phy@1 {
+ compatible = "marvell,mv88e1111";
+ block-index = <1>;
+ reg = <d>;
+ };
+ ethernet-phy@2 {
+ compatible = "marvell,mv88e1111";
+ block-index = <2>;
+ reg = <6>;
+ };
+ };
+
+ ethernet@2000 {
+ reg = <2000 2000>;
+ eth0 {
+ device_type = "network";
+ compatible = "marvell,mv64x60-eth";
+ block-index = <0>;
+ interrupts = <20>;
+ interrupt-parent = <&/mv64x60/pic>;
+ phy = <&/mv64x60/mdio/ethernet-phy@0>;
+ speed = <3e8>;
+ duplex = <1>;
+ tx_queue_size = <320>;
+ rx_queue_size = <190>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+ eth1 {
+ device_type = "network";
+ compatible = "marvell,mv64x60-eth";
+ block-index = <1>;
+ interrupts = <21>;
+ interrupt-parent = <&/mv64x60/pic>;
+ phy = <&/mv64x60/mdio/ethernet-phy@1>;
+ speed = <3e8>;
+ duplex = <1>;
+ tx_queue_size = <320>;
+ rx_queue_size = <190>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+ eth2 {
+ device_type = "network";
+ compatible = "marvell,mv64x60-eth";
+ block-index = <2>;
+ interrupts = <22>;
+ interrupt-parent = <&/mv64x60/pic>;
+ phy = <&/mv64x60/mdio/ethernet-phy@2>;
+ speed = <3e8>;
+ duplex = <1>;
+ tx_queue_size = <320>;
+ rx_queue_size = <190>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ };
+ };
+
+ sdma@4000 {
+ compatible = "marvell,mv64x60-sdma";
+ reg = <4000 c18>;
+ virtual-reg = <f8104000>;
+ interrupt-base = <0>;
+ interrupts = <24>;
+ interrupt-parent = <&/mv64x60/pic>;
+ };
+
+ sdma@6000 {
+ compatible = "marvell,mv64x60-sdma";
+ reg = <6000 c18>;
+ virtual-reg = <f8106000>;
+ interrupt-base = <0>;
+ interrupts = <26>;
+ interrupt-parent = <&/mv64x60/pic>;
+ };
+
+ brg@b200 {
+ compatible = "marvell,mv64x60-brg";
+ reg = <b200 8>;
+ clock-src = <8>;
+ clock-frequency = <7ed6b40>;
+ current-speed = <2580>;
+ bcr = <0>;
+ };
+
+ brg@b208 {
+ compatible = "marvell,mv64x60-brg";
+ reg = <b208 8>;
+ clock-src = <8>;
+ clock-frequency = <7ed6b40>;
+ current-speed = <2580>;
+ bcr = <0>;
+ };
+
+ cunit@f200 {
+ reg = <f200 200>;
+ };
+
+ mpscrouting@b400 {
+ reg = <b400 c>;
+ };
+
+ mpscintr@b800 {
+ reg = <b800 100>;
+ virtual-reg = <f810b800>;
+ };
+
+ mpsc@8000 {
+ device_type = "serial";
+ compatible = "marvell,mpsc";
+ reg = <8000 38>;
+ virtual-reg = <f8108000>;
+ sdma = <&/mv64x60/sdma@4000>;
+ brg = <&/mv64x60/brg@b200>;
+ cunit = <&/mv64x60/cunit@f200>;
+ mpscrouting = <&/mv64x60/mpscrouting@b400>;
+ mpscintr = <&/mv64x60/mpscintr@b800>;
+ block-index = <0>;
+ max_idle = <28>;
+ chr_1 = <0>;
+ chr_2 = <0>;
+ chr_10 = <3>;
+ mpcr = <0>;
+ interrupts = <28>;
+ interrupt-parent = <&/mv64x60/pic>;
+ };
+
+ mpsc@9000 {
+ device_type = "serial";
+ compatible = "marvell,mpsc";
+ reg = <9000 38>;
+ virtual-reg = <f8109000>;
+ sdma = <&/mv64x60/sdma@6000>;
+ brg = <&/mv64x60/brg@b208>;
+ cunit = <&/mv64x60/cunit@f200>;
+ mpscrouting = <&/mv64x60/mpscrouting@b400>;
+ mpscintr = <&/mv64x60/mpscintr@b800>;
+ block-index = <1>;
+ max_idle = <28>;
+ chr_1 = <0>;
+ chr_2 = <0>;
+ chr_10 = <3>;
+ mpcr = <0>;
+ interrupts = <29>;
+ interrupt-parent = <&/mv64x60/pic>;
+ };
+
+ wdt@b410 { /* watchdog timer */
+ compatible = "marvell,mv64x60-wdt";
+ reg = <b410 8>;
+ timeout = <a>; /* wdt timeout in seconds */
+ };
+
+ i2c@c000 {
+ compatible = "marvell,mv64x60-i2c";
+ reg = <c000 20>;
+ virtual-reg = <f810c000>;
+ freq_m = <8>;
+ freq_n = <3>;
+ timeout = <3e8>; /* 1000 = 1 second */
+ retries = <1>;
+ interrupts = <25>;
+ interrupt-parent = <&/mv64x60/pic>;
+ };
+
+ pic {
+ #interrupt-cells = <1>;
+ #address-cells = <0>;
+ compatible = "marvell,mv64x60-pic";
+ reg = <0000 88>;
+ interrupt-controller;
+ };
+
+ mpp@f000 {
+ compatible = "marvell,mv64x60-mpp";
+ reg = <f000 10>;
+ };
+
+ gpp@f100 {
+ compatible = "marvell,mv64x60-gpp";
+ reg = <f100 20>;
+ };
+
+ pci@90000000 {
+ #address-cells = <3>;
+ #size-cells = <2>;
+ #interrupt-cells = <1>;
+ device_type = "pci";
+ compatible = "marvell,mv64x60-pci";
+ reg = <0c78 8>;
+ ranges = <01000000 0 0 c1000000 0 01000000
+ 02000000 0 90000000 90000000 0 30000000>;
+ bus-range = <0 ff>;
+ clock-frequency = <3EF1480>;
+ interrupt-pci-iack = <0c34>;
+ interrupt-parent = <&/mv64x60/pic>;
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x1 */
+ 0800 0 0 1 &/mv64x60/pic 5a
+ 0800 0 0 2 &/mv64x60/pic 5b
+ 0800 0 0 3 &/mv64x60/pic 5e
+ 0800 0 0 4 &/mv64x60/pic 5f
+
+ /* IDSEL 0x2 */
+ 1000 0 0 1 &/mv64x60/pic 5b
+ 1000 0 0 2 &/mv64x60/pic 5e
+ 1000 0 0 3 &/mv64x60/pic 5f
+ 1000 0 0 4 &/mv64x60/pic 5a
+
+ /* IDSEL 0x3 */
+ 1800 0 0 1 &/mv64x60/pic 5e
+ 1800 0 0 2 &/mv64x60/pic 5f
+ 1800 0 0 3 &/mv64x60/pic 5a
+ 1800 0 0 4 &/mv64x60/pic 5b
+
+ /* IDSEL 0x4 */
+ 2000 0 0 1 &/mv64x60/pic 5f
+ 2000 0 0 2 &/mv64x60/pic 5a
+ 2000 0 0 3 &/mv64x60/pic 5b
+ 2000 0 0 4 &/mv64x60/pic 5e
+
+ /* IDSEL 0x6 */
+ 3000 0 0 1 &/mv64x60/pic 5b
+ 3000 0 0 2 &/mv64x60/pic 5e
+ 3000 0 0 3 &/mv64x60/pic 5f
+ 3000 0 0 4 &/mv64x60/pic 5a
+ >;
+ };
+
+ cpu-error@0070 {
+ compatible = "marvell,mv64x60-cpu-error";
+ reg = <0070 10 0128 28>;
+ interrupts = <03>;
+ interrupt-parent = <&/mv64x60/pic>;
+ };
+
+ sram-ctrl@0380 {
+ compatible = "marvell,mv64x60-sram-ctrl";
+ reg = <0380 80>;
+ interrupts = <0d>;
+ interrupt-parent = <&/mv64x60/pic>;
+ };
+
+ pci-error@1d40 {
+ compatible = "marvell,mv64x60-pci-error";
+ reg = <1d40 40 0c28 4>;
+ interrupts = <0c>;
+ interrupt-parent = <&/mv64x60/pic>;
+ };
+
+ mem-ctrl@1400 {
+ compatible = "marvell,mv64x60-mem-ctrl";
+ reg = <1400 60>;
+ interrupts = <11>;
+ interrupt-parent = <&/mv64x60/pic>;
+ };
+ };
+
+ chosen {
+ bootargs = "ip=on";
+ linux,stdout-path = "/mv64x60@f8100000/mpsc@8000";
+ };
+};
^ permalink raw reply related
* Re: [PATCH] powerpc: Add xmon function to dump 44x TLB
From: Segher Boessenkool @ 2007-11-16 16:09 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: linuxppc-dev
In-Reply-To: <4ccc68f867a65d70f5d1e3ee946de4d1@kernel.crashing.org>
>> +#ifdef CONFIG_44x
>> +static void dump_tlb_44x(void);
>> +#endif
>
> No need to #ifdef this...
>
>> +#ifdef CONFIG_44x
>> +static void dump_tlb_44x(void)
>> +{
>
> ...or this.
Erm actually, that last one would give you a compiler warning ("function
defined but not used"), unless you convert the point where it is used to
a plain "if" too -- probably not worth it until we have 32-bit
multiplatform
support :-)
Segher
^ permalink raw reply
* [PATCH 0/1] PowerPC 74xx: Add Emerson Katana Qp support
From: Andrei Dolnikov @ 2007-11-16 15:43 UTC (permalink / raw)
To: linuxppc-dev
Hello folks,
The following patch sequence is intended to add support for the Emerson
Katana Qp ATCA board based on MPC7448 CPU and Marvell 64460 chipset.
The patches are incremental to minor mv64x60 code fixups sent by
Mark A. Greer on 11/08/07.
Thanks,
Andrei.
^ permalink raw reply
* Re: [PATCH] powerpc: Add xmon function to dump 44x TLB
From: Segher Boessenkool @ 2007-11-16 15:54 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <20071116072415.95082DDDF2@ozlabs.org>
> +#ifdef CONFIG_44x
> +static void dump_tlb_44x(void);
> +#endif
No need to #ifdef this...
> +#ifdef CONFIG_44x
> +static void dump_tlb_44x(void)
> +{
...or this.
Segher
^ permalink raw reply
* Re: 85xx software reset problems from paulus.git
From: Clemens Koller @ 2007-11-16 15:27 UTC (permalink / raw)
To: robert lazarski; +Cc: linuxppc-embedded
In-Reply-To: <f87675ee0711160700m17122edcv51b55f4a0cbe38b1@mail.gmail.com>
Hello, Robert!
robert lazarski schrieb:
> Hi all, on my custom 85xx board I can't do a soft reset. I'm using
> u-boot 1.3rc3 that has the latest cpu/mpc85xx/cpu.c patch to fix some
> type of reset problem. When I press the software reset button on my
> board after my nfs kernel panic, I get this:
Please define "software reset button" in your case. :-)
I consider a "button" clearly as hardware.
In my case (my button) asserts the HRESET# CPU pin low.
As far as I understood the details (not verified again):
To trigger a hard reset via software, the CPU (8540 at least)
should assert the HRESET_REQ# (Pin AG20) low (which needs
to be triggered in software, somehow).
Some external glue logic should then issue the HRESET#
(pin AH16) low to reset the CPU (hard, Power On Reset).
The SRESET# (pin AF20) is the soft reset input, causes
an mcp assertion to the core.... (RTFM)
So, the detailed explanation seems to be implementation
specific (if HRESET_REQ# can get triggered and if HRESET_REQ#
assertion is glued to assert HRESET# from the HW guys).
> Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(2,0)
> Rebooting in 10 seconds..Machine check in kernel mode.
> Caused by (from MCSR=80000000): Machine Check Signal
> Oops: Machine check, sig: 7 [#1]
> MPC85xx CDS
> NIP: c00131f8 LR: c0014060 CTR: c00230dc
> REGS: c0289f50 TRAP: 0202 Not tainted (2.6.24-rc2-ge6a5c27f-dirty)
> MSR: 00021000 <ME> CR: 24000028 XER: 20000000
> TASK = c1020000[1] 'swapper' THREAD: c1022000
> GPR00: 00000002 c1023e30 c1020000 00000000 00000686 00000047 c1023e38 00000000
> GPR08: 7e58da6f f10000b0 003d0900 c0281ec8 44000088 7fffa7e3 3ffefb00 00800000
> GPR16: ffffffff 00000000 007fff00 c0220000 c0260000 c0260000 00000000 3ffeb254
> GPR24: c0260000 00000000 c0280000 c0219f84 c0290000 00002710 c0260000 00000000
> NIP [c00131f8] fsl_rstcr_restart+0x20/0x24
> LR [c0014060] mpc85xx_cds_restart+0x78/0x8c
> Call Trace:
> [c1023e30] [c0014008] mpc85xx_cds_restart+0x20/0x8c (unreliable)
> [c1023e50] [c000c894] machine_restart+0x34/0x48
> [c1023e60] [c0031f9c] emergency_restart+0x14/0x24
> [c1023e70] [c00234e8] panic+0x134/0x174
> [c1023f00] [c0242d5c] mount_block_root+0x108/0x24c
> [c1023f50] [c02431c0] prepare_namespace+0xd0/0x210
> [c1023f70] [c0242938] kernel_init+0x170/0x290
> [c1023ff0] [c000d2dc] kernel_thread+0x44/0x60
> Instruction dump:
> 80010014 38210010 7c0803a6 4e800020 7c000146 3d20c029 8129821c 2f890000
> 419e0010 38000002 7c0004ac 90090000 <48000000> 81230044 8009003c 70090008
> Kernel panic - not syncing: Attempted to kill init!
> Rebooting in 10 seconds..
>
> I believe Clemens recently confirmed the same issue. Any ideas?
> Robert
Not really. I just can confirm that the a $shutdown -r now doesn't
reboot my board anymore whereas 2.6.21-rc4 did.
IIRC, I've seen a patch which changed some instructions in some reboot()
function some time ago.
(Please note, I'm using the mpc8540_ads which might be slightly different
from the *_cds.)
Regards,
Clemens Koller
__________________________________
R&D Imaging Devices
Anagramm GmbH
Rupert-Mayer-Straße 45/1
Linhof Werksgelände
D-81379 München
Tel.089-741518-50
Fax 089-741518-19
http://www.anagramm-technology.com
^ permalink raw reply
* 85xx software reset problems from paulus.git
From: robert lazarski @ 2007-11-16 15:00 UTC (permalink / raw)
To: linuxppc-embedded
Hi all, on my custom 85xx board I can't do a soft reset. I'm using
u-boot 1.3rc3 that has the latest cpu/mpc85xx/cpu.c patch to fix some
type of reset problem. When I press the software reset button on my
board after my nfs kernel panic, I get this:
Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(2,0)
Rebooting in 10 seconds..Machine check in kernel mode.
Caused by (from MCSR=80000000): Machine Check Signal
Oops: Machine check, sig: 7 [#1]
MPC85xx CDS
NIP: c00131f8 LR: c0014060 CTR: c00230dc
REGS: c0289f50 TRAP: 0202 Not tainted (2.6.24-rc2-ge6a5c27f-dirty)
MSR: 00021000 <ME> CR: 24000028 XER: 20000000
TASK = c1020000[1] 'swapper' THREAD: c1022000
GPR00: 00000002 c1023e30 c1020000 00000000 00000686 00000047 c1023e38 00000000
GPR08: 7e58da6f f10000b0 003d0900 c0281ec8 44000088 7fffa7e3 3ffefb00 00800000
GPR16: ffffffff 00000000 007fff00 c0220000 c0260000 c0260000 00000000 3ffeb254
GPR24: c0260000 00000000 c0280000 c0219f84 c0290000 00002710 c0260000 00000000
NIP [c00131f8] fsl_rstcr_restart+0x20/0x24
LR [c0014060] mpc85xx_cds_restart+0x78/0x8c
Call Trace:
[c1023e30] [c0014008] mpc85xx_cds_restart+0x20/0x8c (unreliable)
[c1023e50] [c000c894] machine_restart+0x34/0x48
[c1023e60] [c0031f9c] emergency_restart+0x14/0x24
[c1023e70] [c00234e8] panic+0x134/0x174
[c1023f00] [c0242d5c] mount_block_root+0x108/0x24c
[c1023f50] [c02431c0] prepare_namespace+0xd0/0x210
[c1023f70] [c0242938] kernel_init+0x170/0x290
[c1023ff0] [c000d2dc] kernel_thread+0x44/0x60
Instruction dump:
80010014 38210010 7c0803a6 4e800020 7c000146 3d20c029 8129821c 2f890000
419e0010 38000002 7c0004ac 90090000 <48000000> 81230044 8009003c 70090008
Kernel panic - not syncing: Attempted to kill init!
Rebooting in 10 seconds..
I believe Clemens recently confirmed the same issue. Any ideas?
Robert
^ permalink raw reply
* Re: [PATCH] powerpc: Fix 44x Machine Check handling
From: Josh Boyer @ 2007-11-16 14:58 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev
In-Reply-To: <20071116074025.GA4741@lixom.net>
On Fri, 16 Nov 2007 01:40:25 -0600
Olof Johansson <olof@lixom.net> wrote:
> On Fri, Nov 16, 2007 at 06:21:06PM +1100, Benjamin Herrenschmidt wrote:
> > This removes the old CONFIG_440A which was a pain for multiplatform
> > kernel and wasn't set properly by default and replaces it with a
> > CPU feature. This makes Machine Check reporting work correctly on
> > my Ebony (440GP) board.
>
> I'm not sure I like this. It introduces another cpu feature flag,
> that we'll soon run out of if it's used to signify version info per
> implementation like this.
>
> 1) The SET_IVOR could be done from the cpu_setups for 440A instead
> (i.e. introduce one).
Yeah, that might work. I'm wondering if either method needs to take
arch/ppc into account, as the cputable is shared.
> 2) Please just move the machine check handlers out to individual ones
> instead of using the generic one. That way you don't need runtime checks
> between the two (they don't seem to share much of it as-is anyway).
Anton pinged me about cleaning that up a couple months ago. I have a
half-baked patch for it somewhere, but I agree having 4xx set a ppc_md
specific handler would be a good idea.
josh
^ permalink raw reply
* [BUG] 2.6.24-rc2-mm1 - kernel bug on nfs v4
From: Kamalesh Babulal @ 2007-11-16 14:15 UTC (permalink / raw)
To: Andrew Morton, LKML, linuxppc-dev, nfs, Andy Whitcroft,
Balbir Singh
Hi Andrew,
The kernel enters the xmon state while running the file system
stress on nfs v4 mounted partition.
0:mon> e
cpu 0x0: Vector: 300 (Data Access) at [c0000000dbd4f820]
pc: c000000000065be4: .__wake_up_common+0x44/0xe8
lr: c000000000069768: .__wake_up+0x54/0x88
sp: c0000000dbd4faa0
msr: 8000000000001032
dar: 0
dsisr: 40010000
current = 0xc0000000dfb6f680
paca = 0xc000000000574580
pid = 1865, comm = rpciod/0
0:mon> t
[c0000000dbd4fb50] c000000000069768 .__wake_up+0x54/0x88
[c0000000dbd4fc00] d00000000086b890 .nfs_sb_deactive+0x44/0x58 [nfs]
[c0000000dbd4fc80] d000000000872658 .nfs_free_unlinkdata+0x2c/0x74 [nfs]
[c0000000dbd4fd10] d000000000598510 .rpc_release_calldata+0x50/0x74 [sunrpc]
[c0000000dbd4fda0] c00000000008d960 .run_workqueue+0x10c/0x1f4
[c0000000dbd4fe50] c00000000008ec70 .worker_thread+0x118/0x138
[c0000000dbd4ff00] c0000000000939f4 .kthread+0x78/0xc4
[c0000000dbd4ff90] c00000000002b060 .kernel_thread+0x4c/0x68
0:mon> r
R00 = c000000000069768 R16 = 4000000001c00000
R01 = c0000000dbd4faa0 R17 = c0000000004410c0
R02 = c0000000006752d8 R18 = 0000000000000000
R03 = c0000000ace4ffc0 R19 = 000000000019c000
R04 = 0000000000000003 R20 = c00000000050af08
R05 = 0000000000000001 R21 = 000000000210af08
R06 = 0000000000000000 R22 = 000000000210b178
R07 = 0000000000000000 R23 = c00000000050b178
R08 = 0000000000000000 R24 = 0000000000000003
R09 = 0000000000000000 R25 = 0000000000000000
R10 = 0000000000000001 R26 = 0000000000000000
R11 = ffffffffffffffe8 R27 = c0000000ace4ffc0
R12 = 0000000000004000 R28 = 0000000000000001
R13 = c000000000574580 R29 = 0000000000000003
R14 = 0000000000000000 R30 = c00000000061bad8
R15 = c000000000442888 R31 = d0000000008baa50
pc = c000000000065be4 .__wake_up_common+0x44/0xe8
lr = c000000000069768 .__wake_up+0x54/0x88
msr = 8000000000001032 cr = 24000022
ctr = 80000000001af404 xer = 0000000000000002 trap = 300
dar = 0000000000000000 dsisr = 40010000
0:mon>
--
Thanks & Regards,
Kamalesh Babulal,
Linux Technology Center,
IBM, ISTL.
^ permalink raw reply
* Re: [PATCH] remove dead MAC_ADBKEYCODES
From: Dmitry Torokhov @ 2007-11-16 13:25 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Stanislav Brabec, linux-input, Linux/m68k, Linux/PPC Development
In-Reply-To: <Pine.LNX.4.62.0711161043560.29012@pademelon.sonytel.be>
On Nov 16, 2007 4:44 AM, Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Wrong mailing list ;-)
>
> On Thu, 15 Nov 2007, Stanislav Brabec wrote:
> > It seems, that current kernel source code contains no traces of
> > MAC_ADBKEYCODES and no reference to keyboard_sends_linux_keycodes any
> > more.
> >
> > Attached patch removes them from configuration files.
> >
> > Signed-off-by: Stanislav Brabec <sbrabec@suse.cz>
>
> Acked-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
>
Geert, are you going to push it through your tree?
--
Dmitry
^ permalink raw reply
* Re: Virtex TEMAC ping -s 10000 host, is it working?
From: Lorenz Kolb @ 2007-11-16 10:30 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <13770288.post@talk.nabble.com>
alex_snippet wrote:
>
> Hi All!
>
> On Virtex 4FX board with TEMAC core, Linux ping working fine, but if s -
> parameter set to big values it freezes for ever...
>
> Colleagues please share your experience with ping -s 10000 host.
>
> Do you know what parameters in core or in Linux kernel must be changed to
> improve it.
>
> My customer is too hypercritical, he likes to ping :(
>
> I tried to increase LX/TX buffers in core, it increased dead line but
> there is no desirable result.
>
>
>
Hey, I can understand that customer, I like pinging as well.
And it works for me. Our design is based on ML403.
We use PLB_TEMAC (with minimum Fifos (4kB each)) and HardTEMAC
> .
> .
> .
> 10008 bytes from 192.168.0.206: icmp_seq=733 ttl=64 time=2.42 ms
> 10008 bytes from 192.168.0.206: icmp_seq=734 ttl=64 time=2.50 ms
> 10008 bytes from 192.168.0.206: icmp_seq=735 ttl=64 time=2.43 ms
> 10008 bytes from 192.168.0.206: icmp_seq=736 ttl=64 time=2.43 ms
> 10008 bytes from 192.168.0.206: icmp_seq=737 ttl=64 time=2.44 ms
> 10008 bytes from 192.168.0.206: icmp_seq=738 ttl=64 time=2.42 ms
> 10008 bytes from 192.168.0.206: icmp_seq=739 ttl=64 time=2.51 ms
> 10008 bytes from 192.168.0.206: icmp_seq=740 ttl=64 time=2.42 ms
> 10008 bytes from 192.168.0.206: icmp_seq=741 ttl=64 time=2.50 ms
> 10008 bytes from 192.168.0.206: icmp_seq=742 ttl=64 time=2.43 ms
> .
> .
> .
>
And so on...
> --- 192.168.0.206 ping statistics ---
> 850 packets transmitted, 850 received, 0% packet loss, time 849010ms
> rtt min/avg/max/mdev = 2.399/11.623/1001.859/92.782 ms, pipe 3
>
--
View this message in context: http://www.nabble.com/Virtex-TEMAC-ping--s-10000-host%2C-is-it-working--tf4812989.html#a13790720
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* Re: [PATCH] remove dead MAC_ADBKEYCODES
From: Geert Uytterhoeven @ 2007-11-16 9:44 UTC (permalink / raw)
To: Stanislav Brabec
Cc: linux-input, Linux/PPC Development, Linux/m68k, Dmitry Torokhov
In-Reply-To: <1195142010.14001.21.camel@hammer.suse.cz>
Wrong mailing list ;-)
On Thu, 15 Nov 2007, Stanislav Brabec wrote:
> It seems, that current kernel source code contains no traces of
> MAC_ADBKEYCODES and no reference to keyboard_sends_linux_keycodes any
> more.
>
> Attached patch removes them from configuration files.
>
> Signed-off-by: Stanislav Brabec <sbrabec@suse.cz>
Acked-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
> --- a/arch/m68k/Kconfig
> +++ b/arch/m68k/Kconfig
> @@ -582,20 +582,6 @@ config MAC_HID
> depends on INPUT_ADBHID
> default y
>
> -config MAC_ADBKEYCODES
> - bool "Support for ADB raw keycodes"
> - depends on INPUT_ADBHID
> - help
> - This provides support for sending raw ADB keycodes to console
> - devices. This is the default up to 2.4.0, but in future this may be
> - phased out in favor of generic Linux keycodes. If you say Y here,
> - you can dynamically switch via the
> - /proc/sys/dev/mac_hid/keyboard_sends_linux_keycodes
> - sysctl and with the "keyboard_sends_linux_keycodes=" kernel
> - argument.
> -
> - If unsure, say Y here.
> -
> config ADB_KEYBOARD
> bool "Support for ADB keyboard (old driver)"
> depends on MAC && !INPUT_ADBHID
> --- a/arch/m68k/configs/mac_defconfig
> +++ b/arch/m68k/configs/mac_defconfig
> @@ -678,7 +678,6 @@ CONFIG_LOGO_MAC_CLUT224=y
> #
> CONFIG_MAC_SCC=y
> CONFIG_MAC_HID=y
> -CONFIG_MAC_ADBKEYCODES=y
> CONFIG_SERIAL_CONSOLE=y
>
> #
>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* Re: hangs after "Freeing unused kernel memory"
From: Gerhard Pircher @ 2007-11-16 8:58 UTC (permalink / raw)
To: Siva Prasad; +Cc: linuxppc-dev, linuxppc-embedded
In-Reply-To: <D83235F0F3C86D4D889D8B9A0DA8C6D7F73FC8@corpexc01.corp.networkrobots.com>
-------- Original-Nachricht --------
> Datum: Thu, 15 Nov 2007 16:00:09 -0800
> Von: "Siva Prasad" <sprasad@bivio.net>
> An: linuxppc-embedded@ozlabs.org, linuxppc-dev@ozlabs.org
> Betreff: hangs after "Freeing unused kernel memory"
> Hi,
>
> This sounds like a familiar problem, but could not get answers in posts
> that came up in google search.
Yes, this is a familiar problem, at least for me. :-)
> My system hangs after printing the message "Freeing unused kernel
> memory". It should execute init after that, but not sure what exactly is
> happening. Appreciate if some one can throw few ideas to try out.
>
> Seems it is actually hanging when it makes the call "
> run_init_process(ramdisk_execute_command)" in init/main.c
On my machine it hangs after returning from kernel_execve()/do_execve(),
which is called by run_init_process("/sbin/init"). So the problem can be
almost anywhere. The problem appeared first on kernel 2.6.17. 2.6.16
worked fine on my machine.
I'm going to try out git-bisect on these two kernel revisions, now that I
figured out what people mean when they talk about bisecting. :-) I just
have to figure out how to merge my patches with every branch that is
checked out by git-bisect.
Gerhard
--
Der GMX SmartSurfer hilft bis zu 70% Ihrer Onlinekosten zu sparen!
Ideal für Modem und ISDN: http://www.gmx.net/de/go/smartsurfer
^ permalink raw reply
* Re: [PATCH] [POWERPC] Fix link errors for allyesconfig
From: David Miller @ 2007-11-16 8:57 UTC (permalink / raw)
To: sfr; +Cc: linuxppc-dev, paulus
In-Reply-To: <20071115.222313.226097963.davem@davemloft.net>
From: David Miller <davem@davemloft.net>
Date: Thu, 15 Nov 2007 22:23:13 -0800 (PST)
> There has to be a nicer way to do this. In fact I think I
> just figured out one such technique.
>
> The whole reason we need these .fixup sections is to encode
> a move of -EFAULT into some register, and a control transfer.
>
> Every kernel text address, even for modules, is in the low 32-bits on
> sparc64. So we can encode this more simply, perhaps even with one
> 32-bit word for each entry.
>
> I can probably encode it all in the __ex_table entries in fact,
> and I'll give that a shot.
Ok, here's what I came up with:
/*
* The exception table consists 3 32-bit words, the encoding takes
* advantage of the fact that all kernel text addresses on sparc64 are
* in the low 4GB of the 64-bit address space so any location can be
* encoded in 32-bits.
*
* The first word is the address of an instruction that is allowed to
* fault. This is the search key used by search_exception_tables().
*
* The second word is a continuation address in the kernel text.
*
* The third word is an instruction to execute before transferring
* control to the location specified by the second word. Most of
* these instructions are of the form:
*
* mov -EFAULT, %reg
*
* Effectively the trap return TPC is set to the address of the third
* word, and the trap return TNPC is set to the value contained in the
* second word.
*/
struct exception_table_entry {
unsigned int insn, fixup_addr, fixup_insn;
};
And then __put_user_asm() now looks like:
#define __put_user_asm(x,size,addr,ret) \
__asm__ __volatile__( \
"/* Put user asm, inline. */\n" \
"1:\t" "st"#size "a %1, [%2] %%asi\n\t" \
"clr %0\n" \
"2:\n\n\t" \
".section __ex_table\n\t" \
".word 1b, 2b; mov %3, %0\n\t" \
".previous\n\n\t" \
: "=r" (ret) : "r" (x), "r" (__m(addr)), \
"i" (-EFAULT))
The .fixup section is completely eliminated, and the exception
dispatch goes:
regs->tpc = (unsigned long) &entry->fixup_insn;
regs->tnpc = entry->fixup_addr;
I have a full patch implementing this and it passes a
allyesconfig build and link.
^ permalink raw reply
* Re: [PATCH] powerpc: Fix 44x Machine Check handling
From: Benjamin Herrenschmidt @ 2007-11-16 7:41 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev
In-Reply-To: <20071116074025.GA4741@lixom.net>
On Fri, 2007-11-16 at 01:40 -0600, Olof Johansson wrote:
> I'm not sure I like this. It introduces another cpu feature flag,
> that we'll soon run out of if it's used to signify version info per
> implementation like this.
>
> 1) The SET_IVOR could be done from the cpu_setups for 440A instead
> (i.e. introduce one).
>
> 2) Please just move the machine check handlers out to individual ones
> instead of using the generic one. That way you don't need runtime checks
> between the two (they don't seem to share much of it as-is anyway).
>
> With the above two changes, you shouldn't need the feature bit any more.
We can easily make the cpu features bigger ... But ok, I'll have a look
at doing it the way you suggest.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] powerpc: Fix 44x Machine Check handling
From: Benjamin Herrenschmidt @ 2007-11-16 7:45 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev
In-Reply-To: <1195198868.28865.142.camel@pasglop>
On Fri, 2007-11-16 at 18:41 +1100, Benjamin Herrenschmidt wrote:
> On Fri, 2007-11-16 at 01:40 -0600, Olof Johansson wrote:
> > I'm not sure I like this. It introduces another cpu feature flag,
> > that we'll soon run out of if it's used to signify version info per
> > implementation like this.
> >
> > 1) The SET_IVOR could be done from the cpu_setups for 440A instead
> > (i.e. introduce one).
> >
> > 2) Please just move the machine check handlers out to individual ones
> > instead of using the generic one. That way you don't need runtime checks
> > between the two (they don't seem to share much of it as-is anyway).
> >
> > With the above two changes, you shouldn't need the feature bit any more.
>
> We can easily make the cpu features bigger ... But ok, I'll have a look
> at doing it the way you suggest.
Note that first, I'd like to figure out if there are other relevant
differences with 440A ... arch/ppc didn't list any and diff'ing PDFs is
not fun but if people around here know, please speak up
Ben.
^ permalink raw reply
* [PATCH] powerpc: Fix declaration of pcibios_free_controller
From: Benjamin Herrenschmidt @ 2007-11-16 7:42 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
pcibios_free_controller() is now available for both 32 and 64 bits
but the header only declares it for 64 bits. This moves the
declaration down next to the pcibios_alloc_controller() one.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
include/asm-powerpc/pci-bridge.h | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
Index: linux-work/include/asm-powerpc/pci-bridge.h
===================================================================
--- linux-work.orig/include/asm-powerpc/pci-bridge.h 2007-11-16 13:44:32.000000000 +1100
+++ linux-work/include/asm-powerpc/pci-bridge.h 2007-11-16 13:46:40.000000000 +1100
@@ -247,7 +247,6 @@ static inline struct pci_controller *pci
return PCI_DN(busdn)->phb;
}
-extern void pcibios_free_controller(struct pci_controller *phb);
extern void isa_bridge_find_early(struct pci_controller *hose);
@@ -283,9 +282,11 @@ extern void
pci_process_bridge_OF_ranges(struct pci_controller *hose,
struct device_node *dev, int primary);
-/* Allocate a new PCI host bridge structure */
+/* Allocate & free a PCI host bridge structure */
extern struct pci_controller *
pcibios_alloc_controller(struct device_node *dev);
+extern void pcibios_free_controller(struct pci_controller *phb);
+
#ifdef CONFIG_PCI
extern unsigned long pci_address_to_pio(phys_addr_t address);
extern int pcibios_vaddr_is_ioport(void __iomem *address);
^ permalink raw reply
* Re: [PATCH] powerpc: Fix 44x Machine Check handling
From: Olof Johansson @ 2007-11-16 7:40 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <20071116072149.350ADDDDF4@ozlabs.org>
On Fri, Nov 16, 2007 at 06:21:06PM +1100, Benjamin Herrenschmidt wrote:
> This removes the old CONFIG_440A which was a pain for multiplatform
> kernel and wasn't set properly by default and replaces it with a
> CPU feature. This makes Machine Check reporting work correctly on
> my Ebony (440GP) board.
I'm not sure I like this. It introduces another cpu feature flag,
that we'll soon run out of if it's used to signify version info per
implementation like this.
1) The SET_IVOR could be done from the cpu_setups for 440A instead
(i.e. introduce one).
2) Please just move the machine check handlers out to individual ones
instead of using the generic one. That way you don't need runtime checks
between the two (they don't seem to share much of it as-is anyway).
With the above two changes, you shouldn't need the feature bit any more.
-Olof
^ permalink raw reply
* [PATCH] e1000: Fix for 32 bits platforms with 64 bits resources
From: Benjamin Herrenschmidt @ 2007-11-16 7:37 UTC (permalink / raw)
To: auke-jan.h.kok; +Cc: netdev, jgarzik, linuxppc-dev
The e1000 driver stores the content of the PCI resources into
unsigned long's before ioremapping. This breaks on 32 bits
platforms that support 64 bits MMIO resources such as ppc 44x.
This fixes it by removing those temporary variables and passing
directly the result of pci_resource_start/len to ioremap.
The side effect is that I removed the assignments to the netdev
fields mem_start, mem_end and base_addr, which are totally useless
for PCI devices.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
--
drivers/net/e1000/e1000_main.c | 18 +++++-------------
1 file changed, 5 insertions(+), 13 deletions(-)
Index: linux-work/drivers/net/e1000/e1000_main.c
===================================================================
--- linux-work.orig/drivers/net/e1000/e1000_main.c 2007-11-16 17:14:32.000000000 +1100
+++ linux-work/drivers/net/e1000/e1000_main.c 2007-11-16 18:32:07.000000000 +1100
@@ -861,8 +861,6 @@ e1000_probe(struct pci_dev *pdev,
{
struct net_device *netdev;
struct e1000_adapter *adapter;
- unsigned long mmio_start, mmio_len;
- unsigned long flash_start, flash_len;
static int cards_found = 0;
static int global_quad_port_a = 0; /* global ksp3 port a indication */
@@ -905,11 +903,9 @@ e1000_probe(struct pci_dev *pdev,
adapter->hw.back = adapter;
adapter->msg_enable = (1 << debug) - 1;
- mmio_start = pci_resource_start(pdev, BAR_0);
- mmio_len = pci_resource_len(pdev, BAR_0);
-
err = -EIO;
- adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
+ adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, BAR_0),
+ pci_resource_len(pdev, BAR_0));
if (!adapter->hw.hw_addr)
goto err_ioremap;
@@ -944,10 +940,6 @@ e1000_probe(struct pci_dev *pdev,
#endif
strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
- netdev->mem_start = mmio_start;
- netdev->mem_end = mmio_start + mmio_len;
- netdev->base_addr = adapter->hw.io_base;
-
adapter->bd_number = cards_found;
/* setup the private structure */
@@ -960,9 +952,9 @@ e1000_probe(struct pci_dev *pdev,
* because it depends on mac_type */
if ((adapter->hw.mac_type == e1000_ich8lan) &&
(pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
- flash_start = pci_resource_start(pdev, 1);
- flash_len = pci_resource_len(pdev, 1);
- adapter->hw.flash_address = ioremap(flash_start, flash_len);
+ adapter->hw.flash_address =
+ ioremap(pci_resource_start(pdev, 1),
+ pci_resource_len(pdev, 1));
if (!adapter->hw.flash_address)
goto err_flashmap;
}
^ permalink raw reply
* [RFC/PATCH] powerpc: Fix powerpc 32 bits resource fixup for 64 bits resources
From: Benjamin Herrenschmidt @ 2007-11-16 7:28 UTC (permalink / raw)
To: linuxppc-dev
The 32bits powerpc resource fixup code uses unsigned longs to do the
offseting of resources which overflows on platforms such as 4xx where
resources can be 64 bits.
This fixes it by using resource_size_t instead.
However, the IO stuff does rely on some 32 bits arithmetic, so we hack
by cropping the result of the fixups for IO resources with a 32 bits
mask.
This isn't the prettiest but should work for now until we change the
32 bits PCI code to do IO mappings like 64 bits does, within a reserved
are of the kernel address space.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
DO NOT MERGE YET ! This has only been tested with some preliminary PCI
support code I have for Ebony, I haven't yet verified that the masking
stuff works fine on 32 bits machines with multiple busses and negative
offsets.
arch/powerpc/kernel/pci_32.c | 44 +++++++++++++++++++++++--------------------
1 file changed, 24 insertions(+), 20 deletions(-)
Index: linux-work/arch/powerpc/kernel/pci_32.c
===================================================================
--- linux-work.orig/arch/powerpc/kernel/pci_32.c 2007-11-16 15:48:27.000000000 +1100
+++ linux-work/arch/powerpc/kernel/pci_32.c 2007-11-16 15:55:54.000000000 +1100
@@ -104,7 +104,7 @@ pcibios_fixup_resources(struct pci_dev *
{
struct pci_controller* hose = (struct pci_controller *)dev->sysdata;
int i;
- unsigned long offset;
+ resource_size_t offset, mask;
if (!hose) {
printk(KERN_ERR "No hose for PCI dev %s!\n", pci_name(dev));
@@ -123,15 +123,17 @@ pcibios_fixup_resources(struct pci_dev *
continue;
}
offset = 0;
+ mask = (resource_size_t)-1;
if (res->flags & IORESOURCE_MEM) {
offset = hose->pci_mem_offset;
} else if (res->flags & IORESOURCE_IO) {
offset = (unsigned long) hose->io_base_virt
- isa_io_base;
+ mask = 0xffffffffu;
}
if (offset != 0) {
- res->start += offset;
- res->end += offset;
+ res->start = (res->start + offset) & mask;
+ res->end = (res->end + offset) & mask;
DBG("Fixup res %d (%lx) of dev %s: %llx -> %llx\n",
i, res->flags, pci_name(dev),
(u64)res->start - offset, (u64)res->start);
@@ -147,30 +149,32 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PC
void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
struct resource *res)
{
- unsigned long offset = 0;
+ resource_size_t offset = 0, mask = (resource_size_t)-1;
struct pci_controller *hose = dev->sysdata;
- if (hose && res->flags & IORESOURCE_IO)
+ if (hose && res->flags & IORESOURCE_IO) {
offset = (unsigned long)hose->io_base_virt - isa_io_base;
- else if (hose && res->flags & IORESOURCE_MEM)
+ mask = 0xffffffffu;
+ } else if (hose && res->flags & IORESOURCE_MEM)
offset = hose->pci_mem_offset;
- region->start = res->start - offset;
- region->end = res->end - offset;
+ region->start = (res->start - offset) & mask;
+ region->end = (res->end - offset) & mask;
}
EXPORT_SYMBOL(pcibios_resource_to_bus);
void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
struct pci_bus_region *region)
{
- unsigned long offset = 0;
+ resource_size_t offset = 0, mask = (resource_size_t)-1;
struct pci_controller *hose = dev->sysdata;
- if (hose && res->flags & IORESOURCE_IO)
+ if (hose && res->flags & IORESOURCE_IO) {
offset = (unsigned long)hose->io_base_virt - isa_io_base;
- else if (hose && res->flags & IORESOURCE_MEM)
+ mask = 0xffffffffu;
+ } else if (hose && res->flags & IORESOURCE_MEM)
offset = hose->pci_mem_offset;
- res->start = region->start + offset;
- res->end = region->end + offset;
+ res->start = (region->start + offset) & mask;
+ res->end = (region->end + offset) & mask;
}
EXPORT_SYMBOL(pcibios_bus_to_resource);
@@ -334,9 +338,9 @@ static int __init
pci_relocate_bridge_resource(struct pci_bus *bus, int i)
{
struct resource *res, *pr, *conflict;
- unsigned long try, size;
- int j;
+ resource_size_t try, size;
struct pci_bus *parent = bus->parent;
+ int j;
if (parent == NULL) {
/* shouldn't ever happen */
@@ -438,7 +442,7 @@ update_bridge_resource(struct pci_dev *d
u8 io_base_lo, io_limit_lo;
u16 mem_base, mem_limit;
u16 cmd;
- unsigned long start, end, off;
+ resource_size_t start, end, off;
struct pci_controller *hose = dev->sysdata;
if (!hose) {
@@ -1157,8 +1161,8 @@ void pcibios_fixup_bus(struct pci_bus *b
res->end = IO_SPACE_LIMIT;
res->flags = IORESOURCE_IO;
}
- res->start += io_offset;
- res->end += io_offset;
+ res->start = (res->start + io_offset) & 0xffffffffu;
+ res->end = (res->end + io_offset) & 0xffffffffu;
for (i = 0; i < 3; ++i) {
res = &hose->mem_resources[i];
@@ -1183,8 +1187,8 @@ void pcibios_fixup_bus(struct pci_bus *b
if (!res->flags || bus->self->transparent)
continue;
if (io_offset && (res->flags & IORESOURCE_IO)) {
- res->start += io_offset;
- res->end += io_offset;
+ res->start = (res->start + io_offset) & 0xffffffffu;
+ res->end = (res->end + io_offset) & 0xffffffffu;
} else if (hose->pci_mem_offset
&& (res->flags & IORESOURCE_MEM)) {
res->start += hose->pci_mem_offset;
^ permalink raw reply
* [PATCH] powerpc: Add xmon function to dump 44x TLB
From: Benjamin Herrenschmidt @ 2007-11-16 7:23 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
This adds a function to xmon to dump the content of the 44x processor
TLB with a little bit of decoding (but not much).
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
Did that to track down some machine checks I was having while working
on PCI support due to 32/64 bits resource screwage.
Useful to see where a given MMIO virtual address really maps to.
arch/powerpc/xmon/xmon.c | 38 ++++++++++++++++++++++++++++++++++++++
1 file changed, 38 insertions(+)
Index: linux-work/arch/powerpc/xmon/xmon.c
===================================================================
--- linux-work.orig/arch/powerpc/xmon/xmon.c 2007-11-16 16:33:03.000000000 +1100
+++ linux-work/arch/powerpc/xmon/xmon.c 2007-11-16 16:50:45.000000000 +1100
@@ -153,6 +153,10 @@ static const char *getvecname(unsigned l
static int do_spu_cmd(void);
+#ifdef CONFIG_44x
+static void dump_tlb_44x(void);
+#endif
+
int xmon_no_auto_backtrace;
extern void xmon_enter(void);
@@ -231,6 +235,9 @@ Commands:\n\
#ifdef CONFIG_PPC_STD_MMU_32
" u dump segment registers\n"
#endif
+#ifdef CONFIG_44x
+" u dump TLB\n"
+#endif
" ? help\n"
" zr reboot\n\
zh halt\n"
@@ -856,6 +863,11 @@ cmds(struct pt_regs *excp)
dump_segments();
break;
#endif
+#ifdef CONFIG_4xx
+ case 'u':
+ dump_tlb_44x();
+ break;
+#endif
default:
printf("Unrecognized command: ");
do {
@@ -2581,6 +2593,32 @@ void dump_segments(void)
}
#endif
+#ifdef CONFIG_44x
+static void dump_tlb_44x(void)
+{
+ int i;
+
+ for (i = 0; i < PPC44x_TLB_SIZE; i++) {
+ unsigned long w0,w1,w2;
+ asm volatile("tlbre %0,%1,0" : "=r" (w0) : "r" (i));
+ asm volatile("tlbre %0,%1,1" : "=r" (w1) : "r" (i));
+ asm volatile("tlbre %0,%1,2" : "=r" (w2) : "r" (i));
+ printf("[%02x] %08x %08x %08x ", i, w0, w1, w2);
+ if (w0 & PPC44x_TLB_VALID) {
+ printf("V %08x -> %01x%08x %c%c%c%c%c",
+ w0 & PPC44x_TLB_EPN_MASK,
+ w1 & PPC44x_TLB_ERPN_MASK,
+ w1 & PPC44x_TLB_RPN_MASK,
+ (w2 & PPC44x_TLB_W) ? 'W' : 'w',
+ (w2 & PPC44x_TLB_I) ? 'I' : 'i',
+ (w2 & PPC44x_TLB_M) ? 'M' : 'm',
+ (w2 & PPC44x_TLB_G) ? 'G' : 'g',
+ (w2 & PPC44x_TLB_E) ? 'E' : 'e');
+ }
+ printf("\n");
+ }
+}
+#endif /* CONFIG_44x */
void xmon_init(int enable)
{
#ifdef CONFIG_PPC_ISERIES
^ permalink raw reply
* [PATCH] powerpc: Fix 44x Machine Check handling
From: Benjamin Herrenschmidt @ 2007-11-16 7:21 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
This removes the old CONFIG_440A which was a pain for multiplatform
kernel and wasn't set properly by default and replaces it with a
CPU feature. This makes Machine Check reporting work correctly on
my Ebony (440GP) board.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
Note: I'm only setting it for 440GX and EPx as the old code did,
I haven't checked whether other new 440 chips such as SPe also
need that bit set.
arch/powerpc/kernel/cputable.c | 10 +++++-----
arch/powerpc/kernel/head_44x.S | 11 ++++++-----
arch/powerpc/kernel/traps.c | 19 ++++++++-----------
arch/powerpc/platforms/44x/Kconfig | 5 -----
include/asm-powerpc/cputable.h | 3 ++-
include/asm-powerpc/reg_booke.h | 2 +-
6 files changed, 22 insertions(+), 28 deletions(-)
Index: linux-work/arch/powerpc/kernel/cputable.c
===================================================================
--- linux-work.orig/arch/powerpc/kernel/cputable.c 2007-11-16 16:15:29.000000000 +1100
+++ linux-work/arch/powerpc/kernel/cputable.c 2007-11-16 16:17:42.000000000 +1100
@@ -1158,7 +1158,7 @@ static struct cpu_spec __initdata cpu_sp
.pvr_mask = 0xf0000ffb,
.pvr_value = 0x200008D8,
.cpu_name = "440EPX",
- .cpu_features = CPU_FTRS_44X,
+ .cpu_features = CPU_FTRS_44X | CPU_FTR_440A,
.cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
.icache_bsize = 32,
.dcache_bsize = 32,
@@ -1189,7 +1189,7 @@ static struct cpu_spec __initdata cpu_sp
.pvr_mask = 0xf0000fff,
.pvr_value = 0x50000850,
.cpu_name = "440GX Rev. A",
- .cpu_features = CPU_FTRS_44X,
+ .cpu_features = CPU_FTRS_44X | CPU_FTR_440A,
.cpu_user_features = COMMON_USER_BOOKE,
.icache_bsize = 32,
.dcache_bsize = 32,
@@ -1199,7 +1199,7 @@ static struct cpu_spec __initdata cpu_sp
.pvr_mask = 0xf0000fff,
.pvr_value = 0x50000851,
.cpu_name = "440GX Rev. B",
- .cpu_features = CPU_FTRS_44X,
+ .cpu_features = CPU_FTRS_44X | CPU_FTR_440A,
.cpu_user_features = COMMON_USER_BOOKE,
.icache_bsize = 32,
.dcache_bsize = 32,
@@ -1209,7 +1209,7 @@ static struct cpu_spec __initdata cpu_sp
.pvr_mask = 0xf0000fff,
.pvr_value = 0x50000892,
.cpu_name = "440GX Rev. C",
- .cpu_features = CPU_FTRS_44X,
+ .cpu_features = CPU_FTRS_44X | CPU_FTR_440A,
.cpu_user_features = COMMON_USER_BOOKE,
.icache_bsize = 32,
.dcache_bsize = 32,
@@ -1219,7 +1219,7 @@ static struct cpu_spec __initdata cpu_sp
.pvr_mask = 0xf0000fff,
.pvr_value = 0x50000894,
.cpu_name = "440GX Rev. F",
- .cpu_features = CPU_FTRS_44X,
+ .cpu_features = CPU_FTRS_44X | CPU_FTR_440A,
.cpu_user_features = COMMON_USER_BOOKE,
.icache_bsize = 32,
.dcache_bsize = 32,
Index: linux-work/arch/powerpc/kernel/head_44x.S
===================================================================
--- linux-work.orig/arch/powerpc/kernel/head_44x.S 2007-11-16 16:21:49.000000000 +1100
+++ linux-work/arch/powerpc/kernel/head_44x.S 2007-11-16 16:27:12.000000000 +1100
@@ -197,7 +197,7 @@ skpinv: addi r4,r4,1 /* Increment */
/* Establish the interrupt vector offsets */
SET_IVOR(0, CriticalInput);
- SET_IVOR(1, MachineCheck);
+ SET_IVOR(1, MachineCheck); /* patched later on 440A */
SET_IVOR(2, DataStorage);
SET_IVOR(3, InstructionStorage);
SET_IVOR(4, ExternalInput);
@@ -237,6 +237,10 @@ skpinv: addi r4,r4,1 /* Increment */
bl early_init
+BEGIN_FTR_SECTION
+ SET_IVOR(1, MachineCheckA);
+END_FTR_SECTION_IFSET(CPU_FTR_440A)
+
/*
* Decide what sort of machine this is and initialize the MMU.
*/
@@ -289,11 +293,8 @@ interrupt_base:
CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
/* Machine Check Interrupt */
-#ifdef CONFIG_440A
- MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
-#else
CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
-#endif
+ MCHECK_EXCEPTION(0x0200, MachineCheckA, machine_check_exception)
/* Data Storage Interrupt */
START_EXCEPTION(DataStorage)
Index: linux-work/arch/powerpc/kernel/traps.c
===================================================================
--- linux-work.orig/arch/powerpc/kernel/traps.c 2007-11-16 16:19:52.000000000 +1100
+++ linux-work/arch/powerpc/kernel/traps.c 2007-11-16 16:28:58.000000000 +1100
@@ -338,20 +338,16 @@ static int generic_machine_check_excepti
{
unsigned long reason = get_mc_reason(regs);
-#if defined(CONFIG_4xx) && !defined(CONFIG_440A)
- if (reason & ESR_IMCP) {
- printk("Instruction");
- mtspr(SPRN_ESR, reason & ~ESR_IMCP);
- } else
- printk("Data");
- printk(" machine check in kernel mode.\n");
-#elif defined(CONFIG_440A)
+#if defined(CONFIG_4xx)
printk("Machine check in kernel mode.\n");
if (reason & ESR_IMCP){
- printk("Instruction Synchronous Machine Check exception\n");
+ if (cpu_has_feature(CPU_FTR_440A))
+ printk("Instruction Synchronous Machine Check exception\n");
+ else
+ printk("Instruction Machine Check exception\n");
mtspr(SPRN_ESR, reason & ~ESR_IMCP);
}
- else {
+ else if (cpu_has_feature(CPU_FTR_440A)) {
u32 mcsr = mfspr(SPRN_MCSR);
if (mcsr & MCSR_IB)
printk("Instruction Read PLB Error\n");
@@ -374,7 +370,8 @@ static int generic_machine_check_excepti
/* Clear MCSR */
mtspr(SPRN_MCSR, mcsr);
- }
+ } else
+ printk("Data Machine Check exception\n");
#elif defined (CONFIG_E500)
printk("Machine check in kernel mode.\n");
printk("Caused by (from MCSR=%lx): ", reason);
Index: linux-work/arch/powerpc/platforms/44x/Kconfig
===================================================================
--- linux-work.orig/arch/powerpc/platforms/44x/Kconfig 2007-11-16 16:13:49.000000000 +1100
+++ linux-work/arch/powerpc/platforms/44x/Kconfig 2007-11-16 16:29:28.000000000 +1100
@@ -62,11 +62,6 @@ config 440GX
config 440SP
bool
-config 440A
- bool
- depends on 440GX || 440EPX
- default y
-
# 44x errata/workaround config symbols, selected by the CPU models above
config IBM440EP_ERR42
bool
Index: linux-work/include/asm-powerpc/cputable.h
===================================================================
--- linux-work.orig/include/asm-powerpc/cputable.h 2007-11-16 16:14:29.000000000 +1100
+++ linux-work/include/asm-powerpc/cputable.h 2007-11-16 16:19:35.000000000 +1100
@@ -138,6 +138,7 @@ extern void do_feature_fixups(unsigned l
#define CPU_FTR_FPU_UNAVAILABLE ASM_CONST(0x0000000000800000)
#define CPU_FTR_UNIFIED_ID_CACHE ASM_CONST(0x0000000001000000)
#define CPU_FTR_SPE ASM_CONST(0x0000000002000000)
+#define CPU_FTR_440A ASM_CONST(0x0000000004000000)
/*
* Add the 64-bit processor unique features in the top half of the word;
@@ -400,7 +401,7 @@ enum {
CPU_FTRS_40X |
#endif
#ifdef CONFIG_44x
- CPU_FTRS_44X |
+ CPU_FTRS_44X | CPU_FTR_440A |
#endif
#ifdef CONFIG_E200
CPU_FTRS_E200 |
Index: linux-work/include/asm-powerpc/reg_booke.h
===================================================================
--- linux-work.orig/include/asm-powerpc/reg_booke.h 2007-11-16 16:28:40.000000000 +1100
+++ linux-work/include/asm-powerpc/reg_booke.h 2007-11-16 16:28:43.000000000 +1100
@@ -207,7 +207,7 @@
#define CCR1_TCS 0x00000080 /* Timer Clock Select */
/* Bit definitions for the MCSR. */
-#ifdef CONFIG_440A
+#ifdef CONFIG_4xx
#define MCSR_MCS 0x80000000 /* Machine Check Summary */
#define MCSR_IB 0x40000000 /* Instruction PLB Error */
#define MCSR_DRB 0x20000000 /* Data Read PLB Error */
^ permalink raw reply
* Re: [PATCH] [POWERPC] Fix link errors for allyesconfig
From: David Miller @ 2007-11-16 6:23 UTC (permalink / raw)
To: sfr; +Cc: linuxppc-dev, paulus
In-Reply-To: <20071104132839.ea04cf6b.sfr@canb.auug.org.au>
From: Stephen Rothwell <sfr@canb.auug.org.au>
Date: Sun, 4 Nov 2007 13:28:39 +1100
> Dave, would something like this help as an alternative to the .fixup
> change you committed recently?
I tried it, doesn't help:
kernel/built-in.o: In function `context_switch':
/home/davem/src/GIT/sparc-2.6/kernel/sched.c:1950: relocation truncated to fit: R_SPARC_WDISP22 against symbol `ret_from_syscall' defined in .text section in arch/sparc64/kernel/head.o
drivers/built-in.o:(.fixup+0x0): relocation truncated to fit: R_SPARC_WDISP22 against `.text'
drivers/built-in.o:(.fixup+0x8): relocation truncated to fit: R_SPARC_WDISP22 against `.text'
drivers/built-in.o:(.fixup+0x10): relocation truncated to fit: R_SPARC_WDISP22 against `.text'
drivers/built-in.o:(.fixup+0x18): relocation truncated to fit: R_SPARC_WDISP22 against `.text'
drivers/built-in.o:(.fixup+0x20): relocation truncated to fit: R_SPARC_WDISP22 against `.text'
drivers/built-in.o:(.fixup+0x2c): relocation truncated to fit: R_SPARC_WDISP22 against `.text'
drivers/built-in.o:(.fixup+0x38): relocation truncated to fit: R_SPARC_WDISP22 against `.text'
drivers/built-in.o:(.fixup+0x44): relocation truncated to fit: R_SPARC_WDISP22 against `.text'
drivers/built-in.o:(.fixup+0x50): relocation truncated to fit: R_SPARC_WDISP22 against `.text'
drivers/built-in.o:(.fixup+0x5c): additional relocation overflows omitted from the output
make: *** [.tmp_vmlinux1] Error 1
drivers/built-in.o itself has a 16MB+ .text section which is
beyond the 22-bit signed branch displacement we have available.
There has to be a nicer way to do this. In fact I think I
just figured out one such technique.
The whole reason we need these .fixup sections is to encode
a move of -EFAULT into some register, and a control transfer.
Every kernel text address, even for modules, is in the low 32-bits on
sparc64. So we can encode this more simply, perhaps even with one
32-bit word for each entry.
I can probably encode it all in the __ex_table entries in fact,
and I'll give that a shot.
^ permalink raw reply
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