* Re: ppc vs powerpc
From: Tony Breeds @ 2007-12-10 22:01 UTC (permalink / raw)
To: Jon Smirl; +Cc: PowerPC dev list
In-Reply-To: <9e4733910712101354i31020c2w72d74bf33ba3e90b@mail.gmail.com>
On Mon, Dec 10, 2007 at 04:54:32PM -0500, Jon Smirl wrote:
> How can I tell a build for ARCH=ppc vs ARCH=powerpc in Kconfig?
IIRC ARCH=powerpc will have CONFIG_PPC_MERGE set, arch=ppc will not.
Yours Tony
linux.conf.au http://linux.conf.au/ || http://lca2008.linux.org.au/
Jan 28 - Feb 02 2008 The Australian Linux Technical Conference!
^ permalink raw reply
* [PATCH] Addition to the i2c series, copy the ppc mpc-i2c driver before changing it on powerpc
From: Jon Smirl @ 2007-12-10 22:20 UTC (permalink / raw)
To: PowerPC dev list
Copy mpc-i2c to preserve support for ARCH=ppc and allow changes on ARCH=powerpc
Temporarily copy the mpc-i2c driver to continue support for the ppc
architecture until it is removed in mid-2008. This file should be
deleted as part of ppc's final removal.
Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
---
Makefile | 2
arch/ppc/configs/TQM8540_defconfig | 2
arch/ppc/configs/TQM8541_defconfig | 2
arch/ppc/configs/TQM8555_defconfig | 2
arch/ppc/configs/TQM8560_defconfig | 2
arch/ppc/configs/mpc834x_sys_defconfig | 2
arch/ppc/configs/mpc8540_ads_defconfig | 2
arch/ppc/configs/mpc8548_cds_defconfig | 2
arch/ppc/configs/mpc8555_cds_defconfig | 2
arch/ppc/configs/mpc8560_ads_defconfig | 2
drivers/i2c/busses/Kconfig | 16 +
drivers/i2c/busses/Makefile | 1
drivers/i2c/busses/i2c-mpc-ppc.c | 418 ++++++++++++++++++++++++++++++++
13 files changed, 444 insertions(+), 11 deletions(-)
create mode 100644 drivers/i2c/busses/i2c-mpc-ppc.c
diff --git a/Makefile b/Makefile
index 013b43a..3e714e2 100644
--- a/Makefile
+++ b/Makefile
@@ -35,7 +35,7 @@ MAKEFLAGS += -rR --no-print-directory
# To put more focus on warnings, be less verbose as default
# Use 'make V=1' to see the full commands
-ARCH=powerpc
+ARCH=ppc
CROSS_COMPILE=powerpc-603e-linux-gnu-
ifdef V
diff --git a/arch/ppc/configs/TQM8540_defconfig
b/arch/ppc/configs/TQM8540_defconfig
index f33f0e7..7098ed0 100644
--- a/arch/ppc/configs/TQM8540_defconfig
+++ b/arch/ppc/configs/TQM8540_defconfig
@@ -684,7 +684,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PROSAVAGE is not set
diff --git a/arch/ppc/configs/TQM8541_defconfig
b/arch/ppc/configs/TQM8541_defconfig
index e00cd62..2137d01 100644
--- a/arch/ppc/configs/TQM8541_defconfig
+++ b/arch/ppc/configs/TQM8541_defconfig
@@ -687,7 +687,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_MPC8260 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
diff --git a/arch/ppc/configs/TQM8555_defconfig
b/arch/ppc/configs/TQM8555_defconfig
index 43a0d9d..f2317b6 100644
--- a/arch/ppc/configs/TQM8555_defconfig
+++ b/arch/ppc/configs/TQM8555_defconfig
@@ -687,7 +687,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PROSAVAGE is not set
diff --git a/arch/ppc/configs/TQM8560_defconfig
b/arch/ppc/configs/TQM8560_defconfig
index a814d17..6c19121 100644
--- a/arch/ppc/configs/TQM8560_defconfig
+++ b/arch/ppc/configs/TQM8560_defconfig
@@ -694,7 +694,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_MPC8260 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
diff --git a/arch/ppc/configs/mpc834x_sys_defconfig
b/arch/ppc/configs/mpc834x_sys_defconfig
index d90c8a7..cd568d2 100644
--- a/arch/ppc/configs/mpc834x_sys_defconfig
+++ b/arch/ppc/configs/mpc834x_sys_defconfig
@@ -562,7 +562,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PROSAVAGE is not set
diff --git a/arch/ppc/configs/mpc8540_ads_defconfig
b/arch/ppc/configs/mpc8540_ads_defconfig
index bf676eb..5819835 100644
--- a/arch/ppc/configs/mpc8540_ads_defconfig
+++ b/arch/ppc/configs/mpc8540_ads_defconfig
@@ -452,7 +452,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PIIX4 is not set
diff --git a/arch/ppc/configs/mpc8548_cds_defconfig
b/arch/ppc/configs/mpc8548_cds_defconfig
index f36fc5d..e5b5071 100644
--- a/arch/ppc/configs/mpc8548_cds_defconfig
+++ b/arch/ppc/configs/mpc8548_cds_defconfig
@@ -413,7 +413,7 @@ CONFIG_I2C_CHARDEV=y
#
# I2C Hardware Bus support
#
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PCA_ISA is not set
diff --git a/arch/ppc/configs/mpc8555_cds_defconfig
b/arch/ppc/configs/mpc8555_cds_defconfig
index 4f1e320..08dbab0 100644
--- a/arch/ppc/configs/mpc8555_cds_defconfig
+++ b/arch/ppc/configs/mpc8555_cds_defconfig
@@ -518,7 +518,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PROSAVAGE is not set
diff --git a/arch/ppc/configs/mpc8560_ads_defconfig
b/arch/ppc/configs/mpc8560_ads_defconfig
index f12d48f..0e0080b 100644
--- a/arch/ppc/configs/mpc8560_ads_defconfig
+++ b/arch/ppc/configs/mpc8560_ads_defconfig
@@ -489,7 +489,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PROSAVAGE is not set
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index c466c6c..bdde307 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -301,7 +301,7 @@ config I2C_POWERMAC
config I2C_MPC
tristate "MPC107/824x/85xx/52xx/86xx"
- depends on PPC32
+ depends on PPC32 && PPC_MERGE
help
If you say yes to this option, support will be included for the
built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
@@ -311,6 +311,20 @@ config I2C_MPC
This driver can also be built as a module. If so, the module
will be called i2c-mpc.
+config I2C_MPC_PPC
+ tristate "MPC107/824x/85xx/52xx/86xx"
+ depends on PPC32 && !PPC_MERGE
+ help
+ If you say yes to this option, support will be included for the
+ built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
+ MPC85xx/MPC8641 family processors. The driver may also work on 52xx
+ family processors, though interrupts are known not to work.
+
+ This version of the driver is scheduled for deletion with the PPC
architecture.
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-mpc.
+
config I2C_NFORCE2
tristate "Nvidia nForce2, nForce3 and nForce4"
depends on PCI
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 81d43c2..b7fe095 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
obj-$(CONFIG_I2C_IXP4XX) += i2c-ixp4xx.o
obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
+obj-$(CONFIG_I2C_MPC_PPC) += i2c-mpc-ppc.o
obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o
obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o
diff --git a/drivers/i2c/busses/i2c-mpc-ppc.c b/drivers/i2c/busses/i2c-mpc-ppc.c
new file mode 100644
index 0000000..d8de4ac
--- /dev/null
+++ b/drivers/i2c/busses/i2c-mpc-ppc.c
@@ -0,0 +1,418 @@
+/*
+ * (C) Copyright 2003-2004
+ * Humboldt Solutions Ltd, adrian@humboldt.co.uk.
+
+ * This is a combined i2c adapter and algorithm driver for the
+ * MPC107/Tsi107 PowerPC northbridge and processors that include
+ * the same I2C unit (8240, 8245, 85xx).
+ *
+ * Release 0.8
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+
+#include <asm/io.h>
+#include <linux/fsl_devices.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+
+#define MPC_I2C_ADDR 0x00
+#define MPC_I2C_FDR 0x04
+#define MPC_I2C_CR 0x08
+#define MPC_I2C_SR 0x0c
+#define MPC_I2C_DR 0x10
+#define MPC_I2C_DFSRR 0x14
+#define MPC_I2C_REGION 0x20
+
+#define CCR_MEN 0x80
+#define CCR_MIEN 0x40
+#define CCR_MSTA 0x20
+#define CCR_MTX 0x10
+#define CCR_TXAK 0x08
+#define CCR_RSTA 0x04
+
+#define CSR_MCF 0x80
+#define CSR_MAAS 0x40
+#define CSR_MBB 0x20
+#define CSR_MAL 0x10
+#define CSR_SRW 0x04
+#define CSR_MIF 0x02
+#define CSR_RXAK 0x01
+
+struct mpc_i2c {
+ void __iomem *base;
+ u32 interrupt;
+ wait_queue_head_t queue;
+ struct i2c_adapter adap;
+ int irq;
+ u32 flags;
+};
+
+static __inline__ void writeccr(struct mpc_i2c *i2c, u32 x)
+{
+ writeb(x, i2c->base + MPC_I2C_CR);
+}
+
+static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
+{
+ struct mpc_i2c *i2c = dev_id;
+ if (readb(i2c->base + MPC_I2C_SR) & CSR_MIF) {
+ /* Read again to allow register to stabilise */
+ i2c->interrupt = readb(i2c->base + MPC_I2C_SR);
+ writeb(0, i2c->base + MPC_I2C_SR);
+ wake_up_interruptible(&i2c->queue);
+ }
+ return IRQ_HANDLED;
+}
+
+/* Sometimes 9th clock pulse isn't generated, and slave doesn't release
+ * the bus, because it wants to send ACK.
+ * Following sequence of enabling/disabling and sending start/stop generates
+ * the pulse, so it's all OK.
+ */
+static void mpc_i2c_fixup(struct mpc_i2c *i2c)
+{
+ writeccr(i2c, 0);
+ udelay(30);
+ writeccr(i2c, CCR_MEN);
+ udelay(30);
+ writeccr(i2c, CCR_MSTA | CCR_MTX);
+ udelay(30);
+ writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
+ udelay(30);
+ writeccr(i2c, CCR_MEN);
+ udelay(30);
+}
+
+static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
+{
+ unsigned long orig_jiffies = jiffies;
+ u32 x;
+ int result = 0;
+
+ if (i2c->irq == 0)
+ {
+ while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
+ schedule();
+ if (time_after(jiffies, orig_jiffies + timeout)) {
+ pr_debug("I2C: timeout\n");
+ writeccr(i2c, 0);
+ result = -EIO;
+ break;
+ }
+ }
+ x = readb(i2c->base + MPC_I2C_SR);
+ writeb(0, i2c->base + MPC_I2C_SR);
+ } else {
+ /* Interrupt mode */
+ result = wait_event_interruptible_timeout(i2c->queue,
+ (i2c->interrupt & CSR_MIF), timeout * HZ);
+
+ if (unlikely(result < 0)) {
+ pr_debug("I2C: wait interrupted\n");
+ writeccr(i2c, 0);
+ } else if (unlikely(!(i2c->interrupt & CSR_MIF))) {
+ pr_debug("I2C: wait timeout\n");
+ writeccr(i2c, 0);
+ result = -ETIMEDOUT;
+ }
+
+ x = i2c->interrupt;
+ i2c->interrupt = 0;
+ }
+
+ if (result < 0)
+ return result;
+
+ if (!(x & CSR_MCF)) {
+ pr_debug("I2C: unfinished\n");
+ return -EIO;
+ }
+
+ if (x & CSR_MAL) {
+ pr_debug("I2C: MAL\n");
+ return -EIO;
+ }
+
+ if (writing && (x & CSR_RXAK)) {
+ pr_debug("I2C: No RXAK\n");
+ /* generate stop */
+ writeccr(i2c, CCR_MEN);
+ return -EIO;
+ }
+ return 0;
+}
+
+static void mpc_i2c_setclock(struct mpc_i2c *i2c)
+{
+ /* Set clock and filters */
+ if (i2c->flags & FSL_I2C_DEV_SEPARATE_DFSRR) {
+ writeb(0x31, i2c->base + MPC_I2C_FDR);
+ writeb(0x10, i2c->base + MPC_I2C_DFSRR);
+ } else if (i2c->flags & FSL_I2C_DEV_CLOCK_5200)
+ writeb(0x3f, i2c->base + MPC_I2C_FDR);
+ else
+ writel(0x1031, i2c->base + MPC_I2C_FDR);
+}
+
+static void mpc_i2c_start(struct mpc_i2c *i2c)
+{
+ /* Clear arbitration */
+ writeb(0, i2c->base + MPC_I2C_SR);
+ /* Start with MEN */
+ writeccr(i2c, CCR_MEN);
+}
+
+static void mpc_i2c_stop(struct mpc_i2c *i2c)
+{
+ writeccr(i2c, CCR_MEN);
+}
+
+static int mpc_write(struct mpc_i2c *i2c, int target,
+ const u8 * data, int length, int restart)
+{
+ int i;
+ unsigned timeout = i2c->adap.timeout;
+ u32 flags = restart ? CCR_RSTA : 0;
+
+ /* Start with MEN */
+ if (!restart)
+ writeccr(i2c, CCR_MEN);
+ /* Start as master */
+ writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
+ /* Write target byte */
+ writeb((target << 1), i2c->base + MPC_I2C_DR);
+
+ if (i2c_wait(i2c, timeout, 1) < 0)
+ return -1;
+
+ for (i = 0; i < length; i++) {
+ /* Write data byte */
+ writeb(data[i], i2c->base + MPC_I2C_DR);
+
+ if (i2c_wait(i2c, timeout, 1) < 0)
+ return -1;
+ }
+
+ return 0;
+}
+
+static int mpc_read(struct mpc_i2c *i2c, int target,
+ u8 * data, int length, int restart)
+{
+ unsigned timeout = i2c->adap.timeout;
+ int i;
+ u32 flags = restart ? CCR_RSTA : 0;
+
+ /* Start with MEN */
+ if (!restart)
+ writeccr(i2c, CCR_MEN);
+ /* Switch to read - restart */
+ writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
+ /* Write target address byte - this time with the read flag set */
+ writeb((target << 1) | 1, i2c->base + MPC_I2C_DR);
+
+ if (i2c_wait(i2c, timeout, 1) < 0)
+ return -1;
+
+ if (length) {
+ if (length == 1)
+ writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
+ else
+ writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA);
+ /* Dummy read */
+ readb(i2c->base + MPC_I2C_DR);
+ }
+
+ for (i = 0; i < length; i++) {
+ if (i2c_wait(i2c, timeout, 0) < 0)
+ return -1;
+
+ /* Generate txack on next to last byte */
+ if (i == length - 2)
+ writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
+ /* Generate stop on last byte */
+ if (i == length - 1)
+ writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK);
+ data[i] = readb(i2c->base + MPC_I2C_DR);
+ }
+
+ return length;
+}
+
+static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+{
+ struct i2c_msg *pmsg;
+ int i;
+ int ret = 0;
+ unsigned long orig_jiffies = jiffies;
+ struct mpc_i2c *i2c = i2c_get_adapdata(adap);
+
+ mpc_i2c_start(i2c);
+
+ /* Allow bus up to 1s to become not busy */
+ while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
+ if (signal_pending(current)) {
+ pr_debug("I2C: Interrupted\n");
+ writeccr(i2c, 0);
+ return -EINTR;
+ }
+ if (time_after(jiffies, orig_jiffies + HZ)) {
+ pr_debug("I2C: timeout\n");
+ if (readb(i2c->base + MPC_I2C_SR) ==
+ (CSR_MCF | CSR_MBB | CSR_RXAK))
+ mpc_i2c_fixup(i2c);
+ return -EIO;
+ }
+ schedule();
+ }
+
+ for (i = 0; ret >= 0 && i < num; i++) {
+ pmsg = &msgs[i];
+ pr_debug("Doing %s %d bytes to 0x%02x - %d of %d messages\n",
+ pmsg->flags & I2C_M_RD ? "read" : "write",
+ pmsg->len, pmsg->addr, i + 1, num);
+ if (pmsg->flags & I2C_M_RD)
+ ret =
+ mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
+ else
+ ret =
+ mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
+ }
+ mpc_i2c_stop(i2c);
+ return (ret < 0) ? ret : num;
+}
+
+static u32 mpc_functionality(struct i2c_adapter *adap)
+{
+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm mpc_algo = {
+ .master_xfer = mpc_xfer,
+ .functionality = mpc_functionality,
+};
+
+static struct i2c_adapter mpc_ops = {
+ .owner = THIS_MODULE,
+ .name = "MPC adapter",
+ .id = I2C_HW_MPC107,
+ .algo = &mpc_algo,
+ .class = I2C_CLASS_HWMON,
+ .timeout = 1,
+ .retries = 1
+};
+
+static int fsl_i2c_probe(struct platform_device *pdev)
+{
+ int result = 0;
+ struct mpc_i2c *i2c;
+ struct fsl_i2c_platform_data *pdata;
+ struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+ pdata = (struct fsl_i2c_platform_data *) pdev->dev.platform_data;
+
+ if (!(i2c = kzalloc(sizeof(*i2c), GFP_KERNEL))) {
+ return -ENOMEM;
+ }
+
+ i2c->irq = platform_get_irq(pdev, 0);
+ if (i2c->irq < 0) {
+ result = -ENXIO;
+ goto fail_get_irq;
+ }
+ i2c->flags = pdata->device_flags;
+ init_waitqueue_head(&i2c->queue);
+
+ i2c->base = ioremap((phys_addr_t)r->start, MPC_I2C_REGION);
+
+ if (!i2c->base) {
+ printk(KERN_ERR "i2c-mpc - failed to map controller\n");
+ result = -ENOMEM;
+ goto fail_map;
+ }
+
+ if (i2c->irq != 0)
+ if ((result = request_irq(i2c->irq, mpc_i2c_isr,
+ IRQF_SHARED, "i2c-mpc", i2c)) < 0) {
+ printk(KERN_ERR
+ "i2c-mpc - failed to attach interrupt\n");
+ goto fail_irq;
+ }
+
+ mpc_i2c_setclock(i2c);
+ platform_set_drvdata(pdev, i2c);
+
+ i2c->adap = mpc_ops;
+ i2c->adap.nr = pdev->id;
+ i2c_set_adapdata(&i2c->adap, i2c);
+ i2c->adap.dev.parent = &pdev->dev;
+ if ((result = i2c_add_numbered_adapter(&i2c->adap)) < 0) {
+ printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
+ goto fail_add;
+ }
+
+ return result;
+
+ fail_add:
+ if (i2c->irq != 0)
+ free_irq(i2c->irq, i2c);
+ fail_irq:
+ iounmap(i2c->base);
+ fail_map:
+ fail_get_irq:
+ kfree(i2c);
+ return result;
+};
+
+static int fsl_i2c_remove(struct platform_device *pdev)
+{
+ struct mpc_i2c *i2c = platform_get_drvdata(pdev);
+
+ i2c_del_adapter(&i2c->adap);
+ platform_set_drvdata(pdev, NULL);
+
+ if (i2c->irq != 0)
+ free_irq(i2c->irq, i2c);
+
+ iounmap(i2c->base);
+ kfree(i2c);
+ return 0;
+};
+
+/* Structure for a device driver */
+static struct platform_driver fsl_i2c_driver = {
+ .probe = fsl_i2c_probe,
+ .remove = fsl_i2c_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "fsl-i2c",
+ },
+};
+
+static int __init fsl_i2c_init(void)
+{
+ return platform_driver_register(&fsl_i2c_driver);
+}
+
+static void __exit fsl_i2c_exit(void)
+{
+ platform_driver_unregister(&fsl_i2c_driver);
+}
+
+module_init(fsl_i2c_init);
+module_exit(fsl_i2c_exit);
+
+MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
+MODULE_DESCRIPTION
+ ("I2C-Bus adapter for MPC107 bridge and MPC824x/85xx/52xx processors");
+MODULE_LICENSE("GPL");
--
Jon Smirl
jonsmirl@gmail.com
^ permalink raw reply related
* Re: [PATCH] Addition to the i2c series, copy the ppc mpc-i2c driver before changing it on powerpc
From: Tony Breeds @ 2007-12-10 22:42 UTC (permalink / raw)
To: Jon Smirl; +Cc: PowerPC dev list
In-Reply-To: <9e4733910712101420o15b5e908jc7291a0086832467@mail.gmail.com>
On Mon, Dec 10, 2007 at 05:20:08PM -0500, Jon Smirl wrote:
> Copy mpc-i2c to preserve support for ARCH=ppc and allow changes on ARCH=powerpc
>
> Temporarily copy the mpc-i2c driver to continue support for the ppc
> architecture until it is removed in mid-2008. This file should be
> deleted as part of ppc's final removal.
<snip?
>
> diff --git a/Makefile b/Makefile
> index 013b43a..3e714e2 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -35,7 +35,7 @@ MAKEFLAGS += -rR --no-print-directory
> # To put more focus on warnings, be less verbose as default
> # Use 'make V=1' to see the full commands
>
> -ARCH=powerpc
> +ARCH=ppc
> CROSS_COMPILE=powerpc-603e-linux-gnu-
Umm should this hunk be here? My Makefile doen't have these 3 line at
all?
Yours Tony
linux.conf.au http://linux.conf.au/ || http://lca2008.linux.org.au/
Jan 28 - Feb 02 2008 The Australian Linux Technical Conference!
^ permalink raw reply
* Re: [PATCH] Addition to the i2c series, copy the ppc mpc-i2c driver before changing it on powerpc
From: Grant Likely @ 2007-12-10 22:44 UTC (permalink / raw)
To: Jon Smirl; +Cc: PowerPC dev list
In-Reply-To: <9e4733910712101420o15b5e908jc7291a0086832467@mail.gmail.com>
On 12/10/07, Jon Smirl <jonsmirl@gmail.com> wrote:
> Copy mpc-i2c to preserve support for ARCH=ppc and allow changes on ARCH=powerpc
>
> Temporarily copy the mpc-i2c driver to continue support for the ppc
> architecture until it is removed in mid-2008. This file should be
> deleted as part of ppc's final removal.
>
> Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
For the record; I'm not fond of this approach. Supporting both bus
bindings in the single driver is simple and results in less code churn
when arch/ppc is removed, and encourages separation between the driver
proper and the bus bindings which is just a good idea for all drivers
in general.
Just my $0.02
Cheers,
g.
> ---
>
> Makefile | 2
> arch/ppc/configs/TQM8540_defconfig | 2
> arch/ppc/configs/TQM8541_defconfig | 2
> arch/ppc/configs/TQM8555_defconfig | 2
> arch/ppc/configs/TQM8560_defconfig | 2
> arch/ppc/configs/mpc834x_sys_defconfig | 2
> arch/ppc/configs/mpc8540_ads_defconfig | 2
> arch/ppc/configs/mpc8548_cds_defconfig | 2
> arch/ppc/configs/mpc8555_cds_defconfig | 2
> arch/ppc/configs/mpc8560_ads_defconfig | 2
> drivers/i2c/busses/Kconfig | 16 +
> drivers/i2c/busses/Makefile | 1
> drivers/i2c/busses/i2c-mpc-ppc.c | 418 ++++++++++++++++++++++++++++++++
> 13 files changed, 444 insertions(+), 11 deletions(-)
> create mode 100644 drivers/i2c/busses/i2c-mpc-ppc.c
>
>
> diff --git a/Makefile b/Makefile
> index 013b43a..3e714e2 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -35,7 +35,7 @@ MAKEFLAGS += -rR --no-print-directory
> # To put more focus on warnings, be less verbose as default
> # Use 'make V=1' to see the full commands
>
> -ARCH=powerpc
> +ARCH=ppc
> CROSS_COMPILE=powerpc-603e-linux-gnu-
>
> ifdef V
> diff --git a/arch/ppc/configs/TQM8540_defconfig
> b/arch/ppc/configs/TQM8540_defconfig
> index f33f0e7..7098ed0 100644
> --- a/arch/ppc/configs/TQM8540_defconfig
> +++ b/arch/ppc/configs/TQM8540_defconfig
> @@ -684,7 +684,7 @@ CONFIG_I2C_CHARDEV=y
> # CONFIG_I2C_I801 is not set
> # CONFIG_I2C_I810 is not set
> # CONFIG_I2C_PIIX4 is not set
> -CONFIG_I2C_MPC=y
> +CONFIG_I2C_MPC_PPC=y
> # CONFIG_I2C_NFORCE2 is not set
> # CONFIG_I2C_PARPORT_LIGHT is not set
> # CONFIG_I2C_PROSAVAGE is not set
> diff --git a/arch/ppc/configs/TQM8541_defconfig
> b/arch/ppc/configs/TQM8541_defconfig
> index e00cd62..2137d01 100644
> --- a/arch/ppc/configs/TQM8541_defconfig
> +++ b/arch/ppc/configs/TQM8541_defconfig
> @@ -687,7 +687,7 @@ CONFIG_I2C_CHARDEV=y
> # CONFIG_I2C_I801 is not set
> # CONFIG_I2C_I810 is not set
> # CONFIG_I2C_PIIX4 is not set
> -CONFIG_I2C_MPC=y
> +CONFIG_I2C_MPC_PPC=y
> # CONFIG_I2C_MPC8260 is not set
> # CONFIG_I2C_NFORCE2 is not set
> # CONFIG_I2C_PARPORT_LIGHT is not set
> diff --git a/arch/ppc/configs/TQM8555_defconfig
> b/arch/ppc/configs/TQM8555_defconfig
> index 43a0d9d..f2317b6 100644
> --- a/arch/ppc/configs/TQM8555_defconfig
> +++ b/arch/ppc/configs/TQM8555_defconfig
> @@ -687,7 +687,7 @@ CONFIG_I2C_CHARDEV=y
> # CONFIG_I2C_I801 is not set
> # CONFIG_I2C_I810 is not set
> # CONFIG_I2C_PIIX4 is not set
> -CONFIG_I2C_MPC=y
> +CONFIG_I2C_MPC_PPC=y
> # CONFIG_I2C_NFORCE2 is not set
> # CONFIG_I2C_PARPORT_LIGHT is not set
> # CONFIG_I2C_PROSAVAGE is not set
> diff --git a/arch/ppc/configs/TQM8560_defconfig
> b/arch/ppc/configs/TQM8560_defconfig
> index a814d17..6c19121 100644
> --- a/arch/ppc/configs/TQM8560_defconfig
> +++ b/arch/ppc/configs/TQM8560_defconfig
> @@ -694,7 +694,7 @@ CONFIG_I2C_CHARDEV=y
> # CONFIG_I2C_I801 is not set
> # CONFIG_I2C_I810 is not set
> # CONFIG_I2C_PIIX4 is not set
> -CONFIG_I2C_MPC=y
> +CONFIG_I2C_MPC_PPC=y
> # CONFIG_I2C_MPC8260 is not set
> # CONFIG_I2C_NFORCE2 is not set
> # CONFIG_I2C_PARPORT_LIGHT is not set
> diff --git a/arch/ppc/configs/mpc834x_sys_defconfig
> b/arch/ppc/configs/mpc834x_sys_defconfig
> index d90c8a7..cd568d2 100644
> --- a/arch/ppc/configs/mpc834x_sys_defconfig
> +++ b/arch/ppc/configs/mpc834x_sys_defconfig
> @@ -562,7 +562,7 @@ CONFIG_I2C_CHARDEV=y
> # CONFIG_I2C_I801 is not set
> # CONFIG_I2C_I810 is not set
> # CONFIG_I2C_PIIX4 is not set
> -CONFIG_I2C_MPC=y
> +CONFIG_I2C_MPC_PPC=y
> # CONFIG_I2C_NFORCE2 is not set
> # CONFIG_I2C_PARPORT_LIGHT is not set
> # CONFIG_I2C_PROSAVAGE is not set
> diff --git a/arch/ppc/configs/mpc8540_ads_defconfig
> b/arch/ppc/configs/mpc8540_ads_defconfig
> index bf676eb..5819835 100644
> --- a/arch/ppc/configs/mpc8540_ads_defconfig
> +++ b/arch/ppc/configs/mpc8540_ads_defconfig
> @@ -452,7 +452,7 @@ CONFIG_I2C_CHARDEV=y
> # CONFIG_I2C_AMD8111 is not set
> # CONFIG_I2C_I801 is not set
> # CONFIG_I2C_I810 is not set
> -CONFIG_I2C_MPC=y
> +CONFIG_I2C_MPC_PPC=y
> # CONFIG_I2C_NFORCE2 is not set
> # CONFIG_I2C_PARPORT_LIGHT is not set
> # CONFIG_I2C_PIIX4 is not set
> diff --git a/arch/ppc/configs/mpc8548_cds_defconfig
> b/arch/ppc/configs/mpc8548_cds_defconfig
> index f36fc5d..e5b5071 100644
> --- a/arch/ppc/configs/mpc8548_cds_defconfig
> +++ b/arch/ppc/configs/mpc8548_cds_defconfig
> @@ -413,7 +413,7 @@ CONFIG_I2C_CHARDEV=y
> #
> # I2C Hardware Bus support
> #
> -CONFIG_I2C_MPC=y
> +CONFIG_I2C_MPC_PPC=y
> # CONFIG_I2C_PARPORT_LIGHT is not set
> # CONFIG_I2C_PCA_ISA is not set
>
> diff --git a/arch/ppc/configs/mpc8555_cds_defconfig
> b/arch/ppc/configs/mpc8555_cds_defconfig
> index 4f1e320..08dbab0 100644
> --- a/arch/ppc/configs/mpc8555_cds_defconfig
> +++ b/arch/ppc/configs/mpc8555_cds_defconfig
> @@ -518,7 +518,7 @@ CONFIG_I2C_CHARDEV=y
> # CONFIG_I2C_I801 is not set
> # CONFIG_I2C_I810 is not set
> # CONFIG_I2C_PIIX4 is not set
> -CONFIG_I2C_MPC=y
> +CONFIG_I2C_MPC_PPC=y
> # CONFIG_I2C_NFORCE2 is not set
> # CONFIG_I2C_PARPORT_LIGHT is not set
> # CONFIG_I2C_PROSAVAGE is not set
> diff --git a/arch/ppc/configs/mpc8560_ads_defconfig
> b/arch/ppc/configs/mpc8560_ads_defconfig
> index f12d48f..0e0080b 100644
> --- a/arch/ppc/configs/mpc8560_ads_defconfig
> +++ b/arch/ppc/configs/mpc8560_ads_defconfig
> @@ -489,7 +489,7 @@ CONFIG_I2C_CHARDEV=y
> # CONFIG_I2C_I801 is not set
> # CONFIG_I2C_I810 is not set
> # CONFIG_I2C_PIIX4 is not set
> -CONFIG_I2C_MPC=y
> +CONFIG_I2C_MPC_PPC=y
> # CONFIG_I2C_NFORCE2 is not set
> # CONFIG_I2C_PARPORT_LIGHT is not set
> # CONFIG_I2C_PROSAVAGE is not set
> diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
> index c466c6c..bdde307 100644
> --- a/drivers/i2c/busses/Kconfig
> +++ b/drivers/i2c/busses/Kconfig
> @@ -301,7 +301,7 @@ config I2C_POWERMAC
>
> config I2C_MPC
> tristate "MPC107/824x/85xx/52xx/86xx"
> - depends on PPC32
> + depends on PPC32 && PPC_MERGE
> help
> If you say yes to this option, support will be included for the
> built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
> @@ -311,6 +311,20 @@ config I2C_MPC
> This driver can also be built as a module. If so, the module
> will be called i2c-mpc.
>
> +config I2C_MPC_PPC
> + tristate "MPC107/824x/85xx/52xx/86xx"
> + depends on PPC32 && !PPC_MERGE
> + help
> + If you say yes to this option, support will be included for the
> + built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
> + MPC85xx/MPC8641 family processors. The driver may also work on 52xx
> + family processors, though interrupts are known not to work.
> +
> + This version of the driver is scheduled for deletion with the PPC
> architecture.
> +
> + This driver can also be built as a module. If so, the module
> + will be called i2c-mpc.
> +
> config I2C_NFORCE2
> tristate "Nvidia nForce2, nForce3 and nForce4"
> depends on PCI
> diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
> index 81d43c2..b7fe095 100644
> --- a/drivers/i2c/busses/Makefile
> +++ b/drivers/i2c/busses/Makefile
> @@ -23,6 +23,7 @@ obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
> obj-$(CONFIG_I2C_IXP4XX) += i2c-ixp4xx.o
> obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
> obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
> +obj-$(CONFIG_I2C_MPC_PPC) += i2c-mpc-ppc.o
> obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
> obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o
> obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o
> diff --git a/drivers/i2c/busses/i2c-mpc-ppc.c b/drivers/i2c/busses/i2c-mpc-ppc.c
> new file mode 100644
> index 0000000..d8de4ac
> --- /dev/null
> +++ b/drivers/i2c/busses/i2c-mpc-ppc.c
> @@ -0,0 +1,418 @@
> +/*
> + * (C) Copyright 2003-2004
> + * Humboldt Solutions Ltd, adrian@humboldt.co.uk.
> +
> + * This is a combined i2c adapter and algorithm driver for the
> + * MPC107/Tsi107 PowerPC northbridge and processors that include
> + * the same I2C unit (8240, 8245, 85xx).
> + *
> + * Release 0.8
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + */
> +
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/sched.h>
> +#include <linux/init.h>
> +#include <linux/platform_device.h>
> +
> +#include <asm/io.h>
> +#include <linux/fsl_devices.h>
> +#include <linux/i2c.h>
> +#include <linux/interrupt.h>
> +#include <linux/delay.h>
> +
> +#define MPC_I2C_ADDR 0x00
> +#define MPC_I2C_FDR 0x04
> +#define MPC_I2C_CR 0x08
> +#define MPC_I2C_SR 0x0c
> +#define MPC_I2C_DR 0x10
> +#define MPC_I2C_DFSRR 0x14
> +#define MPC_I2C_REGION 0x20
> +
> +#define CCR_MEN 0x80
> +#define CCR_MIEN 0x40
> +#define CCR_MSTA 0x20
> +#define CCR_MTX 0x10
> +#define CCR_TXAK 0x08
> +#define CCR_RSTA 0x04
> +
> +#define CSR_MCF 0x80
> +#define CSR_MAAS 0x40
> +#define CSR_MBB 0x20
> +#define CSR_MAL 0x10
> +#define CSR_SRW 0x04
> +#define CSR_MIF 0x02
> +#define CSR_RXAK 0x01
> +
> +struct mpc_i2c {
> + void __iomem *base;
> + u32 interrupt;
> + wait_queue_head_t queue;
> + struct i2c_adapter adap;
> + int irq;
> + u32 flags;
> +};
> +
> +static __inline__ void writeccr(struct mpc_i2c *i2c, u32 x)
> +{
> + writeb(x, i2c->base + MPC_I2C_CR);
> +}
> +
> +static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
> +{
> + struct mpc_i2c *i2c = dev_id;
> + if (readb(i2c->base + MPC_I2C_SR) & CSR_MIF) {
> + /* Read again to allow register to stabilise */
> + i2c->interrupt = readb(i2c->base + MPC_I2C_SR);
> + writeb(0, i2c->base + MPC_I2C_SR);
> + wake_up_interruptible(&i2c->queue);
> + }
> + return IRQ_HANDLED;
> +}
> +
> +/* Sometimes 9th clock pulse isn't generated, and slave doesn't release
> + * the bus, because it wants to send ACK.
> + * Following sequence of enabling/disabling and sending start/stop generates
> + * the pulse, so it's all OK.
> + */
> +static void mpc_i2c_fixup(struct mpc_i2c *i2c)
> +{
> + writeccr(i2c, 0);
> + udelay(30);
> + writeccr(i2c, CCR_MEN);
> + udelay(30);
> + writeccr(i2c, CCR_MSTA | CCR_MTX);
> + udelay(30);
> + writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
> + udelay(30);
> + writeccr(i2c, CCR_MEN);
> + udelay(30);
> +}
> +
> +static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
> +{
> + unsigned long orig_jiffies = jiffies;
> + u32 x;
> + int result = 0;
> +
> + if (i2c->irq == 0)
> + {
> + while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
> + schedule();
> + if (time_after(jiffies, orig_jiffies + timeout)) {
> + pr_debug("I2C: timeout\n");
> + writeccr(i2c, 0);
> + result = -EIO;
> + break;
> + }
> + }
> + x = readb(i2c->base + MPC_I2C_SR);
> + writeb(0, i2c->base + MPC_I2C_SR);
> + } else {
> + /* Interrupt mode */
> + result = wait_event_interruptible_timeout(i2c->queue,
> + (i2c->interrupt & CSR_MIF), timeout * HZ);
> +
> + if (unlikely(result < 0)) {
> + pr_debug("I2C: wait interrupted\n");
> + writeccr(i2c, 0);
> + } else if (unlikely(!(i2c->interrupt & CSR_MIF))) {
> + pr_debug("I2C: wait timeout\n");
> + writeccr(i2c, 0);
> + result = -ETIMEDOUT;
> + }
> +
> + x = i2c->interrupt;
> + i2c->interrupt = 0;
> + }
> +
> + if (result < 0)
> + return result;
> +
> + if (!(x & CSR_MCF)) {
> + pr_debug("I2C: unfinished\n");
> + return -EIO;
> + }
> +
> + if (x & CSR_MAL) {
> + pr_debug("I2C: MAL\n");
> + return -EIO;
> + }
> +
> + if (writing && (x & CSR_RXAK)) {
> + pr_debug("I2C: No RXAK\n");
> + /* generate stop */
> + writeccr(i2c, CCR_MEN);
> + return -EIO;
> + }
> + return 0;
> +}
> +
> +static void mpc_i2c_setclock(struct mpc_i2c *i2c)
> +{
> + /* Set clock and filters */
> + if (i2c->flags & FSL_I2C_DEV_SEPARATE_DFSRR) {
> + writeb(0x31, i2c->base + MPC_I2C_FDR);
> + writeb(0x10, i2c->base + MPC_I2C_DFSRR);
> + } else if (i2c->flags & FSL_I2C_DEV_CLOCK_5200)
> + writeb(0x3f, i2c->base + MPC_I2C_FDR);
> + else
> + writel(0x1031, i2c->base + MPC_I2C_FDR);
> +}
> +
> +static void mpc_i2c_start(struct mpc_i2c *i2c)
> +{
> + /* Clear arbitration */
> + writeb(0, i2c->base + MPC_I2C_SR);
> + /* Start with MEN */
> + writeccr(i2c, CCR_MEN);
> +}
> +
> +static void mpc_i2c_stop(struct mpc_i2c *i2c)
> +{
> + writeccr(i2c, CCR_MEN);
> +}
> +
> +static int mpc_write(struct mpc_i2c *i2c, int target,
> + const u8 * data, int length, int restart)
> +{
> + int i;
> + unsigned timeout = i2c->adap.timeout;
> + u32 flags = restart ? CCR_RSTA : 0;
> +
> + /* Start with MEN */
> + if (!restart)
> + writeccr(i2c, CCR_MEN);
> + /* Start as master */
> + writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
> + /* Write target byte */
> + writeb((target << 1), i2c->base + MPC_I2C_DR);
> +
> + if (i2c_wait(i2c, timeout, 1) < 0)
> + return -1;
> +
> + for (i = 0; i < length; i++) {
> + /* Write data byte */
> + writeb(data[i], i2c->base + MPC_I2C_DR);
> +
> + if (i2c_wait(i2c, timeout, 1) < 0)
> + return -1;
> + }
> +
> + return 0;
> +}
> +
> +static int mpc_read(struct mpc_i2c *i2c, int target,
> + u8 * data, int length, int restart)
> +{
> + unsigned timeout = i2c->adap.timeout;
> + int i;
> + u32 flags = restart ? CCR_RSTA : 0;
> +
> + /* Start with MEN */
> + if (!restart)
> + writeccr(i2c, CCR_MEN);
> + /* Switch to read - restart */
> + writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
> + /* Write target address byte - this time with the read flag set */
> + writeb((target << 1) | 1, i2c->base + MPC_I2C_DR);
> +
> + if (i2c_wait(i2c, timeout, 1) < 0)
> + return -1;
> +
> + if (length) {
> + if (length == 1)
> + writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
> + else
> + writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA);
> + /* Dummy read */
> + readb(i2c->base + MPC_I2C_DR);
> + }
> +
> + for (i = 0; i < length; i++) {
> + if (i2c_wait(i2c, timeout, 0) < 0)
> + return -1;
> +
> + /* Generate txack on next to last byte */
> + if (i == length - 2)
> + writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
> + /* Generate stop on last byte */
> + if (i == length - 1)
> + writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK);
> + data[i] = readb(i2c->base + MPC_I2C_DR);
> + }
> +
> + return length;
> +}
> +
> +static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
> +{
> + struct i2c_msg *pmsg;
> + int i;
> + int ret = 0;
> + unsigned long orig_jiffies = jiffies;
> + struct mpc_i2c *i2c = i2c_get_adapdata(adap);
> +
> + mpc_i2c_start(i2c);
> +
> + /* Allow bus up to 1s to become not busy */
> + while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
> + if (signal_pending(current)) {
> + pr_debug("I2C: Interrupted\n");
> + writeccr(i2c, 0);
> + return -EINTR;
> + }
> + if (time_after(jiffies, orig_jiffies + HZ)) {
> + pr_debug("I2C: timeout\n");
> + if (readb(i2c->base + MPC_I2C_SR) ==
> + (CSR_MCF | CSR_MBB | CSR_RXAK))
> + mpc_i2c_fixup(i2c);
> + return -EIO;
> + }
> + schedule();
> + }
> +
> + for (i = 0; ret >= 0 && i < num; i++) {
> + pmsg = &msgs[i];
> + pr_debug("Doing %s %d bytes to 0x%02x - %d of %d messages\n",
> + pmsg->flags & I2C_M_RD ? "read" : "write",
> + pmsg->len, pmsg->addr, i + 1, num);
> + if (pmsg->flags & I2C_M_RD)
> + ret =
> + mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
> + else
> + ret =
> + mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
> + }
> + mpc_i2c_stop(i2c);
> + return (ret < 0) ? ret : num;
> +}
> +
> +static u32 mpc_functionality(struct i2c_adapter *adap)
> +{
> + return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
> +}
> +
> +static const struct i2c_algorithm mpc_algo = {
> + .master_xfer = mpc_xfer,
> + .functionality = mpc_functionality,
> +};
> +
> +static struct i2c_adapter mpc_ops = {
> + .owner = THIS_MODULE,
> + .name = "MPC adapter",
> + .id = I2C_HW_MPC107,
> + .algo = &mpc_algo,
> + .class = I2C_CLASS_HWMON,
> + .timeout = 1,
> + .retries = 1
> +};
> +
> +static int fsl_i2c_probe(struct platform_device *pdev)
> +{
> + int result = 0;
> + struct mpc_i2c *i2c;
> + struct fsl_i2c_platform_data *pdata;
> + struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +
> + pdata = (struct fsl_i2c_platform_data *) pdev->dev.platform_data;
> +
> + if (!(i2c = kzalloc(sizeof(*i2c), GFP_KERNEL))) {
> + return -ENOMEM;
> + }
> +
> + i2c->irq = platform_get_irq(pdev, 0);
> + if (i2c->irq < 0) {
> + result = -ENXIO;
> + goto fail_get_irq;
> + }
> + i2c->flags = pdata->device_flags;
> + init_waitqueue_head(&i2c->queue);
> +
> + i2c->base = ioremap((phys_addr_t)r->start, MPC_I2C_REGION);
> +
> + if (!i2c->base) {
> + printk(KERN_ERR "i2c-mpc - failed to map controller\n");
> + result = -ENOMEM;
> + goto fail_map;
> + }
> +
> + if (i2c->irq != 0)
> + if ((result = request_irq(i2c->irq, mpc_i2c_isr,
> + IRQF_SHARED, "i2c-mpc", i2c)) < 0) {
> + printk(KERN_ERR
> + "i2c-mpc - failed to attach interrupt\n");
> + goto fail_irq;
> + }
> +
> + mpc_i2c_setclock(i2c);
> + platform_set_drvdata(pdev, i2c);
> +
> + i2c->adap = mpc_ops;
> + i2c->adap.nr = pdev->id;
> + i2c_set_adapdata(&i2c->adap, i2c);
> + i2c->adap.dev.parent = &pdev->dev;
> + if ((result = i2c_add_numbered_adapter(&i2c->adap)) < 0) {
> + printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
> + goto fail_add;
> + }
> +
> + return result;
> +
> + fail_add:
> + if (i2c->irq != 0)
> + free_irq(i2c->irq, i2c);
> + fail_irq:
> + iounmap(i2c->base);
> + fail_map:
> + fail_get_irq:
> + kfree(i2c);
> + return result;
> +};
> +
> +static int fsl_i2c_remove(struct platform_device *pdev)
> +{
> + struct mpc_i2c *i2c = platform_get_drvdata(pdev);
> +
> + i2c_del_adapter(&i2c->adap);
> + platform_set_drvdata(pdev, NULL);
> +
> + if (i2c->irq != 0)
> + free_irq(i2c->irq, i2c);
> +
> + iounmap(i2c->base);
> + kfree(i2c);
> + return 0;
> +};
> +
> +/* Structure for a device driver */
> +static struct platform_driver fsl_i2c_driver = {
> + .probe = fsl_i2c_probe,
> + .remove = fsl_i2c_remove,
> + .driver = {
> + .owner = THIS_MODULE,
> + .name = "fsl-i2c",
> + },
> +};
> +
> +static int __init fsl_i2c_init(void)
> +{
> + return platform_driver_register(&fsl_i2c_driver);
> +}
> +
> +static void __exit fsl_i2c_exit(void)
> +{
> + platform_driver_unregister(&fsl_i2c_driver);
> +}
> +
> +module_init(fsl_i2c_init);
> +module_exit(fsl_i2c_exit);
> +
> +MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
> +MODULE_DESCRIPTION
> + ("I2C-Bus adapter for MPC107 bridge and MPC824x/85xx/52xx processors");
> +MODULE_LICENSE("GPL");
>
> --
> Jon Smirl
> jonsmirl@gmail.com
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH] Addition to the i2c series, copy the ppc mpc-i2c driver before changing it on powerpc
From: Jon Smirl @ 2007-12-10 22:48 UTC (permalink / raw)
To: Tony Breeds; +Cc: PowerPC dev list
In-Reply-To: <20071210224224.GF24243@bakeyournoodle.com>
Same patch minus the Makefile change. It was part of testing the builds.
Copy mpc-i2c to preserve support for ARCH=ppc and allow changes on ARCH=powerpc
Temporarily copy the mpc-i2c driver to continue support for the ppc
architecture until it is removed in mid-2008. This file should be
deleted as part of ppc's final removal.
Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
---
arch/ppc/configs/TQM8540_defconfig | 2
arch/ppc/configs/TQM8541_defconfig | 2
arch/ppc/configs/TQM8555_defconfig | 2
arch/ppc/configs/TQM8560_defconfig | 2
arch/ppc/configs/mpc834x_sys_defconfig | 2
arch/ppc/configs/mpc8540_ads_defconfig | 2
arch/ppc/configs/mpc8548_cds_defconfig | 2
arch/ppc/configs/mpc8555_cds_defconfig | 2
arch/ppc/configs/mpc8560_ads_defconfig | 2
drivers/i2c/busses/Kconfig | 16 +
drivers/i2c/busses/Makefile | 1
drivers/i2c/busses/i2c-mpc-ppc.c | 418 ++++++++++++++++++++++++++++++++
12 files changed, 443 insertions(+), 10 deletions(-)
create mode 100644 drivers/i2c/busses/i2c-mpc-ppc.c
diff --git a/arch/ppc/configs/TQM8540_defconfig
b/arch/ppc/configs/TQM8540_defconfig
index f33f0e7..7098ed0 100644
--- a/arch/ppc/configs/TQM8540_defconfig
+++ b/arch/ppc/configs/TQM8540_defconfig
@@ -684,7 +684,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PROSAVAGE is not set
diff --git a/arch/ppc/configs/TQM8541_defconfig
b/arch/ppc/configs/TQM8541_defconfig
index e00cd62..2137d01 100644
--- a/arch/ppc/configs/TQM8541_defconfig
+++ b/arch/ppc/configs/TQM8541_defconfig
@@ -687,7 +687,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_MPC8260 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
diff --git a/arch/ppc/configs/TQM8555_defconfig
b/arch/ppc/configs/TQM8555_defconfig
index 43a0d9d..f2317b6 100644
--- a/arch/ppc/configs/TQM8555_defconfig
+++ b/arch/ppc/configs/TQM8555_defconfig
@@ -687,7 +687,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PROSAVAGE is not set
diff --git a/arch/ppc/configs/TQM8560_defconfig
b/arch/ppc/configs/TQM8560_defconfig
index a814d17..6c19121 100644
--- a/arch/ppc/configs/TQM8560_defconfig
+++ b/arch/ppc/configs/TQM8560_defconfig
@@ -694,7 +694,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_MPC8260 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
diff --git a/arch/ppc/configs/mpc834x_sys_defconfig
b/arch/ppc/configs/mpc834x_sys_defconfig
index d90c8a7..cd568d2 100644
--- a/arch/ppc/configs/mpc834x_sys_defconfig
+++ b/arch/ppc/configs/mpc834x_sys_defconfig
@@ -562,7 +562,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PROSAVAGE is not set
diff --git a/arch/ppc/configs/mpc8540_ads_defconfig
b/arch/ppc/configs/mpc8540_ads_defconfig
index bf676eb..5819835 100644
--- a/arch/ppc/configs/mpc8540_ads_defconfig
+++ b/arch/ppc/configs/mpc8540_ads_defconfig
@@ -452,7 +452,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PIIX4 is not set
diff --git a/arch/ppc/configs/mpc8548_cds_defconfig
b/arch/ppc/configs/mpc8548_cds_defconfig
index f36fc5d..e5b5071 100644
--- a/arch/ppc/configs/mpc8548_cds_defconfig
+++ b/arch/ppc/configs/mpc8548_cds_defconfig
@@ -413,7 +413,7 @@ CONFIG_I2C_CHARDEV=y
#
# I2C Hardware Bus support
#
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PCA_ISA is not set
diff --git a/arch/ppc/configs/mpc8555_cds_defconfig
b/arch/ppc/configs/mpc8555_cds_defconfig
index 4f1e320..08dbab0 100644
--- a/arch/ppc/configs/mpc8555_cds_defconfig
+++ b/arch/ppc/configs/mpc8555_cds_defconfig
@@ -518,7 +518,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PROSAVAGE is not set
diff --git a/arch/ppc/configs/mpc8560_ads_defconfig
b/arch/ppc/configs/mpc8560_ads_defconfig
index f12d48f..0e0080b 100644
--- a/arch/ppc/configs/mpc8560_ads_defconfig
+++ b/arch/ppc/configs/mpc8560_ads_defconfig
@@ -489,7 +489,7 @@ CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_I810 is not set
# CONFIG_I2C_PIIX4 is not set
-CONFIG_I2C_MPC=y
+CONFIG_I2C_MPC_PPC=y
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_PROSAVAGE is not set
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index c466c6c..bdde307 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -301,7 +301,7 @@ config I2C_POWERMAC
config I2C_MPC
tristate "MPC107/824x/85xx/52xx/86xx"
- depends on PPC32
+ depends on PPC32 && PPC_MERGE
help
If you say yes to this option, support will be included for the
built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
@@ -311,6 +311,20 @@ config I2C_MPC
This driver can also be built as a module. If so, the module
will be called i2c-mpc.
+config I2C_MPC_PPC
+ tristate "MPC107/824x/85xx/52xx/86xx"
+ depends on PPC32 && !PPC_MERGE
+ help
+ If you say yes to this option, support will be included for the
+ built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and
+ MPC85xx/MPC8641 family processors. The driver may also work on 52xx
+ family processors, though interrupts are known not to work.
+
+ This version of the driver is scheduled for deletion with the PPC
architecture.
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-mpc.
+
config I2C_NFORCE2
tristate "Nvidia nForce2, nForce3 and nForce4"
depends on PCI
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 81d43c2..b7fe095 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -23,6 +23,7 @@ obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
obj-$(CONFIG_I2C_IXP4XX) += i2c-ixp4xx.o
obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
obj-$(CONFIG_I2C_MPC) += i2c-mpc.o
+obj-$(CONFIG_I2C_MPC_PPC) += i2c-mpc-ppc.o
obj-$(CONFIG_I2C_MV64XXX) += i2c-mv64xxx.o
obj-$(CONFIG_I2C_NFORCE2) += i2c-nforce2.o
obj-$(CONFIG_I2C_OCORES) += i2c-ocores.o
diff --git a/drivers/i2c/busses/i2c-mpc-ppc.c b/drivers/i2c/busses/i2c-mpc-ppc.c
new file mode 100644
index 0000000..d8de4ac
--- /dev/null
+++ b/drivers/i2c/busses/i2c-mpc-ppc.c
@@ -0,0 +1,418 @@
+/*
+ * (C) Copyright 2003-2004
+ * Humboldt Solutions Ltd, adrian@humboldt.co.uk.
+
+ * This is a combined i2c adapter and algorithm driver for the
+ * MPC107/Tsi107 PowerPC northbridge and processors that include
+ * the same I2C unit (8240, 8245, 85xx).
+ *
+ * Release 0.8
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+
+#include <asm/io.h>
+#include <linux/fsl_devices.h>
+#include <linux/i2c.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+
+#define MPC_I2C_ADDR 0x00
+#define MPC_I2C_FDR 0x04
+#define MPC_I2C_CR 0x08
+#define MPC_I2C_SR 0x0c
+#define MPC_I2C_DR 0x10
+#define MPC_I2C_DFSRR 0x14
+#define MPC_I2C_REGION 0x20
+
+#define CCR_MEN 0x80
+#define CCR_MIEN 0x40
+#define CCR_MSTA 0x20
+#define CCR_MTX 0x10
+#define CCR_TXAK 0x08
+#define CCR_RSTA 0x04
+
+#define CSR_MCF 0x80
+#define CSR_MAAS 0x40
+#define CSR_MBB 0x20
+#define CSR_MAL 0x10
+#define CSR_SRW 0x04
+#define CSR_MIF 0x02
+#define CSR_RXAK 0x01
+
+struct mpc_i2c {
+ void __iomem *base;
+ u32 interrupt;
+ wait_queue_head_t queue;
+ struct i2c_adapter adap;
+ int irq;
+ u32 flags;
+};
+
+static __inline__ void writeccr(struct mpc_i2c *i2c, u32 x)
+{
+ writeb(x, i2c->base + MPC_I2C_CR);
+}
+
+static irqreturn_t mpc_i2c_isr(int irq, void *dev_id)
+{
+ struct mpc_i2c *i2c = dev_id;
+ if (readb(i2c->base + MPC_I2C_SR) & CSR_MIF) {
+ /* Read again to allow register to stabilise */
+ i2c->interrupt = readb(i2c->base + MPC_I2C_SR);
+ writeb(0, i2c->base + MPC_I2C_SR);
+ wake_up_interruptible(&i2c->queue);
+ }
+ return IRQ_HANDLED;
+}
+
+/* Sometimes 9th clock pulse isn't generated, and slave doesn't release
+ * the bus, because it wants to send ACK.
+ * Following sequence of enabling/disabling and sending start/stop generates
+ * the pulse, so it's all OK.
+ */
+static void mpc_i2c_fixup(struct mpc_i2c *i2c)
+{
+ writeccr(i2c, 0);
+ udelay(30);
+ writeccr(i2c, CCR_MEN);
+ udelay(30);
+ writeccr(i2c, CCR_MSTA | CCR_MTX);
+ udelay(30);
+ writeccr(i2c, CCR_MSTA | CCR_MTX | CCR_MEN);
+ udelay(30);
+ writeccr(i2c, CCR_MEN);
+ udelay(30);
+}
+
+static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing)
+{
+ unsigned long orig_jiffies = jiffies;
+ u32 x;
+ int result = 0;
+
+ if (i2c->irq == 0)
+ {
+ while (!(readb(i2c->base + MPC_I2C_SR) & CSR_MIF)) {
+ schedule();
+ if (time_after(jiffies, orig_jiffies + timeout)) {
+ pr_debug("I2C: timeout\n");
+ writeccr(i2c, 0);
+ result = -EIO;
+ break;
+ }
+ }
+ x = readb(i2c->base + MPC_I2C_SR);
+ writeb(0, i2c->base + MPC_I2C_SR);
+ } else {
+ /* Interrupt mode */
+ result = wait_event_interruptible_timeout(i2c->queue,
+ (i2c->interrupt & CSR_MIF), timeout * HZ);
+
+ if (unlikely(result < 0)) {
+ pr_debug("I2C: wait interrupted\n");
+ writeccr(i2c, 0);
+ } else if (unlikely(!(i2c->interrupt & CSR_MIF))) {
+ pr_debug("I2C: wait timeout\n");
+ writeccr(i2c, 0);
+ result = -ETIMEDOUT;
+ }
+
+ x = i2c->interrupt;
+ i2c->interrupt = 0;
+ }
+
+ if (result < 0)
+ return result;
+
+ if (!(x & CSR_MCF)) {
+ pr_debug("I2C: unfinished\n");
+ return -EIO;
+ }
+
+ if (x & CSR_MAL) {
+ pr_debug("I2C: MAL\n");
+ return -EIO;
+ }
+
+ if (writing && (x & CSR_RXAK)) {
+ pr_debug("I2C: No RXAK\n");
+ /* generate stop */
+ writeccr(i2c, CCR_MEN);
+ return -EIO;
+ }
+ return 0;
+}
+
+static void mpc_i2c_setclock(struct mpc_i2c *i2c)
+{
+ /* Set clock and filters */
+ if (i2c->flags & FSL_I2C_DEV_SEPARATE_DFSRR) {
+ writeb(0x31, i2c->base + MPC_I2C_FDR);
+ writeb(0x10, i2c->base + MPC_I2C_DFSRR);
+ } else if (i2c->flags & FSL_I2C_DEV_CLOCK_5200)
+ writeb(0x3f, i2c->base + MPC_I2C_FDR);
+ else
+ writel(0x1031, i2c->base + MPC_I2C_FDR);
+}
+
+static void mpc_i2c_start(struct mpc_i2c *i2c)
+{
+ /* Clear arbitration */
+ writeb(0, i2c->base + MPC_I2C_SR);
+ /* Start with MEN */
+ writeccr(i2c, CCR_MEN);
+}
+
+static void mpc_i2c_stop(struct mpc_i2c *i2c)
+{
+ writeccr(i2c, CCR_MEN);
+}
+
+static int mpc_write(struct mpc_i2c *i2c, int target,
+ const u8 * data, int length, int restart)
+{
+ int i;
+ unsigned timeout = i2c->adap.timeout;
+ u32 flags = restart ? CCR_RSTA : 0;
+
+ /* Start with MEN */
+ if (!restart)
+ writeccr(i2c, CCR_MEN);
+ /* Start as master */
+ writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
+ /* Write target byte */
+ writeb((target << 1), i2c->base + MPC_I2C_DR);
+
+ if (i2c_wait(i2c, timeout, 1) < 0)
+ return -1;
+
+ for (i = 0; i < length; i++) {
+ /* Write data byte */
+ writeb(data[i], i2c->base + MPC_I2C_DR);
+
+ if (i2c_wait(i2c, timeout, 1) < 0)
+ return -1;
+ }
+
+ return 0;
+}
+
+static int mpc_read(struct mpc_i2c *i2c, int target,
+ u8 * data, int length, int restart)
+{
+ unsigned timeout = i2c->adap.timeout;
+ int i;
+ u32 flags = restart ? CCR_RSTA : 0;
+
+ /* Start with MEN */
+ if (!restart)
+ writeccr(i2c, CCR_MEN);
+ /* Switch to read - restart */
+ writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
+ /* Write target address byte - this time with the read flag set */
+ writeb((target << 1) | 1, i2c->base + MPC_I2C_DR);
+
+ if (i2c_wait(i2c, timeout, 1) < 0)
+ return -1;
+
+ if (length) {
+ if (length == 1)
+ writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
+ else
+ writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA);
+ /* Dummy read */
+ readb(i2c->base + MPC_I2C_DR);
+ }
+
+ for (i = 0; i < length; i++) {
+ if (i2c_wait(i2c, timeout, 0) < 0)
+ return -1;
+
+ /* Generate txack on next to last byte */
+ if (i == length - 2)
+ writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
+ /* Generate stop on last byte */
+ if (i == length - 1)
+ writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK);
+ data[i] = readb(i2c->base + MPC_I2C_DR);
+ }
+
+ return length;
+}
+
+static int mpc_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
+{
+ struct i2c_msg *pmsg;
+ int i;
+ int ret = 0;
+ unsigned long orig_jiffies = jiffies;
+ struct mpc_i2c *i2c = i2c_get_adapdata(adap);
+
+ mpc_i2c_start(i2c);
+
+ /* Allow bus up to 1s to become not busy */
+ while (readb(i2c->base + MPC_I2C_SR) & CSR_MBB) {
+ if (signal_pending(current)) {
+ pr_debug("I2C: Interrupted\n");
+ writeccr(i2c, 0);
+ return -EINTR;
+ }
+ if (time_after(jiffies, orig_jiffies + HZ)) {
+ pr_debug("I2C: timeout\n");
+ if (readb(i2c->base + MPC_I2C_SR) ==
+ (CSR_MCF | CSR_MBB | CSR_RXAK))
+ mpc_i2c_fixup(i2c);
+ return -EIO;
+ }
+ schedule();
+ }
+
+ for (i = 0; ret >= 0 && i < num; i++) {
+ pmsg = &msgs[i];
+ pr_debug("Doing %s %d bytes to 0x%02x - %d of %d messages\n",
+ pmsg->flags & I2C_M_RD ? "read" : "write",
+ pmsg->len, pmsg->addr, i + 1, num);
+ if (pmsg->flags & I2C_M_RD)
+ ret =
+ mpc_read(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
+ else
+ ret =
+ mpc_write(i2c, pmsg->addr, pmsg->buf, pmsg->len, i);
+ }
+ mpc_i2c_stop(i2c);
+ return (ret < 0) ? ret : num;
+}
+
+static u32 mpc_functionality(struct i2c_adapter *adap)
+{
+ return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
+}
+
+static const struct i2c_algorithm mpc_algo = {
+ .master_xfer = mpc_xfer,
+ .functionality = mpc_functionality,
+};
+
+static struct i2c_adapter mpc_ops = {
+ .owner = THIS_MODULE,
+ .name = "MPC adapter",
+ .id = I2C_HW_MPC107,
+ .algo = &mpc_algo,
+ .class = I2C_CLASS_HWMON,
+ .timeout = 1,
+ .retries = 1
+};
+
+static int fsl_i2c_probe(struct platform_device *pdev)
+{
+ int result = 0;
+ struct mpc_i2c *i2c;
+ struct fsl_i2c_platform_data *pdata;
+ struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+ pdata = (struct fsl_i2c_platform_data *) pdev->dev.platform_data;
+
+ if (!(i2c = kzalloc(sizeof(*i2c), GFP_KERNEL))) {
+ return -ENOMEM;
+ }
+
+ i2c->irq = platform_get_irq(pdev, 0);
+ if (i2c->irq < 0) {
+ result = -ENXIO;
+ goto fail_get_irq;
+ }
+ i2c->flags = pdata->device_flags;
+ init_waitqueue_head(&i2c->queue);
+
+ i2c->base = ioremap((phys_addr_t)r->start, MPC_I2C_REGION);
+
+ if (!i2c->base) {
+ printk(KERN_ERR "i2c-mpc - failed to map controller\n");
+ result = -ENOMEM;
+ goto fail_map;
+ }
+
+ if (i2c->irq != 0)
+ if ((result = request_irq(i2c->irq, mpc_i2c_isr,
+ IRQF_SHARED, "i2c-mpc", i2c)) < 0) {
+ printk(KERN_ERR
+ "i2c-mpc - failed to attach interrupt\n");
+ goto fail_irq;
+ }
+
+ mpc_i2c_setclock(i2c);
+ platform_set_drvdata(pdev, i2c);
+
+ i2c->adap = mpc_ops;
+ i2c->adap.nr = pdev->id;
+ i2c_set_adapdata(&i2c->adap, i2c);
+ i2c->adap.dev.parent = &pdev->dev;
+ if ((result = i2c_add_numbered_adapter(&i2c->adap)) < 0) {
+ printk(KERN_ERR "i2c-mpc - failed to add adapter\n");
+ goto fail_add;
+ }
+
+ return result;
+
+ fail_add:
+ if (i2c->irq != 0)
+ free_irq(i2c->irq, i2c);
+ fail_irq:
+ iounmap(i2c->base);
+ fail_map:
+ fail_get_irq:
+ kfree(i2c);
+ return result;
+};
+
+static int fsl_i2c_remove(struct platform_device *pdev)
+{
+ struct mpc_i2c *i2c = platform_get_drvdata(pdev);
+
+ i2c_del_adapter(&i2c->adap);
+ platform_set_drvdata(pdev, NULL);
+
+ if (i2c->irq != 0)
+ free_irq(i2c->irq, i2c);
+
+ iounmap(i2c->base);
+ kfree(i2c);
+ return 0;
+};
+
+/* Structure for a device driver */
+static struct platform_driver fsl_i2c_driver = {
+ .probe = fsl_i2c_probe,
+ .remove = fsl_i2c_remove,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "fsl-i2c",
+ },
+};
+
+static int __init fsl_i2c_init(void)
+{
+ return platform_driver_register(&fsl_i2c_driver);
+}
+
+static void __exit fsl_i2c_exit(void)
+{
+ platform_driver_unregister(&fsl_i2c_driver);
+}
+
+module_init(fsl_i2c_init);
+module_exit(fsl_i2c_exit);
+
+MODULE_AUTHOR("Adrian Cox <adrian@humboldt.co.uk>");
+MODULE_DESCRIPTION
+ ("I2C-Bus adapter for MPC107 bridge and MPC824x/85xx/52xx processors");
+MODULE_LICENSE("GPL");
--
Jon Smirl
jonsmirl@gmail.com
^ permalink raw reply related
* Re: [PATCH] Addition to the i2c series, copy the ppc mpc-i2c driver before changing it on powerpc
From: Jon Smirl @ 2007-12-10 22:54 UTC (permalink / raw)
To: Grant Likely; +Cc: PowerPC dev list
In-Reply-To: <fa686aa40712101444l448657c5jb6117e7a60715651@mail.gmail.com>
On 12/10/07, Grant Likely <grant.likely@secretlab.ca> wrote:
> On 12/10/07, Jon Smirl <jonsmirl@gmail.com> wrote:
> > Copy mpc-i2c to preserve support for ARCH=ppc and allow changes on ARCH=powerpc
> >
> > Temporarily copy the mpc-i2c driver to continue support for the ppc
> > architecture until it is removed in mid-2008. This file should be
> > deleted as part of ppc's final removal.
> >
> > Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
>
> For the record; I'm not fond of this approach. Supporting both bus
> bindings in the single driver is simple and results in less code churn
> when arch/ppc is removed, and encourages separation between the driver
> proper and the bus bindings which is just a good idea for all drivers
> in general.
But it also triggers a testing burden on a bunch of hardware that I
don't own. By copying off the known working ppc driver the testing
burden is avoided.
A subject for later discussion is whether platform bus should even
exist when of_platform_bus is in use. I have removed platform_bus for
the mpc5200 in my local builds. Removing platform bus exposed a bunch
of junk from other platofrms that had inadvertently accumulated into
the mpc5200 build.
--
Jon Smirl
jonsmirl@gmail.com
^ permalink raw reply
* Re: [PATCH RFC 4/7] [GPIO] Let drivers link if they support GPIO API as an addition
From: David Brownell @ 2007-12-10 22:55 UTC (permalink / raw)
To: linuxppc-dev, avorontsov
In-Reply-To: <20071210204906.GD32278@localhost.localdomain>
> I'm interested in your opinion about that patch. You're also Cc'ed
> to patch that using that feature.
>
> I know, currently that patch will conflict with GPIOLIB patches in -mm,
> so this is only RFC.
The point of CONFIG_GENERIC_GPIO is to be *the* conditional used to
tell whether that programming interface is available ... starting
from "#include <asm/gpio.h>", and including all gpio_*() calls.
So my first reaction is to not like this patch. It changes semantics
in an incompatible way. And AFAICT, needlessly so.
What other options did consider? Like, why not #ifdef the GPIO parts
of that NAND driver, or have the whole driver depend on GENERIC_GPIO?
- Dave
^ permalink raw reply
* Re: [PATCH] Fake NUMA emulation for PowerPC (Take 2)
From: Olof Johansson @ 2007-12-10 23:07 UTC (permalink / raw)
To: Balbir Singh; +Cc: linuxppc-dev, LKML
In-Reply-To: <20071207223714.11448.91386.sendpatchset@balbir-laptop>
On Sat, Dec 08, 2007 at 04:07:14AM +0530, Balbir Singh wrote:
> Signed-off-by: Balbir Singh <balbir@linux.vnet.ibm.com>
Looks good to me. Sure, it could be fleshed out to something more
generic and in common code, but this is small and simple and doesn't
bloat the kernel much as it stands, and it has value for debugging.
Acked-by: Olof Johansson <olof@lixom.net>
^ permalink raw reply
* Re: [PATCH RFC 7/7] [POWERPC] MPC8360E-RDK: add support for NAND on UPM
From: David Gibson @ 2007-12-10 23:03 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev
In-Reply-To: <20071210204951.GG32278@localhost.localdomain>
On Mon, Dec 10, 2007 at 11:49:51PM +0300, Anton Vorontsov wrote:
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> ---
> arch/powerpc/boot/dts/mpc836x_rdk.dts | 24 +++++++++++++++++++++++-
> arch/powerpc/platforms/83xx/Kconfig | 2 ++
> arch/powerpc/platforms/83xx/mpc836x_rdk.c | 1 +
> 3 files changed, 26 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
> index a1b2da6..f57ba53 100644
> --- a/arch/powerpc/boot/dts/mpc836x_rdk.dts
> +++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
> @@ -115,7 +115,7 @@
> device_type = "ipic";
> };
>
> - par_io@1400 {
> + qe_pio: par_io@1400 {
> reg = <0x1400 0x100>;
> num-ports = <7>;
> };
> @@ -229,4 +229,26 @@
> interrupt-parent = <&ipic>;
> };
> };
> +
> + localbus@e0005000 {
> + #address-cells = <2>;
> + #size-cells = <1>;
> + compatible = "fsl,mpc8360erdk-localbus",
> + "fsl,mpc8360e-localbus",
> + "fsl,pq2pro-localbus";
> + reg = <0xe0005000 0xd8>;
> + ranges = <1 0 0x60000000 1>;
The bridge translates a range one byte wide? I don't think so...
> +
> + nand-flash@1,0 {
> + compatible = "STMicro,NAND512W3A2BN6E", "fsl,upm-nand";
> + reg = <1 0 1>;
The device has a register window *one byte* wide? That seems
improbable...
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH RFC 0/7] "NAND on UPM" and related patches
From: David Gibson @ 2007-12-10 23:04 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev
In-Reply-To: <20071210204705.GA31263@localhost.localdomain>
On Mon, Dec 10, 2007 at 11:47:05PM +0300, Anton Vorontsov wrote:
> Hi all,
>
> Here are patches to support NAND on UPM. That driver is generic for
> all processors with FSL UPMs. And because of that, few more patches are
> needed -- GPIO API and generic FSL UPM functions.
>
> This is early RFC, all patches are in single thread, so everyone could
> make up overall picture of what is going on. I'll split the thread by
> topics after that RFC.
>
> Ok, the patches and what they are for:
>
> 1,2,3,4. GPIO API:
> ------------------
> Usually NAND chips exports RNB (Ready-Not-Busy) pin, so drivers
> could read it and get a hint when chip is ready.
>
> Often, WP (write protect) pin is also connected to GPIO. So, GPIO API
> is mandatory for generic drivers.
>
> OF device tree GPIOs bindings are similar to IRQs:
>
> node {
> gpios = <bank pin bank pin bank pin>;
> gpio-parent = <&par_io_controller>;
> };
>
> "bank pin" scheme is controller specific, so controllers that want
> to implement flat mappings or any other could do so.
It might be safest to do as is done for interrupts, and not define the
internal format at all. The gpio within the gpio controller would be
defined by a gpio-descriptor whose format is determined by the
controller. You would need to add a #gpio-cells property in this
case, so you can at least determine the size of the descriptors
associated with a particular gpio controller.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH 2/3] Use embedded libfdt in the bootwrapper
From: David Gibson @ 2007-12-10 23:10 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <20071210173217.GB4497@loki.buserror.net>
On Mon, Dec 10, 2007 at 11:32:17AM -0600, Scott Wood wrote:
> On Mon, Dec 10, 2007 at 02:28:39PM +1100, David Gibson wrote:
> > +#define check_err(err) \
> > + ({ \
> > + if (BAD_ERROR(err) || ((err < 0) && DEBUG)) \
> > + printf("%s():%d %s\n\r", __FUNCTION__, __LINE__, \
> > + fdt_strerror(err)); \
> > + if (BAD_ERROR(err)) \
> > + exit(); \
> > + (err < 0) ? -1 : 0; \
> > + })
> > +
> > +#define offset_devp(off) \
> > + ({ \
> > + int offset = (off); \
> > + check_err(offset) ? NULL : (void *)(offset+1); \
> > + })
> > +
> > +#define devp_offset(devp) (((int)(devp))-1)
>
> How does using offsets as devps work if a devp was previously acquired to a
> node that has to be moved due to a change later made in an earlier part of
> the tree?
It doesn't; don't do that. I just don't think truly persistent
phandles are worth the code complexity to implement them. Especially
since their use more-or-less completely precludes libfdt's "stateless"
approach, which has significant other advantages.
To reduce the confusion over this, the libfdt native interface always
refers to the offsets explicitly as offsets. For the bootwrapper
abstraction layer, unfortunately I'm stuck with the "devp" terminology
for the time being.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH RFC 4/7] [GPIO] Let drivers link if they support GPIO API as an addition
From: Anton Vorontsov @ 2007-12-10 23:04 UTC (permalink / raw)
To: David Brownell; +Cc: linuxppc-dev
In-Reply-To: <20071210225525.2F6C6266154@adsl-69-226-248-13.dsl.pltn13.pacbell.net>
On Mon, Dec 10, 2007 at 02:55:24PM -0800, David Brownell wrote:
> > I'm interested in your opinion about that patch. You're also Cc'ed
> > to patch that using that feature.
> >
> > I know, currently that patch will conflict with GPIOLIB patches in -mm,
> > so this is only RFC.
>
> The point of CONFIG_GENERIC_GPIO is to be *the* conditional used to
> tell whether that programming interface is available ... starting
> from "#include <asm/gpio.h>", and including all gpio_*() calls.
>
> So my first reaction is to not like this patch. It changes semantics
> in an incompatible way. And AFAICT, needlessly so.
Why incompatible? gpio-aware drivers will get -ENOSYS on gpio_request,
thus they will not do anything wrong. GPIO-only drivers could still
depend on GENERIC_GPIO, and their behaviour will not change.
> What other options did consider? Like, why not #ifdef the GPIO parts
> of that NAND driver,
Hehe, it's used to avoid #ifdef hell indeed. ;-) And no-op wrappers
like that I purposed is widely used to avoid #ifdefs. They will just
optimize away.
> or have the whole driver depend on GENERIC_GPIO?
Well, this is an option, and I was considering this. Further more,
I implemented gpio api for all platforms which currently using fsl
upm nand, so in theory I can add "depends on GENERIC_GPIO".
But the thing is: some drivers don't actually *require* gpios, they
can use it, but at the same time they might live without it.
As for fsl upm nand (the user of that change), it can poll status
from the nand chip instead of looking for RNB gpio. So, strict
depending on GENERIC_GPIO looks weird in that case.
Thanks,
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH 2/3] Use embedded libfdt in the bootwrapper
From: Scott Wood @ 2007-12-10 23:19 UTC (permalink / raw)
To: Scott Wood, linuxppc-dev, Paul Mackerras
In-Reply-To: <20071210231056.GC5495@localhost.localdomain>
David Gibson wrote:
> On Mon, Dec 10, 2007 at 11:32:17AM -0600, Scott Wood wrote:
>> How does using offsets as devps work if a devp was previously
>> acquired to a node that has to be moved due to a change later made
>> in an earlier part of the tree?
>
> It doesn't; don't do that. I just don't think truly persistent
> phandles are worth the code complexity to implement them.
We already have working code to implement them. This is a regression
over flatdevicetree.c, and it (or something else in libfdt) seems to be
breaking the ep8248e wrapper (it didn't make it in to the last window
because of dependency on a netdev patch, but I'll probably send it out
tomorrow).
It breaks the extremely common and useful usage of:
devp = create node;
setprop(devp, "foo", something);
setprop(devp, "bar", something);
> Especially since their use more-or-less completely precludes libfdt's
> "stateless" approach, which has significant other advantages.
It doesn't preclude stateless read-only -- what are the benefits to
stateless read-write that are worth invalidating all node references any
time something changes?
-Scott
^ permalink raw reply
* Re: [PATCH RFC 0/7] "NAND on UPM" and related patches
From: Anton Vorontsov @ 2007-12-10 23:10 UTC (permalink / raw)
To: Anton Vorontsov, linuxppc-dev
In-Reply-To: <20071210230453.GB5495@localhost.localdomain>
On Tue, Dec 11, 2007 at 10:04:53AM +1100, David Gibson wrote:
> On Mon, Dec 10, 2007 at 11:47:05PM +0300, Anton Vorontsov wrote:
> > Hi all,
> >
> > Here are patches to support NAND on UPM. That driver is generic for
> > all processors with FSL UPMs. And because of that, few more patches are
> > needed -- GPIO API and generic FSL UPM functions.
> >
> > This is early RFC, all patches are in single thread, so everyone could
> > make up overall picture of what is going on. I'll split the thread by
> > topics after that RFC.
> >
> > Ok, the patches and what they are for:
> >
> > 1,2,3,4. GPIO API:
> > ------------------
> > Usually NAND chips exports RNB (Ready-Not-Busy) pin, so drivers
> > could read it and get a hint when chip is ready.
> >
> > Often, WP (write protect) pin is also connected to GPIO. So, GPIO API
> > is mandatory for generic drivers.
> >
> > OF device tree GPIOs bindings are similar to IRQs:
> >
> > node {
> > gpios = <bank pin bank pin bank pin>;
> > gpio-parent = <&par_io_controller>;
> > };
> >
> > "bank pin" scheme is controller specific, so controllers that want
> > to implement flat mappings or any other could do so.
>
> It might be safest to do as is done for interrupts, and not define the
> internal format at all.
This is how it is done already. Take a look into second and third patches:
+static int par_io_xlate(struct device_node *np, int index)
+{
+ return __of_parse_gpio_bank_pin(np, index, 32, num_par_io_ports);
+}
+
+static struct of_gpio_chip of_gpio_chip = {
+ .xlate = par_io_xlate,
+};
__of_parse_gpio_bank_pin() is helper function, I just factored
it out, because both QE and CPM2 using same format.
But generally, controllers are encouraged to do their own xlates.
Or am I missing the point?
> The gpio within the gpio controller would be
> defined by a gpio-descriptor whose format is determined by the
> controller. You would need to add a #gpio-cells property in this
> case, so you can at least determine the size of the descriptors
> associated with a particular gpio controller.
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH RFC 7/7] [POWERPC] MPC8360E-RDK: add support for NAND on UPM
From: Anton Vorontsov @ 2007-12-10 23:16 UTC (permalink / raw)
To: Anton Vorontsov, linuxppc-dev
In-Reply-To: <20071210230321.GA5495@localhost.localdomain>
On Tue, Dec 11, 2007 at 10:03:21AM +1100, David Gibson wrote:
> On Mon, Dec 10, 2007 at 11:49:51PM +0300, Anton Vorontsov wrote:
> > Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> > ---
> > arch/powerpc/boot/dts/mpc836x_rdk.dts | 24 +++++++++++++++++++++++-
> > arch/powerpc/platforms/83xx/Kconfig | 2 ++
> > arch/powerpc/platforms/83xx/mpc836x_rdk.c | 1 +
> > 3 files changed, 26 insertions(+), 1 deletions(-)
> >
> > diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
> > index a1b2da6..f57ba53 100644
> > --- a/arch/powerpc/boot/dts/mpc836x_rdk.dts
> > +++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
> > @@ -115,7 +115,7 @@
> > device_type = "ipic";
> > };
> >
> > - par_io@1400 {
> > + qe_pio: par_io@1400 {
> > reg = <0x1400 0x100>;
> > num-ports = <7>;
> > };
> > @@ -229,4 +229,26 @@
> > interrupt-parent = <&ipic>;
> > };
> > };
> > +
> > + localbus@e0005000 {
> > + #address-cells = <2>;
> > + #size-cells = <1>;
> > + compatible = "fsl,mpc8360erdk-localbus",
> > + "fsl,mpc8360e-localbus",
> > + "fsl,pq2pro-localbus";
> > + reg = <0xe0005000 0xd8>;
> > + ranges = <1 0 0x60000000 1>;
>
> The bridge translates a range one byte wide? I don't think so...
Nope, 4KB min, IIRC.
> > +
> > + nand-flash@1,0 {
> > + compatible = "STMicro,NAND512W3A2BN6E", "fsl,upm-nand";
> > + reg = <1 0 1>;
>
> The device has a register window *one byte* wide? That seems
> improbable...
Here, actually yes. The device just 8 bits wide. Reading next 8 bits
will return the same value, obviously. ;-)
But points taken. I should not derivate chip width from the
ranges/reg. This looks unusual indeed, will implement chip-width
property.
Thanks,
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH 2/3] Use embedded libfdt in the bootwrapper
From: Scott Wood @ 2007-12-10 23:27 UTC (permalink / raw)
To: Scott Wood, linuxppc-dev, Paul Mackerras
In-Reply-To: <475DC966.6070301@freescale.com>
Scott Wood wrote:
> David Gibson wrote:
>> On Mon, Dec 10, 2007 at 11:32:17AM -0600, Scott Wood wrote:
>>> How does using offsets as devps work if a devp was previously
>>> acquired to a node that has to be moved due to a change later made
>>> in an earlier part of the tree?
>>
>> It doesn't; don't do that. I just don't think truly persistent
>> phandles are worth the code complexity to implement them.
[snip]
> It breaks the extremely common and useful usage of:
>
> devp = create node;
> setprop(devp, "foo", something);
> setprop(devp, "bar", something);
BTW, there's code in devtree.c with your name on it that does exactly
this. :-)
-Scott
^ permalink raw reply
* Re: [PATCH 2/3] Use embedded libfdt in the bootwrapper
From: David Gibson @ 2007-12-10 23:32 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <475DC966.6070301@freescale.com>
On Mon, Dec 10, 2007 at 05:19:02PM -0600, Scott Wood wrote:
> David Gibson wrote:
> > On Mon, Dec 10, 2007 at 11:32:17AM -0600, Scott Wood wrote:
> >> How does using offsets as devps work if a devp was previously
> >> acquired to a node that has to be moved due to a change later made
> >> in an earlier part of the tree?
> >
> > It doesn't; don't do that. I just don't think truly persistent
> > phandles are worth the code complexity to implement them.
>
> We already have working code to implement them. This is a regression
> over flatdevicetree.c, and it (or something else in libfdt) seems to be
> breaking the ep8248e wrapper (it didn't make it in to the last window
> because of dependency on a netdev patch, but I'll probably send it out
> tomorrow).
>
> It breaks the extremely common and useful usage of:
>
> devp = create node;
> setprop(devp, "foo", something);
> setprop(devp, "bar", something);
Uh.. no, that idiom is fine. setprop() in the node itself, or any
descendent is guaranteed to be safe.
>
> > Especially since their use more-or-less completely precludes libfdt's
> > "stateless" approach, which has significant other advantages.
>
> It doesn't preclude stateless read-only -- what are the benefits to
> stateless read-write that are worth invalidating all node references any
> time something changes?
It precludes stateless read-only too, unless you have an interface
where devps for read-write are different from those for read-only
which would be nasty.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* RE: Xilinx ML310 Linux 2.6 PCI bridge
From: Rick Moleres @ 2007-12-10 23:57 UTC (permalink / raw)
To: Grant Likely, Jean-Samuel Chenard; +Cc: linuxppc-embedded
In-Reply-To: <fa686aa40712082218k7e520e45q1266ecb4692b7dbb@mail.gmail.com>
Grant,
Can you give me more details on why you say the opb_pci bridge is badly
broken? I know there have been issues with it in the past, but I'm not
aware of major outages (perhaps I'm just not in the loop).
> However, word of warning. The Xilinx PCI bridge is badly broken.
> Xilinx is not supporting the PCI core and it is missing the ability to
> do certain types of transfers. Last I heard, Xilinx has no plans to
> fix their PCI core either.
The opb_pci and plb_pci (plbv34) bridges have transitioned to the
plbv36_pci bridge in EDK 9.2 and later. This bridge is fully supported
and has been tested under MontaVista's 2.6.10 kernel. I believe only
critical issues will be fixed in the opb/plbv34.
Thanks,
Rick
^ permalink raw reply
* [PATCH 02/19] [POWERPC] consolidate pci_controller
From: Stephen Rothwell @ 2007-12-11 0:00 UTC (permalink / raw)
To: ppc-dev
In-Reply-To: <20071206180608.de14e9b1.sfr@canb.auug.org.au>
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
include/asm-powerpc/pci-bridge.h | 65 +++++++++++++-------------------------
1 files changed, 22 insertions(+), 43 deletions(-)
diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h
index e021314..f67d262 100644
--- a/include/asm-powerpc/pci-bridge.h
+++ b/include/asm-powerpc/pci-bridge.h
@@ -11,33 +11,44 @@
#include <linux/list.h>
#include <linux/ioport.h>
-#ifndef CONFIG_PPC64
/*
* Structure of a PCI controller (host bridge)
*/
struct pci_controller {
struct pci_bus *bus;
char is_dynamic;
+#ifdef CONFIG_PPC64
+ int node;
+#endif
void *arch_data;
struct list_head list_node;
struct device *parent;
int first_busno;
int last_busno;
+#ifndef CONFIG_PPC64
int self_busno;
+#endif
void __iomem *io_base_virt;
+#ifdef CONFIG_PPC64
+ void *io_base_alloc;
+#endif
resource_size_t io_base_phys;
/* Some machines (PReP) have a non 1:1 mapping of
* the PCI memory space in the CPU bus space
*/
resource_size_t pci_mem_offset;
+#ifdef CONFIG_PPC64
+ unsigned long pci_io_size;
+#endif
struct pci_ops *ops;
volatile unsigned int __iomem *cfg_addr;
volatile void __iomem *cfg_data;
+#ifndef CONFIG_PPC64
/*
* Used for variants of PCI indirect handling and possible quirks:
* SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
@@ -58,15 +69,24 @@ struct pci_controller {
#define PPC_INDIRECT_TYPE_NO_PCIE_LINK 0x00000008
#define PPC_INDIRECT_TYPE_BIG_ENDIAN 0x00000010
u32 indirect_type;
-
+#endif /* !CONFIG_PPC64 */
/* Currently, we limit ourselves to 1 IO range and 3 mem
* ranges since the common pci_bus structure can't handle more
*/
struct resource io_resource;
struct resource mem_resources[3];
int global_number; /* PCI domain number */
+#ifdef CONFIG_PPC64
+ unsigned long buid;
+ unsigned long dma_window_base_cur;
+ unsigned long dma_window_size;
+
+ void *private_data;
+#endif /* CONFIG_PPC64 */
};
+#ifndef CONFIG_PPC64
+
static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus)
{
return bus->sysdata;
@@ -108,47 +128,6 @@ extern void __init update_bridge_resource(struct pci_dev *dev,
#else /* CONFIG_PPC64 */
/*
- * Structure of a PCI controller (host bridge)
- */
-struct pci_controller {
- struct pci_bus *bus;
- char is_dynamic;
- int node;
- void *arch_data;
- struct list_head list_node;
- struct device *parent;
-
- int first_busno;
- int last_busno;
-
- void __iomem *io_base_virt;
- void *io_base_alloc;
- resource_size_t io_base_phys;
-
- /* Some machines have a non 1:1 mapping of
- * the PCI memory space in the CPU bus space
- */
- resource_size_t pci_mem_offset;
- unsigned long pci_io_size;
-
- struct pci_ops *ops;
- volatile unsigned int __iomem *cfg_addr;
- volatile void __iomem *cfg_data;
-
- /* Currently, we limit ourselves to 1 IO range and 3 mem
- * ranges since the common pci_bus structure can't handle more
- */
- struct resource io_resource;
- struct resource mem_resources[3];
- int global_number;
- unsigned long buid;
- unsigned long dma_window_base_cur;
- unsigned long dma_window_size;
-
- void *private_data;
-};
-
-/*
* PCI stuff, for nodes representing PCI devices, pointed to
* by device_node->data.
*/
--
1.5.3.7
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
^ permalink raw reply related
* [PATCH 14/19] [POWERPC] Inline pci_setup_pci_controller as it has become trivial
From: Stephen Rothwell @ 2007-12-11 0:02 UTC (permalink / raw)
To: ppc-dev
In-Reply-To: <20071207015901.4b6c80bf.sfr@canb.auug.org.au>
and it becomes clear that we should use zalloc_maybe_bootmem.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
arch/powerpc/kernel/pci-common.c | 21 ++++++---------------
1 files changed, 6 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 15ec71a..78cdb70 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -50,27 +50,18 @@ static DEFINE_SPINLOCK(hose_spinlock);
/* XXX kill that some day ... */
static int global_phb_number; /* Global phb counter */
-/*
- * pci_controller(phb) initialized common variables.
- */
-static void __devinit pci_setup_pci_controller(struct pci_controller *hose)
-{
- memset(hose, 0, sizeof(struct pci_controller));
- spin_lock(&hose_spinlock);
- hose->global_number = global_phb_number++;
- list_add_tail(&hose->list_node, &hose_list);
- spin_unlock(&hose_spinlock);
-}
-
-struct pci_controller * pcibios_alloc_controller(struct device_node *dev)
+struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
{
struct pci_controller *phb;
- phb = alloc_maybe_bootmem(sizeof(struct pci_controller), GFP_KERNEL);
+ phb = zalloc_maybe_bootmem(sizeof(struct pci_controller), GFP_KERNEL);
if (phb == NULL)
return NULL;
- pci_setup_pci_controller(phb);
+ spin_lock(&hose_spinlock);
+ phb->global_number = global_phb_number++;
+ list_add_tail(&phb->list_node, &hose_list);
+ spin_unlock(&hose_spinlock);
phb->arch_data = dev;
phb->is_dynamic = mem_init_done;
#ifdef CONFIG_PPC64
--
1.5.3.7
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
^ permalink raw reply related
* [PATCH 16/19] [POWERPC] iSeries: hose->buid is always zero for iSeries
From: Stephen Rothwell @ 2007-12-11 0:03 UTC (permalink / raw)
To: ppc-dev
In-Reply-To: <20071207020155.3466763a.sfr@canb.auug.org.au>
so remove a firmware feature test.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
arch/powerpc/kernel/pci_64.c | 8 ++------
1 files changed, 2 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 69364f3..7e74aa2 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -581,12 +581,8 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
/* Decide whether to display the domain number in /proc */
int pci_proc_domain(struct pci_bus *bus)
{
- if (firmware_has_feature(FW_FEATURE_ISERIES))
- return 0;
- else {
- struct pci_controller *hose = pci_bus_to_host(bus);
- return hose->buid != 0;
- }
+ struct pci_controller *hose = pci_bus_to_host(bus);
+ return hose->buid != 0;
}
void __devinit pci_process_bridge_OF_ranges(struct pci_controller *hose,
--
1.5.3.7
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
^ permalink raw reply related
* Re: Powerpc PCI cleanups (mainly iSeries)
From: Stephen Rothwell @ 2007-12-11 0:06 UTC (permalink / raw)
To: ppc-dev
In-Reply-To: <20071206180045.0eb1db98.sfr@canb.auug.org.au>
[-- Attachment #1: Type: text/plain, Size: 3082 bytes --]
On Thu, 6 Dec 2007 18:00:45 +1100 Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
> Hi all,
>
> I started out looking for ways to remove our dependencies on pci_dn and
> got sidetracked into clening up the iSeries PCI code. The intention of
> the following set of patches is that there be no semantic changes
> (mostly).
I have rebased this series to remove the dependency on benh's patches and
will repost (as replies to the originals) only those that changed
(numbers 2, 14, 16 and I repoested 19 yesterday).
> Overall diffstat looks like this:
> arch/powerpc/kernel/pci-common.c | 31 +--
> arch/powerpc/kernel/pci_32.c | 6 +-
> arch/powerpc/kernel/pci_64.c | 40 +--
> arch/powerpc/kernel/pci_dn.c | 2 +-
> arch/powerpc/platforms/85xx/mpc85xx_ds.c | 2 +-
> arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 2 +-
> arch/powerpc/platforms/iseries/pci.c | 426 +++++++++++-----------------
> arch/powerpc/platforms/iseries/pci.h | 20 +-
> arch/powerpc/platforms/iseries/setup.c | 2 +
> arch/powerpc/platforms/iseries/vpdinfo.c | 17 +-
> arch/powerpc/platforms/powermac/pci.c | 2 +-
> arch/powerpc/platforms/pseries/iommu.c | 2 +-
> include/asm-powerpc/pci-bridge.h | 156 ++++------
> include/asm-powerpc/ppc-pci.h | 3 -
> 14 files changed, 266 insertions(+), 445 deletions(-)
Now:
arch/powerpc/kernel/isa-bridge.c | 2 +-
arch/powerpc/kernel/pci-common.c | 34 +--
arch/powerpc/kernel/pci_32.c | 10 +-
arch/powerpc/kernel/pci_64.c | 42 +--
arch/powerpc/kernel/pci_dn.c | 2 +-
arch/powerpc/kernel/prom_parse.c | 2 +-
arch/powerpc/kernel/rtas_pci.c | 2 +-
arch/powerpc/platforms/82xx/pq2.c | 2 +-
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 2 +-
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 2 +-
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 2 +-
arch/powerpc/platforms/cell/io-workarounds.c | 4 +-
arch/powerpc/platforms/celleb/io-workarounds.c | 4 +-
arch/powerpc/platforms/celleb/pci.c | 2 +-
arch/powerpc/platforms/iseries/pci.c | 426 +++++++++--------------
arch/powerpc/platforms/iseries/pci.h | 20 +-
arch/powerpc/platforms/iseries/setup.c | 2 +
arch/powerpc/platforms/iseries/vpdinfo.c | 17 +-
arch/powerpc/platforms/maple/pci.c | 2 +-
arch/powerpc/platforms/powermac/pci.c | 6 +-
arch/powerpc/platforms/pseries/iommu.c | 2 +-
include/asm-powerpc/pci-bridge.h | 159 ++++------
include/asm-powerpc/ppc-pci.h | 3 -
23 files changed, 287 insertions(+), 462 deletions(-)
The extra files are from the arch_data rename posted earlier.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* [PATCH] powerpc: Update smu command definitions
From: Benjamin Herrenschmidt @ 2007-12-11 0:18 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
From: Michael Hanselmann <linux-kernel@hansmi.ch>
This patch updates smu.h with several new commands and parameter
descriptions for existing ones.
Signed-off-by: Michael Hanselmann <linux-kernel@hansmi.ch>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
include/asm-powerpc/smu.h | 132 ++++++++++++++++++++++++++++++++++++++++++++--
1 file changed, 128 insertions(+), 4 deletions(-)
Index: linux-work/include/asm-powerpc/smu.h
===================================================================
--- linux-work.orig/include/asm-powerpc/smu.h 2007-09-28 11:42:10.000000000 +1000
+++ linux-work/include/asm-powerpc/smu.h 2007-12-11 11:17:09.000000000 +1100
@@ -173,7 +173,7 @@
* Power supply control
*
* The "sub" command is an ASCII string in the data, the
- * data lenght is that of the string.
+ * data length is that of the string.
*
* The VSLEW command can be used to get or set the voltage slewing.
* - lenght 5 (only "VSLEW") : it returns "DONE" and 3 bytes of
@@ -201,20 +201,90 @@
*/
#define SMU_CMD_READ_ADC 0xd8
+
/* Misc commands
*
* This command seem to be a grab bag of various things
+ *
+ * Parameters:
+ * 1: subcommand
*/
#define SMU_CMD_MISC_df_COMMAND 0xdf
-#define SMU_CMD_MISC_df_SET_DISPLAY_LIT 0x02 /* i: 1 byte */
+
+/*
+ * Sets "system ready" status
+ *
+ * I did not yet understand how it exactly works or what it does.
+ *
+ * Guessing from OF code, 0x02 activates the display backlight. Apple uses/used
+ * the same codebase for all OF versions. On PowerBooks, this command would
+ * enable the backlight. For the G5s, it only activates the front LED. However,
+ * don't take this for granted.
+ *
+ * Parameters:
+ * 2: status [0x00, 0x01 or 0x02]
+ */
+#define SMU_CMD_MISC_df_SET_DISPLAY_LIT 0x02
+
+/*
+ * Sets mode of power switch.
+ *
+ * What this actually does is not yet known. Maybe it enables some interrupt.
+ *
+ * Parameters:
+ * 2: enable power switch? [0x00 or 0x01]
+ * 3 (optional): enable nmi? [0x00 or 0x01]
+ *
+ * Returns:
+ * If parameter 2 is 0x00 and parameter 3 is not specified, returns wether
+ * NMI is enabled. Otherwise unknown.
+ */
#define SMU_CMD_MISC_df_NMI_OPTION 0x04
+/* Sets LED dimm offset.
+ *
+ * The front LED dimms itself during sleep. Its brightness (or, well, the PWM
+ * frequency) depends on current time. Therefore, the SMU needs to know the
+ * timezone.
+ *
+ * Parameters:
+ * 2-8: unknown (BCD coding)
+ */
+#define SMU_CMD_MISC_df_DIMM_OFFSET 0x99
+
+
/*
* Version info commands
*
- * I haven't quite tried to figure out how these work
+ * Parameters:
+ * 1 (optional): Specifies version part to retrieve
+ *
+ * Returns:
+ * Version value
*/
#define SMU_CMD_VERSION_COMMAND 0xea
+#define SMU_VERSION_RUNNING 0x00
+#define SMU_VERSION_BASE 0x01
+#define SMU_VERSION_UPDATE 0x02
+
+
+/*
+ * Switches
+ *
+ * These are switches whose status seems to be known to the SMU.
+ *
+ * Parameters:
+ * none
+ *
+ * Result:
+ * Switch bits (ORed, see below)
+ */
+#define SMU_CMD_SWITCHES 0xdc
+
+/* Switches bits */
+#define SMU_SWITCH_CASE_CLOSED 0x01
+#define SMU_SWITCH_AC_POWER 0x04
+#define SMU_SWITCH_POWER_SWITCH 0x08
/*
@@ -243,10 +313,64 @@
*/
#define SMU_CMD_MISC_ee_COMMAND 0xee
#define SMU_CMD_MISC_ee_GET_DATABLOCK_REC 0x02
-#define SMU_CMD_MISC_ee_LEDS_CTRL 0x04 /* i: 00 (00,01) [00] */
+
+/* Retrieves currently used watts.
+ *
+ * Parameters:
+ * 1: 0x03 (Meaning unknown)
+ */
+#define SMU_CMD_MISC_ee_GET_WATTS 0x03
+
+#define SMU_CMD_MISC_ee_LEDS_CTRL 0x04 /* i: 00 (00,01) [00] */
#define SMU_CMD_MISC_ee_GET_DATA 0x05 /* i: 00 , o: ?? */
+/*
+ * Power related commands
+ *
+ * Parameters:
+ * 1: subcommand
+ */
+#define SMU_CMD_POWER_EVENTS_COMMAND 0x8f
+
+/* SMU_POWER_EVENTS subcommands */
+enum {
+ SMU_PWR_GET_POWERUP_EVENTS = 0x00,
+ SMU_PWR_SET_POWERUP_EVENTS = 0x01,
+ SMU_PWR_CLR_POWERUP_EVENTS = 0x02,
+ SMU_PWR_GET_WAKEUP_EVENTS = 0x03,
+ SMU_PWR_SET_WAKEUP_EVENTS = 0x04,
+ SMU_PWR_CLR_WAKEUP_EVENTS = 0x05,
+
+ /*
+ * Get last shutdown cause
+ *
+ * Returns:
+ * 1 byte (signed char): Last shutdown cause. Exact meaning unknown.
+ */
+ SMU_PWR_LAST_SHUTDOWN_CAUSE = 0x07,
+
+ /*
+ * Sets or gets server ID. Meaning or use is unknown.
+ *
+ * Parameters:
+ * 2 (optional): Set server ID (1 byte)
+ *
+ * Returns:
+ * 1 byte (server ID?)
+ */
+ SMU_PWR_SERVER_ID = 0x08,
+};
+
+/* Power events wakeup bits */
+enum {
+ SMU_PWR_WAKEUP_KEY = 0x01, /* Wake on key press */
+ SMU_PWR_WAKEUP_AC_INSERT = 0x02, /* Wake on AC adapter plug */
+ SMU_PWR_WAKEUP_AC_CHANGE = 0x04,
+ SMU_PWR_WAKEUP_LID_OPEN = 0x08,
+ SMU_PWR_WAKEUP_RING = 0x10,
+};
+
/*
* - Kernel side interface -
^ permalink raw reply
* Re: [PATCH 2/3] arch/ : Platform changes for UCC TDM driver for MPC8323ERDB.Also includes related QE changes.
From: Stephen Rothwell @ 2007-12-11 0:18 UTC (permalink / raw)
To: Poonam_Aggrwal-b10812
Cc: michael.barkowski, netdev, kumar.gala, linux-kernel, rubini,
linuxppc-dev, ashish.kalra, rich.cutler
In-Reply-To: <Pine.LNX.4.64.0712101734490.29623@linux121>
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On Mon, 10 Dec 2007 17:39:22 +0530 (IST) Poonam_Aggrwal-b10812 <b10812@freescale.com> wrote:
>
> +++ b/arch/powerpc/sysdev/qe_lib/qe.c
> @@ -149,22 +149,116 @@ EXPORT_SYMBOL(qe_issue_cmd);
> */
> static unsigned int brg_clk = 0;
>
> -unsigned int get_brg_clk(void)
> +u32 get_brg_clk(enum qe_clock brgclk, enum qe_clock *brg_source)
> {
> - struct device_node *qe;
> - if (brg_clk)
> - return brg_clk;
> + struct device_node *qe, *brg, *clocks;
> + enum qe_clock brg_src;
> + u32 brg_input_freq = 0;
> + u32 brg_num;
> + const unsigned int *prop;
>
> - qe = of_find_node_by_type(NULL, "qe");
> - if (qe) {
> + *brg_source = 0;
> +
> + brg_num = brgclk - QE_BRG1;
> + brg = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
> + if (brg) {
> unsigned int size;
> - const u32 *prop = of_get_property(qe, "brg-frequency", &size);
> - brg_clk = *prop;
> - of_node_put(qe);
> - };
> + prop = of_get_property(brg,
> + "fsl,brg-sources", &size);
> +
> + brg_src = *(prop + brg_num);
You should probably sanity check that prop is not NULL and points to
something large enough.
You don't use brg after here, so the "of_node_put(brg)" could go here to
save putting it in multiple places later. Also, currently there are
paths through the following code that do not do the of_node_put(brg).
> + if (brg_src == 0) {
> + *brg_source = 0;
> + if (brg_clk > 0) {
> + of_node_put(brg);
> + return brg_clk;
> + }
> + qe = of_find_node_by_type(NULL, "qe");
> + if (qe) {
> + unsigned int size;
> + prop = of_get_property
> + (qe, "brg-frequency", &size);
> + of_node_put(qe);
> + of_node_put(brg);
> + return *prop;
NULL check here (yes, I know that the old code didn't check).
> + }
> + } else {
> + *brg_source = brg_src + QE_CLK1 - 1;
> + clocks = of_find_compatible_node(NULL, NULL,
> + "fsl,cpm-clocks");
> + prop = of_get_property(clocks,
> + "#clock-cells", &size);
> + /*
> + * clock-cells = 1 only supported right now.
> + */
> + if (*prop != 1)
Again check for NULL (and possibly size).
> + return 0;
> + prop = of_get_property(clocks,
> + "clock-frequency", &size);
> +
> + brg_input_freq = *(prop+(brg_src - 1));
And again.
> + of_node_put(clocks);
> + of_node_put(brg);
> + return brg_input_freq;
> + }
> + }
> return brg_clk;
> }
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
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^ permalink raw reply
* Re: Xilinx ML310 Linux 2.6 PCI bridge
From: Grant Likely @ 2007-12-11 0:20 UTC (permalink / raw)
To: Rick Moleres; +Cc: Jean-Samuel Chenard, linuxppc-embedded
In-Reply-To: <20071210235609.91265F18074@mail188-sin.bigfish.com>
On 12/10/07, Rick Moleres <Rick.Moleres@xilinx.com> wrote:
>
> Grant,
>
> Can you give me more details on why you say the opb_pci bridge is badly
> broken? I know there have been issues with it in the past, but I'm not
> aware of major outages (perhaps I'm just not in the loop).
Actually, it's more likely that I'm not in the loop (see below)
I know of 2 projects that had difficulty with the opb_pci core; The
major issue was that it didn't support all of the PCI transfer modes
(IIRC it was the multiple read transfer command). Last I heard from
the FAE was that Xilinx was not offering support for the core.
> The opb_pci and plb_pci (plbv34) bridges have transitioned to the
> plbv36_pci bridge in EDK 9.2 and later. This bridge is fully supported
> and has been tested under MontaVista's 2.6.10 kernel. I believe only
> critical issues will be fixed in the opb/plbv34.
This I was not aware of. I stand corrected.
Thanks,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
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