* [PATCH 3/6] PS3: gelic: code cleanup
From: Masakazu Mokuno @ 2007-12-13 12:09 UTC (permalink / raw)
To: netdev; +Cc: Linux/PPC Development
In-Reply-To: <20071213181146.BF69.MOKUNO@sm.sony.co.jp>
PS3: gelic: code cleanup
Code cleanup:
- Use appropriate prefixes of names instead of fixed 'gelic_net'
so that objects of the functions, variables and constants can be esitimate.
- Remove definitions for IPSec offload of the gelic hardware. This
functionality is never supported in PS3.
- Group constatns with enum.
- Use bitwise constatns for interrupt status, instead of bit number to
eliminate shift operations.
- Style fixes.
Signed-off-by: Masakazu Mokuno <mokuno@sm.sony.co.jp>
---
drivers/net/ps3_gelic_net.c | 464 +++++++++++++++++++++-----------------------
drivers/net/ps3_gelic_net.h | 283 +++++++++++++++-----------
2 files changed, 389 insertions(+), 358 deletions(-)
--- a/drivers/net/ps3_gelic_net.c
+++ b/drivers/net/ps3_gelic_net.c
@@ -54,21 +54,21 @@ MODULE_AUTHOR("SCE Inc.");
MODULE_DESCRIPTION("Gelic Network driver");
MODULE_LICENSE("GPL");
-static inline struct device *ctodev(struct gelic_net_card *card)
+static inline struct device *ctodev(struct gelic_card *card)
{
return &card->dev->core;
}
-static inline u64 bus_id(struct gelic_net_card *card)
+static inline u64 bus_id(struct gelic_card *card)
{
return card->dev->bus_id;
}
-static inline u64 dev_id(struct gelic_net_card *card)
+static inline u64 dev_id(struct gelic_card *card)
{
return card->dev->dev_id;
}
/* set irq_mask */
-static int gelic_net_set_irq_mask(struct gelic_net_card *card, u64 mask)
+static int gelic_card_set_irq_mask(struct gelic_card *card, u64 mask)
{
int status;
@@ -79,51 +79,40 @@ static int gelic_net_set_irq_mask(struct
"lv1_net_set_interrupt_mask failed %d\n", status);
return status;
}
-static inline void gelic_net_rx_irq_on(struct gelic_net_card *card)
+static inline void gelic_card_rx_irq_on(struct gelic_card *card)
{
- gelic_net_set_irq_mask(card, card->ghiintmask | GELIC_NET_RXINT);
+ gelic_card_set_irq_mask(card, card->ghiintmask | GELIC_CARD_RXINT);
}
-static inline void gelic_net_rx_irq_off(struct gelic_net_card *card)
+static inline void gelic_card_rx_irq_off(struct gelic_card *card)
{
- gelic_net_set_irq_mask(card, card->ghiintmask & ~GELIC_NET_RXINT);
+ gelic_card_set_irq_mask(card, card->ghiintmask & ~GELIC_CARD_RXINT);
}
/**
- * gelic_net_get_descr_status -- returns the status of a descriptor
+ * gelic_descr_get_status -- returns the status of a descriptor
* @descr: descriptor to look at
*
* returns the status as in the dmac_cmd_status field of the descriptor
*/
-static enum gelic_net_descr_status
-gelic_net_get_descr_status(struct gelic_net_descr *descr)
+static enum gelic_descr_dma_status
+gelic_descr_get_status(struct gelic_descr *descr)
{
- u32 cmd_status;
-
- cmd_status = be32_to_cpu(descr->dmac_cmd_status);
- cmd_status >>= GELIC_NET_DESCR_IND_PROC_SHIFT;
- return cmd_status;
+ return be32_to_cpu(descr->dmac_cmd_status) & GELIC_DESCR_DMA_STAT_MASK;
}
/**
- * gelic_net_set_descr_status -- sets the status of a descriptor
+ * gelic_descr_set_status -- sets the status of a descriptor
* @descr: descriptor to change
* @status: status to set in the descriptor
*
* changes the status to the specified value. Doesn't change other bits
* in the status
*/
-static void gelic_net_set_descr_status(struct gelic_net_descr *descr,
- enum gelic_net_descr_status status)
+static void gelic_descr_set_status(struct gelic_descr *descr,
+ enum gelic_descr_dma_status status)
{
- u32 cmd_status;
-
- /* read the status */
- cmd_status = be32_to_cpu(descr->dmac_cmd_status);
- /* clean the upper 4 bits */
- cmd_status &= GELIC_NET_DESCR_IND_PROC_MASKO;
- /* add the status to it */
- cmd_status |= ((u32)status) << GELIC_NET_DESCR_IND_PROC_SHIFT;
- /* and write it back */
- descr->dmac_cmd_status = cpu_to_be32(cmd_status);
+ descr->dmac_cmd_status = cpu_to_be32(status |
+ (be32_to_cpu(descr->dmac_cmd_status) &
+ ~GELIC_DESCR_DMA_STAT_MASK));
/*
* dma_cmd_status field is used to indicate whether the descriptor
* is valid or not.
@@ -134,24 +123,24 @@ static void gelic_net_set_descr_status(s
}
/**
- * gelic_net_free_chain - free descriptor chain
+ * gelic_card_free_chain - free descriptor chain
* @card: card structure
* @descr_in: address of desc
*/
-static void gelic_net_free_chain(struct gelic_net_card *card,
- struct gelic_net_descr *descr_in)
+static void gelic_card_free_chain(struct gelic_card *card,
+ struct gelic_descr *descr_in)
{
- struct gelic_net_descr *descr;
+ struct gelic_descr *descr;
for (descr = descr_in; descr && descr->bus_addr; descr = descr->next) {
dma_unmap_single(ctodev(card), descr->bus_addr,
- GELIC_NET_DESCR_SIZE, DMA_BIDIRECTIONAL);
+ GELIC_DESCR_SIZE, DMA_BIDIRECTIONAL);
descr->bus_addr = 0;
}
}
/**
- * gelic_net_init_chain - links descriptor chain
+ * gelic_card_init_chain - links descriptor chain
* @card: card structure
* @chain: address of chain
* @start_descr: address of descriptor array
@@ -162,22 +151,22 @@ static void gelic_net_free_chain(struct
*
* returns 0 on success, <0 on failure
*/
-static int gelic_net_init_chain(struct gelic_net_card *card,
- struct gelic_net_descr_chain *chain,
- struct gelic_net_descr *start_descr, int no)
+static int gelic_card_init_chain(struct gelic_card *card,
+ struct gelic_descr_chain *chain,
+ struct gelic_descr *start_descr, int no)
{
int i;
- struct gelic_net_descr *descr;
+ struct gelic_descr *descr;
descr = start_descr;
memset(descr, 0, sizeof(*descr) * no);
/* set up the hardware pointers in each descriptor */
for (i = 0; i < no; i++, descr++) {
- gelic_net_set_descr_status(descr, GELIC_NET_DESCR_NOT_IN_USE);
+ gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
descr->bus_addr =
dma_map_single(ctodev(card), descr,
- GELIC_NET_DESCR_SIZE,
+ GELIC_DESCR_SIZE,
DMA_BIDIRECTIONAL);
if (!descr->bus_addr)
@@ -208,13 +197,13 @@ iommu_error:
for (i--, descr--; 0 <= i; i--, descr--)
if (descr->bus_addr)
dma_unmap_single(ctodev(card), descr->bus_addr,
- GELIC_NET_DESCR_SIZE,
+ GELIC_DESCR_SIZE,
DMA_BIDIRECTIONAL);
return -ENOMEM;
}
/**
- * gelic_net_prepare_rx_descr - reinitializes a rx descriptor
+ * gelic_descr_prepare_rx - reinitializes a rx descriptor
* @card: card structure
* @descr: descriptor to re-init
*
@@ -223,15 +212,15 @@ iommu_error:
* allocates a new rx skb, iommu-maps it and attaches it to the descriptor.
* Activate the descriptor state-wise
*/
-static int gelic_net_prepare_rx_descr(struct gelic_net_card *card,
- struct gelic_net_descr *descr)
+static int gelic_descr_prepare_rx(struct gelic_card *card,
+ struct gelic_descr *descr)
{
int offset;
unsigned int bufsize;
- if (gelic_net_get_descr_status(descr) != GELIC_NET_DESCR_NOT_IN_USE) {
+ if (gelic_descr_get_status(descr) != GELIC_DESCR_DMA_NOT_IN_USE)
dev_info(ctodev(card), "%s: ERROR status \n", __func__);
- }
+
/* we need to round up the buffer size to a multiple of 128 */
bufsize = ALIGN(GELIC_NET_MAX_MTU, GELIC_NET_RXBUF_ALIGN);
@@ -265,22 +254,22 @@ static int gelic_net_prepare_rx_descr(st
descr->skb = NULL;
dev_info(ctodev(card),
"%s:Could not iommu-map rx buffer\n", __func__);
- gelic_net_set_descr_status(descr, GELIC_NET_DESCR_NOT_IN_USE);
+ gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
return -ENOMEM;
} else {
- gelic_net_set_descr_status(descr, GELIC_NET_DESCR_CARDOWNED);
+ gelic_descr_set_status(descr, GELIC_DESCR_DMA_CARDOWNED);
return 0;
}
}
/**
- * gelic_net_release_rx_chain - free all skb of rx descr
+ * gelic_card_release_rx_chain - free all skb of rx descr
* @card: card structure
*
*/
-static void gelic_net_release_rx_chain(struct gelic_net_card *card)
+static void gelic_card_release_rx_chain(struct gelic_card *card)
{
- struct gelic_net_descr *descr = card->rx_chain.head;
+ struct gelic_descr *descr = card->rx_chain.head;
do {
if (descr->skb) {
@@ -291,29 +280,29 @@ static void gelic_net_release_rx_chain(s
descr->buf_addr = 0;
dev_kfree_skb_any(descr->skb);
descr->skb = NULL;
- gelic_net_set_descr_status(descr,
- GELIC_NET_DESCR_NOT_IN_USE);
+ gelic_descr_set_status(descr,
+ GELIC_DESCR_DMA_NOT_IN_USE);
}
descr = descr->next;
} while (descr != card->rx_chain.head);
}
/**
- * gelic_net_fill_rx_chain - fills descriptors/skbs in the rx chains
+ * gelic_card_fill_rx_chain - fills descriptors/skbs in the rx chains
* @card: card structure
*
* fills all descriptors in the rx chain: allocates skbs
* and iommu-maps them.
- * returns 0 on success, <0 on failure
+ * returns 0 on success, < 0 on failure
*/
-static int gelic_net_fill_rx_chain(struct gelic_net_card *card)
+static int gelic_card_fill_rx_chain(struct gelic_card *card)
{
- struct gelic_net_descr *descr = card->rx_chain.head;
+ struct gelic_descr *descr = card->rx_chain.head;
int ret;
do {
if (!descr->skb) {
- ret = gelic_net_prepare_rx_descr(card, descr);
+ ret = gelic_descr_prepare_rx(card, descr);
if (ret)
goto rewind;
}
@@ -322,41 +311,42 @@ static int gelic_net_fill_rx_chain(struc
return 0;
rewind:
- gelic_net_release_rx_chain(card);
+ gelic_card_release_rx_chain(card);
return ret;
}
/**
- * gelic_net_alloc_rx_skbs - allocates rx skbs in rx descriptor chains
+ * gelic_card_alloc_rx_skbs - allocates rx skbs in rx descriptor chains
* @card: card structure
*
- * returns 0 on success, <0 on failure
+ * returns 0 on success, < 0 on failure
*/
-static int gelic_net_alloc_rx_skbs(struct gelic_net_card *card)
+static int gelic_card_alloc_rx_skbs(struct gelic_card *card)
{
- struct gelic_net_descr_chain *chain;
+ struct gelic_descr_chain *chain;
int ret;
chain = &card->rx_chain;
- ret = gelic_net_fill_rx_chain(card);
+ ret = gelic_card_fill_rx_chain(card);
chain->head = card->rx_top->prev; /* point to the last */
return ret;
}
/**
- * gelic_net_release_tx_descr - processes a used tx descriptor
+ * gelic_descr_release_tx - processes a used tx descriptor
* @card: card structure
* @descr: descriptor to release
*
* releases a used tx descriptor (unmapping, freeing of skb)
*/
-static void gelic_net_release_tx_descr(struct gelic_net_card *card,
- struct gelic_net_descr *descr)
+static void gelic_descr_release_tx(struct gelic_card *card,
+ struct gelic_descr *descr)
{
struct sk_buff *skb = descr->skb;
+#ifdef DEBUG
BUG_ON(!(be32_to_cpu(descr->data_status) &
- (1 << GELIC_NET_TXDESC_TAIL)));
-
+ (1 << GELIC_DESCR_TX_DMA_FRAME_TAIL)));
+#endif
dma_unmap_single(ctodev(card),
be32_to_cpu(descr->buf_addr), skb->len, DMA_TO_DEVICE);
dev_kfree_skb_any(skb);
@@ -371,30 +361,30 @@ static void gelic_net_release_tx_descr(s
descr->skb = NULL;
/* set descr status */
- gelic_net_set_descr_status(descr, GELIC_NET_DESCR_NOT_IN_USE);
+ gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
}
/**
- * gelic_net_release_tx_chain - processes sent tx descriptors
+ * gelic_card_release_tx_chain - processes sent tx descriptors
* @card: adapter structure
* @stop: net_stop sequence
*
* releases the tx descriptors that gelic has finished with
*/
-static void gelic_net_release_tx_chain(struct gelic_net_card *card, int stop)
+static void gelic_card_release_tx_chain(struct gelic_card *card, int stop)
{
- struct gelic_net_descr_chain *tx_chain;
- enum gelic_net_descr_status status;
+ struct gelic_descr_chain *tx_chain;
+ enum gelic_descr_dma_status status;
int release = 0;
for (tx_chain = &card->tx_chain;
tx_chain->head != tx_chain->tail && tx_chain->tail;
tx_chain->tail = tx_chain->tail->next) {
- status = gelic_net_get_descr_status(tx_chain->tail);
+ status = gelic_descr_get_status(tx_chain->tail);
switch (status) {
- case GELIC_NET_DESCR_RESPONSE_ERROR:
- case GELIC_NET_DESCR_PROTECTION_ERROR:
- case GELIC_NET_DESCR_FORCE_END:
+ case GELIC_DESCR_DMA_RESPONSE_ERROR:
+ case GELIC_DESCR_DMA_PROTECTION_ERROR:
+ case GELIC_DESCR_DMA_FORCE_END:
if (printk_ratelimit())
dev_info(ctodev(card),
"%s: forcing end of tx descriptor " \
@@ -403,7 +393,7 @@ static void gelic_net_release_tx_chain(s
card->netdev->stats.tx_dropped++;
break;
- case GELIC_NET_DESCR_COMPLETE:
+ case GELIC_DESCR_DMA_COMPLETE:
if (tx_chain->tail->skb) {
card->netdev->stats.tx_packets++;
card->netdev->stats.tx_bytes +=
@@ -411,14 +401,14 @@ static void gelic_net_release_tx_chain(s
}
break;
- case GELIC_NET_DESCR_CARDOWNED:
+ case GELIC_DESCR_DMA_CARDOWNED:
/* pending tx request */
default:
- /* any other value (== GELIC_NET_DESCR_NOT_IN_USE) */
+ /* any other value (== GELIC_DESCR_DMA_NOT_IN_USE) */
if (!stop)
goto out;
}
- gelic_net_release_tx_descr(card, tx_chain->tail);
+ gelic_descr_release_tx(card, tx_chain->tail);
release ++;
}
out:
@@ -436,7 +426,7 @@ out:
*/
static void gelic_net_set_multi(struct net_device *netdev)
{
- struct gelic_net_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_priv(netdev);
struct dev_mc_list *mc;
unsigned int i;
uint8_t *p;
@@ -489,13 +479,13 @@ static void gelic_net_set_multi(struct n
}
/**
- * gelic_net_enable_rxdmac - enables the receive DMA controller
+ * gelic_card_enable_rxdmac - enables the receive DMA controller
* @card: card structure
*
- * gelic_net_enable_rxdmac enables the DMA controller by setting RX_DMA_EN
+ * gelic_card_enable_rxdmac enables the DMA controller by setting RX_DMA_EN
* in the GDADMACCNTR register
*/
-static inline void gelic_net_enable_rxdmac(struct gelic_net_card *card)
+static inline void gelic_card_enable_rxdmac(struct gelic_card *card)
{
int status;
@@ -507,13 +497,13 @@ static inline void gelic_net_enable_rxdm
}
/**
- * gelic_net_disable_rxdmac - disables the receive DMA controller
+ * gelic_card_disable_rxdmac - disables the receive DMA controller
* @card: card structure
*
- * gelic_net_disable_rxdmac terminates processing on the DMA controller by
+ * gelic_card_disable_rxdmac terminates processing on the DMA controller by
* turing off DMA and issueing a force end
*/
-static inline void gelic_net_disable_rxdmac(struct gelic_net_card *card)
+static inline void gelic_card_disable_rxdmac(struct gelic_card *card)
{
int status;
@@ -525,13 +515,13 @@ static inline void gelic_net_disable_rxd
}
/**
- * gelic_net_disable_txdmac - disables the transmit DMA controller
+ * gelic_card_disable_txdmac - disables the transmit DMA controller
* @card: card structure
*
- * gelic_net_disable_txdmac terminates processing on the DMA controller by
+ * gelic_card_disable_txdmac terminates processing on the DMA controller by
* turing off DMA and issueing a force end
*/
-static inline void gelic_net_disable_txdmac(struct gelic_net_card *card)
+static inline void gelic_card_disable_txdmac(struct gelic_card *card)
{
int status;
@@ -550,16 +540,16 @@ static inline void gelic_net_disable_txd
*/
static int gelic_net_stop(struct net_device *netdev)
{
- struct gelic_net_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_priv(netdev);
napi_disable(&card->napi);
netif_stop_queue(netdev);
/* turn off DMA, force end */
- gelic_net_disable_rxdmac(card);
- gelic_net_disable_txdmac(card);
+ gelic_card_disable_rxdmac(card);
+ gelic_card_disable_txdmac(card);
- gelic_net_set_irq_mask(card, 0);
+ gelic_card_set_irq_mask(card, 0);
/* disconnect event port */
free_irq(card->netdev->irq, card->netdev);
@@ -569,30 +559,30 @@ static int gelic_net_stop(struct net_dev
netif_carrier_off(netdev);
/* release chains */
- gelic_net_release_tx_chain(card, 1);
- gelic_net_release_rx_chain(card);
+ gelic_card_release_tx_chain(card, 1);
+ gelic_card_release_rx_chain(card);
- gelic_net_free_chain(card, card->tx_top);
- gelic_net_free_chain(card, card->rx_top);
+ gelic_card_free_chain(card, card->tx_top);
+ gelic_card_free_chain(card, card->rx_top);
return 0;
}
/**
- * gelic_net_get_next_tx_descr - returns the next available tx descriptor
+ * gelic_card_get_next_tx_descr - returns the next available tx descriptor
* @card: device structure to get descriptor from
*
* returns the address of the next descriptor, or NULL if not available.
*/
-static struct gelic_net_descr *
-gelic_net_get_next_tx_descr(struct gelic_net_card *card)
+static struct gelic_descr *
+gelic_card_get_next_tx_descr(struct gelic_card *card)
{
if (!card->tx_chain.head)
return NULL;
/* see if the next descriptor is free */
if (card->tx_chain.tail != card->tx_chain.head->next &&
- gelic_net_get_descr_status(card->tx_chain.head) ==
- GELIC_NET_DESCR_NOT_IN_USE)
+ gelic_descr_get_status(card->tx_chain.head) ==
+ GELIC_DESCR_DMA_NOT_IN_USE)
return card->tx_chain.head;
else
return NULL;
@@ -600,7 +590,7 @@ gelic_net_get_next_tx_descr(struct gelic
}
/**
- * gelic_net_set_txdescr_cmdstat - sets the tx descriptor command field
+ * gelic_descr_set_tx_cmdstat - sets the tx descriptor command field
* @descr: descriptor structure to fill out
* @skb: packet to consider
*
@@ -608,33 +598,33 @@ gelic_net_get_next_tx_descr(struct gelic
* depending on hardware checksum settings. This function assumes a wmb()
* has executed before.
*/
-static void gelic_net_set_txdescr_cmdstat(struct gelic_net_descr *descr,
- struct sk_buff *skb)
+static void gelic_descr_set_tx_cmdstat(struct gelic_descr *descr,
+ struct sk_buff *skb)
{
if (skb->ip_summed != CHECKSUM_PARTIAL)
descr->dmac_cmd_status =
- cpu_to_be32(GELIC_NET_DMAC_CMDSTAT_NOCS |
- GELIC_NET_DMAC_CMDSTAT_END_FRAME);
+ cpu_to_be32(GELIC_DESCR_DMA_CMD_NO_CHKSUM |
+ GELIC_DESCR_TX_DMA_FRAME_TAIL);
else {
/* is packet ip?
* if yes: tcp? udp? */
if (skb->protocol == htons(ETH_P_IP)) {
if (ip_hdr(skb)->protocol == IPPROTO_TCP)
descr->dmac_cmd_status =
- cpu_to_be32(GELIC_NET_DMAC_CMDSTAT_TCPCS |
- GELIC_NET_DMAC_CMDSTAT_END_FRAME);
+ cpu_to_be32(GELIC_DESCR_DMA_CMD_TCP_CHKSUM |
+ GELIC_DESCR_TX_DMA_FRAME_TAIL);
else if (ip_hdr(skb)->protocol == IPPROTO_UDP)
descr->dmac_cmd_status =
- cpu_to_be32(GELIC_NET_DMAC_CMDSTAT_UDPCS |
- GELIC_NET_DMAC_CMDSTAT_END_FRAME);
+ cpu_to_be32(GELIC_DESCR_DMA_CMD_UDP_CHKSUM |
+ GELIC_DESCR_TX_DMA_FRAME_TAIL);
else /*
* the stack should checksum non-tcp and non-udp
* packets on his own: NETIF_F_IP_CSUM
*/
descr->dmac_cmd_status =
- cpu_to_be32(GELIC_NET_DMAC_CMDSTAT_NOCS |
- GELIC_NET_DMAC_CMDSTAT_END_FRAME);
+ cpu_to_be32(GELIC_DESCR_DMA_CMD_NO_CHKSUM |
+ GELIC_DESCR_TX_DMA_FRAME_TAIL);
}
}
}
@@ -665,7 +655,7 @@ static inline struct sk_buff *gelic_put_
}
/**
- * gelic_net_prepare_tx_descr_v - get dma address of skb_data
+ * gelic_descr_prepare_tx - get dma address of skb_data
* @card: card structure
* @descr: descriptor structure
* @skb: packet to use
@@ -673,9 +663,9 @@ static inline struct sk_buff *gelic_put_
* returns 0 on success, <0 on failure.
*
*/
-static int gelic_net_prepare_tx_descr_v(struct gelic_net_card *card,
- struct gelic_net_descr *descr,
- struct sk_buff *skb)
+static int gelic_descr_prepare_tx(struct gelic_card *card,
+ struct gelic_descr *descr,
+ struct sk_buff *skb)
{
dma_addr_t buf;
@@ -702,7 +692,7 @@ static int gelic_net_prepare_tx_descr_v(
descr->skb = skb;
descr->data_status = 0;
descr->next_descr_addr = 0; /* terminate hw descr */
- gelic_net_set_txdescr_cmdstat(descr, skb);
+ gelic_descr_set_tx_cmdstat(descr, skb);
/* bump free descriptor pointer */
card->tx_chain.head = descr->next;
@@ -710,20 +700,20 @@ static int gelic_net_prepare_tx_descr_v(
}
/**
- * gelic_net_kick_txdma - enables TX DMA processing
+ * gelic_card_kick_txdma - enables TX DMA processing
* @card: card structure
* @descr: descriptor address to enable TX processing at
*
*/
-static int gelic_net_kick_txdma(struct gelic_net_card *card,
- struct gelic_net_descr *descr)
+static int gelic_card_kick_txdma(struct gelic_card *card,
+ struct gelic_descr *descr)
{
int status = 0;
if (card->tx_dma_progress)
return 0;
- if (gelic_net_get_descr_status(descr) == GELIC_NET_DESCR_CARDOWNED) {
+ if (gelic_descr_get_status(descr) == GELIC_DESCR_DMA_CARDOWNED) {
card->tx_dma_progress = 1;
status = lv1_net_start_tx_dma(bus_id(card), dev_id(card),
descr->bus_addr, 0);
@@ -743,16 +733,16 @@ static int gelic_net_kick_txdma(struct g
*/
static int gelic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
{
- struct gelic_net_card *card = netdev_priv(netdev);
- struct gelic_net_descr *descr;
+ struct gelic_card *card = netdev_priv(netdev);
+ struct gelic_descr *descr;
int result;
unsigned long flags;
spin_lock_irqsave(&card->tx_dma_lock, flags);
- gelic_net_release_tx_chain(card, 0);
+ gelic_card_release_tx_chain(card, 0);
- descr = gelic_net_get_next_tx_descr(card);
+ descr = gelic_card_get_next_tx_descr(card);
if (!descr) {
/*
* no more descriptors free
@@ -762,7 +752,7 @@ static int gelic_net_xmit(struct sk_buff
return NETDEV_TX_BUSY;
}
- result = gelic_net_prepare_tx_descr_v(card, descr, skb);
+ result = gelic_descr_prepare_tx(card, descr, skb);
if (result) {
/*
* DMA map failed. As chanses are that failure
@@ -783,14 +773,14 @@ static int gelic_net_xmit(struct sk_buff
* ensure that the hardware sees it
*/
wmb();
- if (gelic_net_kick_txdma(card, descr)) {
+ if (gelic_card_kick_txdma(card, descr)) {
/*
* kick failed.
* release descriptors which were just prepared
*/
card->netdev->stats.tx_dropped++;
- gelic_net_release_tx_descr(card, descr);
- gelic_net_release_tx_descr(card, descr->next);
+ gelic_descr_release_tx(card, descr);
+ gelic_descr_release_tx(card, descr->next);
card->tx_chain.tail = descr->next->next;
dev_info(ctodev(card), "%s: kick failure\n", __func__);
} else {
@@ -810,8 +800,8 @@ static int gelic_net_xmit(struct sk_buff
* iommu-unmaps the skb, fills out skb structure and passes the data to the
* stack. The descriptor state is not changed.
*/
-static void gelic_net_pass_skb_up(struct gelic_net_descr *descr,
- struct gelic_net_card *card)
+static void gelic_net_pass_skb_up(struct gelic_descr *descr,
+ struct gelic_card *card)
{
struct sk_buff *skb;
struct net_device *netdev;
@@ -845,8 +835,8 @@ static void gelic_net_pass_skb_up(struct
/* checksum offload */
if (card->rx_csum) {
- if ((data_status & GELIC_NET_DATA_STATUS_CHK_MASK) &&
- (!(data_error & GELIC_NET_DATA_ERROR_CHK_MASK)))
+ if ((data_status & GELIC_DESCR_DATA_STATUS_CHK_MASK) &&
+ (!(data_error & GELIC_DESCR_DATA_ERROR_CHK_MASK)))
skb->ip_summed = CHECKSUM_UNNECESSARY;
else
skb->ip_summed = CHECKSUM_NONE;
@@ -862,7 +852,7 @@ static void gelic_net_pass_skb_up(struct
}
/**
- * gelic_net_decode_one_descr - processes an rx descriptor
+ * gelic_card_decode_one_descr - processes an rx descriptor
* @card: card structure
*
* returns 1 if a packet has been sent to the stack, otherwise 0
@@ -870,37 +860,37 @@ static void gelic_net_pass_skb_up(struct
* processes an rx descriptor by iommu-unmapping the data buffer and passing
* the packet up to the stack
*/
-static int gelic_net_decode_one_descr(struct gelic_net_card *card)
+static int gelic_card_decode_one_descr(struct gelic_card *card)
{
- enum gelic_net_descr_status status;
- struct gelic_net_descr_chain *chain = &card->rx_chain;
- struct gelic_net_descr *descr = chain->tail;
+ enum gelic_descr_dma_status status;
+ struct gelic_descr_chain *chain = &card->rx_chain;
+ struct gelic_descr *descr = chain->tail;
int dmac_chain_ended;
- status = gelic_net_get_descr_status(descr);
+ status = gelic_descr_get_status(descr);
/* is this descriptor terminated with next_descr == NULL? */
dmac_chain_ended =
be32_to_cpu(descr->dmac_cmd_status) &
- GELIC_NET_DMAC_CMDSTAT_RXDCEIS;
+ GELIC_DESCR_RX_DMA_CHAIN_END;
- if (status == GELIC_NET_DESCR_CARDOWNED)
+ if (status == GELIC_DESCR_DMA_CARDOWNED)
return 0;
- if (status == GELIC_NET_DESCR_NOT_IN_USE) {
+ if (status == GELIC_DESCR_DMA_NOT_IN_USE) {
dev_dbg(ctodev(card), "dormant descr? %p\n", descr);
return 0;
}
- if ((status == GELIC_NET_DESCR_RESPONSE_ERROR) ||
- (status == GELIC_NET_DESCR_PROTECTION_ERROR) ||
- (status == GELIC_NET_DESCR_FORCE_END)) {
+ if ((status == GELIC_DESCR_DMA_RESPONSE_ERROR) ||
+ (status == GELIC_DESCR_DMA_PROTECTION_ERROR) ||
+ (status == GELIC_DESCR_DMA_FORCE_END)) {
dev_info(ctodev(card), "dropping RX descriptor with state %x\n",
status);
card->netdev->stats.rx_dropped++;
goto refill;
}
- if (status == GELIC_NET_DESCR_BUFFER_FULL) {
+ if (status == GELIC_DESCR_DMA_BUFFER_FULL) {
/*
* Buffer full would occur if and only if
* the frame length was longer than the size of this
@@ -917,7 +907,7 @@ static int gelic_net_decode_one_descr(st
* descriptoers any other than FRAME_END here should
* be treated as error.
*/
- if (status != GELIC_NET_DESCR_FRAME_END) {
+ if (status != GELIC_DESCR_DMA_FRAME_END) {
dev_dbg(ctodev(card), "RX descriptor with state %x\n",
status);
goto refill;
@@ -934,13 +924,13 @@ refill:
descr->next_descr_addr = 0;
/* change the descriptor state: */
- gelic_net_set_descr_status(descr, GELIC_NET_DESCR_NOT_IN_USE);
+ gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
/*
* this call can fail, but for now, just leave this
* decriptor without skb
*/
- gelic_net_prepare_rx_descr(card, descr);
+ gelic_descr_prepare_rx(card, descr);
chain->head = descr;
chain->tail = descr->next;
@@ -973,12 +963,12 @@ refill:
*/
static int gelic_net_poll(struct napi_struct *napi, int budget)
{
- struct gelic_net_card *card = container_of(napi, struct gelic_net_card, napi);
+ struct gelic_card *card = container_of(napi, struct gelic_card, napi);
struct net_device *netdev = card->netdev;
int packets_done = 0;
while (packets_done < budget) {
- if (!gelic_net_decode_one_descr(card))
+ if (!gelic_card_decode_one_descr(card))
break;
packets_done++;
@@ -986,7 +976,7 @@ static int gelic_net_poll(struct napi_st
if (packets_done < budget) {
netif_rx_complete(netdev, napi);
- gelic_net_rx_irq_on(card);
+ gelic_card_rx_irq_on(card);
}
return packets_done;
}
@@ -1010,13 +1000,13 @@ static int gelic_net_change_mtu(struct n
}
/**
- * gelic_net_interrupt - event handler for gelic_net
+ * gelic_card_interrupt - event handler for gelic_net
*/
-static irqreturn_t gelic_net_interrupt(int irq, void *ptr)
+static irqreturn_t gelic_card_interrupt(int irq, void *ptr)
{
unsigned long flags;
struct net_device *netdev = ptr;
- struct gelic_net_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_priv(netdev);
u64 status;
status = card->irq_status;
@@ -1026,20 +1016,20 @@ static irqreturn_t gelic_net_interrupt(i
if (card->rx_dma_restart_required) {
card->rx_dma_restart_required = 0;
- gelic_net_enable_rxdmac(card);
+ gelic_card_enable_rxdmac(card);
}
- if (status & GELIC_NET_RXINT) {
- gelic_net_rx_irq_off(card);
+ if (status & GELIC_CARD_RXINT) {
+ gelic_card_rx_irq_off(card);
netif_rx_schedule(netdev, &card->napi);
}
- if (status & GELIC_NET_TXINT) {
+ if (status & GELIC_CARD_TXINT) {
spin_lock_irqsave(&card->tx_dma_lock, flags);
card->tx_dma_progress = 0;
- gelic_net_release_tx_chain(card, 0);
+ gelic_card_release_tx_chain(card, 0);
/* kick outstanding tx descriptor if any */
- gelic_net_kick_txdma(card, card->tx_chain.tail);
+ gelic_card_kick_txdma(card, card->tx_chain.tail);
spin_unlock_irqrestore(&card->tx_dma_lock, flags);
}
return IRQ_HANDLED;
@@ -1054,19 +1044,19 @@ static irqreturn_t gelic_net_interrupt(i
*/
static void gelic_net_poll_controller(struct net_device *netdev)
{
- struct gelic_net_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_priv(netdev);
- gelic_net_set_irq_mask(card, 0);
- gelic_net_interrupt(netdev->irq, netdev);
- gelic_net_set_irq_mask(card, card->ghiintmask);
+ gelic_card_set_irq_mask(card, 0);
+ gelic_card_interrupt(netdev->irq, netdev);
+ gelic_card_set_irq_mask(card, card->ghiintmask);
}
#endif /* CONFIG_NET_POLL_CONTROLLER */
/**
- * gelic_net_open_device - open device and map dma region
+ * gelic_card_open - open device and map dma region
* @card: card structure
*/
-static int gelic_net_open_device(struct gelic_net_card *card)
+static int gelic_card_open(struct gelic_card *card)
{
int result;
@@ -1075,13 +1065,13 @@ static int gelic_net_open_device(struct
if (result) {
dev_info(ctodev(card),
- "%s:%d: gelic_net_open_device failed (%d)\n",
+ "%s:%d: recieve_port_setup failed (%d)\n",
__func__, __LINE__, result);
result = -EPERM;
goto fail_alloc_irq;
}
- result = request_irq(card->netdev->irq, gelic_net_interrupt,
+ result = request_irq(card->netdev->irq, gelic_card_interrupt,
IRQF_DISABLED, card->netdev->name, card->netdev);
if (result) {
@@ -1111,37 +1101,37 @@ fail_alloc_irq:
*/
static int gelic_net_open(struct net_device *netdev)
{
- struct gelic_net_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_priv(netdev);
dev_dbg(ctodev(card), " -> %s:%d\n", __func__, __LINE__);
- gelic_net_open_device(card);
+ gelic_card_open(card);
- if (gelic_net_init_chain(card, &card->tx_chain,
- card->descr, GELIC_NET_TX_DESCRIPTORS))
+ if (gelic_card_init_chain(card, &card->tx_chain,
+ card->descr, GELIC_NET_TX_DESCRIPTORS))
goto alloc_tx_failed;
- if (gelic_net_init_chain(card, &card->rx_chain,
- card->descr + GELIC_NET_TX_DESCRIPTORS,
- GELIC_NET_RX_DESCRIPTORS))
+ if (gelic_card_init_chain(card, &card->rx_chain,
+ card->descr + GELIC_NET_TX_DESCRIPTORS,
+ GELIC_NET_RX_DESCRIPTORS))
goto alloc_rx_failed;
/* head of chain */
card->tx_top = card->tx_chain.head;
card->rx_top = card->rx_chain.head;
dev_dbg(ctodev(card), "descr rx %p, tx %p, size %#lx, num %#x\n",
- card->rx_top, card->tx_top, sizeof(struct gelic_net_descr),
+ card->rx_top, card->tx_top, sizeof(struct gelic_descr),
GELIC_NET_RX_DESCRIPTORS);
/* allocate rx skbs */
- if (gelic_net_alloc_rx_skbs(card))
+ if (gelic_card_alloc_rx_skbs(card))
goto alloc_skbs_failed;
napi_enable(&card->napi);
card->tx_dma_progress = 0;
- card->ghiintmask = GELIC_NET_RXINT | GELIC_NET_TXINT;
+ card->ghiintmask = GELIC_CARD_RXINT | GELIC_CARD_TXINT;
- gelic_net_set_irq_mask(card, card->ghiintmask);
- gelic_net_enable_rxdmac(card);
+ gelic_card_set_irq_mask(card, card->ghiintmask);
+ gelic_card_enable_rxdmac(card);
netif_start_queue(netdev);
netif_carrier_on(netdev);
@@ -1149,46 +1139,47 @@ static int gelic_net_open(struct net_dev
return 0;
alloc_skbs_failed:
- gelic_net_free_chain(card, card->rx_top);
+ gelic_card_free_chain(card, card->rx_top);
alloc_rx_failed:
- gelic_net_free_chain(card, card->tx_top);
+ gelic_card_free_chain(card, card->tx_top);
alloc_tx_failed:
return -ENOMEM;
}
-static void gelic_net_get_drvinfo (struct net_device *netdev,
- struct ethtool_drvinfo *info)
+static void gelic_net_get_drvinfo(struct net_device *netdev,
+ struct ethtool_drvinfo *info)
{
strncpy(info->driver, DRV_NAME, sizeof(info->driver) - 1);
strncpy(info->version, DRV_VERSION, sizeof(info->version) - 1);
}
-static int gelic_net_get_settings(struct net_device *netdev,
- struct ethtool_cmd *cmd)
+static int gelic_ether_get_settings(struct net_device *netdev,
+ struct ethtool_cmd *cmd)
{
- struct gelic_net_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_priv(netdev);
int status;
u64 v1, v2;
int speed, duplex;
speed = duplex = -1;
status = lv1_net_control(bus_id(card), dev_id(card),
- GELIC_NET_GET_ETH_PORT_STATUS, GELIC_NET_PORT, 0, 0,
- &v1, &v2);
+ GELIC_LV1_GET_ETH_PORT_STATUS,
+ GELIC_LV1_VLAN_TX_ETHERNET, 0, 0,
+ &v1, &v2);
if (status) {
/* link down */
} else {
- if (v1 & GELIC_NET_FULL_DUPLEX) {
+ if (v1 & GELIC_LV1_ETHER_FULL_DUPLEX) {
duplex = DUPLEX_FULL;
} else {
duplex = DUPLEX_HALF;
}
- if (v1 & GELIC_NET_SPEED_10 ) {
+ if (v1 & GELIC_LV1_ETHER_SPEED_10) {
speed = SPEED_10;
- } else if (v1 & GELIC_NET_SPEED_100) {
+ } else if (v1 & GELIC_LV1_ETHER_SPEED_100) {
speed = SPEED_100;
- } else if (v1 & GELIC_NET_SPEED_1000) {
+ } else if (v1 & GELIC_LV1_ETHER_SPEED_1000) {
speed = SPEED_1000;
}
}
@@ -1205,20 +1196,21 @@ static int gelic_net_get_settings(struct
return 0;
}
-static u32 gelic_net_get_link(struct net_device *netdev)
+static u32 gelic_ether_get_link(struct net_device *netdev)
{
- struct gelic_net_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_priv(netdev);
int status;
u64 v1, v2;
int link;
status = lv1_net_control(bus_id(card), dev_id(card),
- GELIC_NET_GET_ETH_PORT_STATUS, GELIC_NET_PORT, 0, 0,
- &v1, &v2);
+ GELIC_LV1_GET_ETH_PORT_STATUS,
+ GELIC_LV1_VLAN_TX_ETHERNET, 0, 0,
+ &v1, &v2);
if (status)
return 0; /* link down */
- if (v1 & GELIC_NET_LINK_UP)
+ if (v1 & GELIC_LV1_ETHER_LINK_UP)
link = 1;
else
link = 0;
@@ -1252,14 +1244,14 @@ static int gelic_net_set_tx_csum(struct
static u32 gelic_net_get_rx_csum(struct net_device *netdev)
{
- struct gelic_net_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_priv(netdev);
return card->rx_csum;
}
static int gelic_net_set_rx_csum(struct net_device *netdev, u32 data)
{
- struct gelic_net_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_priv(netdev);
card->rx_csum = data;
return 0;
@@ -1267,8 +1259,8 @@ static int gelic_net_set_rx_csum(struct
static struct ethtool_ops gelic_net_ethtool_ops = {
.get_drvinfo = gelic_net_get_drvinfo,
- .get_settings = gelic_net_get_settings,
- .get_link = gelic_net_get_link,
+ .get_settings = gelic_ether_get_settings,
+ .get_link = gelic_ether_get_link,
.nway_reset = gelic_net_nway_reset,
.get_tx_csum = gelic_net_get_tx_csum,
.set_tx_csum = gelic_net_set_tx_csum,
@@ -1285,8 +1277,8 @@ static struct ethtool_ops gelic_net_etht
*/
static void gelic_net_tx_timeout_task(struct work_struct *work)
{
- struct gelic_net_card *card =
- container_of(work, struct gelic_net_card, tx_timeout_task);
+ struct gelic_card *card =
+ container_of(work, struct gelic_card, tx_timeout_task);
struct net_device *netdev = card->netdev;
dev_info(ctodev(card), "%s:Timed out. Restarting... \n", __func__);
@@ -1312,7 +1304,7 @@ out:
*/
static void gelic_net_tx_timeout(struct net_device *netdev)
{
- struct gelic_net_card *card;
+ struct gelic_card *card;
card = netdev_priv(netdev);
atomic_inc(&card->tx_timeout_task_counter);
@@ -1323,12 +1315,12 @@ static void gelic_net_tx_timeout(struct
}
/**
- * gelic_net_setup_netdev_ops - initialization of net_device operations
+ * gelic_ether_setup_netdev_ops - initialization of net_device operations
* @netdev: net_device structure
*
* fills out function pointers in the net_device structure
*/
-static void gelic_net_setup_netdev_ops(struct net_device *netdev)
+static void gelic_ether_setup_netdev_ops(struct net_device *netdev)
{
netdev->open = &gelic_net_open;
netdev->stop = &gelic_net_stop;
@@ -1349,7 +1341,7 @@ static void gelic_net_setup_netdev_ops(s
*
* gelic_net_setup_netdev initializes the net_device structure
**/
-static int gelic_net_setup_netdev(struct gelic_net_card *card)
+static int gelic_net_setup_netdev(struct gelic_card *card)
{
struct net_device *netdev = card->netdev;
struct sockaddr addr;
@@ -1363,7 +1355,7 @@ static int gelic_net_setup_netdev(struct
card->rx_csum = GELIC_NET_RX_CSUM_DEFAULT;
- gelic_net_setup_netdev_ops(netdev);
+ gelic_ether_setup_netdev_ops(netdev);
netif_napi_add(netdev, &card->napi,
gelic_net_poll, GELIC_NET_NAPI_WEIGHT);
@@ -1371,7 +1363,7 @@ static int gelic_net_setup_netdev(struct
netdev->features = NETIF_F_IP_CSUM;
status = lv1_net_control(bus_id(card), dev_id(card),
- GELIC_NET_GET_MAC_ADDRESS,
+ GELIC_LV1_GET_MAC_ADDRESS,
0, 0, 0, &v1, &v2);
if (status || !is_valid_ether_addr((u8 *)&v1)) {
dev_info(ctodev(card),
@@ -1388,17 +1380,17 @@ static int gelic_net_setup_netdev(struct
card->vlan_index = -1; /* no vlan */
for (i = 0; i < GELIC_NET_VLAN_MAX; i++) {
status = lv1_net_control(bus_id(card), dev_id(card),
- GELIC_NET_GET_VLAN_ID,
+ GELIC_LV1_GET_VLAN_ID,
i + 1, /* index; one based */
0, 0, &v1, &v2);
- if (status == GELIC_NET_VLAN_NO_ENTRY) {
+ if (status == LV1_NO_ENTRY) {
dev_dbg(ctodev(card),
"GELIC_VLAN_ID no entry:%d, VLAN disabled\n",
status);
card->vlan_id[i] = 0;
} else if (status) {
dev_dbg(ctodev(card),
- "%s:GELIC_NET_VLAN_ID faild, status=%d\n",
+ "%s:get vlan id faild, status=%d\n",
__func__, status);
card->vlan_id[i] = 0;
} else {
@@ -1407,8 +1399,8 @@ static int gelic_net_setup_netdev(struct
}
}
- if (card->vlan_id[GELIC_NET_VLAN_WIRED - 1]) {
- card->vlan_index = GELIC_NET_VLAN_WIRED - 1;
+ if (card->vlan_id[GELIC_LV1_VLAN_TX_ETHERNET - 1]) {
+ card->vlan_index = GELIC_LV1_VLAN_TX_ETHERNET - 1;
netdev->hard_header_len += VLAN_HLEN;
}
@@ -1423,31 +1415,31 @@ static int gelic_net_setup_netdev(struct
}
/**
- * gelic_net_alloc_card - allocates net_device and card structure
+ * gelic_alloc_card_net - allocates net_device and card structure
*
* returns the card structure or NULL in case of errors
*
* the card and net_device structures are linked to each other
*/
-static struct gelic_net_card *gelic_net_alloc_card(void)
+static struct gelic_card *gelic_alloc_card_net(void)
{
struct net_device *netdev;
- struct gelic_net_card *card;
+ struct gelic_card *card;
size_t alloc_size;
- alloc_size = sizeof (*card) +
- sizeof (struct gelic_net_descr) * GELIC_NET_RX_DESCRIPTORS +
- sizeof (struct gelic_net_descr) * GELIC_NET_TX_DESCRIPTORS;
+ alloc_size = sizeof(*card) +
+ sizeof(struct gelic_descr) * GELIC_NET_RX_DESCRIPTORS +
+ sizeof(struct gelic_descr) * GELIC_NET_TX_DESCRIPTORS;
/*
* we assume private data is allocated 32 bytes (or more) aligned
- * so that gelic_net_descr should be 32 bytes aligned.
+ * so that gelic_descr should be 32 bytes aligned.
* Current alloc_etherdev() does do it because NETDEV_ALIGN
* is 32.
* check this assumption here.
*/
BUILD_BUG_ON(NETDEV_ALIGN < 32);
- BUILD_BUG_ON(offsetof(struct gelic_net_card, irq_status) % 8);
- BUILD_BUG_ON(offsetof(struct gelic_net_card, descr) % 32);
+ BUILD_BUG_ON(offsetof(struct gelic_card, irq_status) % 8);
+ BUILD_BUG_ON(offsetof(struct gelic_card, descr) % 32);
netdev = alloc_etherdev(alloc_size);
if (!netdev)
@@ -1465,9 +1457,9 @@ static struct gelic_net_card *gelic_net_
/**
* ps3_gelic_driver_probe - add a device to the control of this driver
*/
-static int ps3_gelic_driver_probe (struct ps3_system_bus_device *dev)
+static int ps3_gelic_driver_probe(struct ps3_system_bus_device *dev)
{
- struct gelic_net_card *card = gelic_net_alloc_card();
+ struct gelic_card *card = gelic_alloc_card_net();
int result;
if (!card) {
@@ -1537,9 +1529,9 @@ fail_alloc_card:
* ps3_gelic_driver_remove - remove a device from the control of this driver
*/
-static int ps3_gelic_driver_remove (struct ps3_system_bus_device *dev)
+static int ps3_gelic_driver_remove(struct ps3_system_bus_device *dev)
{
- struct gelic_net_card *card = ps3_system_bus_get_driver_data(dev);
+ struct gelic_card *card = ps3_system_bus_get_driver_data(dev);
wait_event(card->waitq,
atomic_read(&card->tx_timeout_task_counter) == 0);
@@ -1580,8 +1572,8 @@ static void __exit ps3_gelic_driver_exit
ps3_system_bus_driver_unregister(&ps3_gelic_driver);
}
-module_init (ps3_gelic_driver_init);
-module_exit (ps3_gelic_driver_exit);
+module_init(ps3_gelic_driver_init);
+module_exit(ps3_gelic_driver_exit);
MODULE_ALIAS(PS3_MODULE_ALIAS_GELIC);
--- a/drivers/net/ps3_gelic_net.h
+++ b/drivers/net/ps3_gelic_net.h
@@ -43,131 +43,170 @@
#define GELIC_NET_VLAN_MAX 4
#define GELIC_NET_MC_COUNT_MAX 32 /* multicast address list */
-enum gelic_net_int0_status {
- GELIC_NET_GDTDCEINT = 24,
- GELIC_NET_GRFANMINT = 28,
-};
+/* virtual interrupt status register bits */
+ /* INT1 */
+#define GELIC_CARD_TX_RAM_FULL_ERR 0x0000000000000001L
+#define GELIC_CARD_RX_RAM_FULL_ERR 0x0000000000000002L
+#define GELIC_CARD_TX_SHORT_FRAME_ERR 0x0000000000000004L
+#define GELIC_CARD_TX_INVALID_DESCR_ERR 0x0000000000000008L
+#define GELIC_CARD_RX_FIFO_FULL_ERR 0x0000000000002000L
+#define GELIC_CARD_RX_DESCR_CHAIN_END 0x0000000000004000L
+#define GELIC_CARD_RX_INVALID_DESCR_ERR 0x0000000000008000L
+#define GELIC_CARD_TX_RESPONCE_ERR 0x0000000000010000L
+#define GELIC_CARD_RX_RESPONCE_ERR 0x0000000000100000L
+#define GELIC_CARD_TX_PROTECTION_ERR 0x0000000000400000L
+#define GELIC_CARD_RX_PROTECTION_ERR 0x0000000004000000L
+#define GELIC_CARD_TX_TCP_UDP_CHECKSUM_ERR 0x0000000008000000L
+#define GELIC_CARD_PORT_STATUS_CHANGED 0x0000000020000000L
+ /* INT 0 */
+#define GELIC_CARD_TX_FLAGGED_DESCR 0x0004000000000000L
+#define GELIC_CARD_RX_FLAGGED_DESCR 0x0040000000000000L
+#define GELIC_CARD_TX_TRANSFER_END 0x0080000000000000L
+#define GELIC_CARD_TX_DESCR_CHAIN_END 0x0100000000000000L
+#define GELIC_CARD_NUMBER_OF_RX_FRAME 0x1000000000000000L
+#define GELIC_CARD_ONE_TIME_COUNT_TIMER 0x4000000000000000L
+#define GELIC_CARD_FREE_RUN_COUNT_TIMER 0x8000000000000000L
+
+/* initial interrupt mask */
+#define GELIC_CARD_TXINT GELIC_CARD_TX_DESCR_CHAIN_END
-/* GHIINT1STS bits */
-enum gelic_net_int1_status {
- GELIC_NET_GDADCEINT = 14,
+#define GELIC_CARD_RXINT (GELIC_CARD_RX_DESCR_CHAIN_END | \
+ GELIC_CARD_NUMBER_OF_RX_FRAME)
+
+ /* RX descriptor data_status bits */
+enum gelic_descr_rx_status {
+ GELIC_DESCR_RXDMADU = 0x80000000, /* destination MAC addr unknown */
+ GELIC_DESCR_RXLSTFBF = 0x40000000, /* last frame buffer */
+ GELIC_DESCR_RXIPCHK = 0x20000000, /* IP checksum performed */
+ GELIC_DESCR_RXTCPCHK = 0x10000000, /* TCP/UDP checksup performed */
+ GELIC_DESCR_RXWTPKT = 0x00C00000, /*
+ * wakeup trigger packet
+ * 01: Magic Packet (TM)
+ * 10: ARP packet
+ * 11: Multicast MAC addr
+ */
+ GELIC_DESCR_RXVLNPKT = 0x00200000, /* VLAN packet */
+ /* bit 20..16 reserved */
+ GELIC_DESCR_RXRRECNUM = 0x0000ff00, /* reception receipt number */
+ /* bit 7..0 reserved */
};
-/* interrupt mask */
-#define GELIC_NET_TXINT (1L << (GELIC_NET_GDTDCEINT + 32))
+#define GELIC_DESCR_DATA_STATUS_CHK_MASK \
+ (GELIC_DESCR_RXIPCHK | GELIC_DESCR_RXTCPCHK)
-#define GELIC_NET_RXINT0 (1L << (GELIC_NET_GRFANMINT + 32))
-#define GELIC_NET_RXINT1 (1L << GELIC_NET_GDADCEINT)
-#define GELIC_NET_RXINT (GELIC_NET_RXINT0 | GELIC_NET_RXINT1)
+ /* TX descriptor data_status bits */
+enum gelic_descr_tx_status {
+ GELIC_DESCR_TX_TAIL = 0x00000001, /* gelic treated this
+ * descriptor was end of
+ * a tx frame
+ */
+};
- /* RX descriptor data_status bits */
-#define GELIC_NET_RXDMADU 0x80000000 /* destination MAC addr unknown */
-#define GELIC_NET_RXLSTFBF 0x40000000 /* last frame buffer */
-#define GELIC_NET_RXIPCHK 0x20000000 /* IP checksum performed */
-#define GELIC_NET_RXTCPCHK 0x10000000 /* TCP/UDP checksup performed */
-#define GELIC_NET_RXIPSPKT 0x08000000 /* IPsec packet */
-#define GELIC_NET_RXIPSAHPRT 0x04000000 /* IPsec AH protocol performed */
-#define GELIC_NET_RXIPSESPPRT 0x02000000 /* IPsec ESP protocol performed */
-#define GELIC_NET_RXSESPAH 0x01000000 /*
- * IPsec ESP protocol auth
- * performed
- */
-
-#define GELIC_NET_RXWTPKT 0x00C00000 /*
- * wakeup trigger packet
- * 01: Magic Packet (TM)
- * 10: ARP packet
- * 11: Multicast MAC addr
- */
-#define GELIC_NET_RXVLNPKT 0x00200000 /* VLAN packet */
-/* bit 20..16 reserved */
-#define GELIC_NET_RXRRECNUM 0x0000ff00 /* reception receipt number */
-#define GELIC_NET_RXRRECNUM_SHIFT 8
-/* bit 7..0 reserved */
-
-#define GELIC_NET_TXDESC_TAIL 0
-#define GELIC_NET_DATA_STATUS_CHK_MASK (GELIC_NET_RXIPCHK | GELIC_NET_RXTCPCHK)
-
-/* RX descriptor data_error bits */
-/* bit 31 reserved */
-#define GELIC_NET_RXALNERR 0x40000000 /* alignement error 10/100M */
-#define GELIC_NET_RXOVERERR 0x20000000 /* oversize error */
-#define GELIC_NET_RXRNTERR 0x10000000 /* Runt error */
-#define GELIC_NET_RXIPCHKERR 0x08000000 /* IP checksum error */
-#define GELIC_NET_RXTCPCHKERR 0x04000000 /* TCP/UDP checksum error */
-#define GELIC_NET_RXUMCHSP 0x02000000 /* unmatched sp on sp */
-#define GELIC_NET_RXUMCHSPI 0x01000000 /* unmatched SPI on SAD */
-#define GELIC_NET_RXUMCHSAD 0x00800000 /* unmatched SAD */
-#define GELIC_NET_RXIPSAHERR 0x00400000 /* auth error on AH protocol
- * processing */
-#define GELIC_NET_RXIPSESPAHERR 0x00200000 /* auth error on ESP protocol
- * processing */
-#define GELIC_NET_RXDRPPKT 0x00100000 /* drop packet */
-#define GELIC_NET_RXIPFMTERR 0x00080000 /* IP packet format error */
-/* bit 18 reserved */
-#define GELIC_NET_RXDATAERR 0x00020000 /* IP packet format error */
-#define GELIC_NET_RXCALERR 0x00010000 /* cariier extension length
- * error */
-#define GELIC_NET_RXCREXERR 0x00008000 /* carrier extention error */
-#define GELIC_NET_RXMLTCST 0x00004000 /* multicast address frame */
-/* bit 13..0 reserved */
-#define GELIC_NET_DATA_ERROR_CHK_MASK \
- (GELIC_NET_RXIPCHKERR | GELIC_NET_RXTCPCHKERR)
+/* RX descriptor data error bits */
+enum gelic_descr_rx_error {
+ /* bit 31 reserved */
+ GELIC_DESCR_RXALNERR = 0x40000000, /* alignement error 10/100M */
+ GELIC_DESCR_RXOVERERR = 0x20000000, /* oversize error */
+ GELIC_DESCR_RXRNTERR = 0x10000000, /* Runt error */
+ GELIC_DESCR_RXIPCHKERR = 0x08000000, /* IP checksum error */
+ GELIC_DESCR_RXTCPCHKERR = 0x04000000, /* TCP/UDP checksum error */
+ GELIC_DESCR_RXDRPPKT = 0x00100000, /* drop packet */
+ GELIC_DESCR_RXIPFMTERR = 0x00080000, /* IP packet format error */
+ /* bit 18 reserved */
+ GELIC_DESCR_RXDATAERR = 0x00020000, /* IP packet format error */
+ GELIC_DESCR_RXCALERR = 0x00010000, /* cariier extension length
+ * error */
+ GELIC_DESCR_RXCREXERR = 0x00008000, /* carrier extention error */
+ GELIC_DESCR_RXMLTCST = 0x00004000, /* multicast address frame */
+ /* bit 13..0 reserved */
+};
+#define GELIC_DESCR_DATA_ERROR_CHK_MASK \
+ (GELIC_DESCR_RXIPCHKERR | GELIC_DESCR_RXTCPCHKERR)
+
+/* DMA command and status (RX and TX)*/
+enum gelic_descr_dma_status {
+ GELIC_DESCR_DMA_COMPLETE = 0x00000000, /* used in tx */
+ GELIC_DESCR_DMA_BUFFER_FULL = 0x00000000, /* used in rx */
+ GELIC_DESCR_DMA_RESPONSE_ERROR = 0x10000000, /* used in rx, tx */
+ GELIC_DESCR_DMA_PROTECTION_ERROR = 0x20000000, /* used in rx, tx */
+ GELIC_DESCR_DMA_FRAME_END = 0x40000000, /* used in rx */
+ GELIC_DESCR_DMA_FORCE_END = 0x50000000, /* used in rx, tx */
+ GELIC_DESCR_DMA_CARDOWNED = 0xa0000000, /* used in rx, tx */
+ GELIC_DESCR_DMA_NOT_IN_USE = 0xb0000000, /* any other value */
+};
+#define GELIC_DESCR_DMA_STAT_MASK (0xf0000000)
/* tx descriptor command and status */
-#define GELIC_NET_DMAC_CMDSTAT_NOCS 0xa0080000 /* middle of frame */
-#define GELIC_NET_DMAC_CMDSTAT_TCPCS 0xa00a0000
-#define GELIC_NET_DMAC_CMDSTAT_UDPCS 0xa00b0000
-#define GELIC_NET_DMAC_CMDSTAT_END_FRAME 0x00040000 /* end of frame */
-
-#define GELIC_NET_DMAC_CMDSTAT_RXDCEIS 0x00000002 /* descriptor chain end
- * interrupt status */
-
-#define GELIC_NET_DMAC_CMDSTAT_CHAIN_END 0x00000002 /* RXDCEIS:DMA stopped */
-#define GELIC_NET_DESCR_IND_PROC_SHIFT 28
-#define GELIC_NET_DESCR_IND_PROC_MASKO 0x0fffffff
-
-
-enum gelic_net_descr_status {
- GELIC_NET_DESCR_COMPLETE = 0x00, /* used in tx */
- GELIC_NET_DESCR_BUFFER_FULL = 0x00, /* used in rx */
- GELIC_NET_DESCR_RESPONSE_ERROR = 0x01, /* used in rx and tx */
- GELIC_NET_DESCR_PROTECTION_ERROR = 0x02, /* used in rx and tx */
- GELIC_NET_DESCR_FRAME_END = 0x04, /* used in rx */
- GELIC_NET_DESCR_FORCE_END = 0x05, /* used in rx and tx */
- GELIC_NET_DESCR_CARDOWNED = 0x0a, /* used in rx and tx */
- GELIC_NET_DESCR_NOT_IN_USE = 0x0b /* any other value */
+enum gelic_descr_tx_dma_status {
+ /* [19] */
+ GELIC_DESCR_TX_DMA_IKE = 0x00080000, /* IPSEC off */
+ /* [18] */
+ GELIC_DESCR_TX_DMA_FRAME_TAIL = 0x00040000, /* last descriptor of
+ * the packet
+ */
+ /* [17..16] */
+ GELIC_DESCR_TX_DMA_TCP_CHKSUM = 0x00020000, /* TCP packet */
+ GELIC_DESCR_TX_DMA_UDP_CHKSUM = 0x00030000, /* UDP packet */
+ GELIC_DESCR_TX_DMA_NO_CHKSUM = 0x00000000, /* no checksum */
+
+ /* [1] */
+ GELIC_DESCR_TX_DMA_CHAIN_END = 0x00000002, /* DMA terminated
+ * due to chain end
+ */
+};
+
+#define GELIC_DESCR_DMA_CMD_NO_CHKSUM \
+ (GELIC_DESCR_DMA_CARDOWNED | GELIC_DESCR_TX_DMA_IKE | \
+ GELIC_DESCR_TX_DMA_NO_CHKSUM)
+
+#define GELIC_DESCR_DMA_CMD_TCP_CHKSUM \
+ (GELIC_DESCR_DMA_CARDOWNED | GELIC_DESCR_TX_DMA_IKE | \
+ GELIC_DESCR_TX_DMA_TCP_CHKSUM)
+
+#define GELIC_DESCR_DMA_CMD_UDP_CHKSUM \
+ (GELIC_DESCR_DMA_CARDOWNED | GELIC_DESCR_TX_DMA_IKE | \
+ GELIC_DESCR_TX_DMA_UDP_CHKSUM)
+
+enum gelic_descr_rx_dma_status {
+ /* [ 1 ] */
+ GELIC_DESCR_RX_DMA_CHAIN_END = 0x00000002, /* DMA terminated
+ * due to chain end
+ */
};
+
/* for lv1_net_control */
-#define GELIC_NET_GET_MAC_ADDRESS 0x0000000000000001
-#define GELIC_NET_GET_ETH_PORT_STATUS 0x0000000000000002
-#define GELIC_NET_SET_NEGOTIATION_MODE 0x0000000000000003
-#define GELIC_NET_GET_VLAN_ID 0x0000000000000004
-
-#define GELIC_NET_LINK_UP 0x0000000000000001
-#define GELIC_NET_FULL_DUPLEX 0x0000000000000002
-#define GELIC_NET_AUTO_NEG 0x0000000000000004
-#define GELIC_NET_SPEED_10 0x0000000000000010
-#define GELIC_NET_SPEED_100 0x0000000000000020
-#define GELIC_NET_SPEED_1000 0x0000000000000040
-
-#define GELIC_NET_VLAN_ALL 0x0000000000000001
-#define GELIC_NET_VLAN_WIRED 0x0000000000000002
-#define GELIC_NET_VLAN_WIRELESS 0x0000000000000003
-#define GELIC_NET_VLAN_PSP 0x0000000000000004
-#define GELIC_NET_VLAN_PORT0 0x0000000000000010
-#define GELIC_NET_VLAN_PORT1 0x0000000000000011
-#define GELIC_NET_VLAN_PORT2 0x0000000000000012
-#define GELIC_NET_VLAN_DAEMON_CLIENT_BSS 0x0000000000000013
-#define GELIC_NET_VLAN_LIBERO_CLIENT_BSS 0x0000000000000014
-#define GELIC_NET_VLAN_NO_ENTRY -6
+enum gelic_lv1_net_control_code {
+ GELIC_LV1_GET_MAC_ADDRESS = 1,
+ GELIC_LV1_GET_ETH_PORT_STATUS = 2,
+ GELIC_LV1_SET_NEGOTIATION_MODE = 3,
+ GELIC_LV1_GET_VLAN_ID = 4,
+};
+
+/* status returened from GET_ETH_PORT_STATUS */
+enum gelic_lv1_ether_port_status {
+ GELIC_LV1_ETHER_LINK_UP = 0x0000000000000001L,
+ GELIC_LV1_ETHER_FULL_DUPLEX = 0x0000000000000002L,
+ GELIC_LV1_ETHER_AUTO_NEG = 0x0000000000000004L,
+
+ GELIC_LV1_ETHER_SPEED_10 = 0x0000000000000010L,
+ GELIC_LV1_ETHER_SPEED_100 = 0x0000000000000020L,
+ GELIC_LV1_ETHER_SPEED_1000 = 0x0000000000000040L,
+ GELIC_LV1_ETHER_SPEED_MASK = 0x0000000000000070L
+};
-#define GELIC_NET_PORT 2 /* for port status */
+enum gelic_lv1_vlan_index {
+ /* for outgoing packets */
+ GELIC_LV1_VLAN_TX_ETHERNET = 0x0000000000000002L,
+ GELIC_LV1_VLAN_TX_WIRELESS = 0x0000000000000003L,
+ /* for incoming packets */
+ GELIC_LV1_VLAN_RX_ETHERNET = 0x0000000000000012L,
+ GELIC_LV1_VLAN_RX_WIRELESS = 0x0000000000000013L
+};
/* size of hardware part of gelic descriptor */
-#define GELIC_NET_DESCR_SIZE (32)
-struct gelic_net_descr {
+#define GELIC_DESCR_SIZE (32)
+struct gelic_descr {
/* as defined by the hardware */
__be32 buf_addr;
__be32 buf_size;
@@ -181,18 +220,18 @@ struct gelic_net_descr {
/* used in the driver */
struct sk_buff *skb;
dma_addr_t bus_addr;
- struct gelic_net_descr *next;
- struct gelic_net_descr *prev;
+ struct gelic_descr *next;
+ struct gelic_descr *prev;
struct vlan_ethhdr vlan;
} __attribute__((aligned(32)));
-struct gelic_net_descr_chain {
+struct gelic_descr_chain {
/* we walk from tail to head */
- struct gelic_net_descr *head;
- struct gelic_net_descr *tail;
+ struct gelic_descr *head;
+ struct gelic_descr *tail;
};
-struct gelic_net_card {
+struct gelic_card {
struct net_device *netdev;
struct napi_struct napi;
/*
@@ -207,8 +246,8 @@ struct gelic_net_card {
u32 vlan_id[GELIC_NET_VLAN_MAX];
int vlan_index;
- struct gelic_net_descr_chain tx_chain;
- struct gelic_net_descr_chain rx_chain;
+ struct gelic_descr_chain tx_chain;
+ struct gelic_descr_chain rx_chain;
int rx_dma_restart_required;
/* gurad dmac descriptor chain*/
spinlock_t chain_lock;
@@ -222,8 +261,8 @@ struct gelic_net_card {
atomic_t tx_timeout_task_counter;
wait_queue_head_t waitq;
- struct gelic_net_descr *tx_top, *rx_top;
- struct gelic_net_descr descr[0];
+ struct gelic_descr *tx_top, *rx_top;
+ struct gelic_descr descr[0];
};
^ permalink raw reply
* [PATCH 4/6] PS3: gelic: remove duplicated ethtool handers
From: Masakazu Mokuno @ 2007-12-13 12:11 UTC (permalink / raw)
To: netdev; +Cc: Linux/PPC Development
In-Reply-To: <20071213181146.BF69.MOKUNO@sm.sony.co.jp>
PS3: gelic: remove duplicated ethtool handers
Remove some ethtool handers, which the common ethtool handlers already has
in functionality
Signed-off-by: Masakazu Mokuno <mokuno@sm.sony.co.jp>
---
drivers/net/ps3_gelic_net.c | 43 +++----------------------------------------
1 file changed, 3 insertions(+), 40 deletions(-)
--- a/drivers/net/ps3_gelic_net.c
+++ b/drivers/net/ps3_gelic_net.c
@@ -1196,28 +1196,6 @@ static int gelic_ether_get_settings(stru
return 0;
}
-static u32 gelic_ether_get_link(struct net_device *netdev)
-{
- struct gelic_card *card = netdev_priv(netdev);
- int status;
- u64 v1, v2;
- int link;
-
- status = lv1_net_control(bus_id(card), dev_id(card),
- GELIC_LV1_GET_ETH_PORT_STATUS,
- GELIC_LV1_VLAN_TX_ETHERNET, 0, 0,
- &v1, &v2);
- if (status)
- return 0; /* link down */
-
- if (v1 & GELIC_LV1_ETHER_LINK_UP)
- link = 1;
- else
- link = 0;
-
- return link;
-}
-
static int gelic_net_nway_reset(struct net_device *netdev)
{
if (netif_running(netdev)) {
@@ -1227,21 +1205,6 @@ static int gelic_net_nway_reset(struct n
return 0;
}
-static u32 gelic_net_get_tx_csum(struct net_device *netdev)
-{
- return (netdev->features & NETIF_F_IP_CSUM) != 0;
-}
-
-static int gelic_net_set_tx_csum(struct net_device *netdev, u32 data)
-{
- if (data)
- netdev->features |= NETIF_F_IP_CSUM;
- else
- netdev->features &= ~NETIF_F_IP_CSUM;
-
- return 0;
-}
-
static u32 gelic_net_get_rx_csum(struct net_device *netdev)
{
struct gelic_card *card = netdev_priv(netdev);
@@ -1260,10 +1223,10 @@ static int gelic_net_set_rx_csum(struct
static struct ethtool_ops gelic_net_ethtool_ops = {
.get_drvinfo = gelic_net_get_drvinfo,
.get_settings = gelic_ether_get_settings,
- .get_link = gelic_ether_get_link,
+ .get_link = ethtool_op_get_link,
.nway_reset = gelic_net_nway_reset,
- .get_tx_csum = gelic_net_get_tx_csum,
- .set_tx_csum = gelic_net_set_tx_csum,
+ .get_tx_csum = ethtool_op_get_tx_csum,
+ .set_tx_csum = ethtool_op_set_tx_csum,
.get_rx_csum = gelic_net_get_rx_csum,
.set_rx_csum = gelic_net_set_rx_csum,
};
^ permalink raw reply
* [PATCH 5/6] PS3: gelic: add support for port link status
From: Masakazu Mokuno @ 2007-12-13 12:13 UTC (permalink / raw)
To: netdev; +Cc: Linux/PPC Development
In-Reply-To: <20071213181146.BF69.MOKUNO@sm.sony.co.jp>
PS3: gelic: add support for port link status
Add support for interrupt driven port link status detection.
Signed-off-by: Masakazu Mokuno <mokuno@sm.sony.co.jp>
---
drivers/net/ps3_gelic_net.c | 77 ++++++++++++++++++++++++++++----------------
drivers/net/ps3_gelic_net.h | 2 +
2 files changed, 52 insertions(+), 27 deletions(-)
--- a/drivers/net/ps3_gelic_net.c
+++ b/drivers/net/ps3_gelic_net.c
@@ -87,6 +87,28 @@ static inline void gelic_card_rx_irq_off
{
gelic_card_set_irq_mask(card, card->ghiintmask & ~GELIC_CARD_RXINT);
}
+
+static void
+gelic_card_get_ether_port_status(struct gelic_card *card, int inform)
+{
+ u64 v2;
+ struct net_device *ether_netdev;
+
+ lv1_net_control(bus_id(card), dev_id(card),
+ GELIC_LV1_GET_ETH_PORT_STATUS,
+ GELIC_LV1_VLAN_TX_ETHERNET, 0, 0,
+ &card->ether_port_status, &v2);
+
+ if (inform) {
+ ether_netdev = card->netdev;
+ if (card->ether_port_status & GELIC_LV1_ETHER_LINK_UP)
+ netif_carrier_on(ether_netdev);
+ else
+ netif_carrier_off(ether_netdev);
+ }
+}
+
+
/**
* gelic_descr_get_status -- returns the status of a descriptor
* @descr: descriptor to look at
@@ -1032,6 +1054,10 @@ static irqreturn_t gelic_card_interrupt(
gelic_card_kick_txdma(card, card->tx_chain.tail);
spin_unlock_irqrestore(&card->tx_dma_lock, flags);
}
+
+ /* ether port status changed */
+ if (status & GELIC_CARD_PORT_STATUS_CHANGED)
+ gelic_card_get_ether_port_status(card, 1);
return IRQ_HANDLED;
}
@@ -1128,13 +1154,14 @@ static int gelic_net_open(struct net_dev
napi_enable(&card->napi);
card->tx_dma_progress = 0;
- card->ghiintmask = GELIC_CARD_RXINT | GELIC_CARD_TXINT;
+ card->ghiintmask = GELIC_CARD_RXINT | GELIC_CARD_TXINT |
+ GELIC_CARD_PORT_STATUS_CHANGED;
gelic_card_set_irq_mask(card, card->ghiintmask);
gelic_card_enable_rxdmac(card);
netif_start_queue(netdev);
- netif_carrier_on(netdev);
+ gelic_card_get_ether_port_status(card, 1);
return 0;
@@ -1157,39 +1184,35 @@ static int gelic_ether_get_settings(stru
struct ethtool_cmd *cmd)
{
struct gelic_card *card = netdev_priv(netdev);
- int status;
- u64 v1, v2;
- int speed, duplex;
- speed = duplex = -1;
- status = lv1_net_control(bus_id(card), dev_id(card),
- GELIC_LV1_GET_ETH_PORT_STATUS,
- GELIC_LV1_VLAN_TX_ETHERNET, 0, 0,
- &v1, &v2);
- if (status) {
- /* link down */
- } else {
- if (v1 & GELIC_LV1_ETHER_FULL_DUPLEX) {
- duplex = DUPLEX_FULL;
- } else {
- duplex = DUPLEX_HALF;
- }
+ gelic_card_get_ether_port_status(card, 0);
- if (v1 & GELIC_LV1_ETHER_SPEED_10) {
- speed = SPEED_10;
- } else if (v1 & GELIC_LV1_ETHER_SPEED_100) {
- speed = SPEED_100;
- } else if (v1 & GELIC_LV1_ETHER_SPEED_1000) {
- speed = SPEED_1000;
- }
+ if (card->ether_port_status & GELIC_LV1_ETHER_FULL_DUPLEX)
+ cmd->duplex = DUPLEX_FULL;
+ else
+ cmd->duplex = DUPLEX_HALF;
+
+ switch (card->ether_port_status & GELIC_LV1_ETHER_SPEED_MASK) {
+ case GELIC_LV1_ETHER_SPEED_10:
+ cmd->speed = SPEED_10;
+ break;
+ case GELIC_LV1_ETHER_SPEED_100:
+ cmd->speed = SPEED_100;
+ break;
+ case GELIC_LV1_ETHER_SPEED_1000:
+ cmd->speed = SPEED_1000;
+ break;
+ default:
+ pr_info("%s: speed unknown\n", __func__);
+ cmd->speed = SPEED_10;
+ break;
}
+
cmd->supported = SUPPORTED_TP | SUPPORTED_Autoneg |
SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full;
cmd->advertising = cmd->supported;
- cmd->speed = speed;
- cmd->duplex = duplex;
cmd->autoneg = AUTONEG_ENABLE; /* always enabled */
cmd->port = PORT_TP;
--- a/drivers/net/ps3_gelic_net.h
+++ b/drivers/net/ps3_gelic_net.h
@@ -261,6 +261,8 @@ struct gelic_card {
atomic_t tx_timeout_task_counter;
wait_queue_head_t waitq;
+ u64 ether_port_status;
+
struct gelic_descr *tx_top, *rx_top;
struct gelic_descr descr[0];
};
^ permalink raw reply
* [PATCH 6/6] PS3: gelic: Add support for dual network interface
From: Masakazu Mokuno @ 2007-12-13 12:16 UTC (permalink / raw)
To: netdev; +Cc: Linux/PPC Development
In-Reply-To: <20071213181146.BF69.MOKUNO@sm.sony.co.jp>
PS3: gelic: Add support for dual network interface
Add support for dual network (net_device) interface so that ethernet
and wireless can own separate ethX interface.
- Export functions which are convenience for both interfaces
- Move irq allocation/release code to driver probe/remove handlers
because interfaces share interrupts.
- Allocate skbs by using dev_alloc_skb() instead netdev_alloc_skb()
as the interfaces share the hardware rx queue.
- Add gelic_port struct in order to abstract dual interface handling
- Change handers for hardware queues so that they can handle dual
{source,destination} interfaces.
- Use new NAPI functions
This is a prerequisite for the new PS3 wireless support.
Signed-off-by: Masakazu Mokuno <mokuno@sm.sony.co.jp>
---
drivers/net/ps3_gelic_net.c | 721 ++++++++++++++++++++++++++------------------
drivers/net/ps3_gelic_net.h | 107 +++++-
2 files changed, 525 insertions(+), 303 deletions(-)
--- a/drivers/net/ps3_gelic_net.c
+++ b/drivers/net/ps3_gelic_net.c
@@ -48,27 +48,19 @@
#include "ps3_gelic_net.h"
#define DRV_NAME "Gelic Network Driver"
-#define DRV_VERSION "1.0"
+#define DRV_VERSION "1.1"
MODULE_AUTHOR("SCE Inc.");
MODULE_DESCRIPTION("Gelic Network driver");
MODULE_LICENSE("GPL");
-static inline struct device *ctodev(struct gelic_card *card)
-{
- return &card->dev->core;
-}
-static inline u64 bus_id(struct gelic_card *card)
-{
- return card->dev->bus_id;
-}
-static inline u64 dev_id(struct gelic_card *card)
-{
- return card->dev->dev_id;
-}
+
+static inline void gelic_card_enable_rxdmac(struct gelic_card *card);
+static inline void gelic_card_disable_rxdmac(struct gelic_card *card);
+static inline void gelic_card_disable_txdmac(struct gelic_card *card);
/* set irq_mask */
-static int gelic_card_set_irq_mask(struct gelic_card *card, u64 mask)
+int gelic_card_set_irq_mask(struct gelic_card *card, u64 mask)
{
int status;
@@ -76,20 +68,23 @@ static int gelic_card_set_irq_mask(struc
mask, 0);
if (status)
dev_info(ctodev(card),
- "lv1_net_set_interrupt_mask failed %d\n", status);
+ "%s failed %d\n", __func__, status);
return status;
}
+
static inline void gelic_card_rx_irq_on(struct gelic_card *card)
{
- gelic_card_set_irq_mask(card, card->ghiintmask | GELIC_CARD_RXINT);
+ card->irq_mask |= GELIC_CARD_RXINT;
+ gelic_card_set_irq_mask(card, card->irq_mask);
}
static inline void gelic_card_rx_irq_off(struct gelic_card *card)
{
- gelic_card_set_irq_mask(card, card->ghiintmask & ~GELIC_CARD_RXINT);
+ card->irq_mask &= ~GELIC_CARD_RXINT;
+ gelic_card_set_irq_mask(card, card->irq_mask);
}
-static void
-gelic_card_get_ether_port_status(struct gelic_card *card, int inform)
+static void gelic_card_get_ether_port_status(struct gelic_card *card,
+ int inform)
{
u64 v2;
struct net_device *ether_netdev;
@@ -100,7 +95,7 @@ gelic_card_get_ether_port_status(struct
&card->ether_port_status, &v2);
if (inform) {
- ether_netdev = card->netdev;
+ ether_netdev = card->netdev[GELIC_PORT_ETHERNET];
if (card->ether_port_status & GELIC_LV1_ETHER_LINK_UP)
netif_carrier_on(ether_netdev);
else
@@ -108,6 +103,46 @@ gelic_card_get_ether_port_status(struct
}
}
+void gelic_card_up(struct gelic_card *card)
+{
+ pr_debug("%s: called\n", __func__);
+ down(&card->updown_lock);
+ if (atomic_inc_return(&card->users) == 1) {
+ pr_debug("%s: real do\n", __func__);
+ /* enable irq */
+ gelic_card_set_irq_mask(card, card->irq_mask);
+ /* start rx */
+ gelic_card_enable_rxdmac(card);
+
+ napi_enable(&card->napi);
+ }
+ up(&card->updown_lock);
+ pr_debug("%s: done\n", __func__);
+}
+
+void gelic_card_down(struct gelic_card *card)
+{
+ u64 mask;
+ pr_debug("%s: called\n", __func__);
+ down(&card->updown_lock);
+ if (atomic_dec_if_positive(&card->users) == 0) {
+ pr_debug("%s: real do\n", __func__);
+ napi_disable(&card->napi);
+ /*
+ * Disable irq. Wireless interrupts will
+ * be disabled later if any
+ */
+ mask = card->irq_mask & (GELIC_CARD_WLAN_EVENT_RECEIVED |
+ GELIC_CARD_WLAN_COMMAND_COMPLETED);
+ gelic_card_set_irq_mask(card, mask);
+ /* stop rx */
+ gelic_card_disable_rxdmac(card);
+ /* stop tx */
+ gelic_card_disable_txdmac(card);
+ }
+ up(&card->updown_lock);
+ pr_debug("%s: done\n", __func__);
+}
/**
* gelic_descr_get_status -- returns the status of a descriptor
@@ -133,8 +168,8 @@ static void gelic_descr_set_status(struc
enum gelic_descr_dma_status status)
{
descr->dmac_cmd_status = cpu_to_be32(status |
- (be32_to_cpu(descr->dmac_cmd_status) &
- ~GELIC_DESCR_DMA_STAT_MASK));
+ (be32_to_cpu(descr->dmac_cmd_status) &
+ ~GELIC_DESCR_DMA_STAT_MASK));
/*
* dma_cmd_status field is used to indicate whether the descriptor
* is valid or not.
@@ -235,21 +270,19 @@ iommu_error:
* Activate the descriptor state-wise
*/
static int gelic_descr_prepare_rx(struct gelic_card *card,
- struct gelic_descr *descr)
+ struct gelic_descr *descr)
{
int offset;
unsigned int bufsize;
if (gelic_descr_get_status(descr) != GELIC_DESCR_DMA_NOT_IN_USE)
dev_info(ctodev(card), "%s: ERROR status \n", __func__);
-
/* we need to round up the buffer size to a multiple of 128 */
bufsize = ALIGN(GELIC_NET_MAX_MTU, GELIC_NET_RXBUF_ALIGN);
/* and we need to have it 128 byte aligned, therefore we allocate a
* bit more */
- descr->skb = netdev_alloc_skb(card->netdev,
- bufsize + GELIC_NET_RXBUF_ALIGN - 1);
+ descr->skb = dev_alloc_skb(bufsize + GELIC_NET_RXBUF_ALIGN - 1);
if (!descr->skb) {
descr->buf_addr = 0; /* tell DMAC don't touch memory */
dev_info(ctodev(card),
@@ -361,16 +394,14 @@ static int gelic_card_alloc_rx_skbs(stru
* releases a used tx descriptor (unmapping, freeing of skb)
*/
static void gelic_descr_release_tx(struct gelic_card *card,
- struct gelic_descr *descr)
+ struct gelic_descr *descr)
{
struct sk_buff *skb = descr->skb;
-#ifdef DEBUG
- BUG_ON(!(be32_to_cpu(descr->data_status) &
- (1 << GELIC_DESCR_TX_DMA_FRAME_TAIL)));
-#endif
- dma_unmap_single(ctodev(card),
- be32_to_cpu(descr->buf_addr), skb->len, DMA_TO_DEVICE);
+ BUG_ON(!(be32_to_cpu(descr->data_status) & GELIC_DESCR_TX_TAIL));
+
+ dma_unmap_single(ctodev(card), be32_to_cpu(descr->buf_addr), skb->len,
+ DMA_TO_DEVICE);
dev_kfree_skb_any(skb);
descr->buf_addr = 0;
@@ -386,6 +417,20 @@ static void gelic_descr_release_tx(struc
gelic_descr_set_status(descr, GELIC_DESCR_DMA_NOT_IN_USE);
}
+static void gelic_card_stop_queues(struct gelic_card *card)
+{
+ netif_stop_queue(card->netdev[GELIC_PORT_ETHERNET]);
+
+ if (card->netdev[GELIC_PORT_WIRELESS])
+ netif_stop_queue(card->netdev[GELIC_PORT_WIRELESS]);
+}
+static void gelic_card_wake_queues(struct gelic_card *card)
+{
+ netif_wake_queue(card->netdev[GELIC_PORT_ETHERNET]);
+
+ if (card->netdev[GELIC_PORT_WIRELESS])
+ netif_wake_queue(card->netdev[GELIC_PORT_WIRELESS]);
+}
/**
* gelic_card_release_tx_chain - processes sent tx descriptors
* @card: adapter structure
@@ -397,12 +442,14 @@ static void gelic_card_release_tx_chain(
{
struct gelic_descr_chain *tx_chain;
enum gelic_descr_dma_status status;
+ struct net_device *netdev;
int release = 0;
for (tx_chain = &card->tx_chain;
tx_chain->head != tx_chain->tail && tx_chain->tail;
tx_chain->tail = tx_chain->tail->next) {
status = gelic_descr_get_status(tx_chain->tail);
+ netdev = tx_chain->tail->skb->dev;
switch (status) {
case GELIC_DESCR_DMA_RESPONSE_ERROR:
case GELIC_DESCR_DMA_PROTECTION_ERROR:
@@ -412,13 +459,13 @@ static void gelic_card_release_tx_chain(
"%s: forcing end of tx descriptor " \
"with status %x\n",
__func__, status);
- card->netdev->stats.tx_dropped++;
+ netdev->stats.tx_dropped++;
break;
case GELIC_DESCR_DMA_COMPLETE:
if (tx_chain->tail->skb) {
- card->netdev->stats.tx_packets++;
- card->netdev->stats.tx_bytes +=
+ netdev->stats.tx_packets++;
+ netdev->stats.tx_bytes +=
tx_chain->tail->skb->len;
}
break;
@@ -435,7 +482,7 @@ static void gelic_card_release_tx_chain(
}
out:
if (!stop && release)
- netif_wake_queue(card->netdev);
+ gelic_card_wake_queues(card);
}
/**
@@ -446,9 +493,9 @@ out:
* netdev interface. It also sets up multicast, allmulti and promisc
* flags appropriately
*/
-static void gelic_net_set_multi(struct net_device *netdev)
+void gelic_net_set_multi(struct net_device *netdev)
{
- struct gelic_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_card(netdev);
struct dev_mc_list *mc;
unsigned int i;
uint8_t *p;
@@ -470,8 +517,8 @@ static void gelic_net_set_multi(struct n
"lv1_net_add_multicast_address failed, %d\n",
status);
- if (netdev->flags & IFF_ALLMULTI
- || netdev->mc_count > GELIC_NET_MC_COUNT_MAX) { /* list max */
+ if ((netdev->flags & IFF_ALLMULTI) ||
+ (netdev->mc_count > GELIC_NET_MC_COUNT_MAX)) {
status = lv1_net_add_multicast_address(bus_id(card),
dev_id(card),
0, 1);
@@ -482,7 +529,7 @@ static void gelic_net_set_multi(struct n
return;
}
- /* set multicast address */
+ /* set multicast addresses */
for (mc = netdev->mc_list; mc; mc = mc->next) {
addr = 0;
p = mc->dmi_addr;
@@ -511,6 +558,15 @@ static inline void gelic_card_enable_rxd
{
int status;
+ if (gelic_descr_get_status(card->rx_chain.head) !=
+ GELIC_DESCR_DMA_CARDOWNED) {
+ printk(KERN_ERR "%s: status=%x\n", __func__,
+ be32_to_cpu(card->rx_chain.tail->dmac_cmd_status));
+ printk(KERN_ERR "%s: nextphy=%x\n", __func__,
+ be32_to_cpu(card->rx_chain.tail->next_descr_addr));
+ printk(KERN_ERR "%s: tail=%p\n", __func__,
+ card->rx_chain.tail);
+ }
status = lv1_net_start_rx_dma(bus_id(card), dev_id(card),
card->rx_chain.tail->bus_addr, 0);
if (status)
@@ -560,33 +616,19 @@ static inline void gelic_card_disable_tx
*
* always returns 0
*/
-static int gelic_net_stop(struct net_device *netdev)
+int gelic_net_stop(struct net_device *netdev)
{
- struct gelic_card *card = netdev_priv(netdev);
-
- napi_disable(&card->napi);
- netif_stop_queue(netdev);
-
- /* turn off DMA, force end */
- gelic_card_disable_rxdmac(card);
- gelic_card_disable_txdmac(card);
-
- gelic_card_set_irq_mask(card, 0);
+ struct gelic_card *card;
- /* disconnect event port */
- free_irq(card->netdev->irq, card->netdev);
- ps3_sb_event_receive_port_destroy(card->dev, card->netdev->irq);
- card->netdev->irq = NO_IRQ;
+ pr_debug("%s: start\n", __func__);
+ netif_stop_queue(netdev);
netif_carrier_off(netdev);
- /* release chains */
- gelic_card_release_tx_chain(card, 1);
- gelic_card_release_rx_chain(card);
-
- gelic_card_free_chain(card, card->tx_top);
- gelic_card_free_chain(card, card->rx_top);
+ card = netdev_card(netdev);
+ gelic_card_down(card);
+ pr_debug("%s: done\n", __func__);
return 0;
}
@@ -612,7 +654,7 @@ gelic_card_get_next_tx_descr(struct geli
}
/**
- * gelic_descr_set_tx_cmdstat - sets the tx descriptor command field
+ * gelic_net_set_txdescr_cmdstat - sets the tx descriptor command field
* @descr: descriptor structure to fill out
* @skb: packet to consider
*
@@ -677,7 +719,7 @@ static inline struct sk_buff *gelic_put_
}
/**
- * gelic_descr_prepare_tx - get dma address of skb_data
+ * gelic_descr_prepare_tx - setup a descriptor for sending packets
* @card: card structure
* @descr: descriptor structure
* @skb: packet to use
@@ -691,10 +733,13 @@ static int gelic_descr_prepare_tx(struct
{
dma_addr_t buf;
- if (card->vlan_index != -1) {
+ if (card->vlan_required) {
struct sk_buff *skb_tmp;
+ enum gelic_port_type type;
+
+ type = netdev_port(skb->dev)->type;
skb_tmp = gelic_put_vlan_tag(skb,
- card->vlan_id[card->vlan_index]);
+ card->vlan[type].tx);
if (!skb_tmp)
return -ENOMEM;
skb = skb_tmp;
@@ -753,14 +798,14 @@ static int gelic_card_kick_txdma(struct
*
* returns 0 on success, <0 on failure
*/
-static int gelic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
+int gelic_net_xmit(struct sk_buff *skb, struct net_device *netdev)
{
- struct gelic_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_card(netdev);
struct gelic_descr *descr;
int result;
unsigned long flags;
- spin_lock_irqsave(&card->tx_dma_lock, flags);
+ spin_lock_irqsave(&card->tx_lock, flags);
gelic_card_release_tx_chain(card, 0);
@@ -769,8 +814,8 @@ static int gelic_net_xmit(struct sk_buff
/*
* no more descriptors free
*/
- netif_stop_queue(netdev);
- spin_unlock_irqrestore(&card->tx_dma_lock, flags);
+ gelic_card_stop_queues(card);
+ spin_unlock_irqrestore(&card->tx_lock, flags);
return NETDEV_TX_BUSY;
}
@@ -780,9 +825,9 @@ static int gelic_net_xmit(struct sk_buff
* DMA map failed. As chanses are that failure
* would continue, just release skb and return
*/
- card->netdev->stats.tx_dropped++;
+ netdev->stats.tx_dropped++;
dev_kfree_skb_any(skb);
- spin_unlock_irqrestore(&card->tx_dma_lock, flags);
+ spin_unlock_irqrestore(&card->tx_lock, flags);
return NETDEV_TX_OK;
}
/*
@@ -800,7 +845,7 @@ static int gelic_net_xmit(struct sk_buff
* kick failed.
* release descriptors which were just prepared
*/
- card->netdev->stats.tx_dropped++;
+ netdev->stats.tx_dropped++;
gelic_descr_release_tx(card, descr);
gelic_descr_release_tx(card, descr->next);
card->tx_chain.tail = descr->next->next;
@@ -810,7 +855,7 @@ static int gelic_net_xmit(struct sk_buff
netdev->trans_start = jiffies;
}
- spin_unlock_irqrestore(&card->tx_dma_lock, flags);
+ spin_unlock_irqrestore(&card->tx_lock, flags);
return NETDEV_TX_OK;
}
@@ -818,27 +863,27 @@ static int gelic_net_xmit(struct sk_buff
* gelic_net_pass_skb_up - takes an skb from a descriptor and passes it on
* @descr: descriptor to process
* @card: card structure
+ * @netdev: net_device structure to be passed packet
*
* iommu-unmaps the skb, fills out skb structure and passes the data to the
* stack. The descriptor state is not changed.
*/
static void gelic_net_pass_skb_up(struct gelic_descr *descr,
- struct gelic_card *card)
+ struct gelic_card *card,
+ struct net_device *netdev)
+
{
- struct sk_buff *skb;
- struct net_device *netdev;
+ struct sk_buff *skb = descr->skb;
u32 data_status, data_error;
data_status = be32_to_cpu(descr->data_status);
data_error = be32_to_cpu(descr->data_error);
- netdev = card->netdev;
/* unmap skb buffer */
- skb = descr->skb;
- dma_unmap_single(ctodev(card),
- be32_to_cpu(descr->buf_addr), GELIC_NET_MAX_MTU,
+ dma_unmap_single(ctodev(card), be32_to_cpu(descr->buf_addr),
+ GELIC_NET_MAX_MTU,
DMA_FROM_DEVICE);
- skb_put(skb, descr->valid_size ?
+ skb_put(skb, be32_to_cpu(descr->valid_size)?
be32_to_cpu(descr->valid_size) :
be32_to_cpu(descr->result_size));
if (!descr->valid_size)
@@ -866,8 +911,8 @@ static void gelic_net_pass_skb_up(struct
skb->ip_summed = CHECKSUM_NONE;
/* update netdevice statistics */
- card->netdev->stats.rx_packets++;
- card->netdev->stats.rx_bytes += skb->len;
+ netdev->stats.rx_packets++;
+ netdev->stats.rx_bytes += skb->len;
/* pass skb up to stack */
netif_receive_skb(skb);
@@ -887,6 +932,7 @@ static int gelic_card_decode_one_descr(s
enum gelic_descr_dma_status status;
struct gelic_descr_chain *chain = &card->rx_chain;
struct gelic_descr *descr = chain->tail;
+ struct net_device *netdev = NULL;
int dmac_chain_ended;
status = gelic_descr_get_status(descr);
@@ -903,12 +949,30 @@ static int gelic_card_decode_one_descr(s
return 0;
}
+ /* netdevice select */
+ if (card->vlan_required) {
+ unsigned int i;
+ u16 vid;
+ vid = *(u16 *)(descr->skb->data) & VLAN_VID_MASK;
+ for (i = 0; i < GELIC_PORT_MAX; i++) {
+ if (card->vlan[i].rx == vid) {
+ netdev = card->netdev[i];
+ break;
+ }
+ };
+ if (GELIC_PORT_MAX <= i) {
+ pr_info("%s: unknown packet vid=%x\n", __func__, vid);
+ goto refill;
+ }
+ } else
+ netdev = card->netdev[GELIC_PORT_ETHERNET];
+
if ((status == GELIC_DESCR_DMA_RESPONSE_ERROR) ||
(status == GELIC_DESCR_DMA_PROTECTION_ERROR) ||
(status == GELIC_DESCR_DMA_FORCE_END)) {
dev_info(ctodev(card), "dropping RX descriptor with state %x\n",
status);
- card->netdev->stats.rx_dropped++;
+ netdev->stats.rx_dropped++;
goto refill;
}
@@ -936,7 +1000,7 @@ static int gelic_card_decode_one_descr(s
}
/* ok, we've got a packet in descr */
- gelic_net_pass_skb_up(descr, card);
+ gelic_net_pass_skb_up(descr, card, netdev);
refill:
/*
* So that always DMAC can see the end
@@ -976,17 +1040,15 @@ refill:
/**
* gelic_net_poll - NAPI poll function called by the stack to return packets
- * @netdev: interface device structure
+ * @napi: napi structure
* @budget: number of packets we can pass to the stack at most
*
- * returns 0 if no more packets available to the driver/stack. Returns 1,
- * if the quota is exceeded, but the driver has still packets.
+ * returns the number of the processed packets
*
*/
static int gelic_net_poll(struct napi_struct *napi, int budget)
{
struct gelic_card *card = container_of(napi, struct gelic_card, napi);
- struct net_device *netdev = card->netdev;
int packets_done = 0;
while (packets_done < budget) {
@@ -997,7 +1059,7 @@ static int gelic_net_poll(struct napi_st
}
if (packets_done < budget) {
- netif_rx_complete(netdev, napi);
+ napi_complete(napi);
gelic_card_rx_irq_on(card);
}
return packets_done;
@@ -1009,7 +1071,7 @@ static int gelic_net_poll(struct napi_st
*
* returns 0 on success, <0 on failure
*/
-static int gelic_net_change_mtu(struct net_device *netdev, int new_mtu)
+int gelic_net_change_mtu(struct net_device *netdev, int new_mtu)
{
/* no need to re-alloc skbs or so -- the max mtu is about 2.3k
* and mtu is outbound only anyway */
@@ -1027,8 +1089,7 @@ static int gelic_net_change_mtu(struct n
static irqreturn_t gelic_card_interrupt(int irq, void *ptr)
{
unsigned long flags;
- struct net_device *netdev = ptr;
- struct gelic_card *card = netdev_priv(netdev);
+ struct gelic_card *card = ptr;
u64 status;
status = card->irq_status;
@@ -1036,6 +1097,8 @@ static irqreturn_t gelic_card_interrupt(
if (!status)
return IRQ_NONE;
+ status &= card->irq_mask;
+
if (card->rx_dma_restart_required) {
card->rx_dma_restart_required = 0;
gelic_card_enable_rxdmac(card);
@@ -1043,21 +1106,22 @@ static irqreturn_t gelic_card_interrupt(
if (status & GELIC_CARD_RXINT) {
gelic_card_rx_irq_off(card);
- netif_rx_schedule(netdev, &card->napi);
+ napi_schedule(&card->napi);
}
if (status & GELIC_CARD_TXINT) {
- spin_lock_irqsave(&card->tx_dma_lock, flags);
+ spin_lock_irqsave(&card->tx_lock, flags);
card->tx_dma_progress = 0;
gelic_card_release_tx_chain(card, 0);
/* kick outstanding tx descriptor if any */
gelic_card_kick_txdma(card, card->tx_chain.tail);
- spin_unlock_irqrestore(&card->tx_dma_lock, flags);
+ spin_unlock_irqrestore(&card->tx_lock, flags);
}
/* ether port status changed */
if (status & GELIC_CARD_PORT_STATUS_CHANGED)
gelic_card_get_ether_port_status(card, 1);
+
return IRQ_HANDLED;
}
@@ -1070,53 +1134,15 @@ static irqreturn_t gelic_card_interrupt(
*/
static void gelic_net_poll_controller(struct net_device *netdev)
{
- struct gelic_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_card(netdev);
gelic_card_set_irq_mask(card, 0);
gelic_card_interrupt(netdev->irq, netdev);
- gelic_card_set_irq_mask(card, card->ghiintmask);
+ gelic_card_set_irq_mask(card, card->irq_mask);
}
#endif /* CONFIG_NET_POLL_CONTROLLER */
/**
- * gelic_card_open - open device and map dma region
- * @card: card structure
- */
-static int gelic_card_open(struct gelic_card *card)
-{
- int result;
-
- result = ps3_sb_event_receive_port_setup(card->dev, PS3_BINDING_CPU_ANY,
- &card->netdev->irq);
-
- if (result) {
- dev_info(ctodev(card),
- "%s:%d: recieve_port_setup failed (%d)\n",
- __func__, __LINE__, result);
- result = -EPERM;
- goto fail_alloc_irq;
- }
-
- result = request_irq(card->netdev->irq, gelic_card_interrupt,
- IRQF_DISABLED, card->netdev->name, card->netdev);
-
- if (result) {
- dev_info(ctodev(card), "%s:%d: request_irq failed (%d)\n",
- __func__, __LINE__, result);
- goto fail_request_irq;
- }
-
- return 0;
-
-fail_request_irq:
- ps3_sb_event_receive_port_destroy(card->dev, card->netdev->irq);
- card->netdev->irq = NO_IRQ;
-fail_alloc_irq:
- return result;
-}
-
-
-/**
* gelic_net_open - called upon ifonfig up
* @netdev: interface device structure
*
@@ -1125,56 +1151,23 @@ fail_alloc_irq:
* gelic_net_open allocates all the descriptors and memory needed for
* operation, sets up multicast list and enables interrupts
*/
-static int gelic_net_open(struct net_device *netdev)
+int gelic_net_open(struct net_device *netdev)
{
- struct gelic_card *card = netdev_priv(netdev);
-
- dev_dbg(ctodev(card), " -> %s:%d\n", __func__, __LINE__);
-
- gelic_card_open(card);
-
- if (gelic_card_init_chain(card, &card->tx_chain,
- card->descr, GELIC_NET_TX_DESCRIPTORS))
- goto alloc_tx_failed;
- if (gelic_card_init_chain(card, &card->rx_chain,
- card->descr + GELIC_NET_TX_DESCRIPTORS,
- GELIC_NET_RX_DESCRIPTORS))
- goto alloc_rx_failed;
+ struct gelic_card *card = netdev_card(netdev);
- /* head of chain */
- card->tx_top = card->tx_chain.head;
- card->rx_top = card->rx_chain.head;
- dev_dbg(ctodev(card), "descr rx %p, tx %p, size %#lx, num %#x\n",
- card->rx_top, card->tx_top, sizeof(struct gelic_descr),
- GELIC_NET_RX_DESCRIPTORS);
- /* allocate rx skbs */
- if (gelic_card_alloc_rx_skbs(card))
- goto alloc_skbs_failed;
+ dev_dbg(ctodev(card), " -> %s %p\n", __func__, netdev);
- napi_enable(&card->napi);
-
- card->tx_dma_progress = 0;
- card->ghiintmask = GELIC_CARD_RXINT | GELIC_CARD_TXINT |
- GELIC_CARD_PORT_STATUS_CHANGED;
-
- gelic_card_set_irq_mask(card, card->ghiintmask);
- gelic_card_enable_rxdmac(card);
+ gelic_card_up(card);
netif_start_queue(netdev);
gelic_card_get_ether_port_status(card, 1);
+ dev_dbg(ctodev(card), " <- %s\n", __func__);
return 0;
-
-alloc_skbs_failed:
- gelic_card_free_chain(card, card->rx_top);
-alloc_rx_failed:
- gelic_card_free_chain(card, card->tx_top);
-alloc_tx_failed:
- return -ENOMEM;
}
-static void gelic_net_get_drvinfo(struct net_device *netdev,
- struct ethtool_drvinfo *info)
+void gelic_net_get_drvinfo(struct net_device *netdev,
+ struct ethtool_drvinfo *info)
{
strncpy(info->driver, DRV_NAME, sizeof(info->driver) - 1);
strncpy(info->version, DRV_VERSION, sizeof(info->version) - 1);
@@ -1183,7 +1176,7 @@ static void gelic_net_get_drvinfo(struct
static int gelic_ether_get_settings(struct net_device *netdev,
struct ethtool_cmd *cmd)
{
- struct gelic_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_card(netdev);
gelic_card_get_ether_port_status(card, 0);
@@ -1219,35 +1212,25 @@ static int gelic_ether_get_settings(stru
return 0;
}
-static int gelic_net_nway_reset(struct net_device *netdev)
-{
- if (netif_running(netdev)) {
- gelic_net_stop(netdev);
- gelic_net_open(netdev);
- }
- return 0;
-}
-
-static u32 gelic_net_get_rx_csum(struct net_device *netdev)
+u32 gelic_net_get_rx_csum(struct net_device *netdev)
{
- struct gelic_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_card(netdev);
return card->rx_csum;
}
-static int gelic_net_set_rx_csum(struct net_device *netdev, u32 data)
+int gelic_net_set_rx_csum(struct net_device *netdev, u32 data)
{
- struct gelic_card *card = netdev_priv(netdev);
+ struct gelic_card *card = netdev_card(netdev);
card->rx_csum = data;
return 0;
}
-static struct ethtool_ops gelic_net_ethtool_ops = {
+static struct ethtool_ops gelic_ether_ethtool_ops = {
.get_drvinfo = gelic_net_get_drvinfo,
.get_settings = gelic_ether_get_settings,
.get_link = ethtool_op_get_link,
- .nway_reset = gelic_net_nway_reset,
.get_tx_csum = ethtool_op_get_tx_csum,
.set_tx_csum = ethtool_op_set_tx_csum,
.get_rx_csum = gelic_net_get_rx_csum,
@@ -1265,7 +1248,7 @@ static void gelic_net_tx_timeout_task(st
{
struct gelic_card *card =
container_of(work, struct gelic_card, tx_timeout_task);
- struct net_device *netdev = card->netdev;
+ struct net_device *netdev = card->netdev[GELIC_PORT_ETHERNET];
dev_info(ctodev(card), "%s:Timed out. Restarting... \n", __func__);
@@ -1288,11 +1271,11 @@ out:
*
* called, if tx hangs. Schedules a task that resets the interface
*/
-static void gelic_net_tx_timeout(struct net_device *netdev)
+void gelic_net_tx_timeout(struct net_device *netdev)
{
struct gelic_card *card;
- card = netdev_priv(netdev);
+ card = netdev_card(netdev);
atomic_inc(&card->tx_timeout_task_counter);
if (netdev->flags & IFF_UP)
schedule_work(&card->tx_timeout_task);
@@ -1306,7 +1289,8 @@ static void gelic_net_tx_timeout(struct
*
* fills out function pointers in the net_device structure
*/
-static void gelic_ether_setup_netdev_ops(struct net_device *netdev)
+static void gelic_ether_setup_netdev_ops(struct net_device *netdev,
+ struct napi_struct *napi)
{
netdev->open = &gelic_net_open;
netdev->stop = &gelic_net_stop;
@@ -1316,86 +1300,63 @@ static void gelic_ether_setup_netdev_ops
/* tx watchdog */
netdev->tx_timeout = &gelic_net_tx_timeout;
netdev->watchdog_timeo = GELIC_NET_WATCHDOG_TIMEOUT;
- netdev->ethtool_ops = &gelic_net_ethtool_ops;
+ /* NAPI */
+ netif_napi_add(netdev, napi,
+ gelic_net_poll, GELIC_NET_NAPI_WEIGHT);
+ netdev->ethtool_ops = &gelic_ether_ethtool_ops;
+#ifdef CONFIG_NET_POLL_CONTROLLER
+ netdev->poll_controller = gelic_net_poll_controller;
+#endif
}
/**
- * gelic_net_setup_netdev - initialization of net_device
+ * gelic_ether_setup_netdev - initialization of net_device
+ * @netdev: net_device structure
* @card: card structure
*
* Returns 0 on success or <0 on failure
*
- * gelic_net_setup_netdev initializes the net_device structure
+ * gelic_ether_setup_netdev initializes the net_device structure
+ * and register it.
**/
-static int gelic_net_setup_netdev(struct gelic_card *card)
+int gelic_net_setup_netdev(struct net_device *netdev, struct gelic_card *card)
{
- struct net_device *netdev = card->netdev;
- struct sockaddr addr;
- unsigned int i;
int status;
u64 v1, v2;
DECLARE_MAC_BUF(mac);
- SET_NETDEV_DEV(netdev, &card->dev->core);
- spin_lock_init(&card->tx_dma_lock);
-
- card->rx_csum = GELIC_NET_RX_CSUM_DEFAULT;
-
- gelic_ether_setup_netdev_ops(netdev);
-
- netif_napi_add(netdev, &card->napi,
- gelic_net_poll, GELIC_NET_NAPI_WEIGHT);
-
netdev->features = NETIF_F_IP_CSUM;
status = lv1_net_control(bus_id(card), dev_id(card),
GELIC_LV1_GET_MAC_ADDRESS,
0, 0, 0, &v1, &v2);
+ v1 <<= 16;
if (status || !is_valid_ether_addr((u8 *)&v1)) {
dev_info(ctodev(card),
"%s:lv1_net_control GET_MAC_ADDR failed %d\n",
__func__, status);
return -EINVAL;
}
- v1 <<= 16;
- memcpy(addr.sa_data, &v1, ETH_ALEN);
- memcpy(netdev->dev_addr, addr.sa_data, ETH_ALEN);
- dev_info(ctodev(card), "MAC addr %s\n",
- print_mac(mac, netdev->dev_addr));
+ memcpy(netdev->dev_addr, &v1, ETH_ALEN);
- card->vlan_index = -1; /* no vlan */
- for (i = 0; i < GELIC_NET_VLAN_MAX; i++) {
- status = lv1_net_control(bus_id(card), dev_id(card),
- GELIC_LV1_GET_VLAN_ID,
- i + 1, /* index; one based */
- 0, 0, &v1, &v2);
- if (status == LV1_NO_ENTRY) {
- dev_dbg(ctodev(card),
- "GELIC_VLAN_ID no entry:%d, VLAN disabled\n",
- status);
- card->vlan_id[i] = 0;
- } else if (status) {
- dev_dbg(ctodev(card),
- "%s:get vlan id faild, status=%d\n",
- __func__, status);
- card->vlan_id[i] = 0;
- } else {
- card->vlan_id[i] = (u32)v1;
- dev_dbg(ctodev(card), "vlan_id:%d, %lx\n", i, v1);
- }
- }
-
- if (card->vlan_id[GELIC_LV1_VLAN_TX_ETHERNET - 1]) {
- card->vlan_index = GELIC_LV1_VLAN_TX_ETHERNET - 1;
+ if (card->vlan_required) {
netdev->hard_header_len += VLAN_HLEN;
+ /*
+ * As vlan is internally used,
+ * we can not receive vlan packets
+ */
+ netdev->features |= NETIF_F_VLAN_CHALLENGED;
}
status = register_netdev(netdev);
if (status) {
- dev_err(ctodev(card), "%s:Couldn't register net_device: %d\n",
- __func__, status);
+ dev_err(ctodev(card), "%s:Couldn't register %s %d\n",
+ __func__, netdev->name, status);
return status;
}
+ dev_info(ctodev(card), "%s: MAC addr %s\n",
+ netdev->name,
+ print_mac(mac, netdev->dev_addr));
return 0;
}
@@ -1407,72 +1368,171 @@ static int gelic_net_setup_netdev(struct
*
* the card and net_device structures are linked to each other
*/
-static struct gelic_card *gelic_alloc_card_net(void)
+#define GELIC_ALIGN (32)
+static struct gelic_card *gelic_alloc_card_net(struct net_device **netdev)
{
- struct net_device *netdev;
struct gelic_card *card;
+ struct gelic_port *port;
+ void *p;
size_t alloc_size;
-
- alloc_size = sizeof(*card) +
- sizeof(struct gelic_descr) * GELIC_NET_RX_DESCRIPTORS +
- sizeof(struct gelic_descr) * GELIC_NET_TX_DESCRIPTORS;
/*
- * we assume private data is allocated 32 bytes (or more) aligned
- * so that gelic_descr should be 32 bytes aligned.
- * Current alloc_etherdev() does do it because NETDEV_ALIGN
- * is 32.
- * check this assumption here.
+ * gelic requires dma descriptor is 32 bytes aligned and
+ * the hypervisor requires irq_status is 8 bytes aligned.
*/
- BUILD_BUG_ON(NETDEV_ALIGN < 32);
BUILD_BUG_ON(offsetof(struct gelic_card, irq_status) % 8);
BUILD_BUG_ON(offsetof(struct gelic_card, descr) % 32);
+ alloc_size =
+ sizeof(struct gelic_card) +
+ sizeof(struct gelic_descr) * GELIC_NET_RX_DESCRIPTORS +
+ sizeof(struct gelic_descr) * GELIC_NET_TX_DESCRIPTORS +
+ GELIC_ALIGN - 1;
+
+ p = kzalloc(alloc_size, GFP_KERNEL);
+ if (!p)
+ return NULL;
+ card = PTR_ALIGN(p, GELIC_ALIGN);
+ card->unalign = p;
- netdev = alloc_etherdev(alloc_size);
- if (!netdev)
+ /*
+ * alloc netdev
+ */
+ *netdev = alloc_etherdev(sizeof(struct gelic_port));
+ if (!netdev) {
+ kfree(card->unalign);
return NULL;
+ }
+ port = netdev_priv(*netdev);
+
+ /* gelic_port */
+ port->netdev = *netdev;
+ port->card = card;
+ port->type = GELIC_PORT_ETHERNET;
+
+ /* gelic_card */
+ card->netdev[GELIC_PORT_ETHERNET] = *netdev;
- card = netdev_priv(netdev);
- card->netdev = netdev;
INIT_WORK(&card->tx_timeout_task, gelic_net_tx_timeout_task);
init_waitqueue_head(&card->waitq);
atomic_set(&card->tx_timeout_task_counter, 0);
+ init_MUTEX(&card->updown_lock);
+ atomic_set(&card->users, 0);
return card;
}
+static void gelic_card_get_vlan_info(struct gelic_card *card)
+{
+ u64 v1, v2;
+ int status;
+ unsigned int i;
+ struct {
+ int tx;
+ int rx;
+ } vlan_id_ix[2] = {
+ [GELIC_PORT_ETHERNET] = {
+ .tx = GELIC_LV1_VLAN_TX_ETHERNET,
+ .rx = GELIC_LV1_VLAN_RX_ETHERNET
+ },
+ [GELIC_PORT_WIRELESS] = {
+ .tx = GELIC_LV1_VLAN_TX_WIRELESS,
+ .rx = GELIC_LV1_VLAN_RX_WIRELESS
+ }
+ };
+
+ for (i = 0; i < ARRAY_SIZE(vlan_id_ix); i++) {
+ /* tx tag */
+ status = lv1_net_control(bus_id(card), dev_id(card),
+ GELIC_LV1_GET_VLAN_ID,
+ vlan_id_ix[i].tx,
+ 0, 0, &v1, &v2);
+ if (status || !v1) {
+ if (status != LV1_NO_ENTRY)
+ dev_dbg(ctodev(card),
+ "get vlan id for tx(%d) failed(%d)\n",
+ vlan_id_ix[i].tx, status);
+ card->vlan[i].tx = 0;
+ card->vlan[i].rx = 0;
+ continue;
+ }
+ card->vlan[i].tx = (u16)v1;
+
+ /* rx tag */
+ status = lv1_net_control(bus_id(card), dev_id(card),
+ GELIC_LV1_GET_VLAN_ID,
+ vlan_id_ix[i].rx,
+ 0, 0, &v1, &v2);
+ if (status || !v1) {
+ if (status != LV1_NO_ENTRY)
+ dev_info(ctodev(card),
+ "get vlan id for rx(%d) failed(%d)\n",
+ vlan_id_ix[i].rx, status);
+ card->vlan[i].tx = 0;
+ card->vlan[i].rx = 0;
+ continue;
+ }
+ card->vlan[i].rx = (u16)v1;
+
+ dev_dbg(ctodev(card), "vlan_id[%d] tx=%02x rx=%02x\n",
+ i, card->vlan[i].tx, card->vlan[i].rx);
+ }
+
+ if (card->vlan[GELIC_PORT_ETHERNET].tx) {
+ BUG_ON(!card->vlan[GELIC_PORT_WIRELESS].tx);
+ card->vlan_required = 1;
+ } else
+ card->vlan_required = 0;
+
+ /* check wirelss capable firmware */
+ if (ps3_compare_firmware_version(1, 6, 0) < 0) {
+ card->vlan[GELIC_PORT_WIRELESS].tx = 0;
+ card->vlan[GELIC_PORT_WIRELESS].rx = 0;
+ }
+
+ dev_info(ctodev(card), "internal vlan %s\n",
+ card->vlan_required? "enabled" : "disabled");
+}
/**
* ps3_gelic_driver_probe - add a device to the control of this driver
*/
static int ps3_gelic_driver_probe(struct ps3_system_bus_device *dev)
{
- struct gelic_card *card = gelic_alloc_card_net();
+ struct gelic_card *card;
+ struct net_device *netdev;
int result;
- if (!card) {
- dev_info(&dev->core, "gelic_net_alloc_card failed\n");
- result = -ENOMEM;
- goto fail_alloc_card;
- }
-
- ps3_system_bus_set_driver_data(dev, card);
- card->dev = dev;
-
+ pr_debug("%s: called\n", __func__);
result = ps3_open_hv_device(dev);
if (result) {
- dev_dbg(&dev->core, "ps3_open_hv_device failed\n");
+ dev_dbg(&dev->core, "%s:ps3_open_hv_device failed\n",
+ __func__);
goto fail_open;
}
result = ps3_dma_region_create(dev->d_region);
if (result) {
- dev_dbg(&dev->core, "ps3_dma_region_create failed(%d)\n",
- result);
+ dev_dbg(&dev->core, "%s:ps3_dma_region_create failed(%d)\n",
+ __func__, result);
BUG_ON("check region type");
goto fail_dma_region;
}
+ /* alloc card/netdevice */
+ card = gelic_alloc_card_net(&netdev);
+ if (!card) {
+ dev_info(&dev->core, "%s:gelic_net_alloc_card failed\n",
+ __func__);
+ result = -ENOMEM;
+ goto fail_alloc_card;
+ }
+ ps3_system_bus_set_driver_data(dev, card);
+ card->dev = dev;
+
+ /* get internal vlan info */
+ gelic_card_get_vlan_info(card);
+
+ /* setup interrupt */
result = lv1_net_set_interrupt_status_indicator(bus_id(card),
dev_id(card),
ps3_mm_phys_to_lpar(__pa(&card->irq_status)),
@@ -1480,34 +1540,95 @@ static int ps3_gelic_driver_probe(struct
if (result) {
dev_dbg(&dev->core,
- "lv1_net_set_interrupt_status_indicator failed: %s\n",
- ps3_result(result));
+ "%s:set_interrupt_status_indicator failed: %s\n",
+ __func__, ps3_result(result));
result = -EIO;
goto fail_status_indicator;
}
- result = gelic_net_setup_netdev(card);
+ result = ps3_sb_event_receive_port_setup(dev, PS3_BINDING_CPU_ANY,
+ &card->irq);
if (result) {
- dev_dbg(&dev->core, "%s:%d: ps3_dma_region_create failed: "
- "(%d)\n", __func__, __LINE__, result);
+ dev_info(ctodev(card),
+ "%s:gelic_net_open_device failed (%d)\n",
+ __func__, result);
+ result = -EPERM;
+ goto fail_alloc_irq;
+ }
+ result = request_irq(card->irq, gelic_card_interrupt,
+ IRQF_DISABLED, netdev->name, card);
+
+ if (result) {
+ dev_info(ctodev(card), "%s:request_irq failed (%d)\n",
+ __func__, result);
+ goto fail_request_irq;
+ }
+
+ /* setup card structure */
+ card->irq_mask = GELIC_CARD_RXINT | GELIC_CARD_TXINT |
+ GELIC_CARD_PORT_STATUS_CHANGED;
+ card->rx_csum = GELIC_CARD_RX_CSUM_DEFAULT;
+
+
+ if (gelic_card_init_chain(card, &card->tx_chain,
+ card->descr, GELIC_NET_TX_DESCRIPTORS))
+ goto fail_alloc_tx;
+ if (gelic_card_init_chain(card, &card->rx_chain,
+ card->descr + GELIC_NET_TX_DESCRIPTORS,
+ GELIC_NET_RX_DESCRIPTORS))
+ goto fail_alloc_rx;
+
+ /* head of chain */
+ card->tx_top = card->tx_chain.head;
+ card->rx_top = card->rx_chain.head;
+ dev_dbg(ctodev(card), "descr rx %p, tx %p, size %#lx, num %#x\n",
+ card->rx_top, card->tx_top, sizeof(struct gelic_descr),
+ GELIC_NET_RX_DESCRIPTORS);
+ /* allocate rx skbs */
+ if (gelic_card_alloc_rx_skbs(card))
+ goto fail_alloc_skbs;
+
+ spin_lock_init(&card->tx_lock);
+ card->tx_dma_progress = 0;
+
+ /* setup net_device structure */
+ netdev->irq = card->irq;
+ SET_NETDEV_DEV(netdev, &card->dev->core);
+ gelic_ether_setup_netdev_ops(netdev, &card->napi);
+ result = gelic_net_setup_netdev(netdev, card);
+ if (result) {
+ dev_dbg(&dev->core, "%s: setup_netdev failed %d",
+ __func__, result);
goto fail_setup_netdev;
}
+ pr_debug("%s: done\n", __func__);
return 0;
fail_setup_netdev:
+fail_alloc_skbs:
+ gelic_card_free_chain(card, card->rx_chain.head);
+fail_alloc_rx:
+ gelic_card_free_chain(card, card->tx_chain.head);
+fail_alloc_tx:
+ free_irq(card->irq, card);
+ netdev->irq = NO_IRQ;
+fail_request_irq:
+ ps3_sb_event_receive_port_destroy(dev, card->irq);
+fail_alloc_irq:
lv1_net_set_interrupt_status_indicator(bus_id(card),
- dev_id(card),
- 0 , 0);
+ bus_id(card),
+ 0, 0);
fail_status_indicator:
+ ps3_system_bus_set_driver_data(dev, NULL);
+ kfree(netdev_card(netdev)->unalign);
+ free_netdev(netdev);
+fail_alloc_card:
ps3_dma_region_free(dev->d_region);
fail_dma_region:
ps3_close_hv_device(dev);
fail_open:
- ps3_system_bus_set_driver_data(dev, NULL);
- free_netdev(card->netdev);
-fail_alloc_card:
return result;
}
@@ -1518,6 +1639,28 @@ fail_alloc_card:
static int ps3_gelic_driver_remove(struct ps3_system_bus_device *dev)
{
struct gelic_card *card = ps3_system_bus_get_driver_data(dev);
+ struct net_device *netdev0;
+ pr_debug("%s: called\n", __func__);
+
+ /* stop interrupt */
+ gelic_card_set_irq_mask(card, 0);
+
+ /* turn off DMA, force end */
+ gelic_card_disable_rxdmac(card);
+ gelic_card_disable_txdmac(card);
+
+ /* release chains */
+ gelic_card_release_tx_chain(card, 1);
+ gelic_card_release_rx_chain(card);
+
+ gelic_card_free_chain(card, card->tx_top);
+ gelic_card_free_chain(card, card->rx_top);
+
+ netdev0 = card->netdev[GELIC_PORT_ETHERNET];
+ /* disconnect event port */
+ free_irq(card->irq, card);
+ netdev0->irq = NO_IRQ;
+ ps3_sb_event_receive_port_destroy(card->dev, card->irq);
wait_event(card->waitq,
atomic_read(&card->tx_timeout_task_counter) == 0);
@@ -1525,8 +1668,9 @@ static int ps3_gelic_driver_remove(struc
lv1_net_set_interrupt_status_indicator(bus_id(card), dev_id(card),
0 , 0);
- unregister_netdev(card->netdev);
- free_netdev(card->netdev);
+ unregister_netdev(netdev0);
+ kfree(netdev_card(netdev0)->unalign);
+ free_netdev(netdev0);
ps3_system_bus_set_driver_data(dev, NULL);
@@ -1534,6 +1678,7 @@ static int ps3_gelic_driver_remove(struc
ps3_close_hv_device(dev);
+ pr_debug("%s: done\n", __func__);
return 0;
}
--- a/drivers/net/ps3_gelic_net.h
+++ b/drivers/net/ps3_gelic_net.h
@@ -35,12 +35,11 @@
#define GELIC_NET_MAX_MTU VLAN_ETH_FRAME_LEN
#define GELIC_NET_MIN_MTU VLAN_ETH_ZLEN
#define GELIC_NET_RXBUF_ALIGN 128
-#define GELIC_NET_RX_CSUM_DEFAULT 1 /* hw chksum */
+#define GELIC_CARD_RX_CSUM_DEFAULT 1 /* hw chksum */
#define GELIC_NET_WATCHDOG_TIMEOUT 5*HZ
#define GELIC_NET_NAPI_WEIGHT (GELIC_NET_RX_DESCRIPTORS)
#define GELIC_NET_BROADCAST_ADDR 0xffffffffffffL
-#define GELIC_NET_VLAN_POS (VLAN_ETH_ALEN * 2)
-#define GELIC_NET_VLAN_MAX 4
+
#define GELIC_NET_MC_COUNT_MAX 32 /* multicast address list */
/* virtual interrupt status register bits */
@@ -206,6 +205,13 @@ enum gelic_lv1_vlan_index {
/* size of hardware part of gelic descriptor */
#define GELIC_DESCR_SIZE (32)
+
+enum gelic_port_type {
+ GELIC_PORT_ETHERNET = 0,
+ GELIC_PORT_WIRELESS = 1,
+ GELIC_PORT_MAX
+};
+
struct gelic_descr {
/* as defined by the hardware */
__be32 buf_addr;
@@ -222,7 +228,6 @@ struct gelic_descr {
dma_addr_t bus_addr;
struct gelic_descr *next;
struct gelic_descr *prev;
- struct vlan_ethhdr vlan;
} __attribute__((aligned(32)));
struct gelic_descr_chain {
@@ -231,43 +236,115 @@ struct gelic_descr_chain {
struct gelic_descr *tail;
};
+struct gelic_vlan_id {
+ u16 tx;
+ u16 rx;
+};
+
struct gelic_card {
- struct net_device *netdev;
struct napi_struct napi;
+ struct net_device *netdev[GELIC_PORT_MAX];
/*
* hypervisor requires irq_status should be
* 8 bytes aligned, but u64 member is
* always disposed in that manner
*/
u64 irq_status;
- u64 ghiintmask;
+ u64 irq_mask;
struct ps3_system_bus_device *dev;
- u32 vlan_id[GELIC_NET_VLAN_MAX];
- int vlan_index;
+ struct gelic_vlan_id vlan[GELIC_PORT_MAX];
+ int vlan_required;
struct gelic_descr_chain tx_chain;
struct gelic_descr_chain rx_chain;
int rx_dma_restart_required;
- /* gurad dmac descriptor chain*/
- spinlock_t chain_lock;
-
int rx_csum;
- /* guard tx_dma_progress */
- spinlock_t tx_dma_lock;
+ /*
+ * tx_lock guards tx descriptor list and
+ * tx_dma_progress.
+ */
+ spinlock_t tx_lock;
int tx_dma_progress;
struct work_struct tx_timeout_task;
atomic_t tx_timeout_task_counter;
wait_queue_head_t waitq;
+ /* only first user should up the card */
+ struct semaphore updown_lock;
+ atomic_t users;
+
u64 ether_port_status;
+ /* original address returned by kzalloc */
+ void *unalign;
+ /*
+ * each netdevice has copy of irq
+ */
+ unsigned int irq;
struct gelic_descr *tx_top, *rx_top;
- struct gelic_descr descr[0];
+ struct gelic_descr descr[0]; /* must be the last */
};
+struct gelic_port {
+ struct gelic_card *card;
+ struct net_device *netdev;
+ enum gelic_port_type type;
+ long priv[0]; /* long for alignment */
+};
-extern unsigned long p_to_lp(long pa);
+static inline struct gelic_card *port_to_card(struct gelic_port *p)
+{
+ return p->card;
+}
+static inline struct net_device *port_to_netdev(struct gelic_port *p)
+{
+ return p->netdev;
+}
+static inline struct gelic_card *netdev_card(struct net_device *d)
+{
+ return ((struct gelic_port *)netdev_priv(d))->card;
+}
+static inline struct gelic_port *netdev_port(struct net_device *d)
+{
+ return (struct gelic_port *)netdev_priv(d);
+}
+static inline struct device *ctodev(struct gelic_card *card)
+{
+ return &card->dev->core;
+}
+static inline u64 bus_id(struct gelic_card *card)
+{
+ return card->dev->bus_id;
+}
+static inline u64 dev_id(struct gelic_card *card)
+{
+ return card->dev->dev_id;
+}
+
+static inline void *port_priv(struct gelic_port *port)
+{
+ return port->priv;
+}
+
+extern int gelic_card_set_irq_mask(struct gelic_card *card, u64 mask);
+/* shared netdev ops */
+extern void gelic_card_up(struct gelic_card *card);
+extern void gelic_card_down(struct gelic_card *card);
+extern int gelic_net_open(struct net_device *netdev);
+extern int gelic_net_stop(struct net_device *netdev);
+extern int gelic_net_xmit(struct sk_buff *skb, struct net_device *netdev);
+extern void gelic_net_set_multi(struct net_device *netdev);
+extern void gelic_net_tx_timeout(struct net_device *netdev);
+extern int gelic_net_change_mtu(struct net_device *netdev, int new_mtu);
+extern int gelic_net_setup_netdev(struct net_device *netdev,
+ struct gelic_card *card);
+
+/* shared ethtool ops */
+extern void gelic_net_get_drvinfo(struct net_device *netdev,
+ struct ethtool_drvinfo *info);
+extern u32 gelic_net_get_rx_csum(struct net_device *netdev);
+extern int gelic_net_set_rx_csum(struct net_device *netdev, u32 data);
#endif /* _GELIC_NET_H */
^ permalink raw reply
* [PATCH] IB/ehca: Fix lock flag location, bump version number
From: Joachim Fenkes @ 2007-12-13 12:35 UTC (permalink / raw)
To: LinuxPPC-Dev, LKML, OF-General, Roland Dreier, OF-EWG
Cc: Stefan Roscher, Christoph Raisch, Marcus Eder
Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com>
---
This addresses a comment of Roland and bumps the version number. If it's not
too late, please apply for 2.6.24. Thanks!
drivers/infiniband/hw/ehca/ehca_classes.h | 1 +
drivers/infiniband/hw/ehca/ehca_main.c | 2 +-
drivers/infiniband/hw/ehca/hcp_if.c | 1 -
3 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/infiniband/hw/ehca/ehca_classes.h b/drivers/infiniband/hw/ehca/ehca_classes.h
index 87f12d4..74d2b72 100644
--- a/drivers/infiniband/hw/ehca/ehca_classes.h
+++ b/drivers/infiniband/hw/ehca/ehca_classes.h
@@ -322,6 +322,7 @@ extern int ehca_static_rate;
extern int ehca_port_act_time;
extern int ehca_use_hp_mr;
extern int ehca_scaling_code;
+extern int ehca_lock_hcalls;
struct ipzu_queue_resp {
u32 qe_size; /* queue entry size */
diff --git a/drivers/infiniband/hw/ehca/ehca_main.c b/drivers/infiniband/hw/ehca/ehca_main.c
index c7bff3e..6a56d86 100644
--- a/drivers/infiniband/hw/ehca/ehca_main.c
+++ b/drivers/infiniband/hw/ehca/ehca_main.c
@@ -50,7 +50,7 @@
#include "ehca_tools.h"
#include "hcp_if.h"
-#define HCAD_VERSION "0024"
+#define HCAD_VERSION "0025"
MODULE_LICENSE("Dual BSD/GPL");
MODULE_AUTHOR("Christoph Raisch <raisch@de.ibm.com>");
diff --git a/drivers/infiniband/hw/ehca/hcp_if.c b/drivers/infiniband/hw/ehca/hcp_if.c
index 331b5e8..7029aa6 100644
--- a/drivers/infiniband/hw/ehca/hcp_if.c
+++ b/drivers/infiniband/hw/ehca/hcp_if.c
@@ -89,7 +89,6 @@
#define HCALL9_REGS_FORMAT HCALL7_REGS_FORMAT " r11=%lx r12=%lx"
static DEFINE_SPINLOCK(hcall_lock);
-extern int ehca_lock_hcalls;
static u32 get_longbusy_msecs(int longbusy_rc)
{
--
1.5.2
^ permalink raw reply related
* Re: How to Build Rootfile system
From: greenlean @ 2007-12-13 13:21 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <e8e184520712122203s12b9742ckbee6b1afbee7d50f@mail.gmail.com>
Maybe this web
http://www.cs.washington.edu/research/lis/empart/xup_ppc_linux.shtml Porting
linux to XUPV2P could be usefull.
I built the busybox root filesystem for an arm processor some years ago,
using cross_compiler and a uclibc library. This works fine...
vinay kumar-9 wrote:
>
> Hi All,
>
> I have booted linux on PPC440GP with treeimage(zimage+initrd).
> Now my next aim is to have a more stable rootfile system.
>
> I wanted to know the procedure of building a root file system for PPC440GP
> architecture.
>
> Pls share your knowledge and also some links.
>
>
> regards to all,
> vinay
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
--
View this message in context: http://www.nabble.com/How-to-Build-Rootfile-system-tp14310539p14315916.html
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* Re: How to Build Rootfile system
From: Peter Mendham @ 2007-12-13 13:28 UTC (permalink / raw)
To: vinay kumar; +Cc: linuxppc-embedded
In-Reply-To: <e8e184520712122203s12b9742ckbee6b1afbee7d50f@mail.gmail.com>
Hi Vinay,
I use buildroot (http://buildroot.uclibc.org/) for my root filing system
and it's been easy. I even use the toolchain it generates to compile my
kernels with. Before that I was using crosstool
(http://www.kegel.com/crosstool/) to give me a cross-compiler and I
created a busybox (http://www.busybox.net/) rootfs the hard way.
Regards,
-- Peter
> Hi All,
>
> I have booted linux on PPC440GP with treeimage(zimage+initrd).
> Now my next aim is to have a more stable rootfile system.
>
> I wanted to know the procedure of building a root file system for
> PPC440GP architecture.
>
> Pls share your knowledge and also some links.
>
>
> regards to all,
> vinay
> ------------------------------------------------------------------------
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
--
This message has been scanned for viruses and
dangerous content by MailScanner, and is
believed to be clean.
MailScanner thanks transtec Computers for their support.
^ permalink raw reply
* RE: Xilinx devicetrees
From: Koss, Mike (Mission Systems) @ 2007-12-13 13:49 UTC (permalink / raw)
To: Stephen Neuendorffer, David H. Lynch Jr., Grant Likely,
linuxppc-embedded
In-Reply-To: <20071213045215.DA8BAFB8060@mail11-blu.bigfish.com>
[-- Attachment #1: Type: text/plain, Size: 5409 bytes --]
________________________________
From: Stephen Neuendorffer [mailto:stephen.neuendorffer@xilinx.com]
Sent: Wednesday, December 12, 2007 11:52 PM
To: Koss, Mike (Mission Systems); David H. Lynch Jr.; Grant Likely;
linuxppc-embedded
Subject: RE: Xilinx devicetrees
SN> As Grant says, the dynamic detection doesn't have to be done in the
boot loader, it could be done in the platform code. You can largely
ignore
SN> the device trees, or always boot with a core device tree and figure
it all out later (perhaps using version registers). I anticipate that
SN> the 'standard flow' will have standard platform code for any board
that uses a complete device tree. If you have the need to do something
SN> extraordinary, then you should feel free to hack away... However,
It doesn't seem to me to be really necessary in your case, assuming that
SN> the device tree is packaged (somehow, TBD) along with the bitstream.
> I don't know if packaging the device tree with the bitstream is the
best
> way to go. It's possible that it could lead to headaches for certain
> systems that have security restrictions. The same could be said for
> using it w/ the SystemACE to load it into RAM after the image. (which
is
> what I'm currently doing for my 2 linux images in lieu of a true
on-chip
> bootloader). I am already taking the security concerns into account
for
> future revisions of the hardware wrt to using a SystemACE, and am
> planning on moving the device trees into NV storage like FLASH.
SN> 'with' not 'in'. either using SystemAce, or a flash image.
Ah! See, I though that there was the mention of trying to put it into
the bitstream and that is what I was worried about since retrieval of
that from the bitstream file is doable but if it was being stored in the
FPGA somehow and being retrieved there (????) that could lead to
problems for some systems.
> One solution I've been thinking through (in lieu of direct support
from
> EDK) is to use a tcl script with xps to traverse the hardware tree and
> generate the device tree. It seems like it should be relatively
trivial
> to obtain the information. It's just going to be a pain to write all
the
> handlers for each different linux driver: temac, interrupt controller,
> DMA controller, etc.
> In reality the best way to handle this would be to have EDK generate
the
> device tree as part of the library/bsp build process.
SN> We have a python script to do this. The main problem with just
looking
SN> at the mhs file is that you lose all the defaults for each IP.
Hence, we've
SN> also written a BSP generator to do this. both are at
SN> git://git.xilinx.com/gen-mhs-devtree.py
SN> Once I can verify that they work in the mainline tree, I'll be
sending out
SN> the patches that make this all work.
> Now, what I'd like
> to see with regards to this is the ability to change the handler for
the
> generating a specific device information. An example could be the
temac.
> If at some point in the future the temac needs new/more information to
> support its configuration/run-time then having to get a patch from
> Xilinx for a EDK is way too slow. The developers should be giving the
> opportunity to inject a new handler into the various parts of the
device
> tree generation. That way when the kernel patch is submitted, an EDK
> device generator patch will be submitted at the same time to keep
> everything in sync.
SN> Interesting idea.. I've been trying to figure out how to architect
this
SN> better, but it requires some information passing within EDK that
isnot
SN> today supported. I don't see at all how to synchronize this with
SN> patches to the kernel, tho. My approach is to describe the hardware
SN> as completely and faithfully as we can (given the information in
EDK),
SN> and let the drivers do whatever with it that they want to.
You'll have to correct if I'm wrong here, but from what I've been
reading up about EDK and its built-in Tcl interface, one can load their
system.xmp with corresponding mhs and then use Tcl to traverse the
device information to create the same information as found using the
generated BSP. This would allow for a Tcl system that could be setup
such that a main (unchanging, or slowly changing) Tcl script that would
start the EDK definition traversal and upon finding a new device it
would use a registered 'handler' Tcl function. These handlers could be
stored as seperate script/files and would be registered at the start of
the main script either via a config file or by searching a directory and
looking for tags stored at the top of the Tcl files in comments. These
driver handlers would be passed the handle to the system definition and
then know how to gather the information they need to create their entry
in the device tree. This approach gets around the issue of losing
defaults found in the mhs file.
I originally looked at trying to perform the same thing using just
device drivers in EDK, but I think I found some pitfall. Oh, I think it
was that I would have to choose the OS for the processor and EDK wants
to build the library, but there isn't anything to compile for Linux (or
I wasn't compiling anything for the linux BSP) and that was adding extra
time to the download.bit generation and that is already a long build
process.
-- Mike
[-- Attachment #2: Type: text/html, Size: 8524 bytes --]
^ permalink raw reply
* Re: [PATCH RFC 0/7] "NAND on UPM" and related patches
From: Anton Vorontsov @ 2007-12-13 14:09 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <47604D6E.1050200@freescale.com>
On Wed, Dec 12, 2007 at 03:06:54PM -0600, Scott Wood wrote:
[...]
> >Given that, personally I'd want to lockless variant to stay.
> >
> >So, you still want to get rid of it?
>
> Yes, in the absence of benchmarking that shows it makes a real
> difference.
Benchmarking shows no difference in throughput between lock and
lockless variants. This is expected of course, flashes are slow,
so I can't really benchmark anything with it.
> Premature optimization being the root of all evil, and what
> not.
;-) Will remove it, thanks!
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: Xilinx ML310 Linux 2.6 PCI bridge
From: Grant Likely @ 2007-12-13 16:46 UTC (permalink / raw)
To: Jean-Samuel Chenard; +Cc: linuxppc-embedded
In-Reply-To: <169c03cb0712090932y52cb2744p245cdeb0cccc2ff2@mail.gmail.com>
On 12/9/07, Jean-Samuel Chenard <jsamch@macs.ece.mcgill.ca> wrote:
> Thank you for the quick reply.
>
> I will directly update Secret Lab's Wiki pages. Those pages are the
> ones that got me going really quickly, so I will add a few of my
> observations directly on your pages so everyone can benefit.
I saw your updates to the wiki; thank you very much.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH/RFC] CPM1: implement GPIO API
From: Scott Wood @ 2007-12-13 16:55 UTC (permalink / raw)
To: Jochen Friedrich; +Cc: linuxppc-dev
In-Reply-To: <47600F5E.8060907@scram.de>
On Wed, Dec 12, 2007 at 05:42:06PM +0100, Jochen Friedrich wrote:
> +int cpm_init_par_io(void)
> +{
> + int ret;
> + struct device_node *np;
> + const u32 *num_ports;
> + int i;
> +
> + np = of_find_node_by_name(NULL, "par_io");
> + if (!np) {
> + ret = -ENOENT;
> + goto err0;
> + }
Shouldn't this lookup be by compatible (something like fsl,cpm1-gpio would
be good)?
> +int gpio_request(unsigned int gpio, const char *label)
> +{
> + if (!cpm1_port_locks)
> + return -ENODEV;
> +
> + if (gpio / 32 > cpm1_num_ports)
> + return -EINVAL;
Shouldn't this be ">="?
> + return 0;
No already-requested check?
> +}
> +EXPORT_SYMBOL_GPL(gpio_request);
This is an API, not internals; can we stick with plain EXPORT_SYMBOL()?
-Scott
^ permalink raw reply
* [PATCH 1/4] nand base: Don't panic if a controller driver does ecc its own way.
From: Scott Wood @ 2007-12-13 17:15 UTC (permalink / raw)
To: dwmw2; +Cc: linuxppc-dev, linux-mtd
Some hardware, such as the enhanced local bus controller used on some
mpc83xx chips, does ecc transparently when reading and writing data, rather
than providing a generic calculate/correct mechanism that can be exported to
the nand subsystem.
The subsystem should not BUG() when calculate, correct, or hwctl are
missing, if the methods that call them have been overridden.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
drivers/mtd/nand/nand_base.c | 8 ++++++--
1 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index e29c1da..85a7283 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2469,8 +2469,12 @@ int nand_scan_tail(struct mtd_info *mtd)
chip->ecc.write_oob = nand_write_oob_std;
case NAND_ECC_HW_SYNDROME:
- if (!chip->ecc.calculate || !chip->ecc.correct ||
- !chip->ecc.hwctl) {
+ if ((!chip->ecc.calculate || !chip->ecc.correct ||
+ !chip->ecc.hwctl) &&
+ (!chip->ecc.read_page ||
+ chip->ecc.read_page == nand_read_page_hwecc) ||
+ !chip->ecc.write_page ||
+ chip->ecc.write_page == nand_write_page_hwecc) {
printk(KERN_WARNING "No ECC functions supplied, "
"Hardware ECC not possible\n");
BUG();
--
1.5.3.7
^ permalink raw reply related
* [PATCH 1/4] mpc8313erdb: Fix whitespace.
From: Scott Wood @ 2007-12-13 17:16 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/platforms/83xx/mpc8313_rdb.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/83xx/mpc8313_rdb.c b/arch/powerpc/platforms/83xx/mpc8313_rdb.c
index 33766b8..6fb8299 100644
--- a/arch/powerpc/platforms/83xx/mpc8313_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc8313_rdb.c
@@ -70,9 +70,9 @@ void __init mpc8313_rdb_init_IRQ(void)
*/
static int __init mpc8313_rdb_probe(void)
{
- unsigned long root = of_get_flat_dt_root();
+ unsigned long root = of_get_flat_dt_root();
- return of_flat_dt_is_compatible(root, "MPC8313ERDB");
+ return of_flat_dt_is_compatible(root, "MPC8313ERDB");
}
define_machine(mpc8313_rdb) {
--
1.5.3.7
^ permalink raw reply related
* [PATCH 4/4] mpc8313erdb: Update defconfig with NOR flash, NAND flash, and JFFS enabled.
From: Scott Wood @ 2007-12-13 17:17 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
In-Reply-To: <20071213171632.GA4491@loki.buserror.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/configs/mpc8313_rdb_defconfig | 45 ++++++++++++++++++++-------
1 files changed, 33 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/configs/mpc8313_rdb_defconfig b/arch/powerpc/configs/mpc8313_rdb_defconfig
index c9af905..6942568 100644
--- a/arch/powerpc/configs/mpc8313_rdb_defconfig
+++ b/arch/powerpc/configs/mpc8313_rdb_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.24-rc4
-# Thu Dec 6 16:48:31 2007
+# Wed Dec 12 17:01:53 2007
#
# CONFIG_PPC64 is not set
@@ -336,15 +336,17 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_CONCAT is not set
-# CONFIG_MTD_PARTITIONS is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_OF_PARTS=y
#
# User Modules And Translation Layers
#
CONFIG_MTD_CHAR=y
-# CONFIG_MTD_BLKDEVS is not set
-# CONFIG_MTD_BLOCK is not set
-# CONFIG_MTD_BLOCK_RO is not set
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
# CONFIG_FTL is not set
# CONFIG_NFTL is not set
# CONFIG_INFTL is not set
@@ -381,11 +383,8 @@ CONFIG_MTD_CFI_UTIL=y
# Mapping drivers for chip access
#
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_PHYSMAP_START=0xfe000000
-CONFIG_MTD_PHYSMAP_LEN=0x1000000
-CONFIG_MTD_PHYSMAP_BANKWIDTH=2
-# CONFIG_MTD_PHYSMAP_OF is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
# CONFIG_MTD_INTEL_VR_NOR is not set
# CONFIG_MTD_PLATRAM is not set
@@ -406,7 +405,17 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
-# CONFIG_MTD_NAND is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+CONFIG_MTD_NAND_FSL_ELBC=y
# CONFIG_MTD_ONENAND is not set
#
@@ -1178,7 +1187,17 @@ CONFIG_TMPFS=y
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
-# CONFIG_JFFS2_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+# CONFIG_JFFS2_SUMMARY is not set
+# CONFIG_JFFS2_FS_XATTR is not set
+# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
+CONFIG_JFFS2_ZLIB=y
+# CONFIG_JFFS2_LZO is not set
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
# CONFIG_CRAMFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_HPFS_FS is not set
@@ -1242,6 +1261,8 @@ CONFIG_BITREVERSE=y
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
--
1.5.3.7
^ permalink raw reply related
* [PATCH 3/4] mpc8313erdb: Add NOR flash to the device tree.
From: Scott Wood @ 2007-12-13 17:17 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
In-Reply-To: <20071213171632.GA4491@loki.buserror.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/dts/mpc8313erdb.dts | 9 +++++++++
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 86e851a..8c7b645 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -53,6 +53,15 @@
2 0 f0000000 00020000
3 0 fa000000 00008000>;
+ flash@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0 0 800000>;
+ bank-width = <2>;
+ device-width = <1>;
+ };
+
nand@1,0 {
#address-cells = <1>;
#size-cells = <1>;
--
1.5.3.7
^ permalink raw reply related
* [PATCH 2/4] mpc8313erdb: Add NAND to device tree, and call of_platform_bus_probe().
From: Scott Wood @ 2007-12-13 17:17 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
In-Reply-To: <20071213171632.GA4491@loki.buserror.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/boot/dts/mpc8313erdb.dts | 37 +++++++++++++++++++++++++++++
arch/powerpc/platforms/83xx/mpc8313_rdb.c | 17 +++++++++++++
2 files changed, 54 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 9e7eba9..86e851a 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -37,6 +37,43 @@
reg = <00000000 08000000>; // 128MB at 0
};
+ localbus {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8313-elbc", "fsl,elbc";
+ reg = <e0005000 1000>;
+ interrupts = <d#77 8>;
+ interrupt-parent = <&ipic>;
+
+ // CS0 and CS1 are swapped when
+ // booting from nand, but the
+ // addresses are the same.
+ ranges = <0 0 fe000000 00800000
+ 1 0 e2800000 00008000
+ 2 0 f0000000 00020000
+ 3 0 fa000000 00008000>;
+
+ nand@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8313-fcm-nand", "fsl,elbc-fcm-nand";
+ reg = <1 0 2000>;
+
+ u-boot@0 {
+ reg = <0 100000>;
+ read-only;
+ };
+
+ kernel@100000 {
+ reg = <100000 300000>;
+ };
+
+ fs@400000 {
+ reg = <400000 1c00000>;
+ };
+ };
+ };
+
soc8313@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/powerpc/platforms/83xx/mpc8313_rdb.c b/arch/powerpc/platforms/83xx/mpc8313_rdb.c
index 6fb8299..3ad482a 100644
--- a/arch/powerpc/platforms/83xx/mpc8313_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc8313_rdb.c
@@ -14,6 +14,7 @@
*/
#include <linux/pci.h>
+#include <linux/of_platform.h>
#include <asm/time.h>
#include <asm/ipic.h>
@@ -75,6 +76,22 @@ static int __init mpc8313_rdb_probe(void)
return of_flat_dt_is_compatible(root, "MPC8313ERDB");
}
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .name = "soc8313", },
+ { .name = "localbus", },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ if (!machine_is(mpc8313_rdb))
+ return 0;
+
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+ return 0;
+}
+device_initcall(declare_of_platform_devices);
+
define_machine(mpc8313_rdb) {
.name = "MPC8313 RDB",
.probe = mpc8313_rdb_probe,
--
1.5.3.7
^ permalink raw reply related
* [PATCH] mpc834x_mds: Fix whitespace and call of_platform_bus_probe().
From: Scott Wood @ 2007-12-13 17:19 UTC (permalink / raw)
To: galak; +Cc: linuxppc-dev
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
arch/powerpc/platforms/83xx/mpc834x_mds.c | 21 +++++++++++++++++++--
1 files changed, 19 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c
index a81bb3c..459fb72 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c
@@ -23,6 +23,7 @@
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/root_dev.h>
+#include <linux/of_platform.h>
#include <asm/system.h>
#include <asm/atomic.h>
@@ -106,14 +107,30 @@ static void __init mpc834x_mds_init_IRQ(void)
ipic_set_default_priority();
}
+static struct of_device_id mpc834x_ids[] = {
+ { .type = "soc", },
+ { .compatible = "soc", },
+ {},
+};
+
+static int __init mpc834x_declare_of_platform_devices(void)
+{
+ if (!machine_is(mpc834x_mds))
+ return 0;
+
+ of_platform_bus_probe(NULL, mpc834x_ids, NULL);
+ return 0;
+}
+device_initcall(mpc834x_declare_of_platform_devices);
+
/*
* Called very early, MMU is off, device-tree isn't unflattened
*/
static int __init mpc834x_mds_probe(void)
{
- unsigned long root = of_get_flat_dt_root();
+ unsigned long root = of_get_flat_dt_root();
- return of_flat_dt_is_compatible(root, "MPC834xMDS");
+ return of_flat_dt_is_compatible(root, "MPC834xMDS");
}
define_machine(mpc834x_mds) {
--
1.5.3.7
^ permalink raw reply related
* [PATCH 2/4] nand base: Give drivers a chance to do late initialization.
From: Scott Wood @ 2007-12-13 17:15 UTC (permalink / raw)
To: dwmw2; +Cc: linuxppc-dev, linux-mtd
In-Reply-To: <20071213171528.GA4440@loki.buserror.net>
Some nand controllers, such as the Freescale enhanced local bus controller,
need to do late initialization based on details of the chip that has been
probed, such as chip size, large/small pages, etc. A late_init() callback
method is added to allow this.
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
drivers/mtd/nand/nand_base.c | 12 ++++++++++++
include/linux/mtd/nand.h | 2 ++
2 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 85a7283..119a6f7 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2593,6 +2593,18 @@ int nand_scan_tail(struct mtd_info *mtd)
/* propagate ecc.layout to mtd_info */
mtd->ecclayout = chip->ecc.layout;
+ /* Give the driver a chance to do any remaining setup
+ * based on the chip details.
+ */
+ if (chip->late_init) {
+ int ret = chip->late_init(mtd);
+
+ if (ret) {
+ kfree(chip->buffers);
+ return ret;
+ }
+ }
+
/* Check, if we should skip the bad block table scan */
if (chip->options & NAND_SKIP_BBTSCAN)
return 0;
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index c42bc7f..27bc879 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -360,6 +360,7 @@ struct nand_buffers {
* @errstat: [OPTIONAL] hardware specific function to perform additional error status checks
* (determine if errors are correctable)
* @write_page: [REPLACEABLE] High-level page write function
+ * @late_init: [OPTIONAL] initialization callback after identification
*/
struct nand_chip {
@@ -384,6 +385,7 @@ struct nand_chip {
int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page);
int (*write_page)(struct mtd_info *mtd, struct nand_chip *chip,
const uint8_t *buf, int page, int cached, int raw);
+ int (*late_init)(struct mtd_info *mtd);
int chip_delay;
unsigned int options;
--
1.5.3.7
^ permalink raw reply related
* [PATCH 3/4] mtd: Factor out OF partition support from the NOR driver.
From: Scott Wood @ 2007-12-13 17:15 UTC (permalink / raw)
To: dwmw2; +Cc: linuxppc-dev, linux-mtd
In-Reply-To: <20071213171528.GA4440@loki.buserror.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
drivers/mtd/Kconfig | 8 ++++
drivers/mtd/Makefile | 1 +
drivers/mtd/maps/physmap_of.c | 88 ++++++++++++---------------------------
drivers/mtd/ofpart.c | 68 +++++++++++++++++++++++++++++++
include/linux/mtd/partitions.h | 9 ++++-
5 files changed, 112 insertions(+), 62 deletions(-)
create mode 100644 drivers/mtd/ofpart.c
diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig
index 8848e8a..b729410 100644
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -150,6 +150,14 @@ config MTD_AFS_PARTS
for your particular device. It won't happen automatically. The
'armflash' map driver (CONFIG_MTD_ARMFLASH) does this, for example.
+config MTD_OF_PARTS
+ tristate "Flash partition map based on OF description"
+ depends on PPC_OF && MTD_PARTITIONS
+ help
+ This provides a partition parsing function which derives
+ the partition map from the children of the flash node,
+ as described in Documentation/powerpc/booting-without-of.txt.
+
comment "User Modules And Translation Layers"
config MTD_CHAR
diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile
index 7f0b04b..538e33d 100644
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
+obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
# 'Users' - code which presents functionality to userspace.
obj-$(CONFIG_MTD_CHAR) += mtdchar.o
diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.c
index aeed9ea..49acd41 100644
--- a/drivers/mtd/maps/physmap_of.c
+++ b/drivers/mtd/maps/physmap_of.c
@@ -80,64 +80,6 @@ static int parse_obsolete_partitions(struct of_device *dev,
return nr_parts;
}
-
-static int __devinit parse_partitions(struct of_flash *info,
- struct of_device *dev)
-{
- const char *partname;
- static const char *part_probe_types[]
- = { "cmdlinepart", "RedBoot", NULL };
- struct device_node *dp = dev->node, *pp;
- int nr_parts, i;
-
- /* First look for RedBoot table or partitions on the command
- * line, these take precedence over device tree information */
- nr_parts = parse_mtd_partitions(info->mtd, part_probe_types,
- &info->parts, 0);
- if (nr_parts > 0) {
- add_mtd_partitions(info->mtd, info->parts, nr_parts);
- return 0;
- }
-
- /* First count the subnodes */
- nr_parts = 0;
- for (pp = dp->child; pp; pp = pp->sibling)
- nr_parts++;
-
- if (nr_parts == 0)
- return parse_obsolete_partitions(dev, info, dp);
-
- info->parts = kzalloc(nr_parts * sizeof(*info->parts),
- GFP_KERNEL);
- if (!info->parts)
- return -ENOMEM;
-
- for (pp = dp->child, i = 0; pp; pp = pp->sibling, i++) {
- const u32 *reg;
- int len;
-
- reg = of_get_property(pp, "reg", &len);
- if (!reg || (len != 2*sizeof(u32))) {
- dev_err(&dev->dev, "Invalid 'reg' on %s\n",
- dp->full_name);
- kfree(info->parts);
- info->parts = NULL;
- return -EINVAL;
- }
- info->parts[i].offset = reg[0];
- info->parts[i].size = reg[1];
-
- partname = of_get_property(pp, "label", &len);
- if (!partname)
- partname = of_get_property(pp, "name", &len);
- info->parts[i].name = (char *)partname;
-
- if (of_get_property(pp, "read-only", &len))
- info->parts[i].mask_flags = MTD_WRITEABLE;
- }
-
- return nr_parts;
-}
#else /* MTD_PARTITIONS */
#define OF_FLASH_PARTS(info) (0)
#define parse_partitions(info, dev) (0)
@@ -212,6 +154,10 @@ static struct mtd_info * __devinit obsolete_probe(struct of_device *dev,
static int __devinit of_flash_probe(struct of_device *dev,
const struct of_device_id *match)
{
+#ifdef CONFIG_MTD_PARTITIONS
+ static const char *part_probe_types[]
+ = { "cmdlinepart", "RedBoot", NULL };
+#endif
struct device_node *dp = dev->node;
struct resource res;
struct of_flash *info;
@@ -274,13 +220,33 @@ static int __devinit of_flash_probe(struct of_device *dev,
}
info->mtd->owner = THIS_MODULE;
- err = parse_partitions(info, dev);
+#ifdef CONFIG_MTD_PARTITIONS
+ /* First look for RedBoot table or partitions on the command
+ * line, these take precedence over device tree information */
+ err = parse_mtd_partitions(info->mtd, part_probe_types,
+ &info->parts, 0);
if (err < 0)
- goto err_out;
+ return err;
+
+#ifdef CONFIG_MTD_OF_PARTS
+ if (err == 0) {
+ err = of_mtd_parse_partitions(&dev->dev, info->mtd,
+ dp, &info->parts);
+ if (err < 0)
+ return err;
+ }
+#endif
+
+ if (err == 0) {
+ err = parse_obsolete_partitions(dev, info, dp);
+ if (err < 0)
+ return err;
+ }
if (err > 0)
- add_mtd_partitions(info->mtd, OF_FLASH_PARTS(info), err);
+ add_mtd_partitions(info->mtd, info->parts, err);
else
+#endif
add_mtd_device(info->mtd);
return 0;
diff --git a/drivers/mtd/ofpart.c b/drivers/mtd/ofpart.c
new file mode 100644
index 0000000..6a36cb9
--- /dev/null
+++ b/drivers/mtd/ofpart.c
@@ -0,0 +1,68 @@
+/*
+ * Flash partitions described by the OF (or flattened) device tree
+ *
+ * Copyright (C) 2006 MontaVista Software Inc.
+ * Author: Vitaly Wool <vwool@ru.mvista.com>
+ *
+ * Revised to handle newer style flash binding by:
+ * Copyright (C) 2007 David Gibson, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/of.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+
+int __devinit of_mtd_parse_partitions(struct device *dev,
+ struct mtd_info *mtd,
+ struct device_node *node,
+ struct mtd_partition **pparts)
+{
+ const char *partname;
+ struct device_node *pp;
+ int nr_parts, i;
+
+ /* First count the subnodes */
+ nr_parts = 0;
+ for (pp = node->child; pp; pp = pp->sibling)
+ nr_parts++;
+
+ if (nr_parts == 0)
+ return 0;
+
+ *pparts = kzalloc(nr_parts * sizeof(**pparts), GFP_KERNEL);
+ if (!*pparts)
+ return -ENOMEM;
+
+ for (pp = node->child, i = 0; pp; pp = pp->sibling, i++) {
+ const u32 *reg;
+ int len;
+
+ reg = of_get_property(pp, "reg", &len);
+ if (!reg || (len != 2*sizeof(u32))) {
+ dev_err(dev, "Invalid 'reg' on %s\n", node->full_name);
+ kfree(*pparts);
+ *pparts = NULL;
+ return -EINVAL;
+ }
+ (*pparts)[i].offset = reg[0];
+ (*pparts)[i].size = reg[1];
+
+ partname = of_get_property(pp, "label", &len);
+ if (!partname)
+ partname = of_get_property(pp, "name", &len);
+ (*pparts)[i].name = (char *)partname;
+
+ if (of_get_property(pp, "read-only", &len))
+ (*pparts)[i].mask_flags = MTD_WRITEABLE;
+ }
+
+ return nr_parts;
+}
+EXPORT_SYMBOL(of_mtd_parse_partitions);
diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h
index da6b3d6..7c37d7e 100644
--- a/include/linux/mtd/partitions.h
+++ b/include/linux/mtd/partitions.h
@@ -71,5 +71,12 @@ extern int parse_mtd_partitions(struct mtd_info *master, const char **types,
#define put_partition_parser(p) do { module_put((p)->owner); } while(0)
-#endif
+struct device;
+struct device_node;
+
+int __devinit of_mtd_parse_partitions(struct device *dev,
+ struct mtd_info *mtd,
+ struct device_node *node,
+ struct mtd_partition **pparts);
+#endif
--
1.5.3.7
^ permalink raw reply related
* [PATCH 4/4] MPC8313 enhanced Local Bus Controller NAND support.
From: Scott Wood @ 2007-12-13 17:15 UTC (permalink / raw)
To: dwmw2; +Cc: linuxppc-dev, linux-mtd
In-Reply-To: <20071213171528.GA4440@loki.buserror.net>
Signed-off-by: Nick Spence <nick.spence@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
drivers/mtd/nand/Kconfig | 9 +
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/fsl_elbc_nand.c | 1281 ++++++++++++++++++++++++++++++++++++++
3 files changed, 1291 insertions(+), 0 deletions(-)
create mode 100644 drivers/mtd/nand/fsl_elbc_nand.c
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 246d451..05d976c 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -306,4 +306,13 @@ config MTD_ALAUDA
These two (and possibly other) Alauda-based cardreaders for
SmartMedia and xD allow raw flash access.
+config MTD_NAND_FSL_ELBC
+ tristate "NAND support for Freescale eLBC controllers"
+ depends on MTD_NAND && PPC_OF
+ help
+ Various Freescale chips, including the 8313, include a NAND Flash
+ Controller Module with built-in hardware ECC capabilities.
+ Enabling this option will enable you to use this to control
+ external NAND devices.
+
endif # MTD_NAND
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 3ad6c01..d0d4de2 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -29,5 +29,6 @@ obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o
obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) += excite_nandflash.o
obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
obj-$(CONFIG_MTD_ALAUDA) += alauda.o
+obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_elbc_nand.o
nand-objs := nand_base.o nand_bbt.o
diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
new file mode 100644
index 0000000..ce8b0bf
--- /dev/null
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -0,0 +1,1281 @@
+/* Freescale Enhanced Local Bus Controller NAND driver
+ *
+ * Copyright (c) 2006-2007 Freescale Semiconductor
+ *
+ * Authors: Nick Spence <nick.spence@freescale.com>,
+ * Scott Wood <scottwood@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/ioport.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_ecc.h>
+#include <linux/mtd/partitions.h>
+
+#include <asm/io.h>
+
+
+//#define ELBC_NAND_DEBUG_LVL 6
+
+#ifdef ELBC_NAND_DEBUG_LVL
+static int fcm_debug_level = ELBC_NAND_DEBUG_LVL;
+#define FCM_DEBUG(n, args...) \
+ do { \
+ if (n <= fcm_debug_level) \
+ pr_dbg(args); \
+ } while(0)
+#else
+#define FCM_DEBUG(n, dev, args...) do { } while(0)
+#endif
+
+#define MAX_BANKS 8
+#define ERR_BYTE 0xFF /* Value returned for read bytes when read failed */
+#define FCM_TIMEOUT_MSECS 500 /* Maximum number of mSecs to wait for FCM */
+
+struct elbc_bank {
+ u32 br; /**< Base Register */
+#define BR_BA 0xFFFF8000
+#define BR_BA_SHIFT 15
+#define BR_PS 0x00001800
+#define BR_PS_SHIFT 11
+#define BR_PS_8 0x00000800 /* Port Size 8 bit */
+#define BR_PS_16 0x00001000 /* Port Size 16 bit */
+#define BR_PS_32 0x00001800 /* Port Size 32 bit */
+#define BR_DECC 0x00000600
+#define BR_DECC_SHIFT 9
+#define BR_DECC_OFF 0x00000000 /* HW ECC checking and generation off */
+#define BR_DECC_CHK 0x00000200 /* HW ECC checking on, generation off */
+#define BR_DECC_CHK_GEN 0x00000400 /* HW ECC checking and generation on */
+#define BR_WP 0x00000100
+#define BR_WP_SHIFT 8
+#define BR_MSEL 0x000000E0
+#define BR_MSEL_SHIFT 5
+#define BR_MS_GPCM 0x00000000 /* GPCM */
+#define BR_MS_FCM 0x00000020 /* FCM */
+#define BR_MS_SDRAM 0x00000060 /* SDRAM */
+#define BR_MS_UPMA 0x00000080 /* UPMA */
+#define BR_MS_UPMB 0x000000A0 /* UPMB */
+#define BR_MS_UPMC 0x000000C0 /* UPMC */
+#define BR_V 0x00000001
+#define BR_V_SHIFT 0
+#define BR_RES ~(BR_BA|BR_PS|BR_DECC|BR_WP|BR_MSEL|BR_V)
+
+ u32 or; /**< Base Register */
+#define OR0 0x5004
+#define OR1 0x500C
+#define OR2 0x5014
+#define OR3 0x501C
+#define OR4 0x5024
+#define OR5 0x502C
+#define OR6 0x5034
+#define OR7 0x503C
+
+#define OR_GPCM_AM 0xFFFF8000
+#define OR_GPCM_AM_SHIFT 15
+#define OR_GPCM_BCTLD 0x00001000
+#define OR_GPCM_BCTLD_SHIFT 12
+#define OR_GPCM_CSNT 0x00000800
+#define OR_GPCM_CSNT_SHIFT 11
+#define OR_GPCM_ACS 0x00000600
+#define OR_GPCM_ACS_SHIFT 9
+#define OR_GPCM_ACS_0b10 0x00000400
+#define OR_GPCM_ACS_0b11 0x00000600
+#define OR_GPCM_XACS 0x00000100
+#define OR_GPCM_XACS_SHIFT 8
+#define OR_GPCM_SCY 0x000000F0
+#define OR_GPCM_SCY_SHIFT 4
+#define OR_GPCM_SCY_1 0x00000010
+#define OR_GPCM_SCY_2 0x00000020
+#define OR_GPCM_SCY_3 0x00000030
+#define OR_GPCM_SCY_4 0x00000040
+#define OR_GPCM_SCY_5 0x00000050
+#define OR_GPCM_SCY_6 0x00000060
+#define OR_GPCM_SCY_7 0x00000070
+#define OR_GPCM_SCY_8 0x00000080
+#define OR_GPCM_SCY_9 0x00000090
+#define OR_GPCM_SCY_10 0x000000a0
+#define OR_GPCM_SCY_11 0x000000b0
+#define OR_GPCM_SCY_12 0x000000c0
+#define OR_GPCM_SCY_13 0x000000d0
+#define OR_GPCM_SCY_14 0x000000e0
+#define OR_GPCM_SCY_15 0x000000f0
+#define OR_GPCM_SETA 0x00000008
+#define OR_GPCM_SETA_SHIFT 3
+#define OR_GPCM_TRLX 0x00000004
+#define OR_GPCM_TRLX_SHIFT 2
+#define OR_GPCM_EHTR 0x00000002
+#define OR_GPCM_EHTR_SHIFT 1
+#define OR_GPCM_EAD 0x00000001
+#define OR_GPCM_EAD_SHIFT 0
+
+#define OR_UPM_AM 0xFFFF8000
+#define OR_UPM_AM_SHIFT 15
+#define OR_UPM_XAM 0x00006000
+#define OR_UPM_XAM_SHIFT 13
+#define OR_UPM_BCTLD 0x00001000
+#define OR_UPM_BCTLD_SHIFT 12
+#define OR_UPM_BI 0x00000100
+#define OR_UPM_BI_SHIFT 8
+#define OR_UPM_TRLX 0x00000004
+#define OR_UPM_TRLX_SHIFT 2
+#define OR_UPM_EHTR 0x00000002
+#define OR_UPM_EHTR_SHIFT 1
+#define OR_UPM_EAD 0x00000001
+#define OR_UPM_EAD_SHIFT 0
+
+#define OR_SDRAM_AM 0xFFFF8000
+#define OR_SDRAM_AM_SHIFT 15
+#define OR_SDRAM_XAM 0x00006000
+#define OR_SDRAM_XAM_SHIFT 13
+#define OR_SDRAM_COLS 0x00001C00
+#define OR_SDRAM_COLS_SHIFT 10
+#define OR_SDRAM_ROWS 0x000001C0
+#define OR_SDRAM_ROWS_SHIFT 6
+#define OR_SDRAM_PMSEL 0x00000020
+#define OR_SDRAM_PMSEL_SHIFT 5
+#define OR_SDRAM_EAD 0x00000001
+#define OR_SDRAM_EAD_SHIFT 0
+
+#define OR_FCM_AM 0xFFFF8000
+#define OR_FCM_AM_SHIFT 15
+#define OR_FCM_BCTLD 0x00001000
+#define OR_FCM_BCTLD_SHIFT 12
+#define OR_FCM_PGS 0x00000400
+#define OR_FCM_PGS_SHIFT 10
+#define OR_FCM_CSCT 0x00000200
+#define OR_FCM_CSCT_SHIFT 9
+#define OR_FCM_CST 0x00000100
+#define OR_FCM_CST_SHIFT 8
+#define OR_FCM_CHT 0x00000080
+#define OR_FCM_CHT_SHIFT 7
+#define OR_FCM_SCY 0x00000070
+#define OR_FCM_SCY_SHIFT 4
+#define OR_FCM_SCY_1 0x00000010
+#define OR_FCM_SCY_2 0x00000020
+#define OR_FCM_SCY_3 0x00000030
+#define OR_FCM_SCY_4 0x00000040
+#define OR_FCM_SCY_5 0x00000050
+#define OR_FCM_SCY_6 0x00000060
+#define OR_FCM_SCY_7 0x00000070
+#define OR_FCM_RST 0x00000008
+#define OR_FCM_RST_SHIFT 3
+#define OR_FCM_TRLX 0x00000004
+#define OR_FCM_TRLX_SHIFT 2
+#define OR_FCM_EHTR 0x00000002
+#define OR_FCM_EHTR_SHIFT 1
+};
+
+struct elbc_regs {
+ struct elbc_bank bank[8];
+ u8 res0[0x28];
+ u32 mar; /**< UPM Address Register */
+ u8 res1[0x4];
+ u32 mamr; /**< UPMA Mode Register */
+ u32 mbmr; /**< UPMB Mode Register */
+ u32 mcmr; /**< UPMC Mode Register */
+ u8 res2[0x8];
+ u32 mrtpr; /**< Memory Refresh Timer Prescaler Register */
+ u32 mdr; /**< UPM Data Register */
+ u8 res3[0x4];
+ u32 lsor; /**< Special Operation Initiation Register */
+ u32 lsdmr; /**< SDRAM Mode Register */
+ u8 res4[0x8];
+ u32 lurt; /**< UPM Refresh Timer */
+ u32 lsrt; /**< SDRAM Refresh Timer */
+ u8 res5[0x8];
+ u32 ltesr; /**< Transfer Error Status Register */
+#define LTESR_BM 0x80000000
+#define LTESR_FCT 0x40000000
+#define LTESR_PAR 0x20000000
+#define LTESR_WP 0x04000000
+#define LTESR_ATMW 0x00800000
+#define LTESR_ATMR 0x00400000
+#define LTESR_CS 0x00080000
+#define LTESR_CC 0x00000001
+#define LTESR_NAND_MASK (LTESR_FCT | LTESR_PAR | LTESR_CC)
+ u32 ltedr; /**< Transfer Error Disable Register */
+ u32 lteir; /**< Transfer Error Interrupt Register */
+ u32 lteatr; /**< Transfer Error Attributes Register */
+ u32 ltear; /**< Transfer Error Address Register */
+ u8 res6[0xC];
+ u32 lbcr; /**< Configuration Register */
+#define LBCR_LDIS 0x80000000
+#define LBCR_LDIS_SHIFT 31
+#define LBCR_BCTLC 0x00C00000
+#define LBCR_BCTLC_SHIFT 22
+#define LBCR_AHD 0x00200000
+#define LBCR_LPBSE 0x00020000
+#define LBCR_LPBSE_SHIFT 17
+#define LBCR_EPAR 0x00010000
+#define LBCR_EPAR_SHIFT 16
+#define LBCR_BMT 0x0000FF00
+#define LBCR_BMT_SHIFT 8
+#define LBCR_INIT 0x00040000
+ u32 lcrr; /**< Clock Ratio Register */
+#define LCRR_DBYP 0x80000000
+#define LCRR_DBYP_SHIFT 31
+#define LCRR_BUFCMDC 0x30000000
+#define LCRR_BUFCMDC_SHIFT 28
+#define LCRR_ECL 0x03000000
+#define LCRR_ECL_SHIFT 24
+#define LCRR_EADC 0x00030000
+#define LCRR_EADC_SHIFT 16
+#define LCRR_CLKDIV 0x0000000F
+#define LCRR_CLKDIV_SHIFT 0
+ u8 res7[0x8];
+ u32 fmr; /**< Flash Mode Register */
+#define FMR_CWTO 0x0000F000
+#define FMR_CWTO_SHIFT 12
+#define FMR_BOOT 0x00000800
+#define FMR_ECCM 0x00000100
+#define FMR_AL 0x00000030
+#define FMR_AL_SHIFT 4
+#define FMR_OP 0x00000003
+#define FMR_OP_SHIFT 0
+ u32 fir; /**< Flash Instruction Register */
+#define FIR_OP0 0xF0000000
+#define FIR_OP0_SHIFT 28
+#define FIR_OP1 0x0F000000
+#define FIR_OP1_SHIFT 24
+#define FIR_OP2 0x00F00000
+#define FIR_OP2_SHIFT 20
+#define FIR_OP3 0x000F0000
+#define FIR_OP3_SHIFT 16
+#define FIR_OP4 0x0000F000
+#define FIR_OP4_SHIFT 12
+#define FIR_OP5 0x00000F00
+#define FIR_OP5_SHIFT 8
+#define FIR_OP6 0x000000F0
+#define FIR_OP6_SHIFT 4
+#define FIR_OP7 0x0000000F
+#define FIR_OP7_SHIFT 0
+#define FIR_OP_NOP 0x0 /* No operation and end of sequence */
+#define FIR_OP_CA 0x1 /* Issue current column address */
+#define FIR_OP_PA 0x2 /* Issue current block+page address */
+#define FIR_OP_UA 0x3 /* Issue user defined address */
+#define FIR_OP_CM0 0x4 /* Issue command from FCR[CMD0] */
+#define FIR_OP_CM1 0x5 /* Issue command from FCR[CMD1] */
+#define FIR_OP_CM2 0x6 /* Issue command from FCR[CMD2] */
+#define FIR_OP_CM3 0x7 /* Issue command from FCR[CMD3] */
+#define FIR_OP_WB 0x8 /* Write FBCR bytes from FCM buffer */
+#define FIR_OP_WS 0x9 /* Write 1 or 2 bytes from MDR[AS] */
+#define FIR_OP_RB 0xA /* Read FBCR bytes to FCM buffer */
+#define FIR_OP_RS 0xB /* Read 1 or 2 bytes to MDR[AS] */
+#define FIR_OP_CW0 0xC /* Wait then issue FCR[CMD0] */
+#define FIR_OP_CW1 0xD /* Wait then issue FCR[CMD1] */
+#define FIR_OP_RBW 0xE /* Wait then read FBCR bytes */
+#define FIR_OP_RSW 0xE /* Wait then read 1 or 2 bytes */
+ u32 fcr; /**< Flash Command Register */
+#define FCR_CMD0 0xFF000000
+#define FCR_CMD0_SHIFT 24
+#define FCR_CMD1 0x00FF0000
+#define FCR_CMD1_SHIFT 16
+#define FCR_CMD2 0x0000FF00
+#define FCR_CMD2_SHIFT 8
+#define FCR_CMD3 0x000000FF
+#define FCR_CMD3_SHIFT 0
+ u32 fbar; /**< Flash Block Address Register */
+#define FBAR_BLK 0x00FFFFFF
+ u32 fpar; /**< Flash Page Address Register */
+#define FPAR_SP_PI 0x00007C00
+#define FPAR_SP_PI_SHIFT 10
+#define FPAR_SP_MS 0x00000200
+#define FPAR_SP_CI 0x000001FF
+#define FPAR_SP_CI_SHIFT 0
+#define FPAR_LP_PI 0x0003F000
+#define FPAR_LP_PI_SHIFT 12
+#define FPAR_LP_MS 0x00000800
+#define FPAR_LP_CI 0x000007FF
+#define FPAR_LP_CI_SHIFT 0
+ u32 fbcr; /**< Flash Byte Count Register */
+#define FBCR_BC 0x00000FFF
+ u8 res11[0x8];
+ u8 res8[0xF00];
+};
+
+struct fsl_elbc_ctrl;
+
+/* mtd information per set */
+
+struct fsl_elbc_mtd {
+ struct mtd_info mtd;
+ struct nand_chip chip;
+ struct fsl_elbc_ctrl *ctrl;
+
+ struct device *dev;
+ int bank; /* Chip select bank number */
+ u8 __iomem *vbase; /* Chip select base virtual address */
+ int page_size; /* NAND page size (0=512, 1=2048) */
+ unsigned int fmr; /* FCM Flash Mode Register value */
+};
+
+/* overview of the fsl elbc controller */
+
+struct fsl_elbc_ctrl {
+ struct nand_hw_control controller;
+ struct fsl_elbc_mtd *chips[MAX_BANKS];
+
+ /* device info */
+ struct device *dev;
+ struct elbc_regs __iomem *regs;
+ int irq;
+ wait_queue_head_t irq_wait;
+ unsigned int irq_status; /* status read from LTESR by irq handler */
+ u8 __iomem *addr; /* Address of assigned FCM buffer */
+ unsigned int page; /* Last page written to / read from */
+ unsigned int read_bytes; /* Number of bytes read during command */
+ unsigned int column; /* Saved column from SEQIN */
+ unsigned int index; /* Pointer to next byte to 'read' */
+ unsigned int status; /* status read from LTESR after last op */
+ unsigned int mdr; /* UPM/FCM Data Register value */
+ unsigned int use_mdr; /* Non zero if the MDR is to be set */
+ unsigned int oob; /* Non zero if operating on OOB data */
+ char *oob_poi; /* Place to write ECC after read back */
+};
+
+/* These map to the positions used by the FCM hardware ECC generator */
+
+/* Small Page FLASH with FMR[ECCM] = 0 */
+static struct nand_ecclayout fsl_elbc_oob_sp_eccm0 = {
+ .eccbytes = 3,
+ .eccpos = {6, 7, 8},
+ .oobfree = { {0, 5}, {9, 7} },
+ .oobavail = 12,
+};
+
+/* Small Page FLASH with FMR[ECCM] = 1 */
+static struct nand_ecclayout fsl_elbc_oob_sp_eccm1 = {
+ .eccbytes = 3,
+ .eccpos = {8, 9, 10},
+ .oobfree = { {0, 5}, {6, 2}, {11, 5} },
+ .oobavail = 12,
+};
+
+/* Large Page FLASH with FMR[ECCM] = 0 */
+static struct nand_ecclayout fsl_elbc_oob_lp_eccm0 = {
+ .eccbytes = 12,
+ .eccpos = {6, 7, 8, 22, 23, 24, 38, 39, 40, 54, 55, 56},
+ .oobfree = { {1, 5}, {9, 13}, {25, 13}, {41, 13}, {57, 7} },
+ .oobavail = 48,
+};
+
+/* Large Page FLASH with FMR[ECCM] = 1 */
+static struct nand_ecclayout fsl_elbc_oob_lp_eccm1 = {
+ .eccbytes = 12,
+ .eccpos = {8, 9, 10, 24, 25, 26, 40, 41, 42, 56, 57, 58},
+ .oobfree = { {1, 7}, {11, 13}, {27, 13}, {43, 13}, {59, 5} },
+ .oobavail = 48,
+};
+
+/*=================================*/
+
+/*
+ * Set up the FCM hardware block and page address fields, and the fcm
+ * structure addr field to point to the correct FCM buffer in memory
+ */
+static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob)
+{
+ struct nand_chip *chip = mtd->priv;
+ struct fsl_elbc_mtd *priv = chip->priv;
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+ struct elbc_regs __iomem *lbc = ctrl->regs;
+ int buf_num;
+
+ ctrl->page = page_addr;
+
+ out_be32(&lbc->fbar,
+ page_addr >> (chip->phys_erase_shift - chip->page_shift));
+
+ if (priv->page_size) {
+ out_be32(&lbc->fpar,
+ ((page_addr << FPAR_LP_PI_SHIFT) & FPAR_LP_PI) |
+ (oob ? FPAR_LP_MS : 0) | column);
+ buf_num = (page_addr & 1) << 2;
+ } else {
+ out_be32(&lbc->fpar,
+ ((page_addr << FPAR_SP_PI_SHIFT) & FPAR_SP_PI) |
+ (oob ? FPAR_SP_MS : 0) | column);
+ buf_num = page_addr & 7;
+ }
+
+ ctrl->addr = priv->vbase + buf_num * 1024;
+ ctrl->index = column;
+
+ /* for OOB data point to the second half of the buffer */
+ if (oob)
+ ctrl->index += priv->page_size ? 2048 : 512;
+
+ FCM_DEBUG(2, "set_addr: bank=%d, ctrl->addr=0x%p (0x%p), index %x, pes %d ps %d\n", buf_num, ctrl->addr, priv->vbase, ctrl->index,
+ chip->phys_erase_shift, chip->page_shift);
+}
+
+/*
+ * execute FCM command and wait for it to complete
+ */
+static int fsl_elbc_run_command(struct mtd_info *mtd)
+{
+ struct nand_chip *chip = mtd->priv;
+ struct fsl_elbc_mtd *priv = chip->priv;
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+ struct elbc_regs __iomem *lbc = ctrl->regs;
+
+ /* Setup the FMR[OP] to execute without write protection */
+ out_be32(&lbc->fmr, priv->fmr | 3);
+ if (ctrl->use_mdr)
+ out_be32(&lbc->mdr, ctrl->mdr);
+
+ FCM_DEBUG(5, "fsl_elbc_run_command: fmr= %08X fir= %08X fcr= %08X\n",
+ lbc->fmr, lbc->fir, lbc->fcr);
+ FCM_DEBUG(5, "fsl_elbc_run_command: fbar=%08X fpar=%08X fbcr=%08X bank=%d\n",
+ lbc->fbar, lbc->fpar, lbc->fbcr, priv->bank);
+
+ /* execute special operation */
+ out_be32(&lbc->lsor, priv->bank);
+
+ /* wait for FCM complete flag or timeout */
+ ctrl->irq_status = 0;
+ wait_event_timeout(ctrl->irq_wait, ctrl->irq_status,
+ FCM_TIMEOUT_MSECS * HZ/1000);
+ ctrl->status = ctrl->irq_status;
+
+ /* store mdr value in case it was needed */
+ if (ctrl->use_mdr)
+ ctrl->mdr = in_be32(&lbc->mdr);
+
+ ctrl->use_mdr = 0;
+
+ FCM_DEBUG(5, "fsl_elbc_run_command: stat=%08X mdr= %08X fmr= %08X\n",
+ ctrl->status, ctrl->mdr, lbc->fmr);
+
+ /* returns 0 on success otherwise non-zero) */
+ return ctrl->status == LTESR_CC ? 0 : -EIO;
+}
+
+static void fsl_elbc_do_read(struct nand_chip *chip, int oob)
+{
+ struct fsl_elbc_mtd *priv = chip->priv;
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+ struct elbc_regs __iomem *lbc = ctrl->regs;
+
+ if (priv->page_size) {
+ out_be32(&lbc->fir,
+ (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+ (FIR_OP_CA << FIR_OP1_SHIFT) |
+ (FIR_OP_PA << FIR_OP2_SHIFT) |
+ (FIR_OP_CW1 << FIR_OP3_SHIFT) |
+ (FIR_OP_RBW << FIR_OP4_SHIFT));
+
+ out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
+ (NAND_CMD_READSTART << FCR_CMD1_SHIFT));
+ } else {
+ out_be32(&lbc->fir,
+ (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+ (FIR_OP_CA << FIR_OP1_SHIFT) |
+ (FIR_OP_PA << FIR_OP2_SHIFT) |
+ (FIR_OP_RBW << FIR_OP3_SHIFT));
+
+ if (oob)
+ out_be32(&lbc->fcr, NAND_CMD_READOOB << FCR_CMD0_SHIFT);
+ else
+ out_be32(&lbc->fcr, NAND_CMD_READ0 << FCR_CMD0_SHIFT);
+ }
+}
+
+/* cmdfunc send commands to the FCM */
+static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,
+ int column, int page_addr)
+{
+ struct nand_chip *chip = mtd->priv;
+ struct fsl_elbc_mtd *priv = chip->priv;
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+ struct elbc_regs __iomem *lbc = ctrl->regs;
+
+ ctrl->use_mdr = 0;
+
+ /* clear the read buffer */
+ ctrl->read_bytes = 0;
+ if (command != NAND_CMD_PAGEPROG)
+ ctrl->index = 0;
+
+ switch (command) {
+ /* READ0 and READ1 read the entire buffer to use hardware ECC. */
+ case NAND_CMD_READ1:
+ column += 256;
+
+ /* fall-through */
+ case NAND_CMD_READ0:
+ FCM_DEBUG(2, "fsl_elbc_cmdfunc: NAND_CMD_READ0, page_addr:"
+ " 0x%x, column: 0x%x.\n", page_addr, column);
+
+
+ out_be32(&lbc->fbcr, 0); /* read entire page to enable ECC */
+
+ set_addr(mtd, 0, page_addr, 0);
+
+ ctrl->read_bytes = mtd->writesize + mtd->oobsize;
+ ctrl->index += column;
+
+ fsl_elbc_do_read(chip, 0);
+ fsl_elbc_run_command(mtd);
+ return;
+
+ /* READOOB reads only the OOB because no ECC is performed. */
+ case NAND_CMD_READOOB:
+ FCM_DEBUG(2, "fsl_elbc_cmdfunc: NAND_CMD_READOOB, page_addr:"
+ " 0x%x, column: 0x%x.\n", page_addr, column);
+
+ out_be32(&lbc->fbcr, mtd->oobsize - column);
+ set_addr(mtd, column, page_addr, 1);
+
+ ctrl->read_bytes = mtd->writesize + mtd->oobsize;
+
+ fsl_elbc_do_read(chip, 1);
+ fsl_elbc_run_command(mtd);
+ return;
+
+ /* READID must read all 5 possible bytes while CEB is active */
+ case NAND_CMD_READID:
+ FCM_DEBUG(2, "fsl_elbc_cmdfunc: NAND_CMD_READID.\n");
+
+ out_be32(&lbc->fir, (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+ (FIR_OP_UA << FIR_OP1_SHIFT) |
+ (FIR_OP_RBW << FIR_OP2_SHIFT));
+ out_be32(&lbc->fcr, NAND_CMD_READID << FCR_CMD0_SHIFT);
+ /* 5 bytes for manuf, device and exts */
+ out_be32(&lbc->fbcr, 5);
+ ctrl->read_bytes = 5;
+ ctrl->use_mdr = 1;
+ ctrl->mdr = 0;
+
+ set_addr(mtd, 0, 0, 0);
+ fsl_elbc_run_command(mtd);
+ return;
+
+ /* ERASE1 stores the block and page address */
+ case NAND_CMD_ERASE1:
+ FCM_DEBUG(2, "fsl_elbc_cmdfunc: NAND_CMD_ERASE1, page_addr:"
+ " 0x%x.\n", page_addr);
+ set_addr(mtd, 0, page_addr, 0);
+ return;
+
+ /* ERASE2 uses the block and page address from ERASE1 */
+ case NAND_CMD_ERASE2:
+ FCM_DEBUG(2, "fsl_elbc_cmdfunc: NAND_CMD_ERASE2.\n");
+
+ out_be32(&lbc->fir,
+ (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+ (FIR_OP_PA << FIR_OP1_SHIFT) |
+ (FIR_OP_CM1 << FIR_OP2_SHIFT));
+
+ out_be32(&lbc->fcr,
+ (NAND_CMD_ERASE1 << FCR_CMD0_SHIFT) |
+ (NAND_CMD_ERASE2 << FCR_CMD1_SHIFT));
+
+ out_be32(&lbc->fbcr, 0);
+ ctrl->read_bytes = 0;
+
+ fsl_elbc_run_command(mtd);
+ return;
+
+ /* SEQIN sets up the addr buffer and all registers except the length */
+ case NAND_CMD_SEQIN: {
+ u32 fcr;
+ FCM_DEBUG(2, "fsl_elbc_cmdfunc: NAND_CMD_SEQIN/PAGE_PROG, page_addr:"
+ " 0x%x, column: 0x%x.\n", page_addr, column);
+
+ ctrl->column = column;
+ ctrl->oob = 0;
+
+ fcr = (NAND_CMD_PAGEPROG << FCR_CMD1_SHIFT) |
+ (NAND_CMD_SEQIN << FCR_CMD2_SHIFT);
+
+ if (priv->page_size) {
+ out_be32(&lbc->fir,
+ (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+ (FIR_OP_CA << FIR_OP1_SHIFT) |
+ (FIR_OP_PA << FIR_OP2_SHIFT) |
+ (FIR_OP_WB << FIR_OP3_SHIFT) |
+ (FIR_OP_CW1 << FIR_OP4_SHIFT));
+
+ fcr |= NAND_CMD_READ0 << FCR_CMD0_SHIFT;
+ } else {
+ out_be32(&lbc->fir,
+ (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+ (FIR_OP_CM2 << FIR_OP1_SHIFT) |
+ (FIR_OP_CA << FIR_OP2_SHIFT) |
+ (FIR_OP_PA << FIR_OP3_SHIFT) |
+ (FIR_OP_WB << FIR_OP4_SHIFT) |
+ (FIR_OP_CW1 << FIR_OP5_SHIFT));
+
+ if (column >= mtd->writesize) {
+ /* OOB area --> READOOB */
+ column -= mtd->writesize;
+ fcr |= NAND_CMD_READOOB << FCR_CMD0_SHIFT;
+ ctrl->oob = 1;
+ } else if (column < 256) {
+ /* First 256 bytes --> READ0 */
+ fcr |= NAND_CMD_READ0 << FCR_CMD0_SHIFT;
+ } else {
+ /* Second 256 bytes --> READ1 */
+ fcr |= NAND_CMD_READ1 << FCR_CMD0_SHIFT;
+ }
+ }
+
+ out_be32(&lbc->fcr, fcr);
+ set_addr(mtd, column, page_addr, ctrl->oob);
+ return;
+ }
+
+ /* PAGEPROG reuses all of the setup from SEQIN and adds the length */
+ case NAND_CMD_PAGEPROG: {
+ int full_page;
+ FCM_DEBUG(2, "fsl_elbc_cmdfunc: NAND_CMD_PAGEPROG"
+ " writing %d bytes.\n",ctrl->index);
+
+ /* if the write did not start at 0 or is not a full page
+ * then set the exact length, otherwise use a full page
+ * write so the HW generates the ECC.
+ */
+ if (ctrl->oob || ctrl->column != 0 ||
+ ctrl->index != mtd->writesize + mtd->oobsize) {
+ out_be32(&lbc->fbcr, ctrl->index);
+ full_page = 0;
+ } else {
+ out_be32(&lbc->fbcr, 0);
+ full_page = 1;
+ }
+
+ fsl_elbc_run_command(mtd);
+
+ /* Read back the page in order to fill in the ECC for the caller.
+ * Is this really needed?
+ */
+ if (full_page && ctrl->oob_poi) {
+ out_be32(&lbc->fbcr, 3);
+ set_addr(mtd, 6, page_addr, 1);
+
+ ctrl->read_bytes = mtd->writesize + 9;
+
+ fsl_elbc_do_read(chip, 1);
+ fsl_elbc_run_command(mtd);
+
+ memcpy_fromio(ctrl->oob_poi + 6, &ctrl->addr[ctrl->index], 3);
+ ctrl->index += 3;
+ }
+
+ ctrl->oob_poi = NULL;
+ return;
+ }
+
+ /* CMD_STATUS must read the status byte while CEB is active */
+ /* Note - it does not wait for the ready line */
+ case NAND_CMD_STATUS:
+ out_be32(&lbc->fir,
+ (FIR_OP_CM0 << FIR_OP0_SHIFT) |
+ (FIR_OP_RBW << FIR_OP1_SHIFT));
+ out_be32(&lbc->fcr, NAND_CMD_STATUS << FCR_CMD0_SHIFT);
+ out_be32(&lbc->fbcr, 1);
+ set_addr(mtd, 0, 0, 0);
+ ctrl->read_bytes = 1;
+
+ fsl_elbc_run_command(mtd);
+
+ // The chip always seems to report that it is write-protected,
+ // even when it is not.
+ setbits8(ctrl->addr, NAND_STATUS_WP);
+ return;
+
+ /* RESET without waiting for the ready line */
+ case NAND_CMD_RESET:
+ FCM_DEBUG(2, "fsl_elbc_cmdfunc: NAND_CMD_RESET.\n");
+ out_be32(&lbc->fir, FIR_OP_CM0 << FIR_OP0_SHIFT);
+ out_be32(&lbc->fcr, NAND_CMD_RESET << FCR_CMD0_SHIFT);
+ fsl_elbc_run_command(mtd);
+ return;
+
+ default:
+ printk("fsl_elbc_cmdfunc: error, unsupported command 0x%x.\n",
+ command);
+ }
+}
+
+static void fsl_elbc_select_chip(struct mtd_info *mtd, int chip)
+{
+ /* The hardware does not seem to support multiple
+ * chips per bank.
+ */
+}
+
+/*
+ * Write buf to the FCM Controller Data Buffer
+ */
+static void fsl_elbc_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
+{
+ struct nand_chip *chip = mtd->priv;
+ struct fsl_elbc_mtd *priv = chip->priv;
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+ unsigned int bufsize = mtd->writesize + mtd->oobsize;
+
+ if (len < 0) {
+ dev_err(ctrl->dev, "write_buf of %d bytes", len);
+ ctrl->status = 0;
+ return;
+ }
+
+ if ((unsigned int)len > bufsize - ctrl->index) {
+ dev_err(ctrl->dev,
+ "write_buf beyond end of buffer "
+ "(%d requested, %u available)\n",
+ len, bufsize - ctrl->index);
+ printk("index %x\n", ctrl->index);
+ BUG();
+
+ len = bufsize - ctrl->index;
+ }
+
+ memcpy_toio(&ctrl->addr[ctrl->index], buf, len);
+ ctrl->index += len;
+}
+
+/*
+ * read a byte from either the FCM hardware buffer if it has any data left
+ * otherwise issue a command to read a single byte.
+ */
+static u8 fsl_elbc_read_byte(struct mtd_info *mtd)
+{
+ struct nand_chip *chip = mtd->priv;
+ struct fsl_elbc_mtd *priv = chip->priv;
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+
+ /* If there are still bytes in the FCM, then use the next byte. */
+ if (ctrl->index < ctrl->read_bytes)
+ return ctrl->addr[ctrl->index++];
+
+ dev_err(ctrl->dev, "read_byte beyond end of buffer\n");
+ return ERR_BYTE;
+}
+
+/*
+ * Read from the FCM Controller Data Buffer
+ */
+static void fsl_elbc_read_buf(struct mtd_info *mtd, u8 *buf, int len)
+{
+ struct nand_chip *chip = mtd->priv;
+ struct fsl_elbc_mtd *priv = chip->priv;
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+ int avail;
+
+ if (len < 0)
+ return;
+
+ avail = min((unsigned int)len, ctrl->read_bytes - ctrl->index);
+ memcpy_fromio(buf, &ctrl->addr[ctrl->index], avail);
+ ctrl->index += avail;
+
+ if (len > avail)
+ dev_err(ctrl->dev,
+ "read_buf beyond end of buffer "
+ "(%d requested, %d available)\n",
+ len, avail);
+}
+
+/*
+ * Verify buffer against the FCM Controller Data Buffer
+ */
+static int fsl_elbc_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
+{
+ struct nand_chip *chip = mtd->priv;
+ struct fsl_elbc_mtd *priv = chip->priv;
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+ int i;
+
+ if (len < 0) {
+ dev_err(ctrl->dev, "write_buf of %d bytes", len);
+ return -EINVAL;
+ }
+
+ if ((unsigned int)len > ctrl->read_bytes - ctrl->index) {
+ dev_err(ctrl->dev,
+ "verify_buf beyond end of buffer "
+ "(%d requested, %u available)\n",
+ len, ctrl->read_bytes - ctrl->index);
+
+ ctrl->index = ctrl->read_bytes;
+ return -EINVAL;
+ }
+
+ for (i = 0; i < len; i++)
+ if (in_8(&ctrl->addr[ctrl->index + i]) != buf[i])
+ break;
+
+ ctrl->index += len;
+ return i == len && ctrl->status == LTESR_CC ? 0 : -EIO;
+}
+
+/* This function is called after Program and Erase Operations to
+ * check for success or failure.
+ */
+static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip)
+{
+ struct fsl_elbc_mtd *priv = chip->priv;
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+ struct elbc_regs __iomem *lbc = ctrl->regs;
+
+ if (ctrl->status != LTESR_CC)
+ return NAND_STATUS_FAIL;
+
+ /* Use READ_STATUS command, but wait for the device to be ready */
+ ctrl->use_mdr = 0;
+ out_be32(&lbc->fir,
+ (FIR_OP_CW0 << FIR_OP0_SHIFT) |
+ (FIR_OP_RBW << FIR_OP1_SHIFT));
+ out_be32(&lbc->fcr, NAND_CMD_STATUS << FCR_CMD0_SHIFT);
+ out_be32(&lbc->fbcr, 1);
+ set_addr(mtd, 0, 0, 0);
+ ctrl->read_bytes = 1;
+
+ fsl_elbc_run_command(mtd);
+
+ if (ctrl->status != LTESR_CC)
+ return NAND_STATUS_FAIL;
+
+ // The chip always seems to report that it is write-protected,
+ // even when it is not.
+ setbits8(ctrl->addr, NAND_STATUS_WP);
+ return fsl_elbc_read_byte(mtd);
+}
+
+static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)
+{
+ struct nand_chip *chip = mtd->priv;
+ struct fsl_elbc_mtd *priv = chip->priv;
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+ struct elbc_regs __iomem *lbc = ctrl->regs;
+ unsigned int al;
+
+ /* calculate FMR Address Length field */
+ al = 0;
+ if (chip->pagemask & 0xffff0000)
+ al++;
+ if (chip->pagemask & 0xff000000)
+ al++;
+
+ /* add to ECCM mode set in fsl_elbc_init */
+ priv->fmr |= (12 << FMR_CWTO_SHIFT) | /* Timeout > 12 ms */
+ (al << FMR_AL_SHIFT);
+
+ FCM_DEBUG(1, "fsl_elbc_init: nand->numchips = %10d\n", chip->numchips);
+ FCM_DEBUG(1, "fsl_elbc_init: nand->chipsize = %10ld\n", chip->chipsize);
+ FCM_DEBUG(1, "fsl_elbc_init: nand->pagemask = %10X\n", chip->pagemask);
+ FCM_DEBUG(1, "fsl_elbc_init: nand->chip_delay = %8d\n", chip->chip_delay);
+ FCM_DEBUG(1, "fsl_elbc_init: nand->badblockpos = %7d\n", chip->badblockpos);
+ FCM_DEBUG(1, "fsl_elbc_init: nand->chip_shift = %8d\n", chip->chip_shift);
+ FCM_DEBUG(1, "fsl_elbc_init: nand->page_shift = %8d\n", chip->page_shift);
+ FCM_DEBUG(1, "fsl_elbc_init: nand->phys_erase_shift = %2d\n",
+ chip->phys_erase_shift);
+ FCM_DEBUG(1, "fsl_elbc_init: nand->ecclayout= %10p\n", chip->ecclayout);
+ FCM_DEBUG(1, "fsl_elbc_init: nand->eccmode = %10d\n", chip->ecc.mode );
+ FCM_DEBUG(1, "fsl_elbc_init: nand->eccsteps = %10d\n", chip->ecc.steps);
+ FCM_DEBUG(1, "fsl_elbc_init: nand->eccbytes = %10d\n", chip->ecc.bytes);
+ FCM_DEBUG(1, "fsl_elbc_init: nand->ecctotal = %10d\n", chip->ecc.total);
+ FCM_DEBUG(1, "fsl_elbc_init: nand->ecclayout= %10p\n", chip->ecc.layout);
+ FCM_DEBUG(1, "fsl_elbc_init: mtd->flags = %08X\n", mtd->flags);
+ FCM_DEBUG(1, "fsl_elbc_init: mtd->size = %10d\n", mtd->size);
+ FCM_DEBUG(1, "fsl_elbc_init: mtd->erasesize = %10d\n", mtd->erasesize);
+ FCM_DEBUG(1, "fsl_elbc_init: mtd->writesize = %10d\n", mtd->writesize);
+ FCM_DEBUG(1, "fsl_elbc_init: mtd->oobsize = %10d\n", mtd->oobsize);
+
+ /* adjust Option Register and ECC to match Flash page size */
+ if (mtd->writesize == 512) {
+ priv->page_size = 0;
+ clrbits32(&lbc->bank[priv->bank].or, ~OR_FCM_PGS);
+ } else if (mtd->writesize == 2048) {
+ priv->page_size = 1;
+ setbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS);
+ /* adjust ecc setup if needed */
+ if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) ==
+ BR_DECC_CHK_GEN) {
+ chip->ecc.size = 512;
+ chip->ecc.layout = (priv->fmr & FMR_ECCM) ?
+ &fsl_elbc_oob_lp_eccm1 :
+ &fsl_elbc_oob_lp_eccm0;
+ mtd->ecclayout = chip->ecc.layout;
+ mtd->oobavail = chip->ecc.layout->oobavail;
+ }
+ } else {
+ printk("fsl_elbc_init: page size %d is not supported\n",
+ mtd->writesize);
+ return -1;
+ }
+
+ /* The default u-boot configuration on MPC8313ERDB causes errors;
+ * more delay is needed. This should be safe for other boards
+ * as well.
+ */
+ setbits32(&lbc->bank[priv->bank].or, 0x70);
+ return 0;
+}
+
+static int fsl_elbc_read_page(struct mtd_info *mtd,
+ struct nand_chip *chip,
+ uint8_t *buf)
+{
+ fsl_elbc_read_buf(mtd, buf, mtd->writesize);
+ fsl_elbc_read_buf(mtd, chip->oob_poi, mtd->oobsize);
+
+ if (fsl_elbc_wait(mtd, chip) & NAND_STATUS_FAIL)
+ mtd->ecc_stats.failed++;
+
+ return 0;
+}
+
+/* ECC will be calculated automatically, and errors will be detected in
+ * waitfunc.
+ */
+static void fsl_elbc_write_page(struct mtd_info *mtd,
+ struct nand_chip *chip,
+ const uint8_t *buf)
+{
+ struct fsl_elbc_mtd *priv = chip->priv;
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+
+ fsl_elbc_write_buf(mtd, buf, mtd->writesize);
+ fsl_elbc_write_buf(mtd, chip->oob_poi, mtd->oobsize);
+
+ ctrl->oob_poi = chip->oob_poi;
+}
+
+static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv)
+{
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+ struct elbc_regs __iomem *lbc = ctrl->regs;
+ struct nand_chip *chip = &priv->chip;
+
+ dev_dbg(priv->dev, "eLBC Set Information for bank %d\n", priv->bank);
+
+ /* Fill in fsl_elbc_mtd structure */
+ priv->mtd.priv = chip;
+ priv->mtd.owner = THIS_MODULE;
+ priv->fmr = 0; /* rest filled in later */
+
+ /* fill in nand_chip structure */
+ /* set up function call table */
+ chip->read_byte = fsl_elbc_read_byte;
+ chip->write_buf = fsl_elbc_write_buf;
+ chip->read_buf = fsl_elbc_read_buf;
+ chip->verify_buf = fsl_elbc_verify_buf;
+ chip->select_chip = fsl_elbc_select_chip;
+ chip->cmdfunc = fsl_elbc_cmdfunc;
+ chip->waitfunc = fsl_elbc_wait;
+ chip->late_init = fsl_elbc_chip_init_tail;
+
+ /* set up nand options */
+ chip->options = NAND_NO_READRDY | NAND_NO_AUTOINCR;// | NAND_SKIP_BBTSCAN;
+
+ chip->controller = &ctrl->controller;
+ chip->priv = priv;
+
+ chip->ecc.read_page = fsl_elbc_read_page;
+ chip->ecc.write_page = fsl_elbc_write_page;
+
+ /* If CS Base Register selects full hardware ECC then use it */
+ if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) ==
+ BR_DECC_CHK_GEN) {
+ chip->ecc.mode = NAND_ECC_HW;
+ /* put in small page settings and adjust later if needed */
+ chip->ecc.layout = (priv->fmr & FMR_ECCM) ?
+ &fsl_elbc_oob_sp_eccm1 : &fsl_elbc_oob_sp_eccm0;
+ chip->ecc.size = 512;
+ chip->ecc.bytes = 3;
+ } else {
+ /* otherwise fall back to default software ECC */
+ chip->ecc.mode = NAND_ECC_SOFT;
+ }
+
+ return 0;
+}
+
+static int fsl_elbc_chip_remove(struct fsl_elbc_mtd *priv)
+{
+ struct fsl_elbc_ctrl *ctrl = priv->ctrl;
+
+ nand_release(&priv->mtd);
+
+ if (priv->vbase)
+ iounmap(priv->vbase);
+
+ ctrl->chips[priv->bank] = NULL;
+ kfree(priv);
+
+ return 0;
+}
+
+static int fsl_elbc_chip_probe(struct fsl_elbc_ctrl *ctrl,
+ struct device_node *node)
+{
+ struct elbc_regs __iomem *lbc = ctrl->regs;
+ struct fsl_elbc_mtd *priv;
+ struct resource res;
+#ifdef CONFIG_MTD_PARTITIONS
+ static const char *part_probe_types[]
+ = { "cmdlinepart", "RedBoot", NULL };
+ struct mtd_partition *parts;
+#endif
+ int ret;
+ int bank;
+
+ /* get, allocate and map the memory resource */
+ ret = of_address_to_resource(node, 0, &res);
+ if (ret) {
+ dev_err(ctrl->dev, "failed to get resource\n");
+ return ret;
+ }
+
+ /* find which chip select it is connected to */
+ for (bank = 0; bank < MAX_BANKS; bank++)
+ if ((in_be32(&lbc->bank[bank].br) & BR_V) &&
+ (in_be32(&lbc->bank[bank].br) & BR_MSEL) == BR_MS_FCM &&
+ (in_be32(&lbc->bank[bank].br) & lbc->bank[bank].or & BR_BA)
+ == res.start)
+ break;
+
+ if (bank >= MAX_BANKS) {
+ dev_err(ctrl->dev, "address did not match any chip selects\n");
+ WARN_ON(1);
+ return -ENODEV;
+ }
+
+ priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ ctrl->chips[bank] = priv;
+ priv->bank = bank;
+ priv->ctrl = ctrl;
+ priv->dev = ctrl->dev;
+
+ priv->vbase = ioremap(res.start, res.end - res.start + 1);
+ if (!priv->vbase) {
+ dev_err(ctrl->dev, "failed to map chip region\n");
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ ret = fsl_elbc_chip_init(priv);
+ if (ret)
+ goto err;
+
+ ret = nand_scan(&priv->mtd, 1);
+ if (ret)
+ goto err;
+
+#ifdef CONFIG_MTD_PARTITIONS
+ /* First look for RedBoot table or partitions on the command
+ * line, these take precedence over device tree information */
+ ret = parse_mtd_partitions(&priv->mtd, part_probe_types, &parts, 0);
+ if (ret < 0)
+ goto err;
+
+#ifdef CONFIG_MTD_OF_PARTS
+ if (ret == 0) {
+ ret = of_mtd_parse_partitions(priv->dev, &priv->mtd,
+ node, &parts);
+ if (ret < 0)
+ goto err;
+ }
+#endif
+
+ if (ret > 0)
+ add_mtd_partitions(&priv->mtd, parts, ret);
+ else
+#endif
+ add_mtd_device(&priv->mtd);
+
+ printk(KERN_INFO "eLBC NAND device at 0x%zx, bank %d\n",
+ res.start, priv->bank);
+ return 0;
+
+err:
+ fsl_elbc_chip_remove(priv);
+ return ret;
+}
+
+static int __devinit fsl_elbc_ctrl_init(struct fsl_elbc_ctrl *ctrl)
+{
+ struct elbc_regs __iomem *lbc = ctrl->regs;
+
+ /* clear event registers */
+ setbits32(&lbc->ltesr, LTESR_NAND_MASK);
+ out_be32(&lbc->lteatr, 0);
+
+ /* Enable interrupts for any detected events */
+ out_be32(&lbc->lteir, LTESR_NAND_MASK);
+
+ ctrl->read_bytes = 0;
+ ctrl->index = 0;
+ ctrl->addr = NULL;
+
+ return 0;
+}
+
+static int __devexit fsl_elbc_ctrl_remove(struct of_device *ofdev)
+{
+ struct fsl_elbc_ctrl *ctrl = dev_get_drvdata(&ofdev->dev);
+ int i;
+
+ for (i = 0; i < MAX_BANKS; i++)
+ if (ctrl->chips[i])
+ fsl_elbc_chip_remove(ctrl->chips[i]);
+
+ if (ctrl->irq)
+ free_irq(ctrl->irq, ctrl);
+
+ if (ctrl->regs)
+ iounmap(ctrl->regs);
+
+ dev_set_drvdata(&ofdev->dev, NULL);
+ kfree(ctrl);
+ return 0;
+}
+
+/* interrupt handler code */
+
+static irqreturn_t fsl_elbc_ctrl_irq(int irqno, void *data)
+{
+ struct fsl_elbc_ctrl *ctrl = data;
+ struct elbc_regs __iomem *lbc = ctrl->regs;
+ u32 status = in_be32(&lbc->ltesr) & LTESR_NAND_MASK;
+
+ if (status) {
+ out_be32(&lbc->ltesr, status);
+ out_be32(&lbc->lteatr, 0);
+
+ ctrl->irq_status = status;
+ smp_wmb();
+ wake_up(&ctrl->irq_wait);
+
+ return IRQ_HANDLED;
+ }
+
+ return IRQ_NONE;
+}
+
+/* fsl_elbc_ctrl_probe
+ *
+ * called by device layer when it finds a device matching
+ * one our driver can handled. This code allocates all of
+ * the resources needed for the controller only. The
+ * resources for the NAND banks themselves are allocated
+ * in the chip probe function.
+*/
+
+static int __devinit fsl_elbc_ctrl_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct device_node *child;
+ struct fsl_elbc_ctrl *ctrl;
+ int ret;
+
+ ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL);
+ if (!ctrl)
+ return -ENOMEM;
+
+ dev_set_drvdata(&ofdev->dev, ctrl);
+
+ spin_lock_init(&ctrl->controller.lock);
+ init_waitqueue_head(&ctrl->controller.wq);
+ init_waitqueue_head(&ctrl->irq_wait);
+
+ ctrl->regs = of_iomap(ofdev->node, 0);
+ if (!ctrl->regs) {
+ dev_err(&ofdev->dev, "failed to get memory region\n");
+ ret = -ENODEV;
+ goto err;
+ }
+
+ ctrl->irq = of_irq_to_resource(ofdev->node, 0, NULL);
+ if (ctrl->irq == NO_IRQ) {
+ dev_err(&ofdev->dev, "failed to get irq resource\n");
+ ret = -ENODEV;
+ goto err;
+ }
+
+ ctrl->dev = &ofdev->dev;
+
+ ret = fsl_elbc_ctrl_init(ctrl);
+ if (ret < 0)
+ goto err;
+
+ ret = request_irq(ctrl->irq, fsl_elbc_ctrl_irq, 0, "fsl-elbc", ctrl);
+ if (ret != 0) {
+ dev_err(&ofdev->dev, "failed to install irq (%d)\n",
+ ctrl->irq);
+ ret = ctrl->irq;
+ goto err;
+ }
+
+ child = NULL;
+ while ((child = of_get_next_child(ofdev->node, child)))
+ if (of_device_is_compatible(child, "fsl,elbc-fcm-nand"))
+ fsl_elbc_chip_probe(ctrl, child);
+
+ return 0;
+
+err:
+ fsl_elbc_ctrl_remove(ofdev);
+ return ret;
+}
+
+static struct of_device_id fsl_elbc_match[] = {
+ {
+ .compatible = "fsl,elbc",
+ },
+ {}
+};
+
+static struct of_platform_driver fsl_elbc_ctrl_driver = {
+ .name = "fsl-elbc",
+ .match_table = fsl_elbc_match,
+ .probe = fsl_elbc_ctrl_probe,
+ .remove = __devexit_p(fsl_elbc_ctrl_remove),
+};
+
+static int __init fsl_elbc_init(void)
+{
+ return of_register_platform_driver(&fsl_elbc_ctrl_driver);
+}
+
+static void __exit fsl_elbc_exit(void)
+{
+ of_unregister_platform_driver(&fsl_elbc_ctrl_driver);
+}
+
+module_init(fsl_elbc_init);
+module_exit(fsl_elbc_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Freescale");
+MODULE_DESCRIPTION("Freescale Enhanced Local Bus Controller MTD NAND driver");
--
1.5.3.7
^ permalink raw reply related
* RE: Xilinx devicetrees
From: Stephen Neuendorffer @ 2007-12-13 17:36 UTC (permalink / raw)
To: Koss, Mike (Mission Systems), David H. Lynch Jr., Grant Likely,
linuxppc-embedded
In-Reply-To: <EDAE140DF1B2FC42B5867C22CA0B333F0A590F@XMBIL132.northgrum.com>
=20
> -----Original Message-----
> From: Koss, Mike (Mission Systems) [mailto:mike.koss@ngc.com]=20
> Sent: Thursday, December 13, 2007 5:49 AM
> To: Stephen Neuendorffer; David H. Lynch Jr.; Grant Likely;=20
> linuxppc-embedded
> Subject: RE: Xilinx devicetrees
>=20
> SN> Interesting idea.. I've been trying to figure out how to=20
> architect this=20
> SN> better, but it requires some information passing within=20
> EDK that isnot=20
> SN> today supported. I don't see at all how to synchronize this with=20
> SN> patches to the kernel, tho. My approach is to describe=20
> the hardware=20
> SN> as completely and faithfully as we can (given the=20
> information in EDK),=20
> SN> and let the drivers do whatever with it that they want to.
>=20
> You'll have to correct if I'm wrong here, but from what I've=20
> been reading up about EDK and its built-in Tcl interface, one=20
> can load their system.xmp with corresponding mhs and then use=20
> Tcl to traverse the device information to create the same=20
> information as found using the generated BSP. This would=20
> allow for a Tcl system that could be setup such that a main=20
> (unchanging, or slowly changing) Tcl script that would start=20
> the EDK definition traversal and upon finding a new device it=20
> would use a registered 'handler' Tcl function. These handlers=20
> could be stored as seperate script/files and would be=20
> registered at the start of the main script either via a=20
> config file or by searching a directory and looking for tags=20
> stored at the top of the Tcl files in comments. These driver=20
> handlers would be passed the handle to the system definition=20
> and then know how to gather the information they need to=20
> create their entry in the device tree. This approach gets=20
> around the issue of losing defaults found in the mhs file.
This seems like alot of work, for relatively little benefit. :)
Instead, I think it is safer to just describe the IP as completely as we
can up front. Everything else should be done by the Linux driver. Now
today there is a problem, which is that there isn't a standard way of
having a device describe itself, in the format of a device tree. This
is something that we'll likely have to add hooks for in the future.
> I originally looked at trying to perform the same thing using=20
> just device drivers in EDK, but I think I found some pitfall.=20
> Oh, I think it was that I would have to choose the OS for=20
> the processor and EDK wants to build the library, but there=20
> isn't anything to compile for Linux (or I wasn't compiling=20
> anything for the linux BSP) and that was adding extra time to=20
> the download.bit generation and that is already a long build process.
I can't imagine that generating this file is the bottleneck in getting
to a bitstream (or at least, I really hope it isn't!)=20
Steve
^ permalink raw reply
* Re: [PATCH] IB/ehca: Fix lock flag location, bump version number
From: Roland Dreier @ 2007-12-13 17:39 UTC (permalink / raw)
To: Joachim Fenkes
Cc: LKML, OF-EWG, LinuxPPC-Dev, Christoph Raisch, Marcus Eder,
OF-General, Stefan Roscher
In-Reply-To: <200712131335.58136.fenkes@de.ibm.com>
applied, thanks
^ permalink raw reply
* Re: [PATCH/RFC] CPM1: implement GPIO API
From: Scott Wood @ 2007-12-13 16:48 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev, Arnd Bergmann
In-Reply-To: <20071213005345.GA1577@zarina>
On Thu, Dec 13, 2007 at 03:53:45AM +0300, Anton Vorontsov wrote:
> No. This is how gpio api is working currently. With gpiolib[1], most of
> these functions will be controller-specific. IIRC, gpiolib is still in
> early development stage, so, for now, we have to limit us to one gpio
> chip controller.
>
> This works great for us: CPM, CPM2 and QE shouldn't appear on the single
> crystal.
But at least the latter two should be able to co-exist in a single kernel
image... Oh well, all we can do is hope the saner API makes it in soon. :-)
-Scott
^ permalink raw reply
* Re: [PATCH 19/20] [POWERPC] pci32: 4xx embedded platforms want to reassign all PCI resources
From: Josh Boyer @ 2007-12-13 19:01 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <20071213073851.C321FDDFC9@ozlabs.org>
On Thu, 13 Dec 2007 18:38:46 +1100
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> This makes 4xx embedded platforms re-assign all PCI resources as we
> pretty much never care about what the various firmwares have done on
> these, it's generally not compatible with the way the kernel will map
> the bridges.
>
> We still need to also enable bus renumbering on some of them, but I
> will do that from a separate patch after I've fixed 4xx PCIe to handle
> all bus numbers.
This one is slightly broken in my opinion. You've added
the ppc_pci_flags to all of these platforms, which is fine for your
intended goal. But now all of these platforms _have_ to compile with
PCI enabled or they'll break with:
arch/powerpc/platforms/built-in.o: In function `walnut_probe':
walnut.c:(.init.text+0x9a): undefined reference to `ppc_pci_flags'
walnut.c:(.init.text+0xa6): undefined reference to `ppc_pci_flags'
make[1]: *** [.tmp_vmlinux1] Error 1
So to do it correctly we need to either select CONFIG_PCI for all of
them, wrap the ppc_pci_flags assignment in #ifdef CONFIG_PCI, or move
the ppc_pci_flags variable declaration into something that always gets
compiled.
josh
^ permalink raw reply
* Re: [PATCH 19/20] [POWERPC] pci32: 4xx embedded platforms want to reassign all PCI resources
From: Josh Boyer @ 2007-12-13 19:05 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <20071213073851.C321FDDFC9@ozlabs.org>
On Thu, 13 Dec 2007 18:38:46 +1100
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> This makes 4xx embedded platforms re-assign all PCI resources as we
> pretty much never care about what the various firmwares have done on
> these, it's generally not compatible with the way the kernel will map
> the bridges.
>
> We still need to also enable bus renumbering on some of them, but I
> will do that from a separate patch after I've fixed 4xx PCIe to handle
> all bus numbers.
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[snip]
> Index: linux-work/arch/powerpc/platforms/44x/sequoia.c
> ===================================================================
> --- linux-work.orig/arch/powerpc/platforms/44x/sequoia.c 2007-12-10 16:51:42.000000000 +1100
> +++ linux-work/arch/powerpc/platforms/44x/sequoia.c 2007-12-10 16:55:06.000000000 +1100
> @@ -21,7 +21,8 @@
> #include <asm/udbg.h>
> #include <asm/time.h>
> #include <asm/uic.h>
> -#include "44x.h"
> +#include <asm/pci-bridge.h>
> +
Oh, and you also broke the Sequoia build with this change because you
removed the 44x.h include :).
josh
^ permalink raw reply
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