* Re: [PATCH] Fix sleep on powerbook 3400
From: Johannes Berg @ 2007-12-18 11:28 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <18277.49950.354034.86146@cargo.ozlabs.ibm.com>
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> Sleep on the powerbook 3400 has been broken since the change that made
> powerbook_sleep_3400 call pmac_suspend_devices(), which disables
> interrupts. There are a couple of loops in powerbook_sleep_3400 that
> depend on interrupts being enabled, and in fact it has to have
> interrupts enabled at the point of going to sleep since it is an
> interrupt from the PMU that wakes it up.
Do you want me to rebase my patches on top of this?
johannes
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^ permalink raw reply
* [PATCH] Platform Changes for UCC TDM driver for MPC8323ERDB. Also includes related QE changes.
From: Poonam_Aggrwal-b10812 @ 2007-12-18 9:02 UTC (permalink / raw)
To: rubini, linuxppc-dev, netdev, kumar.gala
Cc: michael.barkowski, rich.cutler, ashish.kalra
From: Poonam Aggrwal <b10812@freescale.com>
This patch makes necessary changes in the QE and UCC framework to support
TDM. It also adds support to configure the BRG properly through device
tree entries. Includes the device tree changes for UCC TDM driver as well.
It also includes device tree entries for UCC TDM driver.
Tested on MPC8323ERDB platform.
Signed-off-by: Poonam Aggrwal <b10812@freescale.com>
Signed-off-by: Ashish Kalra <ashish.kalra@freescale.com>
Signed-off-by: Kim Phillips <Kim.Phillips@freescale.com>
Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
---
Incorporated comments of Stephen and Tabi. Please review if they look
fine.
arch/powerpc/boot/dts/mpc832x_rdb.dts | 58 +++++++
arch/powerpc/sysdev/qe_lib/qe.c | 205 ++++++++++++++++++++++++--
arch/powerpc/sysdev/qe_lib/ucc.c | 265 +++++++++++++++++++++++++++++++++
arch/powerpc/sysdev/qe_lib/ucc_fast.c | 37 +++++
include/asm-powerpc/qe.h | 8 +
include/asm-powerpc/ucc.h | 4 +
include/asm-powerpc/ucc_fast.h | 4 +
7 files changed, 568 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 388c8a7..c0e6283 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -105,6 +105,17 @@
device_type = "par_io";
num-ports = <7>;
+ ucc1pio:ucc_pin@01 {
+ pio-map = <
+ /* port pin dir open_drain assignment has_irq */
+ 0 e 2 0 1 0 /* CLK11 */
+ 3 16 1 0 2 0 /* BRG9 */
+ 3 1b 1 0 2 0 /* BRG3 */
+ 0 0 3 0 2 0 /* TDMATxD0 */
+ 0 4 3 0 2 0 /* TDMARxD0 */
+ 3 1b 2 0 1 0>; /* CLK1 */
+ };
+
ucc2pio:ucc_pin@02 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
@@ -169,6 +180,36 @@
};
};
+ clocks {
+ compatible = "fsl,cpm-clocks";
+ /* clock freqs in Hz(for CLK1~CLK24).
+ * CLK11 is 1024KHz,
+ * all other clocks unused
+ * #clock-cells define number of cells
+ * used by the clock-frequency.
+ * right now only #clock cells=1 is
+ * implemented. Provision is there to
+ * handle frequencies >4Gig
+ */
+ #clock-cells = <1>;
+ clock-frequency = <0 0 0 0 0 0
+ 0 0 0 0 d#1024000 0
+ 0 0 0 0 0 0
+ 0 0 0 0 0 0>;
+ };
+
+ brg@640 {
+ compatible = "fsl,cpm-brg";
+ /* input clock sources for all the 16 BRGs.
+ * 1-24 for CLK1 to CLK24.
+ * BRG9 uses CLK11,BRG1 and BRG2-8 use
+ * the QE clock.
+ */
+ fsl,brg-sources = <0 0 0 0 0 0 0 0
+ b 0 0 0 0 0 0 0>;
+ reg = <640 7f>;
+ };
+
spi@4c0 {
device_type = "spi";
compatible = "fsl_spi";
@@ -187,6 +228,23 @@
mode = "cpu";
};
+ ucc@2000 {
+ device_type = "tdm";
+ compatible = "fsl,ucc-tdm";
+ model = "UCC";
+ device-id = <1>;
+ fsl,tdm-num = <1>;
+ fsl,si-num = <1>;
+ fsl,tdm-tx-clk = "CLK1";
+ fsl,tdm-rx-clk = "CLK1";
+ fsl,tdm-tx-sync = "BRG9";
+ fsl,tdm-rx-sync = "BRG9";
+ reg = <2000 200>;
+ interrupts = <20>;
+ interrupt-parent = <&qeic>;
+ pio-handle = <&ucc1pio>;
+ };
+
ucc@3000 {
device_type = "network";
compatible = "ucc_geth";
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 1df3b4a..f1bc902 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -149,20 +149,189 @@ EXPORT_SYMBOL(qe_issue_cmd);
*/
static unsigned int brg_clk = 0;
-unsigned int get_brg_clk(void)
+u32 get_brg_clk(enum qe_clock brgclk, enum qe_clock *brg_source)
{
- struct device_node *qe;
- if (brg_clk)
- return brg_clk;
+ struct device_node *qe, *brg, *clocks;
+ enum qe_clock brg_src;
+ u32 brg_input_freq = 0;
+ u32 brg_num;
+ int ret;
+ const unsigned int *prop;
- qe = of_find_node_by_type(NULL, "qe");
- if (qe) {
+ *brg_source = 0;
+
+ brg_num = brgclk - QE_BRG1;
+ brg = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
+ if (brg) {
unsigned int size;
- const u32 *prop = of_get_property(qe, "brg-frequency", &size);
- brg_clk = *prop;
- of_node_put(qe);
- };
- return brg_clk;
+ prop = of_get_property(brg,
+ "fsl,brg-sources", &size);
+ of_node_put(brg);
+
+ if (prop && *prop >= 1 && *prop <= 24)
+ brg_src = *(prop + brg_num);
+ else {
+ printk(KERN_ERR "%s: invalid fsl,brg-sources in device "
+ "tree\n", __FUNCTION__);
+ ret = -EINVAL;
+ goto err;
+ }
+ if (brg_src == 0) {
+ *brg_source = 0;
+ if (brg_clk > 0)
+ return brg_clk;
+ qe = of_find_node_by_type(NULL, "qe");
+ if (qe) {
+ unsigned int size;
+ prop = of_get_property
+ (qe, "brg-frequency", &size);
+ if (!prop) {
+ printk(KERN_ERR "%s: QE brg-frequency"
+ "not present in device tree\n",
+ __FUNCTION__);
+ ret = -EINVAL;
+ of_node_put(qe);
+ goto err;
+ }
+ if (*prop) {
+ of_node_put(qe);
+ brg_clk = *prop;
+ return *prop;
+ } else {
+ /*
+ * Older versions of U-Boot do not initialize
+ * the brg-frequency property, so in this case
+ * we assume the BRG frequency is half the QE
+ * bus frequency.
+ */
+ prop = of_get_property(qe,
+ "bus-frequency", NULL);
+ of_node_put(qe);
+ if (!prop) {
+ printk(KERN_ERR "%s: "
+ " QE bus-frequency not present"
+ " in device tree\n",
+ __FUNCTION__);
+ ret = -EINVAL;
+ goto err;
+ }
+ if (*prop) {
+ brg_clk = *prop / 2;
+ return brg_clk;
+ } else {
+ printk(KERN_ERR "%s: invalid"
+ " QE bus-frequency in device"
+ " tree\n", __FUNCTION__);
+ ret = -EINVAL;
+ goto err;
+ }
+ }
+ } else {
+ printk(KERN_ERR "%s: no qe node in device tree"
+ "\n", __FUNCTION__);
+ ret = EINVAL;
+ goto err;
+ }
+ } else {
+ *brg_source = brg_src + QE_CLK1 - 1;
+ clocks = of_find_compatible_node(NULL, NULL,
+ "fsl,cpm-clocks");
+ if (!clocks) {
+ printk(KERN_ERR "%s: no clocks node in device"
+ " tree \n", __FUNCTION__);
+ ret = -EINVAL;
+ goto err;
+ } else {
+ prop = of_get_property(clocks,
+ "#clock-cells", &size);
+ /*
+ * clock-cells = 1 only supported right now.
+ */
+ if (!prop || *prop != 1) {
+ printk(KERN_ERR "%s: invalid "
+ "#clock-cells value in device tree \n",
+ __FUNCTION__);
+ of_node_put(clocks);
+ ret = -EINVAL;
+ goto err;
+ }
+
+ prop = of_get_property(clocks,
+ "clock-frequency", &size);
+ if (!prop) {
+ printk(KERN_ERR "%s: no"
+ " #clock-frequency prop in device"
+ " tree\n", __FUNCTION__);
+ of_node_put(clocks);
+ ret = -EINVAL;
+ goto err;
+ }
+ brg_input_freq = *(prop+(brg_src - 1));
+ of_node_put(clocks);
+ return brg_input_freq;
+ }
+ }
+ } else {
+ printk(KERN_ERR "%s: no brg node in device tree\n",
+ __FUNCTION__);
+ ret = -EINVAL;
+ goto err;
+ }
+err: return ret;
+}
+
+u32 qe_brg_src(int brg_num, enum qe_clock brg_src)
+{
+ u32 clock_bits, shift;
+
+ clock_bits = 0;
+
+ switch (brg_num) {
+ case 1:
+ case 2:
+ case 5:
+ case 6:
+ switch (brg_src) {
+ case QE_CLK3: clock_bits = 1; break;
+ case QE_CLK5: clock_bits = 2; break;
+ default: break;
+ }
+ break;
+ case 3:
+ case 4:
+ case 7:
+ case 8:
+ switch (brg_src) {
+ case QE_CLK9: clock_bits = 1; break;
+ case QE_CLK15: clock_bits = 2; break;
+ default: break;
+ }
+ break;
+ case 9:
+ case 10:
+ switch (brg_src) {
+ case QE_CLK11: clock_bits = 1; break;
+ default: break;
+ }
+ break;
+ case 11:
+ case 15:
+ case 16:
+ switch (brg_src) {
+ case QE_CLK13: clock_bits = 1; break;
+ default: break;
+ }
+ break;
+ default: clock_bits = 0; break;
+ }
+ shift = 14;
+
+ if (!clock_bits)
+ return -ENOENT;
+
+ clock_bits <<= shift;
+
+ return clock_bits;
}
/* Program the BRG to the given sampling rate and multiplier
@@ -177,11 +346,18 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
{
u32 divisor, tempval;
u32 div16 = 0;
+ u32 brg_clock;
+ enum qe_clock brgsrc;
+ u32 src_bits = 0;
if ((brg < QE_BRG1) || (brg > QE_BRG16))
return -EINVAL;
- divisor = get_brg_clk() / (rate * multiplier);
+ brg_clock = get_brg_clk(brg, &brgsrc);
+ if (brg_clock < 0)
+ return -EINVAL;
+
+ divisor = brg_clock / (rate * multiplier);
if (divisor > QE_BRGC_DIVISOR_MAX + 1) {
div16 = QE_BRGC_DIV16;
@@ -194,8 +370,11 @@ int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier)
if (!div16 && (divisor & 1))
divisor++;
+ if (brgsrc > 0)
+ src_bits = qe_brg_src(brg - QE_BRG1 + 1, brgsrc);
+
tempval = ((divisor - 1) << QE_BRGC_DIVISOR_SHIFT) |
- QE_BRGC_ENABLE | div16;
+ QE_BRGC_ENABLE | div16 | src_bits;
out_be32(&qe_immr->brg.brgc[brg - QE_BRG1], tempval);
diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/arch/powerpc/sysdev/qe_lib/ucc.c
index 0e348d9..f2de0ed 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc.c
@@ -213,3 +213,268 @@ int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock,
return 0;
}
+
+int ucc_set_tdm_rxtx_clk(int tdm_num, char *clk_src, enum comm_dir mode)
+{
+ enum qe_clock clock;
+ u32 clock_bits, shift;
+ struct qe_mux *qe_mux_reg = NULL;
+
+ clock_bits = 0;
+ qe_mux_reg = &qe_immr->qmx;
+
+ if ((tdm_num > 3 || tdm_num < 0))
+ return -EINVAL;
+
+ /* The communications direction must be RX or TX */
+ if (!((mode == COMM_DIR_RX) || (mode == COMM_DIR_TX)))
+ return -EINVAL;
+
+ clock = qe_clock_source(clk_src);
+ switch (mode) {
+ case COMM_DIR_RX:
+ switch (tdm_num) {
+ case 0:
+ switch (clock) {
+ case QE_BRG3: clock_bits = 1; break;
+ case QE_BRG4: clock_bits = 2; break;
+ case QE_CLK1: clock_bits = 4; break;
+ case QE_CLK2: clock_bits = 5; break;
+ case QE_CLK3: clock_bits = 6; break;
+ case QE_CLK8: clock_bits = 7; break;
+ default: break;
+ }
+ shift = 28;
+ break;
+ case 1:
+ switch (clock) {
+ case QE_BRG3: clock_bits = 1; break;
+ case QE_BRG4: clock_bits = 2; break;
+ case QE_CLK1: clock_bits = 4; break;
+ case QE_CLK2: clock_bits = 5; break;
+ case QE_CLK5: clock_bits = 6; break;
+ case QE_CLK10: clock_bits = 7; break;
+ default: break;
+ }
+ shift = 24;
+ break;
+ case 2:
+ switch (clock) {
+ case QE_BRG3: clock_bits = 1; break;
+ case QE_BRG4: clock_bits = 2; break;
+ case QE_CLK1: clock_bits = 4; break;
+ case QE_CLK2: clock_bits = 5; break;
+ case QE_CLK7: clock_bits = 6; break;
+ case QE_CLK12: clock_bits = 7; break;
+ default: break;
+ }
+ shift = 20;
+ break;
+ case 3:
+ switch (clock) {
+ case QE_BRG3: clock_bits = 1; break;
+ case QE_BRG4: clock_bits = 2; break;
+ case QE_CLK1: clock_bits = 4; break;
+ case QE_CLK2: clock_bits = 5; break;
+ case QE_CLK9: clock_bits = 6; break;
+ case QE_CLK14: clock_bits = 7; break;
+ default: break;
+ }
+ shift = 16;
+ break;
+ default:
+ break;
+ }
+ break;
+ case COMM_DIR_TX:
+ switch (tdm_num) {
+ case 0:
+ switch (clock) {
+ case QE_BRG3: clock_bits = 1; break;
+ case QE_BRG4: clock_bits = 2; break;
+ case QE_CLK1: clock_bits = 4; break;
+ case QE_CLK2: clock_bits = 5; break;
+ case QE_CLK4: clock_bits = 6; break;
+ case QE_CLK9: clock_bits = 7; break;
+ default: break;
+ }
+ shift = 12;
+ break;
+ case 1:
+ switch (clock) {
+ case QE_BRG3: clock_bits = 1; break;
+ case QE_BRG4: clock_bits = 2; break;
+ case QE_CLK1: clock_bits = 4; break;
+ case QE_CLK2: clock_bits = 5; break;
+ case QE_CLK6: clock_bits = 6; break;
+ case QE_CLK11: clock_bits = 7; break;
+ default: break;
+ }
+ shift = 8;
+ break;
+ case 2:
+ switch (clock) {
+ case QE_BRG3: clock_bits = 1; break;
+ case QE_BRG4: clock_bits = 2; break;
+ case QE_CLK1: clock_bits = 4; break;
+ case QE_CLK2: clock_bits = 5; break;
+ case QE_CLK8: clock_bits = 6; break;
+ case QE_CLK13: clock_bits = 7; break;
+ default: break;
+ }
+ shift = 4;
+ break;
+ case 3:
+ switch (clock) {
+ case QE_BRG3: clock_bits = 1; break;
+ case QE_BRG4: clock_bits = 2; break;
+ case QE_CLK1: clock_bits = 4; break;
+ case QE_CLK2: clock_bits = 5; break;
+ case QE_CLK10: clock_bits = 6; break;
+ case QE_CLK15: clock_bits = 7; break;
+ default: break;
+ }
+ shift = 0;
+ break;
+ default:
+ break;
+ }
+ break;
+ default:
+ break;
+ }
+
+ if (!clock_bits)
+ return -ENOENT;
+
+ clock_bits <<= shift;
+
+ qe_mux_reg->cmxsi1cr_l |= clock_bits;
+
+ return 0;
+}
+
+int ucc_set_tdm_rxtx_sync(int tdm_num, char *sync_src, enum comm_dir mode)
+{
+ enum qe_clock clock;
+ u32 shift, clock_bits;
+ struct qe_mux *qe_mux_reg = NULL;
+ int source;
+
+ source = -1;
+ qe_mux_reg = &qe_immr->qmx;
+
+ if ((tdm_num > 3 || tdm_num < 0))
+ return -EINVAL;
+
+ /* The communications direction must be RX or TX */
+ if (!((mode == COMM_DIR_RX) || (mode == COMM_DIR_TX)))
+ return -EINVAL;
+
+ switch (mode) {
+ case COMM_DIR_RX:
+ if (strcasecmp("RSYNC", sync_src) == 0) {
+ source = 0;
+ shift = 0;
+ break;
+ }
+ clock = qe_clock_source(sync_src);
+ switch (tdm_num) {
+ case 0:
+ switch (clock) {
+ case QE_BRG9: source = 1; break;
+ case QE_BRG10: source = 2; break;
+ default: source = -1; break;
+ }
+ shift = 30;
+ break;
+ case 1:
+ switch (clock) {
+ case QE_BRG9: source = 1; break;
+ case QE_BRG10: source = 2; break;
+ default: source = -1; break;
+ }
+ shift = 28;
+ break;
+ case 2:
+ switch (clock) {
+ case QE_BRG9: source = 1; break;
+ case QE_BRG11: source = 2; break;
+ default: source = -1; break;
+ }
+ shift = 26;
+ break;
+ case 3:
+ switch (clock) {
+ case QE_BRG9: source = 1; break;
+ case QE_BRG11: source = 2; break;
+ default: source = -1; break;
+ }
+ shift = 24;
+ break;
+ default:
+ source = -1;
+ break;
+ }
+ break;
+ case COMM_DIR_TX:
+ if (strcasecmp("TSYNC", sync_src) == 0) {
+ source = 0;
+ shift = 0;
+ break;
+ }
+ clock = qe_clock_source(sync_src);
+ switch (tdm_num) {
+ case 0:
+ switch (clock) {
+ case QE_BRG9: source = 1; break;
+ case QE_BRG10: source = 2; break;
+ default: source = -1; break;
+ }
+ shift = 14;
+ break;
+ case 1:
+ switch (clock) {
+ case QE_BRG9: source = 1; break;
+ case QE_BRG10: source = 2; break;
+ default: source = -1; break;
+ }
+ shift = 12;
+ break;
+ case 2:
+ switch (clock) {
+ case QE_BRG9: source = 1; break;
+ case QE_BRG11: source = 2; break;
+ default: source = -1; break;
+ }
+ shift = 10;
+ break;
+ case 3:
+ switch (clock) {
+ case QE_BRG9: source = 1; break;
+ case QE_BRG11: source = 2; break;
+ default: source = -1; break;
+ }
+ shift = 8;
+ break;
+ default:
+ source = -1;
+ break;
+ }
+ break;
+ default:
+ source = -1;
+ break;
+ }
+
+ if (source == -1)
+ return -ENOENT;
+
+ clock_bits = (u32) source;
+ clock_bits <<= shift;
+
+
+ qe_mux_reg->cmxsi1syr |= clock_bits;
+
+ return 0;
+}
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_fast.c b/arch/powerpc/sysdev/qe_lib/ucc_fast.c
index 3223acb..9c8559f 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc_fast.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc_fast.c
@@ -327,6 +327,43 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
ucc_fast_free(uccf);
return -EINVAL;
}
+ } else {
+ /* TDM Rx clock routing */
+ if ((uf_info->tdm_rx_clk != NULL) &&
+ ucc_set_tdm_rxtx_clk(uf_info->ucc_num,
+ uf_info->tdm_rx_clk, COMM_DIR_RX)) {
+ printk(KERN_ERR "%s: illegal value for TDM RX clock",
+ __FUNCTION__);
+ ucc_fast_free(uccf);
+ return -EINVAL;
+ }
+ /* TDM Tx clock routing */
+ if ((uf_info->tdm_tx_clk != NULL) &&
+ ucc_set_tdm_rxtx_clk(uf_info->ucc_num,
+ uf_info->tdm_tx_clk, COMM_DIR_TX)) {
+ printk(KERN_ERR "%s: illegal value for TDM TX clock",
+ __FUNCTION__);
+ ucc_fast_free(uccf);
+ return -EINVAL;
+ }
+ /* TDM Rx sync routing */
+ if ((uf_info->tdm_rx_sync != NULL) &&
+ ucc_set_tdm_rxtx_sync(uf_info->ucc_num,
+ uf_info->tdm_rx_sync, COMM_DIR_RX)) {
+ printk(KERN_ERR "%s: illegal value for TDM RX"
+ "Frame sync", __FUNCTION__);
+ ucc_fast_free(uccf);
+ return -EINVAL;
+ }
+ /* TDM Tx sync routing */
+ if ((uf_info->tdm_tx_sync != NULL) &&
+ ucc_set_tdm_rxtx_sync(uf_info->ucc_num,
+ uf_info->tdm_tx_sync, COMM_DIR_TX)) {
+ printk(KERN_ERR "%s: illegal value for TDM TX"
+ "Frame sync", __FUNCTION__);
+ ucc_fast_free(uccf);
+ return -EINVAL;
+ }
}
/* Set interrupt mask register at UCC level. */
diff --git a/include/asm-powerpc/qe.h b/include/asm-powerpc/qe.h
index bcf60be..51de236 100644
--- a/include/asm-powerpc/qe.h
+++ b/include/asm-powerpc/qe.h
@@ -497,6 +497,14 @@ struct ucc_slow_pram {
#define UCC_GETH_UCCE_RXF1 0x00000002
#define UCC_GETH_UCCE_RXF0 0x00000001
+/* Transparent UCC Event Register (UCCE) */
+#define UCC_TRANS_UCCE_GRA 0x0080
+#define UCC_TRANS_UCCE_TXE 0x0010
+#define UCC_TRANS_UCCE_RXF 0x0008
+#define UCC_TRANS_UCCE_BSY 0x0004
+#define UCC_TRANS_UCCE_TXB 0x0002
+#define UCC_TRANS_UCCE_RXB 0x0001
+
/* UPSMR, when used as a UART */
#define UCC_UART_UPSMR_FLC 0x8000
#define UCC_UART_UPSMR_SL 0x4000
diff --git a/include/asm-powerpc/ucc.h b/include/asm-powerpc/ucc.h
index 46b09ba..153db97 100644
--- a/include/asm-powerpc/ucc.h
+++ b/include/asm-powerpc/ucc.h
@@ -42,6 +42,10 @@ int ucc_set_qe_mux_mii_mng(unsigned int ucc_num);
int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock,
enum comm_dir mode);
+int ucc_set_tdm_rxtx_clk(int tdm_num, char *clk_src, enum comm_dir mode);
+
+int ucc_set_tdm_rxtx_sync(int tdm_num, char *clk_src, enum comm_dir mode);
+
int ucc_mux_set_grant_tsa_bkpt(unsigned int ucc_num, int set, u32 mask);
/* QE MUX clock routing for UCC
diff --git a/include/asm-powerpc/ucc_fast.h b/include/asm-powerpc/ucc_fast.h
index f529f70..d267983 100644
--- a/include/asm-powerpc/ucc_fast.h
+++ b/include/asm-powerpc/ucc_fast.h
@@ -152,6 +152,10 @@ struct ucc_fast_info {
enum ucc_fast_rx_decoding_method renc;
enum ucc_fast_transparent_tcrc tcrc;
enum ucc_fast_sync_len synl;
+ char *tdm_rx_clk;
+ char *tdm_tx_clk;
+ char *tdm_rx_sync;
+ char *tdm_tx_sync;
};
struct ucc_fast_private {
--
1.5.3.3
^ permalink raw reply related
* Re: dtc: Remove remaining old-style checks
From: Jon Loeliger @ 2007-12-18 13:56 UTC (permalink / raw)
To: David Gibson; +Cc: linuxppc-dev
In-Reply-To: <20071218035438.GA10348@localhost.localdomain>
So, like, the other day David Gibson mumbled:
> The remaining old-style tree checking code: check_root(), check_cpus()
> and check_memory() really aren't that useful. They mostly check for
> the presence of particular nodes and properties. That's inherently
> prone to false-positives, because we could be dealing with an
> artificial tree (like many of the testcases) or it could be expected
> that the missing properties are filled in by a bootloader or other
> agent.
>
> If any of these checks really turns out to be useful, we can
> reimplement them later in a better conceived way on top of the new
> checking infrastructure. For now, just get rid of them, removing the
> last vestiges of the old-style checking code (hoorah).
>
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Applied.
Thanks,
jdl
^ permalink raw reply
* Re: [PATCH/RFC] [POWERPC] Add fixed-phy support for fs_enet
From: Vitaly Bordug @ 2007-12-18 15:10 UTC (permalink / raw)
To: Jochen Friedrich; +Cc: linuxppc-dev, linux-kernel, Jeff Garzik, netdev
In-Reply-To: <4767042E.2070903@garzik.org>
On Mon, 17 Dec 2007 18:20:14 -0500
Jeff Garzik wrote:
> Jochen Friedrich wrote:
> > This patch adds support to use the fixed-link property
> > of an ethernet node to fs_enet for the
> > CONFIG_PPC_CPM_NEW_BINDING case.
> >
> > Signed-off-by: Jochen Friedrich <jochen@scram.de>
Acked-by: Vitaly Bordug <vitb@kernel.crashing.org>
Jochen,
will you resend the patch with all acks to paulus? I'll do that if not.
--
Sincerely, Vitaly
^ permalink raw reply
* [PATCH] [POWERPC] Add fixed-phy support for fs_enet
From: Jochen Friedrich @ 2007-12-18 15:25 UTC (permalink / raw)
To: Paul Mackerras, Vitaly Bordug
Cc: linuxppc-dev, Garzik, Jeff, Kernel, Linux, netdev
This patch adds support to use the fixed-link property
of an ethernet node to fs_enet for the
CONFIG_PPC_CPM_NEW_BINDING case.
Signed-off-by: Jochen Friedrich <jochen@scram.de>
Acked-by: Jeff Garzik <jeff@garzik.org>
Acked-by: Vitali Bordug <vitb@kernel.crashing.org>
---
drivers/net/fs_enet/fs_enet-main.c | 9 ++++++++-
1 files changed, 8 insertions(+), 1 deletions(-)
diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index f2a4d39..8220c70 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -1174,8 +1174,15 @@ static int __devinit find_phy(struct device_node *np,
struct device_node *phynode, *mdionode;
struct resource res;
int ret = 0, len;
+ const u32 *data;
+
+ data = of_get_property(np, "fixed-link", NULL);
+ if (data) {
+ snprintf(fpi->bus_id, 16, PHY_ID_FMT, 0, *data);
+ return 0;
+ }
- const u32 *data = of_get_property(np, "phy-handle", &len);
+ data = of_get_property(np, "phy-handle", &len);
if (!data || len != 4)
return -EINVAL;
--
1.5.3.7
^ permalink raw reply related
* Re: [PATCH] [POWERPC][RFC] MPC8360E-RDK: Device tree and board file
From: Kumar Gala @ 2007-12-18 15:53 UTC (permalink / raw)
To: avorontsov; +Cc: Stephen Rothwell, linuxppc-dev
In-Reply-To: <20071215162331.GA24999@localhost.localdomain>
On Dec 15, 2007, at 10:23 AM, Anton Vorontsov wrote:
>
> + i2c@3000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + device_type = "i2c";
> + compatible = "fsl-i2c";
> + reg = <0x3000 0x100>;
> + interrupts = <14 8>;
> + interrupt-parent = <&ipic>;
> + dfsrr;
> + };
> +
> + i2c@3100 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + device_type = "i2c";
> + compatible = "fsl-i2c";
> + reg = <0x3100 0x100>;
> + interrupts = <16 8>;
> + interrupt-parent = <&ipic>;
> + dfsrr;
> + };
> +
In addition to David's comments. I've added cell-index:
i2c@3000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
reg = <3000 100>;
interrupts = <e 8>;
interrupt-parent = < &ipic >;
dfsrr;
};
i2c@3100 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
reg = <3100 100>;
interrupts = <f 8>;
interrupt-parent = < &ipic >;
dfsrr;
};
^ permalink raw reply
* Re: [PATCH 1/7] Copy mpc-i2c to preserve support for ARCH=ppc and allow changes on ARCH=powerpc
From: Kumar Gala @ 2007-12-18 15:53 UTC (permalink / raw)
To: Jon Smirl; +Cc: linuxppc-dev, i2c, linux-kernel
In-Reply-To: <20071218023915.8530.67500.stgit@terra.home>
On Dec 17, 2007, at 8:39 PM, Jon Smirl wrote:
> Temporarily copy the mpc-i2c driver to continue support for the ppc
> architecture until it is removed in mid-2008. This file should be
> deleted as part of ppc's final removal.
>
> Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
>
> Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
>
> Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
> ---
>
> arch/ppc/configs/TQM8540_defconfig | 2
> arch/ppc/configs/TQM8541_defconfig | 2
> arch/ppc/configs/TQM8555_defconfig | 2
> arch/ppc/configs/TQM8560_defconfig | 2
> arch/ppc/configs/mpc834x_sys_defconfig | 2
> arch/ppc/configs/mpc8540_ads_defconfig | 2
> arch/ppc/configs/mpc8548_cds_defconfig | 2
> arch/ppc/configs/mpc8555_cds_defconfig | 2
> arch/ppc/configs/mpc8560_ads_defconfig | 2
> drivers/i2c/busses/Kconfig | 16 +
> drivers/i2c/busses/Makefile | 1
> drivers/i2c/busses/i2c-mpc-ppc.c | 418 +++++++++++++++++++++++
> +++++++++
> 12 files changed, 443 insertions(+), 10 deletions(-)
> create mode 100644 drivers/i2c/busses/i2c-mpc-ppc.c
Nak.
Just ifdef the probe functionality in i2c-mpc.c based on
CONFIG_PPC_MERGE. Your patch set shows the reason you should do
this. You provide fixes to the error path handling, but only for i2c-
mpc.c and not i2c-mpc-ppc.c.
- k
^ permalink raw reply
* Re: Raising list size limit
From: Kumar Gala @ 2007-12-18 15:54 UTC (permalink / raw)
To: Stephen Rothwell; +Cc: ppc-dev
In-Reply-To: <20071218060105.368f0bd4@zod.rchland.ibm.com>
On Dec 18, 2007, at 6:01 AM, Josh Boyer wrote:
> On Tue, 18 Dec 2007 14:36:27 +1100
> Stephen Rothwell <sfr@canb.auug.org.au> wrote:
>
>> Hi,
>>
>> I am considering raising the limit on the size of postings to
>> 400k. Does
>> anyone have a real problem with this? Limiting message size was
>> done to
>> limit the damage of larges spams (and we don;t get very many of
>> those on
>> the list) and to ease the pain for people downloading emails over a
>> slow
>> (like dialup) link (and are there many of those left?).
>
> Fine by me!
Do you really have patches that are 400k?
- k
^ permalink raw reply
* Re: Raising list size limit
From: Olof Johansson @ 2007-12-18 16:12 UTC (permalink / raw)
To: Kumar Gala; +Cc: Stephen Rothwell, ppc-dev
In-Reply-To: <2420E261-C9AB-49B8-8F99-C24C7A865044@kernel.crashing.org>
On Tue, Dec 18, 2007 at 09:54:15AM -0600, Kumar Gala wrote:
>
> On Dec 18, 2007, at 6:01 AM, Josh Boyer wrote:
>
> > On Tue, 18 Dec 2007 14:36:27 +1100
> > Stephen Rothwell <sfr@canb.auug.org.au> wrote:
> >
> >> Hi,
> >>
> >> I am considering raising the limit on the size of postings to
> >> 400k. Does
> >> anyone have a real problem with this? Limiting message size was
> >> done to
> >> limit the damage of larges spams (and we don;t get very many of
> >> those on
> >> the list) and to ease the pain for people downloading emails over a
> >> slow
> >> (like dialup) link (and are there many of those left?).
> >
> > Fine by me!
>
> Do you really have patches that are 400k?
I'm guessing stuff such as "dtc merge" could reach those sizes?
Since it's somewhat common to cross-post patches (especially some of the
@de.ibm.com guys seem to post to 2-5 lists at a time), having a limit
higher than other lists could mean we see the same (large) patches several
times in case they bounce from other lists and get reposted. But it should
be a small fraction of the traffic no matter what.
-Olof
^ permalink raw reply
* Re: [PATCH v2 1/3] 8xx: Analogue & Micro Adder875 board support.
From: Scott Wood @ 2007-12-18 16:09 UTC (permalink / raw)
To: Scott Wood, galak, linuxppc-dev
In-Reply-To: <20071218004329.GB9489@localhost.localdomain>
David Gibson wrote:
> On Mon, Dec 17, 2007 at 09:15:17AM -0600, Scott Wood wrote:
>> Enh. That can get icky as well, and the bootwrapper isn't necessarily
>> even used for u-boot, and I'd rather not require it be used just for this.
>
> So make the template in the u-boot form, and poke it as necessary from
> the redboot wrapper.
I'd rather not, given that I have limited access to a board with redboot
to test on, and that it's just a cosmetic change. Separate device trees
are fine for now, and hopefully will motivate work on dtc templates.
-Scott
^ permalink raw reply
* Re: [PATCH 03/10] powerpc: Add kexec support for PPC_85xx platforms
From: Dale Farnsworth @ 2007-12-18 16:14 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1197699385.6696.43.camel@pasglop>
On Sat, Dec 15, 2007 at 05:16:25PM +1100, Benjamin Herrenschmidt wrote:
> > index 8b642ab..db0e749 100644
> > --- a/arch/powerpc/kernel/misc_32.S
> > +++ b/arch/powerpc/kernel/misc_32.S
> > @@ -816,6 +816,75 @@ relocate_new_kernel:
> > /* r4 = reboot_code_buffer */
> > /* r5 = start_address */
> >
> > +#ifdef CONFIG_E500
> > + /*
> > + * Since we can't turn off the MMU, we must create an identity
> > + * map for kernel low memory. We start by invalidating the
> > + * TLB entries we don't need.
> > + *
> > + * First, invalidate the TLB0 entries
> > + */
> > + li r6, 0x04
> > + tlbivax 0, r6
> > +#ifdef CONFIG_SMP
> > + tlbsync
> > +#endif
> > + msync
> > +
>
> This is really E500 specific or should it be CONFIG_FSL_BOOKE ?
>
> Ben.
I agree that CONFIG_FSL_BOOKE is more appropriate. I'll reflect that
in the next respin.
Thanks,
-Dale
^ permalink raw reply
* Re: [PATCH v2 2/3] mpc82xx: Embedded Planet EP8248E support
From: Scott Wood @ 2007-12-18 16:15 UTC (permalink / raw)
To: Scott Wood, galak, linuxppc-dev
In-Reply-To: <20071218005348.GC9489@localhost.localdomain>
David Gibson wrote:
> I mean, obviously the MDIO bus is accessed via some of the
> board-control registers. What I'm questioning is whether it makes
> sense to have a distinct node to represent the mdio bus, or whether
> the phys should just hang straight of the bcsr node.
Ah, I see. I think it does make sense, because it's a bus; if there
were another bus-like thing on the bcsr, there'd be conflicts over what
the children mean.
>>>> + soc@f0000000 {
>>>> + #address-cells = <1>;
>>>> + #size-cells = <1>;
>>>> + device_type = "soc";
>>> Ditch the device_type.
>> No, it's used by the bootwrapper. I'll get rid of it if you want to
>> write a find_node_by_compatible() function. :-)
>
> Well, now that libfdt is merged, there is one :-p.
OK, it just needs exporting via ops. I'll put it on my to-do list, but
I don't think it should hold up board support patches.
-Scott
^ permalink raw reply
* Re: [PATCH] [POWERPC][RFC] MPC8360E-RDK: Device tree and board file
From: Scott Wood @ 2007-12-18 16:16 UTC (permalink / raw)
To: Scott Wood, Anton Vorontsov, Kumar Gala, Stephen Rothwell,
linuxppc-dev, Kim Phillips
In-Reply-To: <20071218035108.GA10212@localhost.localdomain>
David Gibson wrote:
> In this case the driver and binding have been developed together and
> for the time being it does require PHY nodes, obviously. I'm saying
> that maybe that requirement ought to be changed.
I don't see why.
> Well, phandle is only used to find the phy node itself, so it doesn't
> count. The only piece of information there is the reg - the PHY id.
> Following a phandle to another node is a fairly complex way of finding
> a single integer.
>
> Eh, I guess it's ok, but just directly giving the PHY id or a probe
> mask in the MAC node would also be fine (we do this for 4xx EMAC).
It's not just a simple integer -- it also tells you which mdio bus it's on.
-Scott
^ permalink raw reply
* Re: [PATCH 07/10] powerpc: Implement kmap_atomic_pfn on powerpc
From: Dale Farnsworth @ 2007-12-18 16:20 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1197699461.6696.45.camel@pasglop>
On Sat, Dec 15, 2007 at 05:17:41PM +1100, Benjamin Herrenschmidt wrote:
>
> On Thu, 2007-11-22 at 08:46 -0700, Dale Farnsworth wrote:
> > This is needed for the ppc32 /dev/oldmem driver of crash dump.
>
> Kumar's working (well, last I heard he was) on a fixmap mechanism
> so we can do that sort of thing without CONFIG_HIGHMEM, you may
> want to sync with him here, that would allow to shrink the crash
> kernel by not having highmem selected.
>
> Cheers,
> Ben.
Kumar, are you close to posting something that would make the
patch below unnecessary (or change it significantly)? If so,
I'll hold off.
-Dale
> > Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
> > ---
> > include/asm-powerpc/highmem.h | 18 ++++++++++++++++++
> > 1 files changed, 18 insertions(+), 0 deletions(-)
> >
> > diff --git a/include/asm-powerpc/highmem.h b/include/asm-powerpc/highmem.h
> > index f7b21ee..88d9e05 100644
> > --- a/include/asm-powerpc/highmem.h
> > +++ b/include/asm-powerpc/highmem.h
> > @@ -117,6 +117,24 @@ static inline void kunmap_atomic(void *kvaddr, enum km_type type)
> > pagefault_enable();
> > }
> >
> > +/* This is the same as kmap_atomic() but can map memory that doesn't
> > + * have a struct page associated with it.
> > + */
> > +static inline void *kmap_atomic_pfn(unsigned long pfn, enum km_type type)
> > +{
> > + unsigned int idx;
> > + unsigned long vaddr;
> > +
> > + pagefault_disable();
> > +
> > + idx = type + KM_TYPE_NR * smp_processor_id();
> > + vaddr = KMAP_FIX_BEGIN + idx * PAGE_SIZE;
> > + set_pte_at(&init_mm, vaddr, kmap_pte+idx, pfn_pte(pfn, kmap_prot));
> > + flush_tlb_page(NULL, vaddr);
> > +
> > + return (void*) vaddr;
> > +}
> > +
> > static inline struct page *kmap_atomic_to_page(void *ptr)
> > {
> > unsigned long idx, vaddr = (unsigned long) ptr;
^ permalink raw reply
* Re: USB configuration
From: Scott Wood @ 2007-12-18 16:19 UTC (permalink / raw)
To: Misbah khan; +Cc: linuxppc-embedded
In-Reply-To: <14389002.post@talk.nabble.com>
Misbah khan wrote:
> hi ...
>
> The montavista version we are using is " 2.6.10_mvl401-8272ads "
>
> Montavista people says that they are supporting USB host interface ....
If MV claims that they support the MPC82xx USB host controller, then you
should be talking to MV... it's not supported in the mainline kernel.
-Scott
^ permalink raw reply
* Re: Raising list size limit
From: Josh Boyer @ 2007-12-18 16:30 UTC (permalink / raw)
To: Kumar Gala; +Cc: Stephen Rothwell, ppc-dev
In-Reply-To: <2420E261-C9AB-49B8-8F99-C24C7A865044@kernel.crashing.org>
On Tue, 18 Dec 2007 09:54:15 -0600
Kumar Gala <galak@kernel.crashing.org> wrote:
>
> On Dec 18, 2007, at 6:01 AM, Josh Boyer wrote:
>
> > On Tue, 18 Dec 2007 14:36:27 +1100
> > Stephen Rothwell <sfr@canb.auug.org.au> wrote:
> >
> >> Hi,
> >>
> >> I am considering raising the limit on the size of postings to
> >> 400k. Does
> >> anyone have a real problem with this? Limiting message size was
> >> done to
> >> limit the damage of larges spams (and we don;t get very many of
> >> those on
> >> the list) and to ease the pain for people downloading emails over a
> >> slow
> >> (like dialup) link (and are there many of those left?).
> >
> > Fine by me!
>
> Do you really have patches that are 400k?
Nope. But I don't really care if I get them.
josh
^ permalink raw reply
* Re: [PATCH 1/5] PowerPC 74xx: Katana Qp device tree
From: Dale Farnsworth @ 2007-12-18 16:38 UTC (permalink / raw)
To: Dale Farnsworth, Linuxppc-dev
In-Reply-To: <20071216064056.GH21311@localhost.localdomain>
On Sun, Dec 16, 2007 at 05:40:56PM +1100, David Gibson wrote:
> On Mon, Dec 10, 2007 at 02:18:16PM -0700, Dale Farnsworth wrote:
> > David Gibson wrote:
> > > On Thu, Nov 29, 2007 at 06:28:36PM +0300, Andrei Dolnikov wrote:
> > > > Device tree source file for the Emerson Katana Qp board
> >
> > [snip]
> >
> > > > + mv64x60@f8100000 { /* Marvell Discovery */
> > > > + #address-cells = <1>;
> > > > + #size-cells = <1>;
> > > > + model = "mv64460"; /* Default */
> > > > + compatible = "marvell,mv64x60";
> >
> > [snip]
> >
> > > > + mdio {
> > >
> > > There must be some way of actuall accessing the mdio bus, so this node
> > > ought to have a 'reg' property and unit address.
> >
> > There is no way for the cpu to directly access the mdio bus. The
> > mdio bus is internally accessed by the ethernet MAC. That being the
> > case, maybe it makes more sense to move the mdio node inside of the
> > multiethernet node, as follows, but I don't see how we can give it
> > a reg property or a unit address.
>
> Ah, I see. If the mdio interface isn't distinct from the other
> pieces, then it probably shouldn't get a device node at all. Having
> an explicit mdio bus with the phys hanging off it is convenient for
> hardware which actually works that way, but it doesn't have to be done
> like that.
>
> Of course, then the question is where to hang the phy nodes, which
> look like they have information you need. Since you already have a
> local addressing scheme for the MACs under the multiethernet, what
> probably makes sense would be to hang the phys directly under the
> multiethernet, using an encoding scheme for the reg properties so that
> the MACs and PHYs aren't confused (say, MACs are 0x0, 0x1, 0x2, PHYs
> are 0x80000000, 0x80000001, 0x80000002).
Ugh. They really are two separate address spaces. One is an
intra-register index, and the other really is an mdio address,
even though it's only indirectly addressable. Combining them would
obfuscate. I'm proceding with an mdio node under the multiethernet
node as I posted below. Let me know if you feel strongly that that
should be changed.
> Incidentally, although I suggested it, I'm not all that fond of the
> "multiethernet" name, it was just the first thing that occurred to me.
I'm not fond of it either. Sometimes, naming is hard. :)
I'll see if we can come up with something better.
Thanks,
-Dale
> >
> > multiethernet@2000 {
> > reg = <0x2000 0x2000>;
> > ethernet@0 {
> > device_type = "network";
> > compatible = "marvell,mv64360-eth";
> > reg = <0>;
> > interrupts = <32>;
> > interrupt-parent = <&PIC>;
> > phy = <&PHY0>;
> > local-mac-address = [ 00 00 00 00 00 00 ];
> > };
> > ethernet@1 {
> > device_type = "network";
> > compatible = "marvell,mv64360-eth";
> > reg = <1>;
> > interrupts = <33>;
> > interrupt-parent = <&PIC>;
> > phy = <&PHY1>;
> > local-mac-address = [ 00 00 00 00 00 00 ];
> > };
> > mdio {
> > #address-cells = <1>;
> > #size-cells = <0>;
> > device_type = "mdio";
> > compatible = "marvell,mv64360-mdio";
> > PHY0: ethernet-phy@1 {
> > device_type = "ethernet-phy";
> > compatible = "broadcom,bcm5421";
> > interrupts = <76>; /* GPP 12 */
> > interrupt-parent = <&PIC>;
> > reg = <1>;
> > };
> > PHY1: ethernet-phy@3 {
> > device_type = "ethernet-phy";
> > compatible = "broadcom,bcm5421";
> > interrupts = <76>; /* GPP 12 */
> > interrupt-parent = <&PIC>;
> > reg = <3>;
> > };
> > };
> > };
^ permalink raw reply
* Re: [PATCH 07/10] powerpc: Implement kmap_atomic_pfn on powerpc
From: Kumar Gala @ 2007-12-18 16:42 UTC (permalink / raw)
To: Dale Farnsworth; +Cc: linuxppc-dev
In-Reply-To: <20071218162032.GB28931@xyzzy.farnsworth.org>
On Dec 18, 2007, at 10:20 AM, Dale Farnsworth wrote:
> On Sat, Dec 15, 2007 at 05:17:41PM +1100, Benjamin Herrenschmidt
> wrote:
>>
>> On Thu, 2007-11-22 at 08:46 -0700, Dale Farnsworth wrote:
>>> This is needed for the ppc32 /dev/oldmem driver of crash dump.
>>
>> Kumar's working (well, last I heard he was) on a fixmap mechanism
>> so we can do that sort of thing without CONFIG_HIGHMEM, you may
>> want to sync with him here, that would allow to shrink the crash
>> kernel by not having highmem selected.
>>
>> Cheers,
>> Ben.
>
> Kumar, are you close to posting something that would make the
> patch below unnecessary (or change it significantly)? If so,
> I'll hold off.
My plan is to get the fixmap stuff posted this week.
- k
^ permalink raw reply
* Re: [PATCH] [POWERPC][RFC] MPC8360E-RDK: Device tree and board file
From: Anton Vorontsov @ 2007-12-18 16:51 UTC (permalink / raw)
To: Scott Wood; +Cc: Stephen Rothwell, linuxppc-dev
In-Reply-To: <4767F271.4090703@freescale.com>
On Tue, Dec 18, 2007 at 10:16:49AM -0600, Scott Wood wrote:
> David Gibson wrote:
> >In this case the driver and binding have been developed together and
> >for the time being it does require PHY nodes, obviously. I'm saying
> >that maybe that requirement ought to be changed.
>
> I don't see why.
>
> >Well, phandle is only used to find the phy node itself, so it doesn't
> >count. The only piece of information there is the reg - the PHY id.
> >Following a phandle to another node is a fairly complex way of finding
> >a single integer.
> >
> >Eh, I guess it's ok, but just directly giving the PHY id or a probe
> >mask in the MAC node would also be fine (we do this for 4xx EMAC).
>
> It's not just a simple integer -- it also tells you which mdio bus it's on.
Exactly. And at least one board (MPC8568E-MDS) using this feature:
UECs are using PHYs placed on the TSEC's MDIO bus. This is hardware
configurable, and could be contrariwise: TSECs can use PHYs that
are under control of UEC MDIO bus controller.
That's why we're naming PHYs as bus:phyid.
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* [POWERPC 12/18] cell: export force_sig_info()
From: arnd @ 2007-12-18 17:49 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev, Jeremy Kerr
In-Reply-To: <20071218174852.112644000@arndb.de>
Export force_sig_info to allow signals to be sent from a modular spufs.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/powerpc/platforms/cell/spu_base.c | 7 +++++++
1 files changed, 7 insertions(+), 0 deletions(-)
Index: linux-2.6-new/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linux-2.6-new.orig/arch/powerpc/platforms/cell/spu_base.c
+++ linux-2.6-new/arch/powerpc/platforms/cell/spu_base.c
@@ -47,6 +47,13 @@ struct cbe_spu_info cbe_spu_info[MAX_NUM
EXPORT_SYMBOL_GPL(cbe_spu_info);
/*
+ * The spufs fault-handling code needs to call force_sig_info to raise signals
+ * on DMA errors. Export it here to avoid general kernel-wide access to this
+ * function
+ */
+EXPORT_SYMBOL_GPL(force_sig_info);
+
+/*
* Protects cbe_spu_info and spu->number.
*/
static DEFINE_SPINLOCK(spu_lock);
--
^ permalink raw reply
* [POWERPC 13/18] cell: safer of_has_vicinity routine
From: arnd @ 2007-12-18 17:49 UTC (permalink / raw)
To: paulus; +Cc: Jeremy Kerr, linuxppc-dev, Arnd Bergmann, Andre Detsch
In-Reply-To: <20071218174852.112644000@arndb.de>
This patch changes the way we check for the existence of
vicinity property in spe device nodes.
The new implementation does not depend on having an initialized
cbe_spu_info[0].spus, and checks for presence of vicinity in all
nodes, not only in the first one.
Signed-off-by: Andre Detsch <adetsch@br.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/powerpc/platforms/cell/spu_manage.c | 11 ++++++++---
1 files changed, 8 insertions(+), 3 deletions(-)
Index: linux-2.6-new/arch/powerpc/platforms/cell/spu_manage.c
===================================================================
--- linux-2.6-new.orig/arch/powerpc/platforms/cell/spu_manage.c
+++ linux-2.6-new/arch/powerpc/platforms/cell/spu_manage.c
@@ -422,10 +422,15 @@ static void init_affinity_qs20_harcoded(
static int of_has_vicinity(void)
{
- struct spu* spu;
+ struct device_node *dn;
- spu = list_first_entry(&cbe_spu_info[0].spus, struct spu, cbe_list);
- return of_find_property(spu_devnode(spu), "vicinity", NULL) != NULL;
+ for_each_node_by_type(dn, "spe") {
+ if (of_find_property(dn, "vicinity", NULL)) {
+ of_node_put(dn);
+ return 1;
+ }
+ }
+ return 0;
}
static struct spu *devnode_spu(int cbe, struct device_node *dn)
--
^ permalink raw reply
* [POWERPC 14/18] cell: handle kernel SLB setup in spu_base.c
From: arnd @ 2007-12-18 17:49 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev, Jeremy Kerr
In-Reply-To: <20071218174852.112644000@arndb.de>
Currently, the SPU context switch code (spufs/switch.c) sets up the
SPU's SLBs directly, which requires some low-level mm stuff.
This change moves the kernel SLB setup to spu_base.c, by exposing
a function spu_setup_kernel_slbs() to do this setup. This allows us
to remove the low-level mm code from switch.c, making it possible
to later move switch.c to the spufs module.
Also, add a struct spu_slb for the cases where we need to deal with
SLB entries.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/powerpc/platforms/cell/spu_base.c | 49 ++++++++++++++++++++++++++++
arch/powerpc/platforms/cell/spufs/switch.c | 33 +------------------
include/asm-powerpc/spu.h | 4 ++
3 files changed, 54 insertions(+), 32 deletions(-)
Index: linux-2.6-new/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linux-2.6-new.orig/arch/powerpc/platforms/cell/spu_base.c
+++ linux-2.6-new/arch/powerpc/platforms/cell/spu_base.c
@@ -34,6 +34,7 @@
#include <linux/linux_logo.h>
#include <asm/spu.h>
#include <asm/spu_priv1.h>
+#include <asm/spu_csa.h>
#include <asm/xmon.h>
#include <asm/prom.h>
@@ -73,6 +74,10 @@ static LIST_HEAD(spu_full_list);
static DEFINE_SPINLOCK(spu_full_list_lock);
static DEFINE_MUTEX(spu_full_list_mutex);
+struct spu_slb {
+ u64 esid, vsid;
+};
+
void spu_invalidate_slbs(struct spu *spu)
{
struct spu_priv2 __iomem *priv2 = spu->priv2;
@@ -150,6 +155,18 @@ static void spu_restart_dma(struct spu *
out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
}
+static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
+{
+ struct spu_priv2 __iomem *priv2 = spu->priv2;
+
+ pr_debug("%s: adding SLB[%d] 0x%016lx 0x%016lx\n",
+ __func__, slbe, slb->vsid, slb->esid);
+
+ out_be64(&priv2->slb_index_W, slbe);
+ out_be64(&priv2->slb_vsid_RW, slb->vsid);
+ out_be64(&priv2->slb_esid_RW, slb->esid);
+}
+
static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
{
struct spu_priv2 __iomem *priv2 = spu->priv2;
@@ -239,6 +256,38 @@ static int __spu_trap_data_map(struct sp
return 0;
}
+static void __spu_kernel_slb(void *addr, struct spu_slb *slb)
+{
+ unsigned long ea = (unsigned long)addr;
+ u64 llp;
+
+ if (REGION_ID(ea) == KERNEL_REGION_ID)
+ llp = mmu_psize_defs[mmu_linear_psize].sllp;
+ else
+ llp = mmu_psize_defs[mmu_virtual_psize].sllp;
+
+ slb->vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
+ SLB_VSID_KERNEL | llp;
+ slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
+}
+
+/**
+ * Setup the SPU kernel SLBs, in preparation for a context save/restore. We
+ * need to map both the context save area, and the save/restore code.
+ */
+void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa, void *code)
+{
+ struct spu_slb code_slb, lscsa_slb;
+
+ __spu_kernel_slb(lscsa, &lscsa_slb);
+ __spu_kernel_slb(code, &code_slb);
+
+ spu_load_slb(spu, 0, &lscsa_slb);
+ if (lscsa_slb.esid != code_slb.esid)
+ spu_load_slb(spu, 1, &code_slb);
+}
+EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
+
static irqreturn_t
spu_irq_class_0(int irq, void *data)
{
Index: linux-2.6-new/arch/powerpc/platforms/cell/spufs/switch.c
===================================================================
--- linux-2.6-new.orig/arch/powerpc/platforms/cell/spufs/switch.c
+++ linux-2.6-new/arch/powerpc/platforms/cell/spufs/switch.c
@@ -691,35 +691,8 @@ static inline void resume_mfc_queue(stru
out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESUME_DMA_QUEUE);
}
-static inline void get_kernel_slb(u64 ea, u64 slb[2])
-{
- u64 llp;
-
- if (REGION_ID(ea) == KERNEL_REGION_ID)
- llp = mmu_psize_defs[mmu_linear_psize].sllp;
- else
- llp = mmu_psize_defs[mmu_virtual_psize].sllp;
- slb[0] = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
- SLB_VSID_KERNEL | llp;
- slb[1] = (ea & ESID_MASK) | SLB_ESID_V;
-}
-
-static inline void load_mfc_slb(struct spu *spu, u64 slb[2], int slbe)
-{
- struct spu_priv2 __iomem *priv2 = spu->priv2;
-
- out_be64(&priv2->slb_index_W, slbe);
- eieio();
- out_be64(&priv2->slb_vsid_RW, slb[0]);
- out_be64(&priv2->slb_esid_RW, slb[1]);
- eieio();
-}
-
static inline void setup_mfc_slbs(struct spu_state *csa, struct spu *spu)
{
- u64 code_slb[2];
- u64 lscsa_slb[2];
-
/* Save, Step 47:
* Restore, Step 30.
* If MFC_SR1[R]=1, write 0 to SLB_Invalidate_All
@@ -735,11 +708,7 @@ static inline void setup_mfc_slbs(struct
* translation is desired by OS environment).
*/
spu_invalidate_slbs(spu);
- get_kernel_slb((unsigned long)&spu_save_code[0], code_slb);
- get_kernel_slb((unsigned long)csa->lscsa, lscsa_slb);
- load_mfc_slb(spu, code_slb, 0);
- if ((lscsa_slb[0] != code_slb[0]) || (lscsa_slb[1] != code_slb[1]))
- load_mfc_slb(spu, lscsa_slb, 1);
+ spu_setup_kernel_slbs(spu, csa->lscsa, &spu_save_code);
}
static inline void set_switch_active(struct spu_state *csa, struct spu *spu)
Index: linux-2.6-new/include/asm-powerpc/spu.h
===================================================================
--- linux-2.6-new.orig/include/asm-powerpc/spu.h
+++ linux-2.6-new/include/asm-powerpc/spu.h
@@ -104,6 +104,7 @@
struct spu_context;
struct spu_runqueue;
+struct spu_lscsa;
struct device_node;
enum spu_utilization_state {
@@ -200,6 +201,9 @@ int spu_irq_class_0_bottom(struct spu *s
int spu_irq_class_1_bottom(struct spu *spu);
void spu_irq_setaffinity(struct spu *spu, int cpu);
+void spu_setup_kernel_slbs(struct spu *spu,
+ struct spu_lscsa *lscsa, void *code);
+
#ifdef CONFIG_KEXEC
void crash_register_spus(struct list_head *list);
#else
--
^ permalink raw reply
* [POWERPC 15/18] cell: use spu_load_slb for SLB setup
From: arnd @ 2007-12-18 17:49 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev, Jeremy Kerr
In-Reply-To: <20071218174852.112644000@arndb.de>
Now that we have a helper function to setup a SPU SLB, use it for
__spu_trap_data_seq.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/powerpc/platforms/cell/spu_base.c | 23 ++++++++++-------------
1 files changed, 10 insertions(+), 13 deletions(-)
Index: linux-2.6-new/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linux-2.6-new.orig/arch/powerpc/platforms/cell/spu_base.c
+++ linux-2.6-new/arch/powerpc/platforms/cell/spu_base.c
@@ -169,9 +169,8 @@ static inline void spu_load_slb(struct s
static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
{
- struct spu_priv2 __iomem *priv2 = spu->priv2;
struct mm_struct *mm = spu->mm;
- u64 esid, vsid, llp;
+ struct spu_slb slb;
int psize;
pr_debug("%s\n", __FUNCTION__);
@@ -183,7 +182,7 @@ static int __spu_trap_data_seg(struct sp
printk("%s: invalid access during switch!\n", __func__);
return 1;
}
- esid = (ea & ESID_MASK) | SLB_ESID_V;
+ slb.esid = (ea & ESID_MASK) | SLB_ESID_V;
switch(REGION_ID(ea)) {
case USER_REGION_ID:
@@ -192,21 +191,21 @@ static int __spu_trap_data_seg(struct sp
#else
psize = mm->context.user_psize;
#endif
- vsid = (get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
- SLB_VSID_USER;
+ slb.vsid = (get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M)
+ << SLB_VSID_SHIFT) | SLB_VSID_USER;
break;
case VMALLOC_REGION_ID:
if (ea < VMALLOC_END)
psize = mmu_vmalloc_psize;
else
psize = mmu_io_psize;
- vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
- SLB_VSID_KERNEL;
+ slb.vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M)
+ << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
break;
case KERNEL_REGION_ID:
psize = mmu_linear_psize;
- vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
- SLB_VSID_KERNEL;
+ slb.vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M)
+ << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
break;
default:
/* Future: support kernel segments so that drivers
@@ -215,11 +214,9 @@ static int __spu_trap_data_seg(struct sp
pr_debug("invalid region access at %016lx\n", ea);
return 1;
}
- llp = mmu_psize_defs[psize].sllp;
+ slb.vsid |= mmu_psize_defs[psize].sllp;
- out_be64(&priv2->slb_index_W, spu->slb_replace);
- out_be64(&priv2->slb_vsid_RW, vsid | llp);
- out_be64(&priv2->slb_esid_RW, esid);
+ spu_load_slb(spu, spu->slb_replace, &slb);
spu->slb_replace++;
if (spu->slb_replace >= 8)
--
^ permalink raw reply
* [POWERPC 16/18] cell: add spu_64k_pages_available() check
From: arnd @ 2007-12-18 17:49 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev, Jeremy Kerr
In-Reply-To: <20071218174852.112644000@arndb.de>
Add a function spu_64k_pages_available(), so that we can abstract the
explicity use of mmu_psize_defs() in lssca_alloc.c
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/powerpc/platforms/cell/spu_base.c | 6 ++++++
arch/powerpc/platforms/cell/spufs/lscsa_alloc.c | 2 +-
include/asm-powerpc/spu.h | 1 +
3 files changed, 8 insertions(+), 1 deletions(-)
Index: linux-2.6-new/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linux-2.6-new.orig/arch/powerpc/platforms/cell/spu_base.c
+++ linux-2.6-new/arch/powerpc/platforms/cell/spu_base.c
@@ -126,6 +126,12 @@ void spu_associate_mm(struct spu *spu, s
}
EXPORT_SYMBOL_GPL(spu_associate_mm);
+int spu_64k_pages_available(void)
+{
+ return mmu_psize_defs[MMU_PAGE_64K].shift != 0;
+}
+EXPORT_SYMBOL_GPL(spu_64k_pages_available);
+
static int __spu_trap_invalid_dma(struct spu *spu)
{
pr_debug("%s\n", __FUNCTION__);
Index: linux-2.6-new/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
===================================================================
--- linux-2.6-new.orig/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
+++ linux-2.6-new/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
@@ -73,7 +73,7 @@ int spu_alloc_lscsa(struct spu_state *cs
int i, j, n_4k;
/* Check availability of 64K pages */
- if (mmu_psize_defs[MMU_PAGE_64K].shift == 0)
+ if (!spu_64k_pages_available())
goto fail;
csa->use_big_pages = 1;
Index: linux-2.6-new/include/asm-powerpc/spu.h
===================================================================
--- linux-2.6-new.orig/include/asm-powerpc/spu.h
+++ linux-2.6-new/include/asm-powerpc/spu.h
@@ -214,6 +214,7 @@ static inline void crash_register_spus(s
extern void spu_invalidate_slbs(struct spu *spu);
extern void spu_associate_mm(struct spu *spu, struct mm_struct *mm);
+int spu_64k_pages_available(void);
/* Calls from the memory management to the SPU */
struct mm_struct;
--
^ permalink raw reply
* [POWERPC 17/18] cell: handle SPE kernel mappings that cross segment boundaries
From: arnd @ 2007-12-18 17:49 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev, Jeremy Kerr
In-Reply-To: <20071218174852.112644000@arndb.de>
Currently, we have a possibilty that the SLBs setup during context
switch don't cover the entirety of the necessary lscsa and code
regions, if these regions cross a segment boundary.
This change checks the start and end of each region, and inserts a SLB
entry for each, if unique. We also remove the assumption that the
spu_save_code and spu_restore_code reside in the same segment, by using
the specific code array for save and restore.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/powerpc/platforms/cell/spu_base.c | 50 ++++++++++++++++++++++++----
arch/powerpc/platforms/cell/spufs/switch.c | 11 ++++--
include/asm-powerpc/spu.h | 4 +-
3 files changed, 52 insertions(+), 13 deletions(-)
Index: linux-2.6-new/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linux-2.6-new.orig/arch/powerpc/platforms/cell/spu_base.c
+++ linux-2.6-new/arch/powerpc/platforms/cell/spu_base.c
@@ -275,19 +275,55 @@ static void __spu_kernel_slb(void *addr,
}
/**
+ * Given an array of @nr_slbs SLB entries, @slbs, return non-zero if the
+ * address @new_addr is present.
+ */
+static inline int __slb_present(struct spu_slb *slbs, int nr_slbs,
+ void *new_addr)
+{
+ unsigned long ea = (unsigned long)new_addr;
+ int i;
+
+ for (i = 0; i < nr_slbs; i++)
+ if (!((slbs[i].esid ^ ea) & ESID_MASK))
+ return 1;
+
+ return 0;
+}
+
+/**
* Setup the SPU kernel SLBs, in preparation for a context save/restore. We
* need to map both the context save area, and the save/restore code.
+ *
+ * Because the lscsa and code may cross segment boundaires, we check to see
+ * if mappings are required for the start and end of each range. We currently
+ * assume that the mappings are smaller that one segment - if not, something
+ * is seriously wrong.
*/
-void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa, void *code)
+void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
+ void *code, int code_size)
{
- struct spu_slb code_slb, lscsa_slb;
+ struct spu_slb slbs[4];
+ int i, nr_slbs = 0;
+ /* start and end addresses of both mappings */
+ void *addrs[] = {
+ lscsa, (void *)lscsa + sizeof(*lscsa) - 1,
+ code, code + code_size - 1
+ };
- __spu_kernel_slb(lscsa, &lscsa_slb);
- __spu_kernel_slb(code, &code_slb);
+ /* check the set of addresses, and create a new entry in the slbs array
+ * if there isn't already a SLB for that address */
+ for (i = 0; i < ARRAY_SIZE(addrs); i++) {
+ if (__slb_present(slbs, nr_slbs, addrs[i]))
+ continue;
+
+ __spu_kernel_slb(addrs[i], &slbs[nr_slbs]);
+ nr_slbs++;
+ }
- spu_load_slb(spu, 0, &lscsa_slb);
- if (lscsa_slb.esid != code_slb.esid)
- spu_load_slb(spu, 1, &code_slb);
+ /* Add the set of SLBs */
+ for (i = 0; i < nr_slbs; i++)
+ spu_load_slb(spu, i, &slbs[i]);
}
EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
Index: linux-2.6-new/arch/powerpc/platforms/cell/spufs/switch.c
===================================================================
--- linux-2.6-new.orig/arch/powerpc/platforms/cell/spufs/switch.c
+++ linux-2.6-new/arch/powerpc/platforms/cell/spufs/switch.c
@@ -691,7 +691,8 @@ static inline void resume_mfc_queue(stru
out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESUME_DMA_QUEUE);
}
-static inline void setup_mfc_slbs(struct spu_state *csa, struct spu *spu)
+static inline void setup_mfc_slbs(struct spu_state *csa, struct spu *spu,
+ unsigned int *code, int code_size)
{
/* Save, Step 47:
* Restore, Step 30.
@@ -708,7 +709,7 @@ static inline void setup_mfc_slbs(struct
* translation is desired by OS environment).
*/
spu_invalidate_slbs(spu);
- spu_setup_kernel_slbs(spu, csa->lscsa, &spu_save_code);
+ spu_setup_kernel_slbs(spu, csa->lscsa, code, code_size);
}
static inline void set_switch_active(struct spu_state *csa, struct spu *spu)
@@ -1835,7 +1836,8 @@ static void save_lscsa(struct spu_state
*/
resume_mfc_queue(prev, spu); /* Step 46. */
- setup_mfc_slbs(prev, spu); /* Step 47. */
+ /* Step 47. */
+ setup_mfc_slbs(prev, spu, spu_save_code, sizeof(spu_save_code));
set_switch_active(prev, spu); /* Step 48. */
enable_interrupts(prev, spu); /* Step 49. */
save_ls_16kb(prev, spu); /* Step 50. */
@@ -1940,7 +1942,8 @@ static void restore_lscsa(struct spu_sta
setup_spu_status_part1(next, spu); /* Step 27. */
setup_spu_status_part2(next, spu); /* Step 28. */
restore_mfc_rag(next, spu); /* Step 29. */
- setup_mfc_slbs(next, spu); /* Step 30. */
+ /* Step 30. */
+ setup_mfc_slbs(next, spu, spu_restore_code, sizeof(spu_restore_code));
set_spu_npc(next, spu); /* Step 31. */
set_signot1(next, spu); /* Step 32. */
set_signot2(next, spu); /* Step 33. */
Index: linux-2.6-new/include/asm-powerpc/spu.h
===================================================================
--- linux-2.6-new.orig/include/asm-powerpc/spu.h
+++ linux-2.6-new/include/asm-powerpc/spu.h
@@ -201,8 +201,8 @@ int spu_irq_class_0_bottom(struct spu *s
int spu_irq_class_1_bottom(struct spu *spu);
void spu_irq_setaffinity(struct spu *spu, int cpu);
-void spu_setup_kernel_slbs(struct spu *spu,
- struct spu_lscsa *lscsa, void *code);
+void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
+ void *code, int code_size);
#ifdef CONFIG_KEXEC
void crash_register_spus(struct list_head *list);
--
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