* Re: [PATCH 4/4] [POWERPC] fsl_spi_init and users: stop using device_type = "spi"
From: Grant Likely @ 2007-12-19 21:38 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev, Timur Tabi
In-Reply-To: <20071219211250.GA21416@localhost.localdomain>
On 12/19/07, Anton Vorontsov <avorontsov@ru.mvista.com> wrote:
> On Wed, Dec 19, 2007 at 03:04:51PM -0600, Timur Tabi wrote:
> > Anton Vorontsov wrote:
> >
> > >diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
> > >index 3cf84d0..91bac51 100644
> > >--- a/arch/powerpc/sysdev/fsl_soc.c
> > >+++ b/arch/powerpc/sysdev/fsl_soc.c
> > >@@ -1242,7 +1242,7 @@ int __init fsl_spi_init(struct spi_board_info
> > >*board_infos,
> > > }
> > >
> > > for (np = NULL, i = 1;
> > >- (np = of_find_compatible_node(np, "spi", "fsl_spi")) != NULL;
> > >+ (np = of_find_compatible_node(np, NULL, "fsl,spi")) != NULL;
> >
> > Can you keep the original code around to look for older device trees that
> > are wrong? Backwards compatibility is important. I don't want to have to
> > update the device tree just because I update the kernel.
>
> I though about it. Is your device tree source out of tree? Otherwise
> it should be trivial to upgrade the dtb, instead of producing cruft in
> the kernel. I vote for less legacy code, but lets see what others will
> say. So far count is 1:1. ;-)
I agree with Timur. Please keep the test for the older names. Some
platforms have the dtb in the same sector as u-boot, making it more
dangerous to reflash.
g.
> --
> Anton Vorontsov
> email: cbou@mail.ru
> backup email: ya-cbou@yandex.ru
> irc://irc.freenode.net/bd2
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: Linux on Freescale e200
From: Per-Erik Johansson @ 2007-12-19 22:15 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <67A10FA1-8F9D-4A87-BB67-C04EC9FA5BEF@kernel.crashing.org>
>> Hi
>>
>> I'm wondering if someone has ever tried to get Linux running on a
>> Freescale e200 core?
>> I found a patch to the Linux kernel from back in 2005:
>> (http://linux.derkeiler.com/Mailing-Lists/Kernel/2005-06/5731.html)
>> And it is listed as a processor type in Linux-2.6.23.11
>> I know that there has been some confusion about e200 and e500 cores,
>> old
>> e200 renamed to e500, but from what I understand the e200 core now
>> listed
>> in the kernel is the one currently being used in MPC55xx
>>
>> I'm having a MPC5554, e200z6 core, that I'm supposed to get Linux
>> running
>> on (master thesis) and any pointers and tips are appreciated.
>> Just finished porting/tweaking the Redboot boot loader, and I'm now
>> moving
>> on to the Linux (porting?) part.
>
> I'd suggest looking at getting u-boot running instead since that's we
> use on the majority of freescale PPCs.
>
> We did a port a while back to the e200.. so most of the basic bits
> should be there. There might be some bit rot from its like of usage.
>
> What peripheral set are you looking to get working on the 5554?
>
> - k
>
Had a look into UBoot at first but didn't find any port for the
MPC55xx/e200, so when we stumbled upon a "working" ecos/redboot port we
went with that..
Do you know where I could find the uboot port for the e200?
We have phycore dev. kit
(http://www.phytec.com/products/rdk/PowerPC/phyCORE-MPC5554.html)
Just supposed to get it up and running, so peripherals will just be
serial, ethernet and maybe CAN.
/ Per-Erik
^ permalink raw reply
* [PATCH v2] powerpc: add hugepagesz boot-time parameter
From: Jon Tollefson @ 2007-12-19 22:35 UTC (permalink / raw)
To: Paul Mackerras; +Cc: arnd, mel, David Gibson, linuxppc-dev, csnook
Paul, please include this in 2.6.25 if there are no objections.
This patch adds the hugepagesz boot-time parameter for ppc64. It lets
one pick the size for huge pages. The choices available are 64K and 16M
when the base page size is 4k. It defaults to 16M (previously the only
only choice) if nothing or an invalid choice is specified.
Tested 64K huge pages successfully with the libhugetlbfs 1.2.
Changes from v1:
disallow 64K huge pages when base page size is 64K since we can't
distinguish between
base and huge pages when doing a hash_page()
collapsed pmd_offset and pmd_alloc to inline calls to simplify the
main code
removed printing of the huge page size in mm/hugetlb.c since this
information is already
available in /proc/meminfo and leaves the remaining changes all
powerpc specific
Signed-off-by: Jon Tollefson <kniht@linux.vnet.ibm.com>
---
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt
index 33121d6..2fc1fb8 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -685,6 +685,7 @@ and is between 256 and 4096 characters. It is defined in the file
See Documentation/isdn/README.HiSax.
hugepages= [HW,X86-32,IA-64] Maximal number of HugeTLB pages.
+ hugepagesz= [HW,IA-64,PPC] The size of the HugeTLB pages.
i8042.direct [HW] Put keyboard port into non-translated mode
i8042.dumbkbd [HW] Pretend that controller can only read data from
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index cbbd8b0..9326a69 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -369,18 +369,11 @@ static void __init htab_init_page_sizes(void)
* on what is available
*/
if (mmu_psize_defs[MMU_PAGE_16M].shift)
- mmu_huge_psize = MMU_PAGE_16M;
+ set_huge_psize(MMU_PAGE_16M);
/* With 4k/4level pagetables, we can't (for now) cope with a
* huge page size < PMD_SIZE */
else if (mmu_psize_defs[MMU_PAGE_1M].shift)
- mmu_huge_psize = MMU_PAGE_1M;
-
- /* Calculate HPAGE_SHIFT and sanity check it */
- if (mmu_psize_defs[mmu_huge_psize].shift > MIN_HUGEPTE_SHIFT &&
- mmu_psize_defs[mmu_huge_psize].shift < SID_SHIFT)
- HPAGE_SHIFT = mmu_psize_defs[mmu_huge_psize].shift;
- else
- HPAGE_SHIFT = 0; /* No huge pages dude ! */
+ set_huge_psize(MMU_PAGE_1M);
#endif /* CONFIG_HUGETLB_PAGE */
}
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 71efb38..3099e48 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -24,18 +24,17 @@
#include <asm/cputable.h>
#include <asm/spu.h>
+#define HPAGE_SHIFT_64K 16
+#define HPAGE_SHIFT_16M 24
+
#define NUM_LOW_AREAS (0x100000000UL >> SID_SHIFT)
#define NUM_HIGH_AREAS (PGTABLE_RANGE >> HTLB_AREA_SHIFT)
-#ifdef CONFIG_PPC_64K_PAGES
-#define HUGEPTE_INDEX_SIZE (PMD_SHIFT-HPAGE_SHIFT)
-#else
-#define HUGEPTE_INDEX_SIZE (PUD_SHIFT-HPAGE_SHIFT)
-#endif
-#define PTRS_PER_HUGEPTE (1 << HUGEPTE_INDEX_SIZE)
-#define HUGEPTE_TABLE_SIZE (sizeof(pte_t) << HUGEPTE_INDEX_SIZE)
+unsigned int hugepte_shift;
+#define PTRS_PER_HUGEPTE (1 << hugepte_shift)
+#define HUGEPTE_TABLE_SIZE (sizeof(pte_t) << hugepte_shift)
-#define HUGEPD_SHIFT (HPAGE_SHIFT + HUGEPTE_INDEX_SIZE)
+#define HUGEPD_SHIFT (HPAGE_SHIFT + hugepte_shift)
#define HUGEPD_SIZE (1UL << HUGEPD_SHIFT)
#define HUGEPD_MASK (~(HUGEPD_SIZE-1))
@@ -82,11 +81,31 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
return 0;
}
+#ifndef CONFIG_PPC_64K_PAGES
+static inline
+pmd_t *hpmd_offset(pud_t *pud, unsigned long addr)
+{
+ if (HPAGE_SHIFT == HPAGE_SHIFT_64K)
+ return pmd_offset(pud, addr);
+ else
+ return (pmd_t *) pud;
+}
+static inline
+pmd_t *hpmd_alloc(struct mm_struct *mm, pud_t *pud, unsigned long addr)
+{
+ if (HPAGE_SHIFT == HPAGE_SHIFT_64K)
+ return pmd_alloc(mm, pud, addr);
+ else
+ return (pmd_t *) pud;
+}
+#endif
+
/* Modelled after find_linux_pte() */
pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
{
pgd_t *pg;
pud_t *pu;
+ pmd_t *pm;
BUG_ON(get_slice_psize(mm, addr) != mmu_huge_psize);
@@ -96,14 +115,9 @@ pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
if (!pgd_none(*pg)) {
pu = pud_offset(pg, addr);
if (!pud_none(*pu)) {
-#ifdef CONFIG_PPC_64K_PAGES
- pmd_t *pm;
- pm = pmd_offset(pu, addr);
+ pm = hpmd_offset(pu, addr);
if (!pmd_none(*pm))
return hugepte_offset((hugepd_t *)pm, addr);
-#else
- return hugepte_offset((hugepd_t *)pu, addr);
-#endif
}
}
@@ -114,6 +128,7 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr)
{
pgd_t *pg;
pud_t *pu;
+ pmd_t *pm;
hugepd_t *hpdp = NULL;
BUG_ON(get_slice_psize(mm, addr) != mmu_huge_psize);
@@ -124,14 +139,9 @@ pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr)
pu = pud_alloc(mm, pg, addr);
if (pu) {
-#ifdef CONFIG_PPC_64K_PAGES
- pmd_t *pm;
- pm = pmd_alloc(mm, pu, addr);
+ pm = hpmd_alloc(mm, pu, addr);
if (pm)
hpdp = (hugepd_t *)pm;
-#else
- hpdp = (hugepd_t *)pu;
-#endif
}
if (! hpdp)
@@ -158,7 +168,6 @@ static void free_hugepte_range(struct mmu_gather *tlb, hugepd_t *hpdp)
PGF_CACHENUM_MASK));
}
-#ifdef CONFIG_PPC_64K_PAGES
static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
unsigned long addr, unsigned long end,
unsigned long floor, unsigned long ceiling)
@@ -191,7 +200,6 @@ static void hugetlb_free_pmd_range(struct mmu_gather *tlb, pud_t *pud,
pud_clear(pud);
pmd_free_tlb(tlb, pmd);
}
-#endif
static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
unsigned long addr, unsigned long end,
@@ -210,9 +218,15 @@ static void hugetlb_free_pud_range(struct mmu_gather *tlb, pgd_t *pgd,
continue;
hugetlb_free_pmd_range(tlb, pud, addr, next, floor, ceiling);
#else
- if (pud_none(*pud))
- continue;
- free_hugepte_range(tlb, (hugepd_t *)pud);
+ if (HPAGE_SHIFT == HPAGE_SHIFT_64K) {
+ if (pud_none_or_clear_bad(pud))
+ continue;
+ hugetlb_free_pmd_range(tlb, pud, addr, next, floor, ceiling);
+ } else {
+ if (pud_none(*pud))
+ continue;
+ free_hugepte_range(tlb, (hugepd_t *)pud);
+ }
#endif
} while (pud++, addr = next, addr != end);
@@ -526,6 +540,57 @@ repeat:
return err;
}
+void set_huge_psize(int psize)
+{
+ /* Check that it is a page size supported by the hardware and
+ * that it fits within pagetable limits. */
+ if (mmu_psize_defs[psize].shift && mmu_psize_defs[psize].shift < SID_SHIFT &&
+ (mmu_psize_defs[psize].shift > MIN_HUGEPTE_SHIFT ||
+ mmu_psize_defs[psize].shift == HPAGE_SHIFT_64K)) {
+ HPAGE_SHIFT = mmu_psize_defs[psize].shift;
+ mmu_huge_psize = psize;
+#ifdef CONFIG_PPC_64K_PAGES
+ hugepte_shift = (PMD_SHIFT-HPAGE_SHIFT);
+#else
+ if (HPAGE_SHIFT == HPAGE_SHIFT_64K)
+ hugepte_shift = (PMD_SHIFT-HPAGE_SHIFT);
+ else
+ hugepte_shift = (PUD_SHIFT-HPAGE_SHIFT);
+#endif
+
+ } else
+ HPAGE_SHIFT = 0;
+}
+
+static int __init hugepage_setup_sz(char *str)
+{
+ unsigned long long size;
+ int mmu_psize = -1;
+ int shift;
+
+ size = memparse(str, &str);
+
+ shift = __ffs(size);
+ switch (shift) {
+#ifndef CONFIG_PPC_64K_PAGES
+ case HPAGE_SHIFT_64K:
+ mmu_psize = MMU_PAGE_64K;
+ break;
+#endif
+ case HPAGE_SHIFT_16M:
+ mmu_psize = MMU_PAGE_16M;
+ break;
+ }
+
+ if (mmu_psize >=0 && mmu_psize_defs[mmu_psize].shift)
+ set_huge_psize(mmu_psize);
+ else
+ printk(KERN_WARNING "Invalid huge page size specified(%llu)\n", size);
+
+ return 1;
+}
+__setup("hugepagesz=", hugepage_setup_sz);
+
static void zero_ctor(struct kmem_cache *cache, void *addr)
{
memset(addr, 0, kmem_cache_size(cache));
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h
index 12e5e77..2fda33c 100644
--- a/include/asm-powerpc/mmu-hash64.h
+++ b/include/asm-powerpc/mmu-hash64.h
@@ -278,6 +278,7 @@ extern int hash_huge_page(struct mm_struct *mm, unsigned long access,
extern int htab_bolt_mapping(unsigned long vstart, unsigned long vend,
unsigned long pstart, unsigned long mode,
int psize, int ssize);
+extern void set_huge_psize(int psize);
extern void htab_initialize(void);
extern void htab_initialize_secondary(void);
diff --git a/include/asm-powerpc/pgtable.h b/include/asm-powerpc/pgtable.h
index d18ffe7..66ff7e5 100644
--- a/include/asm-powerpc/pgtable.h
+++ b/include/asm-powerpc/pgtable.h
@@ -37,6 +37,12 @@ extern void paging_init(void);
#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
remap_pfn_range(vma, vaddr, pfn, size, prot)
+/* Base page size affects how we walk hugetlb page tables */
+#ifdef CONFIG_PPC_64K_PAGES
+#define hpmd_offset(pud, addr) pmd_offset(pud, addr)
+#define hpmd_alloc(mm, pud, addr) pmd_alloc(mm, pud, addr)
+#endif
+
#include <asm-generic/pgtable.h>
#endif /* __ASSEMBLY__ */
^ permalink raw reply related
* Oops: Kernel access of bad area
From: Christian Kujau @ 2007-12-19 22:14 UTC (permalink / raw)
To: linuxppc-dev
Hi,
I started some x11 application (here: firefox) through an ssh connection
on a remote host and it crashed somehow. OK, no biggie, killed the
application and be done with it. However, I noticed that the load of the
machine is now constantly at 7. It's an iBook G4, has nothing to do,
disks, cpu, netwokr is idle and load is usually < 1. Now it's not
slow to work or anyhow sluggish, but only the load is at 7 after the
application crashed. When I looked into dmesg I saw:
[84983.750977] Unable to handle kernel paging request for data at address 0x4815d000
[84983.751046] Faulting instruction address: 0xc0012090
[84983.751157] Oops: Kernel access of bad area, sig: 11 [#1]
[84983.751178] PREEMPT PowerMac
[84983.751214] Modules linked in: nls_iso8859_15 nls_cp850 vfat fat isofs nls_base zlib_inflate radeon drm snd_powermac snd_pcm snd_timer snd soundcore snd_page_alloc fuse firewire_ohci firewire_core crc_itu_t ide_cd cdrom ssb bcm43xx rng_core ieee80211softmac uninorth_agp ieee80211 ieee80211_crypt agpgart
[84983.751750] NIP: c0012090 LR: c00165fc CTR: 00000080
[84983.751786] REGS: cea65b30 TRAP: 0300 Not tainted (2.6.24-rc5)
[84983.751805] MSR: 00009032 <EE,ME,IR,DR> CR: 24822282 XER: 00000000
[84983.751946] DAR: 4815d000, DSISR: 40000000
[84983.751965] TASK = ee372670[9138] 'firefox-bin' THREAD: cea64000
[84983.751984] GPR00: e62b3a00 cea65be0 ee372670 4815d000 00000080 1bc0c181 4815d000 ffffffff
[84983.752148] GPR08: 00010008 e62b3a00 00000000 c045f000 24822288 1002ea3c cea67690 ce954000
[84983.752315] GPR16: c0420000 c03f6400 cea65cac cea65ca8 c0440000 ce974480 c07d7180 ceba2280
[84983.752468] GPR24: e62b3a00 e62b3a50 4815d000 00000574 ceba2280 4815d000 1bc0c181 c07d7180
[84983.752665] NIP [c0012090] __flush_dcache_icache+0x14/0x40
[84983.752716] LR [c00165fc] update_mmu_cache+0x11c/0x120
[...]
This is the first time that this happened on this iBook, and it was not
reproducible so far (well, it happened just a few minutes ago). Is this
something to worry about? Or should I file this under "well, shit
happens"? Btw, this 2.6.24-rc5 is from Linus' -git tree (15.12.2007).
Details and .config: http://nerdbynature.de/bits/2.6.24-rc5/
Thanks,
Christian.
--
BOFH excuse #281:
The co-locator cannot verify the frame-relay gateway to the ISDN server.
^ permalink raw reply
* Re: [0/3] Add RapidIO support to powerpc architecture with memory mapping
From: Randy Vinson @ 2007-12-19 22:52 UTC (permalink / raw)
To: Zhang Wei; +Cc: linuxppc-dev
In-Reply-To: <11975326982876-git-send-email-wei.zhang@freescale.com>
Zhang Wei wrote:
> Hi,
>
> Those patches add RapidIO support to powerpc archiecture with
> memory mapping as below:
>
> [1/3] Copy the arch/ppc RapidIO support to arch/powerpc
> [2/3] Make the arch/powerpc RapidIO support workable with of-device
> and add memory mapping support.
Patch 2/3 seems to have gone missing. Was it sent?
Randy V.
> [3/3] Add the memory mapping support to rionet driver.
>
> Best Regards,
> Zhang Wei
>
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
^ permalink raw reply
* Re: [PATCH 3/4] [POWERPC][SPI] use brg-frequency for SPI in QE
From: Stephen Rothwell @ 2007-12-19 23:27 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev, spi-devel-general
In-Reply-To: <20071219203805.GC20861@localhost.localdomain>
[-- Attachment #1: Type: text/plain, Size: 1093 bytes --]
On Wed, 19 Dec 2007 23:38:05 +0300 Anton Vorontsov <avorontsov@ru.mvista.com> wrote:
>
> +++ b/arch/powerpc/sysdev/fsl_soc.c
> @@ -1227,15 +1227,19 @@ int __init fsl_spi_init(struct spi_board_info *board_infos,
>
> /* SPI controller is either clocked from QE or SoC clock */
> np = of_find_compatible_node(NULL, NULL, "fsl,qe");
> - if (!np)
> + if (np) {
> + sysclk = of_get_property(np, "brg-frequency", NULL);
> + if (!sysclk)
> + return -ENODEV;
You need an of_node_put(np) in the failing case.
> + } else {
> np = of_find_node_by_type(NULL, "soc");
> + if (!np)
> + return -ENODEV;
>
> - if (!np)
> - return -ENODEV;
> -
> - sysclk = of_get_property(np, "bus-frequency", NULL);
> - if (!sysclk)
> - return -ENODEV;
> + sysclk = of_get_property(np, "bus-frequency", NULL);
> + if (!sysclk)
> + return -ENODEV;
And again.
> + }
>
> for (np = NULL, i = 1;
There should be an of_node_put(np) before this as well.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* Re: [PATCH 4/4] [POWERPC] fsl_spi_init and users: stop using device_type = "spi"
From: Olof Johansson @ 2007-12-19 23:50 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev, Timur Tabi
In-Reply-To: <20071219211250.GA21416@localhost.localdomain>
On Thu, Dec 20, 2007 at 12:12:50AM +0300, Anton Vorontsov wrote:
> I though about it. Is your device tree source out of tree? Otherwise
> it should be trivial to upgrade the dtb, instead of producing cruft in
> the kernel. I vote for less legacy code, but lets see what others will
> say. So far count is 1:1. ;-)
It's not just that. kexec:ing a new kernel from an older that has the
old device tree breaks if you don't consider older device trees. Or you
might have an old firmware with a flashed device tree that you need to
keep compatibility with.
You should either fix up the "broken" (not latest and greatest) device
trees in the wrapper before using them, or make sure that your code is
still compatible with the old trees.
The fact that the device tree source code is distributed with the kernel
isn't an excuse to break backwards compatibility with older versions.
-Olof
^ permalink raw reply
* [PATCH] ASoC drivers for the Freescale MPC8610 SoC
From: Timur Tabi @ 2007-12-20 0:03 UTC (permalink / raw)
To: linuxppc-dev, alsa-devel; +Cc: Timur Tabi
This patch adds ALSA SoC device drivers for the Freescale MPC8610 SoC
and the MPC8610-HPCD reference board.
Signed-off-by: Timur Tabi <timur@freescale.com>
---
This patch applies on top of
git://git.kernel.org/pub/scm/linux/kernel/git/perex/alsa.git.
Documentation/powerpc/booting-without-of.txt | 40 ++
arch/powerpc/boot/dts/mpc8610_hpcd.dts | 107 ++++
arch/powerpc/configs/mpc8610_hpcd_defconfig | 171 ++++++-
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 18 +
sound/soc/Kconfig | 1 +
sound/soc/Makefile | 2 +-
sound/soc/fsl/Kconfig | 21 +
sound/soc/fsl/Makefile | 6 +
sound/soc/fsl/fsl_dma.c | 819 ++++++++++++++++++++++++++
sound/soc/fsl/fsl_dma.h | 149 +++++
sound/soc/fsl/fsl_ssi.c | 614 +++++++++++++++++++
sound/soc/fsl/fsl_ssi.h | 224 +++++++
sound/soc/fsl/mpc8610_hpcd.c | 621 +++++++++++++++++++
13 files changed, 2789 insertions(+), 4 deletions(-)
create mode 100644 sound/soc/fsl/Kconfig
create mode 100644 sound/soc/fsl/Makefile
create mode 100644 sound/soc/fsl/fsl_dma.c
create mode 100644 sound/soc/fsl/fsl_dma.h
create mode 100644 sound/soc/fsl/fsl_ssi.c
create mode 100644 sound/soc/fsl/fsl_ssi.h
create mode 100644 sound/soc/fsl/mpc8610_hpcd.c
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index e9a3cb1..826af91 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -53,6 +53,7 @@ Table of Contents
j) CFI or JEDEC memory-mapped NOR flash
k) Global Utilities Block
l) Xilinx IP cores
+ p) Freescale Synchronous Serial Interface
VII - Specifying interrupt information for devices
1) interrupts property
@@ -2514,6 +2515,45 @@ platforms are moved over to use the flattened-device-tree model.
Requred properties:
- current-speed : Baud rate of uartlite
+ p) Freescale Synchronous Serial Interface
+
+ The SSI is a serial device that communicates with audio codecs. It can
+ be programmed in AC97, I2S, left-justified, or right-justified modes.
+
+ Required properties:
+ - compatible : compatible list, containing "fsl,ssi"
+ - cell-index : the SSI, <0> = SSI1, <1> = SSI2, and so on
+ - reg : offset and length of the register set for the device
+ - interrupts : <a b> where a is the interrupt number and b is a
+ field that represents an encoding of the sense and
+ level information for the interrupt. This should be
+ encoded based on the information in section 2)
+ depending on the type of interrupt controller you
+ have.
+ - interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+ - fsl,mode : the operating mode for the SSI interface
+ "i2s-slave" - I2S mode, SSI is clock slave
+ "i2s-master" - I2S mode, SSI is clock master
+ "lj-slave" - left-justified mode, SSI is clock slave
+ "lj-master" - l.j. mode, SSI is clock master
+ "rj-slave" - right-justified mode, SSI is clock slave
+ "rj-master" - r.j., SSI is clock master
+ "ac97-slave" - AC97 mode, SSI is clock slave
+ "ac97-master" - AC97 mode, SSI is clock master
+
+ Optional properties:
+ - codec : child node that defines an audio codec connected
+ to this SSI
+
+ Child 'codec' node required properties:
+ - compatible : compatible list, contains the name of the codec
+
+ Child 'codec' node optional properties:
+ - bus-frequency : The frequency of the input clock, which typically
+ comes from an on-board dedicated oscillator.
+
+
More devices will be defined as this spec matures.
VII - Specifying interrupt information for devices
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 966edf1..4f12ede 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -103,6 +103,113 @@
reg = <e0000 1000>;
fsl,has-rstcr;
};
+
+ ssi@16000 {
+ compatible = "fsl,ssi";
+ cell-index = <0>;
+ reg = <16000 100>;
+ interrupt-parent = <&mpic>;
+ interrupts = <3e 2>;
+ fsl,mode = "i2s-slave";
+ codec {
+ compatible = "cirrus,cs4270";
+ /* MCLK source is a stand-alone oscillator */
+ bus-frequency = <bb8000>;
+ };
+ };
+
+ ssi@16100 {
+ compatible = "fsl,ssi";
+ cell-index = <1>;
+ reg = <16100 100>;
+ interrupt-parent = <&mpic>;
+ interrupts = <3f 2>;
+ };
+
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8610-dma", "fsl,mpc8540-dma";
+ cell-index = <0>;
+ reg = <21300 4>; /* DMA general status register */
+ ranges = <0 21100 200>;
+
+ dma-channel@0 {
+ compatible = "fsl,mpc8610-dma-channel",
+ "fsl,mpc8540-dma-channel";
+ cell-index = <0>;
+ reg = <0 80>;
+ interrupt-parent = <&mpic>;
+ interrupts = <14 2>;
+ };
+ dma-channel@1 {
+ compatible = "fsl,mpc8610-dma-channel",
+ "fsl,mpc8540-dma-channel";
+ cell-index = <1>;
+ reg = <80 80>;
+ interrupt-parent = <&mpic>;
+ interrupts = <15 2>;
+ };
+ dma-channel@2 {
+ compatible = "fsl,mpc8610-dma-channel",
+ "fsl,mpc8540-dma-channel";
+ cell-index = <2>;
+ reg = <100 80>;
+ interrupt-parent = <&mpic>;
+ interrupts = <16 2>;
+ };
+ dma-channel@3 {
+ compatible = "fsl,mpc8610-dma-channel",
+ "fsl,mpc8540-dma-channel";
+ cell-index = <3>;
+ reg = <180 80>;
+ interrupt-parent = <&mpic>;
+ interrupts = <17 2>;
+ };
+ };
+
+ dma@c300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8610-dma", "fsl,mpc8540-dma";
+ cell-index = <1>;
+ reg = <c300 4>; /* DMA general status register */
+ ranges = <0 c100 200>;
+
+ dma-channel@0 {
+ compatible = "fsl,mpc8610-dma-channel",
+ "fsl,mpc8540-dma-channel";
+ cell-index = <0>;
+ reg = <0 80>;
+ interrupt-parent = <&mpic>;
+ interrupts = <3c 2>;
+ };
+ dma-channel@1 {
+ compatible = "fsl,mpc8610-dma-channel",
+ "fsl,mpc8540-dma-channel";
+ cell-index = <1>;
+ reg = <80 80>;
+ interrupt-parent = <&mpic>;
+ interrupts = <3d 2>;
+ };
+ dma-channel@2 {
+ compatible = "fsl,mpc8610-dma-channel",
+ "fsl,mpc8540-dma-channel";
+ cell-index = <2>;
+ reg = <100 80>;
+ interrupt-parent = <&mpic>;
+ interrupts = <3e 2>;
+ };
+ dma-channel@3 {
+ compatible = "fsl,mpc8610-dma-channel",
+ "fsl,mpc8540-dma-channel";
+ cell-index = <3>;
+ reg = <180 80>;
+ interrupt-parent = <&mpic>;
+ interrupts = <3f 2>;
+ };
+ };
+
};
pci@e0008000 {
diff --git a/arch/powerpc/configs/mpc8610_hpcd_defconfig b/arch/powerpc/configs/mpc8610_hpcd_defconfig
index 0483211..fb68886 100644
--- a/arch/powerpc/configs/mpc8610_hpcd_defconfig
+++ b/arch/powerpc/configs/mpc8610_hpcd_defconfig
@@ -684,7 +684,7 @@ CONFIG_SERIAL_8250_RSA=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
-CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_SERIAL_OF_PLATFORM is not set
CONFIG_UNIX98_PTYS=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_IPMI_HANDLER is not set
@@ -699,7 +699,60 @@ CONFIG_UNIX98_PTYS=y
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
CONFIG_DEVPORT=y
-# CONFIG_I2C is not set
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+# CONFIG_I2C_CHARDEV is not set
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_M41T00 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
#
# SPI support
@@ -746,7 +799,119 @@ CONFIG_DUMMY_CONSOLE=y
#
# Sound
#
-# CONFIG_SOUND is not set
+CONFIG_SOUND=y
+
+#
+# Advanced Linux Sound Architecture
+#
+CONFIG_SND=y
+CONFIG_SND_TIMER=y
+CONFIG_SND_PCM=y
+# CONFIG_SND_SEQUENCER is not set
+CONFIG_SND_OSSEMUL=y
+CONFIG_SND_MIXER_OSS=y
+CONFIG_SND_PCM_OSS=y
+# CONFIG_SND_PCM_OSS_PLUGINS is not set
+# CONFIG_SND_DYNAMIC_MINORS is not set
+# CONFIG_SND_SUPPORT_OLD_API is not set
+CONFIG_SND_VERBOSE_PROCFS=y
+# CONFIG_SND_VERBOSE_PRINTK is not set
+# CONFIG_SND_DEBUG is not set
+
+#
+# Generic devices
+#
+# CONFIG_SND_DUMMY is not set
+# CONFIG_SND_MTPAV is not set
+# CONFIG_SND_SERIAL_U16550 is not set
+# CONFIG_SND_MPU401 is not set
+
+#
+# PCI devices
+#
+# CONFIG_SND_AD1889 is not set
+# CONFIG_SND_ALS300 is not set
+# CONFIG_SND_ALS4000 is not set
+# CONFIG_SND_ALI5451 is not set
+# CONFIG_SND_ATIIXP is not set
+# CONFIG_SND_ATIIXP_MODEM is not set
+# CONFIG_SND_AU8810 is not set
+# CONFIG_SND_AU8820 is not set
+# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AZT3328 is not set
+# CONFIG_SND_BT87X is not set
+# CONFIG_SND_CA0106 is not set
+# CONFIG_SND_CMIPCI is not set
+# CONFIG_SND_CS4281 is not set
+# CONFIG_SND_CS46XX is not set
+# CONFIG_SND_CS5530 is not set
+# CONFIG_SND_DARLA20 is not set
+# CONFIG_SND_GINA20 is not set
+# CONFIG_SND_LAYLA20 is not set
+# CONFIG_SND_DARLA24 is not set
+# CONFIG_SND_GINA24 is not set
+# CONFIG_SND_LAYLA24 is not set
+# CONFIG_SND_MONA is not set
+# CONFIG_SND_MIA is not set
+# CONFIG_SND_ECHO3G is not set
+# CONFIG_SND_INDIGO is not set
+# CONFIG_SND_INDIGOIO is not set
+# CONFIG_SND_INDIGODJ is not set
+# CONFIG_SND_EMU10K1 is not set
+# CONFIG_SND_EMU10K1X is not set
+# CONFIG_SND_ENS1370 is not set
+# CONFIG_SND_ENS1371 is not set
+# CONFIG_SND_ES1938 is not set
+# CONFIG_SND_ES1968 is not set
+# CONFIG_SND_FM801 is not set
+# CONFIG_SND_HDA_INTEL is not set
+# CONFIG_SND_HDSP is not set
+# CONFIG_SND_HDSPM is not set
+# CONFIG_SND_ICE1712 is not set
+# CONFIG_SND_ICE1724 is not set
+# CONFIG_SND_INTEL8X0 is not set
+# CONFIG_SND_INTEL8X0M is not set
+# CONFIG_SND_KORG1212 is not set
+# CONFIG_SND_MAESTRO3 is not set
+# CONFIG_SND_MIXART is not set
+# CONFIG_SND_NM256 is not set
+# CONFIG_SND_PCXHR is not set
+# CONFIG_SND_RIPTIDE is not set
+# CONFIG_SND_RME32 is not set
+# CONFIG_SND_RME96 is not set
+# CONFIG_SND_RME9652 is not set
+# CONFIG_SND_SONICVIBES is not set
+# CONFIG_SND_TRIDENT is not set
+# CONFIG_SND_VIA82XX is not set
+# CONFIG_SND_VIA82XX_MODEM is not set
+# CONFIG_SND_VX222 is not set
+# CONFIG_SND_YMFPCI is not set
+
+#
+# ALSA PowerMac devices
+#
+
+#
+# ALSA PowerPC devices
+#
+
+#
+# System on Chip audio support
+#
+CONFIG_SND_SOC=y
+
+#
+# SoC Audio support for SuperH
+#
+
+#
+# ALSA SoC audio for Freescale SOCs
+#
+CONFIG_SND_SOC_MPC8610=y
+CONFIG_SND_SOC_MPC8610_HPCD=y
+CONFIG_SND_SOC_CS4270=y
+CONFIG_SND_SOC_CS4270_VD33_ERRATA=y
+
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HID_DEBUG is not set
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 6390895..6e1bde3 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -34,9 +34,27 @@
#include <asm/mpic.h>
+#include <asm/of_platform.h>
#include <sysdev/fsl_pci.h>
#include <sysdev/fsl_soc.h>
+static struct of_device_id mpc8610_ids[] = {
+ { .type = "soc", },
+ {}
+};
+
+static int __init mpc8610_declare_of_platform_devices(void)
+{
+ if (!machine_is(mpc86xx_hpcd))
+ return 0;
+
+ /* Without this call, the SSI device driver won't get probed. */
+ of_platform_bus_probe(NULL, mpc8610_ids, NULL);
+
+ return 0;
+}
+device_initcall(mpc8610_declare_of_platform_devices);
+
void __init
mpc86xx_hpcd_init_irq(void)
{
diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
index 97b2552..43bbc60 100644
--- a/sound/soc/Kconfig
+++ b/sound/soc/Kconfig
@@ -28,6 +28,7 @@ source "sound/soc/at91/Kconfig"
source "sound/soc/pxa/Kconfig"
source "sound/soc/s3c24xx/Kconfig"
source "sound/soc/sh/Kconfig"
+source "sound/soc/fsl/Kconfig"
# Supported codecs
source "sound/soc/codecs/Kconfig"
diff --git a/sound/soc/Makefile b/sound/soc/Makefile
index 3041403..4869c9a 100644
--- a/sound/soc/Makefile
+++ b/sound/soc/Makefile
@@ -1,4 +1,4 @@
snd-soc-core-objs := soc-core.o soc-dapm.o
obj-$(CONFIG_SND_SOC) += snd-soc-core.o
-obj-$(CONFIG_SND_SOC) += codecs/ at91/ pxa/ s3c24xx/ sh/
+obj-$(CONFIG_SND_SOC) += codecs/ at91/ pxa/ s3c24xx/ sh/ fsl/
diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig
new file mode 100644
index 0000000..4a5bbd2
--- /dev/null
+++ b/sound/soc/fsl/Kconfig
@@ -0,0 +1,21 @@
+menu "ALSA SoC audio for Freescale SOCs"
+
+config SND_SOC_MPC8610
+ bool "ALSA SoC support for the MPC8610 SOC"
+ depends on SND_SOC #&& MPC8610_HPCD
+ default y #if MPC8610
+ help
+ Say Y if you want to add support for codecs attached to the SSI
+ device on an MPC8610.
+
+config SND_SOC_MPC8610_HPCD
+ # ALSA SoC support for Freescale MPC8610HPCD
+ bool "ALSA SoC support for the Freescale MPC8610 HPCD board"
+ depends on SND_SOC_MPC8610
+ select SND_SOC_CS4270
+ select SND_SOC_CS4270_VD33_ERRATA
+ default y #if MPC8610_HPCD
+ help
+ Say Y if you want to enable audio on the Freescale MPC8610 HPCD.
+
+endmenu
diff --git a/sound/soc/fsl/Makefile b/sound/soc/fsl/Makefile
new file mode 100644
index 0000000..62f680a
--- /dev/null
+++ b/sound/soc/fsl/Makefile
@@ -0,0 +1,6 @@
+# MPC8610 HPCD Machine Support
+obj-$(CONFIG_SND_SOC_MPC8610_HPCD) += mpc8610_hpcd.o
+
+# MPC8610 Platform Support
+obj-$(CONFIG_SND_SOC_MPC8610) += fsl_ssi.o fsl_dma.o
+
diff --git a/sound/soc/fsl/fsl_dma.c b/sound/soc/fsl/fsl_dma.c
new file mode 100644
index 0000000..6b86be0
--- /dev/null
+++ b/sound/soc/fsl/fsl_dma.c
@@ -0,0 +1,819 @@
+/*
+ * Freescale DMA ALSA SoC PCM driver
+ *
+ * Author: Timur Tabi <timur@freescale.com>
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * This driver implements ASoC support for the Elo DMA controller, which is
+ * the DMA controller on Freescale 83xx, 85xx, and 86xx SOCs. In ALSA terms,
+ * the PCM driver is what handles the DMA buffer.
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+
+#include <sound/driver.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/soc.h>
+
+#include <asm/io.h>
+
+#include "fsl_dma.h"
+
+/*
+ * The formats that the DMA controller supports, which is anything
+ * that is 8, 16, or 32 bits.
+ */
+#define FSLDMA_PCM_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
+ SNDRV_PCM_FMTBIT_U8 | \
+ SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S16_BE | \
+ SNDRV_PCM_FMTBIT_U16_LE | \
+ SNDRV_PCM_FMTBIT_U16_BE | \
+ SNDRV_PCM_FMTBIT_S24_LE | \
+ SNDRV_PCM_FMTBIT_S24_BE | \
+ SNDRV_PCM_FMTBIT_U24_LE | \
+ SNDRV_PCM_FMTBIT_U24_BE | \
+ SNDRV_PCM_FMTBIT_S32_LE | \
+ SNDRV_PCM_FMTBIT_S32_BE | \
+ SNDRV_PCM_FMTBIT_U32_LE | \
+ SNDRV_PCM_FMTBIT_U32_BE)
+
+#define FSLDMA_PCM_RATES (SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_192000 | \
+ SNDRV_PCM_RATE_CONTINUOUS)
+
+/* DMA global data. This structure is used by fsl_dma_open() to determine
+ * which DMA channels to assign to a substream. Unfortunately, ASoC V1 does
+ * not allow the machine driver to provide this information to the PCM
+ * driver in advance, and there's no way to differentiate between the two
+ * DMA controllers. So for now, this driver only supports one SSI device
+ * using two DMA channels. We cannot support multiple DMA devices.
+ *
+ * ssi_stx_phys: bus address of SSI STX register
+ * ssi_srx_phys: bus address of SSI SRX register
+ * dma_channel: pointer to the DMA channel's registers
+ * irq: IRQ for this DMA channel
+ * assigned: set to 1 if that DMA channel is assigned to a substream
+ */
+static struct {
+ dma_addr_t ssi_stx_phys;
+ dma_addr_t ssi_srx_phys;
+ struct ccsr_dma_channel __iomem *dma_channel[2];
+ unsigned int irq[2];
+ unsigned int assigned[2];
+} dma_global_data;
+
+/*
+ * The number of DMA links to use. Two is the bare minimum, but if you
+ * have really small links you might need more.
+ */
+#define NUM_DMA_LINKS 2
+
+/* Per-substream DMA data
+ *
+ * Each substream has a 1-to-1 association with a DMA channel.
+ *
+ * The link[] array is first because it needs to be aligned on a 32-byte
+ * boundary, so putting it first will ensure alignment without padding the
+ * structure.
+ *
+ * link[]: array of link descriptors
+ * controller_id: which DMA controller (0, 1, ...)
+ * channel_id: which DMA channel on the controller (0, 1, 2, ...)
+ * dma_channel: pointer to the DMA channel's registers
+ * irq: IRQ for this DMA channel
+ * substream: pointer to the substream object, needed by the ISR
+ * ssi_sxx_phys: bus address of the STX or SRX register to use
+ * ld_buf_phys: physical address of the LD buffer
+ * current_link: index into link[] of the link currently being processed
+ * dma_buf_phys: physical address of the DMA buffer
+ * dma_buf_next: physical address of the next period to process
+ * dma_buf_end: physical address of the byte after the end of the DMA buffer
+ * period_size: the size of a single period
+ */
+struct fsl_dma_private {
+ struct fsl_dma_link_descriptor link[NUM_DMA_LINKS];
+ unsigned int controller_id;
+ unsigned int channel_id;
+ struct ccsr_dma_channel __iomem *dma_channel;
+ unsigned int irq;
+ struct snd_pcm_substream *substream;
+ dma_addr_t ssi_sxx_phys;
+ dma_addr_t ld_buf_phys;
+ unsigned int current_link;
+ dma_addr_t dma_buf_phys;
+ dma_addr_t dma_buf_next;
+ dma_addr_t dma_buf_end;
+ size_t period_size;
+ unsigned int num_periods;
+};
+
+/*
+ * Define the hardware characteristics for the PCM hardware.
+ *
+ * The PCM hardware is the Freescale DMA controller. This structure defines
+ * the capabilities of that hardware.
+ *
+ * Since the sampling rate and data format are not controlled by the DMA
+ * controller, we specify no limits for those values. The only exception is
+ * period_bytes_min, which is set to a reasonably low value to prevent the
+ * DMA controller from generating too many interrupts per second.
+ *
+ * Since each link descriptor has a 32-bit byte count field, we set
+ * period_bytes_max to the largest 32-bit number. We also have no maximum
+ * number of periods.
+ */
+static const struct snd_pcm_hardware fsl_dma_hardware = {
+
+ .info = SNDRV_PCM_INFO_INTERLEAVED,
+ .formats = FSLDMA_PCM_FORMATS,
+ .rates = FSLDMA_PCM_RATES,
+ .rate_min = 5512,
+ .rate_max = 192000,
+ .period_bytes_min = 512, /* A reasonable limit */
+ .period_bytes_max = (u32) -1,
+ .periods_min = NUM_DMA_LINKS,
+ .periods_max = (unsigned int) -1,
+ .buffer_bytes_max = 128 * 1024, /* A reasonable limit */
+};
+
+/*
+ * Tell ALSA that the DMA transfer has aborted
+ *
+ * This function should be called by the ISR whenever the DMA controller
+ * halts data transfer.
+ */
+static void fsl_dma_abort_stream(struct snd_pcm_substream *substream)
+{
+ unsigned long flags;
+
+ snd_pcm_stream_lock_irqsave(substream, flags);
+
+ if (snd_pcm_running(substream))
+ snd_pcm_stop(substream, SNDRV_PCM_STATE_XRUN);
+
+ snd_pcm_stream_unlock_irqrestore(substream, flags);
+}
+
+/*
+ * Update the link descriptor pointers to point to the next period buffer.
+*/
+static void fsl_dma_update_pointers(struct fsl_dma_private *dma_private)
+{
+ struct fsl_dma_link_descriptor *link =
+ &dma_private->link[dma_private->current_link];
+
+ /* Update our link descriptors to point to the next period */
+ if (dma_private->substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ link->source_addr =
+ cpu_to_be32(dma_private->dma_buf_next);
+ else
+ link->dest_addr =
+ cpu_to_be32(dma_private->dma_buf_next);
+
+ /* Update our variables for next time */
+ dma_private->dma_buf_next += dma_private->period_size;
+
+ if (dma_private->dma_buf_next >= dma_private->dma_buf_end)
+ dma_private->dma_buf_next = dma_private->dma_buf_phys;
+
+ if (++dma_private->current_link >= NUM_DMA_LINKS)
+ dma_private->current_link = 0;
+}
+
+/*
+ * Interrupt handler for the DMA controller
+ */
+static irqreturn_t fsl_dma_isr(int irq, void *dev_id)
+{
+ struct fsl_dma_private *dma_private = dev_id;
+ struct ccsr_dma_channel __iomem *dma_channel = dma_private->dma_channel;
+ irqreturn_t ret = IRQ_NONE;
+ u32 sr, sr2 = 0;
+
+ /* We got an interrupt, so read the status register to see what we
+ were interrupted for.
+ */
+ sr = in_be32(&dma_channel->sr);
+
+ if (sr & CCSR_DMA_SR_TE) {
+ dev_err(dma_private->substream->pcm->card->dev,
+ "DMA transmit error (controller=%u channel=%u irq=%u\n",
+ dma_private->controller_id,
+ dma_private->channel_id, irq);
+ fsl_dma_abort_stream(dma_private->substream);
+ sr2 |= CCSR_DMA_SR_TE;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sr & CCSR_DMA_SR_CH)
+ ret = IRQ_HANDLED;
+
+ if (sr & CCSR_DMA_SR_PE) {
+ dev_err(dma_private->substream->pcm->card->dev,
+ "DMA%u programming error (channel=%u irq=%u)\n",
+ dma_private->controller_id,
+ dma_private->channel_id, irq);
+ fsl_dma_abort_stream(dma_private->substream);
+ sr2 |= CCSR_DMA_SR_PE;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sr & CCSR_DMA_SR_EOLNI) {
+ sr2 |= CCSR_DMA_SR_EOLNI;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sr & CCSR_DMA_SR_CB)
+ ret = IRQ_HANDLED;
+
+ if (sr & CCSR_DMA_SR_EOSI) {
+ struct snd_pcm_substream *substream = dma_private->substream;
+
+ /* Tell ALSA we completed a period. */
+ snd_pcm_period_elapsed(substream);
+
+ /*
+ * Update our link descriptors to point to the next period. We
+ * only need to do this if the number of periods is not equal to
+ * the number of links.
+ */
+ if (dma_private->num_periods != NUM_DMA_LINKS)
+ fsl_dma_update_pointers(dma_private);
+
+ sr2 |= CCSR_DMA_SR_EOSI;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sr & CCSR_DMA_SR_EOLSI) {
+ sr2 |= CCSR_DMA_SR_EOLSI;
+ ret = IRQ_HANDLED;
+ }
+
+ /* Clear the bits that we set */
+ if (sr2)
+ out_be32(&dma_channel->sr, sr2);
+
+ return ret;
+}
+
+/*
+ * Initialize this PCM driver.
+ *
+ * This function is called when the codec driver calls snd_soc_new_pcms(),
+ * once for each .dai_link in the machine driver's snd_soc_machine
+ * structure.
+ */
+static int fsl_dma_new(struct snd_card *card, struct snd_soc_codec_dai *dai,
+ struct snd_pcm *pcm)
+{
+ static u64 fsl_dma_dmamask = 0xffffffff;
+ int ret;
+
+ if (!card->dev->dma_mask)
+ card->dev->dma_mask = &fsl_dma_dmamask;
+
+ if (!card->dev->coherent_dma_mask)
+ card->dev->coherent_dma_mask = fsl_dma_dmamask;
+
+ ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->dev,
+ fsl_dma_hardware.buffer_bytes_max,
+ &pcm->streams[0].substream->dma_buffer);
+ if (ret) {
+ dev_err(card->dev,
+ "Can't allocate playback DMA buffer (size=%u)\n",
+ fsl_dma_hardware.buffer_bytes_max);
+ return -ENOMEM;
+ }
+
+ ret = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->dev,
+ fsl_dma_hardware.buffer_bytes_max,
+ &pcm->streams[1].substream->dma_buffer);
+ if (ret) {
+ snd_dma_free_pages(&pcm->streams[0].substream->dma_buffer);
+ dev_err(card->dev,
+ "Can't allocate capture DMA buffer (size=%u)\n",
+ fsl_dma_hardware.buffer_bytes_max);
+ return -ENOMEM;
+ }
+
+ return 0;
+}
+
+/*
+ * Open a new stream.
+ *
+ * Each stream has its own DMA buffer.
+ */
+static int fsl_dma_open(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct fsl_dma_private *dma_private;
+ dma_addr_t ld_buf_phys;
+ unsigned int channel;
+ int ret = 0;
+
+ /*
+ * Reject any DMA buffer whose size is not a multiple of the period
+ * size. We need to make sure that the DMA buffer can be evenly divided
+ * into periods.
+ */
+ ret = snd_pcm_hw_constraint_integer(runtime,
+ SNDRV_PCM_HW_PARAM_PERIODS);
+ if (ret < 0) {
+ dev_err(substream->pcm->card->dev, "invalid buffer size\n");
+ return ret;
+ }
+
+ channel = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0 : 1;
+
+ if (dma_global_data.assigned[channel]) {
+ dev_err(substream->pcm->card->dev,
+ "DMA channel already assigned\n");
+ return -EBUSY;
+ }
+
+ dma_private = dma_alloc_coherent(substream->pcm->dev,
+ sizeof(struct fsl_dma_private), &ld_buf_phys, GFP_KERNEL);
+ if (!dma_private) {
+ dev_err(substream->pcm->card->dev,
+ "can't allocate DMA private data\n");
+ return -ENOMEM;
+ }
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ dma_private->ssi_sxx_phys = dma_global_data.ssi_stx_phys;
+ else
+ dma_private->ssi_sxx_phys = dma_global_data.ssi_srx_phys;
+
+ dma_private->dma_channel = dma_global_data.dma_channel[channel];
+ dma_private->irq = dma_global_data.irq[channel];
+ dma_private->substream = substream;
+ dma_private->ld_buf_phys = ld_buf_phys;
+ dma_private->dma_buf_phys = substream->dma_buffer.addr;
+
+ /* We only support one DMA controller for now */
+ dma_private->controller_id = 0;
+ dma_private->channel_id = channel;
+
+ ret = request_irq(dma_private->irq, fsl_dma_isr, 0, "DMA", dma_private);
+ if (ret) {
+ dev_err(substream->pcm->card->dev,
+ "can't register ISR for IRQ %u (ret=%i)\n",
+ dma_private->irq, ret);
+ dma_free_coherent(substream->pcm->dev,
+ sizeof(struct fsl_dma_private),
+ dma_private, dma_private->ld_buf_phys);
+ return ret;
+ }
+
+ dma_global_data.assigned[channel] = 1;
+
+ snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
+ snd_soc_set_runtime_hwparams(substream, &fsl_dma_hardware);
+ runtime->private_data = dma_private;
+
+ return 0;
+}
+
+/*
+ * Allocate the DMA buffer and the DMA link descriptors.
+ *
+ * ALSA divides the DMA buffer into N periods. We create NUM_DMA_LINKS link
+ * descriptors that ping-pong from one period to the next. For example, if
+ * there are six periods and two link descriptors, this is how they look
+ * before playback starts:
+ *
+ * The last link descriptor
+ * ____________ points back to the first
+ * | |
+ * V |
+ * ___ ___ |
+ * | |->| |->|
+ * |___| |___|
+ * | |
+ * | |
+ * V V
+ * _________________________________________
+ * | | | | | | | The DMA buffer is
+ * | | | | | | | divided into 6 parts
+ * |______|______|______|______|______|______|
+ *
+ * and here's how they look after the first period is finished playing:
+ *
+ * ____________
+ * | |
+ * V |
+ * ___ ___ |
+ * | |->| |->|
+ * |___| |___|
+ * | |
+ * |______________
+ * | |
+ * V V
+ * _________________________________________
+ * | | | | | | |
+ * | | | | | | |
+ * |______|______|______|______|______|______|
+ *
+ * The first link descriptor now points to the third period. The DMA
+ * controller is currently playing the second period. When it finishes, it
+ * will jump back to the first descriptor and play the third period.
+ *
+ * There are four reasons we do this:
+ *
+ * 1. The only way to get the DMA controller to automatically restart the
+ * transfer when it gets to the end of the buffer is to use chaining
+ * mode. Basic direct mode doesn't offer that feature.
+ * 2. We need to receive an interrupt at the end of every period. The DMA
+ * controller can generate an interrupt at the end of every link transfer
+ * (aka segment). Making each period into a DMA segment will give us the
+ * interrupts we need.
+ * 3. By creating only two link descriptors, regardless of the number of
+ * periods, we do not need to reallocate the link descriptors if the
+ * number of periods changes.
+ * 4. All of the audio data is still stored in a single, contiguous DMA
+ * buffer, which is what ALSA expects. We're just dividing it into
+ * contiguous parts, and creating a link descriptor for each one.
+ *
+ * Note that due to a quirk of the SSI's STX register, the target address
+ * for the DMA operations depends on the sample size. So we don't program
+ * the dest_addr (for playback -- source_addr for capture) fields in the
+ * link descriptors here. We do that in fsl_dma_prepare()
+ */
+static int fsl_dma_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *hw_params)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct fsl_dma_private *dma_private = runtime->private_data;
+ struct ccsr_dma_channel __iomem *dma_channel = dma_private->dma_channel;
+
+ dma_addr_t temp_addr; /* Pointer to next period */
+ u64 temp_link; /* Pointer to next link descriptor */
+ u32 mr; /* Temporary variable for MR register */
+
+ unsigned int i;
+
+ /* Get all the parameters we need */
+ size_t buffer_size = params_buffer_bytes(hw_params);
+ size_t period_size = params_period_bytes(hw_params);
+
+ /* Initialize our DMA tracking variables */
+ dma_private->period_size = period_size;
+ dma_private->num_periods = params_periods(hw_params);
+ dma_private->dma_buf_end = dma_private->dma_buf_phys + buffer_size;
+ dma_private->dma_buf_next = dma_private->dma_buf_phys +
+ (NUM_DMA_LINKS * period_size);
+ if (dma_private->dma_buf_next >= dma_private->dma_buf_end)
+ dma_private->dma_buf_next = dma_private->dma_buf_phys;
+
+ /*
+ * Initialize each link descriptor.
+ *
+ * The actual address in STX0 (destination for playback, source for
+ * capture) is based on the sample size, but we don't know the sample
+ * size in this function, so we'll have to adjust that later. See
+ * comments in fsl_dma_prepare().
+ *
+ * The DMA controller does not have a cache, so the CPU does not
+ * need to tell it to flush its cache. However, the DMA
+ * controller does need to tell the CPU to flush its cache.
+ * That's what the SNOOP bit does.
+ *
+ * Also, even though the DMA controller supports 36-bit addressing, for
+ * simplicity we currently support only 32-bit addresses for the audio
+ * buffer itself.
+ */
+ temp_addr = substream->dma_buffer.addr;
+ temp_link = dma_private->ld_buf_phys +
+ sizeof(struct fsl_dma_link_descriptor);
+
+ for (i = 0; i < NUM_DMA_LINKS; i++) {
+ struct fsl_dma_link_descriptor *link = &dma_private->link[i];
+
+ link->count = cpu_to_be32(period_size);
+ link->source_attr = cpu_to_be32(CCSR_DMA_ATR_SNOOP);
+ link->dest_attr = cpu_to_be32(CCSR_DMA_ATR_SNOOP);
+ link->next = cpu_to_be64(temp_link);
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ link->source_addr = cpu_to_be32(temp_addr);
+ else
+ link->dest_addr = cpu_to_be32(temp_addr);
+
+ temp_addr += period_size;
+ temp_link += sizeof(struct fsl_dma_link_descriptor);
+ }
+ /* The last link descriptor points to the first */
+ dma_private->link[i - 1].next = cpu_to_be64(dma_private->ld_buf_phys);
+
+ /* Tell the DMA controller where the first link descriptor is */
+ out_be32(&dma_channel->clndar,
+ CCSR_DMA_CLNDAR_ADDR(dma_private->ld_buf_phys));
+ out_be32(&dma_channel->eclndar,
+ CCSR_DMA_ECLNDAR_ADDR(dma_private->ld_buf_phys));
+
+ /* The manual says the BCR must be clear before enabling EMP */
+ out_be32(&dma_channel->bcr, 0);
+
+ /* Program the mode register for interrupts, external master control,
+ and source/destination hold. Also clear the Channel Abort bit.
+ */
+ mr = in_be32(&dma_channel->mr) &
+ ~(CCSR_DMA_MR_CA | CCSR_DMA_MR_DAHE | CCSR_DMA_MR_SAHE);
+
+ /*
+ * We want External Master Start and External Master Pause enabled,
+ * because the SSI is controlling the DMA controller. We want the DMA
+ * controller to be set up in advance, and then we signal only the SSI
+ * to start transfering.
+ *
+ * We want End-Of-Segment Interrupts enabled, because this will generate
+ * an interrupt at the end of each segment (each link descriptor
+ * represents one segment). Each DMA segment is the same thing as an
+ * ALSA period, so this is how we get an interrupt at the end of every
+ * period.
+ *
+ * We want Error Interrupt enabled, so that we can get an error if
+ * the DMA controller is mis-programmed somehow.
+ */
+ mr |= CCSR_DMA_MR_EOSIE | CCSR_DMA_MR_EIE | CCSR_DMA_MR_EMP_EN |
+ CCSR_DMA_MR_EMS_EN;
+
+ /* For playback, we want the destination address to be held. For
+ capture, set the source address to be held. */
+ mr |= (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
+ CCSR_DMA_MR_DAHE : CCSR_DMA_MR_SAHE;
+
+ out_be32(&dma_channel->mr, mr);
+
+ return 0;
+}
+
+/*
+ * Prepare the DMA registers for playback.
+ *
+ * This function is called after the specifics of the audio data are known,
+ * i.e. snd_pcm_runtime is initialized.
+ *
+ * In this function, we finish programming the registers of the DMA
+ * controller that are dependent on the sample size.
+ *
+ * One of the drawbacks with big-endian is that when copying integers of
+ * different sizes to a fixed-sized register, the address to which the
+ * integer must be copied is dependent on the size of the integer.
+ *
+ * For example, if P is the address of a 32-bit register, and X is a 32-bit
+ * integer, then X should be copied to address P. However, if X is a 16-bit
+ * integer, then it should be copied to P+2. If X is an 8-bit register,
+ * then it should be copied to P+3.
+ *
+ * So for playback of 8-bit samples, the DMA controller must transfer single
+ * bytes from the DMA buffer to the last byte of the STX0 register, i.e.
+ * offset by 3 bytes. For 16-bit samples, the offset is two bytes.
+ *
+ * For 24-bit samples, the offset is 1 byte. However, the DMA controller
+ * does not support 3-byte copies (the DAHTS register supports only 1, 2, 4,
+ * and 8 bytes at a time). So we do not support packed 24-bit samples.
+ * 24-bit data must be padded to 32 bits.
+ */
+static int fsl_dma_prepare(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct fsl_dma_private *dma_private = runtime->private_data;
+ struct ccsr_dma_channel __iomem *dma_channel = dma_private->dma_channel;
+ u32 mr;
+ unsigned int i;
+ dma_addr_t ssi_sxx_phys; /* Bus address of SSI STX register */
+ unsigned int frame_size; /* Number of bytes per frame */
+
+ ssi_sxx_phys = dma_private->ssi_sxx_phys;
+
+ mr = in_be32(&dma_channel->mr) & ~(CCSR_DMA_MR_BWC_MASK |
+ CCSR_DMA_MR_SAHTS_MASK | CCSR_DMA_MR_DAHTS_MASK);
+
+ switch (runtime->sample_bits) {
+ case 8:
+ mr |= CCSR_DMA_MR_DAHTS_1 | CCSR_DMA_MR_SAHTS_1;
+ ssi_sxx_phys += 3;
+ break;
+ case 16:
+ mr |= CCSR_DMA_MR_DAHTS_2 | CCSR_DMA_MR_SAHTS_2;
+ ssi_sxx_phys += 2;
+ break;
+ case 32:
+ mr |= CCSR_DMA_MR_DAHTS_4 | CCSR_DMA_MR_SAHTS_4;
+ break;
+ default:
+ dev_err(substream->pcm->card->dev,
+ "unsupported sample size %u\n", runtime->sample_bits);
+ return -EINVAL;
+ }
+
+ frame_size = runtime->frame_bits / 8;
+ /*
+ * BWC should always be a multiple of the frame size. BWC determines
+ * how many bytes are sent/received before the DMA controller checks the
+ * SSI to see if it needs to stop. For playback, the transmit FIFO can
+ * hold three frames, so we want to send two frames at a time. For
+ * capture, the receive FIFO is triggered when it contains one frame, so
+ * we want to receive one frame at a time.
+ */
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ mr |= CCSR_DMA_MR_BWC(2 * frame_size);
+ else
+ mr |= CCSR_DMA_MR_BWC(frame_size);
+
+ out_be32(&dma_channel->mr, mr);
+
+ /*
+ * Program the address of the DMA transfer to/from the SSI.
+ */
+ for (i = 0; i < NUM_DMA_LINKS; i++) {
+ struct fsl_dma_link_descriptor *link = &dma_private->link[i];
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ link->dest_addr = cpu_to_be32(ssi_sxx_phys);
+ else
+ link->source_addr = cpu_to_be32(ssi_sxx_phys);
+ }
+
+ return 0;
+}
+
+/*
+ * fsl_dma_pointer - 'pointer' PCM operation callback function
+ *
+ * This function is called by ALSA when ALSA wants to know where in the
+ * stream buffer the hardware currently is.
+ *
+ * For playback, the SAR register contains the physical address of the most
+ * recent DMA transfer. For capture, the value is in the DAR register.
+ *
+ * The base address of the buffer is stored in the source_addr field of the
+ * first link descriptor.
+ */
+static snd_pcm_uframes_t fsl_dma_pointer(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct fsl_dma_private *dma_private = runtime->private_data;
+ struct ccsr_dma_channel __iomem *dma_channel = dma_private->dma_channel;
+ dma_addr_t position;
+ snd_pcm_uframes_t frames;
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ position = in_be32(&dma_channel->sar);
+ else
+ position = in_be32(&dma_channel->dar);
+
+ frames = bytes_to_frames(runtime, position - dma_private->dma_buf_phys);
+
+ /*
+ * If the current address is just past the end of the buffer, wrap it
+ * around.
+ */
+ if (frames == runtime->buffer_size)
+ frames = 0;
+
+ return frames;
+}
+
+/*
+ * Release the resources allocated in fsl_dma_hw_params() and
+ * de-program the registers. This function can be called multiple times.
+ */
+static int fsl_dma_hw_free(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct fsl_dma_private *dma_private = runtime->private_data;
+
+ if (dma_private) {
+ struct ccsr_dma_channel __iomem *dma_channel;
+
+ dma_channel = dma_private->dma_channel;
+
+ dump_dma_regs(__FUNCTION__, __LINE__, dma_channel);
+ dump_lds(dma_private);
+
+ /* Stop the DMA */
+ out_be32(&dma_channel->mr, CCSR_DMA_MR_CA);
+ out_be32(&dma_channel->mr, 0);
+
+ /* Reset all the other registers */
+ out_be32(&dma_channel->sr, -1);
+ out_be32(&dma_channel->clndar, 0);
+ out_be32(&dma_channel->eclndar, 0);
+ out_be32(&dma_channel->satr, 0);
+ out_be32(&dma_channel->sar, 0);
+ out_be32(&dma_channel->datr, 0);
+ out_be32(&dma_channel->dar, 0);
+ out_be32(&dma_channel->bcr, 0);
+ out_be32(&dma_channel->nlndar, 0);
+ out_be32(&dma_channel->enlndar, 0);
+ }
+
+ return 0;
+}
+
+/*
+ * Close the stream.
+ */
+static int fsl_dma_close(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct fsl_dma_private *dma_private = runtime->private_data;
+ int dir = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0 : 1;
+
+ if (dma_private) {
+ if (dma_private->irq)
+ free_irq(dma_private->irq, dma_private);
+
+ if (dma_private->ld_buf_phys) {
+ dma_unmap_single(substream->pcm->dev,
+ dma_private->ld_buf_phys,
+ sizeof(dma_private->link), DMA_TO_DEVICE);
+ }
+
+ /* Deallocate the fsl_dma_private structure */
+ dma_free_coherent(substream->pcm->dev,
+ sizeof(struct fsl_dma_private),
+ dma_private, dma_private->ld_buf_phys);
+ substream->runtime->private_data = NULL;
+ }
+
+ dma_global_data.assigned[dir] = 0;
+
+ return 0;
+}
+
+/*
+ * Remove this PCM driver.
+ */
+static void fsl_dma_free_dma_buffers(struct snd_pcm *pcm)
+{
+ struct snd_pcm_substream *substream;
+ unsigned int i;
+
+ for (i = 0; i < ARRAY_SIZE(pcm->streams); i++) {
+ substream = pcm->streams[i].substream;
+ if (substream) {
+ snd_dma_free_pages(&substream->dma_buffer);
+ substream->dma_buffer.area = NULL;
+ substream->dma_buffer.addr = 0;
+ }
+ }
+}
+
+static struct snd_pcm_ops fsl_dma_ops = {
+ .open = fsl_dma_open,
+ .close = fsl_dma_close,
+ .ioctl = snd_pcm_lib_ioctl,
+ .hw_params = fsl_dma_hw_params,
+ .hw_free = fsl_dma_hw_free,
+ .prepare = fsl_dma_prepare,
+ .pointer = fsl_dma_pointer,
+};
+
+struct snd_soc_platform fsl_soc_platform = {
+ .name = "fsl-dma",
+ .pcm_ops = &fsl_dma_ops,
+ .pcm_new = fsl_dma_new,
+ .pcm_free = fsl_dma_free_dma_buffers,
+};
+EXPORT_SYMBOL_GPL(fsl_soc_platform);
+
+int fsl_dma_configure(struct fsl_dma_info *dma_info)
+{
+ static int initialized;
+
+ /* We only support one DMA controller for now */
+ if (initialized)
+ return 0;
+
+ dma_global_data.ssi_stx_phys = dma_info->ssi_stx_phys;
+ dma_global_data.ssi_srx_phys = dma_info->ssi_srx_phys;
+ dma_global_data.dma_channel[0] = dma_info->dma_channel[0];
+ dma_global_data.dma_channel[1] = dma_info->dma_channel[1];
+ dma_global_data.irq[0] = dma_info->dma_irq[0];
+ dma_global_data.irq[1] = dma_info->dma_irq[1];
+ dma_global_data.assigned[0] = 0;
+ dma_global_data.assigned[1] = 0;
+
+ initialized = 1;
+ return 1;
+}
+EXPORT_SYMBOL_GPL(fsl_dma_configure);
+
+MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
+MODULE_DESCRIPTION("Freescale FSL Elo DMA ASoC PCM module");
+MODULE_LICENSE("GPL");
diff --git a/sound/soc/fsl/fsl_dma.h b/sound/soc/fsl/fsl_dma.h
new file mode 100644
index 0000000..430a6ce
--- /dev/null
+++ b/sound/soc/fsl/fsl_dma.h
@@ -0,0 +1,149 @@
+/*
+ * mpc8610-pcm.h - ALSA PCM interface for the Freescale MPC8610 SoC
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef _MPC8610_PCM_H
+#define _MPC8610_PCM_H
+
+struct ccsr_dma {
+ u8 res0[0x100];
+ struct ccsr_dma_channel {
+ __be32 mr; /* Mode register */
+ __be32 sr; /* Status register */
+ __be32 eclndar; /* Current link descriptor extended addr reg */
+ __be32 clndar; /* Current link descriptor address register */
+ __be32 satr; /* Source attributes register */
+ __be32 sar; /* Source address register */
+ __be32 datr; /* Destination attributes register */
+ __be32 dar; /* Destination address register */
+ __be32 bcr; /* Byte count register */
+ __be32 enlndar; /* Next link descriptor extended address reg */
+ __be32 nlndar; /* Next link descriptor address register */
+ u8 res1[4];
+ __be32 eclsdar; /* Current list descriptor extended addr reg */
+ __be32 clsdar; /* Current list descriptor address register */
+ __be32 enlsdar; /* Next list descriptor extended address reg */
+ __be32 nlsdar; /* Next list descriptor address register */
+ __be32 ssr; /* Source stride register */
+ __be32 dsr; /* Destination stride register */
+ u8 res2[0x38];
+ } channel[4];
+ __be32 dgsr;
+};
+
+#define CCSR_DMA_MR_BWC_DISABLED 0x0F000000
+#define CCSR_DMA_MR_BWC_SHIFT 24
+#define CCSR_DMA_MR_BWC_MASK 0x0F000000
+#define CCSR_DMA_MR_BWC(x) \
+ ((ilog2(x) << CCSR_DMA_MR_BWC_SHIFT) & CCSR_DMA_MR_BWC_MASK)
+#define CCSR_DMA_MR_EMP_EN 0x00200000
+#define CCSR_DMA_MR_EMS_EN 0x00040000
+#define CCSR_DMA_MR_DAHTS_MASK 0x00030000
+#define CCSR_DMA_MR_DAHTS_1 0x00000000
+#define CCSR_DMA_MR_DAHTS_2 0x00010000
+#define CCSR_DMA_MR_DAHTS_4 0x00020000
+#define CCSR_DMA_MR_DAHTS_8 0x00030000
+#define CCSR_DMA_MR_SAHTS_MASK 0x0000C000
+#define CCSR_DMA_MR_SAHTS_1 0x00000000
+#define CCSR_DMA_MR_SAHTS_2 0x00004000
+#define CCSR_DMA_MR_SAHTS_4 0x00008000
+#define CCSR_DMA_MR_SAHTS_8 0x0000C000
+#define CCSR_DMA_MR_DAHE 0x00002000
+#define CCSR_DMA_MR_SAHE 0x00001000
+#define CCSR_DMA_MR_SRW 0x00000400
+#define CCSR_DMA_MR_EOSIE 0x00000200
+#define CCSR_DMA_MR_EOLNIE 0x00000100
+#define CCSR_DMA_MR_EOLSIE 0x00000080
+#define CCSR_DMA_MR_EIE 0x00000040
+#define CCSR_DMA_MR_XFE 0x00000020
+#define CCSR_DMA_MR_CDSM_SWSM 0x00000010
+#define CCSR_DMA_MR_CA 0x00000008
+#define CCSR_DMA_MR_CTM 0x00000004
+#define CCSR_DMA_MR_CC 0x00000002
+#define CCSR_DMA_MR_CS 0x00000001
+
+#define CCSR_DMA_SR_TE 0x00000080
+#define CCSR_DMA_SR_CH 0x00000020
+#define CCSR_DMA_SR_PE 0x00000010
+#define CCSR_DMA_SR_EOLNI 0x00000008
+#define CCSR_DMA_SR_CB 0x00000004
+#define CCSR_DMA_SR_EOSI 0x00000002
+#define CCSR_DMA_SR_EOLSI 0x00000001
+
+/* ECLNDAR takes bits 32-36 of the CLNDAR register */
+static inline u32 CCSR_DMA_ECLNDAR_ADDR(u64 x)
+{
+ return (x >> 32) & 0xf;
+}
+
+#define CCSR_DMA_CLNDAR_ADDR(x) ((x) & 0xFFFFFFFE)
+#define CCSR_DMA_CLNDAR_EOSIE 0x00000008
+
+/* SATR and DATR, combined */
+#define CCSR_DMA_ATR_PBATMU 0x20000000
+#define CCSR_DMA_ATR_TFLOWLVL_0 0x00000000
+#define CCSR_DMA_ATR_TFLOWLVL_1 0x06000000
+#define CCSR_DMA_ATR_TFLOWLVL_2 0x08000000
+#define CCSR_DMA_ATR_TFLOWLVL_3 0x0C000000
+#define CCSR_DMA_ATR_PCIORDER 0x02000000
+#define CCSR_DMA_ATR_SME 0x01000000
+#define CCSR_DMA_ATR_NOSNOOP 0x00040000
+#define CCSR_DMA_ATR_SNOOP 0x00050000
+#define CCSR_DMA_ATR_ESAD_MASK 0x0000000F
+
+/**
+ * List Descriptor for extended chaining mode DMA operations.
+ *
+ * The CLSDAR register points to the first (in a linked-list) List
+ * Descriptor. Each object must be aligned on a 32-byte boundary. Each
+ * list descriptor points to a linked-list of link Descriptors.
+ */
+struct fsl_dma_list_descriptor {
+ __be64 next; /* Address of next list descriptor */
+ __be64 first_link; /* Address of first link descriptor */
+ __be32 source; /* Source stride */
+ __be32 dest; /* Destination stride */
+ u8 res[8]; /* Reserved */
+} __attribute__ ((aligned(32), packed));
+
+/**
+ * Link Descriptor for basic and extended chaining mode DMA operations.
+ *
+ * A Link Descriptor points to a single DMA buffer. Each link descriptor
+ * must be aligned on a 32-byte boundary.
+ */
+struct fsl_dma_link_descriptor {
+ __be32 source_attr; /* Programmed into SATR register */
+ __be32 source_addr; /* Programmed into SAR register */
+ __be32 dest_attr; /* Programmed into DATR register */
+ __be32 dest_addr; /* Programmed into DAR register */
+ __be64 next; /* Address of next link descriptor */
+ __be32 count; /* Byte count */
+ u8 res[4]; /* Reserved */
+} __attribute__ ((aligned(32), packed));
+
+/* DMA information needed to create a snd_soc_cpu_dai object
+ *
+ * ssi_stx_phys: bus address of SSI STX register to use
+ * ssi_srx_phys: bus address of SSI SRX register to use
+ * dma[0]: points to the DMA channel to use for playback
+ * dma[1]: points to the DMA channel to use for capture
+ * dma_irq[0]: IRQ of the DMA channel to use for playback
+ * dma_irq[1]: IRQ of the DMA channel to use for capture
+ */
+struct fsl_dma_info {
+ dma_addr_t ssi_stx_phys;
+ dma_addr_t ssi_srx_phys;
+ struct ccsr_dma_channel __iomem *dma_channel[2];
+ unsigned int dma_irq[2];
+};
+
+extern struct snd_soc_platform fsl_soc_platform;
+
+int fsl_dma_configure(struct fsl_dma_info *dma_info);
+
+#endif
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
new file mode 100644
index 0000000..a219e58
--- /dev/null
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -0,0 +1,614 @@
+/*
+ * Freescale SSI ALSA SoC Digital Audio Interface (DAI) driver
+ *
+ * Author: Timur Tabi <timur@freescale.com>
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+
+#include <sound/driver.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/initval.h>
+#include <sound/soc.h>
+
+#include <asm/immap_86xx.h>
+
+#include "fsl_ssi.h"
+
+/*
+ * The sample rates supported by the I2S
+ *
+ * This driver currently only supports the SSI running in I2S slave mode,
+ * which means the codec determines the sample rate. Therefore, we tell
+ * ALSA that we support all rates and let the codec driver decide what rates
+ * are really supported.
+ */
+#define FSLSSI_I2S_RATES (SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_192000 | \
+ SNDRV_PCM_RATE_CONTINUOUS)
+
+/*
+ * The audio formats supported by the SSI
+ *
+ * This driver currently only supports the SSI running in I2S slave mode.
+ *
+ * The SSI has a limitation in that the samples must be in the same byte
+ * order as the host CPU. This is because when multiple bytes are written
+ * to the STX register, the bytes and bits must be written in the same
+ * order. The STX is a shift register, so all the bits need to be aligned
+ * (bit-endianness must match byte-endianness). Processors typically write
+ * the bits within a byte in the same order that the bytes of a word are
+ * written in. So if the host CPU is big-endian, then only big-endian
+ * samples will be written to STX properly.
+ */
+#ifdef __BIG_ENDIAN
+#define FSLSSI_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | \
+ SNDRV_PCM_FMTBIT_S18_3BE | SNDRV_PCM_FMTBIT_S20_3BE | \
+ SNDRV_PCM_FMTBIT_S24_3BE | SNDRV_PCM_FMTBIT_S24_BE)
+#else
+#define FSLSSI_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
+ SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE | \
+ SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_LE)
+#endif
+
+/* SSI information.
+ *
+ * name: short name for this device ("SSI0", "SSI1", etc)
+ * ssi: pointer to the SSI's registers
+ * ssi_phys: physical address of the SSI registers
+ * irq: IRQ of this SSI
+ * dev: struct device pointer
+ * playback: the number of playback streams opened
+ * capture: the number of capture streams opened
+ */
+struct fsl_ssi_private {
+ char name[8];
+ struct ccsr_ssi __iomem *ssi;
+ dma_addr_t ssi_phys;
+ unsigned int irq;
+ struct device *dev;
+ unsigned int playback;
+ unsigned int capture;
+ struct snd_soc_cpu_dai cpu_dai;
+ struct device_attribute dev_attr;
+
+ struct {
+ unsigned int rfrc;
+ unsigned int tfrc;
+ unsigned int cmdau;
+ unsigned int cmddu;
+ unsigned int rxt;
+ unsigned int rdr1;
+ unsigned int rdr0;
+ unsigned int tde1;
+ unsigned int tde0;
+ unsigned int roe1;
+ unsigned int roe0;
+ unsigned int tue1;
+ unsigned int tue0;
+ unsigned int tfs;
+ unsigned int rfs;
+ unsigned int tls;
+ unsigned int rls;
+ unsigned int rff1;
+ unsigned int rff0;
+ unsigned int tfe1;
+ unsigned int tfe0;
+ } stats;
+};
+
+/*
+ * SSI interrupt handler.
+ *
+ * Do we even want an SSI interrupt handler? Maybe for error handling, but
+ * buffer processing is handled via DMA interrupts.
+ */
+static irqreturn_t fsl_ssi_isr(int irq, void *dev_id)
+{
+ struct fsl_ssi_private *ssi_private = dev_id;
+ struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
+ irqreturn_t ret = IRQ_NONE;
+ __be32 sisr;
+ __be32 sisr2 = 0;
+
+ /* We got an interrupt, so read the status register to see what we
+ were interrupted for. We mask it with the Interrupt Enable register
+ so that we only check for events that we're interested in.
+ */
+ sisr = in_be32(&ssi->sisr) & in_be32(&ssi->sier);
+
+ if (sisr & CCSR_SSI_SISR_RFRC) {
+ ssi_private->stats.rfrc++;
+ sisr2 |= CCSR_SSI_SISR_RFRC;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_TFRC) {
+ ssi_private->stats.tfrc++;
+ sisr2 |= CCSR_SSI_SISR_TFRC;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_CMDAU) {
+ ssi_private->stats.cmdau++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_CMDDU) {
+ ssi_private->stats.cmddu++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_RXT) {
+ ssi_private->stats.rxt++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_RDR1) {
+ ssi_private->stats.rdr1++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_RDR0) {
+ ssi_private->stats.rdr0++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_TDE1) {
+ ssi_private->stats.tde1++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_TDE0) {
+ ssi_private->stats.tde0++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_ROE1) {
+ ssi_private->stats.roe1++;
+ sisr2 |= CCSR_SSI_SISR_ROE1;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_ROE0) {
+ ssi_private->stats.roe0++;
+ sisr2 |= CCSR_SSI_SISR_ROE0;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_TUE1) {
+ ssi_private->stats.tue1++;
+ sisr2 |= CCSR_SSI_SISR_TUE1;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_TUE0) {
+ ssi_private->stats.tue0++;
+ sisr2 |= CCSR_SSI_SISR_TUE0;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_TFS) {
+ ssi_private->stats.tfs++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_RFS) {
+ ssi_private->stats.rfs++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_TLS) {
+ ssi_private->stats.tls++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_RLS) {
+ ssi_private->stats.rls++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_RFF1) {
+ ssi_private->stats.rff1++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_RFF0) {
+ ssi_private->stats.rff0++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_TFE1) {
+ ssi_private->stats.tfe1++;
+ ret = IRQ_HANDLED;
+ }
+
+ if (sisr & CCSR_SSI_SISR_TFE0) {
+ ssi_private->stats.tfe0++;
+ ret = IRQ_HANDLED;
+ }
+
+ /* Clear the bits that we set */
+ if (sisr2)
+ out_be32(&ssi->sisr, sisr2);
+
+ return ret;
+}
+
+/*
+ * Startup
+ *
+ * This is the first function called when a stream is opened.
+ *
+ * If this is the first stream open, then grab the IRQ and program most of
+ * the SSI registers.
+ */
+static int fsl_ssi_startup(struct snd_pcm_substream *substream)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
+
+ /*
+ * If this is the first stream opened, then request the IRQ
+ * and initialize the SSI registers.
+ */
+ if (!ssi_private->playback && !ssi_private->capture) {
+ struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
+ int ret;
+
+ ret = request_irq(ssi_private->irq, fsl_ssi_isr, 0,
+ ssi_private->name, ssi_private);
+ if (ret < 0) {
+ dev_err(substream->pcm->card->dev,
+ "could not claim irq %u\n", ssi_private->irq);
+ return ret;
+ }
+
+ /*
+ * Section 16.5 of the MPC8610 reference manual says that the
+ * SSI needs to be disabled before updating the registers we set
+ * here.
+ */
+ clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
+
+ /*
+ * Program the SSI into I2S Slave Non-Network Synchronous mode.
+ * Also enable the transmit and receive FIFO.
+ *
+ * FIXME: Little-endian samples require a different shift dir
+ */
+ clrsetbits_be32(&ssi->scr, CCSR_SSI_SCR_I2S_MODE_MASK,
+ CCSR_SSI_SCR_TFR_CLK_DIS |
+ CCSR_SSI_SCR_I2S_MODE_SLAVE | CCSR_SSI_SCR_SYN);
+
+ out_be32(&ssi->stcr,
+ CCSR_SSI_STCR_TXBIT0 | CCSR_SSI_STCR_TFEN0 |
+ CCSR_SSI_STCR_TFSI | CCSR_SSI_STCR_TEFS |
+ CCSR_SSI_STCR_TSCKP);
+
+ out_be32(&ssi->srcr,
+ CCSR_SSI_SRCR_RXBIT0 | CCSR_SSI_SRCR_RFEN0 |
+ CCSR_SSI_SRCR_RFSI | CCSR_SSI_SRCR_REFS |
+ CCSR_SSI_SRCR_RSCKP);
+
+ /*
+ * The DC and PM bits are only used if the SSI is the clock
+ * master.
+ */
+
+ /* 4. Enable the interrupts and DMA requests */
+ out_be32(&ssi->sier,
+ CCSR_SSI_SIER_TFRC_EN | CCSR_SSI_SIER_TDMAE |
+ CCSR_SSI_SIER_TIE | CCSR_SSI_SIER_TUE0_EN |
+ CCSR_SSI_SIER_TUE1_EN | CCSR_SSI_SIER_RFRC_EN |
+ CCSR_SSI_SIER_RDMAE | CCSR_SSI_SIER_RIE |
+ CCSR_SSI_SIER_ROE0_EN | CCSR_SSI_SIER_ROE1_EN);
+
+ /*
+ * Set the watermark for transmit FIFI 0 and receive FIFO 0. We
+ * don't use FIFO 1. Since the SSI only supports stereo, the
+ * watermark should never be an odd number.
+ */
+ out_be32(&ssi->sfcsr,
+ CCSR_SSI_SFCSR_TFWM0(6) | CCSR_SSI_SFCSR_RFWM0(2));
+
+ /*
+ * We keep the SSI disabled because if we enable it, then the
+ * DMA controller will start. It's not supposed to start until
+ * the SCR.TE (or SCR.RE) bit is set, but it does anyway. The
+ * DMA controller will transfer one "BWC" of data (i.e. the
+ * amount of data that the MR.BWC bits are set to). The reason
+ * this is bad is because at this point, the PCM driver has not
+ * finished initializing the DMA controller.
+ */
+ }
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ ssi_private->playback++;
+
+ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
+ ssi_private->capture++;
+
+ return 0;
+}
+
+/*
+ * Prepare the SSI.
+ *
+ * Most of the SSI registers have been programmed in the startup function,
+ * but the word length must be programmed here. Unfortunately, programming
+ * the SxCCR.WL bits requires the SSI to be temporarily disabled. This can
+ * cause a problem with supporting simultaneous playback and capture. If
+ * the SSI is already playing a stream, then that stream may be temporarily
+ * stopped when you start capture.
+ *
+ * Note: The SxCCR.DC and SxCCR.PM bits are only used if the SSI is the
+ * clock master.
+ */
+static int fsl_ssi_prepare(struct snd_pcm_substream *substream)
+{
+ struct snd_pcm_runtime *runtime = substream->runtime;
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
+
+ struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
+ u32 wl;
+
+ wl = CCSR_SSI_SxCCR_WL(snd_pcm_format_width(runtime->format));
+
+ clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ clrsetbits_be32(&ssi->stccr, CCSR_SSI_SxCCR_WL_MASK, wl);
+ else
+ clrsetbits_be32(&ssi->srccr, CCSR_SSI_SxCCR_WL_MASK, wl);
+
+ setbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
+
+ return 0;
+}
+
+/*
+ * Start and stop the DMA transfer.
+ *
+ * This function is called by ALSA to start, stop, pause, and resume the DMA
+ * transfer of data.
+ *
+ * The SSI has put the DMA in external master start and pause mode, which
+ * means the SSI completely controls the flow of data.
+ */
+static int fsl_ssi_trigger(struct snd_pcm_substream *substream, int cmd)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
+ struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ case SNDRV_PCM_TRIGGER_RESUME:
+ case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
+ setbits32(&ssi->scr, CCSR_SSI_SCR_TE);
+ } else {
+ setbits32(&ssi->scr, CCSR_SSI_SCR_RE);
+
+ /*
+ * I have no idea why we need a delay here. Without it,
+ * the DMA won't start (or the SSI won't tell the DMA to
+ * start).
+ */
+ msleep(1);
+ }
+ break;
+
+ case SNDRV_PCM_TRIGGER_STOP:
+ case SNDRV_PCM_TRIGGER_SUSPEND:
+ case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ clrbits32(&ssi->scr, CCSR_SSI_SCR_TE);
+ else
+ clrbits32(&ssi->scr, CCSR_SSI_SCR_RE);
+ break;
+
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+/*
+ * Shutdown. Clear DMA parameters and shutdown the SSI if there
+ * are no other substreams open.
+ */
+static void fsl_ssi_shutdown(struct snd_pcm_substream *substream)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct fsl_ssi_private *ssi_private = rtd->dai->cpu_dai->private_data;
+
+ if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
+ ssi_private->playback--;
+
+ if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
+ ssi_private->capture--;
+
+ /*
+ * If this is the last active substream, disable the SSI and release
+ * the IRQ.
+ */
+ if (!ssi_private->playback && !ssi_private->capture) {
+ struct ccsr_ssi __iomem *ssi = ssi_private->ssi;
+
+ clrbits32(&ssi->scr, CCSR_SSI_SCR_SSIEN);
+
+ free_irq(ssi_private->irq, ssi_private);
+ }
+}
+
+/* Set the clock frequency and direction
+ *
+ * This function is called by the machine driver to tell us what the clock
+ * frequency and direction are.
+ *
+ * Currently, we only support operating as a clock slave (SND_SOC_CLOCK_IN),
+ * and we don't care about the frequency. Return an error if the direction
+ * is not SND_SOC_CLOCK_IN.
+ */
+static int fsl_ssi_set_sysclk(struct snd_soc_cpu_dai *cpu_dai,
+ int clk_id, unsigned int freq, int dir)
+{
+
+ return (dir == SND_SOC_CLOCK_IN) ? 0 : -EINVAL;
+}
+
+/* Set the serial format.
+ *
+ * This function is called by the machine driver to tell us what serial
+ * format to use.
+ *
+ * Currently, we only support I2S mode. Return an error if the format is
+ * not SND_SOC_DAIFMT_I2S.
+ */
+static int fsl_ssi_set_fmt(struct snd_soc_cpu_dai *cpu_dai, unsigned int format)
+{
+ return (format == SND_SOC_DAIFMT_I2S) ? 0 : -EINVAL;
+}
+
+/*
+ * Template CPU DAI for the SSI
+ */
+static struct snd_soc_cpu_dai fsl_ssi_dai_template = {
+ .playback = {
+ /* The SSI does not support monaural audio. */
+ .channels_min = 2,
+ .channels_max = 2,
+ .rates = FSLSSI_I2S_RATES,
+ .formats = FSLSSI_I2S_FORMATS,
+ },
+ .capture = {
+ .channels_min = 2,
+ .channels_max = 2,
+ .rates = FSLSSI_I2S_RATES,
+ .formats = FSLSSI_I2S_FORMATS,
+ },
+ .ops = {
+ .startup = fsl_ssi_startup,
+ .prepare = fsl_ssi_prepare,
+ .shutdown = fsl_ssi_shutdown,
+ .trigger = fsl_ssi_trigger,
+ },
+ .dai_ops = {
+ .set_sysclk = fsl_ssi_set_sysclk,
+ .set_fmt = fsl_ssi_set_fmt,
+ },
+};
+
+static ssize_t fsl_sysfs_ssi_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct fsl_ssi_private *ssi_private =
+ container_of(attr, struct fsl_ssi_private, dev_attr);
+ ssize_t length;
+
+ length = sprintf(buf, "rfrc=%u", ssi_private->stats.rfrc);
+ length += sprintf(buf + length, "\ttfrc=%u", ssi_private->stats.tfrc);
+ length += sprintf(buf + length, "\tcmdau=%u", ssi_private->stats.cmdau);
+ length += sprintf(buf + length, "\tcmddu=%u", ssi_private->stats.cmddu);
+ length += sprintf(buf + length, "\trxt=%u", ssi_private->stats.rxt);
+ length += sprintf(buf + length, "\trdr1=%u", ssi_private->stats.rdr1);
+ length += sprintf(buf + length, "\trdr0=%u", ssi_private->stats.rdr0);
+ length += sprintf(buf + length, "\ttde1=%u", ssi_private->stats.tde1);
+ length += sprintf(buf + length, "\ttde0=%u", ssi_private->stats.tde0);
+ length += sprintf(buf + length, "\troe1=%u", ssi_private->stats.roe1);
+ length += sprintf(buf + length, "\troe0=%u", ssi_private->stats.roe0);
+ length += sprintf(buf + length, "\ttue1=%u", ssi_private->stats.tue1);
+ length += sprintf(buf + length, "\ttue0=%u", ssi_private->stats.tue0);
+ length += sprintf(buf + length, "\ttfs=%u", ssi_private->stats.tfs);
+ length += sprintf(buf + length, "\trfs=%u", ssi_private->stats.rfs);
+ length += sprintf(buf + length, "\ttls=%u", ssi_private->stats.tls);
+ length += sprintf(buf + length, "\trls=%u", ssi_private->stats.rls);
+ length += sprintf(buf + length, "\trff1=%u", ssi_private->stats.rff1);
+ length += sprintf(buf + length, "\trff0=%u", ssi_private->stats.rff0);
+ length += sprintf(buf + length, "\ttfe1=%u", ssi_private->stats.tfe1);
+ length += sprintf(buf + length, "\ttfe0=%u\n", ssi_private->stats.tfe0);
+
+ return length;
+}
+
+/* Create a snd_soc_cpu_dai structure
+ *
+ * This function is called by the machine driver to create a snd_soc_cpu_dai
+ * structure. A private data structure, with SSI hardware information, is
+ * appended to it.
+ */
+struct snd_soc_cpu_dai *fsl_ssi_create_dai(struct fsl_ssi_info *ssi_info)
+{
+ struct snd_soc_cpu_dai *fsl_ssi_dai;
+ struct fsl_ssi_private *ssi_private;
+ int ret = 0;
+ struct device_attribute *dev_attr;
+
+ ssi_private = kzalloc(sizeof(struct fsl_ssi_private), GFP_KERNEL);
+ if (!ssi_private) {
+ dev_err(ssi_info->dev, "could not allocate DAI object\n");
+ return NULL;
+ }
+ memcpy(&ssi_private->cpu_dai, &fsl_ssi_dai_template,
+ sizeof(struct snd_soc_cpu_dai));
+
+ fsl_ssi_dai = &ssi_private->cpu_dai;
+ dev_attr = &ssi_private->dev_attr;
+
+ sprintf(ssi_private->name, "ssi%u", (u8) ssi_info->id);
+ ssi_private->ssi = ssi_info->ssi;
+ ssi_private->ssi_phys = ssi_info->ssi_phys;
+ ssi_private->irq = ssi_info->irq;
+ ssi_private->dev = ssi_info->dev;
+
+ ssi_private->dev->driver_data = fsl_ssi_dai;
+
+ /* Initialize the the device_attribute structure */
+ dev_attr->attr.name = "ssi-stats";
+ dev_attr->attr.mode = S_IRUGO;
+ dev_attr->show = fsl_sysfs_ssi_show;
+
+ ret = device_create_file(ssi_private->dev, dev_attr);
+ if (ret) {
+ dev_err(ssi_info->dev, "could not create sysfs %s file\n",
+ ssi_private->dev_attr.attr.name);
+ kfree(fsl_ssi_dai);
+ return NULL;
+ }
+
+ fsl_ssi_dai->private_data = ssi_private;
+ fsl_ssi_dai->name = ssi_private->name;
+ fsl_ssi_dai->id = ssi_info->id;
+
+ return fsl_ssi_dai;
+}
+EXPORT_SYMBOL_GPL(fsl_ssi_create_dai);
+
+void fsl_ssi_destroy_dai(struct snd_soc_cpu_dai *fsl_ssi_dai)
+{
+ struct fsl_ssi_private *ssi_private =
+ container_of(fsl_ssi_dai, struct fsl_ssi_private, cpu_dai);
+
+ device_remove_file(ssi_private->dev, &ssi_private->dev_attr);
+
+ kfree(ssi_private);
+}
+EXPORT_SYMBOL_GPL(fsl_ssi_destroy_dai);
+
+MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
+MODULE_DESCRIPTION("Freescale Synchronous Serial Interface (SSI) ASoC Driver");
+MODULE_LICENSE("GPL");
diff --git a/sound/soc/fsl/fsl_ssi.h b/sound/soc/fsl/fsl_ssi.h
new file mode 100644
index 0000000..f6e33af
--- /dev/null
+++ b/sound/soc/fsl/fsl_ssi.h
@@ -0,0 +1,224 @@
+/*
+ * fsl_ssi.h - ALSA SSI interface for the Freescale MPC8610 SoC
+ *
+ * Author: Timur Tabi <timur@freescale.com>
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#ifndef _MPC8610_I2S_H
+#define _MPC8610_I2S_H
+
+/* SSI Register Map */
+struct ccsr_ssi {
+ __be32 stx0; /* 0x.0000 - SSI Transmit Data Register 0 */
+ __be32 stx1; /* 0x.0004 - SSI Transmit Data Register 1 */
+ __be32 srx0; /* 0x.0008 - SSI Receive Data Register 0 */
+ __be32 srx1; /* 0x.000C - SSI Receive Data Register 1 */
+ __be32 scr; /* 0x.0010 - SSI Control Register */
+ __be32 sisr; /* 0x.0014 - SSI Interrupt Status Register Mixed */
+ __be32 sier; /* 0x.0018 - SSI Interrupt Enable Register */
+ __be32 stcr; /* 0x.001C - SSI Transmit Configuration Register */
+ __be32 srcr; /* 0x.0020 - SSI Receive Configuration Register */
+ __be32 stccr; /* 0x.0024 - SSI Transmit Clock Control Register */
+ __be32 srccr; /* 0x.0028 - SSI Receive Clock Control Register */
+ __be32 sfcsr; /* 0x.002C - SSI FIFO Control/Status Register */
+ __be32 str; /* 0x.0030 - SSI Test Register */
+ __be32 sor; /* 0x.0034 - SSI Option Register */
+ __be32 sacnt; /* 0x.0038 - SSI AC97 Control Register */
+ __be32 sacadd; /* 0x.003C - SSI AC97 Command Address Register */
+ __be32 sacdat; /* 0x.0040 - SSI AC97 Command Data Register */
+ __be32 satag; /* 0x.0044 - SSI AC97 Tag Register */
+ __be32 stmsk; /* 0x.0048 - SSI Transmit Time Slot Mask Register */
+ __be32 srmsk; /* 0x.004C - SSI Receive Time Slot Mask Register */
+ __be32 saccst; /* 0x.0050 - SSI AC97 Channel Status Register */
+ __be32 saccen; /* 0x.0054 - SSI AC97 Channel Enable Register */
+ __be32 saccdis; /* 0x.0058 - SSI AC97 Channel Disable Register */
+};
+
+#define CCSR_SSI_SCR_RFR_CLK_DIS 0x00000800
+#define CCSR_SSI_SCR_TFR_CLK_DIS 0x00000400
+#define CCSR_SSI_SCR_TCH_EN 0x00000100
+#define CCSR_SSI_SCR_SYS_CLK_EN 0x00000080
+#define CCSR_SSI_SCR_I2S_MODE_MASK 0x00000060
+#define CCSR_SSI_SCR_I2S_MODE_NORMAL 0x00000000
+#define CCSR_SSI_SCR_I2S_MODE_MASTER 0x00000020
+#define CCSR_SSI_SCR_I2S_MODE_SLAVE 0x00000040
+#define CCSR_SSI_SCR_SYN 0x00000010
+#define CCSR_SSI_SCR_NET 0x00000008
+#define CCSR_SSI_SCR_RE 0x00000004
+#define CCSR_SSI_SCR_TE 0x00000002
+#define CCSR_SSI_SCR_SSIEN 0x00000001
+
+#define CCSR_SSI_SISR_RFRC 0x01000000
+#define CCSR_SSI_SISR_TFRC 0x00800000
+#define CCSR_SSI_SISR_CMDAU 0x00040000
+#define CCSR_SSI_SISR_CMDDU 0x00020000
+#define CCSR_SSI_SISR_RXT 0x00010000
+#define CCSR_SSI_SISR_RDR1 0x00008000
+#define CCSR_SSI_SISR_RDR0 0x00004000
+#define CCSR_SSI_SISR_TDE1 0x00002000
+#define CCSR_SSI_SISR_TDE0 0x00001000
+#define CCSR_SSI_SISR_ROE1 0x00000800
+#define CCSR_SSI_SISR_ROE0 0x00000400
+#define CCSR_SSI_SISR_TUE1 0x00000200
+#define CCSR_SSI_SISR_TUE0 0x00000100
+#define CCSR_SSI_SISR_TFS 0x00000080
+#define CCSR_SSI_SISR_RFS 0x00000040
+#define CCSR_SSI_SISR_TLS 0x00000020
+#define CCSR_SSI_SISR_RLS 0x00000010
+#define CCSR_SSI_SISR_RFF1 0x00000008
+#define CCSR_SSI_SISR_RFF0 0x00000004
+#define CCSR_SSI_SISR_TFE1 0x00000002
+#define CCSR_SSI_SISR_TFE0 0x00000001
+
+#define CCSR_SSI_SIER_RFRC_EN 0x01000000
+#define CCSR_SSI_SIER_TFRC_EN 0x00800000
+#define CCSR_SSI_SIER_RDMAE 0x00400000
+#define CCSR_SSI_SIER_RIE 0x00200000
+#define CCSR_SSI_SIER_TDMAE 0x00100000
+#define CCSR_SSI_SIER_TIE 0x00080000
+#define CCSR_SSI_SIER_CMDAU_EN 0x00040000
+#define CCSR_SSI_SIER_CMDDU_EN 0x00020000
+#define CCSR_SSI_SIER_RXT_EN 0x00010000
+#define CCSR_SSI_SIER_RDR1_EN 0x00008000
+#define CCSR_SSI_SIER_RDR0_EN 0x00004000
+#define CCSR_SSI_SIER_TDE1_EN 0x00002000
+#define CCSR_SSI_SIER_TDE0_EN 0x00001000
+#define CCSR_SSI_SIER_ROE1_EN 0x00000800
+#define CCSR_SSI_SIER_ROE0_EN 0x00000400
+#define CCSR_SSI_SIER_TUE1_EN 0x00000200
+#define CCSR_SSI_SIER_TUE0_EN 0x00000100
+#define CCSR_SSI_SIER_TFS_EN 0x00000080
+#define CCSR_SSI_SIER_RFS_EN 0x00000040
+#define CCSR_SSI_SIER_TLS_EN 0x00000020
+#define CCSR_SSI_SIER_RLS_EN 0x00000010
+#define CCSR_SSI_SIER_RFF1_EN 0x00000008
+#define CCSR_SSI_SIER_RFF0_EN 0x00000004
+#define CCSR_SSI_SIER_TFE1_EN 0x00000002
+#define CCSR_SSI_SIER_TFE0_EN 0x00000001
+
+#define CCSR_SSI_STCR_TXBIT0 0x00000200
+#define CCSR_SSI_STCR_TFEN1 0x00000100
+#define CCSR_SSI_STCR_TFEN0 0x00000080
+#define CCSR_SSI_STCR_TFDIR 0x00000040
+#define CCSR_SSI_STCR_TXDIR 0x00000020
+#define CCSR_SSI_STCR_TSHFD 0x00000010
+#define CCSR_SSI_STCR_TSCKP 0x00000008
+#define CCSR_SSI_STCR_TFSI 0x00000004
+#define CCSR_SSI_STCR_TFSL 0x00000002
+#define CCSR_SSI_STCR_TEFS 0x00000001
+
+#define CCSR_SSI_SRCR_RXEXT 0x00000400
+#define CCSR_SSI_SRCR_RXBIT0 0x00000200
+#define CCSR_SSI_SRCR_RFEN1 0x00000100
+#define CCSR_SSI_SRCR_RFEN0 0x00000080
+#define CCSR_SSI_SRCR_RFDIR 0x00000040
+#define CCSR_SSI_SRCR_RXDIR 0x00000020
+#define CCSR_SSI_SRCR_RSHFD 0x00000010
+#define CCSR_SSI_SRCR_RSCKP 0x00000008
+#define CCSR_SSI_SRCR_RFSI 0x00000004
+#define CCSR_SSI_SRCR_RFSL 0x00000002
+#define CCSR_SSI_SRCR_REFS 0x00000001
+
+/* STCCR and SRCCR */
+#define CCSR_SSI_SxCCR_DIV2 0x00040000
+#define CCSR_SSI_SxCCR_PSR 0x00020000
+#define CCSR_SSI_SxCCR_WL_SHIFT 13
+#define CCSR_SSI_SxCCR_WL_MASK 0x0001E000
+#define CCSR_SSI_SxCCR_WL(x) \
+ (((((x) / 2) - 1) << CCSR_SSI_SxCCR_WL_SHIFT) & CCSR_SSI_SxCCR_WL_MASK)
+#define CCSR_SSI_SxCCR_DC_SHIFT 8
+#define CCSR_SSI_SxCCR_DC_MASK 0x00001F00
+#define CCSR_SSI_SxCCR_DC(x) \
+ ((((x) - 1) << CCSR_SSI_SxCCR_DC_SHIFT) & CCSR_SSI_SxCCR_DC_MASK)
+#define CCSR_SSI_SxCCR_PM_SHIFT 0
+#define CCSR_SSI_SxCCR_PM_MASK 0x000000FF
+#define CCSR_SSI_SxCCR_PM(x) \
+ ((((x) - 1) << CCSR_SSI_SxCCR_PM_SHIFT) & CCSR_SSI_SxCCR_PM_MASK)
+
+/*
+ * The xFCNT bits are read-only, and the xFWM bits are read/write. Use the
+ * CCSR_SSI_SFCSR_xFCNTy() macros to read the FIFO counters, and use the
+ * CCSR_SSI_SFCSR_xFWMy() macros to set the watermarks.
+ */
+#define CCSR_SSI_SFCSR_RFCNT1_SHIFT 28
+#define CCSR_SSI_SFCSR_RFCNT1_MASK 0xF0000000
+#define CCSR_SSI_SFCSR_RFCNT1(x) \
+ (((x) & CCSR_SSI_SFCSR_RFCNT1_MASK) >> CCSR_SSI_SFCSR_RFCNT1_SHIFT)
+#define CCSR_SSI_SFCSR_TFCNT1_SHIFT 24
+#define CCSR_SSI_SFCSR_TFCNT1_MASK 0x0F000000
+#define CCSR_SSI_SFCSR_TFCNT1(x) \
+ (((x) & CCSR_SSI_SFCSR_TFCNT1_MASK) >> CCSR_SSI_SFCSR_TFCNT1_SHIFT)
+#define CCSR_SSI_SFCSR_RFWM1_SHIFT 20
+#define CCSR_SSI_SFCSR_RFWM1_MASK 0x00F00000
+#define CCSR_SSI_SFCSR_RFWM1(x) \
+ (((x) << CCSR_SSI_SFCSR_RFWM1_SHIFT) & CCSR_SSI_SFCSR_RFWM1_MASK)
+#define CCSR_SSI_SFCSR_TFWM1_SHIFT 16
+#define CCSR_SSI_SFCSR_TFWM1_MASK 0x000F0000
+#define CCSR_SSI_SFCSR_TFWM1(x) \
+ (((x) << CCSR_SSI_SFCSR_TFWM1_SHIFT) & CCSR_SSI_SFCSR_TFWM1_MASK)
+#define CCSR_SSI_SFCSR_RFCNT0_SHIFT 12
+#define CCSR_SSI_SFCSR_RFCNT0_MASK 0x0000F000
+#define CCSR_SSI_SFCSR_RFCNT0(x) \
+ (((x) & CCSR_SSI_SFCSR_RFCNT0_MASK) >> CCSR_SSI_SFCSR_RFCNT0_SHIFT)
+#define CCSR_SSI_SFCSR_TFCNT0_SHIFT 8
+#define CCSR_SSI_SFCSR_TFCNT0_MASK 0x00000F00
+#define CCSR_SSI_SFCSR_TFCNT0(x) \
+ (((x) & CCSR_SSI_SFCSR_TFCNT0_MASK) >> CCSR_SSI_SFCSR_TFCNT0_SHIFT)
+#define CCSR_SSI_SFCSR_RFWM0_SHIFT 4
+#define CCSR_SSI_SFCSR_RFWM0_MASK 0x000000F0
+#define CCSR_SSI_SFCSR_RFWM0(x) \
+ (((x) << CCSR_SSI_SFCSR_RFWM0_SHIFT) & CCSR_SSI_SFCSR_RFWM0_MASK)
+#define CCSR_SSI_SFCSR_TFWM0_SHIFT 0
+#define CCSR_SSI_SFCSR_TFWM0_MASK 0x0000000F
+#define CCSR_SSI_SFCSR_TFWM0(x) \
+ (((x) << CCSR_SSI_SFCSR_TFWM0_SHIFT) & CCSR_SSI_SFCSR_TFWM0_MASK)
+
+#define CCSR_SSI_STR_TEST 0x00008000
+#define CCSR_SSI_STR_RCK2TCK 0x00004000
+#define CCSR_SSI_STR_RFS2TFS 0x00002000
+#define CCSR_SSI_STR_RXSTATE(x) (((x) >> 8) & 0x1F)
+#define CCSR_SSI_STR_TXD2RXD 0x00000080
+#define CCSR_SSI_STR_TCK2RCK 0x00000040
+#define CCSR_SSI_STR_TFS2RFS 0x00000020
+#define CCSR_SSI_STR_TXSTATE(x) ((x) & 0x1F)
+
+#define CCSR_SSI_SOR_CLKOFF 0x00000040
+#define CCSR_SSI_SOR_RX_CLR 0x00000020
+#define CCSR_SSI_SOR_TX_CLR 0x00000010
+#define CCSR_SSI_SOR_INIT 0x00000008
+#define CCSR_SSI_SOR_WAIT_SHIFT 1
+#define CCSR_SSI_SOR_WAIT_MASK 0x00000006
+#define CCSR_SSI_SOR_WAIT(x) (((x) & 3) << CCSR_SSI_SOR_WAIT_SHIFT)
+#define CCSR_SSI_SOR_SYNRST 0x00000001
+
+/* Instantiation data for an SSI interface
+ *
+ * This structure contains all the information that the the SSI driver needs
+ * to instantiate an SSI interface with ALSA. The machine driver should
+ * create this structure, fill it in, call fsl_ssi_create_dai(), and then
+ * delete the structure.
+ *
+ * id: which SSI this is (0, 1, etc. )
+ * ssi: pointer to the SSI's registers
+ * ssi_phys: physical address of the SSI registers
+ * irq: IRQ of this SSI
+ * dev: struct device, used to create the sysfs statistics file
+*/
+struct fsl_ssi_info {
+ unsigned int id;
+ struct ccsr_ssi __iomem *ssi;
+ dma_addr_t ssi_phys;
+ unsigned int irq;
+ struct device *dev;
+};
+
+struct snd_soc_cpu_dai *fsl_ssi_create_dai(struct fsl_ssi_info *ssi_info);
+void fsl_ssi_destroy_dai(struct snd_soc_cpu_dai *fsl_ssi_dai);
+
+#endif
+
diff --git a/sound/soc/fsl/mpc8610_hpcd.c b/sound/soc/fsl/mpc8610_hpcd.c
new file mode 100644
index 0000000..5421a5c
--- /dev/null
+++ b/sound/soc/fsl/mpc8610_hpcd.c
@@ -0,0 +1,621 @@
+/**
+ * Freescale MPC8610HPCD ALSA SoC Fabric driver
+ *
+ * Author: Timur Tabi <timur@freescale.com>
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/version.h>
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <asm/of_device.h>
+#include <asm/of_platform.h>
+#include <sound/driver.h>
+#include <sound/core.h>
+#include <sound/pcm.h>
+#include <sound/soc.h>
+#include <sound/initval.h>
+#include <asm/immap_86xx.h>
+
+#include "../codecs/cs4270.h"
+#include "fsl_dma.h"
+#include "fsl_ssi.h"
+
+/*
+ * Fabric-specific ASoC device data
+ *
+ * This structure contains data for a single sound platform device on an
+ * MPC8610 HPCD. Some of the data is taken from the device tree.
+ */
+struct mpc8610hpcd_data {
+ struct snd_soc_device sound_devdata;
+ struct snd_soc_dai_link dai;
+ struct snd_soc_machine machine;
+ unsigned int dai_format;
+ unsigned int codec_clk_direction;
+ unsigned int cpu_clk_direction;
+ unsigned int clk_frequency;
+ struct ccsr_guts __iomem *guts;
+ struct ccsr_ssi __iomem *ssi;
+ unsigned int ssi_id; /* 0 = SSI1, 1 = SSI2, etc */
+ unsigned int ssi_irq;
+ unsigned int dma_id; /* 0 = DMA1, 1 = DMA2, etc */
+ unsigned int dma_irq[2];
+ struct ccsr_dma_channel __iomem *dma[2];
+ unsigned int dma_channel_id[2]; /* 0 = ch 0, 1 = ch 1, etc*/
+};
+
+/*
+ * Initalize the board
+ *
+ * This function is called when platform_device_add() is called. It is used
+ * to initialize the board-specific hardware.
+ *
+ * Here we program the DMACR and PMUXCR registers.
+ */
+int mpc8610_hpcd_machine_probe(struct platform_device *sound_device)
+{
+ struct mpc8610hpcd_data *machine_data = sound_device->dev.platform_data;
+
+ /* Program the signal routing between the SSI and the DMA */
+ guts_set_dmacr(machine_data->guts, machine_data->dma_id + 1,
+ machine_data->dma_channel_id[0], CCSR_GUTS_DMACR_DEV_SSI);
+ guts_set_dmacr(machine_data->guts, machine_data->dma_id + 1,
+ machine_data->dma_channel_id[1], CCSR_GUTS_DMACR_DEV_SSI);
+
+ guts_set_pmuxcr_dma(machine_data->guts, machine_data->dma_id,
+ machine_data->dma_channel_id[0], 0);
+ guts_set_pmuxcr_dma(machine_data->guts, machine_data->dma_id,
+ machine_data->dma_channel_id[1], 0);
+
+ guts_set_pmuxcr_dma(machine_data->guts, 1, 0, 0);
+ guts_set_pmuxcr_dma(machine_data->guts, 1, 3, 0);
+ guts_set_pmuxcr_dma(machine_data->guts, 0, 3, 0);
+
+ switch (machine_data->ssi_id) {
+ case 0:
+ clrsetbits_be32(&machine_data->guts->pmuxcr,
+ CCSR_GUTS_PMUXCR_SSI1_MASK, CCSR_GUTS_PMUXCR_SSI1_SSI);
+ break;
+ case 1:
+ clrsetbits_be32(&machine_data->guts->pmuxcr,
+ CCSR_GUTS_PMUXCR_SSI2_MASK, CCSR_GUTS_PMUXCR_SSI2_SSI);
+ break;
+ }
+
+ return 0;
+}
+
+/*
+ * Program the board based on various hardware parameters
+ */
+static int mpc8610hpcd_startup(struct snd_pcm_substream *substream)
+{
+ struct snd_soc_pcm_runtime *rtd = substream->private_data;
+ struct snd_soc_codec_dai *codec_dai = rtd->dai->codec_dai;
+ struct snd_soc_cpu_dai *cpu_dai = rtd->dai->cpu_dai;
+ struct mpc8610hpcd_data *machine_data = rtd->socdev->dev->platform_data;
+ int ret = 0;
+
+ /* Tell the CPU driver what the serial protocol is. */
+ if (cpu_dai->dai_ops.set_fmt) {
+ ret = cpu_dai->dai_ops.set_fmt(cpu_dai,
+ machine_data->dai_format);
+ if (ret < 0) {
+ dev_err(substream->pcm->card->dev,
+ "could not set CPU driver audio format\n");
+ return ret;
+ }
+ }
+
+ /* Tell the codec driver what the serial protocol is. */
+ if (codec_dai->dai_ops.set_fmt) {
+ ret = codec_dai->dai_ops.set_fmt(codec_dai,
+ machine_data->dai_format);
+ if (ret < 0) {
+ dev_err(substream->pcm->card->dev,
+ "could not set codec driver audio format\n");
+ return ret;
+ }
+ }
+
+ /*
+ * Tell the CPU driver what the clock frequency is, and whether it's a
+ * slave or master.
+ */
+ if (cpu_dai->dai_ops.set_sysclk) {
+ ret = cpu_dai->dai_ops.set_sysclk(cpu_dai, 0,
+ machine_data->clk_frequency,
+ machine_data->cpu_clk_direction);
+ if (ret < 0) {
+ dev_err(substream->pcm->card->dev,
+ "could not set CPU driver clock parameters\n");
+ return ret;
+ }
+ }
+
+ /*
+ * Tell the codec driver what the MCLK frequency is, and whether it's
+ * a slave or master.
+ */
+ if (codec_dai->dai_ops.set_sysclk) {
+ ret = codec_dai->dai_ops.set_sysclk(codec_dai, 0,
+ machine_data->clk_frequency,
+ machine_data->codec_clk_direction);
+ if (ret < 0) {
+ dev_err(substream->pcm->card->dev,
+ "could not set codec driver clock params\n");
+ return ret;
+ }
+ }
+
+ return 0;
+}
+
+/*
+ * Remove the sound device
+ *
+ * This function is called to remove the sound device for one SSI. We
+ * de-program the DMACR and PMUXCR register.
+ */
+int mpc8610_hpcd_machine_remove(struct platform_device *sound_device)
+{
+ struct mpc8610hpcd_data *machine_data = sound_device->dev.platform_data;
+
+ /* Restore the signal routing */
+
+ guts_set_dmacr(machine_data->guts, machine_data->dma_id + 1,
+ machine_data->dma_channel_id[0], 0);
+ guts_set_dmacr(machine_data->guts, machine_data->dma_id + 1,
+ machine_data->dma_channel_id[1], 0);
+
+ switch (machine_data->ssi_id) {
+ case 0:
+ clrsetbits_be32(&machine_data->guts->pmuxcr,
+ CCSR_GUTS_PMUXCR_SSI1_MASK, CCSR_GUTS_PMUXCR_SSI1_LA);
+ break;
+ case 1:
+ clrsetbits_be32(&machine_data->guts->pmuxcr,
+ CCSR_GUTS_PMUXCR_SSI2_MASK, CCSR_GUTS_PMUXCR_SSI1_LA);
+ break;
+ }
+
+ return 0;
+}
+
+/*
+ * ASoC fabric driver operations
+ */
+static struct snd_soc_ops mpc8610hpcd_ops = {
+ .startup = mpc8610hpcd_startup,
+};
+
+/*
+ * ASoC machine
+ */
+static struct snd_soc_machine mpc8610_hpcd_machine = {
+ .probe = mpc8610_hpcd_machine_probe,
+ .remove = mpc8610_hpcd_machine_remove,
+ .name = "MPC8610 HPCD",
+ .num_links = 1,
+};
+
+/*
+ * Probe function for the fabric driver driver.
+ *
+ * This function gets called when an SSI node is found in the device tree.
+ *
+ * Although this is a fabric driver, the SSI node is the "master" node with
+ * respect to audio hardware connections. Therefore, we create a new ASoC
+ * device for each new SSI node that has a codec attached.
+ *
+ * FIXME: Currently, we only support one DMA controller, so if there are
+ * multiple SSI nodes with codecs, only the first will be supported.
+ *
+ * FIXME: Even if we did support multiple DMA controllers, we have no
+ * mechanism for assigning DMA controllers and channels to the individual
+ * SSI devices. We also probably aren't compatible with the generic Elo DMA
+ * device driver.
+ */
+static int mpc8610_hpcd_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct device_node *np = ofdev->node;
+ struct device_node *codec_np = NULL;
+ struct device_node *guts_np = NULL;
+ struct device_node *dma_np = NULL;
+ struct device_node *dma_channel_np = NULL;
+ const char *sprop;
+ const u32 *iprop;
+ struct resource res;
+ struct platform_device *sound_device = NULL;
+ struct mpc8610hpcd_data *machine_data;
+ struct fsl_ssi_info ssi_info;
+ struct fsl_dma_info dma_info;
+ int ret = -ENODEV;
+
+ machine_data = kzalloc(sizeof(struct mpc8610hpcd_data), GFP_KERNEL);
+ if (!machine_data)
+ return -ENOMEM;
+
+ memset(&ssi_info, 0, sizeof(ssi_info));
+ memset(&dma_info, 0, sizeof(dma_info));
+
+ ssi_info.dev = &ofdev->dev;
+
+ /*
+ * We are only interested in SSIs with a codec child node in them, so
+ * let's make sure this SSI has one.
+ */
+ while ((codec_np = of_get_next_child(np, codec_np)) != NULL) {
+ if (strcmp(codec_np->name, "codec") == 0) {
+ /* Most drivers forget the final of_node_put() call */
+ of_node_put(codec_np);
+ break;
+ }
+ }
+
+ if (!codec_np)
+ goto error;
+
+ /* The MPC8610 HPCD only knows about the CS4270 codec, so reject
+ anything else. */
+ if (!of_device_is_compatible(codec_np, "cirrus,cs4270"))
+ goto error;
+
+ /* Get the device ID */
+ iprop = of_get_property(np, "cell-index", NULL);
+ if (!iprop) {
+ dev_err(&ofdev->dev, "cell-index property not found\n");
+ ret = -EINVAL;
+ goto error;
+ }
+ machine_data->ssi_id = *iprop;
+ ssi_info.id = *iprop;
+
+ /* Get the serial format and clock direction. */
+ sprop = of_get_property(np, "fsl,mode", NULL);
+ if (!sprop) {
+ dev_err(&ofdev->dev, "fsl,mode property not found\n");
+ ret = -EINVAL;
+ goto error;
+ }
+
+ if (strcasecmp(sprop, "i2s-slave") == 0) {
+ machine_data->dai_format = SND_SOC_DAIFMT_I2S;
+ machine_data->codec_clk_direction = SND_SOC_CLOCK_OUT;
+ machine_data->cpu_clk_direction = SND_SOC_CLOCK_IN;
+
+ /* In i2s-slave mode, the codec has its own clock source, so
+ we need to get the frequency from the device tree and pass
+ it to the codec driver. */
+ iprop = of_get_property(codec_np, "bus-frequency", NULL);
+ if (!iprop || !*iprop) {
+ dev_err(&ofdev->dev, "codec bus-frequency property "
+ "is missing or invalid\n");
+ ret = -EINVAL;
+ goto error;
+ }
+ machine_data->clk_frequency = *iprop;
+ } else if (strcasecmp(sprop, "i2s-master") == 0) {
+ machine_data->dai_format = SND_SOC_DAIFMT_I2S;
+ machine_data->codec_clk_direction = SND_SOC_CLOCK_IN;
+ machine_data->cpu_clk_direction = SND_SOC_CLOCK_OUT;
+ } else if (strcasecmp(sprop, "lj-slave") == 0) {
+ machine_data->dai_format = SND_SOC_DAIFMT_LEFT_J;
+ machine_data->codec_clk_direction = SND_SOC_CLOCK_OUT;
+ machine_data->cpu_clk_direction = SND_SOC_CLOCK_IN;
+ } else if (strcasecmp(sprop, "lj-master") == 0) {
+ machine_data->dai_format = SND_SOC_DAIFMT_LEFT_J;
+ machine_data->codec_clk_direction = SND_SOC_CLOCK_IN;
+ machine_data->cpu_clk_direction = SND_SOC_CLOCK_OUT;
+ } else if (strcasecmp(sprop, "rj-master") == 0) {
+ machine_data->dai_format = SND_SOC_DAIFMT_RIGHT_J;
+ machine_data->codec_clk_direction = SND_SOC_CLOCK_OUT;
+ machine_data->cpu_clk_direction = SND_SOC_CLOCK_IN;
+ } else if (strcasecmp(sprop, "rj-master") == 0) {
+ machine_data->dai_format = SND_SOC_DAIFMT_RIGHT_J;
+ machine_data->codec_clk_direction = SND_SOC_CLOCK_IN;
+ machine_data->cpu_clk_direction = SND_SOC_CLOCK_OUT;
+ } else if (strcasecmp(sprop, "ac97-slave") == 0) {
+ machine_data->dai_format = SND_SOC_DAIFMT_AC97;
+ machine_data->codec_clk_direction = SND_SOC_CLOCK_OUT;
+ machine_data->cpu_clk_direction = SND_SOC_CLOCK_IN;
+ } else if (strcasecmp(sprop, "ac97-master") == 0) {
+ machine_data->dai_format = SND_SOC_DAIFMT_AC97;
+ machine_data->codec_clk_direction = SND_SOC_CLOCK_IN;
+ machine_data->cpu_clk_direction = SND_SOC_CLOCK_OUT;
+ } else {
+ dev_err(&ofdev->dev,
+ "unrecognized fsl,mode property \"%s\"\n", sprop);
+ ret = -EINVAL;
+ goto error;
+ }
+
+ if (!machine_data->clk_frequency) {
+ dev_err(&ofdev->dev, "unknown clock frequency\n");
+ ret = -EINVAL;
+ goto error;
+ }
+
+ /* Read the SSI information from the device tree */
+ ret = of_address_to_resource(np, 0, &res);
+ if (ret) {
+ dev_err(&ofdev->dev, "could not obtain SSI address\n");
+ goto error;
+ }
+ if (!res.start) {
+ dev_err(&ofdev->dev, "invalid SSI address\n");
+ goto error;
+ }
+ ssi_info.ssi_phys = res.start;
+
+ machine_data->ssi = ioremap(ssi_info.ssi_phys, sizeof(struct ccsr_ssi));
+ if (!machine_data->ssi) {
+ dev_err(&ofdev->dev, "could not map SSI address %x\n",
+ ssi_info.ssi_phys);
+ ret = -EINVAL;
+ goto error;
+ }
+ ssi_info.ssi = machine_data->ssi;
+
+
+ /* Get the IRQ of the SSI */
+ machine_data->ssi_irq = irq_of_parse_and_map(np, 0);
+ if (!machine_data->ssi_irq) {
+ dev_err(&ofdev->dev, "could not get SSI IRQ\n");
+ ret = -EINVAL;
+ goto error;
+ }
+ ssi_info.irq = machine_data->ssi_irq;
+
+
+ /* Map the global utilities registers. */
+ guts_np = of_find_compatible_node(NULL, NULL, "fsl,mpc8610-guts");
+ if (!guts_np) {
+ dev_err(&ofdev->dev, "could not obtain address of GUTS\n");
+ ret = -EINVAL;
+ goto error;
+ }
+ machine_data->guts = of_iomap(guts_np, 0);
+ of_node_put(guts_np);
+ if (!machine_data->guts) {
+ dev_err(&ofdev->dev, "could not map GUTS\n");
+ ret = -EINVAL;
+ goto error;
+ }
+
+ /* Find the DMA channels to use. For now, we always use the first DMA
+ controller. */
+ for_each_compatible_node(dma_np, NULL, "fsl,mpc8610-dma") {
+ iprop = of_get_property(dma_np, "cell-index", NULL);
+ if (iprop && (*iprop == 0)) {
+ of_node_put(dma_np);
+ break;
+ }
+ }
+ if (!dma_np) {
+ dev_err(&ofdev->dev, "could not find DMA node\n");
+ ret = -EINVAL;
+ goto error;
+ }
+ machine_data->dma_id = *iprop;
+
+ /*
+ * Find the DMA channels to use. For now, we always use DMA channel 0
+ * for playback, and DMA channel 1 for capture.
+ */
+ while ((dma_channel_np = of_get_next_child(dma_np, dma_channel_np))) {
+ iprop = of_get_property(dma_channel_np, "cell-index", NULL);
+ /* Is it DMA channel 0? */
+ if (iprop && (*iprop == 0)) {
+ /* dma_channel[0] and dma_irq[0] are for playback */
+ dma_info.dma_channel[0] = of_iomap(dma_channel_np, 0);
+ dma_info.dma_irq[0] =
+ irq_of_parse_and_map(dma_channel_np, 0);
+ machine_data->dma_channel_id[0] = *iprop;
+ continue;
+ }
+ if (iprop && (*iprop == 1)) {
+ /* dma_channel[1] and dma_irq[1] are for capture */
+ dma_info.dma_channel[1] = of_iomap(dma_channel_np, 0);
+ dma_info.dma_irq[1] =
+ irq_of_parse_and_map(dma_channel_np, 0);
+ machine_data->dma_channel_id[1] = *iprop;
+ continue;
+ }
+ }
+ if (!dma_info.dma_channel[0] || !dma_info.dma_channel[1] ||
+ !dma_info.dma_irq[0] || !dma_info.dma_irq[1]) {
+ dev_err(&ofdev->dev, "could not find DMA channels\n");
+ ret = -EINVAL;
+ goto error;
+ }
+
+ dma_info.ssi_stx_phys = ssi_info.ssi_phys +
+ offsetof(struct ccsr_ssi, stx0);
+ dma_info.ssi_srx_phys = ssi_info.ssi_phys +
+ offsetof(struct ccsr_ssi, srx0);
+
+ /* We have the DMA information, so tell the DMA driver what it is */
+ if (!fsl_dma_configure(&dma_info)) {
+ dev_err(&ofdev->dev, "could not instantiate DMA device\n");
+ ret = -EBUSY;
+ goto error;
+ }
+
+ /*
+ * Initialize our DAI data structure. We should probably get this
+ * information from the device tree.
+ */
+ machine_data->dai.name = "CS4270";
+ machine_data->dai.stream_name = "CS4270";
+
+ machine_data->dai.cpu_dai = fsl_ssi_create_dai(&ssi_info);
+ machine_data->dai.codec_dai = &cs4270_dai; /* The codec_dai we want */
+ machine_data->dai.ops = &mpc8610hpcd_ops;
+
+ mpc8610_hpcd_machine.dai_link = &machine_data->dai;
+
+ /* Allocate a new audio platform device structure */
+ sound_device = platform_device_alloc("soc-audio", -1);
+ if (!sound_device) {
+ dev_err(&ofdev->dev, "platform device allocation failed\n");
+ ret = -ENOMEM;
+ goto error;
+ }
+
+ machine_data->sound_devdata.machine = &mpc8610_hpcd_machine;
+ machine_data->sound_devdata.codec_dev = &soc_codec_device_cs4270;
+ machine_data->sound_devdata.platform = &fsl_soc_platform;
+
+ sound_device->dev.platform_data = machine_data;
+
+
+ /* Set the platform device and ASoC device to point to each other */
+ platform_set_drvdata(sound_device, &machine_data->sound_devdata);
+
+ machine_data->sound_devdata.dev = &sound_device->dev;
+
+
+ /* Tell ASoC to probe us. This will call mpc8610_hpcd_machine.probe(),
+ if it exists. */
+ ret = platform_device_add(sound_device);
+
+ if (ret) {
+ dev_err(&ofdev->dev, "platform device add failed\n");
+ goto error;
+ }
+
+ dev_set_drvdata(&ofdev->dev, sound_device);
+
+ return 0;
+
+error:
+ if (sound_device)
+ platform_device_unregister(sound_device);
+
+ if (machine_data->dai.cpu_dai)
+ fsl_ssi_destroy_dai(machine_data->dai.cpu_dai);
+
+ if (ssi_info.ssi)
+ iounmap(ssi_info.ssi);
+
+ if (ssi_info.irq)
+ irq_dispose_mapping(ssi_info.irq);
+
+ if (dma_info.dma_channel[0])
+ iounmap(dma_info.dma_channel[0]);
+
+ if (dma_info.dma_channel[1])
+ iounmap(dma_info.dma_channel[1]);
+
+ if (dma_info.dma_irq[0])
+ irq_dispose_mapping(dma_info.dma_irq[0]);
+
+ if (dma_info.dma_irq[1])
+ irq_dispose_mapping(dma_info.dma_irq[1]);
+
+ if (machine_data->guts)
+ iounmap(machine_data->guts);
+
+ kfree(machine_data);
+
+ return ret;
+}
+
+static int mpc8610_hpcd_remove(struct of_device *ofdev)
+{
+ struct platform_device *sound_device = dev_get_drvdata(&ofdev->dev);
+ struct mpc8610hpcd_data *machine_data = sound_device->dev.platform_data;
+
+ platform_device_unregister(sound_device);
+
+ if (machine_data->dai.cpu_dai)
+ fsl_ssi_destroy_dai(machine_data->dai.cpu_dai);
+
+ if (machine_data->ssi)
+ iounmap(machine_data->ssi);
+
+ if (machine_data->dma[0])
+ iounmap(machine_data->dma[0]);
+
+ if (machine_data->dma[1])
+ iounmap(machine_data->dma[1]);
+
+ if (machine_data->dma_irq[0])
+ irq_dispose_mapping(machine_data->dma_irq[0]);
+
+ if (machine_data->dma_irq[1])
+ irq_dispose_mapping(machine_data->dma_irq[1]);
+
+ if (machine_data->guts)
+ iounmap(machine_data->guts);
+
+ kfree(machine_data);
+ sound_device->dev.platform_data = NULL;
+
+ dev_set_drvdata(&ofdev->dev, NULL);
+
+ return 0;
+}
+
+static struct of_device_id mpc8610_hpcd_match[] = {
+ {
+ .compatible = "fsl,ssi",
+ },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mpc8610_hpcd_match);
+
+static struct of_platform_driver mpc8610_hpcd_of_driver = {
+ .owner = THIS_MODULE,
+ .name = "mpc8610_hpcd",
+ .match_table = mpc8610_hpcd_match,
+ .probe = mpc8610_hpcd_probe,
+ .remove = mpc8610_hpcd_remove,
+};
+
+/**
+ * Fabric driver initialization.
+ *
+ * This function is called when this module is loaded.
+ */
+static int __init mpc8610hpcd_init(void)
+{
+ int ret;
+
+ printk(KERN_INFO "Freescale MPC8610 HPCD ALSA SoC fabric driver\n");
+
+ ret = of_register_platform_driver(&mpc8610_hpcd_of_driver);
+
+ if (ret)
+ printk(KERN_ERR
+ "mpc8610-hpcd: failed to register platform driver\n");
+
+ return ret;
+}
+
+/**
+ * Fabric driver exit
+ *
+ * This function is called when this driver is unloaded.
+ */
+static void __exit mpc8610hpcd_exit(void)
+{
+ of_unregister_platform_driver(&mpc8610_hpcd_of_driver);
+}
+
+module_init(mpc8610hpcd_init);
+module_exit(mpc8610hpcd_exit);
+
+MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
+MODULE_DESCRIPTION("Freescale MPC8610 HPCD ALSA SoC fabric driver");
+MODULE_LICENSE("GPL");
--
1.5.2.4
^ permalink raw reply related
* RE: hangs after "Freeing unused kernel memory"
From: Siva Prasad @ 2007-12-20 0:19 UTC (permalink / raw)
To: Linas Vepstas; +Cc: linuxppc-dev, linuxppc-embedded
In-Reply-To: <20071119175144.GD4670@austin.ibm.com>
Hi Linas,
I found it hard way. You are correct. I am just loosing the console, and
all the programs are executing fine. I could put a printk in execve and
see all the programs executing (printk's work fine).
I am using a PowerPC based system with my own kernel and initrd (not
RedHat system). Can you please elaborate on what exactly you are
suggesting me to do. Are you trying to copy /dev/<files> from build
machine to the ramdisk? I am confused.
Further, I could not find /dev/hv* files in any of the systems. What are
they for?
You also mentioned about tweaking initrd and udev. Appreciate some help
with this console loosing.=20
Thanks in advance for your help.
- Siva
-----Original Message-----
From: Linas Vepstas [mailto:linas@austin.ibm.com]=20
Sent: Monday, November 19, 2007 9:52 AM
To: Siva Prasad
Cc: linuxppc-embedded@ozlabs.org; linuxppc-dev@ozlabs.org
Subject: Re: hangs after "Freeing unused kernel memory"
On Thu, Nov 15, 2007 at 04:00:09PM -0800, Siva Prasad wrote:
> Hi,
>=20
> This sounds like a familiar problem, but could not get answers in
posts
> that came up in google search.
>=20
> My system hangs after printing the message "Freeing unused kernel
> memory". It should execute init after that, but not sure what exactly
is
> happening. Appreciate if some one can throw few ideas to try out.
It might not be a hang, it might be simply that you loose the console.
If this is a redhat system, and you didn't tweak initrd and udev just=20
right, this can happen.
Try doing this:
mount --bind / /mnt
cp -a /dev/null /mnt/dev
cp -a /dev/console /mnt/dev
cp -a /dev/hv* /mnt/dev
umount /mnt
> Seems it is actually hanging when it makes the call "
> run_init_process(ramdisk_execute_command)" in init/main.c
Then again, your initrd might be corrupted.
--linas
^ permalink raw reply
* RE: [0/3] Add RapidIO support to powerpc architecture with memory mapping
From: Zhang Wei @ 2007-12-20 3:25 UTC (permalink / raw)
To: Randy Vinson; +Cc: linuxppc-dev
In-Reply-To: <4769A0A5.70000@mvista.com>
I've sent it... Oops, it's be blocked by big size. =20
Thanks! I'll resend it.
Cheers!
Wei
> -----Original Message-----
> From: Randy Vinson [mailto:rvinson@mvista.com]=20
> Sent: Thursday, December 20, 2007 6:52 AM
> To: Zhang Wei
> Cc: linuxppc-dev@ozlabs.org
> Subject: Re: [0/3] Add RapidIO support to powerpc=20
> architecture with memory mapping
>=20
> Zhang Wei wrote:
> > Hi,
> >=20
> > Those patches add RapidIO support to powerpc archiecture with
> > memory mapping as below:
> >=20
> > [1/3] Copy the arch/ppc RapidIO support to arch/powerpc
> > [2/3] Make the arch/powerpc RapidIO support workable with of-device
> > and add memory mapping support.
> Patch 2/3 seems to have gone missing. Was it sent?
>=20
> Randy V.
>=20
> > [3/3] Add the memory mapping support to rionet driver.
> >=20
> > Best Regards,
> > Zhang Wei
> >=20
> >=20
> > _______________________________________________
> > Linuxppc-dev mailing list
> > Linuxppc-dev@ozlabs.org
> > https://ozlabs.org/mailman/listinfo/linuxppc-dev
> >=20
>=20
>=20
^ permalink raw reply
* Re: [PATCH] pata_of_platform: Move electra-ide support over to new framework
From: Paul Mackerras @ 2007-12-20 3:53 UTC (permalink / raw)
To: Olof Johansson
Cc: linux-ide, Paul Mundt, Arnd Bergmann, Jeff Garzik, linuxppc-dev
In-Reply-To: <20071204210344.GE8099@lixom.net>
Olof Johansson writes:
> > FWIW I'm presuming this work will go via a powerpc tree not libata...
> > Generally that's not the case, but here it's largely an arch-specific work.
>
> Ok, that works. I was thinking of letting this patch go through libata,
> and do the removal through the powerpc merge path. But I can do both
> through powerpc.
Are you going to send me a patch to do this addition plus the removal
of the old stuff, or do you want me to merge this patch as is?
Paul.
^ permalink raw reply
* [PATCH 0/19] [POWERPC] PCI updates & merges
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
This serie of patches converts the 32 bits PCI code to use the generic
pci_assign_unassigned_resources() instead of its own assignment code
which was unable to deal with unassigned PCI<->PCI bridges among
other issues.
It then merges the resource fixup and allocation code between 32 and
64 bits (mostly making 64 bits use the 32 bits code with a few fixups),
hopefully fixing the longstanding issue that not setting pci_probe_only
on ppc64 would generally not work.
We also add flags to control the behaviour of the PCI code, such as
letting some platforms force a full re-assignment (similar to what
pci-auto used to provide in arch/ppc) and remove a whole bunch of
hackish code that is made obsolete by that change.
32 bits platforms with 64 bits resources support will also need my
separate patch to fix the generic setup-bus.c for that situation.
Finally, I also merge the implementations of pcibios_enable_device()
and fixup the PowerMac code that used hooks in that area in ways
that don't work anymore and cleans up a few PowerMac related bits
and pieces.
Note that this wasn't properly tested with hotplug on pSeries as I
have been unable to get it working for other reasons. If there is
a problem there, we'll attempt to fix it with additional patches.
^ permalink raw reply
* [PATCH 1/19] [POWERPC] pci32: remove bogus alignment message
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
There's a stale & bogus piece of code in 32 bits PCI code that
complains about ISA related alignment issues. Just remove it.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/kernel/pci_32.c | 6 ------
1 file changed, 6 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:01.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:27.000000000 +1100
@@ -199,12 +199,6 @@ void pcibios_align_resource(void *data,
if (res->flags & IORESOURCE_IO) {
resource_size_t start = res->start;
- if (size > 0x100) {
- printk(KERN_ERR "PCI: I/O Region %s/%d too large"
- " (%lld bytes)\n", pci_name(dev),
- dev->resource - res, (unsigned long long)size);
- }
-
if (start & 0x300) {
start = (start + 0x3ff) & ~0x3ff;
res->start = start;
^ permalink raw reply
* [PATCH 2/19] [POWERPC] pci32: use generic pci_assign_unassign_resources
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
This makes the 32 bits PowerPC PCI code use the generic code to assign
resources to devices that had unassigned or conflicting resources.
This allow to remove the local implementation that was incomplete and
could not assign for example a PCI<->PCI bridge from scratch, which is
needed on various embedded platforms.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/kernel/pci_32.c | 191 +++----------------------------------------
1 file changed, 17 insertions(+), 174 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:27.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:27.000000000 +1100
@@ -37,10 +37,6 @@ int pcibios_assign_bus_offset = 1;
void pcibios_make_OF_bus_map(void);
-static int pci_relocate_bridge_resource(struct pci_bus *bus, int i);
-static int probe_resource(struct pci_bus *parent, struct resource *pr,
- struct resource *res, struct resource **conflict);
-static void update_bridge_base(struct pci_bus *bus, int i);
static void pcibios_fixup_resources(struct pci_dev* dev);
static void fixup_broken_pcnet32(struct pci_dev* dev);
static int reparent_resources(struct resource *parent, struct resource *res);
@@ -134,7 +130,7 @@ pcibios_fixup_resources(struct pci_dev *
if (offset != 0) {
res->start = (res->start + offset) & mask;
res->end = (res->end + offset) & mask;
- DBG("Fixup res %d (%lx) of dev %s: %llx -> %llx\n",
+ DBG("PCI: Fixup res %d (0x%lx) of dev %s: %llx -> %llx\n",
i, res->flags, pci_name(dev),
(u64)res->start - offset, (u64)res->start);
}
@@ -267,9 +263,12 @@ pcibios_allocate_bus_resources(struct li
}
}
- DBG("PCI: bridge rsrc %llx..%llx (%lx), parent %p\n",
+ DBG("PCI: dev %s (bus 0x%02x) bridge rsrc %d: %016llx..%016llx "
+ "(f:0x%08lx), parent %p\n",
+ bus->self ? pci_name(bus->self) : "PHB", bus->number, i,
(u64)res->start, (u64)res->end, res->flags, pr);
- if (pr) {
+
+ if (pr && !(pr->flags & IORESOURCE_UNSET)) {
if (request_resource(pr, res) == 0)
continue;
/*
@@ -280,10 +279,11 @@ pcibios_allocate_bus_resources(struct li
if (reparent_resources(pr, res) == 0)
continue;
}
- printk(KERN_ERR "PCI: Cannot allocate resource region "
- "%d of PCI bridge %d\n", i, bus->number);
- if (pci_relocate_bridge_resource(bus, i))
- bus->resource[i] = NULL;
+ printk(KERN_WARNING
+ "PCI: Cannot allocate resource region "
+ "%d of PCI bridge %d, will remap\n",
+ i, bus->number);
+ res->flags |= IORESOURCE_UNSET;
}
pcibios_allocate_bus_resources(&bus->children);
}
@@ -324,112 +324,6 @@ reparent_resources(struct resource *pare
return 0;
}
-/*
- * A bridge has been allocated a range which is outside the range
- * of its parent bridge, so it needs to be moved.
- */
-static int __init
-pci_relocate_bridge_resource(struct pci_bus *bus, int i)
-{
- struct resource *res, *pr, *conflict;
- resource_size_t try, size;
- struct pci_bus *parent = bus->parent;
- int j;
-
- if (parent == NULL) {
- /* shouldn't ever happen */
- printk(KERN_ERR "PCI: can't move host bridge resource\n");
- return -1;
- }
- res = bus->resource[i];
- if (res == NULL)
- return -1;
- pr = NULL;
- for (j = 0; j < 4; j++) {
- struct resource *r = parent->resource[j];
- if (!r)
- continue;
- if ((res->flags ^ r->flags) & (IORESOURCE_IO | IORESOURCE_MEM))
- continue;
- if (!((res->flags ^ r->flags) & IORESOURCE_PREFETCH)) {
- pr = r;
- break;
- }
- if (res->flags & IORESOURCE_PREFETCH)
- pr = r;
- }
- if (pr == NULL)
- return -1;
- size = res->end - res->start;
- if (pr->start > pr->end || size > pr->end - pr->start)
- return -1;
- try = pr->end;
- for (;;) {
- res->start = try - size;
- res->end = try;
- if (probe_resource(bus->parent, pr, res, &conflict) == 0)
- break;
- if (conflict->start <= pr->start + size)
- return -1;
- try = conflict->start - 1;
- }
- if (request_resource(pr, res)) {
- DBG(KERN_ERR "PCI: huh? couldn't move to %llx..%llx\n",
- (u64)res->start, (u64)res->end);
- return -1; /* "can't happen" */
- }
- update_bridge_base(bus, i);
- printk(KERN_INFO "PCI: bridge %d resource %d moved to %llx..%llx\n",
- bus->number, i, (unsigned long long)res->start,
- (unsigned long long)res->end);
- return 0;
-}
-
-static int __init
-probe_resource(struct pci_bus *parent, struct resource *pr,
- struct resource *res, struct resource **conflict)
-{
- struct pci_bus *bus;
- struct pci_dev *dev;
- struct resource *r;
- int i;
-
- for (r = pr->child; r != NULL; r = r->sibling) {
- if (r->end >= res->start && res->end >= r->start) {
- *conflict = r;
- return 1;
- }
- }
- list_for_each_entry(bus, &parent->children, node) {
- for (i = 0; i < 4; ++i) {
- if ((r = bus->resource[i]) == NULL)
- continue;
- if (!r->flags || r->start > r->end || r == res)
- continue;
- if (pci_find_parent_resource(bus->self, r) != pr)
- continue;
- if (r->end >= res->start && res->end >= r->start) {
- *conflict = r;
- return 1;
- }
- }
- }
- list_for_each_entry(dev, &parent->devices, bus_list) {
- for (i = 0; i < 6; ++i) {
- r = &dev->resource[i];
- if (!r->flags || (r->flags & IORESOURCE_UNSET))
- continue;
- if (pci_find_parent_resource(dev, r) != pr)
- continue;
- if (r->end >= res->start && res->end >= r->start) {
- *conflict = r;
- return 1;
- }
- }
- }
- return 0;
-}
-
void __init
update_bridge_resource(struct pci_dev *dev, struct resource *res)
{
@@ -486,24 +380,16 @@ update_bridge_resource(struct pci_dev *d
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
-static void __init
-update_bridge_base(struct pci_bus *bus, int i)
-{
- struct resource *res = bus->resource[i];
- struct pci_dev *dev = bus->self;
- update_bridge_resource(dev, res);
-}
-
static inline void alloc_resource(struct pci_dev *dev, int idx)
{
struct resource *pr, *r = &dev->resource[idx];
- DBG("PCI:%s: Resource %d: %016llx-%016llx (f=%lx)\n",
+ DBG("PCI: Allocating %s: Resource %d: %016llx..%016llx (f=%lx)\n",
pci_name(dev), idx, (u64)r->start, (u64)r->end, r->flags);
pr = pci_find_parent_resource(dev, r);
- if (!pr || request_resource(pr, r) < 0) {
- printk(KERN_WARNING "PCI: Remapping resource region %d"
- " of device %s\n", idx, pci_name(dev));
+ if (!pr || (pr->flags & IORESOURCE_UNSET) || request_resource(pr, r) < 0) {
+ printk(KERN_WARNING "PCI: Cannot allocate resource region %d"
+ " of device %s, will remap\n", idx, pci_name(dev));
if (pr)
DBG("PCI: parent is %p: %016llx-%016llx (f=%lx)\n",
pr, (u64)pr->start, (u64)pr->end, pr->flags);
@@ -552,50 +438,6 @@ pcibios_allocate_resources(int pass)
}
}
-static void __init
-pcibios_assign_resources(void)
-{
- struct pci_dev *dev = NULL;
- int idx;
- struct resource *r;
-
- for_each_pci_dev(dev) {
- int class = dev->class >> 8;
-
- /* Don't touch classless devices and host bridges */
- if (!class || class == PCI_CLASS_BRIDGE_HOST)
- continue;
-
- for (idx = 0; idx < 6; idx++) {
- r = &dev->resource[idx];
-
- /*
- * We shall assign a new address to this resource,
- * either because the BIOS (sic) forgot to do so
- * or because we have decided the old address was
- * unusable for some reason.
- */
- if ((r->flags & IORESOURCE_UNSET) && r->end &&
- (!ppc_md.pcibios_enable_device_hook ||
- !ppc_md.pcibios_enable_device_hook(dev, 1))) {
- int rc;
-
- r->flags &= ~IORESOURCE_UNSET;
- rc = pci_assign_resource(dev, idx);
- BUG_ON(rc);
- }
- }
-
-#if 0 /* don't assign ROMs */
- r = &dev->resource[PCI_ROM_RESOURCE];
- r->end -= r->start;
- r->start = 0;
- if (r->end)
- pci_assign_resource(dev, PCI_ROM_RESOURCE);
-#endif
- }
-}
-
#ifdef CONFIG_PPC_OF
/*
* Functions below are used on OpenFirmware machines.
@@ -1122,7 +964,8 @@ pcibios_init(void)
#ifdef CONFIG_PPC_PMAC
pcibios_fixup_p2p_bridges();
#endif /* CONFIG_PPC_PMAC */
- pcibios_assign_resources();
+ DBG("PCI: Assigning unassigned resouces...\n");
+ pci_assign_unassigned_resources();
/* Call machine dependent post-init code */
if (ppc_md.pcibios_after_init)
^ permalink raw reply
* [PATCH 3/19] [POWERPC] pci32: Remove PowerMac P2P bridge IO hack
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
The 32 bits PowerPC PCI code has a hack for use by some PowerMacs
to try to re-open PCI<->PCI bridge IO resources that were closed
by the firmware. This is no longer necessary as the generic code
will now do that for us.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/kernel/pci_32.c | 215 -------------------------------------------
1 file changed, 1 insertion(+), 214 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:27.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:28.000000000 +1100
@@ -711,217 +711,6 @@ void pcibios_make_OF_bus_map(void)
}
#endif /* CONFIG_PPC_OF */
-#ifdef CONFIG_PPC_PMAC
-/*
- * This set of routines checks for PCI<->PCI bridges that have closed
- * IO resources and have child devices. It tries to re-open an IO
- * window on them.
- *
- * This is a _temporary_ fix to workaround a problem with Apple's OF
- * closing IO windows on P2P bridges when the OF drivers of cards
- * below this bridge don't claim any IO range (typically ATI or
- * Adaptec).
- *
- * A more complete fix would be to use drivers/pci/setup-bus.c, which
- * involves a working pcibios_fixup_pbus_ranges(), some more care about
- * ordering when creating the host bus resources, and maybe a few more
- * minor tweaks
- */
-
-/* Initialize bridges with base/limit values we have collected */
-static void __init
-do_update_p2p_io_resource(struct pci_bus *bus, int enable_vga)
-{
- struct pci_dev *bridge = bus->self;
- struct pci_controller* hose = (struct pci_controller *)bridge->sysdata;
- u32 l;
- u16 w;
- struct resource res;
-
- if (bus->resource[0] == NULL)
- return;
- res = *(bus->resource[0]);
-
- DBG("Remapping Bus %d, bridge: %s\n", bus->number, pci_name(bridge));
- res.start -= ((unsigned long) hose->io_base_virt - isa_io_base);
- res.end -= ((unsigned long) hose->io_base_virt - isa_io_base);
- DBG(" IO window: %016llx-%016llx\n", res.start, res.end);
-
- /* Set up the top and bottom of the PCI I/O segment for this bus. */
- pci_read_config_dword(bridge, PCI_IO_BASE, &l);
- l &= 0xffff000f;
- l |= (res.start >> 8) & 0x00f0;
- l |= res.end & 0xf000;
- pci_write_config_dword(bridge, PCI_IO_BASE, l);
-
- if ((l & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32) {
- l = (res.start >> 16) | (res.end & 0xffff0000);
- pci_write_config_dword(bridge, PCI_IO_BASE_UPPER16, l);
- }
-
- pci_read_config_word(bridge, PCI_COMMAND, &w);
- w |= PCI_COMMAND_IO;
- pci_write_config_word(bridge, PCI_COMMAND, w);
-
-#if 0 /* Enabling this causes XFree 4.2.0 to hang during PCI probe */
- if (enable_vga) {
- pci_read_config_word(bridge, PCI_BRIDGE_CONTROL, &w);
- w |= PCI_BRIDGE_CTL_VGA;
- pci_write_config_word(bridge, PCI_BRIDGE_CONTROL, w);
- }
-#endif
-}
-
-/* This function is pretty basic and actually quite broken for the
- * general case, it's enough for us right now though. It's supposed
- * to tell us if we need to open an IO range at all or not and what
- * size.
- */
-static int __init
-check_for_io_childs(struct pci_bus *bus, struct resource* res, int *found_vga)
-{
- struct pci_dev *dev;
- int i;
- int rc = 0;
-
-#define push_end(res, mask) do { \
- BUG_ON((mask+1) & mask); \
- res->end = (res->end + mask) | mask; \
-} while (0)
-
- list_for_each_entry(dev, &bus->devices, bus_list) {
- u16 class = dev->class >> 8;
-
- if (class == PCI_CLASS_DISPLAY_VGA ||
- class == PCI_CLASS_NOT_DEFINED_VGA)
- *found_vga = 1;
- if (class >> 8 == PCI_BASE_CLASS_BRIDGE && dev->subordinate)
- rc |= check_for_io_childs(dev->subordinate, res, found_vga);
- if (class == PCI_CLASS_BRIDGE_CARDBUS)
- push_end(res, 0xfff);
-
- for (i=0; i<PCI_NUM_RESOURCES; i++) {
- struct resource *r;
- unsigned long r_size;
-
- if (dev->class >> 8 == PCI_CLASS_BRIDGE_PCI
- && i >= PCI_BRIDGE_RESOURCES)
- continue;
- r = &dev->resource[i];
- r_size = r->end - r->start;
- if (r_size < 0xfff)
- r_size = 0xfff;
- if (r->flags & IORESOURCE_IO && (r_size) != 0) {
- rc = 1;
- push_end(res, r_size);
- }
- }
- }
-
- return rc;
-}
-
-/* Here we scan all P2P bridges of a given level that have a closed
- * IO window. Note that the test for the presence of a VGA card should
- * be improved to take into account already configured P2P bridges,
- * currently, we don't see them and might end up configuring 2 bridges
- * with VGA pass through enabled
- */
-static void __init
-do_fixup_p2p_level(struct pci_bus *bus)
-{
- struct pci_bus *b;
- int i, parent_io;
- int has_vga = 0;
-
- for (parent_io=0; parent_io<4; parent_io++)
- if (bus->resource[parent_io]
- && bus->resource[parent_io]->flags & IORESOURCE_IO)
- break;
- if (parent_io >= 4)
- return;
-
- list_for_each_entry(b, &bus->children, node) {
- struct pci_dev *d = b->self;
- struct pci_controller* hose = (struct pci_controller *)d->sysdata;
- struct resource *res = b->resource[0];
- struct resource tmp_res;
- unsigned long max;
- int found_vga = 0;
-
- memset(&tmp_res, 0, sizeof(tmp_res));
- tmp_res.start = bus->resource[parent_io]->start;
-
- /* We don't let low addresses go through that closed P2P bridge, well,
- * that may not be necessary but I feel safer that way
- */
- if (tmp_res.start == 0)
- tmp_res.start = 0x1000;
-
- if (!list_empty(&b->devices) && res && res->flags == 0 &&
- res != bus->resource[parent_io] &&
- (d->class >> 8) == PCI_CLASS_BRIDGE_PCI &&
- check_for_io_childs(b, &tmp_res, &found_vga)) {
- u8 io_base_lo;
-
- printk(KERN_INFO "Fixing up IO bus %s\n", b->name);
-
- if (found_vga) {
- if (has_vga) {
- printk(KERN_WARNING "Skipping VGA, already active"
- " on bus segment\n");
- found_vga = 0;
- } else
- has_vga = 1;
- }
- pci_read_config_byte(d, PCI_IO_BASE, &io_base_lo);
-
- if ((io_base_lo & PCI_IO_RANGE_TYPE_MASK) == PCI_IO_RANGE_TYPE_32)
- max = ((unsigned long) hose->io_base_virt
- - isa_io_base) + 0xffffffff;
- else
- max = ((unsigned long) hose->io_base_virt
- - isa_io_base) + 0xffff;
-
- *res = tmp_res;
- res->flags = IORESOURCE_IO;
- res->name = b->name;
-
- /* Find a resource in the parent where we can allocate */
- for (i = 0 ; i < 4; i++) {
- struct resource *r = bus->resource[i];
- if (!r)
- continue;
- if ((r->flags & IORESOURCE_IO) == 0)
- continue;
- DBG("Trying to allocate from %016llx, size %016llx from parent"
- " res %d: %016llx -> %016llx\n",
- res->start, res->end, i, r->start, r->end);
-
- if (allocate_resource(r, res, res->end + 1, res->start, max,
- res->end + 1, NULL, NULL) < 0) {
- DBG("Failed !\n");
- continue;
- }
- do_update_p2p_io_resource(b, found_vga);
- break;
- }
- }
- do_fixup_p2p_level(b);
- }
-}
-
-static void
-pcibios_fixup_p2p_bridges(void)
-{
- struct pci_bus *b;
-
- list_for_each_entry(b, &pci_root_buses, node)
- do_fixup_p2p_level(b);
-}
-
-#endif /* CONFIG_PPC_PMAC */
-
static int __init
pcibios_init(void)
{
@@ -961,9 +750,7 @@ pcibios_init(void)
pcibios_allocate_bus_resources(&pci_root_buses);
pcibios_allocate_resources(0);
pcibios_allocate_resources(1);
-#ifdef CONFIG_PPC_PMAC
- pcibios_fixup_p2p_bridges();
-#endif /* CONFIG_PPC_PMAC */
+
DBG("PCI: Assigning unassigned resouces...\n");
pci_assign_unassigned_resources();
^ permalink raw reply
* [PATCH 4/19] [POWERPC] pci32: Add flags modifying the PCI code behaviour
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
This adds to the 32 bits PCI code some flags, replacing the old
pci_assign_all_busses global, that allow to control various
aspects of the PCI probing, such as whether to re-assign all
resources or not, or to not try to assign anything at all.
This also adds the flag x86 already has to avoid ISA alignment
on bridges that don't have ISA forwarding enabled (no legacy
devices on the top level bus) and sets it for PowerMacs.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/kernel/pci_32.c | 42 ++++++++++++++++++++++++------
arch/powerpc/kernel/pci_64.c | 1
arch/powerpc/kernel/rtas_pci.c | 6 ++--
arch/powerpc/platforms/52xx/mpc52xx_pci.c | 2 -
arch/powerpc/platforms/82xx/pq2.c | 2 -
arch/powerpc/platforms/83xx/pci.c | 2 -
arch/powerpc/platforms/chrp/pci.c | 2 -
arch/powerpc/platforms/powermac/pci.c | 7 +++--
arch/powerpc/sysdev/fsl_pci.c | 2 -
arch/powerpc/sysdev/grackle.c | 2 -
include/asm-powerpc/pci-bridge.h | 20 ++++++++++++++
include/asm-powerpc/pci.h | 9 ++++--
12 files changed, 75 insertions(+), 22 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:28.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:29.000000000 +1100
@@ -35,6 +35,9 @@ unsigned long isa_io_base = 0;
unsigned long pci_dram_offset = 0;
int pcibios_assign_bus_offset = 1;
+/* Default PCI flags is 0 */
+unsigned int ppc_pci_flags;
+
void pcibios_make_OF_bus_map(void);
static void pcibios_fixup_resources(struct pci_dev* dev);
@@ -48,7 +51,7 @@ static u8* pci_to_OF_bus_map;
/* By default, we don't re-assign bus numbers. We do this only on
* some pmacs
*/
-int pci_assign_all_buses;
+static int pci_assign_all_buses;
LIST_HEAD(hose_list);
@@ -174,6 +177,14 @@ void pcibios_bus_to_resource(struct pci_
}
EXPORT_SYMBOL(pcibios_bus_to_resource);
+static int skip_isa_ioresource_align(struct pci_dev *dev)
+{
+ if ((ppc_pci_flags & PPC_PCI_CAN_SKIP_ISA_ALIGN) &&
+ !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA))
+ return 1;
+ return 0;
+}
+
/*
* We need to avoid collisions with `mirrored' VGA ports
* and other strange ISA hardware, so we always want the
@@ -195,6 +206,8 @@ void pcibios_align_resource(void *data,
if (res->flags & IORESOURCE_IO) {
resource_size_t start = res->start;
+ if (skip_isa_ioresource_align(dev))
+ return;
if (start & 0x300) {
start = (start + 0x3ff) & ~0x3ff;
res->start = start;
@@ -251,8 +264,13 @@ pcibios_allocate_bus_resources(struct li
continue;
if (bus->parent == NULL)
pr = (res->flags & IORESOURCE_IO)?
- &ioport_resource: &iomem_resource;
+ &ioport_resource : &iomem_resource;
else {
+ /* Don't bother with non-root busses when
+ * re-assigning all resources.
+ */
+ if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_RSRC)
+ continue;
pr = pci_find_parent_resource(bus->self, res);
if (pr == res) {
/* this happens when the generic PCI
@@ -720,6 +738,9 @@ pcibios_init(void)
printk(KERN_INFO "PCI: Probing PCI hardware\n");
+ if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
+ pci_assign_all_buses = 1;
+
/* Scan all of the recorded PCI controllers. */
list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
if (pci_assign_all_buses)
@@ -746,13 +767,18 @@ pcibios_init(void)
if (ppc_md.pcibios_fixup)
ppc_md.pcibios_fixup();
- /* Allocate and assign resources */
+ /* Allocate and assign resources. If we re-assign everything, then
+ * we skip the allocate phase
+ */
pcibios_allocate_bus_resources(&pci_root_buses);
- pcibios_allocate_resources(0);
- pcibios_allocate_resources(1);
-
- DBG("PCI: Assigning unassigned resouces...\n");
- pci_assign_unassigned_resources();
+ if (!(ppc_pci_flags & PPC_PCI_REASSIGN_ALL_RSRC)) {
+ pcibios_allocate_resources(0);
+ pcibios_allocate_resources(1);
+ }
+ if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) {
+ DBG("PCI: Assigning unassigned resouces...\n");
+ pci_assign_unassigned_resources();
+ }
/* Call machine dependent post-init code */
if (ppc_md.pcibios_after_init)
Index: linux-merge/arch/powerpc/kernel/pci_64.c
===================================================================
--- linux-merge.orig/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:00.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:29.000000000 +1100
@@ -40,7 +40,6 @@
#endif
unsigned long pci_probe_only = 1;
-int pci_assign_all_buses = 0;
static void fixup_resource(struct resource *res, struct pci_dev *dev);
static void do_bus_setup(struct pci_bus *bus);
Index: linux-merge/arch/powerpc/kernel/rtas_pci.c
===================================================================
--- linux-merge.orig/arch/powerpc/kernel/rtas_pci.c 2007-12-14 15:49:00.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/rtas_pci.c 2007-12-14 15:49:29.000000000 +1100
@@ -311,10 +311,12 @@ void __init find_and_init_phbs(void)
if (prop)
pci_probe_only = *prop;
+#ifdef CONFIG_PPC32 /* Will be made generic soon */
prop = of_get_property(of_chosen,
"linux,pci-assign-all-buses", NULL);
- if (prop)
- pci_assign_all_buses = *prop;
+ if (prop && *prop)
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
+#endif /* CONFIG_PPC32 */
}
}
Index: linux-merge/arch/powerpc/platforms/52xx/mpc52xx_pci.c
===================================================================
--- linux-merge.orig/arch/powerpc/platforms/52xx/mpc52xx_pci.c 2007-12-14 15:49:00.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/52xx/mpc52xx_pci.c 2007-12-14 15:49:29.000000000 +1100
@@ -363,7 +363,7 @@ mpc52xx_add_bridge(struct device_node *n
pr_debug("Adding MPC52xx PCI host bridge %s\n", node->full_name);
- pci_assign_all_buses = 1;
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
if (of_address_to_resource(node, 0, &rsrc) != 0) {
printk(KERN_ERR "Can't get %s resources\n", node->full_name);
Index: linux-merge/arch/powerpc/platforms/82xx/pq2.c
===================================================================
--- linux-merge.orig/arch/powerpc/platforms/82xx/pq2.c 2007-12-14 15:49:00.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/82xx/pq2.c 2007-12-14 15:49:29.000000000 +1100
@@ -53,7 +53,7 @@ static void __init pq2_pci_add_bridge(st
if (of_address_to_resource(np, 0, &r) || r.end - r.start < 0x10b)
goto err;
- pci_assign_all_buses = 1;
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
hose = pcibios_alloc_controller(np);
if (!hose)
Index: linux-merge/arch/powerpc/platforms/83xx/pci.c
===================================================================
--- linux-merge.orig/arch/powerpc/platforms/83xx/pci.c 2007-12-14 15:49:00.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/83xx/pci.c 2007-12-14 15:49:29.000000000 +1100
@@ -54,7 +54,7 @@ int __init mpc83xx_add_bridge(struct dev
" bus 0\n", dev->full_name);
}
- pci_assign_all_buses = 1;
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
hose = pcibios_alloc_controller(dev);
if (!hose)
return -ENOMEM;
Index: linux-merge/arch/powerpc/platforms/chrp/pci.c
===================================================================
--- linux-merge.orig/arch/powerpc/platforms/chrp/pci.c 2007-12-14 15:49:00.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/chrp/pci.c 2007-12-14 15:49:29.000000000 +1100
@@ -198,7 +198,7 @@ static void __init setup_peg2(struct pci
printk ("RTAS supporting Pegasos OF not found, please upgrade"
" your firmware\n");
}
- pci_assign_all_buses = 1;
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
/* keep the reference to the root node */
}
Index: linux-merge/arch/powerpc/platforms/powermac/pci.c
===================================================================
--- linux-merge.orig/arch/powerpc/platforms/powermac/pci.c 2007-12-14 15:49:00.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/powermac/pci.c 2007-12-14 15:49:29.000000000 +1100
@@ -725,7 +725,7 @@ static void __init setup_bandit(struct p
static int __init setup_uninorth(struct pci_controller *hose,
struct resource *addr)
{
- pci_assign_all_buses = 1;
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
has_uninorth = 1;
hose->ops = ¯isc_pci_ops;
hose->cfg_addr = ioremap(addr->start + 0x800000, 0x1000);
@@ -994,6 +994,9 @@ void __init pmac_pci_init(void)
struct device_node *np, *root;
struct device_node *ht = NULL;
+#ifdef CONFIG_PPC32
+ ppc_pci_flags = PPC_PCI_CAN_SKIP_ISA_ALIGN;
+#endif
root = of_find_node_by_path("/");
if (root == NULL) {
printk(KERN_CRIT "pmac_pci_init: can't find root "
@@ -1051,7 +1054,7 @@ void __init pmac_pci_init(void)
* some offset between bus number and domains for now when we
* assign all busses should help for now
*/
- if (pci_assign_all_buses)
+ if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_BUS)
pcibios_assign_bus_offset = 0x10;
#endif
}
Index: linux-merge/arch/powerpc/sysdev/fsl_pci.c
===================================================================
--- linux-merge.orig/arch/powerpc/sysdev/fsl_pci.c 2007-12-14 15:49:00.000000000 +1100
+++ linux-merge/arch/powerpc/sysdev/fsl_pci.c 2007-12-14 15:49:29.000000000 +1100
@@ -202,7 +202,7 @@ int __init fsl_add_bridge(struct device_
printk(KERN_WARNING "Can't get bus-range for %s, assume"
" bus 0\n", dev->full_name);
- pci_assign_all_buses = 1;
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
hose = pcibios_alloc_controller(dev);
if (!hose)
return -ENOMEM;
Index: linux-merge/arch/powerpc/sysdev/grackle.c
===================================================================
--- linux-merge.orig/arch/powerpc/sysdev/grackle.c 2007-12-14 15:49:00.000000000 +1100
+++ linux-merge/arch/powerpc/sysdev/grackle.c 2007-12-14 15:49:29.000000000 +1100
@@ -57,7 +57,7 @@ void __init setup_grackle(struct pci_con
{
setup_indirect_pci(hose, 0xfec00000, 0xfee00000, 0);
if (machine_is_compatible("PowerMac1,1"))
- pci_assign_all_buses = 1;
+ ppc_pci_flags |= PPC_PCI_REASSIGN_ALL_BUS;
if (machine_is_compatible("AAPL,PowerBook1998"))
grackle_set_loop_snoop(hose, 1);
#if 0 /* Disabled for now, HW problems ??? */
Index: linux-merge/include/asm-powerpc/pci-bridge.h
===================================================================
--- linux-merge.orig/include/asm-powerpc/pci-bridge.h 2007-12-14 15:49:01.000000000 +1100
+++ linux-merge/include/asm-powerpc/pci-bridge.h 2007-12-14 15:49:29.000000000 +1100
@@ -13,6 +13,26 @@
struct device_node;
+extern unsigned int ppc_pci_flags;
+enum {
+ /* Force re-assigning all resources (ignore firmware
+ * setup completely)
+ */
+ PPC_PCI_REASSIGN_ALL_RSRC = 0x00000001,
+
+ /* Re-assign all bus numbers */
+ PPC_PCI_REASSIGN_ALL_BUS = 0x00000002,
+
+ /* Do not try to assign, just use existing setup */
+ PPC_PCI_PROBE_ONLY = 0x00000004,
+
+ /* Don't bother with ISA alignment unless the bridge has
+ * ISA forwarding enabled
+ */
+ PPC_PCI_CAN_SKIP_ISA_ALIGN = 0x00000008,
+};
+
+
/*
* Structure of a PCI controller (host bridge)
*/
Index: linux-merge/include/asm-powerpc/pci.h
===================================================================
--- linux-merge.orig/include/asm-powerpc/pci.h 2007-12-14 15:49:01.000000000 +1100
+++ linux-merge/include/asm-powerpc/pci.h 2007-12-14 15:49:29.000000000 +1100
@@ -38,9 +38,12 @@ struct pci_dev;
* Set this to 1 if you want the kernel to re-assign all PCI
* bus numbers
*/
-extern int pci_assign_all_buses;
-#define pcibios_assign_all_busses() (pci_assign_all_buses)
-
+#ifdef CONFIG_PPC64
+#define pcibios_assign_all_busses() 0
+#else
+#define pcibios_assign_all_busses() (ppc_pci_flags & \
+ PPC_PCI_REASSIGN_ALL_BUS)
+#endif
#define pcibios_scan_all_fns(a, b) 0
static inline void pcibios_set_master(struct pci_dev *dev)
^ permalink raw reply
* [PATCH 5/19] [POWERPC] pci32: Remove obsolete PowerMac bus number hack
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
The 32 bits PCI code carries an old hack that was only useful for G5
machines. Nowdays, the 32 bits kernel doesn't support any of those
machines anymore so the hack is basically never used, remove it.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/kernel/pci_32.c | 11 -----------
1 file changed, 11 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:29.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:29.000000000 +1100
@@ -922,17 +922,6 @@ long sys_pciconfig_iobase(long which, un
struct pci_controller* hose;
long result = -EOPNOTSUPP;
- /* Argh ! Please forgive me for that hack, but that's the
- * simplest way to get existing XFree to not lockup on some
- * G5 machines... So when something asks for bus 0 io base
- * (bus 0 is HT root), we return the AGP one instead.
- */
-#ifdef CONFIG_PPC_PMAC
- if (machine_is(powermac) && machine_is_compatible("MacRISC4"))
- if (bus == 0)
- bus = 0xf0;
-#endif /* CONFIG_PPC_PMAC */
-
hose = pci_bus_to_hose(bus);
if (!hose)
return -ENODEV;
^ permalink raw reply
* [PATCH 6/19] [POWERPC] pci32: Add platform option to enable /proc PCI domains
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
This adds flags the platforms can use to enable domain numbers
in /proc/bus/pci.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/kernel/pci-common.c | 16 ++++++++++++++++
arch/powerpc/kernel/pci_64.c | 8 --------
include/asm-powerpc/pci-bridge.h | 5 +++++
include/asm-powerpc/pci.h | 14 ++++----------
4 files changed, 25 insertions(+), 18 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/pci-common.c 2007-12-14 15:49:00.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci-common.c 2007-12-14 15:49:30.000000000 +1100
@@ -639,3 +639,19 @@ void __devinit pci_process_bridge_OF_ran
hose->mem_resources[memno-1] = tmp;
}
}
+
+/* Decide whether to display the domain number in /proc */
+int pci_proc_domain(struct pci_bus *bus)
+{
+ struct pci_controller *hose = pci_bus_to_host(bus);
+#ifdef CONFIG_PPC64
+ return hose->buid != 0;
+#else
+ if (!(ppc_pci_flags & PPC_PCI_ENABLE_PROC_DOMAINS))
+ return 0;
+ if (ppc_pci_flags & PPC_PCI_COMPAT_DOMAIN_0)
+ return hose->global_number != 0;
+ return 1;
+#endif
+}
+
Index: linux-merge/arch/powerpc/kernel/pci_64.c
===================================================================
--- linux-merge.orig/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:29.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:30.000000000 +1100
@@ -570,14 +570,6 @@ int pcibios_enable_device(struct pci_dev
return 0;
}
-/* Decide whether to display the domain number in /proc */
-int pci_proc_domain(struct pci_bus *bus)
-{
- struct pci_controller *hose = pci_bus_to_host(bus);
- return hose->buid != 0;
-}
-
-
#ifdef CONFIG_HOTPLUG
int pcibios_unmap_io_space(struct pci_bus *bus)
Index: linux-merge/include/asm-powerpc/pci-bridge.h
===================================================================
--- linux-merge.orig/include/asm-powerpc/pci-bridge.h 2007-12-14 15:49:29.000000000 +1100
+++ linux-merge/include/asm-powerpc/pci-bridge.h 2007-12-14 15:49:30.000000000 +1100
@@ -30,6 +30,11 @@ enum {
* ISA forwarding enabled
*/
PPC_PCI_CAN_SKIP_ISA_ALIGN = 0x00000008,
+
+ /* Enable domain numbers in /proc */
+ PPC_PCI_ENABLE_PROC_DOMAINS = 0x00000010,
+ /* ... except for domain 0 */
+ PPC_PCI_COMPAT_DOMAIN_0 = 0x00000020,
};
Index: linux-merge/include/asm-powerpc/pci.h
===================================================================
--- linux-merge.orig/include/asm-powerpc/pci.h 2007-12-14 15:49:29.000000000 +1100
+++ linux-merge/include/asm-powerpc/pci.h 2007-12-14 15:49:30.000000000 +1100
@@ -98,9 +98,6 @@ static inline void pci_dma_burst_advice(
#define get_pci_dma_ops() NULL
#endif
-/* Decide whether to display the domain number in /proc */
-extern int pci_proc_domain(struct pci_bus *bus);
-
#else /* 32-bit */
#ifdef CONFIG_PCI
@@ -112,17 +109,14 @@ static inline void pci_dma_burst_advice(
*strategy_parameter = ~0UL;
}
#endif
-
-/* Set the name of the bus as it appears in /proc/bus/pci */
-static inline int pci_proc_domain(struct pci_bus *bus)
-{
- return 0;
-}
-
#endif /* CONFIG_PPC64 */
extern int pci_domain_nr(struct pci_bus *bus);
+/* Decide whether to display the domain number in /proc */
+extern int pci_proc_domain(struct pci_bus *bus);
+
+
struct vm_area_struct;
/* Map a range of PCI memory or I/O space for a device into user space */
int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
^ permalink raw reply
* [PATCH 7/19] [POWERPC] Merge pcibios_resource_to_bus/bus_to_resource
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
This merges the PowerPC 32 and 64 bits version of pcibios_resource_to_bus
and pcibios_bus_to_resource().
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/kernel/pci-common.c | 36 +++++++++++++++++++++++++++++++++
arch/powerpc/kernel/pci_32.c | 32 -----------------------------
arch/powerpc/kernel/pci_64.c | 42 ---------------------------------------
3 files changed, 36 insertions(+), 74 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/pci-common.c 2007-12-14 15:49:30.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci-common.c 2007-12-14 15:49:31.000000000 +1100
@@ -655,3 +655,39 @@ int pci_proc_domain(struct pci_bus *bus)
#endif
}
+void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+ struct resource *res)
+{
+ resource_size_t offset = 0, mask = (resource_size_t)-1;
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
+
+ if (!hose)
+ return;
+ if (res->flags & IORESOURCE_IO) {
+ offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+ mask = 0xffffffffu;
+ } else if (res->flags & IORESOURCE_MEM)
+ offset = hose->pci_mem_offset;
+
+ region->start = (res->start - offset) & mask;
+ region->end = (res->end - offset) & mask;
+}
+EXPORT_SYMBOL(pcibios_resource_to_bus);
+
+void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+ struct pci_bus_region *region)
+{
+ resource_size_t offset = 0, mask = (resource_size_t)-1;
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
+
+ if (!hose)
+ return;
+ if (res->flags & IORESOURCE_IO) {
+ offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+ mask = 0xffffffffu;
+ } else if (res->flags & IORESOURCE_MEM)
+ offset = hose->pci_mem_offset;
+ res->start = (region->start + offset) & mask;
+ res->end = (region->end + offset) & mask;
+}
+EXPORT_SYMBOL(pcibios_bus_to_resource);
Index: linux-merge/arch/powerpc/kernel/pci_32.c
===================================================================
--- linux-merge.orig/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:29.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:31.000000000 +1100
@@ -145,38 +145,6 @@ pcibios_fixup_resources(struct pci_dev *
}
DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources);
-void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
- struct resource *res)
-{
- resource_size_t offset = 0, mask = (resource_size_t)-1;
- struct pci_controller *hose = dev->sysdata;
-
- if (hose && res->flags & IORESOURCE_IO) {
- offset = (unsigned long)hose->io_base_virt - isa_io_base;
- mask = 0xffffffffu;
- } else if (hose && res->flags & IORESOURCE_MEM)
- offset = hose->pci_mem_offset;
- region->start = (res->start - offset) & mask;
- region->end = (res->end - offset) & mask;
-}
-EXPORT_SYMBOL(pcibios_resource_to_bus);
-
-void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
- struct pci_bus_region *region)
-{
- resource_size_t offset = 0, mask = (resource_size_t)-1;
- struct pci_controller *hose = dev->sysdata;
-
- if (hose && res->flags & IORESOURCE_IO) {
- offset = (unsigned long)hose->io_base_virt - isa_io_base;
- mask = 0xffffffffu;
- } else if (hose && res->flags & IORESOURCE_MEM)
- offset = hose->pci_mem_offset;
- res->start = (region->start + offset) & mask;
- res->end = (region->end + offset) & mask;
-}
-EXPORT_SYMBOL(pcibios_bus_to_resource);
-
static int skip_isa_ioresource_align(struct pci_dev *dev)
{
if ((ppc_pci_flags & PPC_PCI_CAN_SKIP_ISA_ALIGN) &&
Index: linux-merge/arch/powerpc/kernel/pci_64.c
===================================================================
--- linux-merge.orig/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:30.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:31.000000000 +1100
@@ -77,48 +77,6 @@ static void fixup_broken_pcnet32(struct
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32);
-void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
- struct resource *res)
-{
- unsigned long offset = 0;
- struct pci_controller *hose = pci_bus_to_host(dev->bus);
-
- if (!hose)
- return;
-
- if (res->flags & IORESOURCE_IO)
- offset = (unsigned long)hose->io_base_virt - _IO_BASE;
-
- if (res->flags & IORESOURCE_MEM)
- offset = hose->pci_mem_offset;
-
- region->start = res->start - offset;
- region->end = res->end - offset;
-}
-
-void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
- struct pci_bus_region *region)
-{
- unsigned long offset = 0;
- struct pci_controller *hose = pci_bus_to_host(dev->bus);
-
- if (!hose)
- return;
-
- if (res->flags & IORESOURCE_IO)
- offset = (unsigned long)hose->io_base_virt - _IO_BASE;
-
- if (res->flags & IORESOURCE_MEM)
- offset = hose->pci_mem_offset;
-
- res->start = region->start + offset;
- res->end = region->end + offset;
-}
-
-#ifdef CONFIG_HOTPLUG
-EXPORT_SYMBOL(pcibios_resource_to_bus);
-EXPORT_SYMBOL(pcibios_bus_to_resource);
-#endif
/*
* We need to avoid collisions with `mirrored' VGA ports
^ permalink raw reply
* [PATCH 8/19] [POWERPC] Merge PCI resource fixups
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
The PCI code in 32 and 64 bits fixes up resources differently.
32 bits uses a header quirk plus handles bridges in pcibios_fixup_bus()
while 64 bits does things in various places depending on whether you
are using OF probing, using PCI hotplug, etc...
This merges those by basically using the 32 bits approach for both,
with various tweaks to make 64 bits work with the new approach.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/kernel/pci-common.c | 130 +++++++++++++++++++++++++++++
arch/powerpc/kernel/pci_32.c | 83 ------------------
arch/powerpc/kernel/pci_64.c | 104 +++--------------------
arch/powerpc/platforms/pseries/pci_dlpar.c | 14 +--
drivers/pci/hotplug/rpadlpar_core.c | 2
include/asm-powerpc/machdep.h | 14 +--
include/asm-powerpc/pci-bridge.h | 2
include/asm-powerpc/pci.h | 6 -
8 files changed, 167 insertions(+), 188 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/pci-common.c 2007-12-14 15:49:31.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci-common.c 2007-12-14 15:49:31.000000000 +1100
@@ -691,3 +691,133 @@ void pcibios_bus_to_resource(struct pci_
res->end = (region->end + offset) & mask;
}
EXPORT_SYMBOL(pcibios_bus_to_resource);
+
+/* Fixup a bus resource into a linux resource */
+static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
+{
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
+ resource_size_t offset = 0, mask = (resource_size_t)-1;
+
+ if (res->flags & IORESOURCE_IO) {
+ offset = (unsigned long)hose->io_base_virt - _IO_BASE;
+ mask = 0xffffffffu;
+ } else if (res->flags & IORESOURCE_MEM)
+ offset = hose->pci_mem_offset;
+
+ res->start = (res->start + offset) & mask;
+ res->end = (res->end + offset) & mask;
+
+ pr_debug("PCI:%s %016llx-%016llx\n",
+ pci_name(dev),
+ (unsigned long long)res->start,
+ (unsigned long long)res->end);
+}
+
+
+/* This header fixup will do the resource fixup for all devices as they are
+ * probed, but not for bridge ranges
+ */
+static void __devinit pcibios_fixup_resources(struct pci_dev *dev)
+{
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
+ int i;
+
+ if (!hose) {
+ printk(KERN_ERR "No host bridge for PCI dev %s !\n",
+ pci_name(dev));
+ return;
+ }
+ for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
+ struct resource *res = dev->resource + i;
+ if (!res->flags)
+ continue;
+ if (res->end == 0xffffffff) {
+ pr_debug("PCI:%s Resource %d %016llx-%016llx [%x] is unassigned\n",
+ pci_name(dev), i,
+ (unsigned long long)res->start,
+ (unsigned long long)res->end,
+ (unsigned int)res->flags);
+ res->end -= res->start;
+ res->start = 0;
+ res->flags |= IORESOURCE_UNSET;
+ continue;
+ }
+
+ pr_debug("PCI:%s Resource %d %016llx-%016llx [%x] fixup...\n",
+ pci_name(dev), i,
+ (unsigned long long)res->start,\
+ (unsigned long long)res->end,
+ (unsigned int)res->flags);
+
+ fixup_resource(res, dev);
+ }
+
+ /* Call machine specific resource fixup */
+ if (ppc_md.pcibios_fixup_resources)
+ ppc_md.pcibios_fixup_resources(dev);
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources);
+
+static void __devinit __pcibios_fixup_bus(struct pci_bus *bus)
+{
+ struct pci_dev *dev = bus->self;
+
+ pr_debug("PCI: Fixup bus %d (%s)\n", bus->number, dev ? pci_name(dev) : "PHB");
+
+ /* Fixup PCI<->PCI bridges. Host bridges are handled separately, for
+ * now differently between 32 and 64 bits.
+ */
+ if (dev != NULL) {
+ struct resource *res;
+ int i;
+
+ for (i = 0; i < PCI_BUS_NUM_RESOURCES; ++i) {
+ if ((res = bus->resource[i]) == NULL)
+ continue;
+ if (!res->flags || bus->self->transparent)
+ continue;
+
+ pr_debug("PCI:%s Bus rsrc %d %016llx-%016llx [%x] fixup...\n",
+ pci_name(dev), i,
+ (unsigned long long)res->start,\
+ (unsigned long long)res->end,
+ (unsigned int)res->flags);
+
+ fixup_resource(res, dev);
+ }
+ }
+
+ /* Additional setup that is different between 32 and 64 bits for now */
+ pcibios_do_bus_setup(bus);
+
+ /* Platform specific bus fixups */
+ if (ppc_md.pcibios_fixup_bus)
+ ppc_md.pcibios_fixup_bus(bus);
+
+ /* Read default IRQs and fixup if necessary */
+ list_for_each_entry(dev, &bus->devices, bus_list) {
+ pci_read_irq_line(dev);
+ if (ppc_md.pci_irq_fixup)
+ ppc_md.pci_irq_fixup(dev);
+ }
+}
+
+void __devinit pcibios_fixup_bus(struct pci_bus *bus)
+{
+ /* When called from the generic PCI probe, read PCI<->PCI bridge
+ * bases before proceeding
+ */
+ if (bus->self != NULL)
+ pci_read_bridge_bases(bus);
+ __pcibios_fixup_bus(bus);
+}
+EXPORT_SYMBOL(pcibios_fixup_bus);
+
+/* When building a bus from the OF tree rather than probing, we need a
+ * slightly different version of the fixup which doesn't read the
+ * bridge bases using config space accesses
+ */
+void __devinit pcibios_fixup_of_probed_bus(struct pci_bus *bus)
+{
+ __pcibios_fixup_bus(bus);
+}
Index: linux-merge/arch/powerpc/kernel/pci_32.c
===================================================================
--- linux-merge.orig/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:31.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:31.000000000 +1100
@@ -40,7 +40,6 @@ unsigned int ppc_pci_flags;
void pcibios_make_OF_bus_map(void);
-static void pcibios_fixup_resources(struct pci_dev* dev);
static void fixup_broken_pcnet32(struct pci_dev* dev);
static int reparent_resources(struct resource *parent, struct resource *res);
static void fixup_cpc710_pci64(struct pci_dev* dev);
@@ -98,53 +97,6 @@ fixup_cpc710_pci64(struct pci_dev* dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
-static void
-pcibios_fixup_resources(struct pci_dev *dev)
-{
- struct pci_controller* hose = (struct pci_controller *)dev->sysdata;
- int i;
- resource_size_t offset, mask;
-
- if (!hose) {
- printk(KERN_ERR "No hose for PCI dev %s!\n", pci_name(dev));
- return;
- }
- for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
- struct resource *res = dev->resource + i;
- if (!res->flags)
- continue;
- if (res->end == 0xffffffff) {
- DBG("PCI:%s Resource %d [%016llx-%016llx] is unassigned\n",
- pci_name(dev), i, (u64)res->start, (u64)res->end);
- res->end -= res->start;
- res->start = 0;
- res->flags |= IORESOURCE_UNSET;
- continue;
- }
- offset = 0;
- mask = (resource_size_t)-1;
- if (res->flags & IORESOURCE_MEM) {
- offset = hose->pci_mem_offset;
- } else if (res->flags & IORESOURCE_IO) {
- offset = (unsigned long) hose->io_base_virt
- - isa_io_base;
- mask = 0xffffffffu;
- }
- if (offset != 0) {
- res->start = (res->start + offset) & mask;
- res->end = (res->end + offset) & mask;
- DBG("PCI: Fixup res %d (0x%lx) of dev %s: %llx -> %llx\n",
- i, res->flags, pci_name(dev),
- (u64)res->start - offset, (u64)res->start);
- }
- }
-
- /* Call machine specific resource fixup */
- if (ppc_md.pcibios_fixup_resources)
- ppc_md.pcibios_fixup_resources(dev);
-}
-DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pcibios_fixup_resources);
-
static int skip_isa_ioresource_align(struct pci_dev *dev)
{
if ((ppc_pci_flags & PPC_PCI_CAN_SKIP_ISA_ALIGN) &&
@@ -757,14 +709,14 @@ pcibios_init(void)
subsys_initcall(pcibios_init);
-void pcibios_fixup_bus(struct pci_bus *bus)
+void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
{
struct pci_controller *hose = (struct pci_controller *) bus->sysdata;
unsigned long io_offset;
struct resource *res;
- struct pci_dev *dev;
int i;
+ /* Hookup PHB resources */
io_offset = (unsigned long)hose->io_base_virt - isa_io_base;
if (bus->parent == NULL) {
/* This is a host bridge - fill in its resources */
@@ -795,37 +747,6 @@ void pcibios_fixup_bus(struct pci_bus *b
}
bus->resource[i+1] = res;
}
- } else {
- /* This is a subordinate bridge */
- pci_read_bridge_bases(bus);
-
- for (i = 0; i < 4; ++i) {
- if ((res = bus->resource[i]) == NULL)
- continue;
- if (!res->flags || bus->self->transparent)
- continue;
- if (io_offset && (res->flags & IORESOURCE_IO)) {
- res->start = (res->start + io_offset) &
- 0xffffffffu;
- res->end = (res->end + io_offset) &
- 0xffffffffu;
- } else if (hose->pci_mem_offset
- && (res->flags & IORESOURCE_MEM)) {
- res->start += hose->pci_mem_offset;
- res->end += hose->pci_mem_offset;
- }
- }
- }
-
- /* Platform specific bus fixups */
- if (ppc_md.pcibios_fixup_bus)
- ppc_md.pcibios_fixup_bus(bus);
-
- /* Read default IRQs and fixup if necessary */
- list_for_each_entry(dev, &bus->devices, bus_list) {
- pci_read_irq_line(dev);
- if (ppc_md.pci_irq_fixup)
- ppc_md.pci_irq_fixup(dev);
}
}
Index: linux-merge/arch/powerpc/kernel/pci_64.c
===================================================================
--- linux-merge.orig/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:31.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:31.000000000 +1100
@@ -41,9 +41,6 @@
unsigned long pci_probe_only = 1;
-static void fixup_resource(struct resource *res, struct pci_dev *dev);
-static void do_bus_setup(struct pci_bus *bus);
-
/* pci_io_base -- the base address from which io bars are offsets.
* This is the lowest I/O base address (so bar values are always positive),
* and it *must* be the start of ISA space if an ISA bus exists because
@@ -223,7 +220,6 @@ static void pci_parse_of_addrs(struct de
res->end = base + size - 1;
res->flags = flags;
res->name = pci_name(dev);
- fixup_resource(res, dev);
}
}
@@ -292,7 +288,7 @@ struct pci_dev *of_create_pci_dev(struct
EXPORT_SYMBOL(of_create_pci_dev);
void __devinit of_scan_bus(struct device_node *node,
- struct pci_bus *bus)
+ struct pci_bus *bus)
{
struct device_node *child = NULL;
const u32 *reg;
@@ -301,6 +297,7 @@ void __devinit of_scan_bus(struct device
DBG("of_scan_bus(%s) bus no %d... \n", node->full_name, bus->number);
+ /* Scan direct children */
while ((child = of_get_next_child(node, child)) != NULL) {
DBG(" * %s\n", child->full_name);
reg = of_get_property(child, "reg", ®len);
@@ -312,19 +309,26 @@ void __devinit of_scan_bus(struct device
dev = of_create_pci_dev(child, bus, devfn);
if (!dev)
continue;
- DBG("dev header type: %x\n", dev->hdr_type);
+ DBG(" dev header type: %x\n", dev->hdr_type);
+ }
+
+ /* Ally all fixups */
+ pcibios_fixup_of_probed_bus(bus);
+ /* Now scan child busses */
+ list_for_each_entry(dev, &bus->devices, bus_list) {
if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
- dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
- of_scan_pci_bridge(child, dev);
+ dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
+ struct device_node *child = pci_device_to_OF_node(dev);
+ if (dev)
+ of_scan_pci_bridge(child, dev);
+ }
}
-
- do_bus_setup(bus);
}
EXPORT_SYMBOL(of_scan_bus);
void __devinit of_scan_pci_bridge(struct device_node *node,
- struct pci_dev *dev)
+ struct pci_dev *dev)
{
struct pci_bus *bus;
const u32 *busrange, *ranges;
@@ -394,7 +398,6 @@ void __devinit of_scan_pci_bridge(struct
res->start = of_read_number(&ranges[1], 2);
res->end = res->start + size - 1;
res->flags = flags;
- fixup_resource(res, dev);
}
sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
bus->number);
@@ -643,51 +646,13 @@ int __devinit pcibios_map_io_space(struc
}
EXPORT_SYMBOL_GPL(pcibios_map_io_space);
-static void __devinit fixup_resource(struct resource *res, struct pci_dev *dev)
-{
- struct pci_controller *hose = pci_bus_to_host(dev->bus);
- unsigned long offset;
-
- if (res->flags & IORESOURCE_IO) {
- offset = (unsigned long)hose->io_base_virt - _IO_BASE;
- res->start += offset;
- res->end += offset;
- } else if (res->flags & IORESOURCE_MEM) {
- res->start += hose->pci_mem_offset;
- res->end += hose->pci_mem_offset;
- }
-}
-
-void __devinit pcibios_fixup_device_resources(struct pci_dev *dev,
- struct pci_bus *bus)
-{
- /* Update device resources. */
- int i;
-
- DBG("%s: Fixup resources:\n", pci_name(dev));
- for (i = 0; i < PCI_NUM_RESOURCES; i++) {
- struct resource *res = &dev->resource[i];
- if (!res->flags)
- continue;
-
- DBG(" 0x%02x < %08lx:0x%016lx...0x%016lx\n",
- i, res->flags, res->start, res->end);
-
- fixup_resource(res, dev);
-
- DBG(" > %08lx:0x%016lx...0x%016lx\n",
- res->flags, res->start, res->end);
- }
-}
-EXPORT_SYMBOL(pcibios_fixup_device_resources);
-
void __devinit pcibios_setup_new_device(struct pci_dev *dev)
{
struct dev_archdata *sd = &dev->dev.archdata;
sd->of_node = pci_device_to_OF_node(dev);
- DBG("PCI device %s OF node: %s\n", pci_name(dev),
+ DBG("PCI: device %s OF node: %s\n", pci_name(dev),
sd->of_node ? sd->of_node->full_name : "<none>");
sd->dma_ops = pci_dma_ops;
@@ -701,7 +666,7 @@ void __devinit pcibios_setup_new_device(
}
EXPORT_SYMBOL(pcibios_setup_new_device);
-static void __devinit do_bus_setup(struct pci_bus *bus)
+void __devinit pcibios_do_bus_setup(struct pci_bus *bus)
{
struct pci_dev *dev;
@@ -710,42 +675,7 @@ static void __devinit do_bus_setup(struc
list_for_each_entry(dev, &bus->devices, bus_list)
pcibios_setup_new_device(dev);
-
- /* Read default IRQs and fixup if necessary */
- list_for_each_entry(dev, &bus->devices, bus_list) {
- pci_read_irq_line(dev);
- if (ppc_md.pci_irq_fixup)
- ppc_md.pci_irq_fixup(dev);
- }
-}
-
-void __devinit pcibios_fixup_bus(struct pci_bus *bus)
-{
- struct pci_dev *dev = bus->self;
- struct device_node *np;
-
- np = pci_bus_to_OF_node(bus);
-
- DBG("pcibios_fixup_bus(%s)\n", np ? np->full_name : "<???>");
-
- if (dev && pci_probe_only &&
- (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
- /* This is a subordinate bridge */
-
- pci_read_bridge_bases(bus);
- pcibios_fixup_device_resources(dev, bus);
- }
-
- do_bus_setup(bus);
-
- if (!pci_probe_only)
- return;
-
- list_for_each_entry(dev, &bus->devices, bus_list)
- if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
- pcibios_fixup_device_resources(dev, bus);
}
-EXPORT_SYMBOL(pcibios_fixup_bus);
unsigned long pci_address_to_pio(phys_addr_t address)
{
Index: linux-merge/arch/powerpc/platforms/pseries/pci_dlpar.c
===================================================================
--- linux-merge.orig/arch/powerpc/platforms/pseries/pci_dlpar.c 2007-12-14 15:48:59.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/pseries/pci_dlpar.c 2007-12-14 15:49:31.000000000 +1100
@@ -83,7 +83,7 @@ EXPORT_SYMBOL_GPL(pcibios_remove_pci_dev
/* Must be called before pci_bus_add_devices */
void
-pcibios_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus)
+pcibios_fixup_new_pci_devices(struct pci_bus *bus)
{
struct pci_dev *dev;
@@ -98,8 +98,6 @@ pcibios_fixup_new_pci_devices(struct pci
/* Fill device archdata and setup iommu table */
pcibios_setup_new_device(dev);
- if(fix_bus)
- pcibios_fixup_device_resources(dev, bus);
pci_read_irq_line(dev);
for (i = 0; i < PCI_NUM_RESOURCES; i++) {
struct resource *r = &dev->resource[i];
@@ -132,8 +130,8 @@ pcibios_pci_config_bridge(struct pci_dev
pci_scan_child_bus(child_bus);
- /* Fixup new pci devices without touching bus struct */
- pcibios_fixup_new_pci_devices(child_bus, 0);
+ /* Fixup new pci devices */
+ pcibios_fixup_new_pci_devices(child_bus);
/* Make the discovered devices available */
pci_bus_add_devices(child_bus);
@@ -169,7 +167,7 @@ pcibios_add_pci_devices(struct pci_bus *
/* use ofdt-based probe */
of_scan_bus(dn, bus);
if (!list_empty(&bus->devices)) {
- pcibios_fixup_new_pci_devices(bus, 0);
+ pcibios_fixup_new_pci_devices(bus);
pci_bus_add_devices(bus);
eeh_add_device_tree_late(bus);
}
@@ -178,7 +176,7 @@ pcibios_add_pci_devices(struct pci_bus *
slotno = PCI_SLOT(PCI_DN(dn->child)->devfn);
num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0));
if (num) {
- pcibios_fixup_new_pci_devices(bus, 1);
+ pcibios_fixup_new_pci_devices(bus);
pci_bus_add_devices(bus);
eeh_add_device_tree_late(bus);
}
@@ -208,7 +206,7 @@ struct pci_controller * __devinit init_p
eeh_add_device_tree_early(dn);
scan_phb(phb);
- pcibios_fixup_new_pci_devices(phb->bus, 0);
+ pcibios_fixup_new_pci_devices(phb->bus);
pci_bus_add_devices(phb->bus);
eeh_add_device_tree_late(phb->bus);
Index: linux-merge/drivers/pci/hotplug/rpadlpar_core.c
===================================================================
--- linux-merge.orig/drivers/pci/hotplug/rpadlpar_core.c 2007-12-14 15:48:59.000000000 +1100
+++ linux-merge/drivers/pci/hotplug/rpadlpar_core.c 2007-12-14 15:49:31.000000000 +1100
@@ -155,7 +155,7 @@ static void dlpar_pci_add_bus(struct dev
dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
of_scan_pci_bridge(dn, dev);
- pcibios_fixup_new_pci_devices(dev->subordinate,0);
+ pcibios_fixup_new_pci_devices(dev->subordinate);
/* Claim new bus resources */
pcibios_claim_one_bus(dev->bus);
Index: linux-merge/include/asm-powerpc/machdep.h
===================================================================
--- linux-merge.orig/include/asm-powerpc/machdep.h 2007-12-14 15:48:59.000000000 +1100
+++ linux-merge/include/asm-powerpc/machdep.h 2007-12-14 15:49:31.000000000 +1100
@@ -205,13 +205,6 @@ struct machdep_calls {
* optional PCI "hooks"
*/
- /* Called after PPC generic resource fixup to perform
- machine specific fixups */
- void (*pcibios_fixup_resources)(struct pci_dev *);
-
- /* Called for each PCI bus in the system when it's probed */
- void (*pcibios_fixup_bus)(struct pci_bus *);
-
/* Called when pci_enable_device() is called (initial=0) or
* when a device with no assigned resource is found (initial=1).
* Returns 0 to allow assignment/enabling of the device. */
@@ -225,6 +218,13 @@ struct machdep_calls {
#endif /* CONFIG_PPC32 */
+ /* Called after PPC generic resource fixup to perform
+ machine specific fixups */
+ void (*pcibios_fixup_resources)(struct pci_dev *);
+
+ /* Called for each PCI bus in the system when it's probed */
+ void (*pcibios_fixup_bus)(struct pci_bus *);
+
/* Called to shutdown machine specific hardware not already controlled
* by other drivers.
*/
Index: linux-merge/include/asm-powerpc/pci-bridge.h
===================================================================
--- linux-merge.orig/include/asm-powerpc/pci-bridge.h 2007-12-14 15:49:30.000000000 +1100
+++ linux-merge/include/asm-powerpc/pci-bridge.h 2007-12-14 15:49:31.000000000 +1100
@@ -235,7 +235,7 @@ extern void pcibios_remove_pci_devices(s
/** Discover new pci devices under this bus, and add them */
extern void pcibios_add_pci_devices(struct pci_bus *bus);
-extern void pcibios_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus);
+extern void pcibios_fixup_new_pci_devices(struct pci_bus *bus);
extern int pcibios_remove_root_bus(struct pci_controller *phb);
Index: linux-merge/include/asm-powerpc/pci.h
===================================================================
--- linux-merge.orig/include/asm-powerpc/pci.h 2007-12-14 15:49:30.000000000 +1100
+++ linux-merge/include/asm-powerpc/pci.h 2007-12-14 15:49:31.000000000 +1100
@@ -196,9 +196,6 @@ static inline struct resource *pcibios_s
return root;
}
-extern void pcibios_fixup_device_resources(struct pci_dev *dev,
- struct pci_bus *bus);
-
extern void pcibios_setup_new_device(struct pci_dev *dev);
extern void pcibios_claim_one_bus(struct pci_bus *b);
@@ -226,5 +223,8 @@ extern void pci_resource_to_user(const s
const struct resource *rsrc,
resource_size_t *start, resource_size_t *end);
+extern void pcibios_do_bus_setup(struct pci_bus *bus);
+extern void pcibios_fixup_of_probed_bus(struct pci_bus *bus);
+
#endif /* __KERNEL__ */
#endif /* __ASM_POWERPC_PCI_H */
^ permalink raw reply
* [PATCH 9/19] [POWERPC] Merge PCI resource allocation & assignment
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
The 32 bits PCI code now uses the generic code for assigning unassigned
resources and an algorithm similar to x86 for claiming existing ones.
This works far better than the 64 bits code which basically can only
claim existing ones (pci_probe_only=1) or would fall appart completely.
This merges them so that the new 32 bits implementation is used for both.
64 bits now gets the new PCI flags for controlling the behaviour, though
the old pci_probe_only global is still there for now to be cleared if you
want to.
I kept a pcibios_claim_one_bus() function mostly based on the old 64
bits code for use by the DLPAR hotplug. This will have to be cleaned
up, thought I hope it will work in the meantime.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/kernel/pci-common.c | 292 ++++++++++++++++++++++++++++++++++
arch/powerpc/kernel/pci_32.c | 246 ----------------------------
arch/powerpc/kernel/pci_64.c | 118 +------------
arch/powerpc/platforms/powermac/pci.c | 3
include/asm-powerpc/pci.h | 8
5 files changed, 311 insertions(+), 356 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/pci-common.c 2007-12-14 15:49:31.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci-common.c 2007-12-14 15:49:32.000000000 +1100
@@ -53,6 +53,8 @@ static int global_phb_number; /* Global
/* ISA Memory physical address */
resource_size_t isa_mem_base;
+/* Default PCI flags is 0 */
+unsigned int ppc_pci_flags;
struct pci_controller *pcibios_alloc_controller(struct device_node *dev)
{
@@ -821,3 +823,293 @@ void __devinit pcibios_fixup_of_probed_b
{
__pcibios_fixup_bus(bus);
}
+
+static int skip_isa_ioresource_align(struct pci_dev *dev)
+{
+ if ((ppc_pci_flags & PPC_PCI_CAN_SKIP_ISA_ALIGN) &&
+ !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA))
+ return 1;
+ return 0;
+}
+
+/*
+ * We need to avoid collisions with `mirrored' VGA ports
+ * and other strange ISA hardware, so we always want the
+ * addresses to be allocated in the 0x000-0x0ff region
+ * modulo 0x400.
+ *
+ * Why? Because some silly external IO cards only decode
+ * the low 10 bits of the IO address. The 0x00-0xff region
+ * is reserved for motherboard devices that decode all 16
+ * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
+ * but we want to try to avoid allocating at 0x2900-0x2bff
+ * which might have be mirrored at 0x0100-0x03ff..
+ */
+void pcibios_align_resource(void *data, struct resource *res,
+ resource_size_t size, resource_size_t align)
+{
+ struct pci_dev *dev = data;
+
+ if (res->flags & IORESOURCE_IO) {
+ resource_size_t start = res->start;
+
+ if (skip_isa_ioresource_align(dev))
+ return;
+ if (start & 0x300) {
+ start = (start + 0x3ff) & ~0x3ff;
+ res->start = start;
+ }
+ }
+}
+EXPORT_SYMBOL(pcibios_align_resource);
+
+/*
+ * Reparent resource children of pr that conflict with res
+ * under res, and make res replace those children.
+ */
+static int __init reparent_resources(struct resource *parent,
+ struct resource *res)
+{
+ struct resource *p, **pp;
+ struct resource **firstpp = NULL;
+
+ for (pp = &parent->child; (p = *pp) != NULL; pp = &p->sibling) {
+ if (p->end < res->start)
+ continue;
+ if (res->end < p->start)
+ break;
+ if (p->start < res->start || p->end > res->end)
+ return -1; /* not completely contained */
+ if (firstpp == NULL)
+ firstpp = pp;
+ }
+ if (firstpp == NULL)
+ return -1; /* didn't find any conflicting entries? */
+ res->parent = parent;
+ res->child = *firstpp;
+ res->sibling = *pp;
+ *firstpp = res;
+ *pp = NULL;
+ for (p = res->child; p != NULL; p = p->sibling) {
+ p->parent = res;
+ DBG(KERN_INFO "PCI: reparented %s [%llx..%llx] under %s\n",
+ p->name,
+ (unsigned long long)p->start,
+ (unsigned long long)p->end, res->name);
+ }
+ return 0;
+}
+
+/*
+ * Handle resources of PCI devices. If the world were perfect, we could
+ * just allocate all the resource regions and do nothing more. It isn't.
+ * On the other hand, we cannot just re-allocate all devices, as it would
+ * require us to know lots of host bridge internals. So we attempt to
+ * keep as much of the original configuration as possible, but tweak it
+ * when it's found to be wrong.
+ *
+ * Known BIOS problems we have to work around:
+ * - I/O or memory regions not configured
+ * - regions configured, but not enabled in the command register
+ * - bogus I/O addresses above 64K used
+ * - expansion ROMs left enabled (this may sound harmless, but given
+ * the fact the PCI specs explicitly allow address decoders to be
+ * shared between expansion ROMs and other resource regions, it's
+ * at least dangerous)
+ *
+ * Our solution:
+ * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
+ * This gives us fixed barriers on where we can allocate.
+ * (2) Allocate resources for all enabled devices. If there is
+ * a collision, just mark the resource as unallocated. Also
+ * disable expansion ROMs during this step.
+ * (3) Try to allocate resources for disabled devices. If the
+ * resources were assigned correctly, everything goes well,
+ * if they weren't, they won't disturb allocation of other
+ * resources.
+ * (4) Assign new addresses to resources which were either
+ * not configured at all or misconfigured. If explicitly
+ * requested by the user, configure expansion ROM address
+ * as well.
+ */
+
+static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
+{
+ struct pci_bus *bus;
+ int i;
+ struct resource *res, *pr;
+
+ /* Depth-First Search on bus tree */
+ list_for_each_entry(bus, bus_list, node) {
+ for (i = 0; i < PCI_BUS_NUM_RESOURCES; ++i) {
+ if ((res = bus->resource[i]) == NULL || !res->flags
+ || res->start > res->end)
+ continue;
+ if (bus->parent == NULL)
+ pr = (res->flags & IORESOURCE_IO)?
+ &ioport_resource : &iomem_resource;
+ else {
+ /* Don't bother with non-root busses when
+ * re-assigning all resources. We clear the
+ * resource flags as if they were colliding
+ * and as such ensure proper re-allocation
+ * later.
+ */
+ if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_RSRC)
+ goto clear_resource;
+ pr = pci_find_parent_resource(bus->self, res);
+ if (pr == res) {
+ /* this happens when the generic PCI
+ * code (wrongly) decides that this
+ * bridge is transparent -- paulus
+ */
+ continue;
+ }
+ }
+
+ DBG("PCI: %s (bus %d) bridge rsrc %d: %016llx-%016llx "
+ "[0x%x], parent %p (%s)\n",
+ bus->self ? pci_name(bus->self) : "PHB",
+ bus->number, i,
+ (unsigned long long)res->start,
+ (unsigned long long)res->end,
+ (unsigned int)res->flags,
+ pr, (pr && pr->name) ? pr->name : "nil");
+
+ if (pr && !(pr->flags & IORESOURCE_UNSET)) {
+ if (request_resource(pr, res) == 0)
+ continue;
+ /*
+ * Must be a conflict with an existing entry.
+ * Move that entry (or entries) under the
+ * bridge resource and try again.
+ */
+ if (reparent_resources(pr, res) == 0)
+ continue;
+ }
+ printk(KERN_WARNING
+ "PCI: Cannot allocate resource region "
+ "%d of PCI bridge %d, will remap\n",
+ i, bus->number);
+clear_resource:
+ res->flags = 0;
+ }
+ pcibios_allocate_bus_resources(&bus->children);
+ }
+}
+
+static inline void __devinit alloc_resource(struct pci_dev *dev, int idx)
+{
+ struct resource *pr, *r = &dev->resource[idx];
+
+ DBG("PCI: Allocating %s: Resource %d: %016llx..%016llx [%x]\n",
+ pci_name(dev), idx,
+ (unsigned long long)r->start,
+ (unsigned long long)r->end,
+ (unsigned int)r->flags);
+
+ pr = pci_find_parent_resource(dev, r);
+ if (!pr || (pr->flags & IORESOURCE_UNSET) ||
+ request_resource(pr, r) < 0) {
+ printk(KERN_WARNING "PCI: Cannot allocate resource region %d"
+ " of device %s, will remap\n", idx, pci_name(dev));
+ if (pr)
+ DBG("PCI: parent is %p: %016llx-%016llx [%x]\n", pr,
+ (unsigned long long)pr->start,
+ (unsigned long long)pr->end,
+ (unsigned int)pr->flags);
+ /* We'll assign a new address later */
+ r->flags |= IORESOURCE_UNSET;
+ r->end -= r->start;
+ r->start = 0;
+ }
+}
+
+static void __init pcibios_allocate_resources(int pass)
+{
+ struct pci_dev *dev = NULL;
+ int idx, disabled;
+ u16 command;
+ struct resource *r;
+
+ for_each_pci_dev(dev) {
+ pci_read_config_word(dev, PCI_COMMAND, &command);
+ for (idx = 0; idx < 6; idx++) {
+ r = &dev->resource[idx];
+ if (r->parent) /* Already allocated */
+ continue;
+ if (!r->flags || (r->flags & IORESOURCE_UNSET))
+ continue; /* Not assigned at all */
+ if (r->flags & IORESOURCE_IO)
+ disabled = !(command & PCI_COMMAND_IO);
+ else
+ disabled = !(command & PCI_COMMAND_MEMORY);
+ if (pass == disabled)
+ alloc_resource(dev, idx);
+ }
+ if (pass)
+ continue;
+ r = &dev->resource[PCI_ROM_RESOURCE];
+ if (r->flags & IORESOURCE_ROM_ENABLE) {
+ /* Turn the ROM off, leave the resource region,
+ * but keep it unregistered.
+ */
+ u32 reg;
+ DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
+ r->flags &= ~IORESOURCE_ROM_ENABLE;
+ pci_read_config_dword(dev, dev->rom_base_reg, ®);
+ pci_write_config_dword(dev, dev->rom_base_reg,
+ reg & ~PCI_ROM_ADDRESS_ENABLE);
+ }
+ }
+}
+
+void __init pcibios_resource_survey(void)
+{
+ /* Allocate and assign resources. If we re-assign everything, then
+ * we skip the allocate phase
+ */
+ pcibios_allocate_bus_resources(&pci_root_buses);
+
+ if (!(ppc_pci_flags & PPC_PCI_REASSIGN_ALL_RSRC)) {
+ pcibios_allocate_resources(0);
+ pcibios_allocate_resources(1);
+ }
+
+ if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) {
+ DBG("PCI: Assigning unassigned resouces...\n");
+ pci_assign_unassigned_resources();
+ }
+
+ /* Call machine dependent fixup */
+ if (ppc_md.pcibios_fixup)
+ ppc_md.pcibios_fixup();
+}
+
+#ifdef CONFIG_HOTPLUG
+/* This is used by the pSeries hotplug driver to allocate resource
+ * of newly plugged busses. We can try to consolidate with the
+ * rest of the code later, for now, keep it as-is
+ */
+void __devinit pcibios_claim_one_bus(struct pci_bus *bus)
+{
+ struct pci_dev *dev;
+ struct pci_bus *child_bus;
+
+ list_for_each_entry(dev, &bus->devices, bus_list) {
+ int i;
+
+ for (i = 0; i < PCI_NUM_RESOURCES; i++) {
+ struct resource *r = &dev->resource[i];
+
+ if (r->parent || !r->start || !r->flags)
+ continue;
+ pci_claim_resource(dev, i);
+ }
+ }
+
+ list_for_each_entry(child_bus, &bus->children, node)
+ pcibios_claim_one_bus(child_bus);
+}
+EXPORT_SYMBOL_GPL(pcibios_claim_one_bus);
+#endif /* CONFIG_HOTPLUG */
Index: linux-merge/arch/powerpc/kernel/pci_32.c
===================================================================
--- linux-merge.orig/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:31.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:32.000000000 +1100
@@ -35,13 +35,9 @@ unsigned long isa_io_base = 0;
unsigned long pci_dram_offset = 0;
int pcibios_assign_bus_offset = 1;
-/* Default PCI flags is 0 */
-unsigned int ppc_pci_flags;
-
void pcibios_make_OF_bus_map(void);
static void fixup_broken_pcnet32(struct pci_dev* dev);
-static int reparent_resources(struct resource *parent, struct resource *res);
static void fixup_cpc710_pci64(struct pci_dev* dev);
#ifdef CONFIG_PPC_OF
static u8* pci_to_OF_bus_map;
@@ -97,170 +93,6 @@ fixup_cpc710_pci64(struct pci_dev* dev)
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CPC710_PCI64, fixup_cpc710_pci64);
-static int skip_isa_ioresource_align(struct pci_dev *dev)
-{
- if ((ppc_pci_flags & PPC_PCI_CAN_SKIP_ISA_ALIGN) &&
- !(dev->bus->bridge_ctl & PCI_BRIDGE_CTL_ISA))
- return 1;
- return 0;
-}
-
-/*
- * We need to avoid collisions with `mirrored' VGA ports
- * and other strange ISA hardware, so we always want the
- * addresses to be allocated in the 0x000-0x0ff region
- * modulo 0x400.
- *
- * Why? Because some silly external IO cards only decode
- * the low 10 bits of the IO address. The 0x00-0xff region
- * is reserved for motherboard devices that decode all 16
- * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
- * but we want to try to avoid allocating at 0x2900-0x2bff
- * which might have be mirrored at 0x0100-0x03ff..
- */
-void pcibios_align_resource(void *data, struct resource *res,
- resource_size_t size, resource_size_t align)
-{
- struct pci_dev *dev = data;
-
- if (res->flags & IORESOURCE_IO) {
- resource_size_t start = res->start;
-
- if (skip_isa_ioresource_align(dev))
- return;
- if (start & 0x300) {
- start = (start + 0x3ff) & ~0x3ff;
- res->start = start;
- }
- }
-}
-EXPORT_SYMBOL(pcibios_align_resource);
-
-/*
- * Handle resources of PCI devices. If the world were perfect, we could
- * just allocate all the resource regions and do nothing more. It isn't.
- * On the other hand, we cannot just re-allocate all devices, as it would
- * require us to know lots of host bridge internals. So we attempt to
- * keep as much of the original configuration as possible, but tweak it
- * when it's found to be wrong.
- *
- * Known BIOS problems we have to work around:
- * - I/O or memory regions not configured
- * - regions configured, but not enabled in the command register
- * - bogus I/O addresses above 64K used
- * - expansion ROMs left enabled (this may sound harmless, but given
- * the fact the PCI specs explicitly allow address decoders to be
- * shared between expansion ROMs and other resource regions, it's
- * at least dangerous)
- *
- * Our solution:
- * (1) Allocate resources for all buses behind PCI-to-PCI bridges.
- * This gives us fixed barriers on where we can allocate.
- * (2) Allocate resources for all enabled devices. If there is
- * a collision, just mark the resource as unallocated. Also
- * disable expansion ROMs during this step.
- * (3) Try to allocate resources for disabled devices. If the
- * resources were assigned correctly, everything goes well,
- * if they weren't, they won't disturb allocation of other
- * resources.
- * (4) Assign new addresses to resources which were either
- * not configured at all or misconfigured. If explicitly
- * requested by the user, configure expansion ROM address
- * as well.
- */
-
-static void __init
-pcibios_allocate_bus_resources(struct list_head *bus_list)
-{
- struct pci_bus *bus;
- int i;
- struct resource *res, *pr;
-
- /* Depth-First Search on bus tree */
- list_for_each_entry(bus, bus_list, node) {
- for (i = 0; i < 4; ++i) {
- if ((res = bus->resource[i]) == NULL || !res->flags
- || res->start > res->end)
- continue;
- if (bus->parent == NULL)
- pr = (res->flags & IORESOURCE_IO)?
- &ioport_resource : &iomem_resource;
- else {
- /* Don't bother with non-root busses when
- * re-assigning all resources.
- */
- if (ppc_pci_flags & PPC_PCI_REASSIGN_ALL_RSRC)
- continue;
- pr = pci_find_parent_resource(bus->self, res);
- if (pr == res) {
- /* this happens when the generic PCI
- * code (wrongly) decides that this
- * bridge is transparent -- paulus
- */
- continue;
- }
- }
-
- DBG("PCI: dev %s (bus 0x%02x) bridge rsrc %d: %016llx..%016llx "
- "(f:0x%08lx), parent %p\n",
- bus->self ? pci_name(bus->self) : "PHB", bus->number, i,
- (u64)res->start, (u64)res->end, res->flags, pr);
-
- if (pr && !(pr->flags & IORESOURCE_UNSET)) {
- if (request_resource(pr, res) == 0)
- continue;
- /*
- * Must be a conflict with an existing entry.
- * Move that entry (or entries) under the
- * bridge resource and try again.
- */
- if (reparent_resources(pr, res) == 0)
- continue;
- }
- printk(KERN_WARNING
- "PCI: Cannot allocate resource region "
- "%d of PCI bridge %d, will remap\n",
- i, bus->number);
- res->flags |= IORESOURCE_UNSET;
- }
- pcibios_allocate_bus_resources(&bus->children);
- }
-}
-
-/*
- * Reparent resource children of pr that conflict with res
- * under res, and make res replace those children.
- */
-static int __init
-reparent_resources(struct resource *parent, struct resource *res)
-{
- struct resource *p, **pp;
- struct resource **firstpp = NULL;
-
- for (pp = &parent->child; (p = *pp) != NULL; pp = &p->sibling) {
- if (p->end < res->start)
- continue;
- if (res->end < p->start)
- break;
- if (p->start < res->start || p->end > res->end)
- return -1; /* not completely contained */
- if (firstpp == NULL)
- firstpp = pp;
- }
- if (firstpp == NULL)
- return -1; /* didn't find any conflicting entries? */
- res->parent = parent;
- res->child = *firstpp;
- res->sibling = *pp;
- *firstpp = res;
- *pp = NULL;
- for (p = res->child; p != NULL; p = p->sibling) {
- p->parent = res;
- DBG(KERN_INFO "PCI: reparented %s [%llx..%llx] under %s\n",
- p->name, (u64)p->start, (u64)p->end, res->name);
- }
- return 0;
-}
void __init
update_bridge_resource(struct pci_dev *dev, struct resource *res)
@@ -318,63 +150,6 @@ update_bridge_resource(struct pci_dev *d
pci_write_config_word(dev, PCI_COMMAND, cmd);
}
-static inline void alloc_resource(struct pci_dev *dev, int idx)
-{
- struct resource *pr, *r = &dev->resource[idx];
-
- DBG("PCI: Allocating %s: Resource %d: %016llx..%016llx (f=%lx)\n",
- pci_name(dev), idx, (u64)r->start, (u64)r->end, r->flags);
- pr = pci_find_parent_resource(dev, r);
- if (!pr || (pr->flags & IORESOURCE_UNSET) || request_resource(pr, r) < 0) {
- printk(KERN_WARNING "PCI: Cannot allocate resource region %d"
- " of device %s, will remap\n", idx, pci_name(dev));
- if (pr)
- DBG("PCI: parent is %p: %016llx-%016llx (f=%lx)\n",
- pr, (u64)pr->start, (u64)pr->end, pr->flags);
- /* We'll assign a new address later */
- r->flags |= IORESOURCE_UNSET;
- r->end -= r->start;
- r->start = 0;
- }
-}
-
-static void __init
-pcibios_allocate_resources(int pass)
-{
- struct pci_dev *dev = NULL;
- int idx, disabled;
- u16 command;
- struct resource *r;
-
- for_each_pci_dev(dev) {
- pci_read_config_word(dev, PCI_COMMAND, &command);
- for (idx = 0; idx < 6; idx++) {
- r = &dev->resource[idx];
- if (r->parent) /* Already allocated */
- continue;
- if (!r->flags || (r->flags & IORESOURCE_UNSET))
- continue; /* Not assigned at all */
- if (r->flags & IORESOURCE_IO)
- disabled = !(command & PCI_COMMAND_IO);
- else
- disabled = !(command & PCI_COMMAND_MEMORY);
- if (pass == disabled)
- alloc_resource(dev, idx);
- }
- if (pass)
- continue;
- r = &dev->resource[PCI_ROM_RESOURCE];
- if (r->flags & IORESOURCE_ROM_ENABLE) {
- /* Turn the ROM off, leave the resource region, but keep it unregistered. */
- u32 reg;
- DBG("PCI: Switching off ROM of %s\n", pci_name(dev));
- r->flags &= ~IORESOURCE_ROM_ENABLE;
- pci_read_config_dword(dev, dev->rom_base_reg, ®);
- pci_write_config_dword(dev, dev->rom_base_reg,
- reg & ~PCI_ROM_ADDRESS_ENABLE);
- }
- }
-}
#ifdef CONFIG_PPC_OF
/*
@@ -649,8 +424,7 @@ void pcibios_make_OF_bus_map(void)
}
#endif /* CONFIG_PPC_OF */
-static int __init
-pcibios_init(void)
+static int __init pcibios_init(void)
{
struct pci_controller *hose, *tmp;
struct pci_bus *bus;
@@ -683,22 +457,8 @@ pcibios_init(void)
if (pci_assign_all_buses && have_of)
pcibios_make_OF_bus_map();
- /* Call machine dependent fixup */
- if (ppc_md.pcibios_fixup)
- ppc_md.pcibios_fixup();
-
- /* Allocate and assign resources. If we re-assign everything, then
- * we skip the allocate phase
- */
- pcibios_allocate_bus_resources(&pci_root_buses);
- if (!(ppc_pci_flags & PPC_PCI_REASSIGN_ALL_RSRC)) {
- pcibios_allocate_resources(0);
- pcibios_allocate_resources(1);
- }
- if (!(ppc_pci_flags & PPC_PCI_PROBE_ONLY)) {
- DBG("PCI: Assigning unassigned resouces...\n");
- pci_assign_unassigned_resources();
- }
+ /* Call common code to handle resource allocation */
+ pcibios_resource_survey();
/* Call machine dependent post-init code */
if (ppc_md.pcibios_after_init)
Index: linux-merge/arch/powerpc/kernel/pci_64.c
===================================================================
--- linux-merge.orig/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:31.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:32.000000000 +1100
@@ -75,85 +75,6 @@ static void fixup_broken_pcnet32(struct
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TRIDENT, PCI_ANY_ID, fixup_broken_pcnet32);
-/*
- * We need to avoid collisions with `mirrored' VGA ports
- * and other strange ISA hardware, so we always want the
- * addresses to be allocated in the 0x000-0x0ff region
- * modulo 0x400.
- *
- * Why? Because some silly external IO cards only decode
- * the low 10 bits of the IO address. The 0x00-0xff region
- * is reserved for motherboard devices that decode all 16
- * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
- * but we want to try to avoid allocating at 0x2900-0x2bff
- * which might have be mirrored at 0x0100-0x03ff..
- */
-void pcibios_align_resource(void *data, struct resource *res,
- resource_size_t size, resource_size_t align)
-{
- struct pci_dev *dev = data;
- struct pci_controller *hose = pci_bus_to_host(dev->bus);
- resource_size_t start = res->start;
- unsigned long alignto;
-
- if (res->flags & IORESOURCE_IO) {
- unsigned long offset = (unsigned long)hose->io_base_virt -
- _IO_BASE;
- /* Make sure we start at our min on all hoses */
- if (start - offset < PCIBIOS_MIN_IO)
- start = PCIBIOS_MIN_IO + offset;
-
- /*
- * Put everything into 0x00-0xff region modulo 0x400
- */
- if (start & 0x300)
- start = (start + 0x3ff) & ~0x3ff;
-
- } else if (res->flags & IORESOURCE_MEM) {
- /* Make sure we start at our min on all hoses */
- if (start - hose->pci_mem_offset < PCIBIOS_MIN_MEM)
- start = PCIBIOS_MIN_MEM + hose->pci_mem_offset;
-
- /* Align to multiple of size of minimum base. */
- alignto = max(0x1000UL, align);
- start = ALIGN(start, alignto);
- }
-
- res->start = start;
-}
-
-void __devinit pcibios_claim_one_bus(struct pci_bus *b)
-{
- struct pci_dev *dev;
- struct pci_bus *child_bus;
-
- list_for_each_entry(dev, &b->devices, bus_list) {
- int i;
-
- for (i = 0; i < PCI_NUM_RESOURCES; i++) {
- struct resource *r = &dev->resource[i];
-
- if (r->parent || !r->start || !r->flags)
- continue;
- pci_claim_resource(dev, i);
- }
- }
-
- list_for_each_entry(child_bus, &b->children, node)
- pcibios_claim_one_bus(child_bus);
-}
-#ifdef CONFIG_HOTPLUG
-EXPORT_SYMBOL_GPL(pcibios_claim_one_bus);
-#endif
-
-static void __init pcibios_claim_of_setup(void)
-{
- struct pci_bus *b;
-
- list_for_each_entry(b, &pci_root_buses, node)
- pcibios_claim_one_bus(b);
-}
-
static u32 get_int_prop(struct device_node *np, const char *name, u32 def)
{
const u32 *prop;
@@ -424,6 +345,7 @@ void __devinit scan_phb(struct pci_contr
DBG("Scanning PHB %s\n", node ? node->full_name : "<NO NAME>");
+ /* Create an empty bus for the toplevel */
bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, node);
if (bus == NULL) {
printk(KERN_ERR "Failed to create bus for PCI domain %04x\n",
@@ -433,26 +355,16 @@ void __devinit scan_phb(struct pci_contr
bus->secondary = hose->first_busno;
hose->bus = bus;
+ /* Get some IO space for the new PHB */
pcibios_map_io_space(bus);
+ /* Wire up PHB bus resources */
bus->resource[0] = res = &hose->io_resource;
- if (res->flags && request_resource(&ioport_resource, res)) {
- printk(KERN_ERR "Failed to request PCI IO region "
- "on PCI domain %04x\n", hose->global_number);
- DBG("res->start = 0x%016lx, res->end = 0x%016lx\n",
- res->start, res->end);
- }
-
- for (i = 0; i < 3; ++i) {
- res = &hose->mem_resources[i];
- bus->resource[i+1] = res;
- if (res->flags && request_resource(&iomem_resource, res))
- printk(KERN_ERR "Failed to request PCI memory region "
- "on PCI domain %04x\n", hose->global_number);
- }
+ for (i = 0; i < 3; ++i)
+ bus->resource[i+1] = &hose->mem_resources[i];
+ /* Get probe mode and perform scan */
mode = PCI_PROBE_NORMAL;
-
if (node && ppc_md.pci_probe_mode)
mode = ppc_md.pci_probe_mode(bus);
DBG(" probe mode: %d\n", mode);
@@ -469,12 +381,15 @@ static int __init pcibios_init(void)
{
struct pci_controller *hose, *tmp;
+ printk(KERN_INFO "PCI: Probing PCI hardware\n");
+
/* For now, override phys_mem_access_prot. If we need it,
* later, we may move that initialization to each ppc_md
*/
ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
- printk(KERN_DEBUG "PCI: Probing PCI hardware\n");
+ if (pci_probe_only)
+ ppc_pci_flags |= PPC_PCI_PROBE_ONLY;
/* Scan all of the recorded PCI controllers. */
list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
@@ -482,17 +397,8 @@ static int __init pcibios_init(void)
pci_bus_add_devices(hose->bus);
}
- if (pci_probe_only)
- pcibios_claim_of_setup();
- else
- /* FIXME: `else' will be removed when
- pci_assign_unassigned_resources() is able to work
- correctly with [partially] allocated PCI tree. */
- pci_assign_unassigned_resources();
-
- /* Call machine dependent final fixup */
- if (ppc_md.pcibios_fixup)
- ppc_md.pcibios_fixup();
+ /* Call common code to handle resource allocation */
+ pcibios_resource_survey();
printk(KERN_DEBUG "PCI: Probing PCI hardware done\n");
Index: linux-merge/arch/powerpc/platforms/powermac/pci.c
===================================================================
--- linux-merge.orig/arch/powerpc/platforms/powermac/pci.c 2007-12-14 15:49:29.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/powermac/pci.c 2007-12-14 15:49:32.000000000 +1100
@@ -994,9 +994,8 @@ void __init pmac_pci_init(void)
struct device_node *np, *root;
struct device_node *ht = NULL;
-#ifdef CONFIG_PPC32
ppc_pci_flags = PPC_PCI_CAN_SKIP_ISA_ALIGN;
-#endif
+
root = of_find_node_by_path("/");
if (root == NULL) {
printk(KERN_CRIT "pmac_pci_init: can't find root "
Index: linux-merge/include/asm-powerpc/pci.h
===================================================================
--- linux-merge.orig/include/asm-powerpc/pci.h 2007-12-14 15:49:31.000000000 +1100
+++ linux-merge/include/asm-powerpc/pci.h 2007-12-14 15:49:32.000000000 +1100
@@ -36,14 +36,10 @@ struct pci_dev;
/*
* Set this to 1 if you want the kernel to re-assign all PCI
- * bus numbers
+ * bus numbers (don't do that on ppc64 yet !)
*/
-#ifdef CONFIG_PPC64
-#define pcibios_assign_all_busses() 0
-#else
#define pcibios_assign_all_busses() (ppc_pci_flags & \
PPC_PCI_REASSIGN_ALL_BUS)
-#endif
#define pcibios_scan_all_fns(a, b) 0
static inline void pcibios_set_master(struct pci_dev *dev)
@@ -200,6 +196,8 @@ extern void pcibios_setup_new_device(str
extern void pcibios_claim_one_bus(struct pci_bus *b);
+extern void pcibios_resource_survey(void);
+
extern struct pci_controller *init_phb_dynamic(struct device_node *dn);
extern struct pci_dev *of_create_pci_dev(struct device_node *node,
^ permalink raw reply
* [PATCH 10/19] [POWERPC] fix iSeries PCI resource management
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
The way iSeries manages PCI IO and Memory resources is a bit strange
and is based on overriding the content of those resources with home
cooked ones afterward.
This changes it a bit to better integrate with the new resource handling
so that the "virtual" tokens that iSeries replaces resources with are
done from the proper per-device fixup hook, and bridge resources are
set to enclose that token space. This fixes various things such as
the output of /proc/iomem & ioports, among others. The patch also fixup
various boot messages as well.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/kernel/pci-common.c | 16 ++++
arch/powerpc/kernel/pci_64.c | 19 ++++-
arch/powerpc/platforms/iseries/pci.c | 123 +++++++++++++++++----------------
arch/powerpc/platforms/iseries/pci.h | 4 +
arch/powerpc/platforms/iseries/setup.c | 37 +++++----
5 files changed, 121 insertions(+), 78 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/pci-common.c 2007-12-14 15:49:32.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci-common.c 2007-12-14 15:49:33.000000000 +1100
@@ -190,6 +190,20 @@ int pci_read_irq_line(struct pci_dev *pc
struct of_irq oirq;
unsigned int virq;
+ /* The current device-tree that iSeries generates from the HV
+ * PCI informations doesn't contain proper interrupt routing,
+ * and all the fallback would do is print out crap, so we
+ * don't attempt to resolve the interrupts here at all, some
+ * iSeries specific fixup does it.
+ *
+ * In the long run, we will hopefully fix the generated device-tree
+ * instead.
+ */
+#ifdef CONFIG_PPC_ISERIES
+ if (firmware_has_feature(FW_FEATURE_ISERIES))
+ return -1;
+#endif
+
DBG("Try to map irq for %s...\n", pci_name(pci_dev));
#ifdef DEBUG
@@ -946,7 +960,7 @@ static void __init pcibios_allocate_bus_
|| res->start > res->end)
continue;
if (bus->parent == NULL)
- pr = (res->flags & IORESOURCE_IO)?
+ pr = (res->flags & IORESOURCE_IO) ?
&ioport_resource : &iomem_resource;
else {
/* Don't bother with non-root busses when
Index: linux-merge/arch/powerpc/kernel/pci_64.c
===================================================================
--- linux-merge.orig/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:32.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:33.000000000 +1100
@@ -343,7 +343,7 @@ void __devinit scan_phb(struct pci_contr
int i, mode;
struct resource *res;
- DBG("Scanning PHB %s\n", node ? node->full_name : "<NO NAME>");
+ DBG("PCI: Scanning PHB %s\n", node ? node->full_name : "<NO NAME>");
/* Create an empty bus for the toplevel */
bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, node);
@@ -359,9 +359,22 @@ void __devinit scan_phb(struct pci_contr
pcibios_map_io_space(bus);
/* Wire up PHB bus resources */
- bus->resource[0] = res = &hose->io_resource;
- for (i = 0; i < 3; ++i)
+ if (hose->io_resource.flags) {
+ DBG("PCI: PHB IO resource = %016lx-%016lx [%lx]\n",
+ hose->io_resource.start, hose->io_resource.end,
+ hose->io_resource.flags);
+ bus->resource[0] = res = &hose->io_resource;
+ }
+ for (i = 0; i < 3; ++i) {
+ DBG("PCI: PHB MEM resource %d = %016lx-%016lx [%lx]\n", i,
+ hose->mem_resources[i].start,
+ hose->mem_resources[i].end,
+ hose->mem_resources[i].flags);
bus->resource[i+1] = &hose->mem_resources[i];
+ }
+ DBG("PCI: PHB MEM offset = %016lx\n", hose->pci_mem_offset);
+ DBG("PCI: PHB IO offset = %08lx\n",
+ (unsigned long)hose->io_base_virt - _IO_BASE);
/* Get probe mode and perform scan */
mode = PCI_PROBE_NORMAL;
Index: linux-merge/arch/powerpc/platforms/iseries/pci.c
===================================================================
--- linux-merge.orig/arch/powerpc/platforms/iseries/pci.c 2007-12-14 15:48:59.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/iseries/pci.c 2007-12-14 15:49:33.000000000 +1100
@@ -20,6 +20,9 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
+
+#undef DEBUG
+
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/string.h>
@@ -58,6 +61,7 @@ static int limit_pci_retries = 1; /* Set
#define IOMM_TABLE_MAX_ENTRIES 1024
#define IOMM_TABLE_ENTRY_SIZE 0x0000000000400000UL
#define BASE_IO_MEMORY 0xE000000000000000UL
+#define END_IO_MEMORY 0xEFFFFFFFFFFFFFFFUL
static unsigned long max_io_memory = BASE_IO_MEMORY;
static long current_iomm_table_entry;
@@ -68,7 +72,6 @@ static long current_iomm_table_entry;
static struct device_node *iomm_table[IOMM_TABLE_MAX_ENTRIES];
static u8 iobar_table[IOMM_TABLE_MAX_ENTRIES];
-static const char pci_io_text[] = "iSeries PCI I/O";
static DEFINE_SPINLOCK(iomm_table_lock);
/*
@@ -279,8 +282,8 @@ out_free:
* PCI: Bus 0, Device 26, Vendor 0x12AE Frame 1, Card C10 Ethernet
* controller
*/
-static void __init iseries_device_information(struct pci_dev *pdev, int count,
- u16 bus, HvSubBusNumber subbus)
+static void __init iseries_device_information(struct pci_dev *pdev,
+ u16 bus, HvSubBusNumber subbus)
{
u8 frame = 0;
char card[4];
@@ -290,10 +293,9 @@ static void __init iseries_device_inform
ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus));
if (iseries_get_location_code(bus, agent, &frame, card)) {
- printk("%d. PCI: Bus%3d, Device%3d, Vendor %04X Frame%3d, "
- "Card %4s 0x%04X\n", count, bus,
- PCI_SLOT(pdev->devfn), pdev->vendor, frame,
- card, (int)(pdev->class >> 8));
+ printk(KERN_INFO "PCI: %s, Vendor %04X Frame%3d, "
+ "Card %4s 0x%04X\n", pci_name(pdev), pdev->vendor,
+ frame, card, (int)(pdev->class >> 8));
}
}
@@ -323,7 +325,6 @@ static void __init iomm_table_allocate_e
* Set Resource values.
*/
spin_lock(&iomm_table_lock);
- bar_res->name = pci_io_text;
bar_res->start = BASE_IO_MEMORY +
IOMM_TABLE_ENTRY_SIZE * current_iomm_table_entry;
bar_res->end = bar_res->start + bar_size - 1;
@@ -393,61 +394,63 @@ static struct device_node *find_device_n
}
/*
- * iSeries_pci_final_fixup(void)
+ * iSeries_pcibios_fixup_resources
+ *
+ * Fixes up all resources for devices
*/
-void __init iSeries_pci_final_fixup(void)
+void __init iSeries_pcibios_fixup_resources(struct pci_dev *pdev)
{
- struct pci_dev *pdev = NULL;
+ const u32 *agent;
+ const u32 *sub_bus;
+ unsigned char bus = pdev->bus->number;
struct device_node *node;
- int num_dev = 0;
-
- /* Fix up at the device node and pci_dev relationship */
- mf_display_src(0xC9000100);
+ int i;
- printk("pcibios_final_fixup\n");
- for_each_pci_dev(pdev) {
- const u32 *agent;
- const u32 *sub_bus;
- unsigned char bus = pdev->bus->number;
-
- node = find_device_node(bus, pdev->devfn);
- printk("pci dev %p (%x.%x), node %p\n", pdev, bus,
- pdev->devfn, node);
- if (!node) {
- printk("PCI: Device Tree not found for 0x%016lX\n",
- (unsigned long)pdev);
- continue;
- }
-
- agent = of_get_property(node, "linux,agent-id", NULL);
- sub_bus = of_get_property(node, "linux,subbus", NULL);
- if (agent && sub_bus) {
- u8 irq = iSeries_allocate_IRQ(bus, 0, *sub_bus);
- int err;
-
- err = HvCallXm_connectBusUnit(bus, *sub_bus,
- *agent, irq);
- if (err)
- pci_log_error("Connect Bus Unit",
- bus, *sub_bus, *agent, err);
- else {
- err = HvCallPci_configStore8(bus, *sub_bus,
+ node = find_device_node(bus, pdev->devfn);
+ pr_debug("PCI: iSeries %s, pdev %p, node %p\n",
+ pci_name(pdev), pdev, node);
+ if (!node) {
+ printk("PCI: %s disabled, device tree entry not found !\n",
+ pci_name(pdev));
+ for (i = 0; i <= PCI_ROM_RESOURCE; i++)
+ pdev->resource[i].flags = 0;
+ return;
+ }
+ sub_bus = of_get_property(node, "linux,subbus", NULL);
+ agent = of_get_property(node, "linux,agent-id", NULL);
+ if (agent && sub_bus) {
+ u8 irq = iSeries_allocate_IRQ(bus, 0, *sub_bus);
+ int err;
+
+ err = HvCallXm_connectBusUnit(bus, *sub_bus, *agent, irq);
+ if (err)
+ pci_log_error("Connect Bus Unit",
+ bus, *sub_bus, *agent, err);
+ else {
+ err = HvCallPci_configStore8(bus, *sub_bus,
*agent, PCI_INTERRUPT_LINE, irq);
- if (err)
- pci_log_error("PciCfgStore Irq Failed!",
+ if (err)
+ pci_log_error("PciCfgStore Irq Failed!",
bus, *sub_bus, *agent, err);
- else
- pdev->irq = irq;
- }
+ else
+ pdev->irq = irq;
}
-
- num_dev++;
- pdev->sysdata = node;
- PCI_DN(node)->pcidev = pdev;
- allocate_device_bars(pdev);
- iseries_device_information(pdev, num_dev, bus, *sub_bus);
- iommu_devnode_init_iSeries(pdev, node);
}
+
+ pdev->sysdata = node;
+ PCI_DN(node)->pcidev = pdev;
+ allocate_device_bars(pdev);
+ iseries_device_information(pdev, bus, *sub_bus);
+ iommu_devnode_init_iSeries(pdev, node);
+}
+
+/*
+ * iSeries_pci_final_fixup(void)
+ */
+void __init iSeries_pci_final_fixup(void)
+{
+ /* Fix up at the device node and pci_dev relationship */
+ mf_display_src(0xC9000100);
iSeries_activate_IRQs();
mf_display_src(0xC9000200);
}
@@ -894,10 +897,18 @@ void __init iSeries_pcibios_init(void)
/* All legacy iSeries PHBs are in domain zero */
phb->global_number = 0;
- phb->pci_mem_offset = bus;
phb->first_busno = bus;
phb->last_busno = bus;
phb->ops = &iSeries_pci_ops;
+ phb->io_base_virt = (void __iomem *)_IO_BASE;
+ phb->io_resource.flags = IORESOURCE_IO;
+ phb->io_resource.start = BASE_IO_MEMORY;
+ phb->io_resource.end = END_IO_MEMORY;
+ phb->io_resource.name = "iSeries PCI IO";
+ phb->mem_resources[0].flags = IORESOURCE_MEM;
+ phb->mem_resources[0].start = BASE_IO_MEMORY;
+ phb->mem_resources[0].end = END_IO_MEMORY;
+ phb->mem_resources[0].name = "Series PCI MEM";
}
of_node_put(root);
Index: linux-merge/arch/powerpc/platforms/iseries/pci.h
===================================================================
--- linux-merge.orig/arch/powerpc/platforms/iseries/pci.h 2007-12-14 15:48:59.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/iseries/pci.h 2007-12-14 15:49:33.000000000 +1100
@@ -43,12 +43,16 @@
#define ISERIES_GET_DEVICE_FROM_SUBBUS(subbus) ((subbus >> 5) & 0x7)
#define ISERIES_GET_FUNCTION_FROM_SUBBUS(subbus) ((subbus >> 2) & 0x7)
+struct pci_dev;
+
#ifdef CONFIG_PCI
extern void iSeries_pcibios_init(void);
extern void iSeries_pci_final_fixup(void);
+extern void iSeries_pcibios_fixup_resources(struct pci_dev *dev);
#else
static inline void iSeries_pcibios_init(void) { }
static inline void iSeries_pci_final_fixup(void) { }
+static inline void iSeries_pcibios_fixup_resources(struct pci_dev *dev) {}
#endif
#endif /* _PLATFORMS_ISERIES_PCI_H */
Index: linux-merge/arch/powerpc/platforms/iseries/setup.c
===================================================================
--- linux-merge.orig/arch/powerpc/platforms/iseries/setup.c 2007-12-14 15:48:59.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/iseries/setup.c 2007-12-14 15:49:33.000000000 +1100
@@ -639,24 +639,25 @@ static int __init iseries_probe(void)
}
define_machine(iseries) {
- .name = "iSeries",
- .setup_arch = iSeries_setup_arch,
- .show_cpuinfo = iSeries_show_cpuinfo,
- .init_IRQ = iSeries_init_IRQ,
- .get_irq = iSeries_get_irq,
- .init_early = iSeries_init_early,
- .pcibios_fixup = iSeries_pci_final_fixup,
- .restart = mf_reboot,
- .power_off = mf_power_off,
- .halt = mf_power_off,
- .get_boot_time = iSeries_get_boot_time,
- .set_rtc_time = iSeries_set_rtc_time,
- .get_rtc_time = iSeries_get_rtc_time,
- .calibrate_decr = generic_calibrate_decr,
- .progress = iSeries_progress,
- .probe = iseries_probe,
- .ioremap = iseries_ioremap,
- .iounmap = iseries_iounmap,
+ .name = "iSeries",
+ .setup_arch = iSeries_setup_arch,
+ .show_cpuinfo = iSeries_show_cpuinfo,
+ .init_IRQ = iSeries_init_IRQ,
+ .get_irq = iSeries_get_irq,
+ .init_early = iSeries_init_early,
+ .pcibios_fixup = iSeries_pci_final_fixup,
+ .pcibios_fixup_resources= iSeries_pcibios_fixup_resources,
+ .restart = mf_reboot,
+ .power_off = mf_power_off,
+ .halt = mf_power_off,
+ .get_boot_time = iSeries_get_boot_time,
+ .set_rtc_time = iSeries_set_rtc_time,
+ .get_rtc_time = iSeries_get_rtc_time,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = iSeries_progress,
+ .probe = iseries_probe,
+ .ioremap = iseries_ioremap,
+ .iounmap = iseries_iounmap,
/* XXX Implement enable_pmcs for iSeries */
};
^ permalink raw reply
* [PATCH 11/19] [POWERPC] Updates/fixes to 32 bits pcibios_enable_device()
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
Our implementation of pcibios_enable_device() incorrectly ignores
the mask argument and always checks that all resources have been
allocated which isn't the right thing to do anymore.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/kernel/pci_32.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:32.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:33.000000000 +1100
@@ -530,10 +530,16 @@ int pcibios_enable_device(struct pci_dev
pci_read_config_word(dev, PCI_COMMAND, &cmd);
old_cmd = cmd;
- for (idx=0; idx<6; idx++) {
+ for (idx = 0; idx < PCI_NUM_RESOURCES; idx++) {
+ /* Only set up the requested stuff */
+ if (!(mask & (1 << idx)))
+ continue;
r = &dev->resource[idx];
+ if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
+ continue;
if (r->flags & IORESOURCE_UNSET) {
- printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
+ printk(KERN_ERR "PCI: Device %s not available because"
+ " of resource collisions\n", pci_name(dev));
return -EINVAL;
}
if (r->flags & IORESOURCE_IO)
^ permalink raw reply
* [PATCH 12/19] [POWERPC] Merge 32 and 64 bits pcibios_enable_device
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
This merge the two implementations, based on the previously
fixed up 32 bits one. The pcibios_enable_device_hook in ppc_md
is now available for ppc64 use. Also remove the new unused
"initial" parameter from it and fixup users.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/kernel/pci-common.c | 38 +++++++++++++++++++++++++++++++++
arch/powerpc/kernel/pci_32.c | 37 --------------------------------
arch/powerpc/kernel/pci_64.c | 30 --------------------------
arch/powerpc/platforms/powermac/pci.c | 22 ++++++++-----------
arch/powerpc/platforms/powermac/pmac.h | 2 -
include/asm-powerpc/machdep.h | 10 +++-----
6 files changed, 53 insertions(+), 86 deletions(-)
--- linux-merge.orig/arch/powerpc/kernel/pci-common.c 2007-12-14 15:49:33.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci-common.c 2007-12-14 15:49:34.000000000 +1100
@@ -1127,3 +1127,41 @@ void __devinit pcibios_claim_one_bus(str
}
EXPORT_SYMBOL_GPL(pcibios_claim_one_bus);
#endif /* CONFIG_HOTPLUG */
+
+int pcibios_enable_device(struct pci_dev *dev, int mask)
+{
+ u16 cmd, old_cmd;
+ int idx;
+ struct resource *r;
+
+ if (ppc_md.pcibios_enable_device_hook)
+ if (ppc_md.pcibios_enable_device_hook(dev))
+ return -EINVAL;
+
+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
+ old_cmd = cmd;
+ for (idx = 0; idx < PCI_NUM_RESOURCES; idx++) {
+ /* Only set up the requested stuff */
+ if (!(mask & (1 << idx)))
+ continue;
+ r = &dev->resource[idx];
+ if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
+ continue;
+ if (r->flags & IORESOURCE_UNSET) {
+ printk(KERN_ERR "PCI: Device %s not available because"
+ " of resource collisions\n", pci_name(dev));
+ return -EINVAL;
+ }
+ if (r->flags & IORESOURCE_IO)
+ cmd |= PCI_COMMAND_IO;
+ if (r->flags & IORESOURCE_MEM)
+ cmd |= PCI_COMMAND_MEMORY;
+ }
+ if (cmd != old_cmd) {
+ printk("PCI: Enabling device %s (%04x -> %04x)\n",
+ pci_name(dev), old_cmd, cmd);
+ pci_write_config_word(dev, PCI_COMMAND, cmd);
+ }
+ return 0;
+}
+
Index: linux-merge/include/asm-powerpc/machdep.h
===================================================================
--- linux-merge.orig/include/asm-powerpc/machdep.h 2007-12-14 15:49:31.000000000 +1100
+++ linux-merge/include/asm-powerpc/machdep.h 2007-12-14 15:49:34.000000000 +1100
@@ -204,12 +204,6 @@ struct machdep_calls {
/*
* optional PCI "hooks"
*/
-
- /* Called when pci_enable_device() is called (initial=0) or
- * when a device with no assigned resource is found (initial=1).
- * Returns 0 to allow assignment/enabling of the device. */
- int (*pcibios_enable_device_hook)(struct pci_dev *, int initial);
-
/* Called in indirect_* to avoid touching devices */
int (*pci_exclude_device)(struct pci_controller *, unsigned char, unsigned char);
@@ -225,6 +219,10 @@ struct machdep_calls {
/* Called for each PCI bus in the system when it's probed */
void (*pcibios_fixup_bus)(struct pci_bus *);
+ /* Called when pci_enable_device() is called. Returns 0 to
+ * allow assignment/enabling of the device. */
+ int (*pcibios_enable_device_hook)(struct pci_dev *);
+
/* Called to shutdown machine specific hardware not already controlled
* by other drivers.
*/
Index: linux-merge/arch/powerpc/kernel/pci_32.c
===================================================================
--- linux-merge.orig/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:33.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_32.c 2007-12-14 15:49:34.000000000 +1100
@@ -518,43 +518,6 @@ pcibios_update_irq(struct pci_dev *dev,
/* XXX FIXME - update OF device tree node interrupt property */
}
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- u16 cmd, old_cmd;
- int idx;
- struct resource *r;
-
- if (ppc_md.pcibios_enable_device_hook)
- if (ppc_md.pcibios_enable_device_hook(dev, 0))
- return -EINVAL;
-
- pci_read_config_word(dev, PCI_COMMAND, &cmd);
- old_cmd = cmd;
- for (idx = 0; idx < PCI_NUM_RESOURCES; idx++) {
- /* Only set up the requested stuff */
- if (!(mask & (1 << idx)))
- continue;
- r = &dev->resource[idx];
- if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
- continue;
- if (r->flags & IORESOURCE_UNSET) {
- printk(KERN_ERR "PCI: Device %s not available because"
- " of resource collisions\n", pci_name(dev));
- return -EINVAL;
- }
- if (r->flags & IORESOURCE_IO)
- cmd |= PCI_COMMAND_IO;
- if (r->flags & IORESOURCE_MEM)
- cmd |= PCI_COMMAND_MEMORY;
- }
- if (cmd != old_cmd) {
- printk("PCI: Enabling device %s (%04x -> %04x)\n",
- pci_name(dev), old_cmd, cmd);
- pci_write_config_word(dev, PCI_COMMAND, cmd);
- }
- return 0;
-}
-
static struct pci_controller*
pci_bus_to_hose(int bus)
{
Index: linux-merge/arch/powerpc/kernel/pci_64.c
===================================================================
--- linux-merge.orig/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:33.000000000 +1100
+++ linux-merge/arch/powerpc/kernel/pci_64.c 2007-12-14 15:49:34.000000000 +1100
@@ -420,36 +420,6 @@ static int __init pcibios_init(void)
subsys_initcall(pcibios_init);
-int pcibios_enable_device(struct pci_dev *dev, int mask)
-{
- u16 cmd, oldcmd;
- int i;
-
- pci_read_config_word(dev, PCI_COMMAND, &cmd);
- oldcmd = cmd;
-
- for (i = 0; i < PCI_NUM_RESOURCES; i++) {
- struct resource *res = &dev->resource[i];
-
- /* Only set up the requested stuff */
- if (!(mask & (1<<i)))
- continue;
-
- if (res->flags & IORESOURCE_IO)
- cmd |= PCI_COMMAND_IO;
- if (res->flags & IORESOURCE_MEM)
- cmd |= PCI_COMMAND_MEMORY;
- }
-
- if (cmd != oldcmd) {
- printk(KERN_DEBUG "PCI: Enabling device: (%s), cmd %x\n",
- pci_name(dev), cmd);
- /* Enable the appropriate bits in the PCI command register. */
- pci_write_config_word(dev, PCI_COMMAND, cmd);
- }
- return 0;
-}
-
#ifdef CONFIG_HOTPLUG
int pcibios_unmap_io_space(struct pci_bus *bus)
Index: linux-merge/arch/powerpc/platforms/powermac/pci.c
===================================================================
--- linux-merge.orig/arch/powerpc/platforms/powermac/pci.c 2007-12-14 15:49:32.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/powermac/pci.c 2007-12-14 15:49:34.000000000 +1100
@@ -1058,8 +1058,7 @@ void __init pmac_pci_init(void)
#endif
}
-int
-pmac_pci_enable_device_hook(struct pci_dev *dev, int initial)
+int pmac_pci_enable_device_hook(struct pci_dev *dev)
{
struct device_node* node;
int updatecfg = 0;
@@ -1101,26 +1100,25 @@ pmac_pci_enable_device_hook(struct pci_d
updatecfg = 1;
}
+ /*
+ * Fixup various header fields on 32 bits. We don't do that on
+ * 64 bits as some of these have strange values behind the HT
+ * bridge and we must not, for example, enable MWI or set the
+ * cache line size on them.
+ */
+#ifdef CONFIG_PPC32
if (updatecfg) {
u16 cmd;
- /*
- * Make sure PCI is correctly configured
- *
- * We use old pci_bios versions of the function since, by
- * default, gmac is not powered up, and so will be absent
- * from the kernel initial PCI lookup.
- *
- * Should be replaced by 2.4 new PCI mechanisms and really
- * register the device.
- */
pci_read_config_word(dev, PCI_COMMAND, &cmd);
cmd |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
| PCI_COMMAND_INVALIDATE;
pci_write_config_word(dev, PCI_COMMAND, cmd);
pci_write_config_byte(dev, PCI_LATENCY_TIMER, 16);
+
pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE,
L1_CACHE_BYTES >> 2);
+#endif
}
return 0;
Index: linux-merge/arch/powerpc/platforms/powermac/pmac.h
===================================================================
--- linux-merge.orig/arch/powerpc/platforms/powermac/pmac.h 2007-12-14 15:48:58.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/powermac/pmac.h 2007-12-14 15:49:34.000000000 +1100
@@ -26,7 +26,7 @@ extern void pmac_pci_init(void);
extern void pmac_nvram_update(void);
extern unsigned char pmac_nvram_read_byte(int addr);
extern void pmac_nvram_write_byte(int addr, unsigned char val);
-extern int pmac_pci_enable_device_hook(struct pci_dev *dev, int initial);
+extern int pmac_pci_enable_device_hook(struct pci_dev *dev);
extern void pmac_pcibios_after_init(void);
extern int of_show_percpuinfo(struct seq_file *m, int i);
^ permalink raw reply
* [PATCH 13/19] [POWERPC] Fixup powermac enable device hook
From: Benjamin Herrenschmidt @ 2007-12-20 3:54 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <1198122881.874131.56762399546.qpush@grosgo>
Powermac's use of the pcibios_enable_device_hook() got slightly
broken by the recent PCI merge in that it won't be called for
the "initial" case of assigning resources to a previously
unassigned device. This was an abuse of that hook anyway, so
instead we now use a header quirk.
While at it, we move a #ifdef CONFIG_PPC32 to enclose more code
that is only ever used on 32 bits.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/platforms/powermac/pci.c | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
--- linux-merge.orig/arch/powerpc/platforms/powermac/pci.c 2007-12-14 15:49:34.000000000 +1100
+++ linux-merge/arch/powerpc/platforms/powermac/pci.c 2007-12-14 15:49:34.000000000 +1100
@@ -1058,6 +1058,7 @@ void __init pmac_pci_init(void)
#endif
}
+#ifdef CONFIG_PPC32
int pmac_pci_enable_device_hook(struct pci_dev *dev)
{
struct device_node* node;
@@ -1106,7 +1107,6 @@ int pmac_pci_enable_device_hook(struct p
* bridge and we must not, for example, enable MWI or set the
* cache line size on them.
*/
-#ifdef CONFIG_PPC32
if (updatecfg) {
u16 cmd;
@@ -1118,12 +1118,23 @@ int pmac_pci_enable_device_hook(struct p
pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE,
L1_CACHE_BYTES >> 2);
-#endif
}
return 0;
}
+void __devinit pmac_pci_fixup_ohci(struct pci_dev *dev)
+{
+ struct device_node *node = pci_device_to_OF_node(dev);
+
+ /* We don't want to assign resources to USB controllers
+ * absent from the OF tree (iBook second controller)
+ */
+ if (dev->class == PCI_CLASS_SERIAL_USB_OHCI && !node)
+ dev->resource[0].flags = 0;
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_APPLE, PCI_ANY_ID, pmac_pci_fixup_ohci);
+
/* We power down some devices after they have been probed. They'll
* be powered back on later on
*/
@@ -1171,7 +1182,6 @@ void __init pmac_pcibios_after_init(void
of_node_put(nd);
}
-#ifdef CONFIG_PPC32
void pmac_pci_fixup_cardbus(struct pci_dev* dev)
{
if (!machine_is(powermac))
@@ -1259,7 +1269,7 @@ void pmac_pci_fixup_pciata(struct pci_de
}
}
DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata);
-#endif
+#endif /* CONFIG_PPC32 */
/*
* Disable second function on K2-SATA, it's broken
^ permalink raw reply
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