* Re: [PATCH 0/5] Version 17, series to add device tree naming to i2c
From: Jean Delvare @ 2008-01-10 16:14 UTC (permalink / raw)
To: Jon Smirl; +Cc: linuxppc-dev, i2c
In-Reply-To: <9e4733910801100614y7522a573qb2af41a714b08d5@mail.gmail.com>
On Thu, 10 Jan 2008 09:14:26 -0500, Jon Smirl wrote:
> What is the review status of this series, should I post it again?
No please! /o\
I'll go through your numerous past posts now, stay tuned.
--
Jean Delvare
^ permalink raw reply
* Re: [PATCH v2] [POWERPC] Update MPC8610 HPCD to support audio drivers
From: Grant Likely @ 2008-01-10 16:35 UTC (permalink / raw)
To: Timur Tabi; +Cc: liam.girdwood, alsa-devel, linuxppc-dev
In-Reply-To: <1199732204578-git-send-email-timur@freescale.com>
On 1/7/08, Timur Tabi <timur@freescale.com> wrote:
> Update the MPC8610 HPCD files to support the audio driver. Update
> booting-without-of.txt with information on the SSI device.
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
>
> Updated based on comments from mailing lists. Split the patch into two parts.
>
> This patch applies on top of
> git://git.kernel.org/pub/scm/linux/kernel/git/perex/alsa.git.
>
> Documentation/powerpc/booting-without-of.txt | 40 ++++++
> arch/powerpc/boot/dts/mpc8610_hpcd.dts | 110 ++++++++++++++++-
> arch/powerpc/configs/mpc8610_hpcd_defconfig | 171 +++++++++++++++++++++++++-
> arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 18 +++
> 4 files changed, 335 insertions(+), 4 deletions(-)
>
> diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
> index e9a3cb1..826af91 100644
> --- a/Documentation/powerpc/booting-without-of.txt
> +++ b/Documentation/powerpc/booting-without-of.txt
> @@ -53,6 +53,7 @@ Table of Contents
> j) CFI or JEDEC memory-mapped NOR flash
> k) Global Utilities Block
> l) Xilinx IP cores
> + p) Freescale Synchronous Serial Interface
>
> VII - Specifying interrupt information for devices
> 1) interrupts property
> @@ -2514,6 +2515,45 @@ platforms are moved over to use the flattened-device-tree model.
> Requred properties:
> - current-speed : Baud rate of uartlite
>
> + p) Freescale Synchronous Serial Interface
> +
> + The SSI is a serial device that communicates with audio codecs. It can
> + be programmed in AC97, I2S, left-justified, or right-justified modes.
> +
> + Required properties:
> + - compatible : compatible list, containing "fsl,ssi"
> + - cell-index : the SSI, <0> = SSI1, <1> = SSI2, and so on
> + - reg : offset and length of the register set for the device
> + - interrupts : <a b> where a is the interrupt number and b is a
> + field that represents an encoding of the sense and
> + level information for the interrupt. This should be
> + encoded based on the information in section 2)
> + depending on the type of interrupt controller you
> + have.
> + - interrupt-parent : the phandle for the interrupt controller that
> + services interrupts for this device.
> + - fsl,mode : the operating mode for the SSI interface
> + "i2s-slave" - I2S mode, SSI is clock slave
> + "i2s-master" - I2S mode, SSI is clock master
> + "lj-slave" - left-justified mode, SSI is clock slave
> + "lj-master" - l.j. mode, SSI is clock master
> + "rj-slave" - right-justified mode, SSI is clock slave
> + "rj-master" - r.j., SSI is clock master
> + "ac97-slave" - AC97 mode, SSI is clock slave
> + "ac97-master" - AC97 mode, SSI is clock master
> +
> + Optional properties:
> + - codec : child node that defines an audio codec connected
> + to this SSI
> +
> + Child 'codec' node required properties:
> + - compatible : compatible list, contains the name of the codec
> +
> + Child 'codec' node optional properties:
> + - bus-frequency : The frequency of the input clock, which typically
> + comes from an on-board dedicated oscillator.
> +
> +
> More devices will be defined as this spec matures.
>
> VII - Specifying interrupt information for devices
> diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
> index 966edf1..fda0ace 100644
> --- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
> +++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
> @@ -1,7 +1,7 @@
> /*
> * MPC8610 HPCD Device Tree Source
> *
> - * Copyright 2007 Freescale Semiconductor Inc.
> + * Copyright 2007-2008 Freescale Semiconductor Inc.
> *
> * This program is free software; you can redistribute it and/or modify it
> * under the terms of the GNU General Public License Version 2 as published
> @@ -42,6 +42,7 @@
> #size-cells = <1>;
> #interrupt-cells = <2>;
> device_type = "soc";
> + compatible = "fsl,mpc8610";
Something like "fsl,mpc8610-immr" might be a better choice here. This
node doesn't actually describe the entire chip (for example, the PPC
cores are in the cpus node); but it does describe the internally
memory mapped registers.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH 1/8] pseries: phyp dump: Docmentation
From: Linas Vepstas @ 2008-01-10 16:34 UTC (permalink / raw)
To: Olof Johansson; +Cc: mahuja, linuxppc-dev, lkessler, Nathan Lynch, strosake
In-Reply-To: <20080110162120.GA4831@lixom.net>
On 10/01/2008, Olof Johansson <olof@lixom.net> wrote:
> On Wed, Jan 09, 2008 at 10:12:13PM -0600, Linas Vepstas wrote:
> > On 09/01/2008, Olof Johansson <olof@lixom.net> wrote:
> > > On Wed, Jan 09, 2008 at 08:33:53PM -0600, Linas Vepstas wrote:
> > >
> > > > Heh. That's the elbow-grease of this thing. The easy part is to get
> > > > the core function working. The hard part is to test these various configs,
> > > > and when they don't work, figure out what went wrong. That will take
> > > > perseverence and brains.
> > >
> > > This just sounds like a whole lot of extra work to get a feature that
> > > already exists.
> >
> > Well, no. kexec is horribly ill-behaved with respect to PCI. The
> > kexec kernel starts running with PCI devices in some random
> > state; maybe they're DMA'ing or who knows what. kexec tries
> > real hard to whack a few needed pci devices into submission
> > but it has been hit-n-miss, and the source of 90% of the kexec
> > headaches and debugging effort. Its not pretty.
>
> It surprises me that this hasn't been possible to resolve with less than
> architecting a completely new interface, given that the platform has
> all this fancy support for isolating and resetting adapters. After all,
> the exact same thing has to be done by the hypervisor before rebooting
> the partition.
OK, point taken.
-- The phyp interfaces are there for AIX, which I guess must
not have kexec-like ability. So this is a case of Linux leveraging
a feature architected for AIX.
-- There's also this idea, somewhat weak, that the crash may
have corrupted the ram where the kexec kernel sits.
For someone who is used to seeing crashes due to
null pointer deref's, this seems fairly unlikely. But perhaps
crashes in production systems are more mind-bending.
(we did have a case where a USB stick used for boot
continued to scribble on memory long after it was
supposed to be quiet and unused. This resulted in
a very hard to debug crash.)
A solution to a corrupted
kexec kernel would be to disable memory access to
where kexec sits, e.g un-mapping or making r/o the
pages where it lies. This begs the questions of "who
unhides the kexec kernel", and "what if this 'who' gets
corrupted"?
In short, the kexec kernel does not boot
exactly the same as a cold boot, and so this opens
a can of worms about "well, what's different, how do
we minimize these differences, etc." and I think that
lead AIX to punt, and say "lets just use one single,
well-known boot loader/ boot sequence instead of
inventing a new one", thus leading to the phyp design.
But that's just my guess.. :-)
--linas
^ permalink raw reply
* Re: [PATCH 1/8] pseries: phyp dump: Docmentation
From: Olof Johansson @ 2008-01-10 16:21 UTC (permalink / raw)
To: Linas Vepstas; +Cc: mahuja, linuxppc-dev, lkessler, Nathan Lynch, strosake
In-Reply-To: <3ae3aa420801092012m5e47cbd7lc7a5f91842074af7@mail.gmail.com>
On Wed, Jan 09, 2008 at 10:12:13PM -0600, Linas Vepstas wrote:
> On 09/01/2008, Olof Johansson <olof@lixom.net> wrote:
> > On Wed, Jan 09, 2008 at 08:33:53PM -0600, Linas Vepstas wrote:
> >
> > > Heh. That's the elbow-grease of this thing. The easy part is to get
> > > the core function working. The hard part is to test these various configs,
> > > and when they don't work, figure out what went wrong. That will take
> > > perseverence and brains.
> >
> > This just sounds like a whole lot of extra work to get a feature that
> > already exists.
>
> Well, no. kexec is horribly ill-behaved with respect to PCI. The
> kexec kernel starts running with PCI devices in some random
> state; maybe they're DMA'ing or who knows what. kexec tries
> real hard to whack a few needed pci devices into submission
> but it has been hit-n-miss, and the source of 90% of the kexec
> headaches and debugging effort. Its not pretty.
It surprises me that this hasn't been possible to resolve with less than
architecting a completely new interface, given that the platform has
all this fancy support for isolating and resetting adapters. After all,
the exact same thing has to be done by the hypervisor before rebooting
the partition.
> If all pci-host bridges could shut-down or settle the bus, and
> raise the #RST line high, and then if all BIOS'es supported
> this, you'd be right. But they can't ....
This argument doesn't hold. We're not talking about some generic PC with
a crappy BIOS here, we're specifically talking about POWER6 PHYP. It
certainly already has ways to reset adapters in it, or EEH wouldn't
work. Actually, the whole phyp dump feature wouldn't work either, since
it's exactly what the firmware has to do under the covers as well.
-Olof
^ permalink raw reply
* Re: [alsa-devel] [PATCH] ASoC drivers for the Freescale MPC8610 SoC
From: Timur Tabi @ 2008-01-10 16:03 UTC (permalink / raw)
To: Grant Likely
Cc: alsa-devel, Liam Girdwood, linuxppc-dev, Olof Johansson, david
In-Reply-To: <fa686aa40801100801p3da98eecn44401b17fe652da8@mail.gmail.com>
Grant Likely wrote:
> The driver doesn't need to be 100% correct. Drivers are easy to
> change if they aren't quite right. There are no long term
> consequences.
>
> However, the device tree issues must be addressed before it is merged
> and deployed. Otherwise we end up having to support poorly designed
> trees over the long term.
I agree. Correct me if I'm wrong, but I think the only device tree "issue" is
the definition of the 'codec' node under the SSI node. If so, I'm not sure what
other changes need to be mode.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Please pull linux-2.6-mpc52xx for-2.6.24
From: Grant Likely @ 2008-01-10 16:04 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev
Paul,
Can you please pull this tree to get an Efika boot fix into 2.6.24.
Without this fix, Ethernet on the Efika will not work without the user
jumping through all kinds of hoops.
Thanks,
g.
The following changes since commit fd0b45dfd1858c6b49d06355a460bcf36d654c06:
Linus Torvalds (1):
Merge git://git.kernel.org/.../davem/net-2.6
are available in the git repository at:
git://git.secretlab.ca/git/linux-2.6-mpc52xx.git for-2.6.24
Olaf Hering (1):
[POWERPC] efika: add phy-handle property for fec_mpc52xx
arch/powerpc/kernel/prom_init.c | 39 +++++++++++++++++++++++++++++++++++++++
1 files changed, 39 insertions(+), 0 deletions(-)
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [alsa-devel] [PATCH] ASoC drivers for the Freescale MPC8610 SoC
From: Grant Likely @ 2008-01-10 16:01 UTC (permalink / raw)
To: Timur Tabi; +Cc: alsa-devel, Liam Girdwood, linuxppc-dev, Olof Johansson, david
In-Reply-To: <47863C31.50309@freescale.com>
On 1/10/08, Timur Tabi <timur@freescale.com> wrote:
> Liam Girdwood wrote:
>
> > I think we are probably looking at submission in the next 8 - 10 weeks.
> > Currently most of the core code is complete, however some platforms and
> > codecs still need porting.
>
> With that in mind, can I get some kind of consensus from the PPC side as to
> whether this ASoC V1 driver is okay? I want to get it into 2.6.25.
>
> Keep in mind:
>
> 1) ASoC V1 is not PowerPC-friendly, so it's impossible to make an ASoC V1
> PowerPC driver "100% correct".
The driver doesn't need to be 100% correct. Drivers are easy to
change if they aren't quite right. There are no long term
consequences.
However, the device tree issues must be addressed before it is merged
and deployed. Otherwise we end up having to support poorly designed
trees over the long term.
So, I'm okay with merging the driver *minus* the .dts and
booting-without-of.txt changes.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* 2.6.22-ppc8xx fec.c bugs
From: raul.moreno @ 2008-01-10 15:57 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <OF9B97E7E0.352B883F-ONC12573CA.0058283E-C12573CA.005AFC5C@abengoa.com>
Hello everyone,
I don't know who the maintainer of the FEC (Fast Ethernet Controller) i=
n
the ppc8xx achitecture is, so I am writing this email here.
After spending some time working withy kernel 2.6.15 for the ppc8xx
architecture, I've recently started to port to the 2.6.22. Doing so I h=
ave
found some bugs in the code managing the FEC (fec.c).
First I found (and cleared) some compilation errors due to inconsistent=
changes in function prototypes (i.e. INIT_WORK). Moreover, if the "MDIO=
for
PHY" configuration is used (in my case for an LXT971 fec) the kernel
couldn't manage to finish booting and was caught in an infinite loop
waiting for fec intialization.
I've seen that some bugs were fixed in the latest kernel but others hav=
en't
been addressed (possibly undetected yet). The following is a diff with
corrections I made to the 2.6.22 'fec.c' file (currently seems to work
fine).
883a884
> #ifdef PHY_INTERRUPT
884a886,888
> #else
> fep->link =3D 1; /* If PHY_INTERRUPT is not defined, fep->link=
must
be also put to 1 */
> #endif
1077c1082
< #endif /* CONFIG_FEC_LXT970 */
---
> #endif /* CONFIG_FEC_LXT971 */
1281c1286
< container_of(work, struct fec_enet_private, phy_task);
---
> container_of(work, struct fec_enet_private, phy_task2);
/* use phy_task2 -->config */
1660c1665,1666
< cbd_base =3D (cbd_t *)dma_alloc_coherent(dev->class_dev.dev, PAGE=
_SIZE,
---
> /* The first parameter has changed */
> cbd_base =3D (cbd_t *)dma_alloc_coherent(&dev->dev, PAGE_SIZE,
1676,1678c1682,1684
< ba =3D (unsigned char *)dma_alloc_coherent(dev->class_dev.d=
ev,
---
> /* The first parameter has changed */
> ba =3D (unsigned char *)dma_alloc_coherent(&dev->dev,
1814,1816c1821,1824
< #ifdef CONFIG_USE_MDIO
< INIT_WORK(&fep->phy_task, mii_relink, (void *)dev);
< INIT_WORK(&fep->phy_task2, mii_display_config, (void *)dev);
---
> #ifdef CONFIG_USE_MDIO /* INIT_WORK has only two parameter=
since 2.6.20 */
> INIT_WORK(&fep->phy_task, mii_relink);
> INIT_WORK(&fep->phy_task2, mii_display_config);
I hope this helps.
Best regards,
Ra=FAl Moreno=
^ permalink raw reply
* Re: Linux for ml310
From: Grant Likely @ 2008-01-10 15:48 UTC (permalink / raw)
To: Joachim Meyer; +Cc: linuxppc-embedded
In-Reply-To: <526334208@web.de>
On 1/10/08, Joachim Meyer <Jogi95@web.de> wrote:
> Big thx...it works
Congratulations! Have fun.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: Toolchain for Freescale e200
From: Kumar Gala @ 2008-01-10 15:46 UTC (permalink / raw)
To: Per-Erik Johansson; +Cc: linuxppc-embedded
In-Reply-To: <1526.213.15.68.47.1199872028.squirrel@webmail.chalmers.se>
On Jan 9, 2008, at 3:47 AM, Per-Erik Johansson wrote:
> Hi
>
> I need a new toolchain since my old one hasn't got support for the
> (as)
> -me200 and book-e stuff I need to compile a kernel for the e200 core.
> What flags do I specify to get what I need?
> --target=powerpc-e200-linux-gnu --with-cpu=?? --enable-threads=posix
> --enable-languages=c,c++ --with-gnu-as --with-gnu-ld
> And should I use a particular version of gcc, binutils..?
>
> I'm not that familiar with building cross-toolchains, have tried with
> tools like crosstool and buildroot but cant seem to get it to build
> what I
> need.
>> From what I understand the e200 and e500 are code compatible so
>> maybe I
> could a toolchain for e500 instead, --with-cpu=8540?
> Any help is much appreciated!
if you aren't using VLE than an e500 toolchain should be sufficient.
- k
^ permalink raw reply
* Re: [PATCH 1/3] [NET] phy/fixed.c: rework to not duplicate PHY layerfunctionality
From: Anton Vorontsov @ 2008-01-10 15:53 UTC (permalink / raw)
To: Paul Mackerras, Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <003c01c84a3e$15d3a9c0$02ac10ac@Jocke>
On Sat, Dec 29, 2007 at 06:13:08PM +0100, Joakim Tjernlund wrote:
> > -----Original Message-----
> > From:
> > linuxppc-dev-bounces+joakim.tjernlund=transmode.se@ozlabs.org
> > [mailto:linuxppc-dev-bounces+joakim.tjernlund=transmode.se@ozl
> > abs.org] On Behalf Of Vitaly Bordug
> > Sent: den 6 december 2007 23:51
> > To: Paul Mackerras
> > Cc: netdev@vger.kernel.org; linuxppc-dev
> > Subject: [PATCH 1/3] [NET] phy/fixed.c: rework to not
> > duplicate PHY layerfunctionality
> >
> >
> > With that patch fixed.c now fully emulates MDIO bus, thus no need
> > to duplicate PHY layer functionality. That, in turn, drastically
> > simplifies the code, and drops down line count.
> >
> > As an additional bonus, now there is no need to register MDIO bus
> > for each PHY, all emulated PHYs placed on the platform fixed MDIO bus.
> > There is also no more need to pre-allocate PHYs via .config option,
> > this is all now handled dynamically.
> >
> >
> > Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> > Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
> > Acked-by: Jeff Garzik <jeff@garzik.org>
>
> What happened to this patch set? Is it sitting in a tree somewhere waiting
> for 2.4.25 or does it need more work?
^ we're too late then. ;-)
Patches already began to fuzz at the fsl_soc.c, yet more time and
they'll reject to apply. So.. Paul, Kumar can we get this in for
2.6.25?
I believe afterward this one will need some attention too:
http://ozlabs.org/pipermail/linuxppc-dev/2007-December/048473.html
Thanks in advance,
p.s. I just noticed that "fsl_soc: add support for gianfar for
fixed-link .." patch could be cosmetically improved (removing
casts, adding checks for size after the of_get_property), but I
hope we can do this on top of already applied patches.
Thanks again,
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: Linux for ml310
From: Joachim Meyer @ 2008-01-10 15:44 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-embedded
Big thx...it works
Greez
Joachim
_____________________________________________________________________
Der WEB.DE SmartSurfer hilft bis zu 70% Ihrer Onlinekosten zu sparen!
http://smartsurfer.web.de/?mc=100071&distributionid=000000000066
^ permalink raw reply
* Re: Platform matching style (was:: [RFC] add phy-handle property for fec_mpc52xx)
From: Olof Johansson @ 2008-01-10 15:52 UTC (permalink / raw)
To: Grant Likely; +Cc: olaf, sven, linuxppc-dev
In-Reply-To: <fa686aa40801100731k62b004ecq4f6058aea5df9da0@mail.gmail.com>
On Thu, Jan 10, 2008 at 08:31:18AM -0700, Grant Likely wrote:
> 1. Apply a device tree fixup to change device_type from "chrp" to
> "efika" (the current solution)
> 2. Modify chrp_probe() to check specifically for the Efika when probing
> 3. Modify the link order so that Efika is probed before CHRP.
>
> All three of these solutions will work, but I'd like to get opinions
> on which is stylistically the best approach (or if there is another
> approach I'm missing).
>
> In general, I'm trying to reduce the Efika fixups down to only what is
> absolutely necessary and as much as possible work with the provided
> device tree.
(3) sounds fragile to me.
There's already code in the kernel that does (2): pSeries_probe checks
to make sure it's not running on a cell blade. That has the benefit of
presenting something closer to the real device tree to the user through
/proc/device-tree, not that I'm sure it has all that much value.
-Olof
^ permalink raw reply
* Re: [alsa-devel] [PATCH] ASoC drivers for the Freescale MPC8610 SoC
From: Timur Tabi @ 2008-01-10 15:39 UTC (permalink / raw)
To: Jon Smirl, david, Grant Likely, Olof Johansson
Cc: linuxppc-dev, alsa-devel, Liam Girdwood
In-Reply-To: <1199961015.19903.270.camel@localhost.localdomain>
Liam Girdwood wrote:
> I think we are probably looking at submission in the next 8 - 10 weeks.
> Currently most of the core code is complete, however some platforms and
> codecs still need porting.
With that in mind, can I get some kind of consensus from the PPC side as to
whether this ASoC V1 driver is okay? I want to get it into 2.6.25.
Keep in mind:
1) ASoC V1 is not PowerPC-friendly, so it's impossible to make an ASoC V1
PowerPC driver "100% correct".
2) The CS4270 driver does not support I2C nodes in the device tree, so there's
not point in adding any to the 8610 DTS.
3) Liam and I are working on porting this driver to ASoC V2 and resolving all
open PPC issue, but that won't be done in time for 2.6.25.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Platform matching style (was:: [RFC] add phy-handle property for fec_mpc52xx)
From: Grant Likely @ 2008-01-10 15:31 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev, olaf, sven
On 1/9/08, Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> As much as I despise having to work around firmware bugs, it looks
> indeed like this one has been broken for way too long to the point where
> users are being hurt, distros are being hurt, and telling people to
> whack things in nvramrc is just plain gross, so let's merge it.
Tangent question:
The Efika has device_type = "chrp" in the root node, but in Linux
Efika support does not use CHRP, it uses
arch/powerpc/platforms/52xx/efika.c. However, if CHRP support is
compiled in then it will see the chrp device_type and bind to it
before efika.c has a chance to probe. I see three reasonable
solutions to this:
1. Apply a device tree fixup to change device_type from "chrp" to
"efika" (the current solution)
2. Modify chrp_probe() to check specifically for the Efika when probing
3. Modify the link order so that Efika is probed before CHRP.
All three of these solutions will work, but I'd like to get opinions
on which is stylistically the best approach (or if there is another
approach I'm missing).
In general, I'm trying to reduce the Efika fixups down to only what is
absolutely necessary and as much as possible work with the provided
device tree.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* DTC v1.1.0-rc1 tagged!
From: Jon Loeliger @ 2008-01-10 15:25 UTC (permalink / raw)
To: linuxppc-dev
Folks,
I have tagged DTC v1.1.0-rc1 and pushed it out.
Please verify that this is going to be a viable 1.1 release!
Consider this the last call for features and first call
for bug fixes for the 1.1 release. :-)
Thanks,
jdl
^ permalink raw reply
* Re: [PATCH V3] [POWERPC] Add common clock setting routine mpc52xx_psc_set_clkdiv()
From: Grant Likely @ 2008-01-10 15:01 UTC (permalink / raw)
To: Stephen Rothwell; +Cc: linuxppc-dev, dragos.carp
In-Reply-To: <20080110181316.1213f273.sfr@canb.auug.org.au>
On 1/10/08, Stephen Rothwell <sfr@canb.auug.org.au> wrote:
> Hi Grant,
>
> On Wed, 09 Jan 2008 22:26:30 -0700 Grant Likely <grant.likely@secretlab.ca> wrote:
> >
> > +mpc52xx_map_common_devices(void)
> > {
>
> > + /* Clock Distribution Module, used by PSC clock setting function */
> > + np = of_find_matching_node(NULL, mpc52xx_cdm_ids);
>
> What happens if we find no node?
Both of_iomap and of_put fail gracefully if np is NULL. IIRC that was
done on purpose so this exact thing could be done.
Users of mpc52xx_cdm (and the others done in this style) all check for
mpc52xx_cdm being NULL before dereferencing.
>
> > + mpc52xx_cdm = of_iomap(np, 0);
> > + of_node_put(np);
> > }
>
> --
> Cheers,
> Stephen Rothwell sfr@canb.auug.org.au
> http://www.canb.auug.org.au/~sfr/
>
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: Linux for ml310
From: Grant Likely @ 2008-01-10 14:54 UTC (permalink / raw)
To: Joachim Meyer; +Cc: linuxppc-embedded
In-Reply-To: <525760687@web.de>
On 1/10/08, Joachim Meyer <Jogi95@web.de> wrote:
> Hi again
>
> I tried my compiled kernel this morning.
> I loaded my Bitstream onto the FPGA, then the zImage.elf via xmd: dow zIm=
age.elf.
> After I typed "run" I got foolowing message on an Terminal:
> ------------------------------------------------------------------------
> loaded at: 00400000 004F219C
> board data at: 004F0120 004F019C
> relocated to: 00404048 004040C4
> zimage at: 00404E39 004EF931
> avail ram: 004F3000 10000000
>
> Linux/PPC load: console=3DttyS0,9600
^^^^^^^^^^
should be 'console=3DttyUL0'
> Uncompressing Linux...done.
> Now booting the kernel
>
> ------------------------------------------------------------------------
> Doesn't look that bad I think. ;)
> The Question I have is of course why he stops there.
> Is it why He can't find a rootfs?
> Or would he say this in that case.
> I found someone with an similar Problem:
> http://lists.ppckernel.org/pipermail/ppckernel/2006-May/000026.html
> but I already use the xparameters_ml310 from my BSP.
> Where must I look for the error?
> There where some warnings when I compiled the kernel. Is this ok?
>
> Greets & THX
> Joachim
>
> PS: My xparameters_ml310.h
> -------------------------------------------------------------------------=
-----------------------------------------------
> /*******************************************************************
> *
> * CAUTION: This file is automatically generated by libgen.
> * Version: Xilinx EDK 9.1.02 EDK_J_SP2.4
> * DO NOT EDIT.
> *
> * Copyright (c) 2005 Xilinx, Inc. All rights reserved.
> *
> * Description: Driver parameters
> *
> *******************************************************************/
>
> /* Definitions for driver UARTLITE */
> #define XPAR_XUARTLITE_NUM_INSTANCES 1
>
> /* Definitions for peripheral RS232_UART */
> #define XPAR_RS232_UART_BASEADDR 0x40600000
> #define XPAR_RS232_UART_HIGHADDR 0x4060FFFF
> #define XPAR_RS232_UART_DEVICE_ID 0
> #define XPAR_RS232_UART_BAUDRATE 9600
> #define XPAR_RS232_UART_USE_PARITY 0
> #define XPAR_RS232_UART_ODD_PARITY 0
> #define XPAR_RS232_UART_DATA_BITS 8
>
>
> /******************************************************************/
>
> /* Definitions for driver SPI */
> #define XPAR_XSPI_NUM_INSTANCES 1
>
> /* Definitions for peripheral SPI_EEPROM */
> #define XPAR_SPI_EEPROM_BASEADDR 0x4B308000
> #define XPAR_SPI_EEPROM_HIGHADDR 0x4B30807F
> #define XPAR_SPI_EEPROM_DEVICE_ID 0
> #define XPAR_SPI_EEPROM_FIFO_EXIST 1
> #define XPAR_SPI_EEPROM_SPI_SLAVE_ONLY 0
> #define XPAR_SPI_EEPROM_NUM_SS_BITS 1
>
>
> /******************************************************************/
>
> /* Definitions for driver PCI */
> #define XPAR_XPCI_NUM_INSTANCES 1
>
> /* Definitions for peripheral PCI32_BRIDGE */
> #define XPAR_PCI32_BRIDGE_DEVICE_ID 0
> #define XPAR_PCI32_BRIDGE_BASEADDR 0x42600000
> #define XPAR_PCI32_BRIDGE_HIGHADDR 0x4260FFFF
> #define XPAR_PCI32_BRIDGE_PCIBAR_0 0x00000000
> #define XPAR_PCI32_BRIDGE_PCIBAR_LEN_0 7
> #define XPAR_PCI32_BRIDGE_PCIBAR2IPIF_0 0
> #define XPAR_PCI32_BRIDGE_PCIBAR_ENDIAN_TRANSLATE_EN_0 0
> #define XPAR_PCI32_BRIDGE_PCI_PREFETCH_0 1
> #define XPAR_PCI32_BRIDGE_PCI_SPACETYPE_0 1
> #define XPAR_PCI32_BRIDGE_PCIBAR_1 0xffffffff
> #define XPAR_PCI32_BRIDGE_PCIBAR_LEN_1 20
> #define XPAR_PCI32_BRIDGE_PCIBAR2IPIF_1 0
> #define XPAR_PCI32_BRIDGE_PCIBAR_ENDIAN_TRANSLATE_EN_1 0
> #define XPAR_PCI32_BRIDGE_PCI_PREFETCH_1 1
> #define XPAR_PCI32_BRIDGE_PCI_SPACETYPE_1 1
> #define XPAR_PCI32_BRIDGE_PCIBAR_2 0xffffffff
> #define XPAR_PCI32_BRIDGE_PCIBAR_LEN_2 20
> #define XPAR_PCI32_BRIDGE_PCIBAR2IPIF_2 0
> #define XPAR_PCI32_BRIDGE_PCIBAR_ENDIAN_TRANSLATE_EN_2 0
> #define XPAR_PCI32_BRIDGE_PCI_PREFETCH_2 1
> #define XPAR_PCI32_BRIDGE_PCI_SPACETYPE_2 1
> #define XPAR_PCI32_BRIDGE_IPIFBAR_0 0x60000000
> #define XPAR_PCI32_BRIDGE_IPIF_HIGHADDR_0 0x7fffffff
> #define XPAR_PCI32_BRIDGE_IPIFBAR2PCI_0 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_ENDIAN_TRANSLATE_EN_0 0
> #define XPAR_PCI32_BRIDGE_IPIF_PREFETCH_0 1
> #define XPAR_PCI32_BRIDGE_IPIF_SPACETYPE_0 1
> #define XPAR_PCI32_BRIDGE_IPIFBAR_1 0x54000000
> #define XPAR_PCI32_BRIDGE_IPIF_HIGHADDR_1 0x57ffffff
> #define XPAR_PCI32_BRIDGE_IPIFBAR2PCI_1 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_ENDIAN_TRANSLATE_EN_1 0
> #define XPAR_PCI32_BRIDGE_IPIF_PREFETCH_1 1
> #define XPAR_PCI32_BRIDGE_IPIF_SPACETYPE_1 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_2 0xffffffff
> #define XPAR_PCI32_BRIDGE_IPIF_HIGHADDR_2 0x00000000
> #define XPAR_PCI32_BRIDGE_IPIFBAR2PCI_2 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_ENDIAN_TRANSLATE_EN_2 0
> #define XPAR_PCI32_BRIDGE_IPIF_PREFETCH_2 1
> #define XPAR_PCI32_BRIDGE_IPIF_SPACETYPE_2 1
> #define XPAR_PCI32_BRIDGE_IPIFBAR_3 0xffffffff
> #define XPAR_PCI32_BRIDGE_IPIF_HIGHADDR_3 0x00000000
> #define XPAR_PCI32_BRIDGE_IPIFBAR2PCI_3 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_ENDIAN_TRANSLATE_EN_3 0
> #define XPAR_PCI32_BRIDGE_IPIF_PREFETCH_3 1
> #define XPAR_PCI32_BRIDGE_IPIF_SPACETYPE_3 1
> #define XPAR_PCI32_BRIDGE_IPIFBAR_4 0xffffffff
> #define XPAR_PCI32_BRIDGE_IPIF_HIGHADDR_4 0x00000000
> #define XPAR_PCI32_BRIDGE_IPIFBAR2PCI_4 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_ENDIAN_TRANSLATE_EN_4 0
> #define XPAR_PCI32_BRIDGE_IPIF_PREFETCH_4 1
> #define XPAR_PCI32_BRIDGE_IPIF_SPACETYPE_4 1
> #define XPAR_PCI32_BRIDGE_IPIFBAR_5 0xffffffff
> #define XPAR_PCI32_BRIDGE_IPIF_HIGHADDR_5 0x00000000
> #define XPAR_PCI32_BRIDGE_IPIFBAR2PCI_5 0
> #define XPAR_PCI32_BRIDGE_IPIFBAR_ENDIAN_TRANSLATE_EN_5 0
> #define XPAR_PCI32_BRIDGE_IPIF_PREFETCH_5 1
> #define XPAR_PCI32_BRIDGE_IPIF_SPACETYPE_5 1
> #define XPAR_PCI32_BRIDGE_DMA_BASEADDR 0xFFFFFFFF
> #define XPAR_PCI32_BRIDGE_DMA_HIGHADDR 0x00000000
> #define XPAR_PCI32_BRIDGE_DMA_CHAN_TYPE 9
> #define XPAR_PCI32_BRIDGE_DMA_LENGTH_WIDTH 13
> #define XPAR_PCI32_BRIDGE_BRIDGE_IDSEL_ADDR_BIT 16
>
>
> /******************************************************************/
>
> #define XPAR_XSYSACE_MEM_WIDTH 8
> /* Definitions for driver SYSACE */
> #define XPAR_XSYSACE_NUM_INSTANCES 1
>
> /* Definitions for peripheral SYSACE_COMPACTFLASH */
> #define XPAR_SYSACE_COMPACTFLASH_BASEADDR 0x41800000
> #define XPAR_SYSACE_COMPACTFLASH_HIGHADDR 0x4180FFFF
> #define XPAR_SYSACE_COMPACTFLASH_DEVICE_ID 0
> #define XPAR_SYSACE_COMPACTFLASH_MEM_WIDTH 8
>
>
> /******************************************************************/
>
> #define XPAR_INTC_MAX_NUM_INTR_INPUTS 12
> #define XPAR_XINTC_HAS_IPR 1
> #define XPAR_XINTC_USE_DCR 0
> /* Definitions for driver INTC */
> #define XPAR_XINTC_NUM_INSTANCES 1
>
> /* Definitions for peripheral OPB_INTC_0 */
> #define XPAR_OPB_INTC_0_BASEADDR 0x41200000
> #define XPAR_OPB_INTC_0_HIGHADDR 0x4120FFFF
> #define XPAR_OPB_INTC_0_DEVICE_ID 0
> #define XPAR_OPB_INTC_0_KIND_OF_INTR 0x00000C00
>
>
> /******************************************************************/
>
> #define XPAR_INTC_SINGLE_BASEADDR 0x41200000
> #define XPAR_INTC_SINGLE_HIGHADDR 0x4120FFFF
> #define XPAR_INTC_SINGLE_DEVICE_ID XPAR_OPB_INTC_0_DEVICE_ID
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_SBR_INT_MASK 0X000001
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_SBR_INT_INTR 0
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTF_MASK 0X000002
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTF_INTR 1
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTE_MASK 0X000004
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTE_INTR 2
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTD_MASK 0X000008
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTD_INTR 3
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTC_MASK 0X000010
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTC_INTR 4
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTB_MASK 0X000020
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTB_INTR 5
> #define XPAR_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTA_MASK 0X000040
> #define XPAR_OPB_INTC_0_SYSTEM_FPGA_0_PCI32_BRIDGE_PCI_INTA_INTR 6
> #define XPAR_SYSACE_COMPACTFLASH_SYSACE_IRQ_MASK 0X000080
> #define XPAR_OPB_INTC_0_SYSACE_COMPACTFLASH_SYSACE_IRQ_INTR 7
> #define XPAR_PCI32_BRIDGE_IP2INTC_IRPT_MASK 0X000100
> #define XPAR_OPB_INTC_0_PCI32_BRIDGE_IP2INTC_IRPT_INTR 8
> #define XPAR_SPI_EEPROM_IP2INTC_IRPT_MASK 0X000200
> #define XPAR_OPB_INTC_0_SPI_EEPROM_IP2INTC_IRPT_INTR 9
> #define XPAR_DDR_SDRAM_32MX64_IP2INTC_IRPT_MASK 0X000400
> #define XPAR_OPB_INTC_0_DDR_SDRAM_32MX64_IP2INTC_IRPT_INTR 10
> #define XPAR_RS232_UART_INTERRUPT_MASK 0X000800
> #define XPAR_OPB_INTC_0_RS232_UART_INTERRUPT_INTR 11
>
> /******************************************************************/
>
> /* Definitions for driver DDR */
> #define XPAR_XDDR_NUM_INSTANCES 1
>
> /* Definitions for peripheral DDR_SDRAM_32MX64 */
> #define XPAR_DDR_SDRAM_32MX64_ECC_BASEADDR 0xFFFFFFFF
> #define XPAR_DDR_SDRAM_32MX64_ECC_HIGHADDR 0x00000000
> #define XPAR_DDR_SDRAM_32MX64_DEVICE_ID 0
> #define XPAR_DDR_SDRAM_32MX64_INCLUDE_ECC_INTR 0
>
>
> /******************************************************************/
>
> /* Definitions for peripheral DDR_SDRAM_32MX64 */
> #define XPAR_DDR_SDRAM_32MX64_MEM0_BASEADDR 0x00000000
> #define XPAR_DDR_SDRAM_32MX64_MEM0_HIGHADDR 0x0FFFFFFF
>
> /******************************************************************/
>
>
> /* Definitions for peripheral PLB_BRAM_IF_CNTLR_1 */
> #define XPAR_PLB_BRAM_IF_CNTLR_1_BASEADDR 0xfffe0000
> #define XPAR_PLB_BRAM_IF_CNTLR_1_HIGHADDR 0xffffffff
>
>
> /******************************************************************/
>
> #define XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ 100000000
>
> /******************************************************************/
>
> #define XPAR_CPU_ID 0
> #define XPAR_PPC405_ID 0
> #define XPAR_PPC405_CORE_CLOCK_FREQ_HZ 100000000
> #define XPAR_PPC405_ISOCM_DCR_BASEADDR 0x00000010
> #define XPAR_PPC405_ISOCM_DCR_HIGHADDR 0x00000013
> #define XPAR_PPC405_DSOCM_DCR_BASEADDR 0x00000020
> #define XPAR_PPC405_DSOCM_DCR_HIGHADDR 0x00000023
> #define XPAR_PPC405_DISABLE_OPERAND_FORWARDING 1
> #define XPAR_PPC405_DETERMINISTIC_MULT 0
> #define XPAR_PPC405_MMU_ENABLE 1
> #define XPAR_PPC405_DCR_RESYNC 0
> #define XPAR_PPC405_HW_VER "2.00.c"
>
> /******************************************************************/
>
>
> /******************************************************************/
>
> /* Cannonical Constant Names */
>
> /******************************************************************/
>
> #define XPAR_UARTLITE_0_BASEADDR XPAR_RS232_UART_BASEADDR
> #define XPAR_UARTLITE_0_HIGHADDR XPAR_RS232_UART_HIGHADDR
> #define XPAR_UARTLITE_0_DEVICE_ID XPAR_RS232_UART_DEVICE_ID
>
> /******************************************************************/
>
> #define XPAR_SPI_0_BASEADDR XPAR_SPI_EEPROM_BASEADDR
> #define XPAR_SPI_0_HIGHADDR XPAR_SPI_EEPROM_HIGHADDR
> #define XPAR_SPI_0_FIFO_EXIST XPAR_SPI_EEPROM_FIFO_EXIST
> #define XPAR_SPI_0_SPI_SLAVE_ONLY XPAR_SPI_EEPROM_SPI_SLAVE_ONLY
> #define XPAR_SPI_0_NUM_SS_BITS XPAR_SPI_EEPROM_NUM_SS_BITS
> #define XPAR_SPI_0_DEVICE_ID XPAR_SPI_EEPROM_DEVICE_ID
>
> /******************************************************************/
>
> #define XPAR_SYSACE_0_BASEADDR XPAR_SYSACE_COMPACTFLASH_BASEADDR
> #define XPAR_SYSACE_0_HIGHADDR XPAR_SYSACE_COMPACTFLASH_HIGHADDR
> #define XPAR_SYSACE_0_DEVICE_ID XPAR_SYSACE_COMPACTFLASH_DEVICE_ID
>
> /******************************************************************/
>
> #define XPAR_INTC_0_BASEADDR XPAR_OPB_INTC_0_BASEADDR
> #define XPAR_INTC_0_HIGHADDR XPAR_OPB_INTC_0_HIGHADDR
> #define XPAR_INTC_0_KIND_OF_INTR XPAR_OPB_INTC_0_KIND_OF_INTR
> #define XPAR_INTC_0_DEVICE_ID XPAR_OPB_INTC_0_DEVICE_ID
>
> /******************************************************************/
>
> #define XPAR_INTC_0_SYSACE_0_VEC_ID XPAR_OPB_INTC_0_SYSACE_COMPACTFLASH_S=
YSACE_IRQ_INTR
> #define XPAR_INTC_0_PCI_0_VEC_ID_A XPAR_OPB_INTC_0_PCI32_BRIDGE_IP2INTC_I=
RPT_INTR
> #define XPAR_INTC_0_PCI_0_VEC_ID_B XPAR_OPB_INTC_0_PCI32_BRIDGE_IP2INTC_I=
RPT_INTR
> #define XPAR_INTC_0_PCI_0_VEC_ID_C XPAR_OPB_INTC_0_PCI32_BRIDGE_IP2INTC_I=
RPT_INTR
> #define XPAR_INTC_0_PCI_0_VEC_ID_D XPAR_OPB_INTC_0_PCI32_BRIDGE_IP2INTC_I=
RPT_INTR
> #define XPAR_INTC_0_SPI_0_VEC_ID XPAR_OPB_INTC_0_SPI_EEPROM_IP2INTC_IRPT_=
INTR
> #define XPAR_INTC_0_DDR_0_VEC_ID XPAR_OPB_INTC_0_DDR_SDRAM_32MX64_IP2INTC=
_IRPT_INTR
> #define XPAR_INTC_0_UARTLITE_0_VEC_ID XPAR_OPB_INTC_0_RS232_UART_INTERRUP=
T_INTR
>
> /******************************************************************/
>
> #define XPAR_PLB_CLOCK_FREQ_HZ 100000000
> #define XPAR_CORE_CLOCK_FREQ_HZ XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ
> #define XPAR_DDR_0_SIZE 0x10000000
>
> /******************************************************************/
>
> #define XPAR_PCI_0_CLOCK_FREQ_HZ 0
>
> /******************************************************************/
>
> _______________________________________________________________________
> Jetzt neu! Sch=FCtzen Sie Ihren PC mit McAfee und WEB.DE. 30 Tage
> kostenlos testen. http://www.pc-sicherheit.web.de/startseite/?mc=3D022220
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [RFC 2/2] mpc52xx_psc_spi device driver must not touch port_config and cdm
From: Dragos Carp @ 2008-01-10 14:03 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <20080107190404.13535.65688.stgit@trillian.secretlab.ca>
Acked-by: Dragos Carp <dragos.carp@toptica.com>
On Mon, 2008-01-07 at 12:07 -0700, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> It is dangerous for an mpc52xx device driver to modify the port_config
> register. If the driver is probed incorrectly, it will change the pin
> IO configuration in ways which may not be compatible with the board.
> port_config should be set up by the bootloader, or failing that, in
> the platform setup code in arch/powerpc/platforms/52xx.
>
> Also, modifying CDM registers directly can cause a race condition with
> other drivers. Instead call a common routine to modify CDM settings.
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> ---
>
> drivers/spi/mpc52xx_psc_spi.c | 77 +----------------------------------------
> 1 files changed, 2 insertions(+), 75 deletions(-)
>
> diff --git a/drivers/spi/mpc52xx_psc_spi.c b/drivers/spi/mpc52xx_psc_spi.c
> index a3ebc63..253ed56 100644
> --- a/drivers/spi/mpc52xx_psc_spi.c
> +++ b/drivers/spi/mpc52xx_psc_spi.c
> @@ -330,80 +330,13 @@ static void mpc52xx_psc_spi_cleanup(struct spi_device *spi)
>
> static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
> {
> - struct device_node *np;
> - struct mpc52xx_cdm __iomem *cdm;
> - struct mpc52xx_gpio __iomem *gpio;
> struct mpc52xx_psc __iomem *psc = mps->psc;
> - u32 ul;
> u32 mclken_div;
> int ret = 0;
>
> -#if defined(CONFIG_PPC_MERGE)
> - np = of_find_compatible_node(NULL, NULL, "mpc5200-cdm");
> - cdm = of_iomap(np, 0);
> - of_node_put(np);
> - np = of_find_compatible_node(NULL, NULL, "mpc5200-gpio");
> - gpio = of_iomap(np, 0);
> - of_node_put(np);
> -#else
> - cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
> - gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE);
> -#endif
> - if (!cdm || !gpio) {
> - printk(KERN_ERR "Error mapping CDM/GPIO\n");
> - ret = -EFAULT;
> - goto unmap_regs;
> - }
> -
> /* default sysclk is 512MHz */
> - mclken_div = 0x8000 |
> - (((mps->sysclk ? mps->sysclk : 512000000) / MCLK) & 0x1FF);
> -
> - switch (psc_id) {
> - case 1:
> - ul = in_be32(&gpio->port_config);
> - ul &= 0xFFFFFFF8;
> - ul |= 0x00000006;
> - out_be32(&gpio->port_config, ul);
> - out_be16(&cdm->mclken_div_psc1, mclken_div);
> - ul = in_be32(&cdm->clk_enables);
> - ul |= 0x00000020;
> - out_be32(&cdm->clk_enables, ul);
> - break;
> - case 2:
> - ul = in_be32(&gpio->port_config);
> - ul &= 0xFFFFFF8F;
> - ul |= 0x00000060;
> - out_be32(&gpio->port_config, ul);
> - out_be16(&cdm->mclken_div_psc2, mclken_div);
> - ul = in_be32(&cdm->clk_enables);
> - ul |= 0x00000040;
> - out_be32(&cdm->clk_enables, ul);
> - break;
> - case 3:
> - ul = in_be32(&gpio->port_config);
> - ul &= 0xFFFFF0FF;
> - ul |= 0x00000600;
> - out_be32(&gpio->port_config, ul);
> - out_be16(&cdm->mclken_div_psc3, mclken_div);
> - ul = in_be32(&cdm->clk_enables);
> - ul |= 0x00000080;
> - out_be32(&cdm->clk_enables, ul);
> - break;
> - case 6:
> - ul = in_be32(&gpio->port_config);
> - ul &= 0xFF8FFFFF;
> - ul |= 0x00700000;
> - out_be32(&gpio->port_config, ul);
> - out_be16(&cdm->mclken_div_psc6, mclken_div);
> - ul = in_be32(&cdm->clk_enables);
> - ul |= 0x00000010;
> - out_be32(&cdm->clk_enables, ul);
> - break;
> - default:
> - ret = -EINVAL;
> - goto unmap_regs;
> - }
> + mclken_div = (mps->sysclk ? mps->sysclk : 512000000) / MCLK;
> + mpc52xx_set_psc_clkdiv(psc_id, mclken_div);
>
> /* Reset the PSC into a known state */
> out_8(&psc->command, MPC52xx_PSC_RST_RX);
> @@ -427,12 +360,6 @@ static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
>
> mps->bits_per_word = 8;
>
> -unmap_regs:
> - if (cdm)
> - iounmap(cdm);
> - if (gpio)
> - iounmap(gpio);
> -
> return ret;
> }
>
>
>
^ permalink raw reply
* Re: [PATCH 2/3] Look for include files in the directory of the including file.
From: Jon Loeliger @ 2008-01-10 14:25 UTC (permalink / raw)
To: David Gibson; +Cc: Scott Wood, linuxppc-dev
In-Reply-To: <20080110035201.GJ17816@localhost.localdomain>
So, like, the other day David Gibson mumbled:
> > The doubly-linked list is intended to make it easier to construct search
> > path lists one-at-a-time from arguments in the proper order, without
> > needing to reverse the list at the end.
>
> We've already got that problem with a bunch of the lists we create
> during parsing (we have several ugly add-to-end-of-singly-linked-list
> functions). Going to doubly-linked lists might not be a bad idea, but
> we should do it across the board, probably using the kernel's list.h
> or something like it.
I would be happy to accept a kernel's-list.h-based refactoring
for doubly linked lists after the imminent 1.1 release!
jdl
^ permalink raw reply
* Re: [DTC PATCH 2/2] Preserve scanner state when /include/ing.
From: Jon Loeliger @ 2008-01-10 14:16 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20080107202751.GB17782@ld0162-tx32.am.freescale.net>
So, like, the other day Scott Wood mumbled:
> This allows /include/s to work when in non-default states,
> such as PROPNODECHAR.
>
> We may want to use state stacks to get rid of BEGIN_DEFAULT() altogether...
>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
Hmmm.. With this applied, I get the usual warning:
CHK version_gen.h
CC dtc-lexer.lex.o
dtc-lexer.lex.c:1901: warning: 'yy_top_state' defined but not used
*grumble*
Applied.
jdl
^ permalink raw reply
* Re: [PATCH 0/5] Version 17, series to add device tree naming to i2c
From: Jon Smirl @ 2008-01-10 14:14 UTC (permalink / raw)
To: i2c, linuxppc-dev, Jean Delvare
In-Reply-To: <20071220044136.20091.70984.stgit@terra.home>
What is the review status of this series, should I post it again?
On 12/19/07, Jon Smirl <jonsmirl@gmail.com> wrote:
> Since copying i2c-mpc.c to maintain support for the ppc architecture seems to be an issue; instead rework i2c-mpc.c to use CONFIG_PPC_MERGE #ifdefs to support both the ppc and powerpc architecture. When ppc is deleted in six months these #ifdefs will need to be removed.
>
> Another rework of the i2c for powerpc device tree patch. This version implements standard alias naming only on the powerpc platform and only for the device tree names. The old naming mechanism of i2c_client.name,driver_name is left in place and not changed for non-powerpc platforms. This patch is fully capable of dynamically loading the i2c modules. You can modprobe in the i2c-mpc driver and the i2c modules described in the device tree will be automatically loaded. Modules also work if compiled in.
>
> The follow on patch to module-init-tools is also needed since the i2c subsystem has never implemented dynamic loading.
>
> The following series implements standard linux module aliasing for i2c modules on arch=powerpc. It then converts the mpc i2c driver from being a platform driver to an open firmware one. I2C device names are picked up from the device tree. Module aliasing is used to translate from device tree names into to linux kernel names. Several i2c drivers are updated to use the new aliasing.
>
> --
> Jon Smirl
> jonsmirl@gmail.com
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
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> Please read the FAQ at http://www.tux.org/lkml/
>
--
Jon Smirl
jonsmirl@gmail.com
^ permalink raw reply
* Re: How complete should the DTS be?
From: Josh Boyer @ 2008-01-10 13:58 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev, Sean MacLennan, David Gibson
In-Reply-To: <1199947849.6734.231.camel@pasglop>
On Thu, 10 Jan 2008 17:50:49 +1100
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> On Thu, 2008-01-10 at 17:02 +1100, David Gibson wrote:
> > On Thu, Jan 10, 2008 at 12:53:57AM -0500, Sean MacLennan wrote:
> > > David Gibson wrote:
> > > > Hrm... I'd say this is not something which has a firm convention yet.
> > > > It's going to become more of an issue once we get a macros system for
> > > > dtc, so the "440EP" macro would have all the devices, even if some are
> > > > not connected on a given board.
> > > >
> > > > I'm contemplating suggesting that we adopt the "status" property from
> > > > IEEE1275 to cover this.
> > > >
> > > >
> > > When I am laying out the dts, leaving out what isn't used makes the dts
> > > file cleaner, at least in my view. It doesn't hurt to have the second
> > > i2c bus there, but it also doesn't help and leaving it out points out
> > > that it is not used.
> > >
> > > When we get a macro system I assume the second i2c bus will be there but
> > > hidden by a macro. It will still be clean and shouldn't cause grief.
> >
> > Right, but if it is there we'll want to mark it as unused in some way
> > so that the kernel doesn't waste resources attempting to drive it.
>
> Sure but I don't want to make it mandatory for people to put unused
> devices in. If the macro system brings them in, then yes, it's good to
> have a way to properly mark them unused. But people hand crafting DTS
> shouldn't have to bloat them.
>
> There is -one- case where you may want to put unused devices, is if you
> do some kind of resource management on that specific bus (like need to
> be able to dynamically allocate space on the bus). In this case, you
> want to know everything that's there and potentially decodes addresses
> to avoid collisions.
There are other uses too. E.g. pin sharing between devices based on
DIP switch settings. You'd want to enumerate all the devices, and then
add 'status = "failed-not-connected"' to the ones that don't have pins.
josh
^ permalink raw reply
* In PowerPC's feature, are there any difference between ML410 and ML403?
From: diak sim @ 2008-01-10 13:56 UTC (permalink / raw)
To: linuxppc-embedded
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Hello everyone,
I am using ML410 to port a Linux 2.6 kernel, but init_IRQ() doesn't pass.
Porting Linux 2.6 to ML403 is successful? No such a problem?
In PowerPC's feature, are there any difference between ML410 and ML403?
Thanks.
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^ permalink raw reply
* Re: add phy-handle property for fec_mpc52xx
From: Olaf Hering @ 2008-01-10 11:47 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <18309.33034.549240.640970@cargo.ozlabs.ibm.com>
On Thu, Jan 10, Paul Mackerras wrote:
> Olaf Hering writes:
>
> > --- a/arch/powerpc/kernel/prom_init.c
> > +++ b/arch/powerpc/kernel/prom_init.c
> > @@ -1487,6 +1487,34 @@ static void __init prom_find_mmu(void)
> > else if (strncmp(version, "FirmWorks,3.", 12) == 0) {
> > of_workarounds = OF_WA_CLAIM | OF_WA_LONGTRAIL;
> > call_prom("interpret", 1, 1, "dev /memory 0 to allow-reclaim");
> > +#ifdef CONFIG_PPC_MPC52xx
> > + } else if (strcmp(version, "EFIKA5K2") == 0) {
>
> Why have you added this stuff in prom_find_mmu rather than putting it
> in fixup_device_tree_efika()?
I just looked for a "model" check.
^ permalink raw reply
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