* Re: [PATCH] [POWERPC] 85xx: Port STX GP3 board over from arch/ppc
From: Kumar Gala @ 2008-01-25 2:58 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20080124201939.GB3926@loki.buserror.net>
>> @@ -49,7 +57,7 @@ config MPC8540
>> config MPC8560
>> bool
>> select CPM2
>> - default y if MPC8560_ADS
>> + default y if MPC8560_ADS || STX_GP3
>
> Can we select this from 8560 boards, instead of a default y list?
I'll rework the whole Kconfig after all these board ports go in.
>
- k
^ permalink raw reply
* RE: [PATCH UCC TDM 3/3 ] Modified Documentation to explain dtsentries for TDM driver
From: Aggrwal Poonam @ 2008-01-25 3:58 UTC (permalink / raw)
To: Wood Scott
Cc: Barkowski Michael, netdev, Gala Kumar, linux-kernel, rubini,
linuxppc-dev, Kalra Ashish, Cutler Richard, akpm, Tabi Timur
In-Reply-To: <20080124201226.GA3926@loki.buserror.net>
Hi Scott
The device tree already has a brg-frequency property in qe node which
is the value of BRGCLK. The function get_brg_clk uses this property to
find the value of BRGCLK.
In case this value is 0(some older u-boots populate bus-frequency
property of qe and not the brg-frequency), get_brg_clk uses
bus-frequency/2 as BRGCLK.
With Regards
Poonam=20
=20
=20
-----Original Message-----
From: Wood Scott=20
Sent: Friday, January 25, 2008 1:42 AM
To: Aggrwal Poonam
Cc: Gala Kumar; akpm@linux-foundation.org; linux-kernel@vger.kernel.org;
netdev@vger.kernel.org; rubini@vision.unipv.it; linuxppc-dev@ozlabs.org;
Barkowski Michael; Cutler Richard; Tabi Timur; Kalra Ashish
Subject: Re: [PATCH UCC TDM 3/3 ] Modified Documentation to explain
dtsentries for TDM driver
On Thu, Jan 24, 2008 at 10:24:13AM +0530, Poonam_Aggrwal-b10812 wrote:
> + ix) Baud Rate Generator (BRG)
> +
> + Required properties:
> + - compatible : shpuld be "fsl,cpm-brg"
> + - fsl,brg-sources : define the input clock for all 16 BRGs. The
input
> + clock source could be 1 to 24 for CLK1 to CLK24. Zero means that
the
> + particular BRG will be driven by QE clock(BRGCLK).
Should also have a clock-frequency property to specify what BRGCLK is.
-Scott
^ permalink raw reply
* RE: [PATCH UCC TDM 1/3 Updated] Platform changes for UCC TDM driver for MPC8323eRDB. Also includes related QE changes and dts entries.
From: Aggrwal Poonam @ 2008-01-25 4:09 UTC (permalink / raw)
To: avorontsov, Tabi Timur
Cc: Barkowski Michael, netdev, Gala Kumar, linux-kernel, rubini,
linuxppc-dev, Kalra Ashish, Cutler Richard, akpm
In-Reply-To: <20080124172327.GA6786@localhost.localdomain>
Hello Anton/Tabi
I am not sure which is the best place to configure the pins. Because
some drivers do it in one way and some in the other.
I actually tried to make the driver similar to ucc_geth because it is a
QE driver. The driver has no platform code in the platform files similar
to ucc_geth. It is probed along with all the QE devices thorugh
of_platform_bus_probe.
And the pins are configured for all the QE devices using par_io_init.
I thought this to be the most consistent way at that time.
How should we close this point?
Can we go ahead with the pio-map?
Infact the discussion in this thread was very good and I got to know a
lot of rationales behind this.
Please suggest.
Thanks and Regards
Poonam
From: Anton Vorontsov [mailto:avorontsov@ru.mvista.com]=20
Sent: Thursday, January 24, 2008 10:53 PM
To: Tabi Timur
Cc: Aggrwal Poonam; Gala Kumar; akpm@linux-foundation.org;
linux-kernel@vger.kernel.org; netdev@vger.kernel.org;
rubini@vision.unipv.it; linuxppc-dev@ozlabs.org; Barkowski Michael;
Cutler Richard; Kalra Ashish
Subject: Re: [PATCH UCC TDM 1/3 Updated] Platform changes for UCC TDM
driver for MPC8323eRDB. Also includes related QE changes and dts
entries.
On Thu, Jan 24, 2008 at 10:33:47AM -0600, Timur Tabi wrote:
> Anton Vorontsov wrote:
>=20
> >Are you saying that TDM is sharing same pins with the other QE=20
> >device, and we can choose to use/not use some device depending on=20
> >which driver is loaded?
>=20
> No. I'd have to closely examine the DTS, but I don't think that UCC=20
> devices share pins at all. But that isn't my point.
>=20
> >In that particular case UCC configuration is static, for every UCC.
> >So, we can set up all pins in the firmware/board file.
>=20
> Yes, but deciding what the UCC does might not be static. At what=20
> point do we declare, "UCC5 is for eth0 and eth0 only"?
>=20
> The advantage of putting the pin configurations in the device tree is=20
> that they now become configurable. I can envision a scenario where=20
> UCC5 could be either an Ethernet or a UART, depending on the setting=20
> of some jumpers on the board. That's what the QE was designed for: any
> UCC can do any task, and you can even have a UCC change its purpose
while the system is running.
> So I don't want the pin configurations hard-coded into the kernel. =20
> Having them in the device tree gives me some flexibility.
If hardware configuration is selected at the bootup time, by jumpers or
switches, it's even easier to do it right. Without pio-map.
> For instance, I have a plan (that I keep postponing) to introduce a=20
> new feature in U-Boot where U-Boot can determine the settings of some=20
> board jumpers and modify the device tree accordingly. The instructions
> on how to modify the device tree would be embedded in the tree itself.
Why you need to modify the device tree for that? Let the U-Boot simply
setup pins for the kernel. Regarding kernel overwriting pins
configuration...
> I can't
> support this feature if the kernel calls par_io_config_pin()=20
> regardless of what's in the device tree.
What I've understood from the previous debates, is that ideally kernel
should not touch pins' configuration. Today we're using pio-map solely
to fix up some old firmware misconfiguration. And we can do this in the
board file still. To determine if we need to fixup the firmware or not,
we can use some device tree property instead (firmware version?).
p.s.
I'm neither for pio-map nor against. I just want some consequence
regarding this. Last thread ended with consequence that pio-map is a bad
thing to use...
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* [PATCH] [POWERPC] bootwrapper: Add find_node_by_compatible
From: Kumar Gala @ 2008-01-25 4:45 UTC (permalink / raw)
To: linuxppc-dev; +Cc: David Gibson
Add the ability to find a device node by just what its compatible with.
This is useful in cases that we don't have a prop to find the node with.
---
arch/powerpc/boot/libfdt-wrapper.c | 9 +++++++++
arch/powerpc/boot/ops.h | 11 +++++++++++
2 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/libfdt-wrapper.c b/arch/powerpc/boot/libfdt-wrapper.c
index 97af36c..59016be 100644
--- a/arch/powerpc/boot/libfdt-wrapper.c
+++ b/arch/powerpc/boot/libfdt-wrapper.c
@@ -133,6 +133,14 @@ static void *fdt_wrapper_find_node_by_prop_value(const void *prev,
return offset_devp(offset);
}
+static void *fdt_wrapper_find_node_by_compatible(const void *prev,
+ const char *val)
+{
+ int offset = fdt_node_offset_by_compatible(fdt, devp_offset_find(prev),
+ val);
+ return offset_devp(offset);
+}
+
static char *fdt_wrapper_get_path(const void *devp, char *buf, int len)
{
int rc;
@@ -164,6 +172,7 @@ void fdt_init(void *blob)
dt_ops.get_parent = fdt_wrapper_get_parent;
dt_ops.create_node = fdt_wrapper_create_node;
dt_ops.find_node_by_prop_value = fdt_wrapper_find_node_by_prop_value;
+ dt_ops.find_node_by_compatible = fdt_wrapper_find_node_by_compatible;
dt_ops.get_path = fdt_wrapper_get_path;
dt_ops.finalize = fdt_wrapper_finalize;
diff --git a/arch/powerpc/boot/ops.h b/arch/powerpc/boot/ops.h
index 5872ef1..4b0544b 100644
--- a/arch/powerpc/boot/ops.h
+++ b/arch/powerpc/boot/ops.h
@@ -46,6 +46,8 @@ struct dt_ops {
void *(*find_node_by_prop_value)(const void *prev,
const char *propname,
const char *propval, int proplen);
+ void *(*find_node_by_compatible)(const void *prev,
+ const char *compat);
unsigned long (*finalize)(void);
char *(*get_path)(const void *phandle, char *buf, int len);
};
@@ -172,6 +174,15 @@ static inline void *find_node_by_alias(const char *alias)
return NULL;
}
+static inline void *find_node_by_compatible(const void *prev,
+ const char *compat)
+{
+ if (dt_ops.find_node_by_compatible)
+ return dt_ops.find_node_by_compatible(prev, compat);
+
+ return NULL;
+}
+
void dt_fixup_memory(u64 start, u64 size);
void dt_fixup_cpu_clocks(u32 cpufreq, u32 tbfreq, u32 busfreq);
void dt_fixup_clock(const char *path, u32 freq);
--
1.5.3.7
^ permalink raw reply related
* [PATCH v3] [POWERPC] Add a cuboot wrapper for 85xx with CPM2
From: Kumar Gala @ 2008-01-25 4:45 UTC (permalink / raw)
To: linuxppc-dev
The bd info struct changes if we have CPM2 enabled in u-boot.
---
arch/powerpc/boot/Makefile | 6 +++-
arch/powerpc/boot/cuboot-85xx-cpm2.c | 66 ++++++++++++++++++++++++++++++++++
2 files changed, 71 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/boot/cuboot-85xx-cpm2.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 1e20aca..1a42970 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -62,7 +62,8 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \
fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c \
- cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c
+ cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
+ cuboot-85xx-cpm2.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -200,6 +201,9 @@ image-$(CONFIG_PPC_MPC52xx) += cuImage.52xx
image-$(CONFIG_STORCENTER) += cuImage.824x
image-$(CONFIG_PPC_83xx) += cuImage.83xx
image-$(CONFIG_PPC_85xx) += cuImage.85xx
+ifeq ($(CONFIG_CPM2),y)
+image-$(CONFIG_PPC_85xx) += cuImage.85xx-cpm2
+endif
image-$(CONFIG_MPC7448HPC2) += cuImage.hpc2
image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo
diff --git a/arch/powerpc/boot/cuboot-85xx-cpm2.c b/arch/powerpc/boot/cuboot-85xx-cpm2.c
new file mode 100644
index 0000000..723872d
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-85xx-cpm2.c
@@ -0,0 +1,66 @@
+/*
+ * Old U-boot compatibility for 85xx
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include "ops.h"
+#include "stdio.h"
+#include "cuboot.h"
+
+#define TARGET_85xx
+#define TARGET_CPM2
+#include "ppcboot.h"
+
+static bd_t bd;
+
+static void platform_fixups(void)
+{
+ void *devp;
+
+ dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+ dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
+ dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
+ dt_fixup_mac_address_by_alias("ethernet2", bd.bi_enet2addr);
+ dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 8, bd.bi_busfreq);
+
+ /* Unfortunately, the specific model number is encoded in the
+ * soc node name in existing dts files -- once that is fixed,
+ * this can do a simple path lookup.
+ */
+ devp = find_node_by_devtype(NULL, "soc");
+ if (devp) {
+ void *serial = NULL;
+
+ setprop(devp, "bus-frequency", &bd.bi_busfreq,
+ sizeof(bd.bi_busfreq));
+
+ while ((serial = find_node_by_devtype(serial, "serial"))) {
+ if (get_parent(serial) != devp)
+ continue;
+
+ setprop(serial, "clock-frequency", &bd.bi_busfreq,
+ sizeof(bd.bi_busfreq));
+ }
+ }
+
+ devp = find_node_by_compatible(NULL, "fsl,cpm2-brg");
+ if (devp)
+ setprop(devp, "clock-frequency", &bd.bi_brgfreq,
+ sizeof(bd.bi_brgfreq));
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ CUBOOT_INIT();
+ fdt_init(_dtb_start);
+ serial_console_init();
+ platform_ops.fixups = platform_fixups;
+}
--
1.5.3.7
^ permalink raw reply related
* [PATCH v2] [POWERPC] 85xx: Port STX GP3 board over from arch/ppc
From: Kumar Gala @ 2008-01-25 4:47 UTC (permalink / raw)
To: linuxppc-dev
---
Handled feedback from Scott and Stephen.
- k
arch/powerpc/boot/dts/stx_gp3_8560.dts | 217 ++++++
arch/powerpc/configs/stx_gp3_defconfig | 1183 ++++++++++++++++++++++++++++++++
arch/powerpc/platforms/85xx/Kconfig | 12 +-
arch/powerpc/platforms/85xx/Makefile | 1 +
arch/powerpc/platforms/85xx/stx_gp3.c | 190 +++++
5 files changed, 1601 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/boot/dts/stx_gp3_8560.dts
create mode 100644 arch/powerpc/configs/stx_gp3_defconfig
create mode 100644 arch/powerpc/platforms/85xx/stx_gp3.c
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
new file mode 100644
index 0000000..1cec826
--- /dev/null
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -0,0 +1,217 @@
+/*
+ * STX GP3 - 8560 ADS Device Tree Source
+ *
+ * Copyright 2008 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "stx,gp3";
+ compatible = "stx,gp3-8560", "stx,gp3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ pci0 = &pci0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8560@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ soc8560@fdf00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0 0xfdf00000 0x100000>;
+ reg = <0xfdf00000 0x1000>;
+ bus-frequency = <0>;
+ compatible = "fsl,mpc8560-immr", "simple-bus";
+
+ memory-controller@2000 {
+ compatible = "fsl,8540-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ };
+
+ l2-cache-controller@20000 {
+ compatible = "fsl,8540-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ cache-line-size = <32>;
+ cache-size = <0x40000>; // L2, 256K
+ interrupt-parent = <&mpic>;
+ interrupts = <16 2>;
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&mpic>;
+ interrupts = <5 4>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy4: ethernet-phy@4 {
+ interrupt-parent = <&mpic>;
+ interrupts = <5 4>;
+ reg = <4>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ enet0: ethernet@24000 {
+ cell-index = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <29 2 30 2 34 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy2>;
+ };
+
+ enet1: ethernet@25000 {
+ cell-index = <1>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <35 2 36 2 40 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy4>;
+ };
+
+ mpic: pic@40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x40000 0x40000>;
+ device_type = "open-pic";
+ };
+
+ cpm@919c0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
+ reg = <0x919c0 0x30>;
+ ranges;
+
+ muram@80000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x80000 0x10000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 0x4000 0x9000 0x2000>;
+ };
+ };
+
+ brg@919f0 {
+ compatible = "fsl,mpc8560-brg",
+ "fsl,cpm2-brg",
+ "fsl,cpm-brg";
+ reg = <0x919f0 0x10 0x915f0 0x10>;
+ clock-frequency = <0>;
+ };
+
+ cpmpic: pic@90c00 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <46 2>;
+ interrupt-parent = <&mpic>;
+ reg = <0x90c00 0x80>;
+ compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
+ };
+
+ serial0: serial@91a20 {
+ device_type = "serial";
+ compatible = "fsl,mpc8560-scc-uart",
+ "fsl,cpm2-scc-uart";
+ reg = <0x91a20 0x20 0x88100 0x100>;
+ fsl,cpm-brg = <2>;
+ fsl,cpm-command = <0x4a00000>;
+ interrupts = <41 8>;
+ interrupt-parent = <&cpmpic>;
+ };
+ };
+ };
+
+ pci0: pci@fdf08000 {
+ cell-index = <0>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+
+ /* IDSEL 0x0c */
+ 0x6000 0 0 1 &mpic 1 1
+ 0x6000 0 0 2 &mpic 2 1
+ 0x6000 0 0 3 &mpic 3 1
+ 0x6000 0 0 4 &mpic 4 1
+
+ /* IDSEL 0x0d */
+ 0x6800 0 0 1 &mpic 4 1
+ 0x6800 0 0 2 &mpic 1 1
+ 0x6800 0 0 3 &mpic 2 1
+ 0x6800 0 0 4 &mpic 3 1
+
+ /* IDSEL 0x0e */
+ 0x7000 0 0 1 &mpic 3 1
+ 0x7000 0 0 2 &mpic 4 1
+ 0x7000 0 0 3 &mpic 1 1
+ 0x7000 0 0 4 &mpic 2 1
+
+ /* IDSEL 0x0f */
+ 0x7800 0 0 1 &mpic 2 1
+ 0x7800 0 0 2 &mpic 3 1
+ 0x7800 0 0 3 &mpic 4 1
+ 0x7800 0 0 4 &mpic 1 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <24 2>;
+ bus-range = <0 0>;
+ ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>;
+ clock-frequency = <66666666>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xfdf08000 0x1000>;
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+ device_type = "pci";
+ };
+};
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 7748a3a..26f9cd5 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -38,6 +38,14 @@ config MPC85xx_DS
help
This option enables support for the MPC85xx DS (MPC8544 DS) board
+config STX_GP3
+ bool "Silicon Turnkey Express GP3"
+ help
+ This option enables support for the Silicon Turnkey Express GP3
+ board.
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
+
endchoice
config MPC8540
@@ -49,7 +57,7 @@ config MPC8540
config MPC8560
bool
select CPM2
- default y if MPC8560_ADS
+ default y if MPC8560_ADS || STX_GP3
config MPC85xx
bool
@@ -59,4 +67,4 @@ config MPC85xx
select FSL_PCI if PCI
select SERIAL_8250_SHARE_IRQ if SERIAL_8250
default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS \
- || MPC85xx_MDS || MPC85xx_DS
+ || MPC85xx_MDS || MPC85xx_DS || STX_GP3
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 5eca920..bf7d2e1 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o
obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
+obj-$(CONFIG_STX_GP3) += stx_gp3.o
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c
new file mode 100644
index 0000000..0a8717a
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/stx_gp3.c
@@ -0,0 +1,190 @@
+/*
+ * Based on MPC8560 ADS and arch/ppc stx_gp3 ports
+ *
+ * Maintained by Kumar Gala (see MAINTAINERS for contact information)
+ *
+ * Copyright 2008 Freescale Semiconductor Inc.
+ *
+ * Dan Malek <dan@embeddededge.com>
+ * Copyright 2004 Embedded Edge, LLC
+ *
+ * Copied from mpc8560_ads.c
+ * Copyright 2002, 2003 Motorola Inc.
+ *
+ * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
+ * Copyright 2004-2005 MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpic.h>
+#include <asm/prom.h>
+#include <mm/mmu_decl.h>
+#include <asm/udbg.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#ifdef CONFIG_CPM2
+#include <asm/cpm2.h>
+#include <sysdev/cpm2_pic.h>
+#endif
+
+#ifdef CONFIG_CPM2
+static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ int cascade_irq;
+
+ while ((cascade_irq = cpm2_get_irq()) >= 0)
+ generic_handle_irq(cascade_irq);
+
+ desc->chip->eoi(irq);
+}
+
+#endif /* CONFIG_CPM2 */
+
+static void __init stx_gp3_pic_init(void)
+{
+ struct mpic *mpic;
+ struct resource r;
+ struct device_node *np;
+#ifdef CONFIG_CPM2
+ int irq;
+#endif
+
+ np = of_find_node_by_type(NULL, "open-pic");
+ if (!np) {
+ printk(KERN_ERR "Could not find open-pic node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_ERR "Could not map mpic register space\n");
+ of_node_put(np);
+ return;
+ }
+
+ mpic = mpic_alloc(np, r.start,
+ MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+ 0, 256, " OpenPIC ");
+ BUG_ON(mpic == NULL);
+ of_node_put(np);
+
+ mpic_init(mpic);
+
+#ifdef CONFIG_CPM2
+ /* Setup CPM2 PIC */
+ np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
+ if (np == NULL) {
+ printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
+ return;
+ }
+ irq = irq_of_parse_and_map(np, 0);
+
+ if (irq == NO_IRQ) {
+ of_node_put(np);
+ printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
+ return;
+ }
+
+ cpm2_pic_init(np);
+ of_node_put(np);
+ set_irq_chained_handler(irq, cpm2_cascade);
+#endif
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init stx_gp3_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("stx_gp3_setup_arch()", 0);
+
+#ifdef CONFIG_CPM2
+ cpm2_reset();
+#endif
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
+ fsl_add_bridge(np, 1);
+#endif
+}
+
+static void stx_gp3_show_cpuinfo(struct seq_file *m)
+{
+ uint pvid, svid, phid1;
+ uint memsize = total_memory;
+
+ pvid = mfspr(SPRN_PVR);
+ svid = mfspr(SPRN_SVR);
+
+ seq_printf(m, "Vendor\t\t: RPC Electronics STx \n");
+ seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
+ seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+
+ /* Display cpu Pll setting */
+ phid1 = mfspr(SPRN_HID1);
+ seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
+
+ /* Display the amount of memory */
+ seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+}
+
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .name = "soc", },
+ { .type = "soc", },
+ { .name = "cpm", },
+ { .name = "localbus", },
+ { .compatible = "simple-bus", },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
+ return 0;
+}
+machine_device_initcall(stx_gp3, declare_of_platform_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init stx_gp3_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "stx,gp3-8560");
+}
+
+define_machine(stx_gp3) {
+ .name = "STX GP3",
+ .probe = stx_gp3_probe,
+ .setup_arch = stx_gp3_setup_arch,
+ .init_IRQ = stx_gp3_pic_init,
+ .show_cpuinfo = stx_gp3_show_cpuinfo,
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
--
1.5.3.7
^ permalink raw reply related
* [PATCH] [POWERPC] 82xx and embedded6xx: Use machine_*_initcall() hooks in platform code
From: Grant Likely @ 2008-01-25 5:23 UTC (permalink / raw)
To: galak, linuxppc-dev
From: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
arch/powerpc/platforms/82xx/mpc8272_ads.c | 5 +----
arch/powerpc/platforms/82xx/pq2fads.c | 5 +----
arch/powerpc/platforms/embedded6xx/ls_uart.c | 5 +----
3 files changed, 3 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/platforms/82xx/mpc8272_ads.c b/arch/powerpc/platforms/82xx/mpc8272_ads.c
index fd83440..3fce6b3 100644
--- a/arch/powerpc/platforms/82xx/mpc8272_ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272_ads.c
@@ -165,14 +165,11 @@ static struct of_device_id __initdata of_bus_ids[] = {
static int __init declare_of_platform_devices(void)
{
- if (!machine_is(mpc8272_ads))
- return 0;
-
/* Publish the QE devices */
of_platform_bus_probe(NULL, of_bus_ids, NULL);
return 0;
}
-device_initcall(declare_of_platform_devices);
+machine_device_initcall(mpc8272_ads, declare_of_platform_devices);
/*
* Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/82xx/pq2fads.c b/arch/powerpc/platforms/82xx/pq2fads.c
index 1be5005..68196e3 100644
--- a/arch/powerpc/platforms/82xx/pq2fads.c
+++ b/arch/powerpc/platforms/82xx/pq2fads.c
@@ -176,14 +176,11 @@ static struct of_device_id __initdata of_bus_ids[] = {
static int __init declare_of_platform_devices(void)
{
- if (!machine_is(pq2fads))
- return 0;
-
/* Publish the QE devices */
of_platform_bus_probe(NULL, of_bus_ids, NULL);
return 0;
}
-device_initcall(declare_of_platform_devices);
+machine_device_initcall(pq2fads, declare_of_platform_devices);
define_machine(pq2fads)
{
diff --git a/arch/powerpc/platforms/embedded6xx/ls_uart.c b/arch/powerpc/platforms/embedded6xx/ls_uart.c
index c99264c..9d891bd 100644
--- a/arch/powerpc/platforms/embedded6xx/ls_uart.c
+++ b/arch/powerpc/platforms/embedded6xx/ls_uart.c
@@ -117,9 +117,6 @@ static int __init ls_uarts_init(void)
phys_addr_t phys_addr;
int len;
- if (!machine_is(linkstation))
- return 0;
-
avr = of_find_node_by_path("/soc10x/serial@80004500");
if (!avr)
return -EINVAL;
@@ -142,4 +139,4 @@ static int __init ls_uarts_init(void)
return 0;
}
-late_initcall(ls_uarts_init);
+machine_late_initcall(linkstation, ls_uarts_init);
^ permalink raw reply related
* Re: [PATCH 8/9] powerpc: add the mpc837[789]_rdb dts files
From: Grant Likely @ 2008-01-25 5:44 UTC (permalink / raw)
To: Kim Phillips; +Cc: linuxppc-dev, Joe D'Abbraccio
In-Reply-To: <20080124204718.33a30ab5.kim.phillips@freescale.com>
On 1/24/08, Kim Phillips <kim.phillips@freescale.com> wrote:
> Add the dts files for the MPC838xE Reference Development Board (RDB).
>
> The board is a mini-ITX reference board with 256M DDR2, 8M flash,
> 32M NAND, USB, PCI, gigabit ethernet, SATA, and serial.
>
> the difference among the three files is the 8377 has two, the 8378
> none, and the 8379 has four sata controllers.
All who want to see macro support in dts please raise your hands....
Now we just need to find someone with the time to code it. :-)
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH/RFC] [POWERPC] Allow multiple images to be built when CONFIG_DEFAULT_UIMAGE set
From: Grant Likely @ 2008-01-25 5:51 UTC (permalink / raw)
To: linuxppc-dev, paulus, scottwood, david, Kumar Gala, Jon Loeliger
In-Reply-To: <20080119035528.4286.67752.stgit@trillian.secretlab.ca>
Anybody have comments/concerns on this one?
Cheers,
g.
On 1/18/08, Grant Likely <grant.likely@secretlab.ca> wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> Most of the embedded board ports select CONFIG_DEFAULT_UIMAGE so that
> uImage files get built by default. However, the current code casues
> the arch/powerpc/boot/Makefile to be called with the 'uImage' target
> and adds 'uImage' to the 'image-y' make variable. If CONFIG_DEFAULT_UIMAGE
> is not set, then the boot makefile is called with target 'zImage'.
>
> However, the zImage target already automatically causes all targets
> listed in 'image-y' to be built, which includes uImage.
>
> This patch makes the default build target alwasy call the boot makefile
> using the 'zImage' target, regardless of if CONFIG_DEFAULT_UIMAGE is set.
> Making this change allows multiple boot images to be built from a single
> kernel compile. An example of where this is useful is with the Efika
> and lite5200 boards. Both boards can use the same kernel image (vmlinux),
> but they use different boot image files (zImage.chrp vs. uImage). By
> making this change, the boot makefile now builds both by default so a
> single defconfig can be used for testing both platforms.
>
> This patch also eliminates the BOOTIMAGE variable because it doesn't
> appear to be used anywhere. (Someone please correct me if I'm wrong)
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> ---
>
> arch/powerpc/Makefile | 7 ++-----
> 1 files changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
> index f70df9b..6451c2f 100644
> --- a/arch/powerpc/Makefile
> +++ b/arch/powerpc/Makefile
> @@ -151,10 +151,7 @@ core-$(CONFIG_XMON) += arch/powerpc/xmon/
> drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
>
> # Default to zImage, override when needed
> -defaultimage-y := zImage
> -defaultimage-$(CONFIG_DEFAULT_UIMAGE) := uImage
> -KBUILD_IMAGE := $(defaultimage-y)
> -all: $(KBUILD_IMAGE)
> +all: zImage
>
> CPPFLAGS_vmlinux.lds := -Upowerpc
>
> @@ -180,7 +177,7 @@ define archhelp
> endef
>
> install: vdso_install
> - $(Q)$(MAKE) $(build)=$(boot) BOOTIMAGE=$(KBUILD_IMAGE) install
> + $(Q)$(MAKE) $(build)=$(boot) install
>
> vdso_install:
> ifeq ($(CONFIG_PPC64),y)
>
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* [PATCH 1/4] Search for and publish cell OF platform devices earlier
From: Michael Ellerman @ 2008-01-25 5:59 UTC (permalink / raw)
To: linuxppc-dev; +Cc: cbe-oss-dev
Currently cell publishes OF devices at device_initcall() time, which
means the earliest a driver can bind to a device is also device_initcall()
time. We have a driver we want to register before other devices, so
publish the devices at subsys_initcall() time.
This should not cause any behaviour change for existing drivers, as they
are still bound at device_initcall() time.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
---
arch/powerpc/platforms/cell/setup.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index e6534b5..a7f609b 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -98,7 +98,7 @@ static int __init cell_publish_devices(void)
}
return 0;
}
-machine_device_initcall(cell, cell_publish_devices);
+machine_subsys_initcall(cell, cell_publish_devices);
static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
{
--
1.5.2.rc1.1884.g59b20
^ permalink raw reply related
* [PATCH 2/4] Create and hook up of_platform_device_shutdown
From: Michael Ellerman @ 2008-01-25 5:59 UTC (permalink / raw)
To: linuxppc-dev; +Cc: sparclinux, tnt, cbe-oss-dev, m8, davem
In-Reply-To: <3ce7be4c77581ce103a8da9f33a734270c9dc6e8.1201240265.git.michael@ellerman.id.au>
Although of_platform_device's can have a shutdown routine, at the moment
the bus code doesn't actually call it. So add the required glue to
hook the shutdown routine.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
---
drivers/of/platform.c | 10 ++++++++++
1 files changed, 10 insertions(+), 0 deletions(-)
CC various folks who've written/touched of_platform_drivers which already
have shutdown routines. These routines have never been called so they're
about to get their first testing.
diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index b47bb2d..ca09a63 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -85,6 +85,15 @@ static int of_platform_device_resume(struct device * dev)
return error;
}
+static void of_platform_device_shutdown(struct device *dev)
+{
+ struct of_device *of_dev = to_of_device(dev);
+ struct of_platform_driver *drv = to_of_platform_driver(dev->driver);
+
+ if (dev->driver && drv->shutdown)
+ drv->shutdown(of_dev);
+}
+
int of_bus_type_init(struct bus_type *bus, const char *name)
{
bus->name = name;
@@ -93,6 +102,7 @@ int of_bus_type_init(struct bus_type *bus, const char *name)
bus->remove = of_platform_device_remove;
bus->suspend = of_platform_device_suspend;
bus->resume = of_platform_device_resume;
+ bus->shutdown = of_platform_device_shutdown;
return bus_register(bus);
}
--
1.5.2.rc1.1884.g59b20
^ permalink raw reply related
* [PATCH 3/4] Convert axon_msi to an of_platform driver
From: Michael Ellerman @ 2008-01-25 5:59 UTC (permalink / raw)
To: linuxppc-dev; +Cc: cbe-oss-dev
In-Reply-To: <3ce7be4c77581ce103a8da9f33a734270c9dc6e8.1201240265.git.michael@ellerman.id.au>
Now that we create of_platform devices earlier on cell, we can make the
axon_msi driver an of_platform driver. This makes the code cleaner in
several ways, and most importantly means we have a struct device.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
---
arch/powerpc/platforms/cell/axon_msi.c | 76 ++++++++++++++-----------------
1 files changed, 34 insertions(+), 42 deletions(-)
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index 095988f..ea3dc8c 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -13,7 +13,7 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/msi.h>
-#include <linux/reboot.h>
+#include <linux/of_platform.h>
#include <asm/dcr.h>
#include <asm/machdep.h>
@@ -67,12 +67,9 @@ struct axon_msic {
struct irq_host *irq_host;
__le32 *fifo;
dcr_host_t dcr_host;
- struct list_head list;
u32 read_offset;
};
-static LIST_HEAD(axon_msic_list);
-
static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)
{
pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n);
@@ -292,30 +289,25 @@ static struct irq_host_ops msic_host_ops = {
.map = msic_host_map,
};
-static int axon_msi_notify_reboot(struct notifier_block *nb,
- unsigned long code, void *data)
+static int axon_msi_shutdown(struct of_device *device)
{
- struct axon_msic *msic;
+ struct axon_msic *msic = device->dev.platform_data;
u32 tmp;
- list_for_each_entry(msic, &axon_msic_list, list) {
- pr_debug("axon_msi: disabling %s\n",
- msic->irq_host->of_node->full_name);
- tmp = dcr_read(msic->dcr_host, MSIC_CTRL_REG);
- tmp &= ~MSIC_CTRL_ENABLE & ~MSIC_CTRL_IRQ_ENABLE;
- msic_dcr_write(msic, MSIC_CTRL_REG, tmp);
- }
+ pr_debug("axon_msi: disabling %s\n",
+ msic->irq_host->of_node->full_name);
+ tmp = dcr_read(msic->dcr_host, MSIC_CTRL_REG);
+ tmp &= ~MSIC_CTRL_ENABLE & ~MSIC_CTRL_IRQ_ENABLE;
+ msic_dcr_write(msic, MSIC_CTRL_REG, tmp);
return 0;
}
-static struct notifier_block axon_msi_reboot_notifier = {
- .notifier_call = axon_msi_notify_reboot
-};
-
-static int axon_msi_setup_one(struct device_node *dn)
+static int axon_msi_probe(struct of_device *device,
+ const struct of_device_id *device_id)
{
struct page *page;
+ struct device_node *dn = device->node;
struct axon_msic *msic;
unsigned int virq;
int dcr_base, dcr_len;
@@ -385,7 +377,11 @@ static int axon_msi_setup_one(struct device_node *dn)
MSIC_CTRL_IRQ_ENABLE | MSIC_CTRL_ENABLE |
MSIC_CTRL_FIFO_SIZE);
- list_add(&msic->list, &axon_msic_list);
+ device->dev.platform_data = msic;
+
+ ppc_md.setup_msi_irqs = axon_msi_setup_msi_irqs;
+ ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs;
+ ppc_md.msi_check_device = axon_msi_check_device;
printk(KERN_DEBUG "axon_msi: setup MSIC on %s\n", dn->full_name);
@@ -402,28 +398,24 @@ out:
return -1;
}
-static int axon_msi_init(void)
-{
- struct device_node *dn;
- int found = 0;
-
- pr_debug("axon_msi: initialising ...\n");
-
- for_each_compatible_node(dn, NULL, "ibm,axon-msic") {
- if (axon_msi_setup_one(dn) == 0)
- found++;
- }
-
- if (found) {
- ppc_md.setup_msi_irqs = axon_msi_setup_msi_irqs;
- ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs;
- ppc_md.msi_check_device = axon_msi_check_device;
-
- register_reboot_notifier(&axon_msi_reboot_notifier);
+static const struct of_device_id axon_msi_device_id[] = {
+ {
+ .compatible = "ibm,axon-msic"
+ },
+ {}
+};
- pr_debug("axon_msi: registered callbacks!\n");
- }
+static struct of_platform_driver axon_msi_driver = {
+ .match_table = axon_msi_device_id,
+ .probe = axon_msi_probe,
+ .shutdown = axon_msi_shutdown,
+ .driver = {
+ .name = "axon-msi"
+ },
+};
- return 0;
+static int __init axon_msi_init(void)
+{
+ return of_register_platform_driver(&axon_msi_driver);
}
-arch_initcall(axon_msi_init);
+subsys_initcall(axon_msi_init);
--
1.5.2.rc1.1884.g59b20
^ permalink raw reply related
* [PATCH 4/4] Avoid DMA exception when using axon_msi with IOMMU
From: Michael Ellerman @ 2008-01-25 5:59 UTC (permalink / raw)
To: linuxppc-dev; +Cc: cbe-oss-dev
In-Reply-To: <3ce7be4c77581ce103a8da9f33a734270c9dc6e8.1201240265.git.michael@ellerman.id.au>
There's a brown-paper-bag bug in axon_msi, we pass the address of our
FIFO directly to the hardware, without DMA mapping it. This leads to
DMA exceptions if you enable MSI & the IOMMU.
The fix is to correctly DMA map the fifo, dma_alloc_coherent() does
what we want - and we need to track the virt & phys addresses.
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
---
arch/powerpc/platforms/cell/axon_msi.c | 21 ++++++++++-----------
1 files changed, 10 insertions(+), 11 deletions(-)
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index ea3dc8c..b9a97c4 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -65,7 +65,8 @@
struct axon_msic {
struct irq_host *irq_host;
- __le32 *fifo;
+ __le32 *fifo_virt;
+ dma_addr_t fifo_phys;
dcr_host_t dcr_host;
u32 read_offset;
};
@@ -91,7 +92,7 @@ static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
while (msic->read_offset != write_offset) {
idx = msic->read_offset / sizeof(__le32);
- msi = le32_to_cpu(msic->fifo[idx]);
+ msi = le32_to_cpu(msic->fifo_virt[idx]);
msi &= 0xFFFF;
pr_debug("axon_msi: woff %x roff %x msi %x\n",
@@ -306,7 +307,6 @@ static int axon_msi_shutdown(struct of_device *device)
static int axon_msi_probe(struct of_device *device,
const struct of_device_id *device_id)
{
- struct page *page;
struct device_node *dn = device->node;
struct axon_msic *msic;
unsigned int virq;
@@ -338,16 +338,14 @@ static int axon_msi_probe(struct of_device *device,
goto out_free_msic;
}
- page = alloc_pages_node(of_node_to_nid(dn), GFP_KERNEL,
- get_order(MSIC_FIFO_SIZE_BYTES));
- if (!page) {
+ msic->fifo_virt = dma_alloc_coherent(&device->dev, MSIC_FIFO_SIZE_BYTES,
+ &msic->fifo_phys, GFP_KERNEL);
+ if (!msic->fifo_virt) {
printk(KERN_ERR "axon_msi: couldn't allocate fifo for %s\n",
dn->full_name);
goto out_free_msic;
}
- msic->fifo = page_address(page);
-
msic->irq_host = irq_alloc_host(of_node_get(dn), IRQ_HOST_MAP_NOMAP,
NR_IRQS, &msic_host_ops, 0);
if (!msic->irq_host) {
@@ -370,9 +368,9 @@ static int axon_msi_probe(struct of_device *device,
pr_debug("axon_msi: irq 0x%x setup for axon_msi\n", virq);
/* Enable the MSIC hardware */
- msic_dcr_write(msic, MSIC_BASE_ADDR_HI_REG, (u64)msic->fifo >> 32);
+ msic_dcr_write(msic, MSIC_BASE_ADDR_HI_REG, msic->fifo_phys >> 32);
msic_dcr_write(msic, MSIC_BASE_ADDR_LO_REG,
- (u64)msic->fifo & 0xFFFFFFFF);
+ msic->fifo_phys & 0xFFFFFFFF);
msic_dcr_write(msic, MSIC_CTRL_REG,
MSIC_CTRL_IRQ_ENABLE | MSIC_CTRL_ENABLE |
MSIC_CTRL_FIFO_SIZE);
@@ -390,7 +388,8 @@ static int axon_msi_probe(struct of_device *device,
out_free_host:
kfree(msic->irq_host);
out_free_fifo:
- __free_pages(virt_to_page(msic->fifo), get_order(MSIC_FIFO_SIZE_BYTES));
+ dma_free_coherent(&device->dev, MSIC_FIFO_SIZE_BYTES, msic->fifo_virt,
+ msic->fifo_phys);
out_free_msic:
kfree(msic);
out:
--
1.5.2.rc1.1884.g59b20
^ permalink raw reply related
* Re: 2.6.24 Kernel oops will running kernbench regression from 2.6.24-rc8-mm1
From: Kamalesh Babulal @ 2008-01-25 6:05 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, Andrew Morton, Balbir Singh, linux-kernel
In-Reply-To: <18320.32464.634534.415458@cargo.ozlabs.ibm.com>
Paul Mackerras wrote:
> Kamalesh Babulal writes:
>
>>>>> NIP: 0000000000004570 LR: 000000000fc42dc0 CTR: 0000000000000000
>>>>> REGS: c00000077b6bf8c0 TRAP: 0300 Not tainted (2.6.24-rc8-mm1-autotest)
>>>>> MSR: 8000000000001000 <ME> CR: 28022422 XER: 00000000
>>>>> DAR: c00000077b6bfce0, DSISR: 000000000a000000
>
> Actually, how much RAM does this machine have? If it has less than
> 32GB, then the problem is that the kernel stack pointer is bogus.
> (How it got to be bogus is the interesting question, of course. :)
>
> Paul.
>
Hi Paul,
This kernel oops in seen in 2.6.24-rc8-git(2,3,4,5,7,8) and the 2.6.24.
Oops: Kernel access of bad area, sig: 11 [#1]
SMP NR_CPUS=32 NUMA pSeries
Modules linked in:
NIP: 0000000000004570 LR: 000000001030e594 CTR: 000000001012ddd0
REGS: c000000771f9f8c0 TRAP: 0300 Not tainted (2.6.24-autotest)
MSR: 8000000000001000 <ME> CR: 28000482 XER: 20000000
DAR: c000000771f9fce0, DSISR: 000000000a000000
TASK = c00000077b9c6000[19197] 'cc1' THREAD: c000000771f9c000 CPU: 2
GPR00: 0000000000000064 c000000771f9fb40 00000000f7fdb470 0000000000000000
GPR04: 0000000000000002 0000000000000000 0000000000782498 00000000003ff3ff
GPR08: 00000000aaaaaaab 0000000040000484 c000000771f9fe30 0000998be2321500
GPR12: 8000000000003030 c0000000005c5680 0000000010030000 0000000010030000
GPR16: 00000000105b0000 00000000105b0000 0000000010440000 00000000105b0000
GPR20: 00000000105b0000 00000000105f0000 0000000000000000 00000000ffd00b44
GPR24: 00000000105b0000 00000000105b0000 00000000105b0000 00000000105b0000
GPR28: 00000000105b0000 0000000010604684 0000000000000100 00000000105f75a8
NIP [0000000000004570] 0x4570
LR [000000001030e594] 0x1030e594
Call Trace:
[c000000771f9fb40] [c000000771f9fcf0] 0xc000000771f9fcf0 (unreliable)
Instruction dump:
48000000 XXXXXXXX XXXXXXXX XXXXXXXX 41820008 XXXXXXXX XXXXXXXX XXXXXXXX
48000010 XXXXXXXX XXXXXXXX XXXXXXXX f92101a0 XXXXXXXX XXXXXXXX XXXXXXXX
---[ end trace a8c779b801674eed ]---
-- 0:conmux-control -- time-stamp -- Jan/24/08 16:40:29 --
-- 0:conmux-control -- time-stamp -- Jan/24/08 16:47:56 --
Unable to handle kernel paging request for data at address 0xc00000077168f870
Faulting instruction address: 0x00004570
Oops: Kernel access of bad area, sig: 11 [#2]
SMP NR_CPUS=32 NUMA pSeries
Modules linked in:
NIP: 0000000000004570 LR: c00000000004a310 CTR: 0000000000000000
REGS: c00000077168f450 TRAP: 0300 Tainted: G D (2.6.24-autotest)
MSR: 8000000000001000 <ME> CR: 28000242 XER: 00000000
DAR: c00000077168f870, DSISR: 000000000a000000
TASK = c000000771fdb170[24200] 'tbench' THREAD: c00000077168c000 CPU: 1
GPR00: 0000000000000000 c00000077168f6d0 c00000000068bc30 8000000000009032
GPR04: 8000000000001030 000000000000025a 0000000042000222 c00000000000ee64
GPR08: c00000077168fae0 0000000028000242 c00000077168f9c0 0000998be2321500
GPR12: 8000000000001030 c0000000005c5480 0000000000000000 0000000000000000
GPR16: 00000000100a0000 00000000100a8b10 00000000100a0000 0000000010000000
GPR20: 0000000000005e84 c000000000008cd4 c00000077168c000 c000000771fdb390
GPR24: 0000000000000001 00000000ff9ce668 00000000ff9cec5c c000000771fdb170
GPR28: 0000000000000001 c00000077ca7cba0 c000000000615938 0000000000000000
NIP [0000000000004570] 0x4570
LR [c00000000004a310] .finish_task_switch+0x54/0xe8
Call Trace:
[c00000077168f6d0] [c00000077168f790] 0xc00000077168f790 (unreliable)
Instruction dump:
48000000 XXXXXXXX XXXXXXXX XXXXXXXX 41820008 XXXXXXXX XXXXXXXX XXXXXXXX
48000010 XXXXXXXX XXXXXXXX XXXXXXXX f92101a0 XXXXXXXX XXXXXXXX XXXXXXXX
--
Thanks & Regards,
Kamalesh Babulal,
Linux Technology Center,
IBM, ISTL.
^ permalink raw reply
* Re: [PATCH] powerpc: reduce code duplication in legacy_serial, add UART parent types
From: Arnd Bergmann @ 2008-01-25 6:17 UTC (permalink / raw)
To: linuxppc-dev; +Cc: scottwood, Paul Gortmaker
In-Reply-To: <12011947821738-git-send-email-paul.gortmaker@windriver.com>
On Thursday 24 January 2008, Paul Gortmaker wrote:
> The legacy_serial was treating each UART parent in a separate code block.
> Rather than continue this trend for the new parent IDs, this condenses
> all (soc, tsi, opb, plus two more new types) into one of_device_id array.
> The new types are wrs,epld-localbus for the Wind River sbc8560, and a
> more generic "simple-bus" as requested by Scott Wood.
>=20
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Looks good to me, thanks!
=A0
> -=A0=A0=A0=A0=A0=A0=A0/* First fill our array with SOC ports */
> +=A0=A0=A0=A0=A0=A0=A0/* Iterate over all the 16550 ports, looking for kn=
own parents */
> =A0=A0=A0=A0=A0=A0=A0=A0for_each_compatible_node(np, "serial", "ns16550")=
{
> -=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0struct device_node *soc =3D=
of_get_parent(np);
> -=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0if (soc && !strcmp(soc->typ=
e, "soc")) {
> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0struct device_node *parent =
=3D of_get_parent(np);
> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0if (!parent)
> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0con=
tinue;
> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0if (of_match_node(parents, =
parent) !=3D NULL) {
Personally, I prefer to write this as
if (of_match_node(parents, parent)) {
but that question of coding style is controversial enough that I
stopped insisting on that, so do whichever you like best.
Arnd <><
^ permalink raw reply
* [PATCH] mpc834x_mds: Convert device tree source to dts-v1
From: Paul Gortmaker @ 2008-01-25 6:22 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
Move mpc834x_mds device tree source forward to dts-v1 format. Nothing
too complex in this one, so it boils down to just adding a bunch of 0x
in the right places and converting clock speeds to decimal.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc834x_mds.dts | 254 +++++++++++++++++----------------
1 files changed, 128 insertions(+), 126 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 4120e92..16345f2 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -9,6 +9,8 @@
* option) any later version.
*/
+/dts-v1/;
+
/ {
model = "MPC8349EMDS";
compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
@@ -31,10 +33,10 @@
PowerPC,8349@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <8000>; // L1, 32K
- i-cache-size = <8000>; // L1, 32K
+ d-cache-line-size = <0x20>; // 32 bytes
+ i-cache-line-size = <0x20>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -43,26 +45,26 @@
memory {
device_type = "memory";
- reg = <00000000 10000000>; // 256MB at 0
+ reg = <0x00000000 0x10000000>; // 256MB at 0
};
bcsr@e2400000 {
device_type = "board-control";
- reg = <e2400000 8000>;
+ reg = <0xe2400000 0x8000>;
};
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -70,14 +72,14 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <0xe 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
compatible = "dallas,ds1374";
- reg = <68>;
+ reg = <0x68>;
};
};
@@ -86,41 +88,41 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3100 0x100>;
+ interrupts = <0xf 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
spi@7000 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <7000 1000>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x7000 0x1000>;
+ interrupts = <0x10 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
- /* phy type (ULPI or SERIAL) are only types supportted for MPH */
+ /* phy type (ULPI or SERIAL) are only types supported for MPH */
/* port = 0 or 1 */
usb@22000 {
compatible = "fsl-usb2-mph";
- reg = <22000 1000>;
+ reg = <0x22000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <27 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <0x27 0x8>;
phy_type = "ulpi";
port1;
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
compatible = "fsl-usb2-dr";
- reg = <23000 1000>;
+ reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <26 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <0x26 0x8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@@ -129,18 +131,18 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
- reg = <24520 20>;
+ reg = <0x24520 0x20>;
phy0: ethernet-phy@0 {
- interrupt-parent = < &ipic >;
- interrupts = <11 8>;
- reg = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <0x11 0x8>;
+ reg = <0x0>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@1 {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
- reg = <1>;
+ interrupt-parent = <&ipic>;
+ interrupts = <0x12 0x8>;
+ reg = <0x1>;
device_type = "ethernet-phy";
};
};
@@ -150,11 +152,11 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <24000 1000>;
+ reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <20 8 21 8 22 8>;
- interrupt-parent = < &ipic >;
- phy-handle = < &phy0 >;
+ interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy0>;
linux,network-index = <0>;
};
@@ -163,11 +165,11 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <25000 1000>;
+ reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <23 8 24 8 25 8>;
- interrupt-parent = < &ipic >;
- phy-handle = < &phy1 >;
+ interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy1>;
linux,network-index = <1>;
};
@@ -175,20 +177,20 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <0x9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <0xa 0x8>;
+ interrupt-parent = <&ipic>;
};
/* May need to remove if on a part without crypto engine */
@@ -196,15 +198,15 @@
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x10000>;
+ interrupts = <0xb 0x8>;
+ interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000007e>;
/* desc mask is for rev2.0,
* we need runtime fixup for >2.0 */
- descriptor-types-mask = <01010ebf>;
+ descriptor-types-mask = <0x01010ebf>;
};
/* IPIC
@@ -217,129 +219,129 @@
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 */
- 8800 0 0 1 &ipic 14 8
- 8800 0 0 2 &ipic 15 8
- 8800 0 0 3 &ipic 16 8
- 8800 0 0 4 &ipic 17 8
+ 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
/* IDSEL 0x12 */
- 9000 0 0 1 &ipic 16 8
- 9000 0 0 2 &ipic 17 8
- 9000 0 0 3 &ipic 14 8
- 9000 0 0 4 &ipic 15 8
+ 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
/* IDSEL 0x13 */
- 9800 0 0 1 &ipic 17 8
- 9800 0 0 2 &ipic 14 8
- 9800 0 0 3 &ipic 15 8
- 9800 0 0 4 &ipic 16 8
+ 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
/* IDSEL 0x15 */
- a800 0 0 1 &ipic 14 8
- a800 0 0 2 &ipic 15 8
- a800 0 0 3 &ipic 16 8
- a800 0 0 4 &ipic 17 8
+ 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
/* IDSEL 0x16 */
- b000 0 0 1 &ipic 17 8
- b000 0 0 2 &ipic 14 8
- b000 0 0 3 &ipic 15 8
- b000 0 0 4 &ipic 16 8
+ 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
/* IDSEL 0x17 */
- b800 0 0 1 &ipic 16 8
- b800 0 0 2 &ipic 17 8
- b800 0 0 3 &ipic 14 8
- b800 0 0 4 &ipic 15 8
+ 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
/* IDSEL 0x18 */
- c000 0 0 1 &ipic 15 8
- c000 0 0 2 &ipic 16 8
- c000 0 0 3 &ipic 17 8
- c000 0 0 4 &ipic 14 8>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
+ 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <0x42 0x8>;
bus-range = <0 0>;
- ranges = <02000000 0 90000000 90000000 0 10000000
- 42000000 0 80000000 80000000 0 10000000
- 01000000 0 00000000 e2000000 0 00100000>;
- clock-frequency = <3f940aa>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
pci1: pci@e0008600 {
cell-index = <2>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 */
- 8800 0 0 1 &ipic 14 8
- 8800 0 0 2 &ipic 15 8
- 8800 0 0 3 &ipic 16 8
- 8800 0 0 4 &ipic 17 8
+ 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
/* IDSEL 0x12 */
- 9000 0 0 1 &ipic 16 8
- 9000 0 0 2 &ipic 17 8
- 9000 0 0 3 &ipic 14 8
- 9000 0 0 4 &ipic 15 8
+ 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
/* IDSEL 0x13 */
- 9800 0 0 1 &ipic 17 8
- 9800 0 0 2 &ipic 14 8
- 9800 0 0 3 &ipic 15 8
- 9800 0 0 4 &ipic 16 8
+ 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
/* IDSEL 0x15 */
- a800 0 0 1 &ipic 14 8
- a800 0 0 2 &ipic 15 8
- a800 0 0 3 &ipic 16 8
- a800 0 0 4 &ipic 17 8
+ 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
/* IDSEL 0x16 */
- b000 0 0 1 &ipic 17 8
- b000 0 0 2 &ipic 14 8
- b000 0 0 3 &ipic 15 8
- b000 0 0 4 &ipic 16 8
+ 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
/* IDSEL 0x17 */
- b800 0 0 1 &ipic 16 8
- b800 0 0 2 &ipic 17 8
- b800 0 0 3 &ipic 14 8
- b800 0 0 4 &ipic 15 8
+ 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
/* IDSEL 0x18 */
- c000 0 0 1 &ipic 15 8
- c000 0 0 2 &ipic 16 8
- c000 0 0 3 &ipic 17 8
- c000 0 0 4 &ipic 14 8>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
+ 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <0x42 0x8>;
bus-range = <0 0>;
- ranges = <02000000 0 b0000000 b0000000 0 10000000
- 42000000 0 a0000000 a0000000 0 10000000
- 01000000 0 00000000 e2100000 0 00100000>;
- clock-frequency = <3f940aa>;
+ ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
+ 0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008600 100>;
+ reg = <0xe0008600 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* Re: framebuffer swap endianess
From: Roman Fietze @ 2008-01-25 6:47 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <217742.24232.qm@web23107.mail.ird.yahoo.com>
Hello Angelo,
Question to the mailing list readers: is it ok to post an xfree86 or
xorg patch in this mailing list (about 9KiB), or would it be better to
mail that patch to Angelo directly? Thanks.
On Thursday 24 January 2008 15:27:12 Angelo wrote:
> Modify the X server is a good idea.
Sure, if you know where. It took us some time to find "the" correct
place. But see below. :)
> Could you tell me where is the exact place to do this? in some files like
> fbdev.c or other?
The major changes are inside programs/Xserver/miext/shadow/shpacked.c
of either the xorg or xfree86 version of the X server. The swap is
done when copying the data from the shadow buffer to the video memory.
Another place is programs/Xserver/hw/xfree86/drivers/fbdev/fbdev.c,
but here we just setup the Screen correctly, so our new swapping
shadow buffer update route will be used.
> >This was on the 2.4.25 from DENX and with Xfree86.
>
> Sorry but i don't understand this sentence.
We were using Linux 2.4.25 for the PowerPC from DENX and the XFree86 X
Server. The kernel version shouldn't be a problem at all, and I think
the patches should work on either X Server version, Xorg or Xfree86.
Roman
=2D-=20
Roman Fietze Telemotive AG B=FCro M=FChlhausen
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Benjamin Herrenschmidt @ 2008-01-25 6:54 UTC (permalink / raw)
To: Peter Zijlstra; +Cc: linuxppc-dev, Ingo Molnar, Michel Dänzer
In-Reply-To: <1201092131.6341.51.camel@lappy>
On Wed, 2008-01-23 at 13:42 +0100, Peter Zijlstra wrote:
> Another question, do you have:
> CONFIG_FAIR_GROUP_SCHED=y
>
> if so, does flipping that off have any effect?
Yes.
Here, I do the test of running 4 times the repro-case provided by Michel
with nice 19 and a dd eating CPU with nice 0.
Without this option, I get the dd at 100% and the nice 19 shells down
below it with whatever is left of the CPUs.
With this option, dd gets about 50% of one CPU and the niced processes
still get most of the time.
Ben.
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Benjamin Herrenschmidt @ 2008-01-25 7:03 UTC (permalink / raw)
To: Peter Zijlstra; +Cc: linuxppc-dev, Ingo Molnar, Michel Dänzer
In-Reply-To: <1201244082.6815.128.camel@pasglop>
On Fri, 2008-01-25 at 17:54 +1100, Benjamin Herrenschmidt wrote:
>
> Here, I do the test of running 4 times the repro-case provided by Michel
> with nice 19 and a dd eating CPU with nice 0.
>
> Without this option, I get the dd at 100% and the nice 19 shells down
> below it with whatever is left of the CPUs.
>
> With this option, dd gets about 50% of one CPU and the niced processes
> still get most of the time.
FYI. This is a 4 way G5 (ppc64)
Ben.
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Benjamin Herrenschmidt @ 2008-01-25 7:25 UTC (permalink / raw)
To: Peter Zijlstra; +Cc: linuxppc-dev, Ingo Molnar, Michel Dänzer
In-Reply-To: <1201244618.6815.130.camel@pasglop>
On Fri, 2008-01-25 at 18:03 +1100, Benjamin Herrenschmidt wrote:
> On Fri, 2008-01-25 at 17:54 +1100, Benjamin Herrenschmidt wrote:
> >
> > Here, I do the test of running 4 times the repro-case provided by Michel
> > with nice 19 and a dd eating CPU with nice 0.
> >
> > Without this option, I get the dd at 100% and the nice 19 shells down
> > below it with whatever is left of the CPUs.
> >
> > With this option, dd gets about 50% of one CPU and the niced processes
> > still get most of the time.
>
> FYI. This is a 4 way G5 (ppc64)
I also tested responsiveness of X running with or without that option
and with niced CPU eaters in the background (still 4 of them, one per
CPU), and I can confirm Michel observations, it gets very sluggish
(maybe not -as- bad as his but still pretty annoying) with the fair
group scheduler enabled.
Here, X is running with nice=0
Ben.
^ permalink raw reply
* Re: Failed to mount rootfs
From: Heiko Schocher @ 2008-01-25 7:19 UTC (permalink / raw)
To: Bizhan Gholikhamseh (bgholikh); +Cc: linuxppc-embedded
In-Reply-To: <mailman.1307.1201212280.6908.linuxppc-embedded@ozlabs.org>
Hello Bizhan,
"Bizhan Gholikhamseh (bgholikh)" <bgholikh@cisco.com> wrote:
> Our custom board is leveraged from MPC8541cds from freescale.
> We have been running Linux 2.6.11 on it recently I have tried to boot
> the system with the latest Linux 2.6.22-rc4 from PowerPC git tree.
>
> I did ported the libfdt to our older version of the uboot and were able
> to
Hmm... why you didnt use actual code?
[...]
> chosen {
> linux,stdout-path = "/soc8541@e0000000/serial@4600";
> };
> chosen {
> name = "chosen";
> bootargs = "root=/dev/ram rw console=ttyS1,115200";
> linux,platform = <600>;
> linux,initrd-start = <1ef33000>;
> linux,initrd-end = <1fe190aa>;
> linux,stdout-path = "/soc8541@e0000000/serial@4600";
> };
> };
Here is your problem, you have 2 choosen nodes:
64k data, 108k bss, 116k init) Mount-cache hash table entries: 512
device-tree: Duplicate name in /, renamed to "chosen#1"
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
-> Linux didnt find your commandline ...
Hmm... do you have CONFIG_OF_FLAT_TREE and CONFIG_OF_LIBFDT defined?
If so, this would explain, why you have 2 choosen nodes.
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply
* [PATCH] [POWERPC] 85xx: Port TQM85xx boards over from arch/ppc
From: Kumar Gala @ 2008-01-25 7:40 UTC (permalink / raw)
To: linuxppc-dev
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/boot/dts/tqm8540.dts | 204 +++++++
arch/powerpc/boot/dts/tqm8541.dts | 228 +++++++
arch/powerpc/boot/dts/tqm8555.dts | 228 +++++++
arch/powerpc/boot/dts/tqm8560.dts | 245 ++++++++
arch/powerpc/configs/tqm8540_defconfig | 1032 +++++++++++++++++++++++++++++++
arch/powerpc/configs/tqm8541_defconfig | 1044 ++++++++++++++++++++++++++++++++
arch/powerpc/configs/tqm8555_defconfig | 1044 ++++++++++++++++++++++++++++++++
arch/powerpc/configs/tqm8560_defconfig | 1044 ++++++++++++++++++++++++++++++++
arch/powerpc/platforms/85xx/Kconfig | 39 ++
arch/powerpc/platforms/85xx/Makefile | 1 +
arch/powerpc/platforms/85xx/tqm85xx.c | 191 ++++++
11 files changed, 5300 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/tqm8540.dts
create mode 100644 arch/powerpc/boot/dts/tqm8541.dts
create mode 100644 arch/powerpc/boot/dts/tqm8555.dts
create mode 100644 arch/powerpc/boot/dts/tqm8560.dts
create mode 100644 arch/powerpc/configs/tqm8540_defconfig
create mode 100644 arch/powerpc/configs/tqm8541_defconfig
create mode 100644 arch/powerpc/configs/tqm8555_defconfig
create mode 100644 arch/powerpc/configs/tqm8560_defconfig
create mode 100644 arch/powerpc/platforms/85xx/tqm85xx.c
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
new file mode 100644
index 0000000..a6e3989
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -0,0 +1,204 @@
+/*
+ * TQM 8540 Device Tree Source
+ *
+ * Copyright 2008 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "tqm,8540";
+ compatible = "tqm,8540", "tqm,85xx";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8540@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ soc8540@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0x0 0xe0000000 0x100000>;
+ reg = <0xe0000000 0x200>;
+ bus-frequency = <0>;
+ compatible = "fsl,mpc8540-immr", "simple-bus";
+
+ memory-controller@2000 {
+ compatible = "fsl,8540-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ };
+
+ l2-cache-controller@20000 {
+ compatible = "fsl,8540-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ cache-line-size = <32>;
+ cache-size = <0x40000>; // L2, 256K
+ interrupt-parent = <&mpic>;
+ interrupts = <16 2>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <43 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+
+ rtc@68 {
+ compatible = "dallas,ds1337";
+ reg = <0x68>;
+ };
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ enet0: ethernet@24000 {
+ cell-index = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <29 2 30 2 34 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy2>;
+ };
+
+ enet1: ethernet@25000 {
+ cell-index = <1>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <35 2 36 2 40 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy1>;
+ };
+
+ enet2: ethernet@26000 {
+ cell-index = <2>;
+ device_type = "network";
+ model = "FEC";
+ compatible = "gianfar";
+ reg = <0x26000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <41 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy3>;
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ mpic: pic@40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x40000 0x40000>;
+ device_type = "open-pic";
+ };
+ };
+
+ pci0: pci@e0008000 {
+ cell-index = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+ device_type = "pci";
+ reg = <0xe0008000 0x1000>;
+ clock-frequency = <66666666>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* IDSEL 28 */
+ 0xe000 0 0 1 &mpic 2 1
+ 0xe000 0 0 2 &mpic 3 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <24 2>;
+ bus-range = <0 0>;
+ ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
new file mode 100644
index 0000000..11bdb0f
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -0,0 +1,228 @@
+/*
+ * TQM 8541 Device Tree Source
+ *
+ * Copyright 2008 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "tqm,8541";
+ compatible = "tqm,8541", "tqm,85xx";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8541@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ soc8541@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0x0 0xe0000000 0x100000>;
+ reg = <0xe0000000 0x200>;
+ bus-frequency = <0>;
+ compatible = "fsl,mpc8541-immr", "simple-bus";
+
+ memory-controller@2000 {
+ compatible = "fsl,8540-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ };
+
+ l2-cache-controller@20000 {
+ compatible = "fsl,8540-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ cache-line-size = <32>;
+ cache-size = <0x40000>; // L2, 256K
+ interrupt-parent = <&mpic>;
+ interrupts = <16 2>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <43 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+
+ rtc@68 {
+ compatible = "dallas,ds1337";
+ reg = <0x68>;
+ };
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ enet0: ethernet@24000 {
+ cell-index = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <29 2 30 2 34 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy2>;
+ };
+
+ enet1: ethernet@25000 {
+ cell-index = <1>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <35 2 36 2 40 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy1>;
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ mpic: pic@40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x40000 0x40000>;
+ device_type = "open-pic";
+ };
+
+ cpm@919c0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8541-cpm", "fsl,cpm2", "simple-bus";
+ reg = <0x919c0 0x30>;
+ ranges;
+
+ muram@80000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x80000 0x10000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 0x2000 0x9000 0x1000>;
+ };
+ };
+
+ brg@919f0 {
+ compatible = "fsl,mpc8541-brg",
+ "fsl,cpm2-brg",
+ "fsl,cpm-brg";
+ reg = <0x919f0 0x10 0x915f0 0x10>;
+ clock-frequency = <0>;
+ };
+
+ cpmpic: pic@90c00 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <46 2>;
+ interrupt-parent = <&mpic>;
+ reg = <0x90c00 0x80>;
+ compatible = "fsl,mpc8541-cpm-pic", "fsl,cpm2-pic";
+ };
+ };
+ };
+
+ pci0: pci@e0008000 {
+ cell-index = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+ device_type = "pci";
+ reg = <0xe0008000 0x1000>;
+ clock-frequency = <66666666>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* IDSEL 28 */
+ 0xe000 0 0 1 &mpic 2 1
+ 0xe000 0 0 2 &mpic 3 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <24 2>;
+ bus-range = <0 0>;
+ ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
new file mode 100644
index 0000000..eef9a6b
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -0,0 +1,228 @@
+/*
+ * TQM 8555 Device Tree Source
+ *
+ * Copyright 2008 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "tqm,8555";
+ compatible = "tqm,8555", "tqm,85xx";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8555@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ soc8555@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0x0 0xe0000000 0x100000>;
+ reg = <0xe0000000 0x200>;
+ bus-frequency = <0>;
+ compatible = "fsl,mpc8555-immr", "simple-bus";
+
+ memory-controller@2000 {
+ compatible = "fsl,8540-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ };
+
+ l2-cache-controller@20000 {
+ compatible = "fsl,8540-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ cache-line-size = <32>;
+ cache-size = <0x40000>; // L2, 256K
+ interrupt-parent = <&mpic>;
+ interrupts = <16 2>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <43 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+
+ rtc@68 {
+ compatible = "dallas,ds1337";
+ reg = <0x68>;
+ };
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ enet0: ethernet@24000 {
+ cell-index = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <29 2 30 2 34 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy2>;
+ };
+
+ enet1: ethernet@25000 {
+ cell-index = <1>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <35 2 36 2 40 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy1>;
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ mpic: pic@40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x40000 0x40000>;
+ device_type = "open-pic";
+ };
+
+ cpm@919c0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8555-cpm", "fsl,cpm2", "simple-bus";
+ reg = <0x919c0 0x30>;
+ ranges;
+
+ muram@80000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x80000 0x10000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 0x2000 0x9000 0x1000>;
+ };
+ };
+
+ brg@919f0 {
+ compatible = "fsl,mpc8555-brg",
+ "fsl,cpm2-brg",
+ "fsl,cpm-brg";
+ reg = <0x919f0 0x10 0x915f0 0x10>;
+ clock-frequency = <0>;
+ };
+
+ cpmpic: pic@90c00 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <46 2>;
+ interrupt-parent = <&mpic>;
+ reg = <0x90c00 0x80>;
+ compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic";
+ };
+ };
+ };
+
+ pci0: pci@e0008000 {
+ cell-index = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+ device_type = "pci";
+ reg = <0xe0008000 0x1000>;
+ clock-frequency = <66666666>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* IDSEL 28 */
+ 0xe000 0 0 1 &mpic 2 1
+ 0xe000 0 0 2 &mpic 3 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <24 2>;
+ bus-range = <0 0>;
+ ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
new file mode 100644
index 0000000..8ca7fdd
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -0,0 +1,245 @@
+/*
+ * TQM 8560 Device Tree Source
+ *
+ * Copyright 2008 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "tqm,8560";
+ compatible = "tqm,8560", "tqm,85xx";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8560@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
+ timebase-frequency = <0>;
+ bus-frequency = <0>;
+ clock-frequency = <0>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ soc8560@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ ranges = <0x0 0xe0000000 0x100000>;
+ reg = <0xe0000000 0x200>;
+ bus-frequency = <0>;
+ compatible = "fsl,mpc8560-immr", "simple-bus";
+
+ memory-controller@2000 {
+ compatible = "fsl,8540-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ };
+
+ l2-cache-controller@20000 {
+ compatible = "fsl,8540-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ cache-line-size = <32>;
+ cache-size = <0x40000>; // L2, 256K
+ interrupt-parent = <&mpic>;
+ interrupts = <16 2>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <43 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+
+ rtc@68 {
+ compatible = "dallas,ds1337";
+ reg = <0x68>;
+ };
+ };
+
+ mdio@24520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x24520 0x20>;
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <1>;
+ device_type = "ethernet-phy";
+ };
+ phy2: ethernet-phy@2 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupt-parent = <&mpic>;
+ interrupts = <8 1>;
+ reg = <3>;
+ device_type = "ethernet-phy";
+ };
+ };
+
+ enet0: ethernet@24000 {
+ cell-index = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <29 2 30 2 34 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy2>;
+ };
+
+ enet1: ethernet@25000 {
+ cell-index = <1>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <35 2 36 2 40 2>;
+ interrupt-parent = <&mpic>;
+ phy-handle = <&phy1>;
+ };
+
+ mpic: pic@40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x40000 0x40000>;
+ device_type = "open-pic";
+ };
+
+ cpm@919c0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
+ reg = <0x919c0 0x30>;
+ ranges;
+
+ muram@80000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x80000 0x10000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0 0x4000 0x9000 0x2000>;
+ };
+ };
+
+ brg@919f0 {
+ compatible = "fsl,mpc8560-brg",
+ "fsl,cpm2-brg",
+ "fsl,cpm-brg";
+ reg = <0x919f0 0x10 0x915f0 0x10>;
+ clock-frequency = <0>;
+ };
+
+ cpmpic: pic@90c00 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <46 2>;
+ interrupt-parent = <&mpic>;
+ reg = <0x90c00 0x80>;
+ compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
+ };
+
+ serial0: serial@91a00 {
+ device_type = "serial";
+ compatible = "fsl,mpc8560-scc-uart",
+ "fsl,cpm2-scc-uart";
+ reg = <0x91a00 0x20 0x88000 0x100>;
+ fsl,cpm-brg = <1>;
+ fsl,cpm-command = <0x800000>;
+ current-speed = <115200>;
+ interrupts = <40 8>;
+ interrupt-parent = <&cpmpic>;
+ };
+
+ serial1: serial@91a20 {
+ device_type = "serial";
+ compatible = "fsl,mpc8560-scc-uart",
+ "fsl,cpm2-scc-uart";
+ reg = <0x91a20 0x20 0x88100 0x100>;
+ fsl,cpm-brg = <2>;
+ fsl,cpm-command = <0x4a00000>;
+ current-speed = <115200>;
+ interrupts = <41 8>;
+ interrupt-parent = <&cpmpic>;
+ };
+
+ enet2: ethernet@91340 {
+ device_type = "network";
+ compatible = "fsl,mpc8560-fcc-enet",
+ "fsl,cpm2-fcc-enet";
+ reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ fsl,cpm-command = <0x1a400300>;
+ interrupts = <34 8>;
+ interrupt-parent = <&cpmpic>;
+ phy-handle = <&phy3>;
+ };
+ };
+ };
+
+ pci0: pci@e0008000 {
+ cell-index = <0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+ device_type = "pci";
+ reg = <0xe0008000 0x1000>;
+ clock-frequency = <66666666>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* IDSEL 28 */
+ 0xe000 0 0 1 &mpic 2 1
+ 0xe000 0 0 2 &mpic 3 1>;
+
+ interrupt-parent = <&mpic>;
+ interrupts = <24 2>;
+ bus-range = <0 0>;
+ ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
+ };
+};
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 26f9cd5..7896f06 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -46,8 +46,47 @@ config STX_GP3
select DEFAULT_UIMAGE
select PPC_CPM_NEW_BINDING
+config TQM8540
+ bool "TQ Components TQM8540"
+ help
+ This option enables support for the TQ Components TQM8540 board.
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
+ select TQM85xx
+
+config TQM8541
+ bool "TQ Components TQM8541"
+ help
+ This option enables support for the TQ Components TQM8541 board.
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
+ select TQM85xx
+ select CPM2
+
+config TQM8555
+ bool "TQ Components TQM8555"
+ help
+ This option enables support for the TQ Components TQM8555 board.
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
+ select TQM85xx
+ select CPM2
+
+config TQM8560
+ bool "TQ Components TQM8560"
+ help
+ This option enables support for the TQ Components TQM8560 board.
+ select DEFAULT_UIMAGE
+ select PPC_CPM_NEW_BINDING
+ select TQM85xx
+ select CPM2
+
endchoice
+config TQM85xx
+ bool
+ select MPC85xx
+
config MPC8540
bool
select PPC_UDBG_16550
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index bf7d2e1..8c761d1 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -7,3 +7,4 @@ obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o
obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
obj-$(CONFIG_STX_GP3) += stx_gp3.o
+obj-$(CONFIG_TQM85xx) += tqm85xx.o
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
new file mode 100644
index 0000000..2a08b31
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -0,0 +1,191 @@
+/*
+ * Based on MPC8560 ADS and arch/ppc tqm85xx ports
+ *
+ * Maintained by Kumar Gala (see MAINTAINERS for contact information)
+ *
+ * Copyright 2008 Freescale Semiconductor Inc.
+ *
+ * Copyright (c) 2005-2006 DENX Software Engineering
+ * Stefan Roese <sr@denx.de>
+ *
+ * Based on original work by
+ * Kumar Gala <kumar.gala@freescale.com>
+ * Copyright 2004 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/of_platform.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpic.h>
+#include <asm/prom.h>
+#include <mm/mmu_decl.h>
+#include <asm/udbg.h>
+
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+
+#ifdef CONFIG_CPM2
+#include <asm/cpm2.h>
+#include <sysdev/cpm2_pic.h>
+
+static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ int cascade_irq;
+
+ while ((cascade_irq = cpm2_get_irq()) >= 0)
+ generic_handle_irq(cascade_irq);
+
+ desc->chip->eoi(irq);
+}
+#endif /* CONFIG_CPM2 */
+
+static void __init tqm85xx_pic_init(void)
+{
+ struct mpic *mpic;
+ struct resource r;
+ struct device_node *np;
+#ifdef CONFIG_CPM2
+ int irq;
+#endif
+
+ np = of_find_node_by_type(NULL, "open-pic");
+ if (!np) {
+ printk(KERN_ERR "Could not find open-pic node\n");
+ return;
+ }
+
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_ERR "Could not map mpic register space\n");
+ of_node_put(np);
+ return;
+ }
+
+ mpic = mpic_alloc(np, r.start,
+ MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+ 0, 256, " OpenPIC ");
+ BUG_ON(mpic == NULL);
+ of_node_put(np);
+
+ mpic_init(mpic);
+
+#ifdef CONFIG_CPM2
+ /* Setup CPM2 PIC */
+ np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pic");
+ if (np == NULL) {
+ printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n");
+ return;
+ }
+ irq = irq_of_parse_and_map(np, 0);
+
+ if (irq == NO_IRQ) {
+ of_node_put(np);
+ printk(KERN_ERR "PIC init: got no IRQ for cpm cascade\n");
+ return;
+ }
+
+ cpm2_pic_init(np);
+ of_node_put(np);
+ set_irq_chained_handler(irq, cpm2_cascade);
+#endif
+}
+
+/*
+ * Setup the architecture
+ */
+static void __init tqm85xx_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+
+ if (ppc_md.progress)
+ ppc_md.progress("tqm85xx_setup_arch()", 0);
+
+#ifdef CONFIG_CPM2
+ cpm2_reset();
+#endif
+
+#ifdef CONFIG_PCI
+ for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
+ fsl_add_bridge(np, 1);
+#endif
+}
+
+static void tqm85xx_show_cpuinfo(struct seq_file *m)
+{
+ uint pvid, svid, phid1;
+ uint memsize = total_memory;
+
+ pvid = mfspr(SPRN_PVR);
+ svid = mfspr(SPRN_SVR);
+
+ seq_printf(m, "Vendor\t\t: TQ Components\n");
+ seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
+ seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+
+ /* Display cpu Pll setting */
+ phid1 = mfspr(SPRN_HID1);
+ seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
+
+ /* Display the amount of memory */
+ seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+}
+
+static struct of_device_id __initdata of_bus_ids[] = {
+ { .name = "soc", },
+ { .type = "soc", },
+ { .name = "cpm", },
+ { .name = "localbus", },
+ { .compatible = "simple-bus", },
+ {},
+};
+
+static int __init declare_of_platform_devices(void)
+{
+ of_platform_bus_probe(NULL, of_bus_ids, NULL);
+
+ return 0;
+}
+machine_device_initcall(tqm85xx, declare_of_platform_devices);
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init tqm85xx_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if ((of_flat_dt_is_compatible(root, "tqm,8540")) ||
+ (of_flat_dt_is_compatible(root, "tqm,8541")) ||
+ (of_flat_dt_is_compatible(root, "tqm,8555")) ||
+ (of_flat_dt_is_compatible(root, "tqm,8560")))
+ return 1;
+
+ return 0;
+}
+
+define_machine(tqm85xx) {
+ .name = "TQM85xx",
+ .probe = tqm85xx_probe,
+ .setup_arch = tqm85xx_setup_arch,
+ .init_IRQ = tqm85xx_pic_init,
+ .show_cpuinfo = tqm85xx_show_cpuinfo,
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
--
1.5.3.7
^ permalink raw reply related
* Re: [PATCH] [POWERPC] 82xx and embedded6xx: Use machine_*_initcall() hooks in platform code
From: Kumar Gala @ 2008-01-25 8:16 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <20080125052324.8405.99760.stgit@trillian.secretlab.ca>
On Thu, 24 Jan 2008, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
> ---
>
> arch/powerpc/platforms/82xx/mpc8272_ads.c | 5 +----
> arch/powerpc/platforms/82xx/pq2fads.c | 5 +----
> arch/powerpc/platforms/embedded6xx/ls_uart.c | 5 +----
> 3 files changed, 3 insertions(+), 12 deletions(-)
>
applied.
- k
^ permalink raw reply
* Re: [PATCH] powerpc: reduce code duplication in legacy_serial, add UART parent types
From: Kumar Gala @ 2008-01-25 8:17 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: scottwood, linuxppc-dev, arnd
In-Reply-To: <20080124224043.GA418@windriver.com>
> From: Paul Gortmaker <paul.gortmaker@windriver.com>
> Date: Thu, 24 Jan 2008 11:59:12 -0500
> Subject: [PATCH] powerpc: reduce code duplication in legacy_serial, add UART parent types
>
> The legacy_serial was treating each UART parent in a separate code block.
> Rather than continue this trend for the new parent IDs, this condenses
> all (soc, tsi, opb, plus two more new types) into one of_device_id array.
> The new types are wrs,epld-localbus for the Wind River sbc8560, and a
> more generic "simple-bus" as requested by Scott Wood.
>
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
> arch/powerpc/kernel/legacy_serial.c | 45 +++++++++++++---------------------
> 1 files changed, 17 insertions(+), 28 deletions(-)
>
applied
- k
^ permalink raw reply
* Re: [PATCH 0/10] Support for SBC834x/8548/8560 Wind River Boards
From: Kumar Gala @ 2008-01-25 8:38 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: linuxppc-dev
In-Reply-To: <12012180922447-git-send-email-paul.gortmaker@windriver.com>
On Thu, 24 Jan 2008, Paul Gortmaker wrote:
>
> This series contains the patches for the Wind River SBC834x, SBC8548 and
> SBC8560, grouped together for merge convenience.
>
> Changes since previous:
>
> sbc834x:
> - machine_device_initcall as per Kumar's recent commit 6392f184
> - remove four device_type from dts that DavidG wanted gone.
> - add of_node_put() and __initdata as per StephenR's suggestions.
>
> sbc8548:
> - fold the dts, and conversion to dts-v1, into a single commit
>
> sbc8560:
> - dts has localbus with 2 address cells (chipsel) and epld as child
> - UART detection legacy_serial patch separated out from 8560 patches
> - fold the dts, and conversion to dts-v1, into a single commit
>
> I've boot tested these all on "for-2.6.25" to make sure things are sane.
> Thanks again to those who have suggested improvements and changes.
applied.
- k
^ permalink raw reply
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