* Re: Reminder: removal of arch/ppc - (Sequoia)
From: Steve Heflin @ 2008-01-28 3:37 UTC (permalink / raw)
To: Josh Boyer, linuxppc-embedded
In-Reply-To: <20080127200044.148982a6@zod.rchland.ibm.com>
At 09:00 PM 1/27/2008, Josh wrote:
>On Sun, 27 Jan 2008 18:37:22 -0500
>Steve Heflin <sheflin@newagemicro.com> wrote:
>
> > Hello!
> >
> > Yes! I'm looking at 2.6.23.14 as I thought that was the newest
> > version. I completely missed seeing the 2.6.24 kit, thank you so much!!
>
>FYI, 2.6.24 is considered fairly old relatively speaking. With so much
>activity going on for the embedded boards for arch/powerpc, you're sort
>of missing out if you aren't running from the latest git trees.
>
>Yes, I realize how ridiculous it sounds to say a kernel that was just
>released 3 days ago is old, but that's reality.
>
>josh
Hey Josh, thank you so much for the pointer to the git trees. I've
been using Linus' kernel.org tree, as that's where I was pointed to
by the powerpc web site about 2 months ago. I sure do appreciate your
updated pointer to the git tree, I will now locate it and stay tuned
and participate.
steve
^ permalink raw reply
* Re: Load Kernel 2.6 using U-boot on ML403
From: Yedu Jathavedan @ 2008-01-28 4:25 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-embedded
In-Reply-To: <fa686aa40801271313y4370ac3dmd4460d79362f10c4@mail.gmail.com>
>
> Looking at your bootlog, it doesn't look like you've got the systemace
> driver built into the kernel.
>
>
Grant,
Yes, the systemace was not built into the kernel. It is successfully
booting the kernel now.
Trying to bring up the Ethernet interface. Any pointers?
Thank you,
Yedu
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Benjamin Herrenschmidt @ 2008-01-28 4:25 UTC (permalink / raw)
To: Michel Dänzer; +Cc: linuxppc-dev, Ingo Molnar, vatsa, Peter Zijlstra
In-Reply-To: <1201450409.1931.23.camel@thor.sulgenrain.local>
On Sun, 2008-01-27 at 17:13 +0100, Michel Dänzer wrote:
>
> > Do you see behavior change (from good->bad) immediately after
> applying that patch
> > during your bisect process?
>
> Yes, confirmed by trying that commit and its parent again.
Just to be paranoid... can you try with a different gcc version in case
something gets miscompiled ?
Ben.
^ permalink raw reply
* xsysace.c driver oops on reboot (PPC405 on Virtex-II pro)
From: Jean-Samuel Chenard @ 2008-01-28 5:55 UTC (permalink / raw)
To: linuxppc-embedded
SGksCgpJIGFtIHVzaW5nIGEgWGlsaW54IE1MLTMxMCBib2FyZCBhbmQgYSBCRUUyIGRldmVsb3Bt
ZW50IHN5c3RlbSBhbmQKYm90aCBjb25maWd1cmF0aW9ucyBzaG93IHRoZSBzYW1lIHByb2JsZW0u
ICBJIHVzZSB0aGUgU3lzdGVtIEFDRSBJUApjb3JlIChvcGJfc3lzYWNlIHZlcnNpb24gMS4wMC5j
IG9uIEVESzkuMS4wMmkpLiAgSWYgSSBjb21waWxlIG15Cmtlcm5lbCAyLjYuMjQtcmMzIChJIHVz
ZSBhIHZlcnkgcmVjZW50IHB1bGwgZnJvbSBnaXQuc2VjcmV0bGFiLmNhKQp3aXRoIHRoZSAib2xk
IFN5c3RlbSBBQ0UiIGRyaXZlciBmcm9tIFhpbGlueCwgSSBjYW4gaXNzdWUgdGhlIHJlYm9vdApj
b21tYW5kIG9uIGJ1c3lib3ggYW5kIEkgZ2V0IGEgcHJvcGVyIHJlYm9vdC4KCklmIEkgY29tcGls
ZSBteSBrZXJuZWwgd2l0aCB0aGUgbmV3IFN5c3RlbUFDRSBkcml2ZXIKKGRyaXZlcnMvYmxvY2sv
eHN5c2FjZS5jKSwgdGhlIGRyaXZlciB3b3JrcyBncmVhdCBhbmQgSSBjYW4gcmVhZC93cml0ZQp0
byB0aGUgQ29tcGFjdEZsYXNoIGNhcmQgd2l0aG91dCBwcm9ibGVtcy4gICBIb3dldmVyLCB3aGVu
IEkgaXNzdWUgdGhlCnJlYm9vdCBjb21tYW5kLCBJIGdldCBhIGtlcm5lbCBvb3BzLiAgU3RyYW5n
ZWx5LCB0aGUgb29wcyBkb2VzIG5vdApoYXBwZW4gd2hlbiBJIGRvIGEgc2h1dGRvd24gY29tbWFu
ZCAoa2VybmVsIGhhbHQpLiAgSSBmdXJ0aGVyCmludmVzdGlnYXRlZCB0aGUgaXNzdWUgYnkgYnVp
bGRpbmcgYSBSQU0gZmlsZXN5c3RlbSBhbmQgYnVpbGRpbmcgYm90aApzeXN0ZW0gQUNFIGRyaXZl
cnMgYXMgbG9hZGFibGUgbW9kdWxlcy4KCklmIEkgZG9uJ3QgbG9hZCBhbnkgc3lzdGVtQUNFIG1v
ZHVsZSBhbmQgY2FsbCByZWJvb3QgPT4gSSBnZXQgdGhlIG9vcHMgbWVzc2FnZS4KSWYgSSBsb2Fk
IHRoZSBuZXcgc3lzdGVtQUNFIG1vZHVsZSBhbmQgY2FsbCByZWJvb3QgPT4gSSBnZXQgdGhlIG9v
cHMgbWVzc2FnZS4KSWYgSSBsb2FkIHRoZSAiT2xkIFN5c3RlbUFjZSIgbW9kdWxlIGFuZCBjYWxs
IHJlYm9vdCA9PiBUaGUgcHJvY2Vzc29yCnJlYm9vdHMgcHJvcGVybHkgLSBHT09ECklmIEkgbG9h
ZCB0aGUgIk9sZCBTeXN0ZW1BY2UiIG1vZHVsZSwgdW5sb2FkIGl0IGFuZCB0aGVuIGNhbGwgcmVi
b290Cj0+IEkgZ2V0IHRoZSBvb3BzIG1lc3NhZ2UKClNvIHRoZXJlIGlzIHNvbWUgY29kZSB0aGF0
IGdldHMgY2FsbGVkIHdpdGggdGhlIE9sZCBTeXN0ZW1BQ0UgZHJpdmVyCndoaWNoIG1ha2VzIGl0
IGhhbmRsZSB0aGUgcmVib290IGNvcnJlY3RseSB0aGF0IHNlZW1zIHRvIGJlIG1pc3NpbmcKZnJv
bSB0aGUgbmV3IHN5c3RlbUFDRSBkcml2ZXIuICBUaGUgaGFyZHdhcmUgSVAgbWF5IGJlIG1pc2Jl
aGF2aW5nCmxpa2Ugc2VuZGluZyBhbiBpbnRlcnJ1cHQgb3Igc29tZXRoaW5nIGxpa2UgdGhhdCBh
dCBzb21lIHBvaW50IHdoZW4KdGhlIHByb2Nlc3NvciBpcyBnb2luZyBmb3IgcmVib290IGFuZCB1
bmFibGUgdG8gaGFuZGxlIGl0LiAgVGhlIFhpbGlueAoob2xkKSBkcml2ZXIgc2VlbXMgdG8gcGx1
ZyB1cCB0aGlzIHByb2JsZW0gc29tZWhvdy4uLgoKTm90ZSB0aGF0IEkgZGlkIGhhdmUgdG8gdHdl
YWsgdGhlIG5ldyBzeXN0ZW1BQ0UgZHJpdmVyIHNsaWdodGx5IHRvCm1ha2UgaXQgd29yayBvbiB0
aGUgTUwtMzEwIChiZWNhdXNlIG9mIHRoZSA4LWJpdCBidXMgb2YgdGhlClN5c3RlbUFDRSk6CkBA
IC0xMTI2LDcgKzExMjYsNyBAQCBzdGF0aWMgdm9pZCBfX2RldmV4aXQgYWNlX2ZyZWUoc3RydWN0
IGRldmljZSAqZGV2KQogc3RhdGljIGludCBfX2RldmluaXQgYWNlX3Byb2JlKHN0cnVjdCBwbGF0
Zm9ybV9kZXZpY2UgKmRldikKIHsKICAgICAgICB1bnNpZ25lZCBsb25nIHBoeXNhZGRyID0gMDsK
LSAgICAgICBpbnQgYnVzX3dpZHRoID0gQUNFX0JVU19XSURUSF8xNjsgLyogRklYTUU6IHNob3Vs
ZCBub3QgYmUgaGFyZCBjb2RlZCAqLworICAgICAgIGludCBidXNfd2lkdGggPSBBQ0VfQlVTX1dJ
RFRIXzg7IC8qIEZJWE1FOiBzaG91bGQgbm90IGJlIGhhcmQgY29kZWQgKi8KICAgICAgICBpbnQg
aWQgPSBkZXYtPmlkOwogICAgICAgIGludCBpcnEgPSBOT19JUlE7CgpIZXJlIGlzIGFuIG9vcHMg
dHJhY2UgdGhhdCBJIGdvdCB3aGVuIEkgZG9uJ3QgbG9hZCBhbnkgc3lzdGVtQUNFCmRyaXZlciAo
SSBzaG93IGEgZmV3IG9mIHRoZSBsYXN0IGNvbnNvbGUgbWVzc2FnZXMgYmVmb3JlIHRoZSBvb3Bz
KS4gIEkKZ290IHRoaXMgbWVzc2FnZSBmcm9tIG15IE1MLTMxMCBib2FyZCwgYnV0IHRoZSBzYW1l
IGhhcHBlbnMgb24gdGhlCkJFRTI6Cj09ClRoZSBzeXN0ZW0gaXMgZ29pbmcgZG93biBOT1chClNl
bmRpbmcgU0lHVEVSTSB0byBhbGwgcHJvY2Vzc2VzClJlcXVlc3Rpbmcgc3lzdGVtIHJlYm9vdApb
ICAgMjUuODYyNDQwXSBSZXN0YXJ0aW5nIHN5c3RlbS4KWyAgIDI1Ljjvv71bICAgMjUuODY2NDY3
XSBPb3BzOiBFeGNlcHRpb24gaW4ga2VybmVsIG1vZGUsIHNpZzogOCBbIzFdClsgICAyNS44NzAz
ODJdIE5JUDogYzdkMjFlMDAgTFI6IGM3ZDIxZGYwIENUUjogMDAwMDAwMDEKWyAgIDI1Ljg3NTMx
Ml0gUkVHUzogYzdkMjFkNDAgVFJBUDogMjAwMWRmMCAgIE5vdCB0YWludGVkCigyLjYuMjQtcmMz
LWpzYy1zZWNsYWItTkVUV09SSy1nNTk1NThkYzEtZGlydHkpClsgICAyNS44ODQ2MzBdIE1TUjog
YzAwZTg3M2MgPEVFLElSLERSPiAgQ1I6IDAwMDAwMDEwICBYRVI6IDAwMTIwMGQyClsgICAyNS44
OTA2ODRdIFRBU0sgPSBjN2MzN2JhMFsxNDldICdsaW51eHJjJyBUSFJFQUQ6IGM3ZDIwMDAwClsg
ICAyNS44OTYwMzRdIEdQUjAwOiAzYzMwM2U1YiAyMDIwMjAzMiAzNTJlMzgzNiAzMjM0MzQzMCA1
ZDIwMDBhMApjMDBmNTg1OCAwMDAwMDcwMCA3ZmI3OGYwYwpbICAgMjUuOTA0MzI3XSBHUFIwODog
MDAwMDAwMDAgZmVlMWRlYWQgMjgxMjE5NjkgMDAwMDAwMDAgYzdkMjFkZjAKYzAwMWYxNTAgMDdm
ZmRkYTggMDAwMDAwMDAKWyAgIDI1LjkxMjYyMF0gR1BSMTY6IDAwMDAwMDAxIDAwMDAwMDAwIGMw
MTkwMDAwIGMwM2NmY2ZjIGMwMDBiNTRjCjAwMDAwY2IyIDAwMDAwMDAwIDAwMDAwMDAwClsgICAy
NS45MjA5MTRdIEdQUjI0OiAwMDAwMDAwMCBmZmZmZmZmZiAwMDAwMDAwMCAwMDAyZDAzMCAwMDAw
MDAwMQpjMDAyZGM1NCBjN2QyMWU4NCBjN2QyMWU2MApbICAgMjUuOTI5MzgxXSBOSVAgW2M3ZDIx
ZTAwXSAweGM3ZDIxZTAwClsgICAyNS45MzMwMDldIExSIFtjN2QyMWRmMF0gMHhjN2QyMWRmMApb
ICAgMjUuOTM2NTUwXSBDYWxsIFRyYWNlOgpbICAgMjUuOTM4OTcxXSBJbnN0cnVjdGlvbiBkdW1w
OgpbICAgMjUuOTQxOTA4XSBYWFhYWFhYWCBYWFhYWFhYWCBYWFhYWFhYWCBYWFhYWFhYWCBYWFhY
WFhYWCBYWFhYWFhYWApYWFhYWFhYWCBYWFhYWFhYWApbICAgMjUuOTQ5NTk1XSBYWFhYWFhYWCBY
WFhYWFhYWCBYWFhYWFhYWCBYWFhYWFhYWCBYWFhYWFhYWCBYWFhYWFhYWApYWFhYWFhYWCBYWFhY
WFhYWAo9PQoKTm90ZSB0aGF0IEkgaGF2ZSBlbmFibGVkIENPTkZJR19ERUJVR19CVUdWRVJCT1NF
LCBDT05GSUdfREVCVUdfSU5GTwphbmQgQ09ORklHX0RFQlVHX0tFUk5FTC4gIEhvd2V2ZXIsIHRo
b3NlIGFkZHJlc3NlcyBnaXZlbiBhdCBOSVAgZG9uJ3QKc2VlbSB0byBtYXRjaCBhbnl0aGluZyBp
biBteSBrZXJuZWwgbWVtb3J5IG1hcC4KCkkgYW0gYSBiaXQgZ3JlZW4gdG8gZW1iZWRkZWQgbGlu
dXggYW5kIGVzcGVjaWFsbHkgdGhlIGRlYnVnZ2luZyBvZgprZXJuZWwgZXJyb3JzLi4uICBEaWQg
YW55IG90aGVyIE1MLTMxMCB1c2VycyBlbmNvdW50ZXIgdGhpcyBwcm9ibGVtCmJlZm9yZSA/CgpU
aGUgZWFzeSBmaXggaXMganVzdCB0byB1c2UgdGhlIG9sZCBkcml2ZXIgZnJvbSBYaWxpbngsIGJ1
dCB0aGUgbmV3CmRyaXZlciBzZWVtcyBmYXN0ZXIgYW5kIGlzIG5vdyBwYXJ0IG9mIHRoZSBtYWlu
bGluZSB0cmVlLi4uCgpMZXQgbWUga25vdyBpZiB5b3Uga25vdyBzb21lIHRyaWNrcyBvbiBob3cg
SSBjb3VsZCBkZWJ1ZyB0aGlzIHByb2JsZW0uCiBOb3RlIHRoYXQgYXQgdGhpcyB0aW1lLCBJIGRv
bid0IGhhdmUgYSBkZWJ1Z2dpbmcgY2FibGUgZm9yIG15IE1MLTMxMCwKc28gSSByZWx5IG9uIHBy
aW50aW5nIGZvciBkZWJ1Z2dpbmcuCgpUaGFua3MsCgpKZWFuLVNhbXVlbAotLSAKSW50ZWdyYXRl
ZCBNaWNyb3N5c3RlbXMgTGFib3JhdG9yeQpNY0dpbGwgVW5pdmVyc2l0eSwgTW9udHLDqWFsLCBR
QywgQ0FOQURBCldlYiBQYWdlOiBodHRwOi8vY2hhb3MuZWNlLm1jZ2lsbC5jYQo=
^ permalink raw reply
* [PATCH 2/9] mpc834x_mds: Convert device tree source to dts-v1
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Move mpc834x_mds device tree source forward to dts-v1 format. Nothing
too complex in this one, so it boils down to just adding a bunch of 0x
in the right places and converting clock speeds to decimal.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc834x_mds.dts | 254 +++++++++++++++++----------------
1 files changed, 128 insertions(+), 126 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 4120e92..537a77c 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -9,6 +9,8 @@
* option) any later version.
*/
+/dts-v1/;
+
/ {
model = "MPC8349EMDS";
compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
@@ -31,10 +33,10 @@
PowerPC,8349@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <8000>; // L1, 32K
- i-cache-size = <8000>; // L1, 32K
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <32768>; // L1, 32K
+ i-cache-size = <32768>; // L1, 32K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -43,26 +45,26 @@
memory {
device_type = "memory";
- reg = <00000000 10000000>; // 256MB at 0
+ reg = <0x00000000 0x10000000>; // 256MB at 0
};
bcsr@e2400000 {
device_type = "board-control";
- reg = <e2400000 8000>;
+ reg = <0xe2400000 0x8000>;
};
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -70,14 +72,14 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
compatible = "dallas,ds1374";
- reg = <68>;
+ reg = <0x68>;
};
};
@@ -86,41 +88,41 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
spi@7000 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <7000 1000>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
- /* phy type (ULPI or SERIAL) are only types supportted for MPH */
+ /* phy type (ULPI or SERIAL) are only types supported for MPH */
/* port = 0 or 1 */
usb@22000 {
compatible = "fsl-usb2-mph";
- reg = <22000 1000>;
+ reg = <0x22000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <27 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <39 0x8>;
phy_type = "ulpi";
port1;
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
compatible = "fsl-usb2-dr";
- reg = <23000 1000>;
+ reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <26 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@@ -129,18 +131,18 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
- reg = <24520 20>;
+ reg = <0x24520 0x20>;
phy0: ethernet-phy@0 {
- interrupt-parent = < &ipic >;
- interrupts = <11 8>;
- reg = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x0>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@1 {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
- reg = <1>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x1>;
device_type = "ethernet-phy";
};
};
@@ -150,11 +152,11 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <24000 1000>;
+ reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <20 8 21 8 22 8>;
- interrupt-parent = < &ipic >;
- phy-handle = < &phy0 >;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy0>;
linux,network-index = <0>;
};
@@ -163,11 +165,11 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <25000 1000>;
+ reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <23 8 24 8 25 8>;
- interrupt-parent = < &ipic >;
- phy-handle = < &phy1 >;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy1>;
linux,network-index = <1>;
};
@@ -175,20 +177,20 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
/* May need to remove if on a part without crypto engine */
@@ -196,15 +198,15 @@
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000007e>;
/* desc mask is for rev2.0,
* we need runtime fixup for >2.0 */
- descriptor-types-mask = <01010ebf>;
+ descriptor-types-mask = <0x01010ebf>;
};
/* IPIC
@@ -217,129 +219,129 @@
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 */
- 8800 0 0 1 &ipic 14 8
- 8800 0 0 2 &ipic 15 8
- 8800 0 0 3 &ipic 16 8
- 8800 0 0 4 &ipic 17 8
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x12 */
- 9000 0 0 1 &ipic 16 8
- 9000 0 0 2 &ipic 17 8
- 9000 0 0 3 &ipic 14 8
- 9000 0 0 4 &ipic 15 8
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x13 */
- 9800 0 0 1 &ipic 17 8
- 9800 0 0 2 &ipic 14 8
- 9800 0 0 3 &ipic 15 8
- 9800 0 0 4 &ipic 16 8
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x15 */
- a800 0 0 1 &ipic 14 8
- a800 0 0 2 &ipic 15 8
- a800 0 0 3 &ipic 16 8
- a800 0 0 4 &ipic 17 8
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x16 */
- b000 0 0 1 &ipic 17 8
- b000 0 0 2 &ipic 14 8
- b000 0 0 3 &ipic 15 8
- b000 0 0 4 &ipic 16 8
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x17 */
- b800 0 0 1 &ipic 16 8
- b800 0 0 2 &ipic 17 8
- b800 0 0 3 &ipic 14 8
- b800 0 0 4 &ipic 15 8
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x18 */
- c000 0 0 1 &ipic 15 8
- c000 0 0 2 &ipic 16 8
- c000 0 0 3 &ipic 17 8
- c000 0 0 4 &ipic 14 8>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <0x42 0x8>;
bus-range = <0 0>;
- ranges = <02000000 0 90000000 90000000 0 10000000
- 42000000 0 80000000 80000000 0 10000000
- 01000000 0 00000000 e2000000 0 00100000>;
- clock-frequency = <3f940aa>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
pci1: pci@e0008600 {
cell-index = <2>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 */
- 8800 0 0 1 &ipic 14 8
- 8800 0 0 2 &ipic 15 8
- 8800 0 0 3 &ipic 16 8
- 8800 0 0 4 &ipic 17 8
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x12 */
- 9000 0 0 1 &ipic 16 8
- 9000 0 0 2 &ipic 17 8
- 9000 0 0 3 &ipic 14 8
- 9000 0 0 4 &ipic 15 8
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x13 */
- 9800 0 0 1 &ipic 17 8
- 9800 0 0 2 &ipic 14 8
- 9800 0 0 3 &ipic 15 8
- 9800 0 0 4 &ipic 16 8
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x15 */
- a800 0 0 1 &ipic 14 8
- a800 0 0 2 &ipic 15 8
- a800 0 0 3 &ipic 16 8
- a800 0 0 4 &ipic 17 8
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x16 */
- b000 0 0 1 &ipic 17 8
- b000 0 0 2 &ipic 14 8
- b000 0 0 3 &ipic 15 8
- b000 0 0 4 &ipic 16 8
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x17 */
- b800 0 0 1 &ipic 16 8
- b800 0 0 2 &ipic 17 8
- b800 0 0 3 &ipic 14 8
- b800 0 0 4 &ipic 15 8
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x18 */
- c000 0 0 1 &ipic 15 8
- c000 0 0 2 &ipic 16 8
- c000 0 0 3 &ipic 17 8
- c000 0 0 4 &ipic 14 8>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
bus-range = <0 0>;
- ranges = <02000000 0 b0000000 b0000000 0 10000000
- 42000000 0 a0000000 a0000000 0 10000000
- 01000000 0 00000000 e2100000 0 00100000>;
- clock-frequency = <3f940aa>;
+ ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
+ 0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2100000 0x0 0x00100000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008600 100>;
+ reg = <0xe0008600 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 1/9] qe/muram dts: Explicitly set address-cells and size cells for muram
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <1201505279-25847-1-git-send-email-paul.gortmaker@windriver.com>
Currently there are several dts that don't specify address or size
cells for the muram. This causes dtc to use default values, one of
which is an address-cells of two, and this breaks the parsing of the
muram ranges, which is assuming an address-cells of one. For example:
Warning (reg_format): "reg" property in
/qe@e0100000/muram@10000/data-only@0 has invalid length
(8 bytes) (#address-cells == 2, #size-cells == 1)
Explicitly setting the address and size cells gets it parsed properly
and gets rid of the four dtc warnings.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc836x_mds.dts | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 2181d2c..10b5d6d 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -214,10 +214,12 @@
bus-frequency = <179A7B00>;
muram@10000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
device_type = "muram";
ranges = <0 00010000 0000c000>;
- data-only@0{
+ data-only@0 {
reg = <0 c000>;
};
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 0/9] 83xx DTS fixes and v1 conversions
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev
This series incorporates my earlier qe/muram fix before converting
the existing mpc83xx DTS files to v1 format. I've also redone the
mpc834x_mds with the IRQs as decimal as per Kumar's comments and
re-included that too. I've kept each board as a separate commit
in case one of them conflicts with what someone else is working on.
Boards covered are: 8349mds, 8349mitx, 8349mitx-gp, 836x_mds,
8323_mds, 8323_rdb, and the 8313_rdb. Plus a small tweak to the
sbc8349 (it was already v1 -- but IRQs were in hex.)
I've fed all the files to DTC before and after to ensure the
output is the same after the conversion.
I'm not aware of any explicit rules for what is hex vs decimal.
I've tried to keep things that are usually discussed in decimal
as decimal quantities (i.e. cache size, IRQ, counts, indicies)
and all other data that you'd normally expect in hex (addresses,
IRQ flags, masks) as hex -- including prefixing 0x on values from
zero to 10 where it tends to make rows of numbers (e.g. ranges)
align for better readability, even though it isn't required.
Paul.
^ permalink raw reply
* [PATCH 3/9] sbc8349: convert human parseable DTS properties to decimal
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
To be consistent with the other DTS v1 conversions pending,
things like cache size and IRQ values should be decimal.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/sbc8349.dts | 40 ++++++++++++++++++------------------
1 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 9c13c1a..a36ef93 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -36,10 +36,10 @@
PowerPC,8349@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <0x20>; // 32 bytes
- i-cache-line-size = <0x20>; // 32 bytes
- d-cache-size = <0x8000>; // L1, 32K
- i-cache-size = <0x8000>; // L1, 32K
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <32768>; // L1, 32K
+ i-cache-size = <32768>; // L1, 32K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -70,7 +70,7 @@
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <0xe 0x8>;
+ interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
};
@@ -81,7 +81,7 @@
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
- interrupts = <0xf 0x8>;
+ interrupts = <15 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
};
@@ -89,7 +89,7 @@
spi@7000 {
compatible = "fsl_spi";
reg = <0x7000 0x1000>;
- interrupts = <0x10 0x8>;
+ interrupts = <16 0x8>;
interrupt-parent = <&ipic>;
mode = "cpu";
};
@@ -102,7 +102,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&ipic>;
- interrupts = <0x27 0x8>;
+ interrupts = <39 0x8>;
phy_type = "ulpi";
port1;
};
@@ -114,7 +114,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&ipic>;
- interrupts = <0x26 0x8>;
+ interrupts = <38 0x8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@@ -127,13 +127,13 @@
phy0: ethernet-phy@19 {
interrupt-parent = <&ipic>;
- interrupts = <0x14 0x8>;
+ interrupts = <20 0x8>;
reg = <0x19>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@1a {
interrupt-parent = <&ipic>;
- interrupts = <0x15 0x8>;
+ interrupts = <21 0x8>;
reg = <0x1a>;
device_type = "ethernet-phy";
};
@@ -146,7 +146,7 @@
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
interrupt-parent = <&ipic>;
phy-handle = <&phy0>;
linux,network-index = <0>;
@@ -159,7 +159,7 @@
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
interrupt-parent = <&ipic>;
phy-handle = <&phy1>;
linux,network-index = <1>;
@@ -171,7 +171,7 @@
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <0x9 0x8>;
+ interrupts = <9 0x8>;
interrupt-parent = <&ipic>;
};
@@ -181,7 +181,7 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <0xa 0x8>;
+ interrupts = <10 0x8>;
interrupt-parent = <&ipic>;
};
@@ -190,7 +190,7 @@
model = "SEC2";
compatible = "talitos";
reg = <0x30000 0x10000>;
- interrupts = <0xb 0x8>;
+ interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
num-channels = <4>;
channel-fifo-len = <0x18>;
@@ -221,10 +221,10 @@
interrupt-map = <
/* IDSEL 0x11 */
- 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
- 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
- 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
- 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8>;
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8>;
interrupt-parent = <&ipic>;
interrupts = <0x42 0x8>;
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 4/9] mpc836x: Convert mpc836x_mds to dts-v1 format.
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Convert the MPC836x MDS dts file to v1 format. Entries for
values normally parsed by humans are left in decimal (i.e. IRQ,
cache size, clock rates, basic counts and index values).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc836x_mds.dts | 254 +++++++++++++++++----------------
1 files changed, 128 insertions(+), 126 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 10b5d6d..4260f09 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -14,6 +14,8 @@
/memreserve/ 00000000 1000000;
*/
+/dts-v1/;
+
/ {
model = "MPC8360MDS";
compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS";
@@ -35,38 +37,38 @@
PowerPC,8360@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <8000>; // L1, 32K
- i-cache-size = <8000>; // L1, 32K
- timebase-frequency = <3EF1480>;
- bus-frequency = <FBC5200>;
- clock-frequency = <1F78A400>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <32768>; // L1, 32K
+ i-cache-size = <32768>; // L1, 32K
+ timebase-frequency = <66000000>;
+ bus-frequency = <264000000>;
+ clock-frequency = <528000000>;
};
};
memory {
device_type = "memory";
- reg = <00000000 10000000>;
+ reg = <0x00000000 0x10000000>;
};
bcsr@f8000000 {
device_type = "board-control";
- reg = <f8000000 8000>;
+ reg = <0xf8000000 0x8000>;
};
soc8360@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
- bus-frequency = <FBC5200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <264000000>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -74,14 +76,14 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
compatible = "dallas,ds1374";
- reg = <68>;
+ reg = <0x68>;
};
};
@@ -90,9 +92,9 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -100,46 +102,46 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
- clock-frequency = <FBC5200>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x4500 0x100>;
+ clock-frequency = <264000000>;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
- clock-frequency = <FBC5200>;
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x4600 0x100>;
+ clock-frequency = <264000000>;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000007e>;
/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
- descriptor-types-mask = <01010ebf>;
+ descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
par_io@1400 {
- reg = <1400 100>;
+ reg = <0x1400 0x100>;
device_type = "par_io";
num-ports = <7>;
@@ -153,19 +155,19 @@
1 6 1 0 3 0 /* TxD4 */
1 7 1 0 1 0 /* TxD5 */
1 9 1 0 2 0 /* TxD6 */
- 1 a 1 0 2 0 /* TxD7 */
+ 1 10 1 0 2 0 /* TxD7 */
0 9 2 0 1 0 /* RxD0 */
- 0 a 2 0 1 0 /* RxD1 */
- 0 b 2 0 1 0 /* RxD2 */
- 0 c 2 0 1 0 /* RxD3 */
- 0 d 2 0 1 0 /* RxD4 */
+ 0 10 2 0 1 0 /* RxD1 */
+ 0 11 2 0 1 0 /* RxD2 */
+ 0 12 2 0 1 0 /* RxD3 */
+ 0 13 2 0 1 0 /* RxD4 */
1 1 2 0 2 0 /* RxD5 */
1 0 2 0 2 0 /* RxD6 */
1 4 2 0 2 0 /* RxD7 */
0 7 1 0 1 0 /* TX_EN */
0 8 1 0 1 0 /* TX_ER */
- 0 f 2 0 1 0 /* RX_DV */
- 0 10 2 0 1 0 /* RX_ER */
+ 0 15 2 0 1 0 /* RX_DV */
+ 0 16 2 0 1 0 /* RX_ER */
0 0 2 0 1 0 /* RX_CLK */
2 9 1 0 3 0 /* GTX_CLK - CLK10 */
2 8 2 0 1 0>; /* GTX125 - CLK9 */
@@ -173,27 +175,27 @@
pio2: ucc_pin@02 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
- 0 11 1 0 1 0 /* TxD0 */
- 0 12 1 0 1 0 /* TxD1 */
- 0 13 1 0 1 0 /* TxD2 */
- 0 14 1 0 1 0 /* TxD3 */
+ 0 17 1 0 1 0 /* TxD0 */
+ 0 18 1 0 1 0 /* TxD1 */
+ 0 19 1 0 1 0 /* TxD2 */
+ 0 20 1 0 1 0 /* TxD3 */
1 2 1 0 1 0 /* TxD4 */
1 3 1 0 2 0 /* TxD5 */
1 5 1 0 3 0 /* TxD6 */
1 8 1 0 3 0 /* TxD7 */
- 0 17 2 0 1 0 /* RxD0 */
- 0 18 2 0 1 0 /* RxD1 */
- 0 19 2 0 1 0 /* RxD2 */
- 0 1a 2 0 1 0 /* RxD3 */
- 0 1b 2 0 1 0 /* RxD4 */
- 1 c 2 0 2 0 /* RxD5 */
- 1 d 2 0 3 0 /* RxD6 */
- 1 b 2 0 2 0 /* RxD7 */
- 0 15 1 0 1 0 /* TX_EN */
- 0 16 1 0 1 0 /* TX_ER */
- 0 1d 2 0 1 0 /* RX_DV */
- 0 1e 2 0 1 0 /* RX_ER */
- 0 1f 2 0 1 0 /* RX_CLK */
+ 0 23 2 0 1 0 /* RxD0 */
+ 0 24 2 0 1 0 /* RxD1 */
+ 0 25 2 0 1 0 /* RxD2 */
+ 0 26 2 0 1 0 /* RxD3 */
+ 0 27 2 0 1 0 /* RxD4 */
+ 1 12 2 0 2 0 /* RxD5 */
+ 1 13 2 0 3 0 /* RxD6 */
+ 1 11 2 0 2 0 /* RxD7 */
+ 0 21 1 0 1 0 /* TX_EN */
+ 0 22 1 0 1 0 /* TX_ER */
+ 0 29 2 0 1 0 /* RX_DV */
+ 0 30 2 0 1 0 /* RX_ER */
+ 0 31 2 0 1 0 /* RX_CLK */
2 2 1 0 2 0 /* GTX_CLK - CLK10 */
2 3 2 0 1 0 /* GTX125 - CLK4 */
0 1 3 0 2 0 /* MDIO */
@@ -208,45 +210,45 @@
#size-cells = <1>;
device_type = "qe";
model = "QE";
- ranges = <0 e0100000 00100000>;
- reg = <e0100000 480>;
+ ranges = <0x0 0xe0100000 0x00100000>;
+ reg = <0xe0100000 0x480>;
brg-frequency = <0>;
- bus-frequency = <179A7B00>;
+ bus-frequency = <396000000>;
muram@10000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "muram";
- ranges = <0 00010000 0000c000>;
+ ranges = <0x0 0x00010000 0x0000c000>;
data-only@0 {
- reg = <0 c000>;
+ reg = <0x0 0xc000>;
};
};
spi@4c0 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <4c0 40>;
+ reg = <0x4c0 0x40>;
interrupts = <2>;
- interrupt-parent = < &qeic >;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
spi@500 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <500 40>;
+ reg = <0x500 0x40>;
interrupts = <1>;
- interrupt-parent = < &qeic >;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
usb@6c0 {
compatible = "qe_udc";
- reg = <6c0 40 8B00 100>;
- interrupts = <b>;
- interrupt-parent = < &qeic >;
+ reg = <0x6c0 0x40 0x8b00 0x100>;
+ interrupts = <11>;
+ interrupt-parent = <&qeic>;
mode = "slave";
};
@@ -256,15 +258,15 @@
model = "UCC";
cell-index = <1>;
device-id = <1>;
- reg = <2000 200>;
- interrupts = <20>;
- interrupt-parent = < &qeic >;
+ reg = <0x2000 0x200>;
+ interrupts = <32>;
+ interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "none";
tx-clock-name = "clk9";
- phy-handle = < &phy0 >;
+ phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
- pio-handle = < &pio1 >;
+ pio-handle = <&pio1>;
};
enet1: ucc@3000 {
@@ -273,33 +275,33 @@
model = "UCC";
cell-index = <2>;
device-id = <2>;
- reg = <3000 200>;
- interrupts = <21>;
- interrupt-parent = < &qeic >;
+ reg = <0x3000 0x200>;
+ interrupts = <33>;
+ interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "none";
tx-clock-name = "clk4";
- phy-handle = < &phy1 >;
+ phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
- pio-handle = < &pio2 >;
+ pio-handle = <&pio2>;
};
mdio@2120 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <2120 18>;
+ reg = <0x2120 0x18>;
device_type = "mdio";
compatible = "ucc_geth_phy";
phy0: ethernet-phy@00 {
- interrupt-parent = < &ipic >;
- interrupts = <11 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
reg = <0>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@01 {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
reg = <1>;
device_type = "ethernet-phy";
};
@@ -310,70 +312,70 @@
device_type = "qeic";
#address-cells = <0>;
#interrupt-cells = <1>;
- reg = <80 80>;
+ reg = <0x80 0x80>;
big-endian;
- interrupts = <20 8 21 8>; //high:32 low:33
- interrupt-parent = < &ipic >;
+ interrupts = <32 0x8 33 0x8>; // high:32 low:33
+ interrupt-parent = <&ipic>;
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 AD17 */
- 8800 0 0 1 &ipic 14 8
- 8800 0 0 2 &ipic 15 8
- 8800 0 0 3 &ipic 16 8
- 8800 0 0 4 &ipic 17 8
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x12 AD18 */
- 9000 0 0 1 &ipic 16 8
- 9000 0 0 2 &ipic 17 8
- 9000 0 0 3 &ipic 14 8
- 9000 0 0 4 &ipic 15 8
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x13 AD19 */
- 9800 0 0 1 &ipic 17 8
- 9800 0 0 2 &ipic 14 8
- 9800 0 0 3 &ipic 15 8
- 9800 0 0 4 &ipic 16 8
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x15 AD21*/
- a800 0 0 1 &ipic 14 8
- a800 0 0 2 &ipic 15 8
- a800 0 0 3 &ipic 16 8
- a800 0 0 4 &ipic 17 8
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x16 AD22*/
- b000 0 0 1 &ipic 17 8
- b000 0 0 2 &ipic 14 8
- b000 0 0 3 &ipic 15 8
- b000 0 0 4 &ipic 16 8
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x17 AD23*/
- b800 0 0 1 &ipic 16 8
- b800 0 0 2 &ipic 17 8
- b800 0 0 3 &ipic 14 8
- b800 0 0 4 &ipic 15 8
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x18 AD24*/
- c000 0 0 1 &ipic 15 8
- c000 0 0 2 &ipic 16 8
- c000 0 0 3 &ipic 17 8
- c000 0 0 4 &ipic 14 8>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
bus-range = <0 0>;
- ranges = <02000000 0 a0000000 a0000000 0 10000000
- 42000000 0 80000000 80000000 0 10000000
- 01000000 0 00000000 e2000000 0 00100000>;
- clock-frequency = <3f940aa>;
+ ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 5/9] mpc832x_mds: Convert mpc832x_mds to dts-v1 format.
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Convert the MPC832x MDS dts file to v1 format. Entries for
values normally parsed by humans are left in decimal (i.e. IRQ,
cache size, clock rates, basic counts and index values).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc832x_mds.dts | 234 +++++++++++++++++----------------
1 files changed, 119 insertions(+), 115 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 6902524..17afa8c 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -21,6 +21,8 @@
* you're going by the schematic, the pin is called "P19J-K22".
*/
+/dts-v1/;
+
/ {
model = "MPC8323EMDS";
compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS";
@@ -42,10 +44,10 @@
PowerPC,8323@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <4000>; // L1, 16K
- i-cache-size = <4000>; // L1, 16K
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <16384>; // L1, 16K
+ i-cache-size = <16384>; // L1, 16K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
@@ -54,26 +56,26 @@
memory {
device_type = "memory";
- reg = <00000000 08000000>;
+ reg = <0x00000000 0x08000000>;
};
bcsr@f8000000 {
device_type = "board-control";
- reg = <f8000000 8000>;
+ reg = <0xf8000000 0x8000>;
};
soc8323@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
- bus-frequency = <7DE2900>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <132000000>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -81,14 +83,14 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
compatible = "dallas,ds1374";
- reg = <68>;
+ reg = <0x68>;
};
};
@@ -96,46 +98,46 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 7000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x7000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
/* Rev. 2.2 */
num-channels = <1>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000004c>;
- descriptor-types-mask = <0122003f>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000004c>;
+ descriptor-types-mask = <0x0122003f>;
};
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
par_io@1400 {
- reg = <1400 100>;
+ reg = <0x1400 0x100>;
device_type = "par_io";
num-ports = <7>;
@@ -144,8 +146,8 @@
/* port pin dir open_drain assignment has_irq */
3 4 3 0 2 0 /* MDIO */
3 5 1 0 2 0 /* MDC */
- 0 d 2 0 1 0 /* RX_CLK (CLK9) */
- 3 18 2 0 1 0 /* TX_CLK (CLK10) */
+ 0 13 2 0 1 0 /* RX_CLK (CLK9) */
+ 3 24 2 0 1 0 /* TX_CLK (CLK10) */
1 0 1 0 1 0 /* TxD0 */
1 1 1 0 1 0 /* TxD1 */
1 2 1 0 1 0 /* TxD2 */
@@ -156,30 +158,30 @@
1 7 2 0 1 0 /* RxD3 */
1 8 2 0 1 0 /* RX_ER */
1 9 1 0 1 0 /* TX_ER */
- 1 a 2 0 1 0 /* RX_DV */
- 1 b 2 0 1 0 /* COL */
- 1 c 1 0 1 0 /* TX_EN */
- 1 d 2 0 1 0>;/* CRS */
+ 1 10 2 0 1 0 /* RX_DV */
+ 1 11 2 0 1 0 /* COL */
+ 1 12 1 0 1 0 /* TX_EN */
+ 1 13 2 0 1 0>; /* CRS */
};
pio4: ucc_pin@04 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
- 3 1f 2 0 1 0 /* RX_CLK (CLK7) */
+ 3 31 2 0 1 0 /* RX_CLK (CLK7) */
3 6 2 0 1 0 /* TX_CLK (CLK8) */
- 1 12 1 0 1 0 /* TxD0 */
- 1 13 1 0 1 0 /* TxD1 */
- 1 14 1 0 1 0 /* TxD2 */
- 1 15 1 0 1 0 /* TxD3 */
- 1 16 2 0 1 0 /* RxD0 */
- 1 17 2 0 1 0 /* RxD1 */
- 1 18 2 0 1 0 /* RxD2 */
- 1 19 2 0 1 0 /* RxD3 */
- 1 1a 2 0 1 0 /* RX_ER */
- 1 1b 1 0 1 0 /* TX_ER */
- 1 1c 2 0 1 0 /* RX_DV */
- 1 1d 2 0 1 0 /* COL */
- 1 1e 1 0 1 0 /* TX_EN */
- 1 1f 2 0 1 0>;/* CRS */
+ 1 18 1 0 1 0 /* TxD0 */
+ 1 19 1 0 1 0 /* TxD1 */
+ 1 20 1 0 1 0 /* TxD2 */
+ 1 21 1 0 1 0 /* TxD3 */
+ 1 22 2 0 1 0 /* RxD0 */
+ 1 23 2 0 1 0 /* RxD1 */
+ 1 24 2 0 1 0 /* RxD2 */
+ 1 25 2 0 1 0 /* RxD3 */
+ 1 26 2 0 1 0 /* RX_ER */
+ 1 27 1 0 1 0 /* TX_ER */
+ 1 28 2 0 1 0 /* RX_DV */
+ 1 29 2 0 1 0 /* COL */
+ 1 30 1 0 1 0 /* TX_EN */
+ 1 31 2 0 1 0>; /* CRS */
};
pio5: ucc_pin@05 {
pio-map = <
@@ -207,43 +209,45 @@
device_type = "qe";
compatible = "fsl,qe";
model = "QE";
- ranges = <0 e0100000 00100000>;
- reg = <e0100000 480>;
+ ranges = <0x0 0xe0100000 0x00100000>;
+ reg = <0xe0100000 0x480>;
brg-frequency = <0>;
- bus-frequency = <BCD3D80>;
+ bus-frequency = <198000000>;
muram@10000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
device_type = "muram";
- ranges = <0 00010000 00004000>;
+ ranges = <0x0 0x00010000 0x00004000>;
data-only@0 {
- reg = <0 4000>;
+ reg = <0x0 0x4000>;
};
};
spi@4c0 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <4c0 40>;
+ reg = <0x4c0 0x40>;
interrupts = <2>;
- interrupt-parent = < &qeic >;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
spi@500 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <500 40>;
+ reg = <0x500 0x40>;
interrupts = <1>;
- interrupt-parent = < &qeic >;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
usb@6c0 {
compatible = "qe_udc";
- reg = <6c0 40 8B00 100>;
- interrupts = <b>;
- interrupt-parent = < &qeic >;
+ reg = <0x6c0 0x40 0x8b00 0x100>;
+ interrupts = <11>;
+ interrupt-parent = <&qeic>;
mode = "slave";
};
@@ -253,14 +257,14 @@
model = "UCC";
cell-index = <3>;
device-id = <3>;
- reg = <2200 200>;
- interrupts = <22>;
- interrupt-parent = < &qeic >;
+ reg = <0x2200 0x200>;
+ interrupts = <34>;
+ interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "clk9";
tx-clock-name = "clk10";
- phy-handle = < &phy3 >;
- pio-handle = < &pio3 >;
+ phy-handle = <&phy3>;
+ pio-handle = <&pio3>;
};
enet1: ucc@3200 {
@@ -269,14 +273,14 @@
model = "UCC";
cell-index = <4>;
device-id = <4>;
- reg = <3200 200>;
- interrupts = <23>;
- interrupt-parent = < &qeic >;
+ reg = <0x3200 0x200>;
+ interrupts = <35>;
+ interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "clk7";
tx-clock-name = "clk8";
- phy-handle = < &phy4 >;
- pio-handle = < &pio4 >;
+ phy-handle = <&phy4>;
+ pio-handle = <&pio4>;
};
ucc@2400 {
@@ -302,19 +306,19 @@
mdio@2320 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <2320 18>;
+ reg = <0x2320 0x18>;
device_type = "mdio";
compatible = "ucc_geth_phy";
phy3: ethernet-phy@03 {
- interrupt-parent = < &ipic >;
- interrupts = <11 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
reg = <3>;
device_type = "ethernet-phy";
};
phy4: ethernet-phy@04 {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
reg = <4>;
device_type = "ethernet-phy";
};
@@ -325,69 +329,69 @@
device_type = "qeic";
#address-cells = <0>;
#interrupt-cells = <1>;
- reg = <80 80>;
+ reg = <0x80 0x80>;
big-endian;
- interrupts = <20 8 21 8>; //high:32 low:33
- interrupt-parent = < &ipic >;
+ interrupts = <32 0x8 33 0x8>; //high:32 low:33
+ interrupt-parent = <&ipic>;
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 AD17 */
- 8800 0 0 1 &ipic 14 8
- 8800 0 0 2 &ipic 15 8
- 8800 0 0 3 &ipic 16 8
- 8800 0 0 4 &ipic 17 8
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x12 AD18 */
- 9000 0 0 1 &ipic 16 8
- 9000 0 0 2 &ipic 17 8
- 9000 0 0 3 &ipic 14 8
- 9000 0 0 4 &ipic 15 8
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x13 AD19 */
- 9800 0 0 1 &ipic 17 8
- 9800 0 0 2 &ipic 14 8
- 9800 0 0 3 &ipic 15 8
- 9800 0 0 4 &ipic 16 8
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x15 AD21*/
- a800 0 0 1 &ipic 14 8
- a800 0 0 2 &ipic 15 8
- a800 0 0 3 &ipic 16 8
- a800 0 0 4 &ipic 17 8
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x16 AD22*/
- b000 0 0 1 &ipic 17 8
- b000 0 0 2 &ipic 14 8
- b000 0 0 3 &ipic 15 8
- b000 0 0 4 &ipic 16 8
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x17 AD23*/
- b800 0 0 1 &ipic 16 8
- b800 0 0 2 &ipic 17 8
- b800 0 0 3 &ipic 14 8
- b800 0 0 4 &ipic 15 8
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x18 AD24*/
- c000 0 0 1 &ipic 15 8
- c000 0 0 2 &ipic 16 8
- c000 0 0 3 &ipic 17 8
- c000 0 0 4 &ipic 14 8>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
- bus-range = <0 0>;
- ranges = <02000000 0 90000000 90000000 0 10000000
- 42000000 0 80000000 80000000 0 10000000
- 01000000 0 00000000 d0000000 0 00100000>;
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xd0000000 0x0 0x00100000>;
clock-frequency = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 6/9] mpc832x_rdb: Convert mpc832x_rdb to dts-v1 format.
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Convert the MPC832x RDB dts file to v1 format. Entries for
values normally parsed by humans are left in decimal (i.e. IRQ,
cache size, clock rates, basic counts and index values).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc832x_rdb.dts | 150 +++++++++++++++++----------------
1 files changed, 77 insertions(+), 73 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 10ff7aa..77adc18 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -9,6 +9,8 @@
* option) any later version.
*/
+/dts-v1/;
+
/ {
model = "MPC8323ERDB";
compatible = "MPC8323ERDB", "MPC832xRDB", "MPC83xxRDB";
@@ -30,10 +32,10 @@
PowerPC,8323@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <4000>; // L1, 16K
- i-cache-size = <4000>; // L1, 16K
+ d-cache-line-size = <0x20>; // 32 bytes
+ i-cache-line-size = <0x20>; // 32 bytes
+ d-cache-size = <16384>; // L1, 16K
+ i-cache-size = <16384>; // L1, 16K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
@@ -42,21 +44,21 @@
memory {
device_type = "memory";
- reg = <00000000 04000000>;
+ reg = <0x00000000 0x04000000>;
};
soc8323@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -64,8 +66,8 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
interrupt-parent = <&pic>;
dfsrr;
};
@@ -74,9 +76,9 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
+ interrupts = <9 0x8>;
interrupt-parent = <&pic>;
};
@@ -84,9 +86,9 @@
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <a 8>;
+ interrupts = <10 0x8>;
interrupt-parent = <&pic>;
};
@@ -94,26 +96,26 @@
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 7000>;
- interrupts = <b 8>;
+ reg = <0x30000 0x7000>;
+ interrupts = <11 0x8>;
interrupt-parent = <&pic>;
/* Rev. 2.2 */
num-channels = <1>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000004c>;
- descriptor-types-mask = <0122003f>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000004c>;
+ descriptor-types-mask = <0x0122003f>;
};
pic:pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
par_io@1400 {
- reg = <1400 100>;
+ reg = <0x1400 0x100>;
device_type = "par_io";
num-ports = <7>;
@@ -122,28 +124,28 @@
/* port pin dir open_drain assignment has_irq */
3 4 3 0 2 0 /* MDIO */
3 5 1 0 2 0 /* MDC */
- 3 15 2 0 1 0 /* RX_CLK (CLK16) */
- 3 17 2 0 1 0 /* TX_CLK (CLK3) */
- 0 12 1 0 1 0 /* TxD0 */
- 0 13 1 0 1 0 /* TxD1 */
- 0 14 1 0 1 0 /* TxD2 */
- 0 15 1 0 1 0 /* TxD3 */
- 0 16 2 0 1 0 /* RxD0 */
- 0 17 2 0 1 0 /* RxD1 */
- 0 18 2 0 1 0 /* RxD2 */
- 0 19 2 0 1 0 /* RxD3 */
- 0 1a 2 0 1 0 /* RX_ER */
- 0 1b 1 0 1 0 /* TX_ER */
- 0 1c 2 0 1 0 /* RX_DV */
- 0 1d 2 0 1 0 /* COL */
- 0 1e 1 0 1 0 /* TX_EN */
- 0 1f 2 0 1 0>; /* CRS */
+ 3 21 2 0 1 0 /* RX_CLK (CLK16) */
+ 3 23 2 0 1 0 /* TX_CLK (CLK3) */
+ 0 18 1 0 1 0 /* TxD0 */
+ 0 19 1 0 1 0 /* TxD1 */
+ 0 20 1 0 1 0 /* TxD2 */
+ 0 21 1 0 1 0 /* TxD3 */
+ 0 22 2 0 1 0 /* RxD0 */
+ 0 23 2 0 1 0 /* RxD1 */
+ 0 24 2 0 1 0 /* RxD2 */
+ 0 25 2 0 1 0 /* RxD3 */
+ 0 26 2 0 1 0 /* RX_ER */
+ 0 27 1 0 1 0 /* TX_ER */
+ 0 28 2 0 1 0 /* RX_DV */
+ 0 29 2 0 1 0 /* COL */
+ 0 30 1 0 1 0 /* TX_EN */
+ 0 31 2 0 1 0>; /* CRS */
};
ucc3pio:ucc_pin@03 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
- 0 d 2 0 1 0 /* RX_CLK (CLK9) */
- 3 18 2 0 1 0 /* TX_CLK (CLK10) */
+ 0 13 2 0 1 0 /* RX_CLK (CLK9) */
+ 3 24 2 0 1 0 /* TX_CLK (CLK10) */
1 0 1 0 1 0 /* TxD0 */
1 1 1 0 1 0 /* TxD1 */
1 2 1 0 1 0 /* TxD2 */
@@ -154,10 +156,10 @@
1 7 2 0 1 0 /* RxD3 */
1 8 2 0 1 0 /* RX_ER */
1 9 1 0 1 0 /* TX_ER */
- 1 a 2 0 1 0 /* RX_DV */
- 1 b 2 0 1 0 /* COL */
- 1 c 1 0 1 0 /* TX_EN */
- 1 d 2 0 1 0>; /* CRS */
+ 1 10 2 0 1 0 /* RX_DV */
+ 1 11 2 0 1 0 /* COL */
+ 1 12 1 0 1 0 /* TX_EN */
+ 1 13 2 0 1 0>; /* CRS */
};
};
};
@@ -167,24 +169,26 @@
#size-cells = <1>;
device_type = "qe";
model = "QE";
- ranges = <0 e0100000 00100000>;
- reg = <e0100000 480>;
+ ranges = <0x0 0xe0100000 0x00100000>;
+ reg = <0xe0100000 0x480>;
brg-frequency = <0>;
- bus-frequency = <BCD3D80>;
+ bus-frequency = <198000000>;
muram@10000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
device_type = "muram";
- ranges = <0 00010000 00004000>;
+ ranges = <0x0 0x00010000 0x00004000>;
data-only@0 {
- reg = <0 4000>;
+ reg = <0x0 0x4000>;
};
};
spi@4c0 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <4c0 40>;
+ reg = <0x4c0 0x40>;
interrupts = <2>;
interrupt-parent = <&qeic>;
mode = "cpu-qe";
@@ -193,7 +197,7 @@
spi@500 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <500 40>;
+ reg = <0x500 0x40>;
interrupts = <1>;
interrupt-parent = <&qeic>;
mode = "cpu";
@@ -205,8 +209,8 @@
model = "UCC";
cell-index = <2>;
device-id = <2>;
- reg = <3000 200>;
- interrupts = <21>;
+ reg = <0x3000 0x200>;
+ interrupts = <33>;
interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "clk16";
@@ -221,8 +225,8 @@
model = "UCC";
cell-index = <3>;
device-id = <3>;
- reg = <2200 200>;
- interrupts = <22>;
+ reg = <0x2200 0x200>;
+ interrupts = <34>;
interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "clk9";
@@ -234,7 +238,7 @@
mdio@3120 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <3120 18>;
+ reg = <0x3120 0x18>;
device_type = "mdio";
compatible = "ucc_geth_phy";
@@ -257,43 +261,43 @@
device_type = "qeic";
#address-cells = <0>;
#interrupt-cells = <1>;
- reg = <80 80>;
+ reg = <0x80 0x80>;
big-endian;
- interrupts = <20 8 21 8>; //high:32 low:33
+ interrupts = <32 0x8 33 0x8>; //high:32 low:33
interrupt-parent = <&pic>;
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x10 AD16 (USB) */
- 8000 0 0 1 &pic 11 8
+ 0x8000 0x0 0x0 0x1 &pic 17 0x8
/* IDSEL 0x11 AD17 (Mini1)*/
- 8800 0 0 1 &pic 12 8
- 8800 0 0 2 &pic 13 8
- 8800 0 0 3 &pic 14 8
- 8800 0 0 4 &pic 30 8
+ 0x8800 0x0 0x0 0x1 &pic 18 0x8
+ 0x8800 0x0 0x0 0x2 &pic 19 0x8
+ 0x8800 0x0 0x0 0x3 &pic 20 0x8
+ 0x8800 0x0 0x0 0x4 &pic 48 0x8
/* IDSEL 0x12 AD18 (PCI/Mini2) */
- 9000 0 0 1 &pic 13 8
- 9000 0 0 2 &pic 14 8
- 9000 0 0 3 &pic 30 8
- 9000 0 0 4 &pic 11 8>;
+ 0x9000 0x0 0x0 0x1 &pic 19 0x8
+ 0x9000 0x0 0x0 0x2 &pic 20 0x8
+ 0x9000 0x0 0x0 0x3 &pic 48 0x8
+ 0x9000 0x0 0x0 0x4 &pic 17 0x8>;
interrupt-parent = <&pic>;
- interrupts = <42 8>;
- bus-range = <0 0>;
- ranges = <42000000 0 80000000 80000000 0 10000000
- 02000000 0 90000000 90000000 0 10000000
- 01000000 0 d0000000 d0000000 0 04000000>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x01000000 0x0 0xd0000000 0xd0000000 0x0 0x04000000>;
clock-frequency = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 7/9] 8349mitx: Convert mpc8349e-mitx to dts-v1 format.
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Convert the MPC8349 MITX dts file to v1 format. Entries for
values normally parsed by humans are left in decimal (i.e. IRQ,
cache size, clock rates, basic counts and index values).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc8349emitx.dts | 153 ++++++++++++++++----------------
1 files changed, 78 insertions(+), 75 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 04b8da4..6467ae5 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -8,6 +8,9 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
+
+/dts-v1/;
+
/ {
model = "MPC8349EMITX";
compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
@@ -30,10 +33,10 @@
PowerPC,8349@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>;
- i-cache-line-size = <20>;
- d-cache-size = <8000>;
- i-cache-size = <8000>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -42,21 +45,21 @@
memory {
device_type = "memory";
- reg = <00000000 10000000>;
+ reg = <0x00000000 0x10000000>;
};
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>; // from bootloader
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -64,9 +67,9 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -75,39 +78,39 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
spi@7000 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <7000 1000>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
usb@22000 {
compatible = "fsl-usb2-mph";
- reg = <22000 1000>;
+ reg = <0x22000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <27 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <39 0x8>;
phy_type = "ulpi";
port1;
};
usb@23000 {
compatible = "fsl-usb2-dr";
- reg = <23000 1000>;
+ reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <26 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
dr_mode = "peripheral";
phy_type = "ulpi";
};
@@ -116,13 +119,13 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
- reg = <24520 20>;
+ reg = <0x24520 0x20>;
/* Vitesse 8201 */
phy1c: ethernet-phy@1c {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
- reg = <1c>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x1c>;
device_type = "ethernet-phy";
};
};
@@ -132,11 +135,11 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <24000 1000>;
+ reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <20 8 21 8 22 8>;
- interrupt-parent = < &ipic >;
- phy-handle = < &phy1c >;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy1c>;
linux,network-index = <0>;
};
@@ -145,12 +148,12 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <25000 1000>;
+ reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <23 8 24 8 25 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
+ interrupt-parent = <&ipic>;
/* Vitesse 7385 isn't on the MDIO bus */
- fixed-link = <1 1 d#1000 0 0>;
+ fixed-link = <1 1 1000 0 0>;
linux,network-index = <1>;
};
@@ -158,88 +161,88 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>; // from bootloader
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>; // from bootloader
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
- descriptor-types-mask = <01010ebf>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000007e>;
+ descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x10 - SATA */
- 8000 0 0 1 &ipic 16 8 /* SATA_INTA */
+ 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
- bus-range = <0 0>;
- ranges = <42000000 0 80000000 80000000 0 10000000
- 02000000 0 90000000 90000000 0 10000000
- 01000000 0 00000000 e2000000 0 01000000>;
- clock-frequency = <3f940aa>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
pci1: pci@e0008600 {
cell-index = <2>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0E - MiniPCI Slot */
- 7000 0 0 1 &ipic 15 8 /* PCI_INTA */
+ 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
/* IDSEL 0x0F - PCI Slot */
- 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
- 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
- >;
- interrupt-parent = < &ipic >;
- interrupts = <43 8>;
- bus-range = <0 0>;
- ranges = <42000000 0 a0000000 a0000000 0 10000000
- 02000000 0 b0000000 b0000000 0 10000000
- 01000000 0 00000000 e3000000 0 01000000>;
- clock-frequency = <3f940aa>;
+ 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
+ 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
+ >;
+ interrupt-parent = <&ipic>;
+ interrupts = <67 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008600 100>;
+ reg = <0xe0008600 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
@@ -249,15 +252,15 @@
#size-cells = <1>;
compatible = "fsl,mpc8349e-localbus",
"fsl,pq2pro-localbus";
- reg = <e0005000 d8>;
- ranges = <3 0 f0000000 210>;
+ reg = <0xe0005000 0xd8>;
+ ranges = <0x3 0x0 0xf0000000 0x210>;
pata@3,0 {
compatible = "fsl,mpc8349emitx-pata", "ata-generic";
- reg = <3 0 10 3 20c 4>;
+ reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
reg-shift = <1>;
pio-mode = <6>;
- interrupts = <17 8>;
+ interrupts = <23 0x8>;
interrupt-parent = <&ipic>;
};
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 8/9] 8349mitxgp: Convert mpc8349e MITX GP to dts-v1 format.
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Convert the MPC8349 MITX GP dts file to v1 format. Entries for
values normally parsed by humans are left in decimal (i.e. IRQ,
cache size, clock rates, basic counts and index values).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc8349emitxgp.dts | 107 +++++++++++++++--------------
1 files changed, 55 insertions(+), 52 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index a06ff92..c453ebe 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -8,6 +8,9 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
+
+/dts-v1/;
+
/ {
model = "MPC8349EMITXGP";
compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
@@ -28,10 +31,10 @@
PowerPC,8349@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>;
- i-cache-line-size = <20>;
- d-cache-size = <8000>;
- i-cache-size = <8000>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -40,21 +43,21 @@
memory {
device_type = "memory";
- reg = <00000000 10000000>;
+ reg = <0x00000000 0x10000000>;
};
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>; // from bootloader
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -62,9 +65,9 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -73,28 +76,28 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
spi@7000 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <7000 1000>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
usb@23000 {
compatible = "fsl-usb2-dr";
- reg = <23000 1000>;
+ reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <26 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@@ -103,13 +106,13 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
- reg = <24520 20>;
+ reg = <0x24520 0x20>;
/* Vitesse 8201 */
phy1c: ethernet-phy@1c {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
- reg = <1c>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x1c>;
device_type = "ethernet-phy";
};
};
@@ -119,11 +122,11 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <24000 1000>;
+ reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <20 8 21 8 22 8>;
- interrupt-parent = < &ipic >;
- phy-handle = < &phy1c >;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy1c>;
linux,network-index = <0>;
};
@@ -131,63 +134,63 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>; // from bootloader
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>; // from bootloader
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
- descriptor-types-mask = <01010ebf>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000007e>;
+ descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
};
pci0: pci@e0008600 {
cell-index = <2>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0F - PCI Slot */
- 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
- 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
+ 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
+ 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
>;
- interrupt-parent = < &ipic >;
- interrupts = <43 8>;
- bus-range = <1 1>;
- ranges = <42000000 0 a0000000 a0000000 0 10000000
- 02000000 0 b0000000 b0000000 0 10000000
- 01000000 0 00000000 e3000000 0 01000000>;
- clock-frequency = <3f940aa>;
+ interrupt-parent = <&ipic>;
+ interrupts = <67 0x8>;
+ bus-range = <0x1 0x1>;
+ ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008600 100>;
+ reg = <0xe0008600 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 9/9] 8313rdb: Convert mpc8313 RDB to dts-v1 format.
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Convert the MPC8313 RDB dts file to v1 format. Entries for
values normally parsed by humans are left in decimal (i.e. IRQ,
cache size, clock rates, basic counts and index values).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc8313erdb.dts | 126 +++++++++++++++++----------------
1 files changed, 64 insertions(+), 62 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 9bcf2c9..38c9548 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -9,6 +9,8 @@
* option) any later version.
*/
+/dts-v1/;
+
/ {
model = "MPC8313ERDB";
compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
@@ -30,10 +32,10 @@
PowerPC,8313@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <4000>; // L1, 16K
- i-cache-size = <4000>; // L1, 16K
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <16384>; // L1, 16K
+ i-cache-size = <16384>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -42,30 +44,30 @@
memory {
device_type = "memory";
- reg = <00000000 08000000>; // 128MB at 0
+ reg = <0x00000000 0x08000000>; // 128MB at 0
};
localbus@e0005000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
- reg = <e0005000 1000>;
- interrupts = <d#77 8>;
+ reg = <0xe0005000 0x1000>;
+ interrupts = <77 0x8>;
interrupt-parent = <&ipic>;
// CS0 and CS1 are swapped when
// booting from nand, but the
// addresses are the same.
- ranges = <0 0 fe000000 00800000
- 1 0 e2800000 00008000
- 2 0 f0000000 00020000
- 3 0 fa000000 00008000>;
+ ranges = <0x0 0x0 0xfe000000 0x00800000
+ 0x1 0x0 0xe2800000 0x00008000
+ 0x2 0x0 0xf0000000 0x00020000
+ 0x3 0x0 0xfa000000 0x00008000>;
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
- reg = <0 0 800000>;
+ reg = <0x0 0x0 0x800000>;
bank-width = <2>;
device-width = <1>;
};
@@ -75,19 +77,19 @@
#size-cells = <1>;
compatible = "fsl,mpc8313-fcm-nand",
"fsl,elbc-fcm-nand";
- reg = <1 0 2000>;
+ reg = <0x1 0x0 0x2000>;
u-boot@0 {
- reg = <0 100000>;
+ reg = <0x0 0x100000>;
read-only;
};
kernel@100000 {
- reg = <100000 300000>;
+ reg = <0x100000 0x300000>;
};
fs@400000 {
- reg = <400000 1c00000>;
+ reg = <0x400000 0x1c00000>;
};
};
};
@@ -97,14 +99,14 @@
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -112,8 +114,8 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
interrupt-parent = < &ipic >;
dfsrr;
};
@@ -123,8 +125,8 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
interrupt-parent = < &ipic >;
dfsrr;
};
@@ -132,8 +134,8 @@
spi@7000 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <7000 1000>;
- interrupts = <10 8>;
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
interrupt-parent = < &ipic >;
mode = "cpu";
};
@@ -141,11 +143,11 @@
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
compatible = "fsl-usb2-dr";
- reg = <23000 1000>;
+ reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = < &ipic >;
- interrupts = <26 8>;
+ interrupts = <38 0x8>;
phy_type = "utmi_wide";
};
@@ -153,17 +155,17 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
- reg = <24520 20>;
+ reg = <0x24520 0x20>;
phy1: ethernet-phy@1 {
interrupt-parent = < &ipic >;
- interrupts = <13 8>;
- reg = <1>;
+ interrupts = <19 0x8>;
+ reg = <0x1>;
device_type = "ethernet-phy";
};
phy4: ethernet-phy@4 {
interrupt-parent = < &ipic >;
- interrupts = <14 8>;
- reg = <4>;
+ interrupts = <20 0x8>;
+ reg = <0x4>;
device_type = "ethernet-phy";
};
};
@@ -173,9 +175,9 @@
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
- reg = <24000 1000>;
+ reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <25 8 24 8 23 8>;
+ interrupts = <37 0x8 36 0x8 35 0x8>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1 >;
};
@@ -185,9 +187,9 @@
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
- reg = <25000 1000>;
+ reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <22 8 21 8 20 8>;
+ interrupts = <34 0x8 33 0x8 32 0x8>;
interrupt-parent = < &ipic >;
phy-handle = < &phy4 >;
};
@@ -196,9 +198,9 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
+ interrupts = <9 0x8>;
interrupt-parent = < &ipic >;
};
@@ -206,9 +208,9 @@
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <a 8>;
+ interrupts = <10 0x8>;
interrupt-parent = < &ipic >;
};
@@ -216,14 +218,14 @@
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 7000>;
- interrupts = <b 8>;
+ reg = <0x30000 0x7000>;
+ interrupts = <11 0x8>;
interrupt-parent = < &ipic >;
/* Rev. 2.2 */
num-channels = <1>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000004c>;
- descriptor-types-mask = <0122003f>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000004c>;
+ descriptor-types-mask = <0x0122003f>;
};
/* IPIC
@@ -236,38 +238,38 @@
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0E -mini PCI */
- 7000 0 0 1 &ipic 12 8
- 7000 0 0 2 &ipic 12 8
- 7000 0 0 3 &ipic 12 8
- 7000 0 0 4 &ipic 12 8
+ 0x7000 0x0 0x0 0x1 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x2 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x3 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x4 &ipic 18 0x8
/* IDSEL 0x0F - PCI slot */
- 7800 0 0 1 &ipic 11 8
- 7800 0 0 2 &ipic 12 8
- 7800 0 0 3 &ipic 11 8
- 7800 0 0 4 &ipic 12 8>;
+ 0x7800 0x0 0x0 0x1 &ipic 17 0x8
+ 0x7800 0x0 0x0 0x2 &ipic 18 0x8
+ 0x7800 0x0 0x0 0x3 &ipic 17 0x8
+ 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
interrupt-parent = < &ipic >;
- interrupts = <42 8>;
- bus-range = <0 0>;
- ranges = <02000000 0 90000000 90000000 0 10000000
- 42000000 0 80000000 80000000 0 10000000
- 01000000 0 00000000 e2000000 0 00100000>;
- clock-frequency = <3f940aa>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Michel Dänzer @ 2008-01-28 8:16 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev, Ingo Molnar, vatsa, Peter Zijlstra
In-Reply-To: <1201494324.6815.171.camel@pasglop>
On Mon, 2008-01-28 at 15:25 +1100, Benjamin Herrenschmidt wrote:
> On Sun, 2008-01-27 at 17:13 +0100, Michel Dänzer wrote:
> >
> > > Do you see behavior change (from good->bad) immediately after
> > applying that patch
> > > during your bisect process?
> >
> > Yes, confirmed by trying that commit and its parent again.
>
> Just to be paranoid... can you try with a different gcc version in case
> something gets miscompiled ?
Is that really necessary - after all,
810e95ccd58d91369191aa4ecc9e6d4a10d8d0c8 is related to process wakeup
behaviour?
--
Earthling Michel Dänzer | http://tungstengraphics.com
Libre software enthusiast | Debian, X and DRI developer
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Peter Zijlstra @ 2008-01-28 8:50 UTC (permalink / raw)
To: Michel Dänzer; +Cc: Ingo Molnar, vatsa, linuxppc-dev
In-Reply-To: <1201450409.1931.23.camel@thor.sulgenrain.local>
On Sun, 2008-01-27 at 17:13 +0100, Michel Dänzer wrote:
> In summary, there are two separate problems with similar symptoms, which
> had me confused at times:
>
> * With CONFIG_FAIR_USER_SCHED disabled, there are severe
> interactivity hickups with a niced CPU hog and top running. This
> started with commit 810e95ccd58d91369191aa4ecc9e6d4a10d8d0c8.
The revert at the bottom causes the wakeup granularity to shrink for +
nice and to grow for - nice. That is, it becomes easier to preempt a +
nice task, and harder to preempt a - nice task.
I think we originally had that; didn't comment it, forgot the reason
changed it because the units didn't match. Another reason might have
been the more difficult preemption of - nice tasks. That might - niced
tasks to cause horrible latencies - Ingo, any recollection?
Are you perhaps running with a very low HZ (HZ=100)? (If wakeup
preemption fails, tick preemption will take over).
Also, could you try lowering:
/proc/sys/kernel/sched_wakeup_granularity_ns
> * With CONFIG_FAIR_USER_SCHED enabled, X becomes basically
> unusable with a niced CPU hog, with or without top running. I
> don't know when this started, possibly when this option was
> first introduced.
Srivatsa found an issue that might explain the very bad behaviour under
group scheduling. But I gather you're not at all interested in this
feature?
> FWIW, the patch below (which reverts commit
> 810e95ccd58d91369191aa4ecc9e6d4a10d8d0c8) restores 2.6.24 interactivity
> to the same level as 2.6.23 here with CONFIG_FAIR_USER_SCHED disabled
> (my previous report to the contrary was with CONFIG_FAIR_USER_SCHED
> enabled because I didn't yet realize the difference it makes), but I
> don't know if that's the real fix.
>
>
> diff --git a/kernel/sched_fair.c b/kernel/sched_fair.c
> index da7c061..a7cc22a 100644
> --- a/kernel/sched_fair.c
> +++ b/kernel/sched_fair.c
> @@ -843,7 +843,6 @@ static void check_preempt_wakeup(struct rq *rq, struct task_struct *p)
> struct task_struct *curr = rq->curr;
> struct cfs_rq *cfs_rq = task_cfs_rq(curr);
> struct sched_entity *se = &curr->se, *pse = &p->se;
> - unsigned long gran;
>
> if (unlikely(rt_prio(p->prio))) {
> update_rq_clock(rq);
> @@ -866,11 +865,8 @@ static void check_preempt_wakeup(struct rq *rq, struct task_struct *p)
> pse = parent_entity(pse);
> }
>
> - gran = sysctl_sched_wakeup_granularity;
> - if (unlikely(se->load.weight != NICE_0_LOAD))
> - gran = calc_delta_fair(gran, &se->load);
>
> - if (pse->vruntime + gran < se->vruntime)
> + if (pse->vruntime + sysctl_sched_wakeup_granularity < se->vruntime)
> resched_task(curr);
> }
^ permalink raw reply
* RE: MPC5200B SPI codec error when there is a heavy ethernet
From: TXEMA LOPEZ @ 2008-01-28 8:37 UTC (permalink / raw)
To: linuxppc-embedded
Hi all,=20
The engineers of Freescale have recognized a problem in the PSC SPI =
Slave Select signal when there is a heavy ethernet loading. Textually =
they say:
" I have tested the MPC5200B FEC and PSC6 SPI.=20
You are right. If there is heavy Ethernet loading, the PSC SPI can stop =
during transmission with SS goes high.
Use a general-purpose output as SPI slave select signal instead PSC SPI =
SS signal.
Factory is informed about similar incorrect behaviour of the PSC SPI =
slave select."
We have repeated the error in three scenarios:
In our MPC5200B custom board with a Denx 2.4.25 kernel.
In a Lite5200B with a Denx 2.4.25 kernel.
In a Lite5200B with the freescale bsp: =
mpc5200_lite5200b_20070203_ltib-rc4. It's a 2.6.16 kernel version.
We have checked the PSC3 and PSC6 and the behaviour is the same.
So, it seems is a chip's bug and we must avoid to use the SS signal with =
the PSC SPI if we want to communicate by ethernet. I think it's a =
probabilistic error and in case there is some traffic in ethernet and a =
transmission by SPI at the same time it could happen.
Best regards,
Txema L=F3pez.
=09
=09
=09
^ permalink raw reply
* Re: Reminder: removal of arch/ppc
From: Matthias Fuchs @ 2008-01-28 9:10 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: linuxppc-dev list
In-Reply-To: <20080125192150.4cde6fac@zod.rchland.ibm.com>
On Saturday 26 January 2008 02:21, Josh Boyer wrote:
> > 4xx:
> > BAMBOO
>
> Ported (mostly)
>
> > CPCI405
>
> Doubt this will be ported.
Of course this will be ported! I will do that in th next weeks.
Matthias
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Michel Dänzer @ 2008-01-28 9:14 UTC (permalink / raw)
To: Peter Zijlstra; +Cc: Ingo Molnar, vatsa, linuxppc-dev
In-Reply-To: <1201510236.6149.24.camel@lappy>
On Mon, 2008-01-28 at 09:50 +0100, Peter Zijlstra wrote:
> On Sun, 2008-01-27 at 17:13 +0100, Michel Dänzer wrote:
>
> > In summary, there are two separate problems with similar symptoms, which
> > had me confused at times:
> >
> > * With CONFIG_FAIR_USER_SCHED disabled, there are severe
> > interactivity hickups with a niced CPU hog and top running. This
> > started with commit 810e95ccd58d91369191aa4ecc9e6d4a10d8d0c8.
>
> The revert at the bottom causes the wakeup granularity to shrink for +
> nice and to grow for - nice. That is, it becomes easier to preempt a +
> nice task, and harder to preempt a - nice task.
Yeah, that matches my observations. :)
> I think we originally had that; didn't comment it, forgot the reason
> changed it because the units didn't match. Another reason might have
> been the more difficult preemption of - nice tasks. That might - niced
> tasks to cause horrible latencies - Ingo, any recollection?
>
> Are you perhaps running with a very low HZ (HZ=100)? (If wakeup
> preemption fails, tick preemption will take over).
I haven't had it below 250 since that became an option, and I'm
currently at 1000 (and NO_HZ, but disabling that didn't seem to make a
difference).
> Also, could you try lowering:
> /proc/sys/kernel/sched_wakeup_granularity_ns
Will try.
> > * With CONFIG_FAIR_USER_SCHED enabled, X becomes basically
> > unusable with a niced CPU hog, with or without top running. I
> > don't know when this started, possibly when this option was
> > first introduced.
>
> Srivatsa found an issue that might explain the very bad behaviour under
> group scheduling. But I gather you're not at all interested in this
> feature?
That's right, but it's good to hear you have a lead there as well, and
if you can't find any interested testers, let me know and I'll try.
--
Earthling Michel Dänzer | http://tungstengraphics.com
Libre software enthusiast | Debian, X and DRI developer
^ permalink raw reply
* Re: MPC5200B SPI codec error when there is a heavy ethernet
From: Juergen Beisert @ 2008-01-28 9:33 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <918EB199DDDFFA42BEA2EB3A1C6021F3020BEB4D@CORREO>
On Monday 28 January 2008 09:37, TXEMA LOPEZ wrote:
> The engineers of Freescale have recognized a problem in the PSC SPI Slave
> Select signal when there is a heavy ethernet loading. Textually they say:
>
> " I have tested the MPC5200B FEC and PSC6 SPI.
> You are right. If there is heavy Ethernet loading, the PSC SPI can stop
> during transmission with SS goes high. Use a general-purpose output as SPI
> slave select signal instead PSC SPI SS signal. Factory is informed about
> similar incorrect behaviour of the PSC SPI slave select."
>
> We have repeated the error in three scenarios:
> In our MPC5200B custom board with a Denx 2.4.25 kernel.
> In a Lite5200B with a Denx 2.4.25 kernel.
> In a Lite5200B with the freescale bsp:
> mpc5200_lite5200b_20070203_ltib-rc4. It's a 2.6.16 kernel version.
>
> We have checked the PSC3 and PSC6 and the behaviour is the same.
>
> So, it seems is a chip's bug and we must avoid to use the SS signal with
> the PSC SPI if we want to communicate by ethernet. I think it's a
> probabilistic error and in case there is some traffic in ethernet and a
> transmission by SPI at the same time it could happen.
There seems also another bug: If the PSC based SPI unit runs as SPI slave, =
and=20
some data in the send FIFO waits for transmission, the MISO line is active=
=20
even if SS input is high and blocks the bus. It does not happen, of the sen=
d=20
=46IFO is empty.
JB
=2D-=20
Dipl.-Ing. Juergen Beisert | http://www.pengutronix.de
=A0Pengutronix - Linux Solutions for Science and Industry
=A0 Handelsregister: Amtsgericht Hildesheim, HRA 2686
=A0 =A0 =A0 Vertretung Sued/Muenchen, Germany
Phone: +49-8766-939 228 | Fax: +49-5121-206917-9
^ permalink raw reply
* Re: [PATCH] Fake NUMA emulation for PowerPC (Take 2)
From: Balbir Singh @ 2008-01-28 9:41 UTC (permalink / raw)
To: Nish Aravamudan; +Cc: Mel Gorman, linuxppc-dev, Paul Mackerras, LKML
In-Reply-To: <29495f1d0801271222l3f52935fq40df4dcb82e60976@mail.gmail.com>
* Nish Aravamudan <nish.aravamudan@gmail.com> [2008-01-27 12:22:54]:
> On 1/27/08, Balbir Singh <balbir@linux.vnet.ibm.com> wrote:
> > * Paul Mackerras <paulus@samba.org> [2008-01-27 22:55:43]:
> >
> > > Balbir Singh writes:
> > >
> > > > Here's a better and more complete fix for the problem. Could you
> > > > please see if it works for you? I tested it on a real NUMA box and it
> > > > seemed to work fine there.
> > >
> > > There are a couple of other changes in behaviour that your patch
> > > introduces, and I'd like to understand them better before taking the
> > > patch. First, with your patch we don't set nodes online if they end
> > > up having no memory in them because of the memory limit, whereas
> > > previously we did. Secondly, in the case where we don't have NUMA
> > > information, we now set node 0 online after adding each LMB, whereas
> > > previously we only set it online once.
> > >
> > > If in fact these changes are benign, then your patch description
> > > should mention them and explain why they are benign.
> > >
> >
> > Yes, they are. I'll try and justify the changes with a good detailed
> > changelog. If people prefer it, I can hide fake NUMA nodes under a
> > config option, so that it does not come enabled by default.
>
> Sigh, there already *is* a fake NUMA config option: CONFIG_NUMA_EMU.
>
> "CONFIG_NUMA_EMU:
> Enable NUMA emulation. A flat machine will be split
> into virtual nodes when booted with "numa=fake=N", where N is the
> number of nodes. This is only useful for debugging."
>
> I have to assume your patch is implementing the same feature for
> powerpc (really just extending the x86_64 one), and thus should share
> the config option.
>
> Any chance you can just make some of that code common? Maybe as a
> follow-on patch. I expect that some of Mel's (added to Cc) work to
> allow NUMA to be set on x86 more easily will flow quite simply into
> adding fake NUMA support there as well. So moving the code to a common
> place (at least the parsing) makes sense.
>
That's the long term plan and we discussed using common code in the
discussion thread for fake NUMA (for PowerPC). We'll get there in
steps. My patch is the basic initial, simple method for implementing
fake NUMA nodes.
> I also feel like you want to be able to online memoryless nodes --
> that's where we've been hitting a number of bugs lately in the VM. I
> can't tell from Paul's comment if your patch prevents that from being
> faked or not.
>
My patch prevents nodes from being enabled if we cross the memory
limit. Earlier they were being enabled.
> Thanks,
> Nish
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
--
Warm Regards,
Balbir Singh
Linux Technology Center
IBM, ISTL
^ permalink raw reply
* [PATCH 1/1][PPC] replace logical- by bit-and in pci_process_ISA_OF_ranges(), arch/powerpc/kernel/isa-bridge.c
From: Roel Kluin @ 2008-01-28 10:06 UTC (permalink / raw)
To: jwboyer; +Cc: linuxppc-dev
in arch/powerpc/kernel/isa-bridge.c:
41:#define ISA_SPACE_MASK 0x1
42:#define ISA_SPACE_IO 0x1
...
54: struct isa_address {
55: u32 a_hi;
...
65: const struct isa_range *range;
83: if ((range->isa_addr.a_hi && ISA_SPACE_MASK) != ISA_SPACE_IO) {
...
89: if ((range->isa_addr.a_hi && ISA_SPACE_MASK) != ISA_SPACE_IO)
shouldn't these be a single &?
then consider the untested patch below.
--
replace logical "&&" by bit "&" for ISA_SPACE_MASK
Signed-off-by: Roel Kluin <12o3l@tiscali.nl>
---
diff --git a/arch/powerpc/kernel/isa-bridge.c b/arch/powerpc/kernel/isa-bridge.c
index f0f49d1..406a9e6 100644
--- a/arch/powerpc/kernel/isa-bridge.c
+++ b/arch/powerpc/kernel/isa-bridge.c
@@ -80,13 +80,13 @@ static void __devinit pci_process_ISA_OF_ranges(struct device_node *isa_node,
* (size depending on dev->n_addr_cells)
* cell 5: the size of the range
*/
- if ((range->isa_addr.a_hi && ISA_SPACE_MASK) != ISA_SPACE_IO) {
+ if ((range->isa_addr.a_hi & ISA_SPACE_MASK) != ISA_SPACE_IO) {
range++;
rlen -= sizeof(struct isa_range);
if (rlen < sizeof(struct isa_range))
goto inval_range;
}
- if ((range->isa_addr.a_hi && ISA_SPACE_MASK) != ISA_SPACE_IO)
+ if ((range->isa_addr.a_hi & ISA_SPACE_MASK) != ISA_SPACE_IO)
goto inval_range;
isa_addr = range->isa_addr.a_lo;
^ permalink raw reply related
* Re: [Cbe-oss-dev] [PATCH 3/3] Cell IOMMU static mapping support
From: Arnd Bergmann @ 2008-01-28 11:41 UTC (permalink / raw)
To: cbe-oss-dev; +Cc: Olof Johansson, linuxppc-dev
In-Reply-To: <20080126025117.GA28066@lixom.net>
On Saturday 26 January 2008, Olof Johansson wrote:
> >
> > So instead of having an IOMMU window that we use to temporarily map things
> > in and out of DMA'able space, at boot we create a 1:1 mapping for all of
> > memory. This obviously only works for devices that can do 64-bit DMA.
>
> I don't get it. Why not disable the iommu instead?
>
When you disable the iommu, the 32-bit devices stop working because
they can no longer access all of main memory.
The 1:1 mapping is in addition to the DMA window used for those devices,
not in place of it.
Arnd <><
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Srivatsa Vaddagiri @ 2008-01-28 12:11 UTC (permalink / raw)
To: Michel.=?iso-8859-1?Q?D=E4nzer_=3Cmichel=40tungstengraphics=2Ecom=3E?=
Cc: Ingo Molnar, Peter Zijlstra, linuxppc-dev
In-Reply-To: <1201511673.5923.46.camel@thor.sulgenrain.local>
On Mon, Jan 28, 2008 at 10:14:33AM +0100, Michel Dänzer wrote:
> > > * With CONFIG_FAIR_USER_SCHED enabled, X becomes basically
> > > unusable with a niced CPU hog, with or without top running. I
> > > don't know when this started, possibly when this option was
> > > first introduced.
> >
> > Srivatsa found an issue that might explain the very bad behaviour under
> > group scheduling. But I gather you're not at all interested in this
> > feature?
>
> That's right, but it's good to hear you have a lead there as well, and
> if you can't find any interested testers, let me know and I'll try.
Michel,
Thanks for offering to test! The issue I found wrt preemption latency
(when FAIR_USER_SCHED is turned on) is explained here:
http://marc.info/?l=linux-kernel&m=120148675326287
Does the patch in that URL help bring FAIR_USER_SCHED interactivity to the same
level as !FAIR_USER_SCHED?
--
Regards,
vatsa
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Ingo Molnar @ 2008-01-28 12:32 UTC (permalink / raw)
To: Peter Zijlstra; +Cc: linuxppc-dev, Michel Dänzer, vatsa
In-Reply-To: <1201510236.6149.24.camel@lappy>
* Peter Zijlstra <a.p.zijlstra@chello.nl> wrote:
> > * With CONFIG_FAIR_USER_SCHED disabled, there are severe
> > interactivity hickups with a niced CPU hog and top running. This
> > started with commit 810e95ccd58d91369191aa4ecc9e6d4a10d8d0c8.
>
> The revert at the bottom causes the wakeup granularity to shrink for +
> nice and to grow for - nice. That is, it becomes easier to preempt a +
> nice task, and harder to preempt a - nice task.
i think it would be OK to do half of this: make it easier to preempt a
+nice task. Michel, do you really need the -nice portion as well? It's
not a problem to super-preempt positively reniced tasks, but it can be
quite annoying if negatively reniced tasks have super-slices.
Ingo
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox