* [PATCH 3/9] sbc8349: convert human parseable DTS properties to decimal
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
To be consistent with the other DTS v1 conversions pending,
things like cache size and IRQ values should be decimal.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/sbc8349.dts | 40 ++++++++++++++++++------------------
1 files changed, 20 insertions(+), 20 deletions(-)
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 9c13c1a..a36ef93 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -36,10 +36,10 @@
PowerPC,8349@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <0x20>; // 32 bytes
- i-cache-line-size = <0x20>; // 32 bytes
- d-cache-size = <0x8000>; // L1, 32K
- i-cache-size = <0x8000>; // L1, 32K
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <32768>; // L1, 32K
+ i-cache-size = <32768>; // L1, 32K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -70,7 +70,7 @@
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <0xe 0x8>;
+ interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
};
@@ -81,7 +81,7 @@
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
- interrupts = <0xf 0x8>;
+ interrupts = <15 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
};
@@ -89,7 +89,7 @@
spi@7000 {
compatible = "fsl_spi";
reg = <0x7000 0x1000>;
- interrupts = <0x10 0x8>;
+ interrupts = <16 0x8>;
interrupt-parent = <&ipic>;
mode = "cpu";
};
@@ -102,7 +102,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&ipic>;
- interrupts = <0x27 0x8>;
+ interrupts = <39 0x8>;
phy_type = "ulpi";
port1;
};
@@ -114,7 +114,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&ipic>;
- interrupts = <0x26 0x8>;
+ interrupts = <38 0x8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@@ -127,13 +127,13 @@
phy0: ethernet-phy@19 {
interrupt-parent = <&ipic>;
- interrupts = <0x14 0x8>;
+ interrupts = <20 0x8>;
reg = <0x19>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@1a {
interrupt-parent = <&ipic>;
- interrupts = <0x15 0x8>;
+ interrupts = <21 0x8>;
reg = <0x1a>;
device_type = "ethernet-phy";
};
@@ -146,7 +146,7 @@
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
interrupt-parent = <&ipic>;
phy-handle = <&phy0>;
linux,network-index = <0>;
@@ -159,7 +159,7 @@
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
interrupt-parent = <&ipic>;
phy-handle = <&phy1>;
linux,network-index = <1>;
@@ -171,7 +171,7 @@
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <0x9 0x8>;
+ interrupts = <9 0x8>;
interrupt-parent = <&ipic>;
};
@@ -181,7 +181,7 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <0xa 0x8>;
+ interrupts = <10 0x8>;
interrupt-parent = <&ipic>;
};
@@ -190,7 +190,7 @@
model = "SEC2";
compatible = "talitos";
reg = <0x30000 0x10000>;
- interrupts = <0xb 0x8>;
+ interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
num-channels = <4>;
channel-fifo-len = <0x18>;
@@ -221,10 +221,10 @@
interrupt-map = <
/* IDSEL 0x11 */
- 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
- 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
- 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
- 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8>;
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8>;
interrupt-parent = <&ipic>;
interrupts = <0x42 0x8>;
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 4/9] mpc836x: Convert mpc836x_mds to dts-v1 format.
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Convert the MPC836x MDS dts file to v1 format. Entries for
values normally parsed by humans are left in decimal (i.e. IRQ,
cache size, clock rates, basic counts and index values).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc836x_mds.dts | 254 +++++++++++++++++----------------
1 files changed, 128 insertions(+), 126 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 10b5d6d..4260f09 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -14,6 +14,8 @@
/memreserve/ 00000000 1000000;
*/
+/dts-v1/;
+
/ {
model = "MPC8360MDS";
compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS";
@@ -35,38 +37,38 @@
PowerPC,8360@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <8000>; // L1, 32K
- i-cache-size = <8000>; // L1, 32K
- timebase-frequency = <3EF1480>;
- bus-frequency = <FBC5200>;
- clock-frequency = <1F78A400>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <32768>; // L1, 32K
+ i-cache-size = <32768>; // L1, 32K
+ timebase-frequency = <66000000>;
+ bus-frequency = <264000000>;
+ clock-frequency = <528000000>;
};
};
memory {
device_type = "memory";
- reg = <00000000 10000000>;
+ reg = <0x00000000 0x10000000>;
};
bcsr@f8000000 {
device_type = "board-control";
- reg = <f8000000 8000>;
+ reg = <0xf8000000 0x8000>;
};
soc8360@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
- bus-frequency = <FBC5200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <264000000>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -74,14 +76,14 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
compatible = "dallas,ds1374";
- reg = <68>;
+ reg = <0x68>;
};
};
@@ -90,9 +92,9 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -100,46 +102,46 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
- clock-frequency = <FBC5200>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x4500 0x100>;
+ clock-frequency = <264000000>;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
- clock-frequency = <FBC5200>;
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x4600 0x100>;
+ clock-frequency = <264000000>;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000007e>;
/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
- descriptor-types-mask = <01010ebf>;
+ descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
par_io@1400 {
- reg = <1400 100>;
+ reg = <0x1400 0x100>;
device_type = "par_io";
num-ports = <7>;
@@ -153,19 +155,19 @@
1 6 1 0 3 0 /* TxD4 */
1 7 1 0 1 0 /* TxD5 */
1 9 1 0 2 0 /* TxD6 */
- 1 a 1 0 2 0 /* TxD7 */
+ 1 10 1 0 2 0 /* TxD7 */
0 9 2 0 1 0 /* RxD0 */
- 0 a 2 0 1 0 /* RxD1 */
- 0 b 2 0 1 0 /* RxD2 */
- 0 c 2 0 1 0 /* RxD3 */
- 0 d 2 0 1 0 /* RxD4 */
+ 0 10 2 0 1 0 /* RxD1 */
+ 0 11 2 0 1 0 /* RxD2 */
+ 0 12 2 0 1 0 /* RxD3 */
+ 0 13 2 0 1 0 /* RxD4 */
1 1 2 0 2 0 /* RxD5 */
1 0 2 0 2 0 /* RxD6 */
1 4 2 0 2 0 /* RxD7 */
0 7 1 0 1 0 /* TX_EN */
0 8 1 0 1 0 /* TX_ER */
- 0 f 2 0 1 0 /* RX_DV */
- 0 10 2 0 1 0 /* RX_ER */
+ 0 15 2 0 1 0 /* RX_DV */
+ 0 16 2 0 1 0 /* RX_ER */
0 0 2 0 1 0 /* RX_CLK */
2 9 1 0 3 0 /* GTX_CLK - CLK10 */
2 8 2 0 1 0>; /* GTX125 - CLK9 */
@@ -173,27 +175,27 @@
pio2: ucc_pin@02 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
- 0 11 1 0 1 0 /* TxD0 */
- 0 12 1 0 1 0 /* TxD1 */
- 0 13 1 0 1 0 /* TxD2 */
- 0 14 1 0 1 0 /* TxD3 */
+ 0 17 1 0 1 0 /* TxD0 */
+ 0 18 1 0 1 0 /* TxD1 */
+ 0 19 1 0 1 0 /* TxD2 */
+ 0 20 1 0 1 0 /* TxD3 */
1 2 1 0 1 0 /* TxD4 */
1 3 1 0 2 0 /* TxD5 */
1 5 1 0 3 0 /* TxD6 */
1 8 1 0 3 0 /* TxD7 */
- 0 17 2 0 1 0 /* RxD0 */
- 0 18 2 0 1 0 /* RxD1 */
- 0 19 2 0 1 0 /* RxD2 */
- 0 1a 2 0 1 0 /* RxD3 */
- 0 1b 2 0 1 0 /* RxD4 */
- 1 c 2 0 2 0 /* RxD5 */
- 1 d 2 0 3 0 /* RxD6 */
- 1 b 2 0 2 0 /* RxD7 */
- 0 15 1 0 1 0 /* TX_EN */
- 0 16 1 0 1 0 /* TX_ER */
- 0 1d 2 0 1 0 /* RX_DV */
- 0 1e 2 0 1 0 /* RX_ER */
- 0 1f 2 0 1 0 /* RX_CLK */
+ 0 23 2 0 1 0 /* RxD0 */
+ 0 24 2 0 1 0 /* RxD1 */
+ 0 25 2 0 1 0 /* RxD2 */
+ 0 26 2 0 1 0 /* RxD3 */
+ 0 27 2 0 1 0 /* RxD4 */
+ 1 12 2 0 2 0 /* RxD5 */
+ 1 13 2 0 3 0 /* RxD6 */
+ 1 11 2 0 2 0 /* RxD7 */
+ 0 21 1 0 1 0 /* TX_EN */
+ 0 22 1 0 1 0 /* TX_ER */
+ 0 29 2 0 1 0 /* RX_DV */
+ 0 30 2 0 1 0 /* RX_ER */
+ 0 31 2 0 1 0 /* RX_CLK */
2 2 1 0 2 0 /* GTX_CLK - CLK10 */
2 3 2 0 1 0 /* GTX125 - CLK4 */
0 1 3 0 2 0 /* MDIO */
@@ -208,45 +210,45 @@
#size-cells = <1>;
device_type = "qe";
model = "QE";
- ranges = <0 e0100000 00100000>;
- reg = <e0100000 480>;
+ ranges = <0x0 0xe0100000 0x00100000>;
+ reg = <0xe0100000 0x480>;
brg-frequency = <0>;
- bus-frequency = <179A7B00>;
+ bus-frequency = <396000000>;
muram@10000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "muram";
- ranges = <0 00010000 0000c000>;
+ ranges = <0x0 0x00010000 0x0000c000>;
data-only@0 {
- reg = <0 c000>;
+ reg = <0x0 0xc000>;
};
};
spi@4c0 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <4c0 40>;
+ reg = <0x4c0 0x40>;
interrupts = <2>;
- interrupt-parent = < &qeic >;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
spi@500 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <500 40>;
+ reg = <0x500 0x40>;
interrupts = <1>;
- interrupt-parent = < &qeic >;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
usb@6c0 {
compatible = "qe_udc";
- reg = <6c0 40 8B00 100>;
- interrupts = <b>;
- interrupt-parent = < &qeic >;
+ reg = <0x6c0 0x40 0x8b00 0x100>;
+ interrupts = <11>;
+ interrupt-parent = <&qeic>;
mode = "slave";
};
@@ -256,15 +258,15 @@
model = "UCC";
cell-index = <1>;
device-id = <1>;
- reg = <2000 200>;
- interrupts = <20>;
- interrupt-parent = < &qeic >;
+ reg = <0x2000 0x200>;
+ interrupts = <32>;
+ interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "none";
tx-clock-name = "clk9";
- phy-handle = < &phy0 >;
+ phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
- pio-handle = < &pio1 >;
+ pio-handle = <&pio1>;
};
enet1: ucc@3000 {
@@ -273,33 +275,33 @@
model = "UCC";
cell-index = <2>;
device-id = <2>;
- reg = <3000 200>;
- interrupts = <21>;
- interrupt-parent = < &qeic >;
+ reg = <0x3000 0x200>;
+ interrupts = <33>;
+ interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "none";
tx-clock-name = "clk4";
- phy-handle = < &phy1 >;
+ phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
- pio-handle = < &pio2 >;
+ pio-handle = <&pio2>;
};
mdio@2120 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <2120 18>;
+ reg = <0x2120 0x18>;
device_type = "mdio";
compatible = "ucc_geth_phy";
phy0: ethernet-phy@00 {
- interrupt-parent = < &ipic >;
- interrupts = <11 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
reg = <0>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@01 {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
reg = <1>;
device_type = "ethernet-phy";
};
@@ -310,70 +312,70 @@
device_type = "qeic";
#address-cells = <0>;
#interrupt-cells = <1>;
- reg = <80 80>;
+ reg = <0x80 0x80>;
big-endian;
- interrupts = <20 8 21 8>; //high:32 low:33
- interrupt-parent = < &ipic >;
+ interrupts = <32 0x8 33 0x8>; // high:32 low:33
+ interrupt-parent = <&ipic>;
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 AD17 */
- 8800 0 0 1 &ipic 14 8
- 8800 0 0 2 &ipic 15 8
- 8800 0 0 3 &ipic 16 8
- 8800 0 0 4 &ipic 17 8
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x12 AD18 */
- 9000 0 0 1 &ipic 16 8
- 9000 0 0 2 &ipic 17 8
- 9000 0 0 3 &ipic 14 8
- 9000 0 0 4 &ipic 15 8
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x13 AD19 */
- 9800 0 0 1 &ipic 17 8
- 9800 0 0 2 &ipic 14 8
- 9800 0 0 3 &ipic 15 8
- 9800 0 0 4 &ipic 16 8
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x15 AD21*/
- a800 0 0 1 &ipic 14 8
- a800 0 0 2 &ipic 15 8
- a800 0 0 3 &ipic 16 8
- a800 0 0 4 &ipic 17 8
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x16 AD22*/
- b000 0 0 1 &ipic 17 8
- b000 0 0 2 &ipic 14 8
- b000 0 0 3 &ipic 15 8
- b000 0 0 4 &ipic 16 8
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x17 AD23*/
- b800 0 0 1 &ipic 16 8
- b800 0 0 2 &ipic 17 8
- b800 0 0 3 &ipic 14 8
- b800 0 0 4 &ipic 15 8
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x18 AD24*/
- c000 0 0 1 &ipic 15 8
- c000 0 0 2 &ipic 16 8
- c000 0 0 3 &ipic 17 8
- c000 0 0 4 &ipic 14 8>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
bus-range = <0 0>;
- ranges = <02000000 0 a0000000 a0000000 0 10000000
- 42000000 0 80000000 80000000 0 10000000
- 01000000 0 00000000 e2000000 0 00100000>;
- clock-frequency = <3f940aa>;
+ ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 5/9] mpc832x_mds: Convert mpc832x_mds to dts-v1 format.
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Convert the MPC832x MDS dts file to v1 format. Entries for
values normally parsed by humans are left in decimal (i.e. IRQ,
cache size, clock rates, basic counts and index values).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc832x_mds.dts | 234 +++++++++++++++++----------------
1 files changed, 119 insertions(+), 115 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 6902524..17afa8c 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -21,6 +21,8 @@
* you're going by the schematic, the pin is called "P19J-K22".
*/
+/dts-v1/;
+
/ {
model = "MPC8323EMDS";
compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS";
@@ -42,10 +44,10 @@
PowerPC,8323@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <4000>; // L1, 16K
- i-cache-size = <4000>; // L1, 16K
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <16384>; // L1, 16K
+ i-cache-size = <16384>; // L1, 16K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
@@ -54,26 +56,26 @@
memory {
device_type = "memory";
- reg = <00000000 08000000>;
+ reg = <0x00000000 0x08000000>;
};
bcsr@f8000000 {
device_type = "board-control";
- reg = <f8000000 8000>;
+ reg = <0xf8000000 0x8000>;
};
soc8323@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
- bus-frequency = <7DE2900>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <132000000>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -81,14 +83,14 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
compatible = "dallas,ds1374";
- reg = <68>;
+ reg = <0x68>;
};
};
@@ -96,46 +98,46 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 7000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x7000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
/* Rev. 2.2 */
num-channels = <1>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000004c>;
- descriptor-types-mask = <0122003f>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000004c>;
+ descriptor-types-mask = <0x0122003f>;
};
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
par_io@1400 {
- reg = <1400 100>;
+ reg = <0x1400 0x100>;
device_type = "par_io";
num-ports = <7>;
@@ -144,8 +146,8 @@
/* port pin dir open_drain assignment has_irq */
3 4 3 0 2 0 /* MDIO */
3 5 1 0 2 0 /* MDC */
- 0 d 2 0 1 0 /* RX_CLK (CLK9) */
- 3 18 2 0 1 0 /* TX_CLK (CLK10) */
+ 0 13 2 0 1 0 /* RX_CLK (CLK9) */
+ 3 24 2 0 1 0 /* TX_CLK (CLK10) */
1 0 1 0 1 0 /* TxD0 */
1 1 1 0 1 0 /* TxD1 */
1 2 1 0 1 0 /* TxD2 */
@@ -156,30 +158,30 @@
1 7 2 0 1 0 /* RxD3 */
1 8 2 0 1 0 /* RX_ER */
1 9 1 0 1 0 /* TX_ER */
- 1 a 2 0 1 0 /* RX_DV */
- 1 b 2 0 1 0 /* COL */
- 1 c 1 0 1 0 /* TX_EN */
- 1 d 2 0 1 0>;/* CRS */
+ 1 10 2 0 1 0 /* RX_DV */
+ 1 11 2 0 1 0 /* COL */
+ 1 12 1 0 1 0 /* TX_EN */
+ 1 13 2 0 1 0>; /* CRS */
};
pio4: ucc_pin@04 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
- 3 1f 2 0 1 0 /* RX_CLK (CLK7) */
+ 3 31 2 0 1 0 /* RX_CLK (CLK7) */
3 6 2 0 1 0 /* TX_CLK (CLK8) */
- 1 12 1 0 1 0 /* TxD0 */
- 1 13 1 0 1 0 /* TxD1 */
- 1 14 1 0 1 0 /* TxD2 */
- 1 15 1 0 1 0 /* TxD3 */
- 1 16 2 0 1 0 /* RxD0 */
- 1 17 2 0 1 0 /* RxD1 */
- 1 18 2 0 1 0 /* RxD2 */
- 1 19 2 0 1 0 /* RxD3 */
- 1 1a 2 0 1 0 /* RX_ER */
- 1 1b 1 0 1 0 /* TX_ER */
- 1 1c 2 0 1 0 /* RX_DV */
- 1 1d 2 0 1 0 /* COL */
- 1 1e 1 0 1 0 /* TX_EN */
- 1 1f 2 0 1 0>;/* CRS */
+ 1 18 1 0 1 0 /* TxD0 */
+ 1 19 1 0 1 0 /* TxD1 */
+ 1 20 1 0 1 0 /* TxD2 */
+ 1 21 1 0 1 0 /* TxD3 */
+ 1 22 2 0 1 0 /* RxD0 */
+ 1 23 2 0 1 0 /* RxD1 */
+ 1 24 2 0 1 0 /* RxD2 */
+ 1 25 2 0 1 0 /* RxD3 */
+ 1 26 2 0 1 0 /* RX_ER */
+ 1 27 1 0 1 0 /* TX_ER */
+ 1 28 2 0 1 0 /* RX_DV */
+ 1 29 2 0 1 0 /* COL */
+ 1 30 1 0 1 0 /* TX_EN */
+ 1 31 2 0 1 0>; /* CRS */
};
pio5: ucc_pin@05 {
pio-map = <
@@ -207,43 +209,45 @@
device_type = "qe";
compatible = "fsl,qe";
model = "QE";
- ranges = <0 e0100000 00100000>;
- reg = <e0100000 480>;
+ ranges = <0x0 0xe0100000 0x00100000>;
+ reg = <0xe0100000 0x480>;
brg-frequency = <0>;
- bus-frequency = <BCD3D80>;
+ bus-frequency = <198000000>;
muram@10000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
device_type = "muram";
- ranges = <0 00010000 00004000>;
+ ranges = <0x0 0x00010000 0x00004000>;
data-only@0 {
- reg = <0 4000>;
+ reg = <0x0 0x4000>;
};
};
spi@4c0 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <4c0 40>;
+ reg = <0x4c0 0x40>;
interrupts = <2>;
- interrupt-parent = < &qeic >;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
spi@500 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <500 40>;
+ reg = <0x500 0x40>;
interrupts = <1>;
- interrupt-parent = < &qeic >;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
usb@6c0 {
compatible = "qe_udc";
- reg = <6c0 40 8B00 100>;
- interrupts = <b>;
- interrupt-parent = < &qeic >;
+ reg = <0x6c0 0x40 0x8b00 0x100>;
+ interrupts = <11>;
+ interrupt-parent = <&qeic>;
mode = "slave";
};
@@ -253,14 +257,14 @@
model = "UCC";
cell-index = <3>;
device-id = <3>;
- reg = <2200 200>;
- interrupts = <22>;
- interrupt-parent = < &qeic >;
+ reg = <0x2200 0x200>;
+ interrupts = <34>;
+ interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "clk9";
tx-clock-name = "clk10";
- phy-handle = < &phy3 >;
- pio-handle = < &pio3 >;
+ phy-handle = <&phy3>;
+ pio-handle = <&pio3>;
};
enet1: ucc@3200 {
@@ -269,14 +273,14 @@
model = "UCC";
cell-index = <4>;
device-id = <4>;
- reg = <3200 200>;
- interrupts = <23>;
- interrupt-parent = < &qeic >;
+ reg = <0x3200 0x200>;
+ interrupts = <35>;
+ interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "clk7";
tx-clock-name = "clk8";
- phy-handle = < &phy4 >;
- pio-handle = < &pio4 >;
+ phy-handle = <&phy4>;
+ pio-handle = <&pio4>;
};
ucc@2400 {
@@ -302,19 +306,19 @@
mdio@2320 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <2320 18>;
+ reg = <0x2320 0x18>;
device_type = "mdio";
compatible = "ucc_geth_phy";
phy3: ethernet-phy@03 {
- interrupt-parent = < &ipic >;
- interrupts = <11 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
reg = <3>;
device_type = "ethernet-phy";
};
phy4: ethernet-phy@04 {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
reg = <4>;
device_type = "ethernet-phy";
};
@@ -325,69 +329,69 @@
device_type = "qeic";
#address-cells = <0>;
#interrupt-cells = <1>;
- reg = <80 80>;
+ reg = <0x80 0x80>;
big-endian;
- interrupts = <20 8 21 8>; //high:32 low:33
- interrupt-parent = < &ipic >;
+ interrupts = <32 0x8 33 0x8>; //high:32 low:33
+ interrupt-parent = <&ipic>;
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 AD17 */
- 8800 0 0 1 &ipic 14 8
- 8800 0 0 2 &ipic 15 8
- 8800 0 0 3 &ipic 16 8
- 8800 0 0 4 &ipic 17 8
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x12 AD18 */
- 9000 0 0 1 &ipic 16 8
- 9000 0 0 2 &ipic 17 8
- 9000 0 0 3 &ipic 14 8
- 9000 0 0 4 &ipic 15 8
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x13 AD19 */
- 9800 0 0 1 &ipic 17 8
- 9800 0 0 2 &ipic 14 8
- 9800 0 0 3 &ipic 15 8
- 9800 0 0 4 &ipic 16 8
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x15 AD21*/
- a800 0 0 1 &ipic 14 8
- a800 0 0 2 &ipic 15 8
- a800 0 0 3 &ipic 16 8
- a800 0 0 4 &ipic 17 8
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x16 AD22*/
- b000 0 0 1 &ipic 17 8
- b000 0 0 2 &ipic 14 8
- b000 0 0 3 &ipic 15 8
- b000 0 0 4 &ipic 16 8
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x17 AD23*/
- b800 0 0 1 &ipic 16 8
- b800 0 0 2 &ipic 17 8
- b800 0 0 3 &ipic 14 8
- b800 0 0 4 &ipic 15 8
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x18 AD24*/
- c000 0 0 1 &ipic 15 8
- c000 0 0 2 &ipic 16 8
- c000 0 0 3 &ipic 17 8
- c000 0 0 4 &ipic 14 8>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
- bus-range = <0 0>;
- ranges = <02000000 0 90000000 90000000 0 10000000
- 42000000 0 80000000 80000000 0 10000000
- 01000000 0 00000000 d0000000 0 00100000>;
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xd0000000 0x0 0x00100000>;
clock-frequency = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 6/9] mpc832x_rdb: Convert mpc832x_rdb to dts-v1 format.
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Convert the MPC832x RDB dts file to v1 format. Entries for
values normally parsed by humans are left in decimal (i.e. IRQ,
cache size, clock rates, basic counts and index values).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc832x_rdb.dts | 150 +++++++++++++++++----------------
1 files changed, 77 insertions(+), 73 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 10ff7aa..77adc18 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -9,6 +9,8 @@
* option) any later version.
*/
+/dts-v1/;
+
/ {
model = "MPC8323ERDB";
compatible = "MPC8323ERDB", "MPC832xRDB", "MPC83xxRDB";
@@ -30,10 +32,10 @@
PowerPC,8323@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <4000>; // L1, 16K
- i-cache-size = <4000>; // L1, 16K
+ d-cache-line-size = <0x20>; // 32 bytes
+ i-cache-line-size = <0x20>; // 32 bytes
+ d-cache-size = <16384>; // L1, 16K
+ i-cache-size = <16384>; // L1, 16K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
@@ -42,21 +44,21 @@
memory {
device_type = "memory";
- reg = <00000000 04000000>;
+ reg = <0x00000000 0x04000000>;
};
soc8323@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -64,8 +66,8 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
interrupt-parent = <&pic>;
dfsrr;
};
@@ -74,9 +76,9 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
+ interrupts = <9 0x8>;
interrupt-parent = <&pic>;
};
@@ -84,9 +86,9 @@
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <a 8>;
+ interrupts = <10 0x8>;
interrupt-parent = <&pic>;
};
@@ -94,26 +96,26 @@
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 7000>;
- interrupts = <b 8>;
+ reg = <0x30000 0x7000>;
+ interrupts = <11 0x8>;
interrupt-parent = <&pic>;
/* Rev. 2.2 */
num-channels = <1>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000004c>;
- descriptor-types-mask = <0122003f>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000004c>;
+ descriptor-types-mask = <0x0122003f>;
};
pic:pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
par_io@1400 {
- reg = <1400 100>;
+ reg = <0x1400 0x100>;
device_type = "par_io";
num-ports = <7>;
@@ -122,28 +124,28 @@
/* port pin dir open_drain assignment has_irq */
3 4 3 0 2 0 /* MDIO */
3 5 1 0 2 0 /* MDC */
- 3 15 2 0 1 0 /* RX_CLK (CLK16) */
- 3 17 2 0 1 0 /* TX_CLK (CLK3) */
- 0 12 1 0 1 0 /* TxD0 */
- 0 13 1 0 1 0 /* TxD1 */
- 0 14 1 0 1 0 /* TxD2 */
- 0 15 1 0 1 0 /* TxD3 */
- 0 16 2 0 1 0 /* RxD0 */
- 0 17 2 0 1 0 /* RxD1 */
- 0 18 2 0 1 0 /* RxD2 */
- 0 19 2 0 1 0 /* RxD3 */
- 0 1a 2 0 1 0 /* RX_ER */
- 0 1b 1 0 1 0 /* TX_ER */
- 0 1c 2 0 1 0 /* RX_DV */
- 0 1d 2 0 1 0 /* COL */
- 0 1e 1 0 1 0 /* TX_EN */
- 0 1f 2 0 1 0>; /* CRS */
+ 3 21 2 0 1 0 /* RX_CLK (CLK16) */
+ 3 23 2 0 1 0 /* TX_CLK (CLK3) */
+ 0 18 1 0 1 0 /* TxD0 */
+ 0 19 1 0 1 0 /* TxD1 */
+ 0 20 1 0 1 0 /* TxD2 */
+ 0 21 1 0 1 0 /* TxD3 */
+ 0 22 2 0 1 0 /* RxD0 */
+ 0 23 2 0 1 0 /* RxD1 */
+ 0 24 2 0 1 0 /* RxD2 */
+ 0 25 2 0 1 0 /* RxD3 */
+ 0 26 2 0 1 0 /* RX_ER */
+ 0 27 1 0 1 0 /* TX_ER */
+ 0 28 2 0 1 0 /* RX_DV */
+ 0 29 2 0 1 0 /* COL */
+ 0 30 1 0 1 0 /* TX_EN */
+ 0 31 2 0 1 0>; /* CRS */
};
ucc3pio:ucc_pin@03 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
- 0 d 2 0 1 0 /* RX_CLK (CLK9) */
- 3 18 2 0 1 0 /* TX_CLK (CLK10) */
+ 0 13 2 0 1 0 /* RX_CLK (CLK9) */
+ 3 24 2 0 1 0 /* TX_CLK (CLK10) */
1 0 1 0 1 0 /* TxD0 */
1 1 1 0 1 0 /* TxD1 */
1 2 1 0 1 0 /* TxD2 */
@@ -154,10 +156,10 @@
1 7 2 0 1 0 /* RxD3 */
1 8 2 0 1 0 /* RX_ER */
1 9 1 0 1 0 /* TX_ER */
- 1 a 2 0 1 0 /* RX_DV */
- 1 b 2 0 1 0 /* COL */
- 1 c 1 0 1 0 /* TX_EN */
- 1 d 2 0 1 0>; /* CRS */
+ 1 10 2 0 1 0 /* RX_DV */
+ 1 11 2 0 1 0 /* COL */
+ 1 12 1 0 1 0 /* TX_EN */
+ 1 13 2 0 1 0>; /* CRS */
};
};
};
@@ -167,24 +169,26 @@
#size-cells = <1>;
device_type = "qe";
model = "QE";
- ranges = <0 e0100000 00100000>;
- reg = <e0100000 480>;
+ ranges = <0x0 0xe0100000 0x00100000>;
+ reg = <0xe0100000 0x480>;
brg-frequency = <0>;
- bus-frequency = <BCD3D80>;
+ bus-frequency = <198000000>;
muram@10000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
device_type = "muram";
- ranges = <0 00010000 00004000>;
+ ranges = <0x0 0x00010000 0x00004000>;
data-only@0 {
- reg = <0 4000>;
+ reg = <0x0 0x4000>;
};
};
spi@4c0 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <4c0 40>;
+ reg = <0x4c0 0x40>;
interrupts = <2>;
interrupt-parent = <&qeic>;
mode = "cpu-qe";
@@ -193,7 +197,7 @@
spi@500 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <500 40>;
+ reg = <0x500 0x40>;
interrupts = <1>;
interrupt-parent = <&qeic>;
mode = "cpu";
@@ -205,8 +209,8 @@
model = "UCC";
cell-index = <2>;
device-id = <2>;
- reg = <3000 200>;
- interrupts = <21>;
+ reg = <0x3000 0x200>;
+ interrupts = <33>;
interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "clk16";
@@ -221,8 +225,8 @@
model = "UCC";
cell-index = <3>;
device-id = <3>;
- reg = <2200 200>;
- interrupts = <22>;
+ reg = <0x2200 0x200>;
+ interrupts = <34>;
interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "clk9";
@@ -234,7 +238,7 @@
mdio@3120 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <3120 18>;
+ reg = <0x3120 0x18>;
device_type = "mdio";
compatible = "ucc_geth_phy";
@@ -257,43 +261,43 @@
device_type = "qeic";
#address-cells = <0>;
#interrupt-cells = <1>;
- reg = <80 80>;
+ reg = <0x80 0x80>;
big-endian;
- interrupts = <20 8 21 8>; //high:32 low:33
+ interrupts = <32 0x8 33 0x8>; //high:32 low:33
interrupt-parent = <&pic>;
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x10 AD16 (USB) */
- 8000 0 0 1 &pic 11 8
+ 0x8000 0x0 0x0 0x1 &pic 17 0x8
/* IDSEL 0x11 AD17 (Mini1)*/
- 8800 0 0 1 &pic 12 8
- 8800 0 0 2 &pic 13 8
- 8800 0 0 3 &pic 14 8
- 8800 0 0 4 &pic 30 8
+ 0x8800 0x0 0x0 0x1 &pic 18 0x8
+ 0x8800 0x0 0x0 0x2 &pic 19 0x8
+ 0x8800 0x0 0x0 0x3 &pic 20 0x8
+ 0x8800 0x0 0x0 0x4 &pic 48 0x8
/* IDSEL 0x12 AD18 (PCI/Mini2) */
- 9000 0 0 1 &pic 13 8
- 9000 0 0 2 &pic 14 8
- 9000 0 0 3 &pic 30 8
- 9000 0 0 4 &pic 11 8>;
+ 0x9000 0x0 0x0 0x1 &pic 19 0x8
+ 0x9000 0x0 0x0 0x2 &pic 20 0x8
+ 0x9000 0x0 0x0 0x3 &pic 48 0x8
+ 0x9000 0x0 0x0 0x4 &pic 17 0x8>;
interrupt-parent = <&pic>;
- interrupts = <42 8>;
- bus-range = <0 0>;
- ranges = <42000000 0 80000000 80000000 0 10000000
- 02000000 0 90000000 90000000 0 10000000
- 01000000 0 d0000000 d0000000 0 04000000>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x01000000 0x0 0xd0000000 0xd0000000 0x0 0x04000000>;
clock-frequency = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 7/9] 8349mitx: Convert mpc8349e-mitx to dts-v1 format.
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Convert the MPC8349 MITX dts file to v1 format. Entries for
values normally parsed by humans are left in decimal (i.e. IRQ,
cache size, clock rates, basic counts and index values).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc8349emitx.dts | 153 ++++++++++++++++----------------
1 files changed, 78 insertions(+), 75 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 04b8da4..6467ae5 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -8,6 +8,9 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
+
+/dts-v1/;
+
/ {
model = "MPC8349EMITX";
compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
@@ -30,10 +33,10 @@
PowerPC,8349@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>;
- i-cache-line-size = <20>;
- d-cache-size = <8000>;
- i-cache-size = <8000>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -42,21 +45,21 @@
memory {
device_type = "memory";
- reg = <00000000 10000000>;
+ reg = <0x00000000 0x10000000>;
};
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>; // from bootloader
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -64,9 +67,9 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -75,39 +78,39 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
spi@7000 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <7000 1000>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
usb@22000 {
compatible = "fsl-usb2-mph";
- reg = <22000 1000>;
+ reg = <0x22000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <27 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <39 0x8>;
phy_type = "ulpi";
port1;
};
usb@23000 {
compatible = "fsl-usb2-dr";
- reg = <23000 1000>;
+ reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <26 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
dr_mode = "peripheral";
phy_type = "ulpi";
};
@@ -116,13 +119,13 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
- reg = <24520 20>;
+ reg = <0x24520 0x20>;
/* Vitesse 8201 */
phy1c: ethernet-phy@1c {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
- reg = <1c>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x1c>;
device_type = "ethernet-phy";
};
};
@@ -132,11 +135,11 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <24000 1000>;
+ reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <20 8 21 8 22 8>;
- interrupt-parent = < &ipic >;
- phy-handle = < &phy1c >;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy1c>;
linux,network-index = <0>;
};
@@ -145,12 +148,12 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <25000 1000>;
+ reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <23 8 24 8 25 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
+ interrupt-parent = <&ipic>;
/* Vitesse 7385 isn't on the MDIO bus */
- fixed-link = <1 1 d#1000 0 0>;
+ fixed-link = <1 1 1000 0 0>;
linux,network-index = <1>;
};
@@ -158,88 +161,88 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>; // from bootloader
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>; // from bootloader
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
- descriptor-types-mask = <01010ebf>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000007e>;
+ descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x10 - SATA */
- 8000 0 0 1 &ipic 16 8 /* SATA_INTA */
+ 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
- bus-range = <0 0>;
- ranges = <42000000 0 80000000 80000000 0 10000000
- 02000000 0 90000000 90000000 0 10000000
- 01000000 0 00000000 e2000000 0 01000000>;
- clock-frequency = <3f940aa>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
pci1: pci@e0008600 {
cell-index = <2>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0E - MiniPCI Slot */
- 7000 0 0 1 &ipic 15 8 /* PCI_INTA */
+ 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
/* IDSEL 0x0F - PCI Slot */
- 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
- 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
- >;
- interrupt-parent = < &ipic >;
- interrupts = <43 8>;
- bus-range = <0 0>;
- ranges = <42000000 0 a0000000 a0000000 0 10000000
- 02000000 0 b0000000 b0000000 0 10000000
- 01000000 0 00000000 e3000000 0 01000000>;
- clock-frequency = <3f940aa>;
+ 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
+ 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
+ >;
+ interrupt-parent = <&ipic>;
+ interrupts = <67 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008600 100>;
+ reg = <0xe0008600 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
@@ -249,15 +252,15 @@
#size-cells = <1>;
compatible = "fsl,mpc8349e-localbus",
"fsl,pq2pro-localbus";
- reg = <e0005000 d8>;
- ranges = <3 0 f0000000 210>;
+ reg = <0xe0005000 0xd8>;
+ ranges = <0x3 0x0 0xf0000000 0x210>;
pata@3,0 {
compatible = "fsl,mpc8349emitx-pata", "ata-generic";
- reg = <3 0 10 3 20c 4>;
+ reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
reg-shift = <1>;
pio-mode = <6>;
- interrupts = <17 8>;
+ interrupts = <23 0x8>;
interrupt-parent = <&ipic>;
};
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 8/9] 8349mitxgp: Convert mpc8349e MITX GP to dts-v1 format.
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Convert the MPC8349 MITX GP dts file to v1 format. Entries for
values normally parsed by humans are left in decimal (i.e. IRQ,
cache size, clock rates, basic counts and index values).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc8349emitxgp.dts | 107 +++++++++++++++--------------
1 files changed, 55 insertions(+), 52 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index a06ff92..c453ebe 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -8,6 +8,9 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
+
+/dts-v1/;
+
/ {
model = "MPC8349EMITXGP";
compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
@@ -28,10 +31,10 @@
PowerPC,8349@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>;
- i-cache-line-size = <20>;
- d-cache-size = <8000>;
- i-cache-size = <8000>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -40,21 +43,21 @@
memory {
device_type = "memory";
- reg = <00000000 10000000>;
+ reg = <0x00000000 0x10000000>;
};
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>; // from bootloader
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -62,9 +65,9 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -73,28 +76,28 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
spi@7000 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <7000 1000>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
usb@23000 {
compatible = "fsl-usb2-dr";
- reg = <23000 1000>;
+ reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <26 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@@ -103,13 +106,13 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
- reg = <24520 20>;
+ reg = <0x24520 0x20>;
/* Vitesse 8201 */
phy1c: ethernet-phy@1c {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
- reg = <1c>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x1c>;
device_type = "ethernet-phy";
};
};
@@ -119,11 +122,11 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <24000 1000>;
+ reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <20 8 21 8 22 8>;
- interrupt-parent = < &ipic >;
- phy-handle = < &phy1c >;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy1c>;
linux,network-index = <0>;
};
@@ -131,63 +134,63 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>; // from bootloader
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>; // from bootloader
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
- descriptor-types-mask = <01010ebf>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000007e>;
+ descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
};
pci0: pci@e0008600 {
cell-index = <2>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0F - PCI Slot */
- 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
- 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
+ 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
+ 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
>;
- interrupt-parent = < &ipic >;
- interrupts = <43 8>;
- bus-range = <1 1>;
- ranges = <42000000 0 a0000000 a0000000 0 10000000
- 02000000 0 b0000000 b0000000 0 10000000
- 01000000 0 00000000 e3000000 0 01000000>;
- clock-frequency = <3f940aa>;
+ interrupt-parent = <&ipic>;
+ interrupts = <67 0x8>;
+ bus-range = <0x1 0x1>;
+ ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008600 100>;
+ reg = <0xe0008600 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* [PATCH 9/9] 8313rdb: Convert mpc8313 RDB to dts-v1 format.
From: Paul Gortmaker @ 2008-01-28 7:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <a050480a21aef92854805e9bee517c0d65d5bd59.1201503958.git.paul.gortmaker@windriver.com>
Convert the MPC8313 RDB dts file to v1 format. Entries for
values normally parsed by humans are left in decimal (i.e. IRQ,
cache size, clock rates, basic counts and index values).
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc8313erdb.dts | 126 +++++++++++++++++----------------
1 files changed, 64 insertions(+), 62 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 9bcf2c9..38c9548 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -9,6 +9,8 @@
* option) any later version.
*/
+/dts-v1/;
+
/ {
model = "MPC8313ERDB";
compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
@@ -30,10 +32,10 @@
PowerPC,8313@0 {
device_type = "cpu";
reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <4000>; // L1, 16K
- i-cache-size = <4000>; // L1, 16K
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <16384>; // L1, 16K
+ i-cache-size = <16384>; // L1, 16K
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -42,30 +44,30 @@
memory {
device_type = "memory";
- reg = <00000000 08000000>; // 128MB at 0
+ reg = <0x00000000 0x08000000>; // 128MB at 0
};
localbus@e0005000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
- reg = <e0005000 1000>;
- interrupts = <d#77 8>;
+ reg = <0xe0005000 0x1000>;
+ interrupts = <77 0x8>;
interrupt-parent = <&ipic>;
// CS0 and CS1 are swapped when
// booting from nand, but the
// addresses are the same.
- ranges = <0 0 fe000000 00800000
- 1 0 e2800000 00008000
- 2 0 f0000000 00020000
- 3 0 fa000000 00008000>;
+ ranges = <0x0 0x0 0xfe000000 0x00800000
+ 0x1 0x0 0xe2800000 0x00008000
+ 0x2 0x0 0xf0000000 0x00020000
+ 0x3 0x0 0xfa000000 0x00008000>;
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
- reg = <0 0 800000>;
+ reg = <0x0 0x0 0x800000>;
bank-width = <2>;
device-width = <1>;
};
@@ -75,19 +77,19 @@
#size-cells = <1>;
compatible = "fsl,mpc8313-fcm-nand",
"fsl,elbc-fcm-nand";
- reg = <1 0 2000>;
+ reg = <0x1 0x0 0x2000>;
u-boot@0 {
- reg = <0 100000>;
+ reg = <0x0 0x100000>;
read-only;
};
kernel@100000 {
- reg = <100000 300000>;
+ reg = <0x100000 0x300000>;
};
fs@400000 {
- reg = <400000 1c00000>;
+ reg = <0x400000 0x1c00000>;
};
};
};
@@ -97,14 +99,14 @@
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -112,8 +114,8 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
interrupt-parent = < &ipic >;
dfsrr;
};
@@ -123,8 +125,8 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
interrupt-parent = < &ipic >;
dfsrr;
};
@@ -132,8 +134,8 @@
spi@7000 {
device_type = "spi";
compatible = "fsl_spi";
- reg = <7000 1000>;
- interrupts = <10 8>;
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
interrupt-parent = < &ipic >;
mode = "cpu";
};
@@ -141,11 +143,11 @@
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
compatible = "fsl-usb2-dr";
- reg = <23000 1000>;
+ reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = < &ipic >;
- interrupts = <26 8>;
+ interrupts = <38 0x8>;
phy_type = "utmi_wide";
};
@@ -153,17 +155,17 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
- reg = <24520 20>;
+ reg = <0x24520 0x20>;
phy1: ethernet-phy@1 {
interrupt-parent = < &ipic >;
- interrupts = <13 8>;
- reg = <1>;
+ interrupts = <19 0x8>;
+ reg = <0x1>;
device_type = "ethernet-phy";
};
phy4: ethernet-phy@4 {
interrupt-parent = < &ipic >;
- interrupts = <14 8>;
- reg = <4>;
+ interrupts = <20 0x8>;
+ reg = <0x4>;
device_type = "ethernet-phy";
};
};
@@ -173,9 +175,9 @@
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
- reg = <24000 1000>;
+ reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <25 8 24 8 23 8>;
+ interrupts = <37 0x8 36 0x8 35 0x8>;
interrupt-parent = < &ipic >;
phy-handle = < &phy1 >;
};
@@ -185,9 +187,9 @@
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
- reg = <25000 1000>;
+ reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <22 8 21 8 20 8>;
+ interrupts = <34 0x8 33 0x8 32 0x8>;
interrupt-parent = < &ipic >;
phy-handle = < &phy4 >;
};
@@ -196,9 +198,9 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
+ interrupts = <9 0x8>;
interrupt-parent = < &ipic >;
};
@@ -206,9 +208,9 @@
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <a 8>;
+ interrupts = <10 0x8>;
interrupt-parent = < &ipic >;
};
@@ -216,14 +218,14 @@
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 7000>;
- interrupts = <b 8>;
+ reg = <0x30000 0x7000>;
+ interrupts = <11 0x8>;
interrupt-parent = < &ipic >;
/* Rev. 2.2 */
num-channels = <1>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000004c>;
- descriptor-types-mask = <0122003f>;
+ channel-fifo-len = <0x18>;
+ exec-units-mask = <0x0000004c>;
+ descriptor-types-mask = <0x0122003f>;
};
/* IPIC
@@ -236,38 +238,38 @@
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0E -mini PCI */
- 7000 0 0 1 &ipic 12 8
- 7000 0 0 2 &ipic 12 8
- 7000 0 0 3 &ipic 12 8
- 7000 0 0 4 &ipic 12 8
+ 0x7000 0x0 0x0 0x1 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x2 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x3 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x4 &ipic 18 0x8
/* IDSEL 0x0F - PCI slot */
- 7800 0 0 1 &ipic 11 8
- 7800 0 0 2 &ipic 12 8
- 7800 0 0 3 &ipic 11 8
- 7800 0 0 4 &ipic 12 8>;
+ 0x7800 0x0 0x0 0x1 &ipic 17 0x8
+ 0x7800 0x0 0x0 0x2 &ipic 18 0x8
+ 0x7800 0x0 0x0 0x3 &ipic 17 0x8
+ 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
interrupt-parent = < &ipic >;
- interrupts = <42 8>;
- bus-range = <0 0>;
- ranges = <02000000 0 90000000 90000000 0 10000000
- 42000000 0 80000000 80000000 0 10000000
- 01000000 0 00000000 e2000000 0 00100000>;
- clock-frequency = <3f940aa>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Michel Dänzer @ 2008-01-28 8:16 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev, Ingo Molnar, vatsa, Peter Zijlstra
In-Reply-To: <1201494324.6815.171.camel@pasglop>
On Mon, 2008-01-28 at 15:25 +1100, Benjamin Herrenschmidt wrote:
> On Sun, 2008-01-27 at 17:13 +0100, Michel Dänzer wrote:
> >
> > > Do you see behavior change (from good->bad) immediately after
> > applying that patch
> > > during your bisect process?
> >
> > Yes, confirmed by trying that commit and its parent again.
>
> Just to be paranoid... can you try with a different gcc version in case
> something gets miscompiled ?
Is that really necessary - after all,
810e95ccd58d91369191aa4ecc9e6d4a10d8d0c8 is related to process wakeup
behaviour?
--
Earthling Michel Dänzer | http://tungstengraphics.com
Libre software enthusiast | Debian, X and DRI developer
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Peter Zijlstra @ 2008-01-28 8:50 UTC (permalink / raw)
To: Michel Dänzer; +Cc: Ingo Molnar, vatsa, linuxppc-dev
In-Reply-To: <1201450409.1931.23.camel@thor.sulgenrain.local>
On Sun, 2008-01-27 at 17:13 +0100, Michel Dänzer wrote:
> In summary, there are two separate problems with similar symptoms, which
> had me confused at times:
>
> * With CONFIG_FAIR_USER_SCHED disabled, there are severe
> interactivity hickups with a niced CPU hog and top running. This
> started with commit 810e95ccd58d91369191aa4ecc9e6d4a10d8d0c8.
The revert at the bottom causes the wakeup granularity to shrink for +
nice and to grow for - nice. That is, it becomes easier to preempt a +
nice task, and harder to preempt a - nice task.
I think we originally had that; didn't comment it, forgot the reason
changed it because the units didn't match. Another reason might have
been the more difficult preemption of - nice tasks. That might - niced
tasks to cause horrible latencies - Ingo, any recollection?
Are you perhaps running with a very low HZ (HZ=100)? (If wakeup
preemption fails, tick preemption will take over).
Also, could you try lowering:
/proc/sys/kernel/sched_wakeup_granularity_ns
> * With CONFIG_FAIR_USER_SCHED enabled, X becomes basically
> unusable with a niced CPU hog, with or without top running. I
> don't know when this started, possibly when this option was
> first introduced.
Srivatsa found an issue that might explain the very bad behaviour under
group scheduling. But I gather you're not at all interested in this
feature?
> FWIW, the patch below (which reverts commit
> 810e95ccd58d91369191aa4ecc9e6d4a10d8d0c8) restores 2.6.24 interactivity
> to the same level as 2.6.23 here with CONFIG_FAIR_USER_SCHED disabled
> (my previous report to the contrary was with CONFIG_FAIR_USER_SCHED
> enabled because I didn't yet realize the difference it makes), but I
> don't know if that's the real fix.
>
>
> diff --git a/kernel/sched_fair.c b/kernel/sched_fair.c
> index da7c061..a7cc22a 100644
> --- a/kernel/sched_fair.c
> +++ b/kernel/sched_fair.c
> @@ -843,7 +843,6 @@ static void check_preempt_wakeup(struct rq *rq, struct task_struct *p)
> struct task_struct *curr = rq->curr;
> struct cfs_rq *cfs_rq = task_cfs_rq(curr);
> struct sched_entity *se = &curr->se, *pse = &p->se;
> - unsigned long gran;
>
> if (unlikely(rt_prio(p->prio))) {
> update_rq_clock(rq);
> @@ -866,11 +865,8 @@ static void check_preempt_wakeup(struct rq *rq, struct task_struct *p)
> pse = parent_entity(pse);
> }
>
> - gran = sysctl_sched_wakeup_granularity;
> - if (unlikely(se->load.weight != NICE_0_LOAD))
> - gran = calc_delta_fair(gran, &se->load);
>
> - if (pse->vruntime + gran < se->vruntime)
> + if (pse->vruntime + sysctl_sched_wakeup_granularity < se->vruntime)
> resched_task(curr);
> }
^ permalink raw reply
* RE: MPC5200B SPI codec error when there is a heavy ethernet
From: TXEMA LOPEZ @ 2008-01-28 8:37 UTC (permalink / raw)
To: linuxppc-embedded
Hi all,=20
The engineers of Freescale have recognized a problem in the PSC SPI =
Slave Select signal when there is a heavy ethernet loading. Textually =
they say:
" I have tested the MPC5200B FEC and PSC6 SPI.=20
You are right. If there is heavy Ethernet loading, the PSC SPI can stop =
during transmission with SS goes high.
Use a general-purpose output as SPI slave select signal instead PSC SPI =
SS signal.
Factory is informed about similar incorrect behaviour of the PSC SPI =
slave select."
We have repeated the error in three scenarios:
In our MPC5200B custom board with a Denx 2.4.25 kernel.
In a Lite5200B with a Denx 2.4.25 kernel.
In a Lite5200B with the freescale bsp: =
mpc5200_lite5200b_20070203_ltib-rc4. It's a 2.6.16 kernel version.
We have checked the PSC3 and PSC6 and the behaviour is the same.
So, it seems is a chip's bug and we must avoid to use the SS signal with =
the PSC SPI if we want to communicate by ethernet. I think it's a =
probabilistic error and in case there is some traffic in ethernet and a =
transmission by SPI at the same time it could happen.
Best regards,
Txema L=F3pez.
=09
=09
=09
^ permalink raw reply
* Re: Reminder: removal of arch/ppc
From: Matthias Fuchs @ 2008-01-28 9:10 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: linuxppc-dev list
In-Reply-To: <20080125192150.4cde6fac@zod.rchland.ibm.com>
On Saturday 26 January 2008 02:21, Josh Boyer wrote:
> > 4xx:
> > BAMBOO
>
> Ported (mostly)
>
> > CPCI405
>
> Doubt this will be ported.
Of course this will be ported! I will do that in th next weeks.
Matthias
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Michel Dänzer @ 2008-01-28 9:14 UTC (permalink / raw)
To: Peter Zijlstra; +Cc: Ingo Molnar, vatsa, linuxppc-dev
In-Reply-To: <1201510236.6149.24.camel@lappy>
On Mon, 2008-01-28 at 09:50 +0100, Peter Zijlstra wrote:
> On Sun, 2008-01-27 at 17:13 +0100, Michel Dänzer wrote:
>
> > In summary, there are two separate problems with similar symptoms, which
> > had me confused at times:
> >
> > * With CONFIG_FAIR_USER_SCHED disabled, there are severe
> > interactivity hickups with a niced CPU hog and top running. This
> > started with commit 810e95ccd58d91369191aa4ecc9e6d4a10d8d0c8.
>
> The revert at the bottom causes the wakeup granularity to shrink for +
> nice and to grow for - nice. That is, it becomes easier to preempt a +
> nice task, and harder to preempt a - nice task.
Yeah, that matches my observations. :)
> I think we originally had that; didn't comment it, forgot the reason
> changed it because the units didn't match. Another reason might have
> been the more difficult preemption of - nice tasks. That might - niced
> tasks to cause horrible latencies - Ingo, any recollection?
>
> Are you perhaps running with a very low HZ (HZ=100)? (If wakeup
> preemption fails, tick preemption will take over).
I haven't had it below 250 since that became an option, and I'm
currently at 1000 (and NO_HZ, but disabling that didn't seem to make a
difference).
> Also, could you try lowering:
> /proc/sys/kernel/sched_wakeup_granularity_ns
Will try.
> > * With CONFIG_FAIR_USER_SCHED enabled, X becomes basically
> > unusable with a niced CPU hog, with or without top running. I
> > don't know when this started, possibly when this option was
> > first introduced.
>
> Srivatsa found an issue that might explain the very bad behaviour under
> group scheduling. But I gather you're not at all interested in this
> feature?
That's right, but it's good to hear you have a lead there as well, and
if you can't find any interested testers, let me know and I'll try.
--
Earthling Michel Dänzer | http://tungstengraphics.com
Libre software enthusiast | Debian, X and DRI developer
^ permalink raw reply
* Re: MPC5200B SPI codec error when there is a heavy ethernet
From: Juergen Beisert @ 2008-01-28 9:33 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <918EB199DDDFFA42BEA2EB3A1C6021F3020BEB4D@CORREO>
On Monday 28 January 2008 09:37, TXEMA LOPEZ wrote:
> The engineers of Freescale have recognized a problem in the PSC SPI Slave
> Select signal when there is a heavy ethernet loading. Textually they say:
>
> " I have tested the MPC5200B FEC and PSC6 SPI.
> You are right. If there is heavy Ethernet loading, the PSC SPI can stop
> during transmission with SS goes high. Use a general-purpose output as SPI
> slave select signal instead PSC SPI SS signal. Factory is informed about
> similar incorrect behaviour of the PSC SPI slave select."
>
> We have repeated the error in three scenarios:
> In our MPC5200B custom board with a Denx 2.4.25 kernel.
> In a Lite5200B with a Denx 2.4.25 kernel.
> In a Lite5200B with the freescale bsp:
> mpc5200_lite5200b_20070203_ltib-rc4. It's a 2.6.16 kernel version.
>
> We have checked the PSC3 and PSC6 and the behaviour is the same.
>
> So, it seems is a chip's bug and we must avoid to use the SS signal with
> the PSC SPI if we want to communicate by ethernet. I think it's a
> probabilistic error and in case there is some traffic in ethernet and a
> transmission by SPI at the same time it could happen.
There seems also another bug: If the PSC based SPI unit runs as SPI slave, =
and=20
some data in the send FIFO waits for transmission, the MISO line is active=
=20
even if SS input is high and blocks the bus. It does not happen, of the sen=
d=20
=46IFO is empty.
JB
=2D-=20
Dipl.-Ing. Juergen Beisert | http://www.pengutronix.de
=A0Pengutronix - Linux Solutions for Science and Industry
=A0 Handelsregister: Amtsgericht Hildesheim, HRA 2686
=A0 =A0 =A0 Vertretung Sued/Muenchen, Germany
Phone: +49-8766-939 228 | Fax: +49-5121-206917-9
^ permalink raw reply
* Re: [PATCH] Fake NUMA emulation for PowerPC (Take 2)
From: Balbir Singh @ 2008-01-28 9:41 UTC (permalink / raw)
To: Nish Aravamudan; +Cc: Mel Gorman, linuxppc-dev, Paul Mackerras, LKML
In-Reply-To: <29495f1d0801271222l3f52935fq40df4dcb82e60976@mail.gmail.com>
* Nish Aravamudan <nish.aravamudan@gmail.com> [2008-01-27 12:22:54]:
> On 1/27/08, Balbir Singh <balbir@linux.vnet.ibm.com> wrote:
> > * Paul Mackerras <paulus@samba.org> [2008-01-27 22:55:43]:
> >
> > > Balbir Singh writes:
> > >
> > > > Here's a better and more complete fix for the problem. Could you
> > > > please see if it works for you? I tested it on a real NUMA box and it
> > > > seemed to work fine there.
> > >
> > > There are a couple of other changes in behaviour that your patch
> > > introduces, and I'd like to understand them better before taking the
> > > patch. First, with your patch we don't set nodes online if they end
> > > up having no memory in them because of the memory limit, whereas
> > > previously we did. Secondly, in the case where we don't have NUMA
> > > information, we now set node 0 online after adding each LMB, whereas
> > > previously we only set it online once.
> > >
> > > If in fact these changes are benign, then your patch description
> > > should mention them and explain why they are benign.
> > >
> >
> > Yes, they are. I'll try and justify the changes with a good detailed
> > changelog. If people prefer it, I can hide fake NUMA nodes under a
> > config option, so that it does not come enabled by default.
>
> Sigh, there already *is* a fake NUMA config option: CONFIG_NUMA_EMU.
>
> "CONFIG_NUMA_EMU:
> Enable NUMA emulation. A flat machine will be split
> into virtual nodes when booted with "numa=fake=N", where N is the
> number of nodes. This is only useful for debugging."
>
> I have to assume your patch is implementing the same feature for
> powerpc (really just extending the x86_64 one), and thus should share
> the config option.
>
> Any chance you can just make some of that code common? Maybe as a
> follow-on patch. I expect that some of Mel's (added to Cc) work to
> allow NUMA to be set on x86 more easily will flow quite simply into
> adding fake NUMA support there as well. So moving the code to a common
> place (at least the parsing) makes sense.
>
That's the long term plan and we discussed using common code in the
discussion thread for fake NUMA (for PowerPC). We'll get there in
steps. My patch is the basic initial, simple method for implementing
fake NUMA nodes.
> I also feel like you want to be able to online memoryless nodes --
> that's where we've been hitting a number of bugs lately in the VM. I
> can't tell from Paul's comment if your patch prevents that from being
> faked or not.
>
My patch prevents nodes from being enabled if we cross the memory
limit. Earlier they were being enabled.
> Thanks,
> Nish
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
--
Warm Regards,
Balbir Singh
Linux Technology Center
IBM, ISTL
^ permalink raw reply
* [PATCH 1/1][PPC] replace logical- by bit-and in pci_process_ISA_OF_ranges(), arch/powerpc/kernel/isa-bridge.c
From: Roel Kluin @ 2008-01-28 10:06 UTC (permalink / raw)
To: jwboyer; +Cc: linuxppc-dev
in arch/powerpc/kernel/isa-bridge.c:
41:#define ISA_SPACE_MASK 0x1
42:#define ISA_SPACE_IO 0x1
...
54: struct isa_address {
55: u32 a_hi;
...
65: const struct isa_range *range;
83: if ((range->isa_addr.a_hi && ISA_SPACE_MASK) != ISA_SPACE_IO) {
...
89: if ((range->isa_addr.a_hi && ISA_SPACE_MASK) != ISA_SPACE_IO)
shouldn't these be a single &?
then consider the untested patch below.
--
replace logical "&&" by bit "&" for ISA_SPACE_MASK
Signed-off-by: Roel Kluin <12o3l@tiscali.nl>
---
diff --git a/arch/powerpc/kernel/isa-bridge.c b/arch/powerpc/kernel/isa-bridge.c
index f0f49d1..406a9e6 100644
--- a/arch/powerpc/kernel/isa-bridge.c
+++ b/arch/powerpc/kernel/isa-bridge.c
@@ -80,13 +80,13 @@ static void __devinit pci_process_ISA_OF_ranges(struct device_node *isa_node,
* (size depending on dev->n_addr_cells)
* cell 5: the size of the range
*/
- if ((range->isa_addr.a_hi && ISA_SPACE_MASK) != ISA_SPACE_IO) {
+ if ((range->isa_addr.a_hi & ISA_SPACE_MASK) != ISA_SPACE_IO) {
range++;
rlen -= sizeof(struct isa_range);
if (rlen < sizeof(struct isa_range))
goto inval_range;
}
- if ((range->isa_addr.a_hi && ISA_SPACE_MASK) != ISA_SPACE_IO)
+ if ((range->isa_addr.a_hi & ISA_SPACE_MASK) != ISA_SPACE_IO)
goto inval_range;
isa_addr = range->isa_addr.a_lo;
^ permalink raw reply related
* Re: [Cbe-oss-dev] [PATCH 3/3] Cell IOMMU static mapping support
From: Arnd Bergmann @ 2008-01-28 11:41 UTC (permalink / raw)
To: cbe-oss-dev; +Cc: Olof Johansson, linuxppc-dev
In-Reply-To: <20080126025117.GA28066@lixom.net>
On Saturday 26 January 2008, Olof Johansson wrote:
> >
> > So instead of having an IOMMU window that we use to temporarily map things
> > in and out of DMA'able space, at boot we create a 1:1 mapping for all of
> > memory. This obviously only works for devices that can do 64-bit DMA.
>
> I don't get it. Why not disable the iommu instead?
>
When you disable the iommu, the 32-bit devices stop working because
they can no longer access all of main memory.
The 1:1 mapping is in addition to the DMA window used for those devices,
not in place of it.
Arnd <><
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Srivatsa Vaddagiri @ 2008-01-28 12:11 UTC (permalink / raw)
To: Michel.=?iso-8859-1?Q?D=E4nzer_=3Cmichel=40tungstengraphics=2Ecom=3E?=
Cc: Ingo Molnar, Peter Zijlstra, linuxppc-dev
In-Reply-To: <1201511673.5923.46.camel@thor.sulgenrain.local>
On Mon, Jan 28, 2008 at 10:14:33AM +0100, Michel Dänzer wrote:
> > > * With CONFIG_FAIR_USER_SCHED enabled, X becomes basically
> > > unusable with a niced CPU hog, with or without top running. I
> > > don't know when this started, possibly when this option was
> > > first introduced.
> >
> > Srivatsa found an issue that might explain the very bad behaviour under
> > group scheduling. But I gather you're not at all interested in this
> > feature?
>
> That's right, but it's good to hear you have a lead there as well, and
> if you can't find any interested testers, let me know and I'll try.
Michel,
Thanks for offering to test! The issue I found wrt preemption latency
(when FAIR_USER_SCHED is turned on) is explained here:
http://marc.info/?l=linux-kernel&m=120148675326287
Does the patch in that URL help bring FAIR_USER_SCHED interactivity to the same
level as !FAIR_USER_SCHED?
--
Regards,
vatsa
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Ingo Molnar @ 2008-01-28 12:32 UTC (permalink / raw)
To: Peter Zijlstra; +Cc: linuxppc-dev, Michel Dänzer, vatsa
In-Reply-To: <1201510236.6149.24.camel@lappy>
* Peter Zijlstra <a.p.zijlstra@chello.nl> wrote:
> > * With CONFIG_FAIR_USER_SCHED disabled, there are severe
> > interactivity hickups with a niced CPU hog and top running. This
> > started with commit 810e95ccd58d91369191aa4ecc9e6d4a10d8d0c8.
>
> The revert at the bottom causes the wakeup granularity to shrink for +
> nice and to grow for - nice. That is, it becomes easier to preempt a +
> nice task, and harder to preempt a - nice task.
i think it would be OK to do half of this: make it easier to preempt a
+nice task. Michel, do you really need the -nice portion as well? It's
not a problem to super-preempt positively reniced tasks, but it can be
quite annoying if negatively reniced tasks have super-slices.
Ingo
^ permalink raw reply
* [PATCH powerpc] Fake NUMA emulation for PowerPC (Take 3)
From: Balbir Singh @ 2008-01-28 12:52 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, LKML
In-Reply-To: <18332.28991.658933.763115@cargo.ozlabs.ibm.com>
* Paul Mackerras <paulus@samba.org> [2008-01-27 22:55:43]:
> Balbir Singh writes:
>
> > Here's a better and more complete fix for the problem. Could you
> > please see if it works for you? I tested it on a real NUMA box and it
> > seemed to work fine there.
>
> There are a couple of other changes in behaviour that your patch
> introduces, and I'd like to understand them better before taking the
> patch. First, with your patch we don't set nodes online if they end
> up having no memory in them because of the memory limit, whereas
> previously we did. Secondly, in the case where we don't have NUMA
> information, we now set node 0 online after adding each LMB, whereas
> previously we only set it online once.
>
> If in fact these changes are benign, then your patch description
> should mention them and explain why they are benign.
>
> Paul.
>
Hi, Paul,
Here's version 3 of the patch. I've commented the side-effect of
repeatedly setting node 0 online (as to why that is done) and I've
removed the side effect of not creating memory less nodes
(when we hit the memory limit).
I've described all my tests below
Changelog v3
1. Remove the side-effect of not setting nodes online if they end
up having no memory in them because of the memory limit.
Changelog v2
1. Get rid of the constant 5 (based on comments from
Geert.Uytterhoeven@sonycom.com)
2. Implement suggestions from Olof Johannson
3. Check if cmdline is NULL in fake_numa_create_new_node()
Here's a dumb simple implementation of fake NUMA nodes for PowerPC. Fake
NUMA nodes can be specified using the following command line option
numa=fake=<node range>
node range is of the format <range1>,<range2>,...<rangeN>
Each of the rangeX parameters is passed using memparse(). I find the patch
useful for fake NUMA emulation on my simple PowerPC machine. I've tested it
on a numa box with the following arguments
numa=fake=512M
numa=fake=512M,768M
numa=fake=256M,512M mem=512M
numa=fake=1G mem=768M
numa=fake=
without any numa= argument
The other side-effect introduced by this patch is that; in the case where we
don't have NUMA information, we now set a node online after adding each LMB.
This node could very well be node 0, but in the case that we enable fake
NUMA nodes, when we cross node boundaries, we need to set the new node online.
Signed-off-by: Balbir Singh <balbir@linux.vnet.ibm.com>
---
arch/powerpc/mm/numa.c | 60 ++++++++++++++++++++++++++++++++++++++++++++++---
1 file changed, 57 insertions(+), 3 deletions(-)
diff -puN arch/powerpc/mm/numa.c~fakenumappc arch/powerpc/mm/numa.c
--- linux-2.6.24-rc8/arch/powerpc/mm/numa.c~fakenumappc 2008-01-28 17:05:34.000000000 +0530
+++ linux-2.6.24-rc8-balbir/arch/powerpc/mm/numa.c 2008-01-28 18:15:41.000000000 +0530
@@ -24,6 +24,8 @@
static int numa_enabled = 1;
+static char *cmdline __initdata;
+
static int numa_debug;
#define dbg(args...) if (numa_debug) { printk(KERN_INFO args); }
@@ -39,6 +41,47 @@ static bootmem_data_t __initdata plat_no
static int min_common_depth;
static int n_mem_addr_cells, n_mem_size_cells;
+static int __cpuinit fake_numa_create_new_node(unsigned long end_pfn,
+ unsigned int *nid)
+{
+ unsigned long long mem;
+ char *p = cmdline;
+ static unsigned int fake_nid;
+ static unsigned long long curr_boundary;
+
+ /*
+ * Modify node id, iff we started creating NUMA nodes
+ */
+ if (fake_nid)
+ *nid = fake_nid;
+ if (!p)
+ return 0;
+
+ mem = memparse(p, &p);
+ if (!mem)
+ return 0;
+
+ if (mem < curr_boundary)
+ return 0;
+
+ curr_boundary = mem;
+
+ if ((end_pfn << PAGE_SHIFT) > mem) {
+ /*
+ * Skip commas and spaces
+ */
+ while (*p == ',' || *p == ' ' || *p == '\t')
+ p++;
+
+ cmdline = p;
+ fake_nid++;
+ *nid = fake_nid;
+ dbg("created new fake_node with id %d\n", fake_nid);
+ return 1;
+ }
+ return 0;
+}
+
static void __cpuinit map_cpu_to_node(int cpu, int node)
{
numa_cpu_lookup_table[cpu] = node;
@@ -344,6 +387,9 @@ static void __init parse_drconf_memory(s
if (nid == 0xffff || nid >= MAX_NUMNODES)
nid = default_nid;
}
+
+ fake_numa_create_new_node(((start + lmb_size) >> PAGE_SHIFT),
+ &nid);
node_set_online(nid);
size = numa_enforce_memory_limit(start, lmb_size);
@@ -429,6 +475,8 @@ new_range:
nid = of_node_to_nid_single(memory);
if (nid < 0)
nid = default_nid;
+
+ fake_numa_create_new_node(((start + size) >> PAGE_SHIFT), &nid);
node_set_online(nid);
if (!(size = numa_enforce_memory_limit(start, size))) {
@@ -461,7 +509,7 @@ static void __init setup_nonnuma(void)
unsigned long top_of_ram = lmb_end_of_DRAM();
unsigned long total_ram = lmb_phys_mem_size();
unsigned long start_pfn, end_pfn;
- unsigned int i;
+ unsigned int i, nid = 0;
printk(KERN_DEBUG "Top of RAM: 0x%lx, Total RAM: 0x%lx\n",
top_of_ram, total_ram);
@@ -471,9 +519,11 @@ static void __init setup_nonnuma(void)
for (i = 0; i < lmb.memory.cnt; ++i) {
start_pfn = lmb.memory.region[i].base >> PAGE_SHIFT;
end_pfn = start_pfn + lmb_size_pages(&lmb.memory, i);
- add_active_range(0, start_pfn, end_pfn);
+
+ fake_numa_create_new_node(end_pfn, &nid);
+ add_active_range(nid, start_pfn, end_pfn);
+ node_set_online(nid);
}
- node_set_online(0);
}
void __init dump_numa_cpu_topology(void)
@@ -702,6 +752,10 @@ static int __init early_numa(char *p)
if (strstr(p, "debug"))
numa_debug = 1;
+ p = strstr(p, "fake=");
+ if (p)
+ cmdline = p + strlen("fake=");
+
return 0;
}
early_param("numa", early_numa);
_
--
Warm Regards,
Balbir Singh
Linux Technology Center
IBM, ISTL
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Peter Zijlstra @ 2008-01-28 12:53 UTC (permalink / raw)
To: Ingo Molnar; +Cc: linuxppc-dev, Michel Dänzer, vatsa
In-Reply-To: <20080128123253.GA32496@elte.hu>
On Mon, 2008-01-28 at 13:32 +0100, Ingo Molnar wrote:
> * Peter Zijlstra <a.p.zijlstra@chello.nl> wrote:
>
> > > * With CONFIG_FAIR_USER_SCHED disabled, there are severe
> > > interactivity hickups with a niced CPU hog and top running. This
> > > started with commit 810e95ccd58d91369191aa4ecc9e6d4a10d8d0c8.
> >
> > The revert at the bottom causes the wakeup granularity to shrink for +
> > nice and to grow for - nice. That is, it becomes easier to preempt a +
> > nice task, and harder to preempt a - nice task.
>
> i think it would be OK to do half of this: make it easier to preempt a
> +nice task. Michel, do you really need the -nice portion as well? It's
> not a problem to super-preempt positively reniced tasks, but it can be
> quite annoying if negatively reniced tasks have super-slices.
This should do that (unless I need a stronger cup of tea).
---
Index: linux-2.6/kernel/sched_fair.c
===================================================================
--- linux-2.6.orig/kernel/sched_fair.c
+++ linux-2.6/kernel/sched_fair.c
@@ -1106,7 +1106,11 @@ static void check_preempt_wakeup(struct
}
gran = sysctl_sched_wakeup_granularity;
- if (unlikely(se->load.weight != NICE_0_LOAD))
+ /*
+ * More easily preempt - nice tasks, while not making
+ * it harder for + nice tasks.
+ */
+ if (unlikely(se->load.weight > NICE_0_LOAD))
gran = calc_delta_fair(gran, &se->load);
if (pse->vruntime + gran < se->vruntime)
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Srivatsa Vaddagiri @ 2008-01-28 13:11 UTC (permalink / raw)
To: Ingo Molnar; +Cc: linuxppc-dev, Peter Zijlstra, michel
In-Reply-To: <20080128123253.GA32496@elte.hu>
On Mon, Jan 28, 2008 at 01:32:53PM +0100, Ingo Molnar wrote:
> * Peter Zijlstra <a.p.zijlstra@chello.nl> wrote:
>
> > > * With CONFIG_FAIR_USER_SCHED disabled, there are severe
> > > interactivity hickups with a niced CPU hog and top running. This
> > > started with commit 810e95ccd58d91369191aa4ecc9e6d4a10d8d0c8.
> >
> > The revert at the bottom causes the wakeup granularity to shrink for +
> > nice and to grow for - nice. That is, it becomes easier to preempt a +
> > nice task, and harder to preempt a - nice task.
>
> i think it would be OK to do half of this: make it easier to preempt a
> +nice task.
Hmm .. I doubt whether that would help Michel's case, as he seems to be running
+niced tasks and having problems getting control over his desktop.
Something is basically wrong here ..
> Michel, do you really need the -nice portion as well? It's
> not a problem to super-preempt positively reniced tasks, but it can be
> quite annoying if negatively reniced tasks have super-slices.
--
Regards,
vatsa
^ permalink raw reply
* Re: ppc32: Weird process scheduling behaviour with 2.6.24-rc
From: Ingo Molnar @ 2008-01-28 12:56 UTC (permalink / raw)
To: Peter Zijlstra; +Cc: linuxppc-dev, Michel Dänzer, vatsa
In-Reply-To: <1201524796.28547.5.camel@lappy>
* Peter Zijlstra <a.p.zijlstra@chello.nl> wrote:
> > i think it would be OK to do half of this: make it easier to preempt
> > a +nice task. Michel, do you really need the -nice portion as well?
> > It's not a problem to super-preempt positively reniced tasks, but it
> > can be quite annoying if negatively reniced tasks have super-slices.
>
> This should do that (unless I need a stronger cup of tea).
cool - thanks Peter. Michel, could you check Peter's patch, does it
resolve all the interactivity problems you've been seeing?
Ingo
^ permalink raw reply
* request_irq() for external interrupt pin on MPC875 (A&M adder MPC 875)
From: Rognlien Dag Kristian @ 2008-01-28 13:28 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 540 bytes --]
With kernel 2.6.13 we used
request_irq (use_irq, irq_handler, SA_INTERRUPT|SA_SHIRQ, DEVICE_NAME,
dev)
where use_irq is 12 to use the external IRQ6 pin.
We are now trying to get this driver to work with the 2.6.25 pull from
powerpc.git.
request_irq (use_irq, irq_handler, IRQF_SHARED, DEVICE_NAME, dev);
returns -ENOSYS on the newer kernel.
Have the IRQ mappings for the external IRQX pins been moved in the later
kernels?
-
Dag K. W. Rognlien
Research Scientist
SINTEF ICT Communication Systems
[-- Attachment #2: Type: text/html, Size: 2472 bytes --]
^ permalink raw reply
* [PATCH 1/1][PPC] Test value, not 1 in print_insn_spu(), arch/powerpc/xmon/spu-dis.c
From: Roel Kluin @ 2008-01-28 14:10 UTC (permalink / raw)
To: jwboyer, michael; +Cc: linuxppc-dev
untested, please confirm:
The '|| 1' does nothing, should this be corrected like my patch does?
--
Test value, not 1.
Signed-off-by: Roel Kluin <12o3l@tiscali.nl>
---
diff --git a/arch/powerpc/xmon/spu-dis.c b/arch/powerpc/xmon/spu-dis.c
index e5f8983..74d45fb 100644
--- a/arch/powerpc/xmon/spu-dis.c
+++ b/arch/powerpc/xmon/spu-dis.c
@@ -222,7 +222,7 @@ print_insn_spu (unsigned long insn, unsigned long memaddr)
break;
case A_U18:
value = DECODE_INSN_U18 (insn);
- if (value == 0 || 1)
+ if (value == 0 || value == 1)
{
hex_value = value;
printf("%u", value);
^ permalink raw reply related
* [PATCH] [PPC] Remove 83xx from arch/ppc
From: Kumar Gala @ 2008-01-28 14:39 UTC (permalink / raw)
To: linuxppc-dev
83xx exists in arch/powerpc as well as cuImage support to boot from
a u-boot that doesn't support device trees.
---
arch/ppc/Kconfig | 46 +--
arch/ppc/Makefile | 1 -
arch/ppc/configs/mpc834x_sys_defconfig | 844 --------------------------------
arch/ppc/kernel/ppc_ksyms.c | 3 +-
arch/ppc/kernel/setup.c | 2 +-
arch/ppc/mm/mmu_context.c | 2 +-
arch/ppc/mm/ppc_mmu.c | 2 +-
arch/ppc/platforms/83xx/Makefile | 4 -
arch/ppc/platforms/83xx/mpc834x_sys.c | 346 -------------
arch/ppc/platforms/83xx/mpc834x_sys.h | 54 --
arch/ppc/syslib/Makefile | 5 -
arch/ppc/syslib/ipic.c | 646 ------------------------
arch/ppc/syslib/ipic.h | 47 --
arch/ppc/syslib/mpc83xx_devices.c | 251 ----------
arch/ppc/syslib/mpc83xx_sys.c | 122 -----
arch/ppc/syslib/ppc83xx_pci.h | 151 ------
arch/ppc/syslib/ppc83xx_setup.c | 410 ----------------
arch/ppc/syslib/ppc83xx_setup.h | 55 --
include/asm-powerpc/irq.h | 5 -
include/asm-ppc/mpc83xx.h | 107 ----
include/asm-ppc/ppc_sys.h | 2 -
include/asm-ppc/ppcboot.h | 5 +-
include/asm-ppc/serial.h | 2 -
23 files changed, 15 insertions(+), 3097 deletions(-)
delete mode 100644 arch/ppc/configs/mpc834x_sys_defconfig
delete mode 100644 arch/ppc/platforms/83xx/Makefile
delete mode 100644 arch/ppc/platforms/83xx/mpc834x_sys.c
delete mode 100644 arch/ppc/platforms/83xx/mpc834x_sys.h
delete mode 100644 arch/ppc/syslib/ipic.c
delete mode 100644 arch/ppc/syslib/ipic.h
delete mode 100644 arch/ppc/syslib/mpc83xx_devices.c
delete mode 100644 arch/ppc/syslib/mpc83xx_sys.c
delete mode 100644 arch/ppc/syslib/ppc83xx_pci.h
delete mode 100644 arch/ppc/syslib/ppc83xx_setup.c
delete mode 100644 arch/ppc/syslib/ppc83xx_setup.h
delete mode 100644 include/asm-ppc/mpc83xx.h
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 6473fa7..08e083d 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -78,18 +78,18 @@ choice
default 6xx
config 6xx
- bool "6xx/7xx/74xx/52xx/82xx/83xx"
+ bool "6xx/7xx/74xx/52xx/82xx"
select PPC_FPU
help
There are four types of PowerPC chips supported. The more common
types (601, 603, 604, 740, 750, 7400), the older Freescale
(formerly Motorola) embedded versions (821, 823, 850, 855, 860,
- 52xx, 82xx, 83xx), the IBM embedded versions (403 and 405) and
+ 52xx, 82xx), the IBM embedded versions (403 and 405) and
the Book E embedded processors from IBM (44x) and Freescale (85xx).
For support for 64-bit processors, set ARCH=powerpc.
Unless you are building a kernel for one of the embedded processor
systems, choose 6xx.
- Also note that because the 52xx, 82xx, & 83xx family have a 603e
+ Also note that because the 52xx, 82xx family have a 603e
core, specific support for that chipset is asked later on.
config 40x
@@ -153,7 +153,7 @@ config PHYS_64BIT
config ALTIVEC
bool "AltiVec Support"
depends on 6xx
- depends on !8260 && !83xx
+ depends on !8260
---help---
This option enables kernel support for the Altivec extensions to the
PowerPC processor. The kernel currently supports saving and restoring
@@ -184,7 +184,7 @@ config SPE
config TAU
bool "Thermal Management Support"
- depends on 6xx && !8260 && !83xx
+ depends on 6xx && !8260
help
G3 and G4 processors have an on-chip temperature sensor called the
'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
@@ -721,16 +721,6 @@ config LITE5200B
Support for the LITE5200B dev board for the MPC5200 from Freescale.
This is the new board with 2 PCI slots.
-config MPC834x_SYS
- bool "Freescale MPC834x SYS"
- help
- This option enables support for the MPC 834x SYS evaluation board.
-
- Be aware that PCI buses can only function when SYS board is plugged
- into the PIB (Platform IO Board) board from Freescale which provide
- 3 PCI slots. The PIBs PCI initialization is the bootloader's
- responsibility.
-
config EV64360
bool "Marvell-EV64360BP"
help
@@ -774,18 +764,6 @@ config 8272
The MPC8272 CPM has a different internal dpram setup than other CPM2
devices
-config 83xx
- bool
- default y if MPC834x_SYS
-
-config MPC834x
- bool
- default y if MPC834x_SYS
-
-config PPC_83xx
- bool
- default y if 83xx
-
config CPM1
bool
depends on 8xx
@@ -811,8 +789,7 @@ config PPC_GEN550
bool
depends on SANDPOINT || SPRUCE || PPLUS || \
PRPMC750 || PRPMC800 || LOPEC || \
- (EV64260 && !SERIAL_MPSC) || CHESTNUT || RADSTONE_PPC7D || \
- 83xx
+ (EV64260 && !SERIAL_MPSC) || CHESTNUT || RADSTONE_PPC7D
default y
config FORCE
@@ -1074,7 +1051,7 @@ config PPC_I8259
config PPC_INDIRECT_PCI
bool
depends on PCI
- default y if 40x || 44x || 85xx || 83xx || PPC_PREP
+ default y if 40x || 44x || 85xx || PPC_PREP
default n
config EISA
@@ -1091,8 +1068,8 @@ config MCA
bool
config PCI
- bool "PCI support" if 40x || CPM2 || 83xx || 85xx || PPC_MPC52xx
- default y if !40x && !CPM2 && !8xx && !83xx && !85xx
+ bool "PCI support" if 40x || CPM2 || 85xx || PPC_MPC52xx
+ default y if !40x && !CPM2 && !8xx && !85xx
default PCI_QSPAN if !4xx && !CPM2 && 8xx
help
Find out whether your system includes a PCI bus. PCI is the name of
@@ -1106,11 +1083,6 @@ config PCI_DOMAINS
config PCI_SYSCALL
def_bool PCI
-config MPC83xx_PCI2
- bool "Support for 2nd PCI host controller"
- depends on PCI && MPC834x
- default y if MPC834x_SYS
-
config PCI_QSPAN
bool "QSpan PCI"
depends on !4xx && !CPM2 && 8xx
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
index 95894ef..a4fef18 100644
--- a/arch/ppc/Makefile
+++ b/arch/ppc/Makefile
@@ -65,7 +65,6 @@ core-y += arch/ppc/kernel/ arch/powerpc/kernel/ \
arch/ppc/syslib/ arch/powerpc/sysdev/ \
arch/powerpc/lib/
core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/
-core-$(CONFIG_83xx) += arch/ppc/platforms/83xx/
core-$(CONFIG_85xx) += arch/ppc/platforms/85xx/
core-$(CONFIG_MATH_EMULATION) += arch/powerpc/math-emu/
core-$(CONFIG_XMON) += arch/ppc/xmon/
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index 0d53dc3..ba729ce 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -244,8 +244,7 @@ EXPORT_SYMBOL(debugger_fault_handler);
EXPORT_SYMBOL(cpm_install_handler);
EXPORT_SYMBOL(cpm_free_handler);
#endif /* CONFIG_8xx */
-#if defined(CONFIG_8xx) || defined(CONFIG_40x) || defined(CONFIG_85xx) ||\
- defined(CONFIG_83xx)
+#if defined(CONFIG_8xx) || defined(CONFIG_40x) || defined(CONFIG_85xx)
EXPORT_SYMBOL(__res);
#endif
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index 3c45302..5888ae6 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -38,7 +38,7 @@
#include <asm/xmon.h>
#include <asm/ocp.h>
-#define USES_PPC_SYS (defined(CONFIG_85xx) || defined(CONFIG_83xx) || \
+#define USES_PPC_SYS (defined(CONFIG_85xx) || \
defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
defined(CONFIG_PPC_MPC52xx))
diff --git a/arch/ppc/mm/mmu_context.c b/arch/ppc/mm/mmu_context.c
index 85afa7f..dacf45c 100644
--- a/arch/ppc/mm/mmu_context.c
+++ b/arch/ppc/mm/mmu_context.c
@@ -2,7 +2,7 @@
* This file contains the routines for handling the MMU on those
* PowerPC implementations where the MMU substantially follows the
* architecture specification. This includes the 6xx, 7xx, 7xxx,
- * 8260, and 83xx implementations but excludes the 8xx and 4xx.
+ * and 8260 implementations but excludes the 8xx and 4xx.
* -- paulus
*
* Derived from arch/ppc/mm/init.c:
diff --git a/arch/ppc/mm/ppc_mmu.c b/arch/ppc/mm/ppc_mmu.c
index 973f1e6..0c1dc15 100644
--- a/arch/ppc/mm/ppc_mmu.c
+++ b/arch/ppc/mm/ppc_mmu.c
@@ -2,7 +2,7 @@
* This file contains the routines for handling the MMU on those
* PowerPC implementations where the MMU substantially follows the
* architecture specification. This includes the 6xx, 7xx, 7xxx,
- * 8260, and 83xx implementations but excludes the 8xx and 4xx.
+ * and 8260 implementations but excludes the 8xx and 4xx.
* -- paulus
*
* Derived from arch/ppc/mm/init.c:
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index 5e16228..4d158f3 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -93,11 +93,6 @@ obj-$(CONFIG_85xx) += open_pic.o ppc85xx_common.o ppc85xx_setup.o \
ifeq ($(CONFIG_85xx),y)
obj-$(CONFIG_PCI) += pci_auto.o
endif
-obj-$(CONFIG_83xx) += ppc83xx_setup.o ppc_sys.o \
- mpc83xx_sys.o mpc83xx_devices.o ipic.o
-ifeq ($(CONFIG_83xx),y)
-obj-$(CONFIG_PCI) += pci_auto.o
-endif
obj-$(CONFIG_MPC8548_CDS) += todc_time.o
obj-$(CONFIG_MPC8555_CDS) += todc_time.o
obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o \
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h
index 1392db4..4a015da 100644
--- a/include/asm-powerpc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -483,11 +483,6 @@ static __inline__ int irq_canonicalize(int irq)
*/
#define mk_int_int_mask(IL) (1 << (7 - (IL/2)))
-#elif defined(CONFIG_83xx)
-#include <asm/mpc83xx.h>
-
-#define NR_IRQS (NR_IPIC_INTS)
-
#elif defined(CONFIG_85xx)
/* Now include the board configuration specific associations.
*/
diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
index de99e92..80c5851 100644
--- a/include/asm-ppc/ppc_sys.h
+++ b/include/asm-ppc/ppc_sys.h
@@ -23,8 +23,6 @@
#if defined(CONFIG_8260)
#include <asm/mpc8260.h>
-#elif defined(CONFIG_83xx)
-#include <asm/mpc83xx.h>
#elif defined(CONFIG_85xx)
#include <asm/mpc85xx.h>
#elif defined(CONFIG_8xx)
diff --git a/include/asm-ppc/ppcboot.h b/include/asm-ppc/ppcboot.h
index 6b7b63f..18d04e8 100644
--- a/include/asm-ppc/ppcboot.h
+++ b/include/asm-ppc/ppcboot.h
@@ -38,8 +38,7 @@ typedef struct bd_info {
unsigned long bi_flashoffset; /* reserved area for startup monitor */
unsigned long bi_sramstart; /* start of SRAM memory */
unsigned long bi_sramsize; /* size of SRAM memory */
-#if defined(CONFIG_8xx) || defined(CONFIG_CPM2) || defined(CONFIG_85xx) ||\
- defined(CONFIG_83xx)
+#if defined(CONFIG_8xx) || defined(CONFIG_CPM2) || defined(CONFIG_85xx)
unsigned long bi_immr_base; /* base of IMMR register */
#endif
#if defined(CONFIG_PPC_MPC52xx)
@@ -74,7 +73,7 @@ typedef struct bd_info {
hymod_conf_t bi_hymod_conf; /* hymod configuration information */
#endif
#if defined(CONFIG_EVB64260) || defined(CONFIG_405EP) || defined(CONFIG_44x) || \
- defined(CONFIG_85xx) || defined(CONFIG_83xx)
+ defined(CONFIG_85xx)
/* second onboard ethernet port */
unsigned char bi_enet1addr[6];
#endif
diff --git a/include/asm-ppc/serial.h b/include/asm-ppc/serial.h
index 8fc1b54..6220ef9 100644
--- a/include/asm-ppc/serial.h
+++ b/include/asm-ppc/serial.h
@@ -29,8 +29,6 @@
#include <platforms/spruce.h>
#elif defined(CONFIG_4xx)
#include <asm/ibm4xx.h>
-#elif defined(CONFIG_83xx)
-#include <asm/mpc83xx.h>
#elif defined(CONFIG_85xx)
#include <asm/mpc85xx.h>
#elif defined(CONFIG_RADSTONE_PPC7D)
--
1.5.3.7
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