* Re: [PATCH] [NET]: Remove PowerPC code from fec.c
From: Arnd Bergmann @ 2008-01-28 21:01 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-m68k, netdev, Frans Pop, linux-kernel, geert, gerg,
scottwood, jgarzik
In-Reply-To: <479A087F.5010305@scram.de>
On Friday 25 January 2008, Jochen Friedrich wrote:
> Maybe the wording should be changed to:
>
> This driver is now only used on ColdFire (m68knommu) processors. Conditional
> PowerPC code has been removed.
>
How about adding a pointer to the driver that is now used on powerpc,
for the people that are looking in here?
Arnd <><
^ permalink raw reply
* Re: [patch v4 0/4] Cypress c67x00 (EZ-Host/EZ-OTG) support
From: Peter Korsgaard @ 2008-01-28 21:01 UTC (permalink / raw)
To: Grant Likely; +Cc: David Brownell, linuxppc-dev, linux-usb
In-Reply-To: <fa686aa40801281240s5af3272bg7953e6a3d6022531@mail.gmail.com>
>>>>> "Grant" == Grant Likely <grant.likely@secretlab.ca> writes:
Hi,
Grant> I've now merged the driver into my tree and tested it.
Grant> The good news is that using only one device node is absolutely
Grant> no problem. It works without error or complaint and sysfs
Grant> looks sane.
Great.
Grant> The bad news is that I discovered a race condition on
Grant> initialization. The problem is that IRQs are enabled before
Grant> the SIEs are configured. The interrupt handler is firing
Grant> immediately and tries to get the status of each SIE. Since
Grant> the SIE probe has not yet occured, sie->dev is NULL and we get
Grant> a kernel oops when c67x00_ll_get_siemsg() tries to dereference
Grant> it.
Not so great. I unfortunately don't see it here.
Grant> However, register_irq() cannot be easily moved to after the
Grant> SIE probe because the current probe code depends on interrupts
Grant> being enabled. Below is an ugly workaround that solves the
Grant> problem to me, but there is probably a better solution.
Wouldn't it be simpler to just add a if (sie->dev) check to
_ll_get_siemsg()? Or doesn't the hcd init properly reinitialize the
device?
--
Bye, Peter Korsgaard
^ permalink raw reply
* [PATCH] 83xx: Clean up / convert mpc83xx board DTS files to v1 format.
From: Paul Gortmaker @ 2008-01-28 21:09 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <54AD0075-E36B-4A95-BFD9-C750E590513F@kernel.crashing.org>
This patch converts the remaining 83xx boards to the dts-v1 format.
This includes the mpc8313_rdb, mpc832x_mds, mpc8323_rdb, mpc8349emitx,
mpc8349emitxgp and the mpc836x_mds.
The mpc8315_rdb mpc834x_mds, mpc837[789]_*, and sbc8349 were already
dts-v1 and only undergo minor changes for the sake of formatting
consistency across the whole group of boards; i.e. the idea being
that you can do a "diff -u board_A.dts board_B.dts" and see something
meaningful.
The general rule I've applied is that entries for values normally
parsed by humans are left in decimal (i.e. IRQ, cache size, clock
rates, basic counts and indexes) and all other data (i.e. reg and
ranges, IRQ flags etc.) remain in hex.
I've used dtc to confirm that the output prior to this changeset
matches the output after this changeset is applied for all boards.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc8313erdb.dts | 152 +++++++++---------
arch/powerpc/boot/dts/mpc8315erdb.dts | 100 ++++++------
arch/powerpc/boot/dts/mpc832x_mds.dts | 252 +++++++++++++++--------------
arch/powerpc/boot/dts/mpc832x_rdb.dts | 154 +++++++++---------
arch/powerpc/boot/dts/mpc8349emitx.dts | 155 +++++++++---------
arch/powerpc/boot/dts/mpc8349emitxgp.dts | 109 +++++++------
arch/powerpc/boot/dts/mpc834x_mds.dts | 36 ++--
arch/powerpc/boot/dts/mpc836x_mds.dts | 260 +++++++++++++++---------------
arch/powerpc/boot/dts/mpc8377_mds.dts | 138 ++++++++--------
arch/powerpc/boot/dts/mpc8377_rdb.dts | 102 ++++++------
arch/powerpc/boot/dts/mpc8378_mds.dts | 130 ++++++++--------
arch/powerpc/boot/dts/mpc8378_rdb.dts | 94 ++++++------
arch/powerpc/boot/dts/mpc8379_mds.dts | 146 +++++++++---------
arch/powerpc/boot/dts/mpc8379_rdb.dts | 112 +++++++-------
arch/powerpc/boot/dts/sbc8349.dts | 44 +++---
15 files changed, 999 insertions(+), 985 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 20a03f5..2d6653f 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -9,6 +9,8 @@
* option) any later version.
*/
+/dts-v1/;
+
/ {
model = "MPC8313ERDB";
compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
@@ -29,11 +31,11 @@
PowerPC,8313@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <4000>; // L1, 16K
- i-cache-size = <4000>; // L1, 16K
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <16384>;
+ i-cache-size = <16384>;
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -42,30 +44,30 @@
memory {
device_type = "memory";
- reg = <00000000 08000000>; // 128MB at 0
+ reg = <0x00000000 0x08000000>; // 128MB at 0
};
localbus@e0005000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8313-elbc", "fsl,elbc", "simple-bus";
- reg = <e0005000 1000>;
- interrupts = <d#77 8>;
+ reg = <0xe0005000 0x1000>;
+ interrupts = <77 0x8>;
interrupt-parent = <&ipic>;
// CS0 and CS1 are swapped when
// booting from nand, but the
// addresses are the same.
- ranges = <0 0 fe000000 00800000
- 1 0 e2800000 00008000
- 2 0 f0000000 00020000
- 3 0 fa000000 00008000>;
+ ranges = <0x0 0x0 0xfe000000 0x00800000
+ 0x1 0x0 0xe2800000 0x00008000
+ 0x2 0x0 0xf0000000 0x00020000
+ 0x3 0x0 0xfa000000 0x00008000>;
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
- reg = <0 0 800000>;
+ reg = <0x0 0x0 0x800000>;
bank-width = <2>;
device-width = <1>;
};
@@ -75,19 +77,19 @@
#size-cells = <1>;
compatible = "fsl,mpc8313-fcm-nand",
"fsl,elbc-fcm-nand";
- reg = <1 0 2000>;
+ reg = <0x1 0x0 0x2000>;
u-boot@0 {
- reg = <0 100000>;
+ reg = <0x0 0x100000>;
read-only;
};
kernel@100000 {
- reg = <100000 300000>;
+ reg = <0x100000 0x300000>;
};
fs@400000 {
- reg = <400000 1c00000>;
+ reg = <0x400000 0x1c00000>;
};
};
};
@@ -97,14 +99,14 @@
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -112,9 +114,9 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -123,29 +125,29 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
spi@7000 {
cell-index = <0>;
compatible = "fsl,spi";
- reg = <7000 1000>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
usb@23000 {
compatible = "fsl-usb2-dr";
- reg = <23000 1000>;
+ reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <26 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
phy_type = "utmi_wide";
};
@@ -153,17 +155,17 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
- reg = <24520 20>;
+ reg = <0x24520 0x20>;
phy1: ethernet-phy@1 {
- interrupt-parent = < &ipic >;
- interrupts = <13 8>;
- reg = <1>;
+ interrupt-parent = <&ipic>;
+ interrupts = <19 0x8>;
+ reg = <0x1>;
device_type = "ethernet-phy";
};
phy4: ethernet-phy@4 {
- interrupt-parent = < &ipic >;
- interrupts = <14 8>;
- reg = <4>;
+ interrupt-parent = <&ipic>;
+ interrupts = <20 0x8>;
+ reg = <0x4>;
device_type = "ethernet-phy";
};
};
@@ -173,10 +175,10 @@
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
- reg = <24000 1000>;
+ reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <25 8 24 8 23 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <37 0x8 36 0x8 35 0x8>;
+ interrupt-parent = <&ipic>;
phy-handle = < &phy1 >;
};
@@ -185,10 +187,10 @@
device_type = "network";
model = "eTSEC";
compatible = "gianfar";
- reg = <25000 1000>;
+ reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <22 8 21 8 20 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <34 0x8 33 0x8 32 0x8>;
+ interrupt-parent = <&ipic>;
phy-handle = < &phy4 >;
};
@@ -196,34 +198,34 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 7000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x7000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
/* Rev. 2.2 */
num-channels = <1>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000004c>;
- descriptor-types-mask = <0122003f>;
+ channel-fifo-len = <24>;
+ exec-units-mask = <0x0000004c>;
+ descriptor-types-mask = <0x0122003f>;
};
/* IPIC
@@ -236,38 +238,38 @@
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0E -mini PCI */
- 7000 0 0 1 &ipic 12 8
- 7000 0 0 2 &ipic 12 8
- 7000 0 0 3 &ipic 12 8
- 7000 0 0 4 &ipic 12 8
+ 0x7000 0x0 0x0 0x1 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x2 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x3 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x4 &ipic 18 0x8
/* IDSEL 0x0F - PCI slot */
- 7800 0 0 1 &ipic 11 8
- 7800 0 0 2 &ipic 12 8
- 7800 0 0 3 &ipic 11 8
- 7800 0 0 4 &ipic 12 8>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
- bus-range = <0 0>;
- ranges = <02000000 0 90000000 90000000 0 10000000
- 42000000 0 80000000 80000000 0 10000000
- 01000000 0 00000000 e2000000 0 00100000>;
- clock-frequency = <3f940aa>;
+ 0x7800 0x0 0x0 0x1 &ipic 17 0x8
+ 0x7800 0x0 0x0 0x2 &ipic 18 0x8
+ 0x7800 0x0 0x0 0x3 &ipic 17 0x8
+ 0x7800 0x0 0x0 0x4 &ipic 18 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index e157f23..b582032 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -30,7 +30,7 @@
PowerPC,8315@0 {
device_type = "cpu";
- reg = <0>;
+ reg = <0x0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <16384>;
@@ -51,22 +51,22 @@
#size-cells = <1>;
compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
reg = <0xe0005000 0x1000>;
- interrupts = <77 8>;
+ interrupts = <77 0x8>;
interrupt-parent = <&ipic>;
// CS0 and CS1 are swapped when
// booting from nand, but the
// addresses are the same.
- ranges = <0 0 0xfe000000 0x00800000
- 1 0 0xe0600000 0x00002000
- 2 0 0xf0000000 0x00020000
- 3 0 0xfa000000 0x00008000>;
+ ranges = <0x0 0x0 0xfe000000 0x00800000
+ 0x1 0x0 0xe0600000 0x00002000
+ 0x2 0x0 0xf0000000 0x00020000
+ 0x3 0x0 0xfa000000 0x00008000>;
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
- reg = <0 0 0x800000>;
+ reg = <0x0 0x0 0x800000>;
bank-width = <2>;
device-width = <1>;
};
@@ -76,7 +76,7 @@
#size-cells = <1>;
compatible = "fsl,mpc8315-fcm-nand",
"fsl,elbc-fcm-nand";
- reg = <1 0 0x2000>;
+ reg = <0x1 0x0 0x2000>;
u-boot@0 {
reg = <0x0 0x100000>;
@@ -113,8 +113,8 @@
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <14 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
device_type = "rtc";
@@ -127,8 +127,8 @@
cell-index = <0>;
compatible = "fsl,spi";
reg = <0x7000 0x1000>;
- interrupts = <16 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
@@ -137,8 +137,8 @@
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <38 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
phy_type = "utmi";
};
@@ -148,15 +148,15 @@
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy0: ethernet-phy@0 {
- interrupt-parent = < &ipic >;
- interrupts = <20 8>;
- reg = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <20 0x8>;
+ reg = <0x0>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@1 {
- interrupt-parent = < &ipic >;
- interrupts = <19 8>;
- reg = <1>;
+ interrupt-parent = <&ipic>;
+ interrupts = <19 0x8>;
+ reg = <0x1>;
device_type = "ethernet-phy";
};
};
@@ -168,8 +168,8 @@
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <32 8 33 8 34 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
+ interrupt-parent = <&ipic>;
phy-handle = < &phy0 >;
};
@@ -180,8 +180,8 @@
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <35 8 36 8 37 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
+ interrupt-parent = <&ipic>;
phy-handle = < &phy1 >;
};
@@ -191,8 +191,8 @@
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
@@ -201,8 +201,8 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
@@ -210,8 +210,8 @@
device_type = "crypto";
compatible = "talitos";
reg = <0x30000 0x10000>;
- interrupts = <11 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <24>;
@@ -223,16 +223,16 @@
compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
reg = <0x18000 0x1000>;
cell-index = <1>;
- interrupts = <44 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <44 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@19000 {
compatible = "fsl,mpc8315-sata", "fsl,pq-sata";
reg = <0x19000 0x1000>;
cell-index = <2>;
- interrupts = <45 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <45 0x8>;
+ interrupt-parent = <&ipic>;
};
/* IPIC
@@ -251,28 +251,28 @@
};
pci0: pci@e0008500 {
- interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0E -mini PCI */
- 0x7000 0 0 1 &ipic 18 8
- 0x7000 0 0 2 &ipic 18 8
- 0x7000 0 0 3 &ipic 18 8
- 0x7000 0 0 4 &ipic 18 8
+ 0x7000 0x0 0x0 0x1 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x2 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x3 &ipic 18 0x8
+ 0x7000 0x0 0x0 0x4 &ipic 18 0x8
/* IDSEL 0x0F -mini PCI */
- 0x7800 0 0 1 &ipic 17 8
- 0x7800 0 0 2 &ipic 17 8
- 0x7800 0 0 3 &ipic 17 8
- 0x7800 0 0 4 &ipic 17 8
+ 0x7800 0x0 0x0 0x1 &ipic 17 0x8
+ 0x7800 0x0 0x0 0x2 &ipic 17 0x8
+ 0x7800 0x0 0x0 0x3 &ipic 17 0x8
+ 0x7800 0x0 0x0 0x4 &ipic 17 0x8
/* IDSEL 0x10 - PCI slot */
- 0x8000 0 0 1 &ipic 48 8
- 0x8000 0 0 2 &ipic 17 8
- 0x8000 0 0 3 &ipic 48 8
- 0x8000 0 0 4 &ipic 17 8>;
- interrupt-parent = < &ipic >;
- interrupts = <66 8>;
- bus-range = <0 0>;
+ 0x8000 0x0 0x0 0x1 &ipic 48 0x8
+ 0x8000 0x0 0x0 0x2 &ipic 17 0x8
+ 0x8000 0x0 0x0 0x3 &ipic 48 0x8
+ 0x8000 0x0 0x0 0x4 &ipic 17 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
0x42000000 0 0x80000000 0x80000000 0 0x10000000
0x01000000 0 0x00000000 0xe0300000 0 0x00100000>;
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 7c3c52c..9bb4083 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -21,6 +21,8 @@
* you're going by the schematic, the pin is called "P19J-K22".
*/
+/dts-v1/;
+
/ {
model = "MPC8323EMDS";
compatible = "MPC8323EMDS", "MPC832xMDS", "MPC83xxMDS";
@@ -41,11 +43,11 @@
PowerPC,8323@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <4000>; // L1, 16K
- i-cache-size = <4000>; // L1, 16K
+ reg = <0x0>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <16384>; // L1, 16K
+ i-cache-size = <16384>; // L1, 16K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
@@ -54,26 +56,26 @@
memory {
device_type = "memory";
- reg = <00000000 08000000>;
+ reg = <0x00000000 0x08000000>;
};
bcsr@f8000000 {
device_type = "board-control";
- reg = <f8000000 8000>;
+ reg = <0xf8000000 0x8000>;
};
soc8323@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
- bus-frequency = <7DE2900>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <132000000>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -81,14 +83,14 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
compatible = "dallas,ds1374";
- reg = <68>;
+ reg = <0x68>;
};
};
@@ -96,46 +98,46 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 7000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x7000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
/* Rev. 2.2 */
num-channels = <1>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000004c>;
- descriptor-types-mask = <0122003f>;
+ channel-fifo-len = <24>;
+ exec-units-mask = <0x0000004c>;
+ descriptor-types-mask = <0x0122003f>;
};
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
par_io@1400 {
- reg = <1400 100>;
+ reg = <0x1400 0x100>;
device_type = "par_io";
num-ports = <7>;
@@ -144,8 +146,8 @@
/* port pin dir open_drain assignment has_irq */
3 4 3 0 2 0 /* MDIO */
3 5 1 0 2 0 /* MDC */
- 0 d 2 0 1 0 /* RX_CLK (CLK9) */
- 3 18 2 0 1 0 /* TX_CLK (CLK10) */
+ 0 13 2 0 1 0 /* RX_CLK (CLK9) */
+ 3 24 2 0 1 0 /* TX_CLK (CLK10) */
1 0 1 0 1 0 /* TxD0 */
1 1 1 0 1 0 /* TxD1 */
1 2 1 0 1 0 /* TxD2 */
@@ -156,30 +158,30 @@
1 7 2 0 1 0 /* RxD3 */
1 8 2 0 1 0 /* RX_ER */
1 9 1 0 1 0 /* TX_ER */
- 1 a 2 0 1 0 /* RX_DV */
- 1 b 2 0 1 0 /* COL */
- 1 c 1 0 1 0 /* TX_EN */
- 1 d 2 0 1 0>;/* CRS */
+ 1 10 2 0 1 0 /* RX_DV */
+ 1 11 2 0 1 0 /* COL */
+ 1 12 1 0 1 0 /* TX_EN */
+ 1 13 2 0 1 0>; /* CRS */
};
pio4: ucc_pin@04 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
- 3 1f 2 0 1 0 /* RX_CLK (CLK7) */
+ 3 31 2 0 1 0 /* RX_CLK (CLK7) */
3 6 2 0 1 0 /* TX_CLK (CLK8) */
- 1 12 1 0 1 0 /* TxD0 */
- 1 13 1 0 1 0 /* TxD1 */
- 1 14 1 0 1 0 /* TxD2 */
- 1 15 1 0 1 0 /* TxD3 */
- 1 16 2 0 1 0 /* RxD0 */
- 1 17 2 0 1 0 /* RxD1 */
- 1 18 2 0 1 0 /* RxD2 */
- 1 19 2 0 1 0 /* RxD3 */
- 1 1a 2 0 1 0 /* RX_ER */
- 1 1b 1 0 1 0 /* TX_ER */
- 1 1c 2 0 1 0 /* RX_DV */
- 1 1d 2 0 1 0 /* COL */
- 1 1e 1 0 1 0 /* TX_EN */
- 1 1f 2 0 1 0>;/* CRS */
+ 1 18 1 0 1 0 /* TxD0 */
+ 1 19 1 0 1 0 /* TxD1 */
+ 1 20 1 0 1 0 /* TxD2 */
+ 1 21 1 0 1 0 /* TxD3 */
+ 1 22 2 0 1 0 /* RxD0 */
+ 1 23 2 0 1 0 /* RxD1 */
+ 1 24 2 0 1 0 /* RxD2 */
+ 1 25 2 0 1 0 /* RxD3 */
+ 1 26 2 0 1 0 /* RX_ER */
+ 1 27 1 0 1 0 /* TX_ER */
+ 1 28 2 0 1 0 /* RX_DV */
+ 1 29 2 0 1 0 /* COL */
+ 1 30 1 0 1 0 /* TX_EN */
+ 1 31 2 0 1 0>; /* CRS */
};
pio5: ucc_pin@05 {
pio-map = <
@@ -190,10 +192,10 @@
2 0 1 0 2 0 /* TxD5 */
2 8 2 0 2 0 /* RxD5 */
- 2 1d 2 0 0 0 /* CTS5 */
- 2 1f 1 0 2 0 /* RTS5 */
+ 2 29 2 0 0 0 /* CTS5 */
+ 2 31 1 0 2 0 /* RTS5 */
- 2 18 2 0 0 0 /* CD */
+ 2 24 2 0 0 0 /* CD */
>;
};
@@ -206,47 +208,47 @@
#size-cells = <1>;
device_type = "qe";
compatible = "fsl,qe";
- ranges = <0 e0100000 00100000>;
- reg = <e0100000 480>;
+ ranges = <0x0 0xe0100000 0x00100000>;
+ reg = <0xe0100000 0x480>;
brg-frequency = <0>;
- bus-frequency = <BCD3D80>;
+ bus-frequency = <198000000>;
muram@10000 {
- #address-cells = <1>;
- #size-cells = <1>;
+ #address-cells = <1>;
+ #size-cells = <1>;
compatible = "fsl,qe-muram", "fsl,cpm-muram";
- ranges = <0 00010000 00004000>;
+ ranges = <0x0 0x00010000 0x00004000>;
data-only@0 {
compatible = "fsl,qe-muram-data",
"fsl,cpm-muram-data";
- reg = <0 4000>;
+ reg = <0x0 0x4000>;
};
};
spi@4c0 {
cell-index = <0>;
compatible = "fsl,spi";
- reg = <4c0 40>;
+ reg = <0x4c0 0x40>;
interrupts = <2>;
- interrupt-parent = < &qeic >;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
spi@500 {
cell-index = <1>;
compatible = "fsl,spi";
- reg = <500 40>;
+ reg = <0x500 0x40>;
interrupts = <1>;
- interrupt-parent = < &qeic >;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
usb@6c0 {
compatible = "qe_udc";
- reg = <6c0 40 8B00 100>;
- interrupts = <b>;
- interrupt-parent = < &qeic >;
+ reg = <0x6c0 0x40 0x8b00 0x100>;
+ interrupts = <11>;
+ interrupt-parent = <&qeic>;
mode = "slave";
};
@@ -256,14 +258,14 @@
model = "UCC";
cell-index = <3>;
device-id = <3>;
- reg = <2200 200>;
- interrupts = <22>;
- interrupt-parent = < &qeic >;
+ reg = <0x2200 0x200>;
+ interrupts = <34>;
+ interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "clk9";
tx-clock-name = "clk10";
- phy-handle = < &phy3 >;
- pio-handle = < &pio3 >;
+ phy-handle = <&phy3>;
+ pio-handle = <&pio3>;
};
enet1: ucc@3200 {
@@ -272,14 +274,14 @@
model = "UCC";
cell-index = <4>;
device-id = <4>;
- reg = <3200 200>;
- interrupts = <23>;
- interrupt-parent = < &qeic >;
+ reg = <0x3200 0x200>;
+ interrupts = <35>;
+ interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "clk7";
tx-clock-name = "clk8";
- phy-handle = < &phy4 >;
- pio-handle = < &pio4 >;
+ phy-handle = <&phy4>;
+ pio-handle = <&pio4>;
};
ucc@2400 {
@@ -289,8 +291,8 @@
device-id = <5>; /* The UCC number, 1-7*/
port-number = <0>; /* Which ttyQEx device */
soft-uart; /* We need Soft-UART */
- reg = <2400 200>;
- interrupts = <28>; /* From Table 18-12 */
+ reg = <0x2400 0x200>;
+ interrupts = <40>; /* From Table 18-12 */
interrupt-parent = < &qeic >;
/*
* For Soft-UART, we need to set TX to 1X, which
@@ -305,19 +307,19 @@
mdio@2320 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <2320 18>;
+ reg = <0x2320 0x18>;
compatible = "fsl,ucc-mdio";
phy3: ethernet-phy@03 {
- interrupt-parent = < &ipic >;
- interrupts = <11 8>;
- reg = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x3>;
device_type = "ethernet-phy";
};
phy4: ethernet-phy@04 {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
- reg = <4>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x4>;
device_type = "ethernet-phy";
};
};
@@ -327,69 +329,69 @@
compatible = "fsl,qe-ic";
#address-cells = <0>;
#interrupt-cells = <1>;
- reg = <80 80>;
+ reg = <0x80 0x80>;
big-endian;
- interrupts = <20 8 21 8>; //high:32 low:33
- interrupt-parent = < &ipic >;
+ interrupts = <32 0x8 33 0x8>; //high:32 low:33
+ interrupt-parent = <&ipic>;
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 AD17 */
- 8800 0 0 1 &ipic 14 8
- 8800 0 0 2 &ipic 15 8
- 8800 0 0 3 &ipic 16 8
- 8800 0 0 4 &ipic 17 8
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x12 AD18 */
- 9000 0 0 1 &ipic 16 8
- 9000 0 0 2 &ipic 17 8
- 9000 0 0 3 &ipic 14 8
- 9000 0 0 4 &ipic 15 8
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x13 AD19 */
- 9800 0 0 1 &ipic 17 8
- 9800 0 0 2 &ipic 14 8
- 9800 0 0 3 &ipic 15 8
- 9800 0 0 4 &ipic 16 8
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x15 AD21*/
- a800 0 0 1 &ipic 14 8
- a800 0 0 2 &ipic 15 8
- a800 0 0 3 &ipic 16 8
- a800 0 0 4 &ipic 17 8
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x16 AD22*/
- b000 0 0 1 &ipic 17 8
- b000 0 0 2 &ipic 14 8
- b000 0 0 3 &ipic 15 8
- b000 0 0 4 &ipic 16 8
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x17 AD23*/
- b800 0 0 1 &ipic 16 8
- b800 0 0 2 &ipic 17 8
- b800 0 0 3 &ipic 14 8
- b800 0 0 4 &ipic 15 8
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x18 AD24*/
- c000 0 0 1 &ipic 15 8
- c000 0 0 2 &ipic 16 8
- c000 0 0 3 &ipic 17 8
- c000 0 0 4 &ipic 14 8>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
- bus-range = <0 0>;
- ranges = <02000000 0 90000000 90000000 0 10000000
- 42000000 0 80000000 80000000 0 10000000
- 01000000 0 00000000 d0000000 0 00100000>;
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xd0000000 0x0 0x00100000>;
clock-frequency = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 551fc59..94f93d2 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -9,6 +9,8 @@
* option) any later version.
*/
+/dts-v1/;
+
/ {
model = "MPC8323ERDB";
compatible = "MPC8323ERDB", "MPC832xRDB", "MPC83xxRDB";
@@ -29,11 +31,11 @@
PowerPC,8323@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <4000>; // L1, 16K
- i-cache-size = <4000>; // L1, 16K
+ reg = <0x0>;
+ d-cache-line-size = <0x20>; // 32 bytes
+ i-cache-line-size = <0x20>; // 32 bytes
+ d-cache-size = <16384>; // L1, 16K
+ i-cache-size = <16384>; // L1, 16K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
@@ -42,21 +44,21 @@
memory {
device_type = "memory";
- reg = <00000000 04000000>;
+ reg = <0x00000000 0x04000000>;
};
soc8323@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -64,8 +66,8 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
interrupt-parent = <&pic>;
dfsrr;
};
@@ -74,9 +76,9 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
+ interrupts = <9 0x8>;
interrupt-parent = <&pic>;
};
@@ -84,9 +86,9 @@
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <a 8>;
+ interrupts = <10 0x8>;
interrupt-parent = <&pic>;
};
@@ -94,26 +96,26 @@
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 7000>;
- interrupts = <b 8>;
+ reg = <0x30000 0x7000>;
+ interrupts = <11 0x8>;
interrupt-parent = <&pic>;
/* Rev. 2.2 */
num-channels = <1>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000004c>;
- descriptor-types-mask = <0122003f>;
+ channel-fifo-len = <24>;
+ exec-units-mask = <0x0000004c>;
+ descriptor-types-mask = <0x0122003f>;
};
pic:pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
par_io@1400 {
- reg = <1400 100>;
+ reg = <0x1400 0x100>;
device_type = "par_io";
num-ports = <7>;
@@ -122,28 +124,28 @@
/* port pin dir open_drain assignment has_irq */
3 4 3 0 2 0 /* MDIO */
3 5 1 0 2 0 /* MDC */
- 3 15 2 0 1 0 /* RX_CLK (CLK16) */
- 3 17 2 0 1 0 /* TX_CLK (CLK3) */
- 0 12 1 0 1 0 /* TxD0 */
- 0 13 1 0 1 0 /* TxD1 */
- 0 14 1 0 1 0 /* TxD2 */
- 0 15 1 0 1 0 /* TxD3 */
- 0 16 2 0 1 0 /* RxD0 */
- 0 17 2 0 1 0 /* RxD1 */
- 0 18 2 0 1 0 /* RxD2 */
- 0 19 2 0 1 0 /* RxD3 */
- 0 1a 2 0 1 0 /* RX_ER */
- 0 1b 1 0 1 0 /* TX_ER */
- 0 1c 2 0 1 0 /* RX_DV */
- 0 1d 2 0 1 0 /* COL */
- 0 1e 1 0 1 0 /* TX_EN */
- 0 1f 2 0 1 0>; /* CRS */
+ 3 21 2 0 1 0 /* RX_CLK (CLK16) */
+ 3 23 2 0 1 0 /* TX_CLK (CLK3) */
+ 0 18 1 0 1 0 /* TxD0 */
+ 0 19 1 0 1 0 /* TxD1 */
+ 0 20 1 0 1 0 /* TxD2 */
+ 0 21 1 0 1 0 /* TxD3 */
+ 0 22 2 0 1 0 /* RxD0 */
+ 0 23 2 0 1 0 /* RxD1 */
+ 0 24 2 0 1 0 /* RxD2 */
+ 0 25 2 0 1 0 /* RxD3 */
+ 0 26 2 0 1 0 /* RX_ER */
+ 0 27 1 0 1 0 /* TX_ER */
+ 0 28 2 0 1 0 /* RX_DV */
+ 0 29 2 0 1 0 /* COL */
+ 0 30 1 0 1 0 /* TX_EN */
+ 0 31 2 0 1 0>; /* CRS */
};
ucc3pio:ucc_pin@03 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
- 0 d 2 0 1 0 /* RX_CLK (CLK9) */
- 3 18 2 0 1 0 /* TX_CLK (CLK10) */
+ 0 13 2 0 1 0 /* RX_CLK (CLK9) */
+ 3 24 2 0 1 0 /* TX_CLK (CLK10) */
1 0 1 0 1 0 /* TxD0 */
1 1 1 0 1 0 /* TxD1 */
1 2 1 0 1 0 /* TxD2 */
@@ -154,10 +156,10 @@
1 7 2 0 1 0 /* RxD3 */
1 8 2 0 1 0 /* RX_ER */
1 9 1 0 1 0 /* TX_ER */
- 1 a 2 0 1 0 /* RX_DV */
- 1 b 2 0 1 0 /* COL */
- 1 c 1 0 1 0 /* TX_EN */
- 1 d 2 0 1 0>; /* CRS */
+ 1 10 2 0 1 0 /* RX_DV */
+ 1 11 2 0 1 0 /* COL */
+ 1 12 1 0 1 0 /* TX_EN */
+ 1 13 2 0 1 0>; /* CRS */
};
};
};
@@ -167,28 +169,28 @@
#size-cells = <1>;
device_type = "qe";
compatible = "fsl,qe";
- ranges = <0 e0100000 00100000>;
- reg = <e0100000 480>;
+ ranges = <0x0 0xe0100000 0x00100000>;
+ reg = <0xe0100000 0x480>;
brg-frequency = <0>;
- bus-frequency = <BCD3D80>;
+ bus-frequency = <198000000>;
muram@10000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,qe-muram", "fsl,cpm-muram";
- ranges = <0 00010000 00004000>;
+ ranges = <0x0 0x00010000 0x00004000>;
data-only@0 {
compatible = "fsl,qe-muram-data",
"fsl,cpm-muram-data";
- reg = <0 4000>;
+ reg = <0x0 0x4000>;
};
};
spi@4c0 {
cell-index = <0>;
compatible = "fsl,spi";
- reg = <4c0 40>;
+ reg = <0x4c0 0x40>;
interrupts = <2>;
interrupt-parent = <&qeic>;
mode = "cpu-qe";
@@ -197,7 +199,7 @@
spi@500 {
cell-index = <1>;
compatible = "fsl,spi";
- reg = <500 40>;
+ reg = <0x500 0x40>;
interrupts = <1>;
interrupt-parent = <&qeic>;
mode = "cpu";
@@ -209,8 +211,8 @@
model = "UCC";
cell-index = <2>;
device-id = <2>;
- reg = <3000 200>;
- interrupts = <21>;
+ reg = <0x3000 0x200>;
+ interrupts = <33>;
interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "clk16";
@@ -225,8 +227,8 @@
model = "UCC";
cell-index = <3>;
device-id = <3>;
- reg = <2200 200>;
- interrupts = <22>;
+ reg = <0x2200 0x200>;
+ interrupts = <34>;
interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "clk9";
@@ -238,19 +240,19 @@
mdio@3120 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <3120 18>;
+ reg = <0x3120 0x18>;
compatible = "fsl,ucc-mdio";
phy00:ethernet-phy@00 {
interrupt-parent = <&pic>;
interrupts = <0>;
- reg = <0>;
+ reg = <0x0>;
device_type = "ethernet-phy";
};
phy04:ethernet-phy@04 {
interrupt-parent = <&pic>;
interrupts = <0>;
- reg = <4>;
+ reg = <0x4>;
device_type = "ethernet-phy";
};
};
@@ -260,43 +262,43 @@
compatible = "fsl,qe-ic";
#address-cells = <0>;
#interrupt-cells = <1>;
- reg = <80 80>;
+ reg = <0x80 0x80>;
big-endian;
- interrupts = <20 8 21 8>; //high:32 low:33
+ interrupts = <32 0x8 33 0x8>; //high:32 low:33
interrupt-parent = <&pic>;
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x10 AD16 (USB) */
- 8000 0 0 1 &pic 11 8
+ 0x8000 0x0 0x0 0x1 &pic 17 0x8
/* IDSEL 0x11 AD17 (Mini1)*/
- 8800 0 0 1 &pic 12 8
- 8800 0 0 2 &pic 13 8
- 8800 0 0 3 &pic 14 8
- 8800 0 0 4 &pic 30 8
+ 0x8800 0x0 0x0 0x1 &pic 18 0x8
+ 0x8800 0x0 0x0 0x2 &pic 19 0x8
+ 0x8800 0x0 0x0 0x3 &pic 20 0x8
+ 0x8800 0x0 0x0 0x4 &pic 48 0x8
/* IDSEL 0x12 AD18 (PCI/Mini2) */
- 9000 0 0 1 &pic 13 8
- 9000 0 0 2 &pic 14 8
- 9000 0 0 3 &pic 30 8
- 9000 0 0 4 &pic 11 8>;
+ 0x9000 0x0 0x0 0x1 &pic 19 0x8
+ 0x9000 0x0 0x0 0x2 &pic 20 0x8
+ 0x9000 0x0 0x0 0x3 &pic 48 0x8
+ 0x9000 0x0 0x0 0x4 &pic 17 0x8>;
interrupt-parent = <&pic>;
- interrupts = <42 8>;
- bus-range = <0 0>;
- ranges = <42000000 0 80000000 80000000 0 10000000
- 02000000 0 90000000 90000000 0 10000000
- 01000000 0 d0000000 d0000000 0 04000000>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x01000000 0x0 0xd0000000 0xd0000000 0x0 0x04000000>;
clock-frequency = <0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 4a4ddea..9426676 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -8,6 +8,9 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
+
+/dts-v1/;
+
/ {
model = "MPC8349EMITX";
compatible = "MPC8349EMITX", "MPC834xMITX", "MPC83xxMITX";
@@ -29,11 +32,11 @@
PowerPC,8349@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <20>;
- i-cache-line-size = <20>;
- d-cache-size = <8000>;
- i-cache-size = <8000>;
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -42,21 +45,21 @@
memory {
device_type = "memory";
- reg = <00000000 10000000>;
+ reg = <0x00000000 0x10000000>;
};
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>; // from bootloader
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -64,9 +67,9 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -75,39 +78,39 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
spi@7000 {
cell-index = <0>;
compatible = "fsl,spi";
- reg = <7000 1000>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
usb@22000 {
compatible = "fsl-usb2-mph";
- reg = <22000 1000>;
+ reg = <0x22000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <27 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <39 0x8>;
phy_type = "ulpi";
port1;
};
usb@23000 {
compatible = "fsl-usb2-dr";
- reg = <23000 1000>;
+ reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <26 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
dr_mode = "peripheral";
phy_type = "ulpi";
};
@@ -116,13 +119,13 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
- reg = <24520 20>;
+ reg = <0x24520 0x20>;
/* Vitesse 8201 */
phy1c: ethernet-phy@1c {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
- reg = <1c>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x1c>;
device_type = "ethernet-phy";
};
};
@@ -132,11 +135,11 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <24000 1000>;
+ reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <20 8 21 8 22 8>;
- interrupt-parent = < &ipic >;
- phy-handle = < &phy1c >;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy1c>;
linux,network-index = <0>;
};
@@ -145,12 +148,12 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <25000 1000>;
+ reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <23 8 24 8 25 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
+ interrupt-parent = <&ipic>;
/* Vitesse 7385 isn't on the MDIO bus */
- fixed-link = <1 1 d#1000 0 0>;
+ fixed-link = <1 1 1000 0 0>;
linux,network-index = <1>;
};
@@ -158,88 +161,88 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>; // from bootloader
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>; // from bootloader
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
- descriptor-types-mask = <01010ebf>;
+ channel-fifo-len = <24>;
+ exec-units-mask = <0x0000007e>;
+ descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x10 - SATA */
- 8000 0 0 1 &ipic 16 8 /* SATA_INTA */
+ 0x8000 0x0 0x0 0x1 &ipic 22 0x8 /* SATA_INTA */
>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
- bus-range = <0 0>;
- ranges = <42000000 0 80000000 80000000 0 10000000
- 02000000 0 90000000 90000000 0 10000000
- 01000000 0 00000000 e2000000 0 01000000>;
- clock-frequency = <3f940aa>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
pci1: pci@e0008600 {
cell-index = <2>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0E - MiniPCI Slot */
- 7000 0 0 1 &ipic 15 8 /* PCI_INTA */
+ 0x7000 0x0 0x0 0x1 &ipic 21 0x8 /* PCI_INTA */
/* IDSEL 0x0F - PCI Slot */
- 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
- 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
- >;
- interrupt-parent = < &ipic >;
- interrupts = <43 8>;
- bus-range = <0 0>;
- ranges = <42000000 0 a0000000 a0000000 0 10000000
- 02000000 0 b0000000 b0000000 0 10000000
- 01000000 0 00000000 e3000000 0 01000000>;
- clock-frequency = <3f940aa>;
+ 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
+ 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
+ >;
+ interrupt-parent = <&ipic>;
+ interrupts = <67 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008600 100>;
+ reg = <0xe0008600 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
@@ -249,15 +252,15 @@
#size-cells = <1>;
compatible = "fsl,mpc8349e-localbus",
"fsl,pq2pro-localbus";
- reg = <e0005000 d8>;
- ranges = <3 0 f0000000 210>;
+ reg = <0xe0005000 0xd8>;
+ ranges = <0x3 0x0 0xf0000000 0x210>;
pata@3,0 {
compatible = "fsl,mpc8349emitx-pata", "ata-generic";
- reg = <3 0 10 3 20c 4>;
+ reg = <0x3 0x0 0x10 0x3 0x20c 0x4>;
reg-shift = <1>;
pio-mode = <6>;
- interrupts = <17 8>;
+ interrupts = <23 0x8>;
interrupt-parent = <&ipic>;
};
};
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index 79983d7..f81d735 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -8,6 +8,9 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
+
+/dts-v1/;
+
/ {
model = "MPC8349EMITXGP";
compatible = "MPC8349EMITXGP", "MPC834xMITX", "MPC83xxMITX";
@@ -27,11 +30,11 @@
PowerPC,8349@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <20>;
- i-cache-line-size = <20>;
- d-cache-size = <8000>;
- i-cache-size = <8000>;
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -40,21 +43,21 @@
memory {
device_type = "memory";
- reg = <00000000 10000000>;
+ reg = <0x00000000 0x10000000>;
};
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
bus-frequency = <0>; // from bootloader
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -62,9 +65,9 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -73,28 +76,28 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
spi@7000 {
cell-index = <0>;
compatible = "fsl,spi";
- reg = <7000 1000>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x7000 0x1000>;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
usb@23000 {
compatible = "fsl-usb2-dr";
- reg = <23000 1000>;
+ reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <26 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@@ -103,13 +106,13 @@
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,gianfar-mdio";
- reg = <24520 20>;
+ reg = <0x24520 0x20>;
/* Vitesse 8201 */
phy1c: ethernet-phy@1c {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
- reg = <1c>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x1c>;
device_type = "ethernet-phy";
};
};
@@ -119,11 +122,11 @@
device_type = "network";
model = "TSEC";
compatible = "gianfar";
- reg = <24000 1000>;
+ reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <20 8 21 8 22 8>;
- interrupt-parent = < &ipic >;
- phy-handle = < &phy1c >;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy1c>;
linux,network-index = <0>;
};
@@ -131,63 +134,63 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
+ reg = <0x4500 0x100>;
clock-frequency = <0>; // from bootloader
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
+ reg = <0x4600 0x100>;
clock-frequency = <0>; // from bootloader
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
- descriptor-types-mask = <01010ebf>;
+ channel-fifo-len = <24>;
+ exec-units-mask = <0x0000007e>;
+ descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
};
pci0: pci@e0008600 {
cell-index = <2>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x0F - PCI Slot */
- 7800 0 0 1 &ipic 14 8 /* PCI_INTA */
- 7800 0 0 2 &ipic 15 8 /* PCI_INTB */
+ 0x7800 0x0 0x0 0x1 &ipic 20 0x8 /* PCI_INTA */
+ 0x7800 0x0 0x0 0x2 &ipic 21 0x8 /* PCI_INTB */
>;
- interrupt-parent = < &ipic >;
- interrupts = <43 8>;
- bus-range = <1 1>;
- ranges = <42000000 0 a0000000 a0000000 0 10000000
- 02000000 0 b0000000 b0000000 0 10000000
- 01000000 0 00000000 e3000000 0 01000000>;
- clock-frequency = <3f940aa>;
+ interrupt-parent = <&ipic>;
+ interrupts = <67 0x8>;
+ bus-range = <0x1 0x1>;
+ ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe3000000 0x0 0x01000000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008600 100>;
+ reg = <0xe0008600 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 8faa8bd..7480eda 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -32,7 +32,7 @@
PowerPC,8349@0 {
device_type = "cpu";
- reg = <0>;
+ reg = <0x0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <32768>;
@@ -73,7 +73,7 @@
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <14 8>;
+ interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
@@ -89,7 +89,7 @@
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
- interrupts = <15 8>;
+ interrupts = <15 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
};
@@ -98,7 +98,7 @@
cell-index = <0>;
compatible = "fsl,spi";
reg = <0x7000 0x1000>;
- interrupts = <16 8>;
+ interrupts = <16 0x8>;
interrupt-parent = <&ipic>;
mode = "cpu";
};
@@ -111,7 +111,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&ipic>;
- interrupts = <39 8>;
+ interrupts = <39 0x8>;
phy_type = "ulpi";
port1;
};
@@ -122,7 +122,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&ipic>;
- interrupts = <38 8>;
+ interrupts = <38 0x8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@@ -135,13 +135,13 @@
phy0: ethernet-phy@0 {
interrupt-parent = <&ipic>;
- interrupts = <17 8>;
+ interrupts = <17 0x8>;
reg = <0x0>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@1 {
interrupt-parent = <&ipic>;
- interrupts = <18 8>;
+ interrupts = <18 0x8>;
reg = <0x1>;
device_type = "ethernet-phy";
};
@@ -154,7 +154,7 @@
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <32 8 33 8 34 8>;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
interrupt-parent = <&ipic>;
phy-handle = <&phy0>;
linux,network-index = <0>;
@@ -167,7 +167,7 @@
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <35 8 36 8 37 8>;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
interrupt-parent = <&ipic>;
phy-handle = <&phy1>;
linux,network-index = <1>;
@@ -179,7 +179,7 @@
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
+ interrupts = <9 0x8>;
interrupt-parent = <&ipic>;
};
@@ -189,7 +189,7 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <10 8>;
+ interrupts = <10 0x8>;
interrupt-parent = <&ipic>;
};
@@ -199,10 +199,10 @@
model = "SEC2";
compatible = "talitos";
reg = <0x30000 0x10000>;
- interrupts = <11 8>;
+ interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <0x18>;
+ channel-fifo-len = <24>;
exec-units-mask = <0x0000007e>;
/* desc mask is for rev2.0,
* we need runtime fixup for >2.0 */
@@ -269,9 +269,9 @@
0xc000 0x0 0x0 0x1 &ipic 21 0x8
0xc000 0x0 0x0 0x2 &ipic 22 0x8
0xc000 0x0 0x0 0x3 &ipic 23 0x8
- 0xc000 0x0 0x0 0x4 &ipic 20 8>;
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
interrupt-parent = <&ipic>;
- interrupts = <66 8>;
+ interrupts = <66 0x8>;
bus-range = <0 0>;
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
@@ -330,9 +330,9 @@
0xc000 0x0 0x0 0x1 &ipic 21 0x8
0xc000 0x0 0x0 0x2 &ipic 22 0x8
0xc000 0x0 0x0 0x3 &ipic 23 0x8
- 0xc000 0x0 0x0 0x4 &ipic 20 8>;
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
interrupt-parent = <&ipic>;
- interrupts = <66 8>;
+ interrupts = <66 0x8>;
bus-range = <0 0>;
ranges = <0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index dc6caf0..55f03e8 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -14,6 +14,8 @@
/memreserve/ 00000000 1000000;
*/
+/dts-v1/;
+
/ {
model = "MPC8360MDS";
compatible = "MPC8360EMDS", "MPC836xMDS", "MPC83xxMDS";
@@ -34,39 +36,39 @@
PowerPC,8360@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <8000>; // L1, 32K
- i-cache-size = <8000>; // L1, 32K
- timebase-frequency = <3EF1480>;
- bus-frequency = <FBC5200>;
- clock-frequency = <1F78A400>;
+ reg = <0x0>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <32768>; // L1, 32K
+ i-cache-size = <32768>; // L1, 32K
+ timebase-frequency = <66000000>;
+ bus-frequency = <264000000>;
+ clock-frequency = <528000000>;
};
};
memory {
device_type = "memory";
- reg = <00000000 10000000>;
+ reg = <0x00000000 0x10000000>;
};
bcsr@f8000000 {
device_type = "board-control";
- reg = <f8000000 8000>;
+ reg = <0xf8000000 0x8000>;
};
soc8360@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 e0000000 00100000>;
- reg = <e0000000 00000200>;
- bus-frequency = <FBC5200>;
+ ranges = <0x0 0xe0000000 0x00100000>;
+ reg = <0xe0000000 0x00000200>;
+ bus-frequency = <264000000>;
wdt@200 {
device_type = "watchdog";
compatible = "mpc83xx_wdt";
- reg = <200 100>;
+ reg = <0x200 0x100>;
};
i2c@3000 {
@@ -74,14 +76,14 @@
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <3000 100>;
- interrupts = <e 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3000 0x100>;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
compatible = "dallas,ds1374";
- reg = <68>;
+ reg = <0x68>;
};
};
@@ -90,9 +92,9 @@
#size-cells = <0>;
cell-index = <1>;
compatible = "fsl-i2c";
- reg = <3100 100>;
- interrupts = <f 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x3100 0x100>;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -100,46 +102,46 @@
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <4500 100>;
- clock-frequency = <FBC5200>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x4500 0x100>;
+ clock-frequency = <264000000>;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <4600 100>;
- clock-frequency = <FBC5200>;
- interrupts = <a 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x4600 0x100>;
+ clock-frequency = <264000000>;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
device_type = "crypto";
model = "SEC2";
compatible = "talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
- interrupt-parent = < &ipic >;
+ reg = <0x30000 0x10000>;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
+ channel-fifo-len = <24>;
+ exec-units-mask = <0x0000007e>;
/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
- descriptor-types-mask = <01010ebf>;
+ descriptor-types-mask = <0x01010ebf>;
};
ipic: pic@700 {
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <700 100>;
+ reg = <0x700 0x100>;
device_type = "ipic";
};
par_io@1400 {
- reg = <1400 100>;
+ reg = <0x1400 0x100>;
device_type = "par_io";
num-ports = <7>;
@@ -153,19 +155,19 @@
1 6 1 0 3 0 /* TxD4 */
1 7 1 0 1 0 /* TxD5 */
1 9 1 0 2 0 /* TxD6 */
- 1 a 1 0 2 0 /* TxD7 */
+ 1 10 1 0 2 0 /* TxD7 */
0 9 2 0 1 0 /* RxD0 */
- 0 a 2 0 1 0 /* RxD1 */
- 0 b 2 0 1 0 /* RxD2 */
- 0 c 2 0 1 0 /* RxD3 */
- 0 d 2 0 1 0 /* RxD4 */
+ 0 10 2 0 1 0 /* RxD1 */
+ 0 11 2 0 1 0 /* RxD2 */
+ 0 12 2 0 1 0 /* RxD3 */
+ 0 13 2 0 1 0 /* RxD4 */
1 1 2 0 2 0 /* RxD5 */
1 0 2 0 2 0 /* RxD6 */
1 4 2 0 2 0 /* RxD7 */
0 7 1 0 1 0 /* TX_EN */
0 8 1 0 1 0 /* TX_ER */
- 0 f 2 0 1 0 /* RX_DV */
- 0 10 2 0 1 0 /* RX_ER */
+ 0 15 2 0 1 0 /* RX_DV */
+ 0 16 2 0 1 0 /* RX_ER */
0 0 2 0 1 0 /* RX_CLK */
2 9 1 0 3 0 /* GTX_CLK - CLK10 */
2 8 2 0 1 0>; /* GTX125 - CLK9 */
@@ -173,27 +175,27 @@
pio2: ucc_pin@02 {
pio-map = <
/* port pin dir open_drain assignment has_irq */
- 0 11 1 0 1 0 /* TxD0 */
- 0 12 1 0 1 0 /* TxD1 */
- 0 13 1 0 1 0 /* TxD2 */
- 0 14 1 0 1 0 /* TxD3 */
+ 0 17 1 0 1 0 /* TxD0 */
+ 0 18 1 0 1 0 /* TxD1 */
+ 0 19 1 0 1 0 /* TxD2 */
+ 0 20 1 0 1 0 /* TxD3 */
1 2 1 0 1 0 /* TxD4 */
1 3 1 0 2 0 /* TxD5 */
1 5 1 0 3 0 /* TxD6 */
1 8 1 0 3 0 /* TxD7 */
- 0 17 2 0 1 0 /* RxD0 */
- 0 18 2 0 1 0 /* RxD1 */
- 0 19 2 0 1 0 /* RxD2 */
- 0 1a 2 0 1 0 /* RxD3 */
- 0 1b 2 0 1 0 /* RxD4 */
- 1 c 2 0 2 0 /* RxD5 */
- 1 d 2 0 3 0 /* RxD6 */
- 1 b 2 0 2 0 /* RxD7 */
- 0 15 1 0 1 0 /* TX_EN */
- 0 16 1 0 1 0 /* TX_ER */
- 0 1d 2 0 1 0 /* RX_DV */
- 0 1e 2 0 1 0 /* RX_ER */
- 0 1f 2 0 1 0 /* RX_CLK */
+ 0 23 2 0 1 0 /* RxD0 */
+ 0 24 2 0 1 0 /* RxD1 */
+ 0 25 2 0 1 0 /* RxD2 */
+ 0 26 2 0 1 0 /* RxD3 */
+ 0 27 2 0 1 0 /* RxD4 */
+ 1 12 2 0 2 0 /* RxD5 */
+ 1 13 2 0 3 0 /* RxD6 */
+ 1 11 2 0 2 0 /* RxD7 */
+ 0 21 1 0 1 0 /* TX_EN */
+ 0 22 1 0 1 0 /* TX_ER */
+ 0 29 2 0 1 0 /* RX_DV */
+ 0 30 2 0 1 0 /* RX_ER */
+ 0 31 2 0 1 0 /* RX_CLK */
2 2 1 0 2 0 /* GTX_CLK - CLK10 */
2 3 2 0 1 0 /* GTX125 - CLK4 */
0 1 3 0 2 0 /* MDIO */
@@ -208,47 +210,47 @@
#size-cells = <1>;
device_type = "qe";
compatible = "fsl,qe";
- ranges = <0 e0100000 00100000>;
- reg = <e0100000 480>;
+ ranges = <0x0 0xe0100000 0x00100000>;
+ reg = <0xe0100000 0x480>;
brg-frequency = <0>;
- bus-frequency = <179A7B00>;
+ bus-frequency = <396000000>;
muram@10000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,qe-muram", "fsl,cpm-muram";
- ranges = <0 00010000 0000c000>;
+ ranges = <0x0 0x00010000 0x0000c000>;
data-only@0 {
compatible = "fsl,qe-muram-data",
"fsl,cpm-muram-data";
- reg = <0 c000>;
+ reg = <0x0 0xc000>;
};
};
spi@4c0 {
cell-index = <0>;
compatible = "fsl,spi";
- reg = <4c0 40>;
+ reg = <0x4c0 0x40>;
interrupts = <2>;
- interrupt-parent = < &qeic >;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
spi@500 {
cell-index = <1>;
compatible = "fsl,spi";
- reg = <500 40>;
+ reg = <0x500 0x40>;
interrupts = <1>;
- interrupt-parent = < &qeic >;
+ interrupt-parent = <&qeic>;
mode = "cpu";
};
usb@6c0 {
compatible = "qe_udc";
- reg = <6c0 40 8B00 100>;
- interrupts = <b>;
- interrupt-parent = < &qeic >;
+ reg = <0x6c0 0x40 0x8b00 0x100>;
+ interrupts = <11>;
+ interrupt-parent = <&qeic>;
mode = "slave";
};
@@ -258,15 +260,15 @@
model = "UCC";
cell-index = <1>;
device-id = <1>;
- reg = <2000 200>;
- interrupts = <20>;
- interrupt-parent = < &qeic >;
+ reg = <0x2000 0x200>;
+ interrupts = <32>;
+ interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "none";
tx-clock-name = "clk9";
- phy-handle = < &phy0 >;
+ phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
- pio-handle = < &pio1 >;
+ pio-handle = <&pio1>;
};
enet1: ucc@3000 {
@@ -275,33 +277,33 @@
model = "UCC";
cell-index = <2>;
device-id = <2>;
- reg = <3000 200>;
- interrupts = <21>;
- interrupt-parent = < &qeic >;
+ reg = <0x3000 0x200>;
+ interrupts = <33>;
+ interrupt-parent = <&qeic>;
local-mac-address = [ 00 00 00 00 00 00 ];
rx-clock-name = "none";
tx-clock-name = "clk4";
- phy-handle = < &phy1 >;
+ phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
- pio-handle = < &pio2 >;
+ pio-handle = <&pio2>;
};
mdio@2120 {
#address-cells = <1>;
#size-cells = <0>;
- reg = <2120 18>;
+ reg = <0x2120 0x18>;
compatible = "fsl,ucc-mdio";
phy0: ethernet-phy@00 {
- interrupt-parent = < &ipic >;
- interrupts = <11 8>;
- reg = <0>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x0>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@01 {
- interrupt-parent = < &ipic >;
- interrupts = <12 8>;
- reg = <1>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x1>;
device_type = "ethernet-phy";
};
};
@@ -311,70 +313,70 @@
compatible = "fsl,qe-ic";
#address-cells = <0>;
#interrupt-cells = <1>;
- reg = <80 80>;
+ reg = <0x80 0x80>;
big-endian;
- interrupts = <20 8 21 8>; //high:32 low:33
- interrupt-parent = < &ipic >;
+ interrupts = <32 0x8 33 0x8>; // high:32 low:33
+ interrupt-parent = <&ipic>;
};
};
pci0: pci@e0008500 {
cell-index = <1>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 AD17 */
- 8800 0 0 1 &ipic 14 8
- 8800 0 0 2 &ipic 15 8
- 8800 0 0 3 &ipic 16 8
- 8800 0 0 4 &ipic 17 8
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x12 AD18 */
- 9000 0 0 1 &ipic 16 8
- 9000 0 0 2 &ipic 17 8
- 9000 0 0 3 &ipic 14 8
- 9000 0 0 4 &ipic 15 8
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x13 AD19 */
- 9800 0 0 1 &ipic 17 8
- 9800 0 0 2 &ipic 14 8
- 9800 0 0 3 &ipic 15 8
- 9800 0 0 4 &ipic 16 8
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x15 AD21*/
- a800 0 0 1 &ipic 14 8
- a800 0 0 2 &ipic 15 8
- a800 0 0 3 &ipic 16 8
- a800 0 0 4 &ipic 17 8
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x16 AD22*/
- b000 0 0 1 &ipic 17 8
- b000 0 0 2 &ipic 14 8
- b000 0 0 3 &ipic 15 8
- b000 0 0 4 &ipic 16 8
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x17 AD23*/
- b800 0 0 1 &ipic 16 8
- b800 0 0 2 &ipic 17 8
- b800 0 0 3 &ipic 14 8
- b800 0 0 4 &ipic 15 8
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x18 AD24*/
- c000 0 0 1 &ipic 15 8
- c000 0 0 2 &ipic 16 8
- c000 0 0 3 &ipic 17 8
- c000 0 0 4 &ipic 14 8>;
- interrupt-parent = < &ipic >;
- interrupts = <42 8>;
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
bus-range = <0 0>;
- ranges = <02000000 0 a0000000 a0000000 0 10000000
- 42000000 0 80000000 80000000 0 10000000
- 01000000 0 00000000 e2000000 0 00100000>;
- clock-frequency = <3f940aa>;
+ ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
+ clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <e0008500 100>;
+ reg = <0xe0008500 0x100>;
compatible = "fsl,mpc8349-pci";
device_type = "pci";
};
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index 3b9611f..a3637ff 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -31,11 +31,11 @@
PowerPC,8377@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <0x20>;
- i-cache-line-size = <0x20>;
- d-cache-size = <0x8000>; // L1, 32K
- i-cache-size = <0x8000>; // L1, 32K
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
@@ -66,8 +66,8 @@
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <0xe 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -77,8 +77,8 @@
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
- interrupts = <0xf 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -86,8 +86,8 @@
cell-index = <0>;
compatible = "fsl,spi";
reg = <0x7000 0x1000>;
- interrupts = <0x10 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
@@ -97,8 +97,8 @@
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <0x26 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
phy_type = "utmi_wide";
};
@@ -108,15 +108,15 @@
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy2: ethernet-phy@2 {
- interrupt-parent = < &ipic >;
- interrupts = <0x11 0x8>;
- reg = <2>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
- interrupt-parent = < &ipic >;
- interrupts = <0x12 0x8>;
- reg = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x3>;
device_type = "ethernet-phy";
};
};
@@ -128,10 +128,10 @@
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy2 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy2>;
};
enet1: ethernet@25000 {
@@ -141,10 +141,10 @@
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy3 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy3>;
};
serial0: serial@4500 {
@@ -153,8 +153,8 @@
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <0x9 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
@@ -163,19 +163,19 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <0xa 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
model = "SEC3";
compatible = "talitos";
reg = <0x30000 0x10000>;
- interrupts = <0xb 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
- channel-fifo-len = <0x18>;
+ channel-fifo-len = <24>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
};
@@ -184,22 +184,22 @@
model = "eSDHC";
compatible = "fsl,esdhc";
reg = <0x2e000 0x1000>;
- interrupts = <0x2a 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@18000 {
compatible = "fsl,mpc8379-sata";
reg = <0x18000 0x1000>;
- interrupts = <0x2c 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <44 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@19000 {
compatible = "fsl,mpc8379-sata";
reg = <0x19000 0x1000>;
- interrupts = <0x2d 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <45 0x8>;
+ interrupt-parent = <&ipic>;
};
/* IPIC
@@ -223,49 +223,49 @@
interrupt-map = <
/* IDSEL 0x11 */
- 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
- 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
- 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
- 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x12 */
- 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
- 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
- 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
- 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x13 */
- 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
- 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
- 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
- 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x15 */
- 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
- 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
- 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
- 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x16 */
- 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
- 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
- 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
- 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x17 */
- 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
- 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
- 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
- 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x18 */
- 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
- 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
- 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
- 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
- interrupt-parent = < &ipic >;
- interrupts = <0x42 0x8>;
- bus-range = <0 0>;
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 8fe02cc..95b9d50 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -30,7 +30,7 @@
PowerPC,8377@0 {
device_type = "cpu";
- reg = <0>;
+ reg = <0x0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <32768>;
@@ -51,22 +51,22 @@
#size-cells = <1>;
compatible = "fsl,mpc8377-elbc", "fsl,elbc", "simple-bus";
reg = <0xe0005000 0x1000>;
- interrupts = <77 8>;
+ interrupts = <77 0x8>;
interrupt-parent = <&ipic>;
// CS0 and CS1 are swapped when
// booting from nand, but the
// addresses are the same.
- ranges = <0 0 0xfe000000 0x00800000
- 1 0 0xe0600000 0x00008000
- 2 0 0xf0000000 0x00020000
- 3 0 0xfa000000 0x00008000>;
+ ranges = <0x0 0x0 0xfe000000 0x00800000
+ 0x1 0x0 0xe0600000 0x00008000
+ 0x2 0x0 0xf0000000 0x00020000
+ 0x3 0x0 0xfa000000 0x00008000>;
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
- reg = <0 0 0x800000>;
+ reg = <0x0 0x0 0x800000>;
bank-width = <2>;
device-width = <1>;
};
@@ -76,7 +76,7 @@
#size-cells = <1>;
compatible = "fsl,mpc8377-fcm-nand",
"fsl,elbc-fcm-nand";
- reg = <1 0 0x8000>;
+ reg = <0x1 0x0 0x8000>;
u-boot@0 {
reg = <0x0 0x100000>;
@@ -97,7 +97,7 @@
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
- ranges = <0 0xe0000000 0x00100000>;
+ ranges = <0x0 0xe0000000 0x00100000>;
reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
@@ -113,8 +113,8 @@
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <14 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
device_type = "rtc";
@@ -129,8 +129,8 @@
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
- interrupts = <15 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -138,8 +138,8 @@
cell-index = <0>;
compatible = "fsl,spi";
reg = <0x7000 0x1000>;
- interrupts = <16 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
@@ -149,8 +149,8 @@
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <38 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
phy_type = "utmi";
};
@@ -160,15 +160,15 @@
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy2: ethernet-phy@2 {
- interrupt-parent = < &ipic >;
- interrupts = <17 8>;
- reg = <2>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
- interrupt-parent = < &ipic >;
- interrupts = <18 8>;
- reg = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x3>;
device_type = "ethernet-phy";
};
};
@@ -180,10 +180,10 @@
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <32 8 33 8 34 8>;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy2 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy2>;
};
enet1: ethernet@25000 {
@@ -193,10 +193,10 @@
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <35 8 36 8 37 8>;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy3 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy3>;
};
serial0: serial@4500 {
@@ -205,8 +205,8 @@
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
@@ -215,8 +215,8 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
@@ -224,8 +224,8 @@
device_type = "crypto";
compatible = "talitos";
reg = <0x30000 0x10000>;
- interrupts = <11 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <24>;
@@ -236,15 +236,15 @@
sata@18000 {
compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
reg = <0x18000 0x1000>;
- interrupts = <44 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <44 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@19000 {
compatible = "fsl,mpc8377-sata", "fsl,pq-sata";
reg = <0x19000 0x1000>;
- interrupts = <45 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <45 0x8>;
+ interrupt-parent = <&ipic>;
};
/* IPIC
@@ -268,23 +268,23 @@
/* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
/* IDSEL AD14 IRQ6 inta */
- 0x7000 0 0 1 &ipic 22 8
+ 0x7000 0x0 0x0 0x1 &ipic 22 0x8
/* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
- 0x7800 0 0 1 &ipic 21 8
- 0x7800 0 0 2 &ipic 22 8
- 0x7800 0 0 4 &ipic 23 8
+ 0x7800 0x0 0x0 0x1 &ipic 21 0x8
+ 0x7800 0x0 0x0 0x2 &ipic 22 0x8
+ 0x7800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
- 0xE000 0 0 1 &ipic 23 8
- 0xE000 0 0 2 &ipic 21 8
- 0xE000 0 0 3 &ipic 22 8>;
- interrupt-parent = < &ipic >;
- interrupts = <66 8>;
+ 0xE000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xE000 0x0 0x0 0x2 &ipic 21 0x8
+ 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
bus-range = <0 0>;
- ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
- 0x42000000 0 0x80000000 0x80000000 0 0x10000000
- 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 386f4a0..533e9b0 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -31,11 +31,11 @@
PowerPC,8378@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <0x20>;
- i-cache-line-size = <0x20>;
- d-cache-size = <0x8000>; // L1, 32K
- i-cache-size = <0x8000>; // L1, 32K
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
@@ -66,8 +66,8 @@
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <0xe 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -77,8 +77,8 @@
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
- interrupts = <0xf 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -86,8 +86,8 @@
cell-index = <0>;
compatible = "fsl,spi";
reg = <0x7000 0x1000>;
- interrupts = <0x10 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
@@ -97,8 +97,8 @@
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <0x26 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
phy_type = "utmi_wide";
};
@@ -108,15 +108,15 @@
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy2: ethernet-phy@2 {
- interrupt-parent = < &ipic >;
- interrupts = <0x11 0x8>;
- reg = <2>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
- interrupt-parent = < &ipic >;
- interrupts = <0x12 0x8>;
- reg = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x3>;
device_type = "ethernet-phy";
};
};
@@ -128,10 +128,10 @@
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy2 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy2>;
};
enet1: ethernet@25000 {
@@ -141,10 +141,10 @@
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy3 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy3>;
};
serial0: serial@4500 {
@@ -153,8 +153,8 @@
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <0x9 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
@@ -163,19 +163,19 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <0xa 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
model = "SEC3";
compatible = "talitos";
reg = <0x30000 0x10000>;
- interrupts = <0xb 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
- channel-fifo-len = <0x18>;
+ channel-fifo-len = <24>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
};
@@ -184,8 +184,8 @@
model = "eSDHC";
compatible = "fsl,esdhc";
reg = <0x2e000 0x1000>;
- interrupts = <0x2a 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
};
/* IPIC
@@ -209,49 +209,49 @@
interrupt-map = <
/* IDSEL 0x11 */
- 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
- 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
- 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
- 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x12 */
- 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
- 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
- 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
- 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x13 */
- 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
- 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
- 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
- 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x15 */
- 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
- 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
- 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
- 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x16 */
- 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
- 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
- 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
- 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x17 */
- 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
- 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
- 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
- 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x18 */
- 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
- 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
- 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
- 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
- interrupt-parent = < &ipic >;
- interrupts = <0x42 0x8>;
- bus-range = <0 0>;
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 33d490b..c4fc7d6 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -30,7 +30,7 @@
PowerPC,8378@0 {
device_type = "cpu";
- reg = <0>;
+ reg = <0x0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <32768>;
@@ -51,22 +51,22 @@
#size-cells = <1>;
compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus";
reg = <0xe0005000 0x1000>;
- interrupts = <77 8>;
+ interrupts = <77 0x8>;
interrupt-parent = <&ipic>;
// CS0 and CS1 are swapped when
// booting from nand, but the
// addresses are the same.
- ranges = <0 0 0xfe000000 0x00800000
- 1 0 0xe0600000 0x00008000
- 2 0 0xf0000000 0x00020000
- 3 0 0xfa000000 0x00008000>;
+ ranges = <0x0 0x0 0xfe000000 0x00800000
+ 0x1 0x0 0xe0600000 0x00008000
+ 0x2 0x0 0xf0000000 0x00020000
+ 0x3 0x0 0xfa000000 0x00008000>;
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
- reg = <0 0 0x800000>;
+ reg = <0x0 0x0 0x800000>;
bank-width = <2>;
device-width = <1>;
};
@@ -76,7 +76,7 @@
#size-cells = <1>;
compatible = "fsl,mpc8378-fcm-nand",
"fsl,elbc-fcm-nand";
- reg = <1 0 0x8000>;
+ reg = <0x1 0x0 0x8000>;
u-boot@0 {
reg = <0x0 0x100000>;
@@ -97,7 +97,7 @@
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
- ranges = <0 0xe0000000 0x00100000>;
+ ranges = <0x0 0xe0000000 0x00100000>;
reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
@@ -113,8 +113,8 @@
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <14 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
device_type = "rtc";
@@ -129,8 +129,8 @@
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
- interrupts = <15 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -138,8 +138,8 @@
cell-index = <0>;
compatible = "fsl,spi";
reg = <0x7000 0x1000>;
- interrupts = <16 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
@@ -149,8 +149,8 @@
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <38 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
phy_type = "utmi";
};
@@ -160,15 +160,15 @@
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy2: ethernet-phy@2 {
- interrupt-parent = < &ipic >;
- interrupts = <17 8>;
- reg = <2>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
- interrupt-parent = < &ipic >;
- interrupts = <18 8>;
- reg = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x3>;
device_type = "ethernet-phy";
};
};
@@ -180,10 +180,10 @@
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <32 8 33 8 34 8>;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy2 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy2>;
};
enet1: ethernet@25000 {
@@ -193,10 +193,10 @@
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <35 8 36 8 37 8>;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy3 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy3>;
};
serial0: serial@4500 {
@@ -205,8 +205,8 @@
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
@@ -215,8 +215,8 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
@@ -224,8 +224,8 @@
device_type = "crypto";
compatible = "talitos";
reg = <0x30000 0x10000>;
- interrupts = <11 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <24>;
@@ -254,23 +254,23 @@
/* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
/* IDSEL AD14 IRQ6 inta */
- 0x7000 0 0 1 &ipic 22 8
+ 0x7000 0x0 0x0 0x1 &ipic 22 0x8
/* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
- 0x7800 0 0 1 &ipic 21 8
- 0x7800 0 0 2 &ipic 22 8
- 0x7800 0 0 4 &ipic 23 8
+ 0x7800 0x0 0x0 0x1 &ipic 21 0x8
+ 0x7800 0x0 0x0 0x2 &ipic 22 0x8
+ 0x7800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
- 0xE000 0 0 1 &ipic 23 8
- 0xE000 0 0 2 &ipic 21 8
- 0xE000 0 0 3 &ipic 22 8>;
- interrupt-parent = < &ipic >;
- interrupts = <66 8>;
+ 0xE000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xE000 0x0 0x0 0x2 &ipic 21 0x8
+ 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
bus-range = <0 0>;
- ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
- 0x42000000 0 0x80000000 0x80000000 0 0x10000000
- 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index da9931b..c270685 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -31,11 +31,11 @@
PowerPC,8379@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <0x20>;
- i-cache-line-size = <0x20>;
- d-cache-size = <0x8000>; // L1, 32K
- i-cache-size = <0x8000>; // L1, 32K
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
@@ -66,8 +66,8 @@
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <0xe 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -77,8 +77,8 @@
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
- interrupts = <0xf 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -86,8 +86,8 @@
cell-index = <0>;
compatible = "fsl,spi";
reg = <0x7000 0x1000>;
- interrupts = <0x10 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
@@ -97,8 +97,8 @@
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <0x26 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
phy_type = "utmi_wide";
};
@@ -108,15 +108,15 @@
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy2: ethernet-phy@2 {
- interrupt-parent = < &ipic >;
- interrupts = <0x11 0x8>;
- reg = <2>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
- interrupt-parent = < &ipic >;
- interrupts = <0x12 0x8>;
- reg = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x3>;
device_type = "ethernet-phy";
};
};
@@ -128,10 +128,10 @@
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy2 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy2>;
};
enet1: ethernet@25000 {
@@ -141,10 +141,10 @@
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy3 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy3>;
};
serial0: serial@4500 {
@@ -153,8 +153,8 @@
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <0x9 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
@@ -163,19 +163,19 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <0xa 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
model = "SEC3";
compatible = "talitos";
reg = <0x30000 0x10000>;
- interrupts = <0xb 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
- channel-fifo-len = <0x18>;
+ channel-fifo-len = <24>;
exec-units-mask = <0x000001fe>;
descriptor-types-mask = <0x03ab0ebf>;
};
@@ -184,36 +184,36 @@
model = "eSDHC";
compatible = "fsl,esdhc";
reg = <0x2e000 0x1000>;
- interrupts = <0x2a 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <42 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@18000 {
compatible = "fsl,mpc8379-sata";
reg = <0x18000 0x1000>;
- interrupts = <0x2c 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <44 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@19000 {
compatible = "fsl,mpc8379-sata";
reg = <0x19000 0x1000>;
- interrupts = <0x2d 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <45 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@1a000 {
compatible = "fsl,mpc8379-sata";
reg = <0x1a000 0x1000>;
- interrupts = <0x2e 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <46 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@1b000 {
compatible = "fsl,mpc8379-sata";
reg = <0x1b000 0x1000>;
- interrupts = <0x2f 0x8>;
- interrupt-parent = < &ipic >;
+ interrupts = <47 0x8>;
+ interrupt-parent = <&ipic>;
};
/* IPIC
@@ -237,49 +237,49 @@
interrupt-map = <
/* IDSEL 0x11 */
- 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
- 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
- 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
- 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x12 */
- 0x9000 0x0 0x0 0x1 &ipic 0x16 0x8
- 0x9000 0x0 0x0 0x2 &ipic 0x17 0x8
- 0x9000 0x0 0x0 0x3 &ipic 0x14 0x8
- 0x9000 0x0 0x0 0x4 &ipic 0x15 0x8
+ 0x9000 0x0 0x0 0x1 &ipic 22 0x8
+ 0x9000 0x0 0x0 0x2 &ipic 23 0x8
+ 0x9000 0x0 0x0 0x3 &ipic 20 0x8
+ 0x9000 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x13 */
- 0x9800 0x0 0x0 0x1 &ipic 0x17 0x8
- 0x9800 0x0 0x0 0x2 &ipic 0x14 0x8
- 0x9800 0x0 0x0 0x3 &ipic 0x15 0x8
- 0x9800 0x0 0x0 0x4 &ipic 0x16 0x8
+ 0x9800 0x0 0x0 0x1 &ipic 23 0x8
+ 0x9800 0x0 0x0 0x2 &ipic 20 0x8
+ 0x9800 0x0 0x0 0x3 &ipic 21 0x8
+ 0x9800 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x15 */
- 0xa800 0x0 0x0 0x1 &ipic 0x14 0x8
- 0xa800 0x0 0x0 0x2 &ipic 0x15 0x8
- 0xa800 0x0 0x0 0x3 &ipic 0x16 0x8
- 0xa800 0x0 0x0 0x4 &ipic 0x17 0x8
+ 0xa800 0x0 0x0 0x1 &ipic 20 0x8
+ 0xa800 0x0 0x0 0x2 &ipic 21 0x8
+ 0xa800 0x0 0x0 0x3 &ipic 22 0x8
+ 0xa800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL 0x16 */
- 0xb000 0x0 0x0 0x1 &ipic 0x17 0x8
- 0xb000 0x0 0x0 0x2 &ipic 0x14 0x8
- 0xb000 0x0 0x0 0x3 &ipic 0x15 0x8
- 0xb000 0x0 0x0 0x4 &ipic 0x16 0x8
+ 0xb000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xb000 0x0 0x0 0x2 &ipic 20 0x8
+ 0xb000 0x0 0x0 0x3 &ipic 21 0x8
+ 0xb000 0x0 0x0 0x4 &ipic 22 0x8
/* IDSEL 0x17 */
- 0xb800 0x0 0x0 0x1 &ipic 0x16 0x8
- 0xb800 0x0 0x0 0x2 &ipic 0x17 0x8
- 0xb800 0x0 0x0 0x3 &ipic 0x14 0x8
- 0xb800 0x0 0x0 0x4 &ipic 0x15 0x8
+ 0xb800 0x0 0x0 0x1 &ipic 22 0x8
+ 0xb800 0x0 0x0 0x2 &ipic 23 0x8
+ 0xb800 0x0 0x0 0x3 &ipic 20 0x8
+ 0xb800 0x0 0x0 0x4 &ipic 21 0x8
/* IDSEL 0x18 */
- 0xc000 0x0 0x0 0x1 &ipic 0x15 0x8
- 0xc000 0x0 0x0 0x2 &ipic 0x16 0x8
- 0xc000 0x0 0x0 0x3 &ipic 0x17 0x8
- 0xc000 0x0 0x0 0x4 &ipic 0x14 0x8>;
- interrupt-parent = < &ipic >;
- interrupts = <0x42 0x8>;
- bus-range = <0 0>;
+ 0xc000 0x0 0x0 0x1 &ipic 21 0x8
+ 0xc000 0x0 0x0 0x2 &ipic 22 0x8
+ 0xc000 0x0 0x0 0x3 &ipic 23 0x8
+ 0xc000 0x0 0x0 0x4 &ipic 20 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>;
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index a81e916..3e193fd 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -30,7 +30,7 @@
PowerPC,8379@0 {
device_type = "cpu";
- reg = <0>;
+ reg = <0x0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;
d-cache-size = <32768>;
@@ -51,22 +51,22 @@
#size-cells = <1>;
compatible = "fsl,mpc8379-elbc", "fsl,elbc", "simple-bus";
reg = <0xe0005000 0x1000>;
- interrupts = <77 8>;
+ interrupts = <77 0x8>;
interrupt-parent = <&ipic>;
// CS0 and CS1 are swapped when
// booting from nand, but the
// addresses are the same.
- ranges = <0 0 0xfe000000 0x00800000
- 1 0 0xe0600000 0x00008000
- 2 0 0xf0000000 0x00020000
- 3 0 0xfa000000 0x00008000>;
+ ranges = <0x0 0x0 0xfe000000 0x00800000
+ 0x1 0x0 0xe0600000 0x00008000
+ 0x2 0x0 0xf0000000 0x00020000
+ 0x3 0x0 0xfa000000 0x00008000>;
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
- reg = <0 0 0x800000>;
+ reg = <0x0 0x0 0x800000>;
bank-width = <2>;
device-width = <1>;
};
@@ -76,7 +76,7 @@
#size-cells = <1>;
compatible = "fsl,mpc8379-fcm-nand",
"fsl,elbc-fcm-nand";
- reg = <1 0 0x8000>;
+ reg = <0x1 0x0 0x8000>;
u-boot@0 {
reg = <0x0 0x100000>;
@@ -97,7 +97,7 @@
#size-cells = <1>;
device_type = "soc";
compatible = "simple-bus";
- ranges = <0 0xe0000000 0x00100000>;
+ ranges = <0x0 0xe0000000 0x00100000>;
reg = <0xe0000000 0x00000200>;
bus-frequency = <0>;
@@ -113,8 +113,8 @@
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <14 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <14 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
rtc@68 {
device_type = "rtc";
@@ -129,8 +129,8 @@
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
- interrupts = <15 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <15 0x8>;
+ interrupt-parent = <&ipic>;
dfsrr;
};
@@ -138,8 +138,8 @@
cell-index = <0>;
compatible = "fsl,spi";
reg = <0x7000 0x1000>;
- interrupts = <16 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <16 0x8>;
+ interrupt-parent = <&ipic>;
mode = "cpu";
};
@@ -149,8 +149,8 @@
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
- interrupt-parent = < &ipic >;
- interrupts = <38 8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <38 0x8>;
phy_type = "utmi";
};
@@ -160,15 +160,15 @@
compatible = "fsl,gianfar-mdio";
reg = <0x24520 0x20>;
phy2: ethernet-phy@2 {
- interrupt-parent = < &ipic >;
- interrupts = <17 8>;
- reg = <2>;
+ interrupt-parent = <&ipic>;
+ interrupts = <17 0x8>;
+ reg = <0x2>;
device_type = "ethernet-phy";
};
phy3: ethernet-phy@3 {
- interrupt-parent = < &ipic >;
- interrupts = <18 8>;
- reg = <3>;
+ interrupt-parent = <&ipic>;
+ interrupts = <18 0x8>;
+ reg = <0x3>;
device_type = "ethernet-phy";
};
};
@@ -180,10 +180,10 @@
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <32 8 33 8 34 8>;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy2 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy2>;
};
enet1: ethernet@25000 {
@@ -193,10 +193,10 @@
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <35 8 36 8 37 8>;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
phy-connection-type = "mii";
- interrupt-parent = < &ipic >;
- phy-handle = < &phy3 >;
+ interrupt-parent = <&ipic>;
+ phy-handle = <&phy3>;
};
serial0: serial@4500 {
@@ -205,8 +205,8 @@
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <9 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <9 0x8>;
+ interrupt-parent = <&ipic>;
};
serial1: serial@4600 {
@@ -215,8 +215,8 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <10 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <10 0x8>;
+ interrupt-parent = <&ipic>;
};
crypto@30000 {
@@ -224,8 +224,8 @@
device_type = "crypto";
compatible = "talitos";
reg = <0x30000 0x10000>;
- interrupts = <11 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <11 0x8>;
+ interrupt-parent = <&ipic>;
/* Rev. 3.0 geometry */
num-channels = <4>;
channel-fifo-len = <24>;
@@ -236,29 +236,29 @@
sata@18000 {
compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
reg = <0x18000 0x1000>;
- interrupts = <44 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <44 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@19000 {
compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
reg = <0x19000 0x1000>;
- interrupts = <45 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <45 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@1a000 {
compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
reg = <0x1a000 0x1000>;
- interrupts = <46 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <46 0x8>;
+ interrupt-parent = <&ipic>;
};
sata@1b000 {
compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
reg = <0x1b000 0x1000>;
- interrupts = <47 8>;
- interrupt-parent = < &ipic >;
+ interrupts = <47 0x8>;
+ interrupt-parent = <&ipic>;
};
/* IPIC
@@ -282,23 +282,23 @@
/* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
/* IDSEL AD14 IRQ6 inta */
- 0x7000 0 0 1 &ipic 22 8
+ 0x7000 0x0 0x0 0x1 &ipic 22 0x8
/* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
- 0x7800 0 0 1 &ipic 21 8
- 0x7800 0 0 2 &ipic 22 8
- 0x7800 0 0 4 &ipic 23 8
+ 0x7800 0x0 0x0 0x1 &ipic 21 0x8
+ 0x7800 0x0 0x0 0x2 &ipic 22 0x8
+ 0x7800 0x0 0x0 0x4 &ipic 23 0x8
/* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
- 0xE000 0 0 1 &ipic 23 8
- 0xE000 0 0 2 &ipic 21 8
- 0xE000 0 0 3 &ipic 22 8>;
- interrupt-parent = < &ipic >;
- interrupts = <66 8>;
- bus-range = <0 0>;
- ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
- 0x42000000 0 0x80000000 0x80000000 0 0x10000000
- 0x01000000 0 0x00000000 0xe2000000 0 0x00100000>;
+ 0xE000 0x0 0x0 0x1 &ipic 23 0x8
+ 0xE000 0x0 0x0 0x2 &ipic 21 0x8
+ 0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
+ interrupt-parent = <&ipic>;
+ interrupts = <66 0x8>;
+ bus-range = <0x0 0x0>;
+ ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
+ 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+ 0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
clock-frequency = <66666666>;
#interrupt-cells = <1>;
#size-cells = <2>;
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 0934f54..6b0b699 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -35,11 +35,11 @@
PowerPC,8349@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <0x20>; // 32 bytes
- i-cache-line-size = <0x20>; // 32 bytes
- d-cache-size = <0x8000>; // L1, 32K
- i-cache-size = <0x8000>; // L1, 32K
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <32768>;
+ i-cache-size = <32768>;
timebase-frequency = <0>; // from bootloader
bus-frequency = <0>; // from bootloader
clock-frequency = <0>; // from bootloader
@@ -70,7 +70,7 @@
cell-index = <0>;
compatible = "fsl-i2c";
reg = <0x3000 0x100>;
- interrupts = <0xe 0x8>;
+ interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
};
@@ -81,7 +81,7 @@
cell-index = <1>;
compatible = "fsl-i2c";
reg = <0x3100 0x100>;
- interrupts = <0xf 0x8>;
+ interrupts = <15 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
};
@@ -90,7 +90,7 @@
cell-index = <0>;
compatible = "fsl,spi";
reg = <0x7000 0x1000>;
- interrupts = <0x10 0x8>;
+ interrupts = <16 0x8>;
interrupt-parent = <&ipic>;
mode = "cpu";
};
@@ -103,7 +103,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&ipic>;
- interrupts = <0x27 0x8>;
+ interrupts = <39 0x8>;
phy_type = "ulpi";
port1;
};
@@ -115,7 +115,7 @@
#address-cells = <1>;
#size-cells = <0>;
interrupt-parent = <&ipic>;
- interrupts = <0x26 0x8>;
+ interrupts = <38 0x8>;
dr_mode = "otg";
phy_type = "ulpi";
};
@@ -128,13 +128,13 @@
phy0: ethernet-phy@19 {
interrupt-parent = <&ipic>;
- interrupts = <0x14 0x8>;
+ interrupts = <20 0x8>;
reg = <0x19>;
device_type = "ethernet-phy";
};
phy1: ethernet-phy@1a {
interrupt-parent = <&ipic>;
- interrupts = <0x15 0x8>;
+ interrupts = <21 0x8>;
reg = <0x1a>;
device_type = "ethernet-phy";
};
@@ -147,7 +147,7 @@
compatible = "gianfar";
reg = <0x24000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x20 0x8 0x21 0x8 0x22 0x8>;
+ interrupts = <32 0x8 33 0x8 34 0x8>;
interrupt-parent = <&ipic>;
phy-handle = <&phy0>;
linux,network-index = <0>;
@@ -160,7 +160,7 @@
compatible = "gianfar";
reg = <0x25000 0x1000>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <0x23 0x8 0x24 0x8 0x25 0x8>;
+ interrupts = <35 0x8 36 0x8 37 0x8>;
interrupt-parent = <&ipic>;
phy-handle = <&phy1>;
linux,network-index = <1>;
@@ -172,7 +172,7 @@
compatible = "ns16550";
reg = <0x4500 0x100>;
clock-frequency = <0>;
- interrupts = <0x9 0x8>;
+ interrupts = <9 0x8>;
interrupt-parent = <&ipic>;
};
@@ -182,7 +182,7 @@
compatible = "ns16550";
reg = <0x4600 0x100>;
clock-frequency = <0>;
- interrupts = <0xa 0x8>;
+ interrupts = <10 0x8>;
interrupt-parent = <&ipic>;
};
@@ -191,10 +191,10 @@
model = "SEC2";
compatible = "talitos";
reg = <0x30000 0x10000>;
- interrupts = <0xb 0x8>;
+ interrupts = <11 0x8>;
interrupt-parent = <&ipic>;
num-channels = <4>;
- channel-fifo-len = <0x18>;
+ channel-fifo-len = <24>;
exec-units-mask = <0x0000007e>;
/* desc mask is for rev2.0,
* we need runtime fixup for >2.0 */
@@ -222,10 +222,10 @@
interrupt-map = <
/* IDSEL 0x11 */
- 0x8800 0x0 0x0 0x1 &ipic 0x14 0x8
- 0x8800 0x0 0x0 0x2 &ipic 0x15 0x8
- 0x8800 0x0 0x0 0x3 &ipic 0x16 0x8
- 0x8800 0x0 0x0 0x4 &ipic 0x17 0x8>;
+ 0x8800 0x0 0x0 0x1 &ipic 20 0x8
+ 0x8800 0x0 0x0 0x2 &ipic 21 0x8
+ 0x8800 0x0 0x0 0x3 &ipic 22 0x8
+ 0x8800 0x0 0x0 0x4 &ipic 23 0x8>;
interrupt-parent = <&ipic>;
interrupts = <0x42 0x8>;
--
1.5.4.rc4.gcab31
^ permalink raw reply related
* Re: [Cbe-oss-dev] [PATCH 3/3] Cell IOMMU static mapping support
From: Benjamin Herrenschmidt @ 2008-01-28 21:16 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev, cbe-oss-dev@ozlabs.org, Arnd Bergmann
In-Reply-To: <20080128162343.GA19859@lixom.net>
On Mon, 2008-01-28 at 10:23 -0600, Olof Johansson wrote:
> Ok, makes sense.
>
> I was going to protest the hack for >32GB configs, with the motivation
> that just using the htab-backed window is way too small for such a
> config. However, with 32GB memory and 4K pages, that window is 512MB, so
> we should be fine.
Might be a problem with 64K pages tho... Or do we use the same
calculation ?
In addition, on those blades, really the only device that is limited to
32 bits (and thus is forced to use the iommu remapped region) is USB.
> Having that described in the patch (or at least in the patch description)
> to make it more clear could be good. That, and the fact that the mapping
> is offset on <32GB memory machines, and thus not really a 1:1 mapping.
Should be called a "linear" mapping.
> Does the cell I/O bridge reflect out accesses to 2-4GB on the bus
> again? If not, that could be another place to stick the dynamic range
> for large config machines.
On the PCI bus itself, 2-4GB is where MMIO sits.
Ben.
^ permalink raw reply
* Re: [Cbe-oss-dev] [PATCH 3/3] Cell IOMMU static mapping support
From: Benjamin Herrenschmidt @ 2008-01-28 21:18 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev, cbe-oss-dev, Arnd Bergmann
In-Reply-To: <20080128162343.GA19859@lixom.net>
On Mon, 2008-01-28 at 10:23 -0600, Olof Johansson wrote:
> Having that described in the patch (or at least in the patch
> description)
> to make it more clear could be good. That, and the fact that the
> mapping
> is offset on <32GB memory machines, and thus not really a 1:1 mapping.
It is at an offset still on the PCI bus.
On those, 0...2G will be used to cover the hole, but a different range
higher in the bus space (in 64 bits space) will be use to access the
linear mapping.
Ben.
^ permalink raw reply
* Re: [Cbe-oss-dev] [PATCH 3/3] Cell IOMMU static mapping support
From: Benjamin Herrenschmidt @ 2008-01-28 21:37 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev, cbe-oss-dev@ozlabs.org, Arnd Bergmann
In-Reply-To: <20080128214813.GA24416@lixom.net>
On Mon, 2008-01-28 at 15:48 -0600, Olof Johansson wrote:
> > > Does the cell I/O bridge reflect out accesses to 2-4GB on the bus
> > > again? If not, that could be another place to stick the dynamic range
> > > for large config machines.
> >
> > On the PCI bus itself, 2-4GB is where MMIO sits.
>
> Depending on the implementation, 2-4GB accesses _from_ PCI could mean
> something else.
Not on PCI / PCI-X no. Maybe PCI-E could do that sort of ugly hacks but
that wouldn't be within specs I believe.
> But for most machines it doesn't, and I'm guessing cell
> is one of those.
Ben.
^ permalink raw reply
* Re: [Cbe-oss-dev] [PATCH 3/3] Cell IOMMU static mapping support
From: Olof Johansson @ 2008-01-28 21:48 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, cbe-oss-dev@ozlabs.org, Arnd Bergmann
In-Reply-To: <1201554977.6815.189.camel@pasglop>
On Tue, Jan 29, 2008 at 08:16:17AM +1100, Benjamin Herrenschmidt wrote:
>
> On Mon, 2008-01-28 at 10:23 -0600, Olof Johansson wrote:
> > Ok, makes sense.
> >
> > I was going to protest the hack for >32GB configs, with the motivation
> > that just using the htab-backed window is way too small for such a
> > config. However, with 32GB memory and 4K pages, that window is 512MB, so
> > we should be fine.
>
> Might be a problem with 64K pages tho... Or do we use the same
> calculation ?
The current code is hardcoded at page shift 12. That's probably the
safest thing to do, since even though PAGE_SHIFT might be 16, if we're
doing the software-based 64K approach we can't use a smaller table.
See htab_get_table_size() in arch/powerpc/mm/hash_utils_64.c.
> In addition, on those blades, really the only device that is limited to
> 32 bits (and thus is forced to use the iommu remapped region) is USB.
>
> > Having that described in the patch (or at least in the patch description)
> > to make it more clear could be good. That, and the fact that the mapping
> > is offset on <32GB memory machines, and thus not really a 1:1 mapping.
>
> Should be called a "linear" mapping.
Yep. Linear with a fixed offset.
> > Does the cell I/O bridge reflect out accesses to 2-4GB on the bus
> > again? If not, that could be another place to stick the dynamic range
> > for large config machines.
>
> On the PCI bus itself, 2-4GB is where MMIO sits.
Depending on the implementation, 2-4GB accesses _from_ PCI could mean
something else. But for most machines it doesn't, and I'm guessing cell
is one of those.
-Olof
^ permalink raw reply
* Re: Patches added to for-2.6.25/master branches of powerpc.git
From: Michael Ellerman @ 2008-01-28 22:08 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <200801282119.41403.arnd@arndb.de>
[-- Attachment #1: Type: text/plain, Size: 1208 bytes --]
On Mon, 2008-01-28 at 21:19 +0100, Arnd Bergmann wrote:
> On Sunday 27 January 2008, Michael Ellerman wrote:
> > Can you grab these four assuming there's no objections in the meantime.
> >
> > http://patchwork.ozlabs.org/linuxppc/patch?q=ellerman&id=16430
> > http://patchwork.ozlabs.org/linuxppc/patch?q=ellerman&id=16433
> > http://patchwork.ozlabs.org/linuxppc/patch?q=ellerman&id=16434
> > http://patchwork.ozlabs.org/linuxppc/patch?q=ellerman&id=16437
> >
>
> Yes, they all look good to me, you can add an
> 'Acked-by: Arnd Bergmann <arnd@arndb.de>' if you like.
>
> What about your other series that adds the linear iommu mapping
> for cell blades? Are you still waiting for more feedback and
> testing on that, or can it also go in?
I'd like to clean it up a bit, split the big patch up a bit. I'll try to
do that today or tomorrow. And more testing would definitely be good,
but that's a little tricky from LCA :)
cheers
--
Michael Ellerman
OzLabs, IBM Australia Development Lab
wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* Re: [RFC][PATCH] remove section mappinng
From: Badari Pulavarty @ 2008-01-28 22:19 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linux-mm, linuxppc-dev, anton
In-Reply-To: <18330.35819.738293.742989@cargo.ozlabs.ibm.com>
On Sat, 2008-01-26 at 12:24 +1100, Paul Mackerras wrote:
> Badari Pulavarty writes:
>
> > Here is the code I cooked up, it seems to be working fine.
> > But I have concerns where I need your help.
> >
> > In order to invalidate htab entries, we need to find the "slot".
> > But I can only find the hpte group. Is it okay to invalidate the
> > first entry in the group ? Do I need to invalidate the entire group ?
>
> You do need to find the correct slot. (I suppose you could invalidate
> the entire group, but that would be pretty gross.)
>
> Note that in the CONFIG_DEBUG_PAGEALLOC case we use 4k pages and keep
> a map of the slot numbers in linear_map_hash_slots[]. But in that
> case I assume that the generic code would have already unmapped all
> the pages of the LMB that you're trying to hot-unplug.
>
> In the non-DEBUG_PAGEALLOC case on a System p machine, the hash table
> will be big enough that the linear mapping entries should always be in
> slot 0. So just invalidating slot 0 would probably work in practice,
> but it seems pretty fragile. We might want to use your new
> htab_remove_mapping() function on a bare-metal system with a smaller
> hash table in future, for instance.
>
> Have a look at pSeries_lpar_hpte_updateboltedpp. It calls
> pSeries_lpar_hpte_find to find the slot for a bolted HPTE. You could
> do something similar. In fact maybe the best approach is to do a
> pSeries_lpar_hpte_remove_bolted() and not try to solve the more
> general problem.
Paul,
Thank you for your input and suggestions. Does this look reasonable
to you ?
Thanks,
Badari
For memory remove, we need to clean up htab mappings for the
section of the memory we are removing.
This patch implements support for removing htab bolted mappings
for ppc64 lpar. Other sub-archs, may need to implement similar
functionality for the hotplug memory remove to work.
Signed-off-by: Badari Pulavarty <pbadari@us.ibm.com>
---
arch/powerpc/mm/hash_utils_64.c | 23 +++++++++++++++++++++++
arch/powerpc/platforms/pseries/lpar.c | 15 +++++++++++++++
include/asm-powerpc/machdep.h | 2 ++
include/asm-powerpc/sparsemem.h | 1 +
5 files changed, 44 insertions(+), 1 deletion(-)
Index: linux-2.6.24-rc8/arch/powerpc/mm/hash_utils_64.c
===================================================================
--- linux-2.6.24-rc8.orig/arch/powerpc/mm/hash_utils_64.c 2008-01-25 08:04:32.000000000 -0800
+++ linux-2.6.24-rc8/arch/powerpc/mm/hash_utils_64.c 2008-01-28 11:45:40.000000000 -0800
@@ -191,6 +191,24 @@ int htab_bolt_mapping(unsigned long vsta
return ret < 0 ? ret : 0;
}
+static void htab_remove_mapping(unsigned long vstart, unsigned long vend,
+ int psize, int ssize)
+{
+ unsigned long vaddr;
+ unsigned int step, shift;
+
+ shift = mmu_psize_defs[psize].shift;
+ step = 1 << shift;
+
+ if (!ppc_md.hpte_removebolted) {
+ printk("Sub-arch doesn't implement hpte_removebolted\n");
+ return;
+ }
+
+ for (vaddr = vstart; vaddr < vend; vaddr += step)
+ ppc_md.hpte_removebolted(vaddr, psize, ssize);
+}
+
static int __init htab_dt_scan_seg_sizes(unsigned long node,
const char *uname, int depth,
void *data)
@@ -436,6 +454,11 @@ void create_section_mapping(unsigned lon
_PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX,
mmu_linear_psize, mmu_kernel_ssize));
}
+
+void remove_section_mapping(unsigned long start, unsigned long end)
+{
+ htab_remove_mapping(start, end, mmu_linear_psize, mmu_kernel_ssize);
+}
#endif /* CONFIG_MEMORY_HOTPLUG */
static inline void make_bl(unsigned int *insn_addr, void *func)
Index: linux-2.6.24-rc8/include/asm-powerpc/sparsemem.h
===================================================================
--- linux-2.6.24-rc8.orig/include/asm-powerpc/sparsemem.h 2008-01-15 20:22:48.000000000 -0800
+++ linux-2.6.24-rc8/include/asm-powerpc/sparsemem.h 2008-01-25 08:18:11.000000000 -0800
@@ -20,6 +20,7 @@
#ifdef CONFIG_MEMORY_HOTPLUG
extern void create_section_mapping(unsigned long start, unsigned long end);
+extern void remove_section_mapping(unsigned long start, unsigned long end);
#ifdef CONFIG_NUMA
extern int hot_add_scn_to_nid(unsigned long scn_addr);
#else
Index: linux-2.6.24-rc8/arch/powerpc/platforms/pseries/lpar.c
===================================================================
--- linux-2.6.24-rc8.orig/arch/powerpc/platforms/pseries/lpar.c 2008-01-15 20:22:48.000000000 -0800
+++ linux-2.6.24-rc8/arch/powerpc/platforms/pseries/lpar.c 2008-01-28 14:10:58.000000000 -0800
@@ -520,6 +520,20 @@ static void pSeries_lpar_hpte_invalidate
BUG_ON(lpar_rc != H_SUCCESS);
}
+static void pSeries_lpar_hpte_removebolted(unsigned long ea,
+ int psize, int ssize)
+{
+ unsigned long slot, vsid, va;
+
+ vsid = get_kernel_vsid(ea, ssize);
+ va = hpt_va(ea, vsid, ssize);
+
+ slot = pSeries_lpar_hpte_find(va, psize, ssize);
+ BUG_ON(slot == -1);
+
+ pSeries_lpar_hpte_invalidate(slot, va, psize, ssize, 0);
+}
+
/* Flag bits for H_BULK_REMOVE */
#define HBR_REQUEST 0x4000000000000000UL
#define HBR_RESPONSE 0x8000000000000000UL
@@ -597,6 +611,7 @@ void __init hpte_init_lpar(void)
ppc_md.hpte_updateboltedpp = pSeries_lpar_hpte_updateboltedpp;
ppc_md.hpte_insert = pSeries_lpar_hpte_insert;
ppc_md.hpte_remove = pSeries_lpar_hpte_remove;
+ ppc_md.hpte_removebolted = pSeries_lpar_hpte_removebolted;
ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range;
ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear;
}
Index: linux-2.6.24-rc8/include/asm-powerpc/machdep.h
===================================================================
--- linux-2.6.24-rc8.orig/include/asm-powerpc/machdep.h 2008-01-25 08:04:41.000000000 -0800
+++ linux-2.6.24-rc8/include/asm-powerpc/machdep.h 2008-01-28 11:45:17.000000000 -0800
@@ -68,6 +68,8 @@ struct machdep_calls {
unsigned long vflags,
int psize, int ssize);
long (*hpte_remove)(unsigned long hpte_group);
+ void (*hpte_removebolted)(unsigned long ea,
+ int psize, int ssize);
void (*flush_hash_range)(unsigned long number, int local);
/* special for kexec, to be called in real mode, linar mapping is
^ permalink raw reply
* Please pull from 'for-2.6.25' branch (updated)
From: Kumar Gala @ 2008-01-28 22:17 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Please pull from 'for-2.6.25' branch of
master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git for-2.6.25
to receive the following updates:
Documentation/powerpc/booting-without-of.txt | 177 ++-
arch/powerpc/boot/Makefile | 5
arch/powerpc/boot/cuboot-85xx-cpm2.c | 66 +
arch/powerpc/boot/dts/mpc8313erdb.dts | 156 +-
arch/powerpc/boot/dts/mpc8315erdb.dts | 287 +++++
arch/powerpc/boot/dts/mpc832x_mds.dts | 270 ++--
arch/powerpc/boot/dts/mpc832x_rdb.dts | 177 +--
arch/powerpc/boot/dts/mpc8349emitx.dts | 159 +-
arch/powerpc/boot/dts/mpc8349emitxgp.dts | 113 +-
arch/powerpc/boot/dts/mpc834x_mds.dts | 260 ++--
arch/powerpc/boot/dts/mpc836x_mds.dts | 287 ++---
arch/powerpc/boot/dts/mpc8377_mds.dts | 141 +-
arch/powerpc/boot/dts/mpc8377_rdb.dts | 296 +++++
arch/powerpc/boot/dts/mpc8378_mds.dts | 133 +-
arch/powerpc/boot/dts/mpc8378_rdb.dts | 282 ++++
arch/powerpc/boot/dts/mpc8379_mds.dts | 149 +-
arch/powerpc/boot/dts/mpc8379_rdb.dts | 310 +++++
arch/powerpc/boot/dts/mpc8568mds.dts | 24
arch/powerpc/boot/dts/mpc8610_hpcd.dts | 227 ++--
arch/powerpc/boot/dts/mpc8641_hpcn.dts | 333 ++---
arch/powerpc/boot/dts/sbc8349.dts | 244 ++++
arch/powerpc/boot/dts/sbc8548.dts | 244 ++++
arch/powerpc/boot/dts/sbc8560.dts | 330 +++++
arch/powerpc/boot/dts/storcenter.dts | 73 -
arch/powerpc/boot/dts/stx_gp3_8560.dts | 228 ++++
arch/powerpc/boot/dts/tqm8540.dts | 204 +++
arch/powerpc/boot/dts/tqm8541.dts | 228 ++++
arch/powerpc/boot/dts/tqm8555.dts | 228 ++++
arch/powerpc/boot/dts/tqm8560.dts | 245 ++++
arch/powerpc/boot/libfdt-wrapper.c | 9
arch/powerpc/boot/ops.h | 11
arch/powerpc/configs/mpc8313_rdb_defconfig | 2
arch/powerpc/configs/mpc8315_rdb_defconfig | 1417 +++++++++++++++++++++++++
arch/powerpc/configs/mpc837x_rdb_defconfig | 887 +++++++++++++++
arch/powerpc/configs/mpc83xx_defconfig | 887 +++++++++++++++
arch/powerpc/configs/mpc85xx_defconfig | 1523 +++++++++++++++++++++++++++
arch/powerpc/configs/sbc834x_defconfig | 800 ++++++++++++++
arch/powerpc/configs/sbc8548_defconfig | 741 +++++++++++++
arch/powerpc/configs/sbc8560_defconfig | 764 +++++++++++++
arch/powerpc/configs/stx_gp3_defconfig | 1183 ++++++++++++++++++++
arch/powerpc/configs/tqm8540_defconfig | 1032 ++++++++++++++++++
arch/powerpc/configs/tqm8541_defconfig | 1044 ++++++++++++++++++
arch/powerpc/configs/tqm8555_defconfig | 1044 ++++++++++++++++++
arch/powerpc/configs/tqm8560_defconfig | 1044 ++++++++++++++++++
arch/powerpc/kernel/legacy_serial.c | 45
arch/powerpc/kernel/misc_32.S | 10
arch/powerpc/platforms/82xx/mpc8272_ads.c | 5
arch/powerpc/platforms/82xx/pq2fads.c | 5
arch/powerpc/platforms/83xx/Kconfig | 62 -
arch/powerpc/platforms/83xx/Makefile | 4
arch/powerpc/platforms/83xx/mpc8313_rdb.c | 101 -
arch/powerpc/platforms/83xx/mpc831x_rdb.c | 93 +
arch/powerpc/platforms/83xx/mpc832x_mds.c | 11
arch/powerpc/platforms/83xx/mpc832x_rdb.c | 11
arch/powerpc/platforms/83xx/mpc836x_mds.c | 11
arch/powerpc/platforms/83xx/mpc837x_rdb.c | 99 +
arch/powerpc/platforms/83xx/sbc834x.c | 115 ++
arch/powerpc/platforms/83xx/usb.c | 4
arch/powerpc/platforms/85xx/Kconfig | 87 +
arch/powerpc/platforms/85xx/Makefile | 4
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 32
arch/powerpc/platforms/85xx/sbc8548.c | 167 ++
arch/powerpc/platforms/85xx/sbc8560.c | 283 +++++
arch/powerpc/platforms/85xx/stx_gp3.c | 183 +++
arch/powerpc/platforms/85xx/tqm85xx.c | 187 +++
arch/powerpc/platforms/8xx/ep88xc.c | 5
arch/powerpc/platforms/8xx/m8xx_setup.c | 11
arch/powerpc/platforms/8xx/mpc86xads_setup.c | 8
arch/powerpc/platforms/8xx/mpc885ads_setup.c | 7
arch/powerpc/platforms/8xx/mpc8xx.h | 21
arch/powerpc/platforms/Kconfig | 6
arch/powerpc/platforms/Kconfig.cputype | 10
arch/powerpc/platforms/embedded6xx/ls_uart.c | 5
arch/powerpc/sysdev/Makefile | 4
arch/powerpc/sysdev/commproc.c | 650 -----------
arch/powerpc/sysdev/commproc.h | 12
arch/powerpc/sysdev/cpm1.c | 612 ++++++++++
arch/powerpc/sysdev/cpm2.c | 469 ++++++++
arch/powerpc/sysdev/cpm2_common.c | 470 --------
arch/powerpc/sysdev/fsl_soc.c | 99 +
arch/powerpc/sysdev/ipic.c | 6
arch/powerpc/sysdev/micropatch.c | 2
arch/powerpc/sysdev/mpc8xx_pic.c | 1
arch/powerpc/sysdev/qe_lib/qe.c | 63 -
arch/ppc/8260_io/enet.c | 2
arch/ppc/8xx_io/commproc.c | 40
arch/ppc/8xx_io/enet.c | 6
arch/ppc/8xx_io/fec.c | 2
arch/ppc/8xx_io/micropatch.c | 2
arch/ppc/Kconfig | 91 -
arch/ppc/Makefile | 9
arch/ppc/boot/simple/iic.c | 2
arch/ppc/boot/simple/m8xx_tty.c | 2
arch/ppc/configs/TQM8540_defconfig | 973 -----------------
arch/ppc/configs/TQM8541_defconfig | 986 -----------------
arch/ppc/configs/TQM8555_defconfig | 983 -----------------
arch/ppc/configs/TQM8560_defconfig | 992 -----------------
arch/ppc/configs/mpc834x_sys_defconfig | 844 --------------
arch/ppc/configs/mpc8540_ads_defconfig | 706 ------------
arch/ppc/configs/mpc8548_cds_defconfig | 658 -----------
arch/ppc/configs/mpc8555_cds_defconfig | 784 -------------
arch/ppc/configs/mpc8560_ads_defconfig | 769 -------------
arch/ppc/configs/stx_gp3_defconfig | 989 -----------------
arch/ppc/kernel/Makefile | 1
arch/ppc/kernel/asm-offsets.c | 6
arch/ppc/kernel/entry.S | 12
arch/ppc/kernel/head_booke.h | 55
arch/ppc/kernel/head_fsl_booke.S | 1065 ------------------
arch/ppc/kernel/misc.S | 46
arch/ppc/kernel/ppc_ksyms.c | 11
arch/ppc/kernel/setup.c | 3
arch/ppc/kernel/traps.c | 121 --
arch/ppc/mm/Makefile | 1
arch/ppc/mm/fsl_booke_mmu.c | 236 ----
arch/ppc/mm/init.c | 6
arch/ppc/mm/mmu_context.c | 2
arch/ppc/mm/mmu_decl.h | 6
arch/ppc/mm/pgtable.c | 28
arch/ppc/mm/ppc_mmu.c | 2
arch/ppc/platforms/83xx/Makefile | 4
arch/ppc/platforms/83xx/mpc834x_sys.c | 346 ------
arch/ppc/platforms/83xx/mpc834x_sys.h | 54
arch/ppc/platforms/85xx/Kconfig | 106 -
arch/ppc/platforms/85xx/Makefile | 13
arch/ppc/platforms/85xx/mpc8540_ads.c | 226 ----
arch/ppc/platforms/85xx/mpc8540_ads.h | 22
arch/ppc/platforms/85xx/mpc8555_cds.h | 23
arch/ppc/platforms/85xx/mpc8560_ads.c | 303 -----
arch/ppc/platforms/85xx/mpc8560_ads.h | 24
arch/ppc/platforms/85xx/mpc85xx_ads_common.c | 197 ---
arch/ppc/platforms/85xx/mpc85xx_ads_common.h | 67 -
arch/ppc/platforms/85xx/mpc85xx_cds_common.c | 601 ----------
arch/ppc/platforms/85xx/mpc85xx_cds_common.h | 80 -
arch/ppc/platforms/85xx/sbc8560.c | 234 ----
arch/ppc/platforms/85xx/sbc8560.h | 47
arch/ppc/platforms/85xx/sbc85xx.c | 166 --
arch/ppc/platforms/85xx/sbc85xx.h | 70 -
arch/ppc/platforms/85xx/stx_gp3.c | 339 ------
arch/ppc/platforms/85xx/stx_gp3.h | 69 -
arch/ppc/platforms/85xx/tqm85xx.c | 412 -------
arch/ppc/platforms/85xx/tqm85xx.h | 53
arch/ppc/platforms/mpc866ads_setup.c | 2
arch/ppc/platforms/mpc885ads_setup.c | 2
arch/ppc/syslib/Makefile | 13
arch/ppc/syslib/ipic.c | 646 -----------
arch/ppc/syslib/ipic.h | 47
arch/ppc/syslib/mpc83xx_devices.c | 251 ----
arch/ppc/syslib/mpc83xx_sys.c | 122 --
arch/ppc/syslib/mpc85xx_devices.c | 826 --------------
arch/ppc/syslib/mpc85xx_sys.c | 233 ----
arch/ppc/syslib/mpc8xx_devices.c | 2
arch/ppc/syslib/ocp.c | 2
arch/ppc/syslib/open_pic.c | 2
arch/ppc/syslib/ppc83xx_pci.h | 151 --
arch/ppc/syslib/ppc83xx_setup.c | 410 -------
arch/ppc/syslib/ppc83xx_setup.h | 55
arch/ppc/syslib/ppc85xx_common.c | 38
arch/ppc/syslib/ppc85xx_common.h | 22
arch/ppc/syslib/ppc85xx_setup.c | 367 ------
arch/ppc/syslib/ppc85xx_setup.h | 56
arch/ppc/syslib/ppc8xx_pic.h | 1
arch/ppc/xmon/start_8xx.c | 2
drivers/ata/Kconfig | 2
drivers/net/Kconfig | 2
drivers/net/fec_8xx/fec_8xx-netta.c | 2
drivers/net/fec_8xx/fec_main.c | 2
drivers/net/fec_8xx/fec_mii.c | 2
drivers/net/fs_enet/fs_enet.h | 2
drivers/net/fs_enet/mac-fec.c | 2
drivers/net/fs_enet/mac-scc.c | 2
drivers/net/ucc_geth_mii.c | 3
drivers/pci/Makefile | 2
drivers/serial/cpm_uart/cpm_uart_cpm1.h | 2
drivers/spi/spi_mpc83xx.c | 6
include/asm-powerpc/commproc.h | 752 -------------
include/asm-powerpc/cpm.h | 73 +
include/asm-powerpc/cpm1.h | 685 ++++++++++++
include/asm-powerpc/cpm2.h | 64 -
include/asm-powerpc/irq.h | 212 ---
include/asm-powerpc/mpc8xx.h | 20
include/asm-ppc/commproc.h | 692 ------------
include/asm-ppc/cpm1.h | 688 ++++++++++++
include/asm-ppc/cpm2.h | 2
include/asm-ppc/immap_85xx.h | 126 --
include/asm-ppc/mmu_context.h | 5
include/asm-ppc/mpc83xx.h | 107 -
include/asm-ppc/mpc85xx.h | 192 ---
include/asm-ppc/pgtable.h | 46
include/asm-ppc/ppc_sys.h | 4
include/asm-ppc/ppcboot.h | 8
include/asm-ppc/reg_booke.h | 26
include/asm-ppc/serial.h | 4
192 files changed, 21067 insertions(+), 22059 deletions(-)
Anton Vorontsov (4):
[POWERPC] QE: get rid of most device_types and model
ucc_geth: get rid of device_type for mdio
spi_mpc83xx: use brg-frequency for SPI in QE
[POWERPC] fsl_spi: stop using device_type = "spi"
Grant Likely (1):
[POWERPC] 82xx and embedded6xx: Use machine_*_initcall() hooks in platform code
Jochen Friedrich (7):
[POWERPC] 8xx: Remove unused m8xx_cpm_hostalloc/free/dump()
[POWERPC] 8xx: Rename m8xx_pic_init to mpc8xx_pics_init
[POWERPC] 8xx: Remove unneeded and misspelled prototype m8xx_calibrate_decr
[POWERPC] 8xx: Remove sysdev/commproc.h
[POWERPC] 8xx: Get rid of conditional includes of board specific setup
[POWERPC] CPM: Rename commproc to cpm1 and cpm2_common.c to cpm2.c
[POWERPC] CPM: Move definition of buffer descriptor to cpm.h
Jon Loeliger (2):
[POWERPC] 86xx: Convert all 86xx DTS files to /dts-v1/ format.
[POWERPC] Convert StorCenter DTS file to /dts-v1/ format.
Kim Phillips (10):
[POWERPC] 83xx: fold the mpc8313 platform into the mpc831x platform
[POWERPC] 83xx: add base platform support for the mpc8315 rdb board
[POWERPC] 83xx: Add the MPC8315E RDB dts
[POWERPC] 83xx: enable FSL SATA driver config for Freescale SoCs
[POWERPC] 83xx: ipic: add interrupt vector 94
[POWERPC] 83xx: add the mpc8315 rdb defconfig
[POWERPC] 83xx: add MPC837x RDB platform support
[POWERPC] 83xx: add the mpc837[789]_rdb dts files
[POWERPC] 83xx: add the mpc837x rdb defconfig
[POWERPC] 83xx: Fix typo in mpc837x compatible entries
Kumar Gala (13):
[POWERPC] Always build setup-bus.c on powerpc
[POWERPC] bootwrapper: Add find_node_by_compatible
[POWERPC] Add a cuboot wrapper for 85xx with CPM2
[POWERPC] 85xx: Port STX GP3 board over from arch/ppc
[POWERPC] 85xx: Port TQM85xx boards over from arch/ppc
[POWERPC] 85xx: some minor cleanups for stx_gp3 and tqm85xx
[PPC] Remove 83xx from arch/ppc
[PPC] Remove 85xx from arch/ppc
[POWERPC] 86xx: Remove unused IRQ defines
[POWERPC] 85xx: rework platform Kconfig
[POWERPC] 83xx: rework platform Kconfig
[POWERPC] 85xx: convert sbc85* boards to use machine_device_initcall
[POWERPC] 85xx: Only invalidate TLB0 and TLB1
Li Yang (1):
[POWERPC] Add docs for Freescale PowerQUICC SATA device tree nodes
Paul Gortmaker (14):
[POWERPC] Reduce code duplication in legacy_serial, add UART parent types
[POWERPC] 85xx: Add support for Wind River SBC8560 in arch/powerpc
[POWERPC] 85xx: Add v1 device tree source for Wind River SBC8560 board
[POWERPC] CPM2: Make support for the CPM2 optional on 8560 based boards
[POWERPC] 85xx: Add default .config file for Wind River SBC8560
[POWERPC] 85xx: Add basic support for Wind River SBC8548 board
[POWERPC] 85xx: Add v1 device tree source for Wind River SBC8548 board
[POWERPC] 85xx: Add default .config file for Wind River SBC8548
[POWERPC] 83xx: Add support for Wind River SBC834x boards
[POWERPC] 83xx: Add device tree source for Wind River SBC834x board.
[POWERPC] 83xx: Add default config file for Wind River SBC8349 board
[POWERPC] 83xx: mpc834x_mds - Convert device tree source to dts-v1
[POWERPC] QE: Explicitly set address-cells and size cells for muram
[POWERPC] 83xx: Clean up / convert mpc83xx board DTS files to v1 format.
Zhang Wei (1):
[POWERPC] Add docs for Freescale DMA & DMA channel device tree nodes
^ permalink raw reply
* Re: [PATCH] powerpc: fix typo in mpc837x compatible entries
From: Kumar Gala @ 2008-01-28 22:19 UTC (permalink / raw)
To: Kim Phillips; +Cc: linuxppc-dev
In-Reply-To: <20080128130037.db88184d.kim.phillips@freescale.com>
On Mon, 28 Jan 2008, Kim Phillips wrote:
> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
> ---
> arch/powerpc/boot/dts/mpc8377_rdb.dts | 2 +-
> arch/powerpc/boot/dts/mpc8378_rdb.dts | 2 +-
> arch/powerpc/boot/dts/mpc8379_rdb.dts | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
applied.
- k
^ permalink raw reply
* Re: [PATCH] 83xx: Clean up / convert mpc83xx board DTS files to v1 format.
From: Kumar Gala @ 2008-01-28 22:19 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: linuxppc-dev
In-Reply-To: <1201554576-32653-1-git-send-email-paul.gortmaker@windriver.com>
On Mon, 28 Jan 2008, Paul Gortmaker wrote:
> This patch converts the remaining 83xx boards to the dts-v1 format.
> This includes the mpc8313_rdb, mpc832x_mds, mpc8323_rdb, mpc8349emitx,
> mpc8349emitxgp and the mpc836x_mds.
>
> The mpc8315_rdb mpc834x_mds, mpc837[789]_*, and sbc8349 were already
> dts-v1 and only undergo minor changes for the sake of formatting
> consistency across the whole group of boards; i.e. the idea being
> that you can do a "diff -u board_A.dts board_B.dts" and see something
> meaningful.
>
> The general rule I've applied is that entries for values normally
> parsed by humans are left in decimal (i.e. IRQ, cache size, clock
> rates, basic counts and indexes) and all other data (i.e. reg and
> ranges, IRQ flags etc.) remain in hex.
>
> I've used dtc to confirm that the output prior to this changeset
> matches the output after this changeset is applied for all boards.
>
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
> arch/powerpc/boot/dts/mpc8313erdb.dts | 152 +++++++++---------
> arch/powerpc/boot/dts/mpc8315erdb.dts | 100 ++++++------
> arch/powerpc/boot/dts/mpc832x_mds.dts | 252 +++++++++++++++--------------
> arch/powerpc/boot/dts/mpc832x_rdb.dts | 154 +++++++++---------
> arch/powerpc/boot/dts/mpc8349emitx.dts | 155 +++++++++---------
> arch/powerpc/boot/dts/mpc8349emitxgp.dts | 109 +++++++------
> arch/powerpc/boot/dts/mpc834x_mds.dts | 36 ++--
> arch/powerpc/boot/dts/mpc836x_mds.dts | 260 +++++++++++++++---------------
> arch/powerpc/boot/dts/mpc8377_mds.dts | 138 ++++++++--------
> arch/powerpc/boot/dts/mpc8377_rdb.dts | 102 ++++++------
> arch/powerpc/boot/dts/mpc8378_mds.dts | 130 ++++++++--------
> arch/powerpc/boot/dts/mpc8378_rdb.dts | 94 ++++++------
> arch/powerpc/boot/dts/mpc8379_mds.dts | 146 +++++++++---------
> arch/powerpc/boot/dts/mpc8379_rdb.dts | 112 +++++++-------
> arch/powerpc/boot/dts/sbc8349.dts | 44 +++---
> 15 files changed, 999 insertions(+), 985 deletions(-)
>
applied. Checkout for whitespace in the future (sbc8349.dts)
- k
^ permalink raw reply
* Re: [PATCH] 83xx: Clean up / convert mpc83xx board DTS files to v1 format.
From: Paul Gortmaker @ 2008-01-28 22:44 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <Pine.LNX.4.64.0801281619040.28029@blarg.am.freescale.net>
Kumar Gala wrote:
> On Mon, 28 Jan 2008, Paul Gortmaker wrote:
>
>
>> This patch converts the remaining 83xx boards to the dts-v1 format.
>> This includes the mpc8313_rdb, mpc832x_mds, mpc8323_rdb, mpc8349emitx,
>> mpc8349emitxgp and the mpc836x_mds.
>>
>> The mpc8315_rdb mpc834x_mds, mpc837[789]_*, and sbc8349 were already
>> dts-v1 and only undergo minor changes for the sake of formatting
>> consistency across the whole group of boards; i.e. the idea being
>> that you can do a "diff -u board_A.dts board_B.dts" and see something
>> meaningful.
>>
>> The general rule I've applied is that entries for values normally
>> parsed by humans are left in decimal (i.e. IRQ, cache size, clock
>> rates, basic counts and indexes) and all other data (i.e. reg and
>> ranges, IRQ flags etc.) remain in hex.
>>
>> I've used dtc to confirm that the output prior to this changeset
>> matches the output after this changeset is applied for all boards.
>>
>> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
>> ---
>> arch/powerpc/boot/dts/mpc8313erdb.dts | 152 +++++++++---------
>> arch/powerpc/boot/dts/mpc8315erdb.dts | 100 ++++++------
>> arch/powerpc/boot/dts/mpc832x_mds.dts | 252 +++++++++++++++--------------
>> arch/powerpc/boot/dts/mpc832x_rdb.dts | 154 +++++++++---------
>> arch/powerpc/boot/dts/mpc8349emitx.dts | 155 +++++++++---------
>> arch/powerpc/boot/dts/mpc8349emitxgp.dts | 109 +++++++------
>> arch/powerpc/boot/dts/mpc834x_mds.dts | 36 ++--
>> arch/powerpc/boot/dts/mpc836x_mds.dts | 260 +++++++++++++++---------------
>> arch/powerpc/boot/dts/mpc8377_mds.dts | 138 ++++++++--------
>> arch/powerpc/boot/dts/mpc8377_rdb.dts | 102 ++++++------
>> arch/powerpc/boot/dts/mpc8378_mds.dts | 130 ++++++++--------
>> arch/powerpc/boot/dts/mpc8378_rdb.dts | 94 ++++++------
>> arch/powerpc/boot/dts/mpc8379_mds.dts | 146 +++++++++---------
>> arch/powerpc/boot/dts/mpc8379_rdb.dts | 112 +++++++-------
>> arch/powerpc/boot/dts/sbc8349.dts | 44 +++---
>> 15 files changed, 999 insertions(+), 985 deletions(-)
>>
>>
>
> applied. Checkout for whitespace in the future (sbc8349.dts)
>
Oops -- leaked one space in my rush to get it done and to
you today. Thanks for catching it.
P.
> - k
>
^ permalink raw reply
* Re: Preferred GIT URL for arch/powerpc, and BINUTILS
From: Steve Heflin @ 2008-01-28 22:46 UTC (permalink / raw)
To: linuxppc-embedded
At 02:30 PM 1/28/2008, Steve Heflin wrote:
>Josh, you're a life saver!! Your GIT tree is exactly what I've been
>looking for. I have an AMCC440EPx based product that makes heavy use
>of all the devices embedded in the microcontroller. I'll be able to
>give that platform a very good testing.
>
>Now can you help me with BINUTILS? What version do you use and can
>you point me to a decent GIT tree for it? I tried to use version
>2.18 and the build blows up because it tries to "strip" a script file
>"embedspu".
Whoa! I spoke too soon. Upon attempting a "make menuconfig" on the
2.6.24-rc8 which I cloned from your git tree, I don't even SEE the
powerpc architecture appearing! What's up?
^ permalink raw reply
* Re: Linux boot on a ppc 405
From: Ricardo Ayres Severo @ 2008-01-28 22:53 UTC (permalink / raw)
Cc: linuxppc-embedded
In-Reply-To: <fa686aa40801271315m5ba4ea08p913fd6235eb1d240@mail.gmail.com>
Grant,
my output is the following:
loaded at: 00400000 004E919C
board data at: 00000000 0000007C
relocated to: 00404040 004040BC
zimage at: 00404E2C 004E620A
avail ram: 004EA000 8DA05119
Linux/PPC load: console=ttyUL0,9600
Uncompressing Linux...done.
Now booting the kernel
nothing shows up next.
I tried to look at __log_buf but the debugger doesn't recognize it.
The debugger only knows the code of the part that boots the kernel.
I also tried setting ttyUL0 and ttyS0 for the linux console.
Any ideas of how I can get the real position of __log_buf?
Thanks,
On Jan 27, 2008 7:15 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
> On 1/27/08, Ricardo Severo <severo.ricardo@gmail.com> wrote:
> > Hi all,
> >
> > I am working with a Xilinx Virtex II Pro evaluation board, wich has two
> > PowerPC 405 and I'm trying to boot a vanilla linux kernel 2.6.23.14.
> > Until now I've manged to make it uncompress the kernel, but it doesn't boot.
> > My question is how the initial execution (the one who uncompresses the
> > kernel image) transfers the processor to the kernel itself. I've looked
> > in the arch/ppc/boot/simple/relocate.S code and it jumps to the position
> > 0x0 after uncompressing, is it right? The kernel is uncompressed at that
> > position?
>
> Post your output log please.
>
> If your getting a message that the kernel is uncompressing, but you
> don't have any output beyond that then most likely your console is not
> setup correctly. If you've got a debugger, look at memory at the
> __log_buf location to see if there are any boot logs there.
>
> Cheers,
> g.
>
>
> --
> Grant Likely, B.Sc., P.Eng.
> Secret Lab Technologies Ltd.
>
--
Ricardo Ayres Severo <severo.ricardo@gmail.com>
^ permalink raw reply
* RE: Linux boot on a ppc 405
From: Stephen Neuendorffer @ 2008-01-28 22:55 UTC (permalink / raw)
To: Ricardo Ayres Severo; +Cc: linuxppc-embedded
In-Reply-To: <5ee408090801281453l3e6fe3e5x2f8f1b0b130ad163@mail.gmail.com>
You have to look at the System.map file, find the __log_buf symbol, and
then look at the address manually.
Steve
> -----Original Message-----
> From: linuxppc-embedded-bounces+stephen=3Dneuendorffer.name@ozlabs.org
[mailto:linuxppc-embedded-
> bounces+stephen=3Dneuendorffer.name@ozlabs.org] On Behalf Of Ricardo
Ayres Severo
> Sent: Monday, January 28, 2008 2:53 PM
> Cc: linuxppc-embedded@ozlabs.org
> Subject: Re: Linux boot on a ppc 405
>=20
> Grant,
>=20
> my output is the following:
>=20
> loaded at: 00400000 004E919C
>=20
> board data at: 00000000 0000007C
>=20
> relocated to: 00404040 004040BC
>=20
> zimage at: 00404E2C 004E620A
>=20
> avail ram: 004EA000 8DA05119
>=20
>=20
> Linux/PPC load: console=3DttyUL0,9600
>=20
> Uncompressing Linux...done.
>=20
> Now booting the kernel
>=20
>=20
>=20
> nothing shows up next.
> I tried to look at __log_buf but the debugger doesn't recognize it.
> The debugger only knows the code of the part that boots the kernel.
> I also tried setting ttyUL0 and ttyS0 for the linux console.
> Any ideas of how I can get the real position of __log_buf?
>=20
> Thanks,
>=20
> On Jan 27, 2008 7:15 PM, Grant Likely <grant.likely@secretlab.ca>
wrote:
> > On 1/27/08, Ricardo Severo <severo.ricardo@gmail.com> wrote:
> > > Hi all,
> > >
> > > I am working with a Xilinx Virtex II Pro evaluation board, wich
has two
> > > PowerPC 405 and I'm trying to boot a vanilla linux kernel
2.6.23.14.
> > > Until now I've manged to make it uncompress the kernel, but it
doesn't boot.
> > > My question is how the initial execution (the one who uncompresses
the
> > > kernel image) transfers the processor to the kernel itself. I've
looked
> > > in the arch/ppc/boot/simple/relocate.S code and it jumps to the
position
> > > 0x0 after uncompressing, is it right? The kernel is uncompressed
at that
> > > position?
> >
> > Post your output log please.
> >
> > If your getting a message that the kernel is uncompressing, but you
> > don't have any output beyond that then most likely your console is
not
> > setup correctly. If you've got a debugger, look at memory at the
> > __log_buf location to see if there are any boot logs there.
> >
> > Cheers,
> > g.
> >
> >
> > --
> > Grant Likely, B.Sc., P.Eng.
> > Secret Lab Technologies Ltd.
> >
>=20
>=20
>=20
> --
> Ricardo Ayres Severo <severo.ricardo@gmail.com>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
^ permalink raw reply
* Re: Linux boot on a ppc 405
From: Ricardo Ayres Severo @ 2008-01-28 23:00 UTC (permalink / raw)
To: Stephen Neuendorffer; +Cc: linuxppc-embedded
In-Reply-To: <20080128225505.22226C20071@mail131-dub.bigfish.com>
Steve,
I tried that, but the System.map is not the real memory address, it's
processed by the mmu isn't it?
This is my System.map: c01e0cc4 b __log_buf
when I try to look at the position 0xc01e0cc4 the debugger returns:
Error: Cannot access memory at address 0xc01e0cc4
Am I doing something wrong?
Thanks,
On Jan 28, 2008 8:55 PM, Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com> wrote:
>
> You have to look at the System.map file, find the __log_buf symbol, and
> then look at the address manually.
>
> Steve
>
>
> > -----Original Message-----
> > From: linuxppc-embedded-bounces+stephen=neuendorffer.name@ozlabs.org
> [mailto:linuxppc-embedded-
> > bounces+stephen=neuendorffer.name@ozlabs.org] On Behalf Of Ricardo
> Ayres Severo
> > Sent: Monday, January 28, 2008 2:53 PM
> > Cc: linuxppc-embedded@ozlabs.org
> > Subject: Re: Linux boot on a ppc 405
> >
> > Grant,
> >
> > my output is the following:
> >
> > loaded at: 00400000 004E919C
> >
> > board data at: 00000000 0000007C
> >
> > relocated to: 00404040 004040BC
> >
> > zimage at: 00404E2C 004E620A
> >
> > avail ram: 004EA000 8DA05119
> >
> >
> > Linux/PPC load: console=ttyUL0,9600
> >
> > Uncompressing Linux...done.
> >
> > Now booting the kernel
> >
> >
> >
> > nothing shows up next.
> > I tried to look at __log_buf but the debugger doesn't recognize it.
> > The debugger only knows the code of the part that boots the kernel.
> > I also tried setting ttyUL0 and ttyS0 for the linux console.
> > Any ideas of how I can get the real position of __log_buf?
> >
> > Thanks,
> >
> > On Jan 27, 2008 7:15 PM, Grant Likely <grant.likely@secretlab.ca>
> wrote:
> > > On 1/27/08, Ricardo Severo <severo.ricardo@gmail.com> wrote:
> > > > Hi all,
> > > >
> > > > I am working with a Xilinx Virtex II Pro evaluation board, wich
> has two
> > > > PowerPC 405 and I'm trying to boot a vanilla linux kernel
> 2.6.23.14.
> > > > Until now I've manged to make it uncompress the kernel, but it
> doesn't boot.
> > > > My question is how the initial execution (the one who uncompresses
> the
> > > > kernel image) transfers the processor to the kernel itself. I've
> looked
> > > > in the arch/ppc/boot/simple/relocate.S code and it jumps to the
> position
> > > > 0x0 after uncompressing, is it right? The kernel is uncompressed
> at that
> > > > position?
> > >
> > > Post your output log please.
> > >
> > > If your getting a message that the kernel is uncompressing, but you
> > > don't have any output beyond that then most likely your console is
> not
> > > setup correctly. If you've got a debugger, look at memory at the
> > > __log_buf location to see if there are any boot logs there.
> > >
> > > Cheers,
> > > g.
> > >
> > >
> > > --
> > > Grant Likely, B.Sc., P.Eng.
> > > Secret Lab Technologies Ltd.
> > >
> >
> >
> >
> > --
> > Ricardo Ayres Severo <severo.ricardo@gmail.com>
>
> > _______________________________________________
> > Linuxppc-embedded mailing list
> > Linuxppc-embedded@ozlabs.org
> > https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
>
>
--
Ricardo Ayres Severo <severo.ricardo@gmail.com>
^ permalink raw reply
* RE: Linux boot on a ppc 405
From: Stephen Neuendorffer @ 2008-01-28 23:02 UTC (permalink / raw)
To: Ricardo Ayres Severo; +Cc: linuxppc-embedded
In-Reply-To: <5ee408090801281500q467fe03anf00a5a31a5473846@mail.gmail.com>
I've you've reset the processor, then the MMU has been reset too, in
which case your
log_buf will most likely be at 1e0cc4. The 'trick' is that resetting
the processor
leaves the memory intact.
Steve
> -----Original Message-----
> From: Ricardo Ayres Severo [mailto:severo.ricardo@gmail.com]
> Sent: Monday, January 28, 2008 3:00 PM
> To: Stephen Neuendorffer
> Cc: linuxppc-embedded@ozlabs.org
> Subject: Re: Linux boot on a ppc 405
>=20
> Steve,
>=20
> I tried that, but the System.map is not the real memory address, it's
> processed by the mmu isn't it?
>=20
> This is my System.map: c01e0cc4 b __log_buf
> when I try to look at the position 0xc01e0cc4 the debugger returns:
> Error: Cannot access memory at address 0xc01e0cc4
>=20
> Am I doing something wrong?
>=20
> Thanks,
>=20
> On Jan 28, 2008 8:55 PM, Stephen Neuendorffer
> <stephen.neuendorffer@xilinx.com> wrote:
> >
> > You have to look at the System.map file, find the __log_buf symbol,
and
> > then look at the address manually.
> >
> > Steve
> >
> >
> > > -----Original Message-----
> > > From:
linuxppc-embedded-bounces+stephen=3Dneuendorffer.name@ozlabs.org
> > [mailto:linuxppc-embedded-
> > > bounces+stephen=3Dneuendorffer.name@ozlabs.org] On Behalf Of =
Ricardo
> > Ayres Severo
> > > Sent: Monday, January 28, 2008 2:53 PM
> > > Cc: linuxppc-embedded@ozlabs.org
> > > Subject: Re: Linux boot on a ppc 405
> > >
> > > Grant,
> > >
> > > my output is the following:
> > >
> > > loaded at: 00400000 004E919C
> > >
> > > board data at: 00000000 0000007C
> > >
> > > relocated to: 00404040 004040BC
> > >
> > > zimage at: 00404E2C 004E620A
> > >
> > > avail ram: 004EA000 8DA05119
> > >
> > >
> > > Linux/PPC load: console=3DttyUL0,9600
> > >
> > > Uncompressing Linux...done.
> > >
> > > Now booting the kernel
> > >
> > >
> > >
> > > nothing shows up next.
> > > I tried to look at __log_buf but the debugger doesn't recognize
it.
> > > The debugger only knows the code of the part that boots the
kernel.
> > > I also tried setting ttyUL0 and ttyS0 for the linux console.
> > > Any ideas of how I can get the real position of __log_buf?
> > >
> > > Thanks,
> > >
> > > On Jan 27, 2008 7:15 PM, Grant Likely <grant.likely@secretlab.ca>
> > wrote:
> > > > On 1/27/08, Ricardo Severo <severo.ricardo@gmail.com> wrote:
> > > > > Hi all,
> > > > >
> > > > > I am working with a Xilinx Virtex II Pro evaluation board,
wich
> > has two
> > > > > PowerPC 405 and I'm trying to boot a vanilla linux kernel
> > 2.6.23.14.
> > > > > Until now I've manged to make it uncompress the kernel, but it
> > doesn't boot.
> > > > > My question is how the initial execution (the one who
uncompresses
> > the
> > > > > kernel image) transfers the processor to the kernel itself.
I've
> > looked
> > > > > in the arch/ppc/boot/simple/relocate.S code and it jumps to
the
> > position
> > > > > 0x0 after uncompressing, is it right? The kernel is
uncompressed
> > at that
> > > > > position?
> > > >
> > > > Post your output log please.
> > > >
> > > > If your getting a message that the kernel is uncompressing, but
you
> > > > don't have any output beyond that then most likely your console
is
> > not
> > > > setup correctly. If you've got a debugger, look at memory at
the
> > > > __log_buf location to see if there are any boot logs there.
> > > >
> > > > Cheers,
> > > > g.
> > > >
> > > >
> > > > --
> > > > Grant Likely, B.Sc., P.Eng.
> > > > Secret Lab Technologies Ltd.
> > > >
> > >
> > >
> > >
> > > --
> > > Ricardo Ayres Severo <severo.ricardo@gmail.com>
> >
> > > _______________________________________________
> > > Linuxppc-embedded mailing list
> > > Linuxppc-embedded@ozlabs.org
> > > https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >
> >
> >
>=20
>=20
>=20
> --
> Ricardo Ayres Severo <severo.ricardo@gmail.com>
^ permalink raw reply
* Re: Linux boot on a ppc 405
From: Grant Likely @ 2008-01-28 23:04 UTC (permalink / raw)
To: Ricardo Ayres Severo; +Cc: Stephen Neuendorffer, linuxppc-embedded
In-Reply-To: <5ee408090801281500q467fe03anf00a5a31a5473846@mail.gmail.com>
On 1/28/08, Ricardo Ayres Severo <severo.ricardo@gmail.com> wrote:
> Steve,
>
> I tried that, but the System.map is not the real memory address, it's
> processed by the mmu isn't it?
>
> This is my System.map: c01e0cc4 b __log_buf
> when I try to look at the position 0xc01e0cc4 the debugger returns:
> Error: Cannot access memory at address 0xc01e0cc4
Drop the kernel offset of 0xc0000000
So; 0xc01e0cc4 becomes 0x001e0cc4 after reset.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: PATCH[1/1] 8xx: Add clock-frequency to .dts brg entries
From: Bryan O'Donoghue @ 2008-01-28 23:55 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20080128155012.GA27054@ld0162-tx32.am.freescale.net>
On Mon, 2008-01-28 at 09:50 -0600, Scott Wood wrote:
> On Mon, Jan 28, 2008 at 01:53:11AM +0000, Bryan O'Donoghue wrote:
> > cpm_uart_core has a dependency on fsl,cpm-brg/clock-frequency, this
> > means that a .dts that uses the cpm uart driver needs to supply a
> > clock-frequency entry for get_brgfreq to return a meaningful number.
> >
> > Included is a patchset which adds the correct brgclk to the adder port -
> > @ 50Mhz and also adds an entry for mpc885ads - which I've noticed is
> > missing a clock-frequency entry.
>
> It's not missing -- it's added by the bootwrapper.
>
> -Scott
Hmm..
You mean that arch/powerpc/boot/mpc8xx.c mpc8xx_set_clocks is supposed
to be adding this field ?
I see arch/powerpc/boot/wrapper.a has a reference to the function but -
and this time I've checked all documentation - there's no mention of how
to use this library at all... it _looks_ to me like this isn't being
linked in any way.
It for sure is nowhere in the uImage - and I've taken the preferred
route of making a uImage with .dtb - genreated from adder875-uboot.dts
dtc -O -o adder875-uboot.dtb arch/powerpc/boot/dts/adder875-uboot.dtb
cpm_uart depends on "fsl,cpm-brg" and a field called "clock-frequency"
as I understand it that's
fsl,cpm-brg
|_clock-frequency
whereas mpc8xx_set_clocks seems to add
/soc/cpm/brg
|_clock-frequency
So unless I'm not understanding the structure of the tree - possible - I
don't see how /soc/cpm/brg => clock-frequency could /possibly/ satisfy
get_brgfreq in fsl_soc.c
If there's something other then making a uImage and dtb and booting
these from u-boot that I'm supposed to be doing here ... it'd help if
you could say..
Otherwise in order to get the UART working using a uImage + dbt I've
found it necessary to add this field to the .dts....
mpc866ads.dts - also has a "fsl,cpm-brg" => clock-frequency entry in
linux/arch/powerpc/boot/dts/mpc866ads.dts - and to me this looks like
the correct approach for get_brgfreq to function properly...
What do you think ?
^ permalink raw reply
* Re: [PATCH] [NET]: Remove PowerPC code from fec.c
From: Greg Ungerer @ 2008-01-28 23:58 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: linux-m68k, uClinux list, Kernel, Linux, linuxppc-dev list,
netdev@vger.kernel.org, Scott Wood, Garzik, Jeff
In-Reply-To: <Pine.LNX.4.64.0801251544480.13060@anakin>
> ---------- Forwarded message ----------
> Date: Fri, 25 Jan 2008 15:33:45 +0100
> From: Jochen Friedrich <jochen@scram.de>
> To: "Garzik, Jeff" <jgarzik@pobox.com>
> Cc: Vitaly Bordug <vitb@kernel.crashing.org>,
> Scott Wood <scottwood@freescale.com>,
> Kumar Gala <galak@kernel.crashing.org>,
> Geert Uytterhoeven <geert@linux-m68k.org>,
> "Kernel, Linux" <linux-kernel@vger.kernel.org>,
> "netdev@vger.kernel.org" <netdev@vger.kernel.org>,
> linuxppc-dev list <linuxppc-dev@ozlabs.org>,
linux-m68k@vger.kernel.org
> Subject: [PATCH] [NET]: Remove PowerPC code from fec.c
>
> fec.c is only used on M68k Coldfire CPUs. Remove leftover
> PowerPC code from this driver.
I was always hoping that this driver would be supported on both
architectures. After all the underlying eth device is essentially
the same on both.
Anyway... I don't have a problem with this patch, looks ok
the me.
Acked-by: Greg Ungerer <gerg@uclinux.org>
Regards
Greg
> Signed-off-by: Jochen Friedrich <jochen@scram.de>
> ---
> drivers/net/fec.c | 136
+---------------------------------------------------
> 1 files changed, 3 insertions(+), 133 deletions(-)
>
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 0fbf1bb..0499cbb 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -23,6 +23,9 @@
> *
> * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
> * Copyright (c) 2004-2006 Macq Electronique SA.
> + *
> + * This driver is now only used on ColdFire processors. Remove
conditional
> + * Powerpc code.
> */
>
> #include <linux/module.h>
> @@ -49,17 +52,9 @@
> #include <asm/pgtable.h>
> #include <asm/cacheflush.h>
>
> -#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || \
> - defined(CONFIG_M5272) || defined(CONFIG_M528x) || \
> - defined(CONFIG_M520x) || defined(CONFIG_M532x)
> #include <asm/coldfire.h>
> #include <asm/mcfsim.h>
> #include "fec.h"
> -#else
> -#include <asm/8xx_immap.h>
> -#include <asm/mpc8xx.h>
> -#include "commproc.h"
> -#endif
>
> #if defined(CONFIG_FEC2)
> #define FEC_MAX_PORTS 2
> @@ -1223,14 +1218,9 @@ static phy_info_t const * const phy_info[] = {
>
> /*
------------------------------------------------------------------------- */
> #if !defined(CONFIG_M532x)
> -#ifdef CONFIG_RPXCLASSIC
> -static void
> -mii_link_interrupt(void *dev_id);
> -#else
> static irqreturn_t
> mii_link_interrupt(int irq, void * dev_id);
> #endif
> -#endif
>
> #if defined(CONFIG_M5272)
> /*
> @@ -1800,121 +1790,6 @@ static void __inline__ fec_uncache(unsigned
long addr)
> /*
------------------------------------------------------------------------- */
>
>
> -#else
> -
> -/*
> - * Code specific to the MPC860T setup.
> - */
> -static void __inline__ fec_request_intrs(struct net_device *dev)
> -{
> - volatile immap_t *immap;
> -
> - immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */
> -
> - if (request_8xxirq(FEC_INTERRUPT, fec_enet_interrupt, 0, "fec",
dev) != 0)
> - panic("Could not allocate FEC IRQ!");
> -
> -#ifdef CONFIG_RPXCLASSIC
> - /* Make Port C, bit 15 an input that causes interrupts.
> - */
> - immap->im_ioport.iop_pcpar &= ~0x0001;
> - immap->im_ioport.iop_pcdir &= ~0x0001;
> - immap->im_ioport.iop_pcso &= ~0x0001;
> - immap->im_ioport.iop_pcint |= 0x0001;
> - cpm_install_handler(CPMVEC_PIO_PC15, mii_link_interrupt, dev);
> -
> - /* Make LEDS reflect Link status.
> - */
> - *((uint *) RPX_CSR_ADDR) &= ~BCSR2_FETHLEDMODE;
> -#endif
> -#ifdef CONFIG_FADS
> - if (request_8xxirq(SIU_IRQ2, mii_link_interrupt, 0, "mii", dev) != 0)
> - panic("Could not allocate MII IRQ!");
> -#endif
> -}
> -
> -static void __inline__ fec_get_mac(struct net_device *dev)
> -{
> - bd_t *bd;
> -
> - bd = (bd_t *)__res;
> - memcpy(dev->dev_addr, bd->bi_enetaddr, ETH_ALEN);
> -
> -#ifdef CONFIG_RPXCLASSIC
> - /* The Embedded Planet boards have only one MAC address in
> - * the EEPROM, but can have two Ethernet ports. For the
> - * FEC port, we create another address by setting one of
> - * the address bits above something that would have (up to
> - * now) been allocated.
> - */
> - dev->dev_adrd[3] |= 0x80;
> -#endif
> -}
> -
> -static void __inline__ fec_set_mii(struct net_device *dev, struct
fec_enet_private *fep)
> -{
> - extern uint _get_IMMR(void);
> - volatile immap_t *immap;
> - volatile fec_t *fecp;
> -
> - fecp = fep->hwp;
> - immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */
> -
> - /* Configure all of port D for MII.
> - */
> - immap->im_ioport.iop_pdpar = 0x1fff;
> -
> - /* Bits moved from Rev. D onward.
> - */
> - if ((_get_IMMR() & 0xffff) < 0x0501)
> - immap->im_ioport.iop_pddir = 0x1c58; /* Pre rev. D */
> - else
> - immap->im_ioport.iop_pddir = 0x1fff; /* Rev. D and later */
> -
> - /* Set MII speed to 2.5 MHz
> - */
> - fecp->fec_mii_speed = fep->phy_speed =
> - ((bd->bi_busfreq * 1000000) / 2500000) & 0x7e;
> -}
> -
> -static void __inline__ fec_enable_phy_intr(void)
> -{
> - volatile fec_t *fecp;
> -
> - fecp = fep->hwp;
> -
> - /* Enable MII command finished interrupt
> - */
> - fecp->fec_ivec = (FEC_INTERRUPT/2) << 29;
> -}
> -
> -static void __inline__ fec_disable_phy_intr(void)
> -{
> -}
> -
> -static void __inline__ fec_phy_ack_intr(void)
> -{
> -}
> -
> -static void __inline__ fec_localhw_setup(void)
> -{
> - volatile fec_t *fecp;
> -
> - fecp = fep->hwp;
> - fecp->fec_r_hash = PKT_MAXBUF_SIZE;
> - /* Enable big endian and don't care about SDMA FC.
> - */
> - fecp->fec_fun_code = 0x78000000;
> -}
> -
> -static void __inline__ fec_uncache(unsigned long addr)
> -{
> - pte_t *pte;
> - pte = va_to_pte(mem_addr);
> - pte_val(*pte) |= _PAGE_NO_CACHE;
> - flush_tlb_page(init_mm.mmap, mem_addr);
> -}
> -
> #endif
>
> /*
------------------------------------------------------------------------- */
> @@ -2126,13 +2001,8 @@ mii_discover_phy(uint mii_reg, struct
net_device *dev)
>
> /* This interrupt occurs when the PHY detects a link change.
> */
> -#ifdef CONFIG_RPXCLASSIC
> -static void
> -mii_link_interrupt(void *dev_id)
> -#else
> static irqreturn_t
> mii_link_interrupt(int irq, void * dev_id)
> -#endif
> {
> struct net_device *dev = dev_id;
> struct fec_enet_private *fep = netdev_priv(dev);
------------------------------------------------------------------------
Greg Ungerer -- Chief Software Dude EMAIL: gerg@snapgear.com
SnapGear -- a Secure Computing Company PHONE: +61 7 3435 2888
825 Stanley St, FAX: +61 7 3891 3630
Woolloongabba, QLD, 4102, Australia WEB: http://www.SnapGear.com
^ permalink raw reply
* [-mm PATCH] updates for hotplug memory remove
From: Badari Pulavarty @ 2008-01-29 0:31 UTC (permalink / raw)
To: Andrew Morton; +Cc: linux-mm, pbadari, linuxppc-dev
Hi Andrew,
Here are the updates for hotplug memory remove code currently in -mm.
1) Please don't push this patch to mainline (for the merge window).
memory-hotplug-add-removable-to-sysfs-to-show-memblock-removability.patch
I didn't find this consistently useful - even though memory is marked
removable, I found cases where I can't move it. When we get it right,
we can push it at that time. Please leave this in -mm.
2) Can you replace the following patch with this ?
add-remove_memory-for-ppc64-2.patch
I found that, I do need arch-specific hooks to get the memory remove
working on ppc64 LPAR. Earlier, I tried to make remove_memory() arch
neutral, but we do need arch specific hooks.
Thanks,
Badari
Supply ppc64 remove_memory() function. Arch specific is still
being reviewed by Paul Mackerras.
From: Badari Pulavarty <pbadari@us.ibm.com>
---
arch/powerpc/mm/mem.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
Index: linux-2.6.24-rc8/arch/powerpc/mm/mem.c
===================================================================
--- linux-2.6.24-rc8.orig/arch/powerpc/mm/mem.c 2008-01-25 08:04:32.000000000 -0800
+++ linux-2.6.24-rc8/arch/powerpc/mm/mem.c 2008-01-25 08:16:37.000000000 -0800
@@ -145,6 +145,22 @@ walk_memory_resource(unsigned long start
return (*func)(start_pfn, nr_pages, arg);
}
+#ifdef CONFIG_MEMORY_HOTREMOVE
+int remove_memory(u64 start, u64 size)
+{
+ unsigned long start_pfn, end_pfn;
+ int ret;
+
+ start_pfn = start >> PAGE_SHIFT;
+ end_pfn = start_pfn + (size >> PAGE_SHIFT);
+ ret = offline_pages(start_pfn, end_pfn, 120 * HZ);
+ if (ret)
+ goto out;
+ /* Arch-specific calls go here - next patch */
+out:
+ return ret;
+}
+#endif /* CONFIG_MEMORY_HOTREMOVE */
#endif /* CONFIG_MEMORY_HOTPLUG */
void show_mem(void)
^ permalink raw reply
* Re: [PATCH 4/9] enable FSL SATA driver config for Freescale SoCs
From: Kim Phillips @ 2008-01-25 17:38 UTC (permalink / raw)
To: Kumar Gala; +Cc: linux-ide, linuxppc-dev, jgarzik, Jerry Huang
In-Reply-To: <089EA00D-8EAB-417D-9A4B-FA500D23FF8D@kernel.crashing.org>
On Fri, 25 Jan 2008 10:04:08 -0600
Kumar Gala <galak@kernel.crashing.org> wrote:
>
> On Jan 24, 2008, at 8:46 PM, Kim Phillips wrote:
>
> > The mpc8315 shares the same SATA controller as the mpc837x,
> > and likelihood is that future SoCs from Freescale will also.
> >
> > Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
> > Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
> > ---
> > Kumar, let me know if you want me to post this to the ata list (I'm
> > assuming it's not necessary).
>
> It is necessary so they are aware. CC jgarizk, but we'll take it via
> powerpc.
>
> - k
>
ok, cc'ing Jeff, linux-ide here:
From: Kim Phillips <kim.phillips@freescale.com>
Date: Thu, 24 Jan 2008 01:49:24 -0600
Subject: [PATCH] enable FSL SATA driver config for Freescale SoCs
The mpc8315 shares the same SATA controller as the mpc837x,
and likelihood is that future SoCs from Freescale will also.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
---
drivers/ata/Kconfig | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index 64b4964..75939dd 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -184,7 +184,7 @@ config PATA_ACPI
config SATA_FSL
tristate "Freescale 3.0Gbps SATA support"
- depends on PPC_MPC837x
+ depends on FSL_SOC
help
This option enables support for Freescale 3.0Gbps SATA controller.
It can be found on MPC837x and MPC8315.
--
1.5.2.2
^ permalink raw reply related
* Re: [-mm PATCH] updates for hotplug memory remove
From: Badari Pulavarty @ 2008-01-29 0:35 UTC (permalink / raw)
To: Andrew Morton; +Cc: linux-mm, linuxppc-dev
In-Reply-To: <1201566682.29357.15.camel@dyn9047017100.beaverton.ibm.com>
On Mon, 2008-01-28 at 16:31 -0800, Badari Pulavarty wrote:
> 2) Can you replace the following patch with this ?
>
> add-remove_memory-for-ppc64-2.patch
>
> I found that, I do need arch-specific hooks to get the memory remove
> working on ppc64 LPAR. Earlier, I tried to make remove_memory() arch
> neutral, but we do need arch specific hooks.
>
> Thanks,
> Badari
Andrew,
Here is the patch which provides arch-specific code to complete memory
remove on ppc64 LPAR. So far, it works fine in my testing - but waiting
for ppc-experts for review and completeness.
FYI.
Thanks,
Badari
For memory remove, we need to clean up htab mappings for the
section of the memory we are removing.
This patch implements support for removing htab bolted mappings
for ppc64 lpar. Other sub-archs, may need to implement similar
functionality for the hotplug memory remove to work.
Signed-off-by: Badari Pulavarty <pbadari@us.ibm.com>
---
arch/powerpc/mm/hash_utils_64.c | 23 +++++++++++++++++++++++
arch/powerpc/mm/mem.c | 4 +++-
arch/powerpc/platforms/pseries/lpar.c | 15 +++++++++++++++
include/asm-powerpc/machdep.h | 2 ++
include/asm-powerpc/sparsemem.h | 1 +
5 files changed, 44 insertions(+), 1 deletion(-)
Index: linux-2.6.24-rc8/arch/powerpc/mm/hash_utils_64.c
===================================================================
--- linux-2.6.24-rc8.orig/arch/powerpc/mm/hash_utils_64.c 2008-01-25 08:04:32.000000000 -0800
+++ linux-2.6.24-rc8/arch/powerpc/mm/hash_utils_64.c 2008-01-28 11:45:40.000000000 -0800
@@ -191,6 +191,24 @@ int htab_bolt_mapping(unsigned long vsta
return ret < 0 ? ret : 0;
}
+static void htab_remove_mapping(unsigned long vstart, unsigned long vend,
+ int psize, int ssize)
+{
+ unsigned long vaddr;
+ unsigned int step, shift;
+
+ shift = mmu_psize_defs[psize].shift;
+ step = 1 << shift;
+
+ if (!ppc_md.hpte_removebolted) {
+ printk("Sub-arch doesn't implement hpte_removebolted\n");
+ return;
+ }
+
+ for (vaddr = vstart; vaddr < vend; vaddr += step)
+ ppc_md.hpte_removebolted(vaddr, psize, ssize);
+}
+
static int __init htab_dt_scan_seg_sizes(unsigned long node,
const char *uname, int depth,
void *data)
@@ -436,6 +454,11 @@ void create_section_mapping(unsigned lon
_PAGE_ACCESSED | _PAGE_DIRTY | _PAGE_COHERENT | PP_RWXX,
mmu_linear_psize, mmu_kernel_ssize));
}
+
+void remove_section_mapping(unsigned long start, unsigned long end)
+{
+ htab_remove_mapping(start, end, mmu_linear_psize, mmu_kernel_ssize);
+}
#endif /* CONFIG_MEMORY_HOTPLUG */
static inline void make_bl(unsigned int *insn_addr, void *func)
Index: linux-2.6.24-rc8/include/asm-powerpc/sparsemem.h
===================================================================
--- linux-2.6.24-rc8.orig/include/asm-powerpc/sparsemem.h 2008-01-15 20:22:48.000000000 -0800
+++ linux-2.6.24-rc8/include/asm-powerpc/sparsemem.h 2008-01-25 08:18:11.000000000 -0800
@@ -20,6 +20,7 @@
#ifdef CONFIG_MEMORY_HOTPLUG
extern void create_section_mapping(unsigned long start, unsigned long end);
+extern void remove_section_mapping(unsigned long start, unsigned long end);
#ifdef CONFIG_NUMA
extern int hot_add_scn_to_nid(unsigned long scn_addr);
#else
Index: linux-2.6.24-rc8/arch/powerpc/mm/mem.c
===================================================================
--- linux-2.6.24-rc8.orig/arch/powerpc/mm/mem.c 2008-01-25 08:16:37.000000000 -0800
+++ linux-2.6.24-rc8/arch/powerpc/mm/mem.c 2008-01-25 08:20:33.000000000 -0800
@@ -156,7 +156,9 @@ int remove_memory(u64 start, u64 size)
ret = offline_pages(start_pfn, end_pfn, 120 * HZ);
if (ret)
goto out;
- /* Arch-specific calls go here - next patch */
+
+ start = (unsigned long)__va(start);
+ remove_section_mapping(start, start + size);
out:
return ret;
}
Index: linux-2.6.24-rc8/arch/powerpc/platforms/pseries/lpar.c
===================================================================
--- linux-2.6.24-rc8.orig/arch/powerpc/platforms/pseries/lpar.c 2008-01-15 20:22:48.000000000 -0800
+++ linux-2.6.24-rc8/arch/powerpc/platforms/pseries/lpar.c 2008-01-28 14:10:58.000000000 -0800
@@ -520,6 +520,20 @@ static void pSeries_lpar_hpte_invalidate
BUG_ON(lpar_rc != H_SUCCESS);
}
+static void pSeries_lpar_hpte_removebolted(unsigned long ea,
+ int psize, int ssize)
+{
+ unsigned long slot, vsid, va;
+
+ vsid = get_kernel_vsid(ea, ssize);
+ va = hpt_va(ea, vsid, ssize);
+
+ slot = pSeries_lpar_hpte_find(va, psize, ssize);
+ BUG_ON(slot == -1);
+
+ pSeries_lpar_hpte_invalidate(slot, va, psize, ssize, 0);
+}
+
/* Flag bits for H_BULK_REMOVE */
#define HBR_REQUEST 0x4000000000000000UL
#define HBR_RESPONSE 0x8000000000000000UL
@@ -597,6 +611,7 @@ void __init hpte_init_lpar(void)
ppc_md.hpte_updateboltedpp = pSeries_lpar_hpte_updateboltedpp;
ppc_md.hpte_insert = pSeries_lpar_hpte_insert;
ppc_md.hpte_remove = pSeries_lpar_hpte_remove;
+ ppc_md.hpte_removebolted = pSeries_lpar_hpte_removebolted;
ppc_md.flush_hash_range = pSeries_lpar_flush_hash_range;
ppc_md.hpte_clear_all = pSeries_lpar_hptab_clear;
}
Index: linux-2.6.24-rc8/include/asm-powerpc/machdep.h
===================================================================
--- linux-2.6.24-rc8.orig/include/asm-powerpc/machdep.h 2008-01-25 08:04:41.000000000 -0800
+++ linux-2.6.24-rc8/include/asm-powerpc/machdep.h 2008-01-28 11:45:17.000000000 -0800
@@ -68,6 +68,8 @@ struct machdep_calls {
unsigned long vflags,
int psize, int ssize);
long (*hpte_remove)(unsigned long hpte_group);
+ void (*hpte_removebolted)(unsigned long ea,
+ int psize, int ssize);
void (*flush_hash_range)(unsigned long number, int local);
/* special for kexec, to be called in real mode, linar mapping is
^ permalink raw reply
* Re: [PATCH UCC TDM 3/3 ] Modified Documentation to explain dtsentries for TDM driver
From: Scott Wood @ 2008-01-25 18:13 UTC (permalink / raw)
To: Aggrwal Poonam
Cc: Barkowski Michael, netdev, Gala Kumar, linux-kernel, rubini,
linuxppc-dev, Kalra Ashish, Cutler Richard, akpm, Tabi Timur
In-Reply-To: <FBA61160C48B8D438F3323FEFB4EF2C279AFF5@zin33exm24.fsl.freescale.net>
Aggrwal Poonam wrote:
> The device tree already has a brg-frequency property in qe node which
> is the value of BRGCLK.
Yes, I'm saying it belongs as brg/clock-frequency. :-)
CPM1/2 already do this.
-Scott
^ permalink raw reply
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