* Re: [RESEND][POWERPC] mpc5200: Amalgamated dts fixes and updates
From: Wolfgang Grandegger @ 2008-03-26 20:48 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, Paul Mackerras, Anatolij Gustschin
In-Reply-To: <fa686aa40803261335q2b8af09cw6f05dc0cf905d0b5@mail.gmail.com>
Grant Likely wrote:
> On Wed, Mar 26, 2008 at 1:45 PM, Bartlomiej Sieka <tur@semihalf.com> wrote:
>> The bulk of this patch is taken from
>> http://patchwork.ozlabs.org/linuxppc/patch?q=Balakowicz&id=16197, with few
>> other updates.
>>
>> Signed-off-by: Marian Balakowicz <m8@semihalf.com>
>> ---
>> Addressed comments from the list; would appreciate picking up as the patch
>> fixes booting issue on TQM5200 and Motion-PRO (cm5200 changes are analogous,
>> but not tested due to hardware unavailability).
>
> I see one obvious error; but other than that it looks good. Once that
> is fixed I can recommend for Paul to pick it up for .25. It's just
> dts changes, so I don't expect it to be a problem.
>
> Cheers,
> g.
>
>> diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
>> index 76951ab..f27256b 100644
>> --- a/arch/powerpc/boot/dts/motionpro.dts
>> +++ b/arch/powerpc/boot/dts/motionpro.dts
>> @@ -209,10 +208,25 @@
>> + mdio@3000 {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
>> + reg = <3000 400>; // fec range, since we need to setup fec interrupts
>> + interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
>> + interrupt-parent = <&mpc5200_pic>;
>> +
>> + phy0:ethernet-phy@0 {
>> + device_type = "ethernet-phy";
>> + reg = <2>;
>
> This doesn't look right. Reg should match the value in "ethernet-phy@0"
And whats about the two CAN nodes for tqm5200.dts? Do we have them already?
Thanks,
Wolfgang.
^ permalink raw reply
* Re: [RESEND][POWERPC] mpc5200: Amalgamated dts fixes and updates
From: Grant Likely @ 2008-03-26 20:35 UTC (permalink / raw)
To: Bartlomiej Sieka; +Cc: linuxppc-dev, Anatolij Gustschin, Paul Mackerras
In-Reply-To: <20080326194526.GA17424@frozen.semihalf.com>
On Wed, Mar 26, 2008 at 1:45 PM, Bartlomiej Sieka <tur@semihalf.com> wrote:
> The bulk of this patch is taken from
> http://patchwork.ozlabs.org/linuxppc/patch?q=Balakowicz&id=16197, with few
> other updates.
>
> Signed-off-by: Marian Balakowicz <m8@semihalf.com>
> ---
> Addressed comments from the list; would appreciate picking up as the patch
> fixes booting issue on TQM5200 and Motion-PRO (cm5200 changes are analogous,
> but not tested due to hardware unavailability).
I see one obvious error; but other than that it looks good. Once that
is fixed I can recommend for Paul to pick it up for .25. It's just
dts changes, so I don't expect it to be a problem.
Cheers,
g.
> diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
> index 76951ab..f27256b 100644
> --- a/arch/powerpc/boot/dts/motionpro.dts
> +++ b/arch/powerpc/boot/dts/motionpro.dts
> @@ -209,10 +208,25 @@
> + mdio@3000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
> + reg = <3000 400>; // fec range, since we need to setup fec interrupts
> + interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
> + interrupt-parent = <&mpc5200_pic>;
> +
> + phy0:ethernet-phy@0 {
> + device_type = "ethernet-phy";
> + reg = <2>;
This doesn't look right. Reg should match the value in "ethernet-phy@0"
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* RE: Cannot open root device "xsysace/disco0/part3" or 00:00
From: John Linn @ 2008-03-26 20:33 UTC (permalink / raw)
To: José Luis Añamuro Machicao, Linuxppc-embedded; +Cc: jose_luis
In-Reply-To: <001101c88f79$17da5ae0$7738f496@JoseLuisAM>
[-- Attachment #1: Type: text/plain, Size: 2636 bytes --]
Hi Jose,
I didn't see that you configured the kernel to put the Xilinx system ace driver in?
It's under device drivers, block devices.
Thanks,
John
________________________________
From: linuxppc-embedded-bounces+john.linn=xilinx.com@ozlabs.org [mailto:linuxppc-embedded-bounces+john.linn=xilinx.com@ozlabs.org] On Behalf Of José Luis Añamuro Machicao
Sent: Wednesday, March 26, 2008 1:39 PM
To: Linuxppc-embedded@ozlabs.org
Cc: jose_luis@fun-humanismo-ciencia.es
Subject: Cannot open root device "xsysace/disco0/part3" or 00:00
Hi
I am installing the linux kernel 2.4.26 in the FPGA Virtex II Pro following the instruction of
http://www.cs.washington.edu/research/lis/empart/xup_ppc_linux.shtml
I compiled the linux kernel successfully, after that I build the root file system using the BusyBox 1.1.0 infrastructure. I configured the busybox and the kernel with the cross compiler, finally I execute the mkrootfs.sh script and obtain the all files of fyle system, these files I copied to ext3 partition of CompacFlash when I probe operatión by the hyperTerminal (38400 bps) appears a error that say:
Serial driver version 5.05c (2001-07-08) with no serial options enabled
ttyS00 at 0xfdfff003 (irq = 30) is a 16550A
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
VFS: Cannot open root device "xsysace/disco0/part3" or 00:00
Please append a correct "root=" boot option
Kernel panic: VFS: Unable to mount root fs on 00:00
<0>Rebooting in 180 seconds.
I configured the linux kernel with:
Code maturity level options --->
[*] Prompt for development and/or incomplete code/drivers
File systems --->
[*] /dev file system support (EXPERIMENTAL)
[*] Automatically mount at boot
[*] Virtual memory file system support (former shm fs)
[*] /proc file system support
General Setup --->
[*] Networking support
[*] Sysctl support
[*] System V IPC
and edit the /etc/fstab
tmpfs /dev/shm tmpfs nodev,nosuid,noexec 0 0
proc /proc proc defaults 0 0
/dev/root / auto defaults,errors=remount-ro 0 0
-------------------------------------------------------------------------------------
__ _ __ __ José Luis Añamuro - PhD Student
\/ V /\ |\_\ /\_\ Dept. Ingeniería Informática
| | | / \ | | \/ | | Universidad Autónoma de Madrid
| | | / /\\ | | | | | Lab B-209 Tel. +34 615887260
| | |/ __ \| | \ / | http://www.ii.uam.es/
`-_-/_/ \_\|_|\/|__|
[-- Attachment #2: Type: text/html, Size: 16191 bytes --]
^ permalink raw reply
* RE: Cannot open root device "xsysace/disco0/part3" or 00:00
From: Stephen Neuendorffer @ 2008-03-26 20:32 UTC (permalink / raw)
To: José Luis Añamuro Machicao, Linuxppc-embedded; +Cc: jose_luis
In-Reply-To: <001101c88f79$17da5ae0$7738f496@JoseLuisAM>
Maybe just a typo? I think it should be 'disc0' not 'disco0'
Steve
> -----Original Message-----
> From: linuxppc-embedded-bounces+stephen=3Dneuendorffer.name@ozlabs.org =
[mailto:linuxppc-embedded-
> bounces+stephen=3Dneuendorffer.name@ozlabs.org] On Behalf Of Jos=E9 =
Luis A=F1amuro Machicao
> Sent: Wednesday, March 26, 2008 12:39 PM
> To: Linuxppc-embedded@ozlabs.org
> Cc: jose_luis@fun-humanismo-ciencia.es
> Subject: Cannot open root device "xsysace/disco0/part3" or 00:00
>=20
> Hi
> I am installing the linux kernel 2.4.26 in the FPGA Virtex II Pro =
following the instruction of
> http://www.cs.washington.edu/research/lis/empart/xup_ppc_linux.shtml
>=20
> I compiled the linux kernel successfully, after that I build the root =
file system using the BusyBox
> 1.1.0 infrastructure. I configured the busybox and the kernel with the =
cross compiler, finally I
> execute the mkrootfs.sh script and obtain the all files of fyle =
system, these files I copied to ext3
> partition of CompacFlash when I probe operati=F3n by the hyperTerminal =
(38400 bps) appears a error that
> say:
>=20
> Serial driver version 5.05c (2001-07-08) with no serial options =
enabled
> ttyS00 at 0xfdfff003 (irq =3D 30) is a 16550A
> RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
> VFS: Cannot open root device "xsysace/disco0/part3" or 00:00
> Please append a correct "root=3D" boot option
> Kernel panic: VFS: Unable to mount root fs on 00:00
> <0>Rebooting in 180 seconds.
>=20
>=20
> I configured the linux kernel with:
>=20
> Code maturity level options --->
>=20
> [*] Prompt for development and/or incomplete code/drivers
>=20
> File systems --->
>=20
> [*] /dev file system support (EXPERIMENTAL)
>=20
> [*] Automatically mount at boot
>=20
> [*] Virtual memory file system support (former shm fs)
>=20
> [*] /proc file system support
>=20
> General Setup --->
>=20
> [*] Networking support
>=20
> [*] Sysctl support
>=20
> [*] System V IPC
>=20
>=20
>=20
> and edit the /etc/fstab
>=20
> tmpfs /dev/shm tmpfs nodev,nosuid,noexec 0 0
>=20
> proc /proc proc defaults 0 0
>=20
> /dev/root / auto defaults,errors=3Dremount-ro 0 0
>=20
>=20
>=20
> =
-------------------------------------------------------------------------=
------------
> __ _ __ __ Jos=E9 Luis A=F1amuro - PhD Student
> \/ V /\ |\_\ /\_\ Dept. Ingenier=EDa Inform=E1tica
> | | | / \ | | \/ | | Universidad Aut=F3noma de Madrid
> | | | / /\\ | | | | | Lab B-209 Tel. +34 615887260
> | | |/ __ \| | \ / | http://www.ii.uam.es/
> `-_-/_/ \_\|_|\/|__|
^ permalink raw reply
* Fw: Cannot open root device "xsysace/disco0/part3" or 00:00
From: José Luis Añamuro Machicao @ 2008-03-26 20:25 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 2028 bytes --]
Hi
I am installing the linux kernel 2.4.26 in the FPGA Virtex II Pro following the instruction of
http://www.cs.washington.edu/research/lis/empart/xup_ppc_linux.shtml
I compiled the linux kernel successfully, after that I build the root file system using the BusyBox 1.1.0 infrastructure. I configured the busybox and the kernel with the cross compiler, finally I execute the mkrootfs.sh script and obtain the all files of fyle system, these files I copied to ext3 partition of CompacFlash when I probe operatión by the hyperTerminal (38400 bps) appears a error that say:
Serial driver version 5.05c (2001-07-08) with no serial options enabled
ttyS00 at 0xfdfff003 (irq = 30) is a 16550A
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
VFS: Cannot open root device "xsysace/disco0/part3" or 00:00
Please append a correct "root=" boot option
Kernel panic: VFS: Unable to mount root fs on 00:00
<0>Rebooting in 180 seconds.
I configured the linux kernel with:
Code maturity level options --->
[*] Prompt for development and/or incomplete code/drivers
File systems --->
[*] /dev file system support (EXPERIMENTAL)
[*] Automatically mount at boot
[*] Virtual memory file system support (former shm fs)
[*] /proc file system support
General Setup --->
[*] Networking support
[*] Sysctl support
[*] System V IPC
and edit the /etc/fstab
tmpfs /dev/shm tmpfs nodev,nosuid,noexec 0 0
proc /proc proc defaults 0 0
/dev/root / auto defaults,errors=remount-ro 0 0
-------------------------------------------------------------------------------------
__ _ __ __ José Luis Añamuro - PhD Student
\/ V /\ |\_\ /\_\ Dept. Ingeniería Informática
| | | / \ | | \/ | | Universidad Autónoma de Madrid
| | | / /\\ | | | | | Lab B-209 Tel. +34 615887260
| | |/ __ \| | \ / | http://www.ii.uam.es/
`-_-/_/ \_\|_|\/|__|
[-- Attachment #2: Type: text/html, Size: 4178 bytes --]
^ permalink raw reply
* [PATCH 5/5] [POWERPC] mpc837xrdb: add support for MCU
From: Anton Vorontsov @ 2008-03-26 20:25 UTC (permalink / raw)
To: linuxppc-dev
MCU is and external Freescale MC9S08QG8 microcontroller, mainly used to
provide soft power-off function, but also exports two GPIOs (wired to
the mcu1 and mcu2 LEDs and external (J28 and J43) headers.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/boot/dts/mpc8377_rdb.dts | 26 +++++++++++++++++++++++++-
arch/powerpc/boot/dts/mpc8378_rdb.dts | 26 +++++++++++++++++++++++++-
arch/powerpc/boot/dts/mpc8379_rdb.dts | 26 +++++++++++++++++++++++++-
arch/powerpc/platforms/83xx/Kconfig | 2 ++
arch/powerpc/platforms/83xx/mpc837x_rdb.c | 1 +
arch/powerpc/sysdev/fsl_soc.c | 1 +
6 files changed, 79 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 440aa4d..0897bba 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -111,7 +111,7 @@
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
- compatible = "fsl-i2c";
+ compatible = "fsl-i2c", "simple-bus";
reg = <0x3000 0x100>;
interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
@@ -121,6 +121,30 @@
compatible = "dallas,ds1339";
reg = <0x68>;
};
+ mcu_pio: mcu@0a {
+ #gpio-cells = <1>;
+ compatible = "fsl,mc9s08qg8-mpc837xrdb",
+ "fsl,mcu-mpc837xrdb",
+ "simple-bus";
+ reg = <0x0a>;
+ gpio-controller;
+
+ led@0 {
+ compatible = "fsl,mcu-mpc837xrdb-led2",
+ "gpio-led";
+ linux,name = "mcu2";
+ linux,active-low;
+ gpios = <&mcu_pio 0>;
+ };
+
+ led@1 {
+ compatible = "fsl,mcu-mpc837xrdb-led1",
+ "gpio-led";
+ linux,name = "mcu1";
+ linux,active-low;
+ gpios = <&mcu_pio 1>;
+ };
+ };
};
i2c@3100 {
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 9271153..e21cbb1 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -111,7 +111,7 @@
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
- compatible = "fsl-i2c";
+ compatible = "fsl-i2c", "simple-bus";
reg = <0x3000 0x100>;
interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
@@ -121,6 +121,30 @@
compatible = "dallas,ds1339";
reg = <0x68>;
};
+ mcu_pio: mcu@0a {
+ #gpio-cells = <1>;
+ compatible = "fsl,mc9s08qg8-mpc837xrdb",
+ "fsl,mcu-mpc837xrdb",
+ "simple-bus";
+ reg = <0x0a>;
+ gpio-controller;
+
+ led@0 {
+ compatible = "fsl,mcu-mpc837xrdb-led2",
+ "gpio-led";
+ linux,name = "mcu2";
+ linux,active-low;
+ gpios = <&mcu_pio 0>;
+ };
+
+ led@1 {
+ compatible = "fsl,mcu-mpc837xrdb-led1",
+ "gpio-led";
+ linux,name = "mcu1";
+ linux,active-low;
+ gpios = <&mcu_pio 1>;
+ };
+ };
};
i2c@3100 {
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 0dda2fc..45c164b 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -111,7 +111,7 @@
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
- compatible = "fsl-i2c";
+ compatible = "fsl-i2c", "simple-bus";
reg = <0x3000 0x100>;
interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
@@ -121,6 +121,30 @@
compatible = "dallas,ds1339";
reg = <0x68>;
};
+ mcu_pio: mcu@0a {
+ #gpio-cells = <1>;
+ compatible = "fsl,mc9s08qg8-mpc837xrdb",
+ "fsl,mcu-mpc837xrdb",
+ "simple-bus";
+ reg = <0x0a>;
+ gpio-controller;
+
+ led@0 {
+ compatible = "fsl,mcu-mpc837xrdb-led2",
+ "gpio-led";
+ linux,name = "mcu2";
+ linux,active-low;
+ gpios = <&mcu_pio 0>;
+ };
+
+ led@1 {
+ compatible = "fsl,mcu-mpc837xrdb-led1",
+ "gpio-led";
+ linux,name = "mcu1";
+ linux,active-low;
+ gpios = <&mcu_pio 1>;
+ };
+ };
};
i2c@3100 {
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index a5f72bb..3dd4213 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -77,6 +77,8 @@ config MPC837x_RDB
bool "Freescale MPC837x RDB"
select DEFAULT_UIMAGE
select PPC_MPC837x
+ select GENERIC_GPIO
+ select HAVE_GPIO_LIB
help
This option enables support for the MPC837x RDB Board.
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
index 2293ae5..c00356b 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -46,6 +46,7 @@ static void __init mpc837x_rdb_setup_arch(void)
static struct of_device_id mpc837x_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
+ { .compatible = "simple-bus", },
{},
};
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 7ad9bce..97a209a 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -410,6 +410,7 @@ static struct i2c_driver_device i2c_devices[] __initdata = {
{"dallas,ds1340", "rtc-ds1307", "ds1340",},
{"stm,m41t00", "rtc-ds1307", "m41t00"},
{"dallas,ds1374", "rtc-ds1374", "rtc-ds1374",},
+ {"fsl,mcu-mpc837xrdb", "mcu-mpc837xrdb", "mcu-mpc837xrdb"},
};
static int __init of_find_i2c_driver(struct device_node *node,
--
1.5.2.2
^ permalink raw reply related
* [PATCH 4/5] i2c: MPC837xRDB Power Management and GPIO expander driver
From: Anton Vorontsov @ 2008-03-26 20:25 UTC (permalink / raw)
To: i2c; +Cc: linuxppc-dev
On the MPC837xRDB boards there is MC9S08QG8 (MCU) chip with the custom
firmware pre-programmed. This firmware offers to control some of the MCU
GPIO pins via I2C (two pins, connected to the LEDs, but also available
from the J28 and J43 headers, plus another (third) pin is a GPIO as well
but on this board it is reserved for Power-Off function). MCU have some
other functions, but these are not implemented yet.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
This patch depends on the not yet applied OF/PowerPC GPIO patches, so
please consider this for RFC only.
Thanks.
drivers/i2c/chips/Kconfig | 9 ++
drivers/i2c/chips/Makefile | 1 +
drivers/i2c/chips/mcu_mpc837xrdb.c | 185 ++++++++++++++++++++++++++++++++++++
3 files changed, 195 insertions(+), 0 deletions(-)
create mode 100644 drivers/i2c/chips/mcu_mpc837xrdb.c
diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig
index 09d4937..db81018 100644
--- a/drivers/i2c/chips/Kconfig
+++ b/drivers/i2c/chips/Kconfig
@@ -150,4 +150,13 @@ config OZ99X
This driver can also be built as a module. If so, the module
will be called oz99x.
+config MCU_MPC837XRDB
+ tristate "MPC837XRDB MCU driver"
+ depends on I2C && MPC837x_RDB && OF_GPIO
+ help
+ Say Y here to enable soft power-off functionality on the Freescale
+ MPC837X-RDB boards, plus this driver will register MCU GPIOs as a
+ generic GPIO API chip, so you'll able to use MCU1 and MCU2 as GPIOs
+ and LEDs.
+
endmenu
diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile
index c69f891..bbe7495 100644
--- a/drivers/i2c/chips/Makefile
+++ b/drivers/i2c/chips/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_TPS65010) += tps65010.o
obj-$(CONFIG_MENELAUS) += menelaus.o
obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o
obj-$(CONFIG_OZ99X) += oz99x.o
+obj-$(CONFIG_MCU_MPC837XRDB) += mcu_mpc837xrdb.o
ifeq ($(CONFIG_I2C_DEBUG_CHIP),y)
EXTRA_CFLAGS += -DDEBUG
diff --git a/drivers/i2c/chips/mcu_mpc837xrdb.c b/drivers/i2c/chips/mcu_mpc837xrdb.c
new file mode 100644
index 0000000..a461c0e
--- /dev/null
+++ b/drivers/i2c/chips/mcu_mpc837xrdb.c
@@ -0,0 +1,190 @@
+/*
+ * MPC837xRDB Power Management and GPIO expander driver
+ *
+ * On the MPC837xRDB boards there is MC9S08QG8 (MCU) chip with the custom
+ * firmware pre-programmed. This firmware offers to control some of the MCU
+ * GPIO pins via I2C (two pins, connected to the LEDs, but also available
+ * from the J28 and J43 headers, plus another (third) pin is a GPIO as well
+ * but on this board it is reserved for Power-Off function). MCU have some
+ * other functions, but these are not implemented yet.
+ *
+ * Copyright (c) 2008 MontaVista Software, Inc.
+ *
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/i2c.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <asm/machdep.h>
+
+/*
+ * I don't have specifications for the MCU firmware that is used on the
+ * MPC837XRDB board, I found this register and bits positions by the
+ * trial&error method.
+ */
+#define MCU_REG_CTRL 0x20
+#define MCU_CTRL_POFF 0x40
+#define MCU_NUM_GPIO 2
+
+struct mcu {
+ spinlock_t lock;
+ struct device_node *np;
+ struct i2c_client *client;
+ struct of_gpio_chip of_gc;
+ u8 reg_ctrl;
+};
+
+static struct mcu *glob_mcu;
+
+static void mcu_power_off(void)
+{
+ struct mcu *mcu = glob_mcu;
+
+ pr_info("Sending power-off request to the MCU...\n");
+ spin_lock(&mcu->lock);
+ i2c_smbus_write_byte_data(glob_mcu->client, MCU_REG_CTRL,
+ mcu->reg_ctrl | MCU_CTRL_POFF);
+ spin_unlock(&mcu->lock);
+}
+
+static void mcu_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_gpio_chip *of_gc = to_of_gpio_chip(gc);
+ struct mcu *mcu = container_of(of_gc, struct mcu, of_gc);
+ u8 bit = 1 << (4 + gpio);
+
+ spin_lock(&mcu->lock);
+ if (val)
+ mcu->reg_ctrl |= bit;
+ else
+ mcu->reg_ctrl &= ~bit;
+
+ i2c_smbus_write_byte_data(mcu->client, MCU_REG_CTRL, mcu->reg_ctrl);
+ spin_unlock(&mcu->lock);
+}
+
+static int mcu_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ mcu_gpio_set(gc, gpio, val);
+ return 0;
+}
+
+static int mcu_gpiochip_add(struct mcu *mcu)
+{
+ struct device_node *np;
+ struct of_gpio_chip *of_gc = &mcu->of_gc;
+ struct gpio_chip *gc = &of_gc->gc;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mcu-mpc837xrdb");
+ if (!np)
+ return -ENODEV;
+
+ gc->label = np->full_name;
+ gc->can_sleep = 1;
+ gc->ngpio = MCU_NUM_GPIO;
+ gc->base = -1;
+ gc->set = mcu_gpio_set;
+ gc->direction_output = mcu_gpio_dir_out;
+ of_gc->gpio_cells = 1;
+ of_gc->xlate = of_gpio_simple_xlate;
+
+ np->data = of_gc;
+ mcu->np = np;
+
+ /*
+ * We don't want to lose the node, its ->data and ->full_name...
+ * So, there is no of_node_put(np); here.
+ */
+ return gpiochip_add(gc);
+}
+
+static void mcu_gpiochip_remove(struct mcu *mcu)
+{
+ gpiochip_remove(&mcu->of_gc.gc);
+ of_node_put(mcu->np);
+}
+
+static int mcu_probe(struct i2c_client *client)
+{
+ struct mcu *mcu;
+ int ret;
+
+ mcu = kzalloc(sizeof(*mcu), GFP_KERNEL);
+ if (!mcu)
+ return -ENOMEM;
+
+ spin_lock_init(&mcu->lock);
+ mcu->client = client;
+ i2c_set_clientdata(client, mcu);
+
+ ret = i2c_smbus_read_byte_data(mcu->client, MCU_REG_CTRL);
+ if (ret < 0)
+ goto err_iic_read;
+ mcu->reg_ctrl = ret;
+
+ /* XXX: this is potentionally racy, but there is no ppc_md lock */
+ if (!ppc_md.power_off) {
+ glob_mcu = mcu;
+ ppc_md.power_off = mcu_power_off;
+ dev_info(&client->dev, "will provide power-off service\n");
+ }
+
+ ret = mcu_gpiochip_add(mcu);
+ if (ret)
+ goto err_gpio;
+
+ return 0;
+err_gpio:
+ mcu_gpiochip_remove(mcu);
+err_iic_read:
+ kfree(mcu);
+ return ret;
+}
+
+static int mcu_remove(struct i2c_client *client)
+{
+ struct mcu *mcu = i2c_get_clientdata(client);
+
+ if (glob_mcu == mcu) {
+ ppc_md.power_off = NULL;
+ glob_mcu = NULL;
+ }
+
+ i2c_set_clientdata(client, NULL);
+ mcu_gpiochip_remove(mcu);
+ kfree(mcu);
+ return 0;
+}
+
+static struct i2c_driver mcu_driver = {
+ .driver = {
+ .name = "mcu-mpc837xrdb",
+ .owner = THIS_MODULE,
+ },
+ .probe = mcu_probe,
+ .remove = mcu_remove,
+};
+
+static int __init mcu_init(void)
+{
+ return i2c_add_driver(&mcu_driver);
+}
+module_init(mcu_init);
+
+static void __exit mcu_exit(void)
+{
+ i2c_del_driver(&mcu_driver);
+}
+module_exit(mcu_exit);
+
+MODULE_DESCRIPTION("MPC837xRDB Power Management and GPIO expander driver");
+MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
+MODULE_LICENSE("GPL");
--
1.5.2.2
^ permalink raw reply related
* [PATCH 3/5] leds: implement OpenFirmare GPIO LEDs driver
From: Anton Vorontsov @ 2008-03-26 20:24 UTC (permalink / raw)
To: Richard Purdie; +Cc: linuxppc-dev
Despite leds-gpio and leds-of-gpio similar names and purposes, there
is actually very few code can be shared between the two (both drivers
are mostly the driver bindings anyway).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
This patch depends on the not yet applied OF/PowerPC GPIO patches, so
please consider this for RFC only.
Thanks.
drivers/leds/Kconfig | 8 ++
drivers/leds/Makefile | 1 +
drivers/leds/leds-of-gpio.c | 196 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 205 insertions(+), 0 deletions(-)
create mode 100644 drivers/leds/leds-of-gpio.c
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 09aac5d..8bed058 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -113,6 +113,14 @@ config LEDS_GPIO
outputs. To be useful the particular board must have LEDs
and they must be connected to the GPIO lines.
+config LEDS_OF_GPIO
+ tristate "LED Support for GPIO connected LEDs"
+ depends on LEDS_CLASS && OF_GPIO
+ help
+ This option enables support for the LEDs connected to GPIO
+ outputs. To be useful the particular board must have LEDs
+ and they must be connected to the GPIO lines.
+
config LEDS_CM_X270
tristate "LED Support for the CM-X270 LEDs"
depends on LEDS_CLASS && MACH_ARMCORE
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index 84ced3b..78926ca 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_LEDS_H1940) += leds-h1940.o
obj-$(CONFIG_LEDS_COBALT_QUBE) += leds-cobalt-qube.o
obj-$(CONFIG_LEDS_COBALT_RAQ) += leds-cobalt-raq.o
obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o
+obj-$(CONFIG_LEDS_OF_GPIO) += leds-of-gpio.o
obj-$(CONFIG_LEDS_CM_X270) += leds-cm-x270.o
obj-$(CONFIG_LEDS_CLEVO_MAIL) += leds-clevo-mail.o
obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx.o
diff --git a/drivers/leds/leds-of-gpio.c b/drivers/leds/leds-of-gpio.c
new file mode 100644
index 0000000..aeb2f39
--- /dev/null
+++ b/drivers/leds/leds-of-gpio.c
@@ -0,0 +1,196 @@
+/*
+ * LEDs driver for GPIOs (OpenFirmware bindings)
+ *
+ * Copyright (C) 2007 8D Technologies inc.
+ * Raphael Assenat <raph@8d.com>
+ * Copyright (C) 2008 MontaVista Software, Inc.
+ * Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+#include <linux/of_gpio.h>
+#include <linux/leds.h>
+#include <linux/workqueue.h>
+
+struct of_gpio_led {
+ struct device_node *np;
+ struct led_classdev cdev;
+ unsigned int gpio;
+ struct work_struct work;
+ bool new_level;
+ bool can_sleep;
+ bool active_low;
+};
+
+static void gpio_led_work(struct work_struct *work)
+{
+ struct of_gpio_led *led = container_of(work, struct of_gpio_led, work);
+
+ gpio_set_value_cansleep(led->gpio, led->new_level);
+}
+
+static void gpio_led_set(struct led_classdev *led_cdev,
+ enum led_brightness value)
+{
+ struct of_gpio_led *led = container_of(led_cdev, struct of_gpio_led,
+ cdev);
+ bool level;
+
+ if (value == LED_OFF)
+ level = false;
+ else
+ level = true;
+
+ if (led->active_low)
+ level = !level;
+
+ /* setting GPIOs with I2C/etc requires a preemptible task context */
+ if (led->can_sleep) {
+ if (preempt_count()) {
+ led->new_level = level;
+ schedule_work(&led->work);
+ } else {
+ gpio_set_value_cansleep(led->gpio, level);
+ }
+ } else {
+ gpio_set_value(led->gpio, level);
+ }
+}
+
+static int __devinit of_gpio_leds_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ int ret;
+ struct of_gpio_led *led;
+ struct device_node *np = ofdev->node;
+
+ led = kzalloc(sizeof(*led), GFP_KERNEL);
+ if (!led)
+ return -ENOMEM;
+
+ led->np = np;
+
+ ret = of_get_gpio(np, 0);
+ if (!gpio_is_valid(ret)) {
+ dev_err(&ofdev->dev, "gpio is invalid\n");
+ goto err_get_gpio;
+ }
+ led->gpio = ret;
+ led->can_sleep = gpio_cansleep(led->gpio);
+
+ led->cdev.name = of_get_property(np, "linux,name", NULL);
+ if (!led->cdev.name)
+ led->cdev.name = ofdev->dev.bus_id;
+ led->cdev.default_trigger = of_get_property(np,
+ "linux,default-trigger", NULL);
+ led->active_low = of_get_property(np, "linux,active-low", NULL) ?
+ 1 : 0;
+ led->cdev.brightness_set = gpio_led_set;
+ led->cdev.brightness = LED_OFF;
+
+ ret = gpio_request(led->gpio, ofdev->dev.bus_id);
+ if (ret < 0) {
+ dev_err(&ofdev->dev, "could not request gpio, status is %d\n",
+ ret);
+ goto err_gpio;
+ }
+
+ ret = gpio_direction_output(led->gpio, led->active_low);
+ if (ret) {
+ dev_err(&ofdev->dev, "gpio could not be an output, "
+ "status is %d\n", ret);
+ goto err_gpio;
+ }
+
+ INIT_WORK(&led->work, gpio_led_work);
+
+ ret = led_classdev_register(&ofdev->dev, &led->cdev);
+ if (ret < 0) {
+ dev_err(&ofdev->dev, "could register led cdev, status is %d\n",
+ ret);
+ gpio_free(led->gpio);
+ goto err_reg_cdev;
+ }
+
+ dev_set_drvdata(&ofdev->dev, led);
+
+ return 0;
+
+err_reg_cdev:
+ cancel_work_sync(&led->work);
+err_gpio:
+ gpio_free(led->gpio);
+err_get_gpio:
+ kfree(led);
+ return ret;
+}
+
+static int __devexit of_gpio_leds_remove(struct of_device *ofdev)
+{
+ struct of_gpio_led *led = dev_get_drvdata(&ofdev->dev);
+
+ led_classdev_unregister(&led->cdev);
+ cancel_work_sync(&led->work);
+ gpio_free(led->gpio);
+ of_node_put(led->np);
+ kfree(led);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int of_gpio_led_suspend(struct of_device *ofdev, pm_message_t state)
+{
+ struct of_gpio_led *led = dev_get_drvdata(&ofdev->dev);
+
+ led_classdev_suspend(&led->cdev);
+ return 0;
+}
+
+static int of_gpio_led_resume(struct of_device *ofdev)
+{
+ struct of_gpio_led *led = dev_get_drvdata(&ofdev->dev);
+
+ led_classdev_resume(&led->cdev);
+ return 0;
+}
+#else
+#define of_gpio_led_suspend NULL
+#define of_gpio_led_resume NULL
+#endif /* CONFIG_PM */
+
+static const struct of_device_id of_gpio_leds_match[] = {
+ { .compatible = "gpio-led", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, of_gpio_leds_match);
+
+static struct of_platform_driver of_gpio_leds_drv = {
+ .name = "of_gpio_leds",
+ .match_table = of_gpio_leds_match,
+ .probe = of_gpio_leds_probe,
+ .remove = __devexit_p(of_gpio_leds_remove),
+ .suspend = of_gpio_led_suspend,
+ .resume = of_gpio_led_resume,
+};
+
+static int __init of_gpio_leds_init(void)
+{
+ return of_register_platform_driver(&of_gpio_leds_drv);
+}
+module_init(of_gpio_leds_init);
+
+static void __exit of_gpio_leds_exit(void)
+{
+ of_unregister_platform_driver(&of_gpio_leds_drv);
+}
+module_exit(of_gpio_leds_exit);
+
+MODULE_DESCRIPTION("OF-platform GPIO LEDs driver");
+MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
+MODULE_LICENSE("GPL");
--
1.5.2.2
^ permalink raw reply related
* [PATCH 2/5] leds: mark led_classdev.default_trigger as const
From: Anton Vorontsov @ 2008-03-26 20:24 UTC (permalink / raw)
To: Richard Purdie; +Cc: linuxppc-dev
LED classdev core doesn't modify memory pointed by the default_trigger,
so mark it as const and we'll able to pass const char *s without getting
compiler warnings.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
include/linux/leds.h | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/linux/leds.h b/include/linux/leds.h
index 0201f6f..2122a77 100644
--- a/include/linux/leds.h
+++ b/include/linux/leds.h
@@ -45,7 +45,7 @@ struct led_classdev {
struct device *dev;
struct list_head node; /* LED Device list */
- char *default_trigger; /* Trigger to use */
+ const char *default_trigger; /* Trigger to use */
#ifdef CONFIG_LEDS_TRIGGERS
/* Protects the trigger data below */
--
1.5.2.2
^ permalink raw reply related
* [PATCH 1/5] of/gpio: export of_simple_xlate function
From: Anton Vorontsov @ 2008-03-26 20:24 UTC (permalink / raw)
To: linuxppc-dev
So we'll able to use it for the non-memory mapped drivers (like
I2C GPIO expanders).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
Depends on the previous OF GPIO work.
drivers/of/gpio.c | 6 +++---
include/linux/of_gpio.h | 13 +++++++++++++
2 files changed, 16 insertions(+), 3 deletions(-)
diff --git a/drivers/of/gpio.c b/drivers/of/gpio.c
index a6775ff..03e2fed 100644
--- a/drivers/of/gpio.c
+++ b/drivers/of/gpio.c
@@ -106,9 +106,8 @@ err0:
}
EXPORT_SYMBOL(of_get_gpio);
-static int of_gpio_simple_xlate(struct of_gpio_chip *of_gc,
- struct device_node *np,
- const void *gpio_spec)
+int of_gpio_simple_xlate(struct of_gpio_chip *of_gc, struct device_node *np,
+ const void *gpio_spec)
{
const u32 *gpio = gpio_spec;
@@ -117,6 +116,7 @@ static int of_gpio_simple_xlate(struct of_gpio_chip *of_gc,
return *gpio;
}
+EXPORT_SYMBOL(of_gpio_simple_xlate);
int of_mm_gpiochip_add(struct device_node *np,
struct of_mm_gpio_chip *mm_gc)
diff --git a/include/linux/of_gpio.h b/include/linux/of_gpio.h
index ca313f0..75c209c 100644
--- a/include/linux/of_gpio.h
+++ b/include/linux/of_gpio.h
@@ -83,6 +83,19 @@ extern int of_get_gpio(struct device_node *np, int index);
extern int of_mm_gpiochip_add(struct device_node *np,
struct of_mm_gpio_chip *mm_gc);
+/**
+ * of_gpio_simple_xlate - translate gpio_spec to the GPIO number
+ * @of_gc: pointer to the of_gpio_chip structure
+ * @np: device node of the GPIO chip
+ * @gpio_spec: gpio specifier as found in the device tree
+ *
+ * This is simple translation function, suitable for the most 1:1 mapped
+ * gpio chips. This function performs only one sanity check: whether gpio
+ * is less than ngpios (that is specified in the gpio_chip).
+ */
+extern int of_gpio_simple_xlate(struct of_gpio_chip *of_gc,
+ struct device_node *np,
+ const void *gpio_spec);
#else
/* Drivers may not strictly depend on the GPIO support, so let them link. */
--
1.5.2.2
^ permalink raw reply related
* Cannot open root device "xsysace/disco0/part3" or 00:00
From: José Luis Añamuro Machicao @ 2008-03-26 19:54 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 2028 bytes --]
Hi
I am installing the linux kernel 2.4.26 in the FPGA Virtex II Pro following the instruction of
http://www.cs.washington.edu/research/lis/empart/xup_ppc_linux.shtml
I compiled the linux kernel successfully, after that I build the root file system using the BusyBox 1.1.0 infrastructure. I configured the busybox and the kernel with the cross compiler, finally I execute the mkrootfs.sh script and obtain the all files of fyle system, these files I copied to ext3 partition of CompacFlash when I probe operatión by the hyperTerminal (38400 bps) appears a error that say:
Serial driver version 5.05c (2001-07-08) with no serial options enabled
ttyS00 at 0xfdfff003 (irq = 30) is a 16550A
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
VFS: Cannot open root device "xsysace/disco0/part3" or 00:00
Please append a correct "root=" boot option
Kernel panic: VFS: Unable to mount root fs on 00:00
<0>Rebooting in 180 seconds.
I configured the linux kernel with:
Code maturity level options --->
[*] Prompt for development and/or incomplete code/drivers
File systems --->
[*] /dev file system support (EXPERIMENTAL)
[*] Automatically mount at boot
[*] Virtual memory file system support (former shm fs)
[*] /proc file system support
General Setup --->
[*] Networking support
[*] Sysctl support
[*] System V IPC
and edit the /etc/fstab
tmpfs /dev/shm tmpfs nodev,nosuid,noexec 0 0
proc /proc proc defaults 0 0
/dev/root / auto defaults,errors=remount-ro 0 0
-------------------------------------------------------------------------------------
__ _ __ __ José Luis Añamuro - PhD Student
\/ V /\ |\_\ /\_\ Dept. Ingeniería Informática
| | | / \ | | \/ | | Universidad Autónoma de Madrid
| | | / /\\ | | | | | Lab B-209 Tel. +34 615887260
| | |/ __ \| | \ / | http://www.ii.uam.es/
`-_-/_/ \_\|_|\/|__|
[-- Attachment #2: Type: text/html, Size: 4178 bytes --]
^ permalink raw reply
* RE: Xilinx Temac Timer ?
From: John Linn @ 2008-03-26 19:48 UTC (permalink / raw)
To: khollan, linuxppc-embedded
In-Reply-To: <16306218.post@talk.nabble.com>
Hi Kevin,
I didn't write the code but I know the driver somewhat.
I think the intention of stopping the timer is to prevent the reentrancy
as the comment says because there is a function, gmii_poll, that is
setup on the timer to go read the phy registers to see if anything
changed in the phy.=20
Stopping the timer prevents a phy read from happening in gmii_poll in
the middle of the ioctl phy read which could hose things up.
I don't see why you couldn't change that timer stop to some other form
of synchronization/mutual exclusion so that the phy reads don't collide.
As I look at it, it appears to me the spinlock should provide the
synchronization needed without stopping the timer, but maybe I'm missing
something. I CCed John Bonesio as he's the guy that developed this code
I believe and maybe he'll have more insight here.
Thanks,
John
-----Original Message-----
From: linuxppc-embedded-bounces+john.linn=3Dxilinx.com@ozlabs.org
[mailto:linuxppc-embedded-bounces+john.linn=3Dxilinx.com@ozlabs.org] On
Behalf Of khollan
Sent: Wednesday, March 26, 2008 11:03 AM
To: linuxppc-embedded@ozlabs.org
Subject: Xilinx Temac Timer ?
Hi
What is the purpose of stopping the timer in the ioctl call to read a
PHY
register? This is the code:
case SIOCGMIIREG: /* Read GMII PHY register. */
case SIOCDEVPRIVATE + 1: /* for binary compat, remove in 2.5 */
if (data->phy_id > 31 || data->reg_num > 31)
return -ENXIO;
/* Stop the PHY timer to prevent reentrancy. */
spin_lock_irqsave(&XTE_spinlock, flags);
del_timer_sync(&lp->phy_timer);
ret =3D XTemac_PhyRead(&lp->Emac, data->phy_id,
data->reg_num, &data->val_out);
/* Start the PHY timer up again. */
lp->phy_timer.expires =3D jiffies + 2 * HZ;
add_timer(&lp->phy_timer);
spin_unlock_irqrestore(&XTE_spinlock, flags);
if (ret !=3D XST_SUCCESS) {
printk(KERN_ERR
"%s: XTemac: could not read from PHY, error=3D%d.\n",
dev->name, ret);
return -EBUSY;
}
return 0;
I ask because I have an application that needs to read a Phy register
before
the timer has started to see if a link is present. This causes a kernel
bug
when trying to run the del_timer_sync function because there is not a
running timer. I would like to know if it is safe to remove the timer
del
and add but keep the spin lock.
Thanks for your help
Kevin
--=20
View this message in context:
http://www.nabble.com/Xilinx-Temac-Timer---tp16306218p16306218.html
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
_______________________________________________
Linuxppc-embedded mailing list
Linuxppc-embedded@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-embedded
^ permalink raw reply
* Fw: Cannot open root device "xsysace/disco0/part3" or 00:00
From: José Luis Añamuro Machicao @ 2008-03-26 19:42 UTC (permalink / raw)
To: Linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 2302 bytes --]
----- Original Message -----
From: José Luis Añamuro Machicao
To: Linuxppc-embedded@ozlabs.org
Cc: josel_am2@yahoo.es ; jose_luis@fun-humanismo-ciencia.es
Sent: Wednesday, March 26, 2008 8:39 PM
Subject: Cannot open root device "xsysace/disco0/part3" or 00:00
Hi
I am installing the linux kernel 2.4.26 in the FPGA Virtex II Pro following the instruction of
http://www.cs.washington.edu/research/lis/empart/xup_ppc_linux.shtml
I compiled the linux kernel successfully, after that I build the root file system using the BusyBox 1.1.0 infrastructure. I configured the busybox and the kernel with the cross compiler, finally I execute the mkrootfs.sh script and obtain the all files of fyle system, these files I copied to ext3 partition of CompacFlash when I probe operatión by the hyperTerminal (38400 bps) appears a error that say:
Serial driver version 5.05c (2001-07-08) with no serial options enabled
ttyS00 at 0xfdfff003 (irq = 30) is a 16550A
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
VFS: Cannot open root device "xsysace/disco0/part3" or 00:00
Please append a correct "root=" boot option
Kernel panic: VFS: Unable to mount root fs on 00:00
<0>Rebooting in 180 seconds.
I configured the linux kernel with:
Code maturity level options --->
[*] Prompt for development and/or incomplete code/drivers
File systems --->
[*] /dev file system support (EXPERIMENTAL)
[*] Automatically mount at boot
[*] Virtual memory file system support (former shm fs)
[*] /proc file system support
General Setup --->
[*] Networking support
[*] Sysctl support
[*] System V IPC
and edit the /etc/fstab
tmpfs /dev/shm tmpfs nodev,nosuid,noexec 0 0
proc /proc proc defaults 0 0
/dev/root / auto defaults,errors=remount-ro 0 0
-------------------------------------------------------------------------------------
__ _ __ __ José Luis Añamuro - PhD Student
\/ V /\ |\_\ /\_\ Dept. Ingeniería Informática
| | | / \ | | \/ | | Universidad Autónoma de Madrid
| | | / /\\ | | | | | Lab B-209 Tel. +34 615887260
| | |/ __ \| | \ / | http://www.ii.uam.es/
`-_-/_/ \_\|_|\/|__|
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^ permalink raw reply
* Cannot open root device "xsysace/disco0/part3" or 00:00
From: José Luis Añamuro Machicao @ 2008-03-26 19:39 UTC (permalink / raw)
To: Linuxppc-embedded; +Cc: jose_luis
[-- Attachment #1: Type: text/plain, Size: 2026 bytes --]
Hi
I am installing the linux kernel 2.4.26 in the FPGA Virtex II Pro following the instruction of
http://www.cs.washington.edu/research/lis/empart/xup_ppc_linux.shtml
I compiled the linux kernel successfully, after that I build the root file system using the BusyBox 1.1.0 infrastructure. I configured the busybox and the kernel with the cross compiler, finally I execute the mkrootfs.sh script and obtain the all files of fyle system, these files I copied to ext3 partition of CompacFlash when I probe operatión by the hyperTerminal (38400 bps) appears a error that say:
Serial driver version 5.05c (2001-07-08) with no serial options enabled
ttyS00 at 0xfdfff003 (irq = 30) is a 16550A
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
VFS: Cannot open root device "xsysace/disco0/part3" or 00:00
Please append a correct "root=" boot option
Kernel panic: VFS: Unable to mount root fs on 00:00
<0>Rebooting in 180 seconds.
I configured the linux kernel with:
Code maturity level options --->
[*] Prompt for development and/or incomplete code/drivers
File systems --->
[*] /dev file system support (EXPERIMENTAL)
[*] Automatically mount at boot
[*] Virtual memory file system support (former shm fs)
[*] /proc file system support
General Setup --->
[*] Networking support
[*] Sysctl support
[*] System V IPC
and edit the /etc/fstab
tmpfs /dev/shm tmpfs nodev,nosuid,noexec 0 0
proc /proc proc defaults 0 0
/dev/root / auto defaults,errors=remount-ro 0 0
-------------------------------------------------------------------------------------
__ _ __ __ José Luis Añamuro - PhD Student
\/ V /\ |\_\ /\_\ Dept. Ingeniería Informática
| | | / \ | | \/ | | Universidad Autónoma de Madrid
| | | / /\\ | | | | | Lab B-209 Tel. +34 615887260
| | |/ __ \| | \ / | http://www.ii.uam.es/
`-_-/_/ \_\|_|\/|__|
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^ permalink raw reply
* [RESEND][POWERPC] mpc5200: Amalgamated dts fixes and updates
From: Bartlomiej Sieka @ 2008-03-26 19:45 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, Anatolij Gustschin, Paul Mackerras
In-Reply-To: <fa686aa40803212014ne560615sfcdef542d59eb6cb@mail.gmail.com>
The bulk of this patch is taken from
http://patchwork.ozlabs.org/linuxppc/patch?q=Balakowicz&id=16197, with few
other updates.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
---
Addressed comments from the list; would appreciate picking up as the patch
fixes booting issue on TQM5200 and Motion-PRO (cm5200 changes are analogous,
but not tested due to hardware unavailability).
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
index 30737ea..2d25ca8 100644
--- a/arch/powerpc/boot/dts/cm5200.dts
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -212,13 +212,30 @@
ethernet@3000 {
device_type = "network";
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
- reg = <3000 800>;
+ reg = <3000 400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
+ phy-handle = <&phy0>;
+ };
+
+ mdio@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
+ reg = <3000 400>; // fec range, since we need to setup fec interrupts
+ interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
+ interrupt-parent = <&mpc5200_pic>;
+
+ phy0:ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
};
i2c@3d40 {
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>;
interrupts = <2 10 0>;
@@ -231,4 +248,22 @@
reg = <8000 4000>;
};
};
+
+ lpb {
+ model = "fsl,lpb";
+ compatible = "fsl,lpb";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0 0 fc000000 2000000>;
+
+ // 16-bit flash device at LocalPlus Bus CS0
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0 0 2000000>;
+ bank-width = <2>;
+ device-width = <2>;
+ #size-cells = <1>;
+ #address-cells = <1>;
+ };
+ };
};
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
index 76951ab..f27256b 100644
--- a/arch/powerpc/boot/dts/motionpro.dts
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -148,7 +148,6 @@
interrupt-parent = <&mpc5200_pic>;
};
-
spi@f00 {
compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
reg = <f00 20>;
@@ -209,10 +208,25 @@
ethernet@3000 {
device_type = "network";
compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
- reg = <3000 800>;
+ reg = <3000 400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
+ phy-handle = <&phy0>;
+ };
+
+ mdio@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
+ reg = <3000 400>; // fec range, since we need to setup fec interrupts
+ interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
+ interrupt-parent = <&mpc5200_pic>;
+
+ phy0:ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <2>;
+ };
};
ata@3a00 {
@@ -223,11 +237,19 @@
};
i2c@3d40 {
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
+
+ rtc@68 {
+ device_type = "rtc";
+ compatible = "dallas,ds1339";
+ reg = <68>;
+ };
};
sram@8000 {
@@ -240,7 +262,8 @@
compatible = "fsl,lpb";
#address-cells = <2>;
#size-cells = <1>;
- ranges = <1 0 50000000 00010000
+ ranges = <0 0 ff000000 01000000
+ 1 0 50000000 00010000
2 0 50010000 00010000
3 0 50020000 00010000>;
@@ -271,31 +294,15 @@
compatible = "promess,pro_module_dio";
reg = <3 800 2>;
};
- };
- pci@f0000d00 {
- #interrupt-cells = <1>;
- #size-cells = <2>;
- #address-cells = <3>;
- device_type = "pci";
- compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
- reg = <f0000d00 100>;
- interrupt-map-mask = <f800 0 0 7>;
- interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
- c000 0 0 2 &mpc5200_pic 1 1 3
- c000 0 0 3 &mpc5200_pic 1 2 3
- c000 0 0 4 &mpc5200_pic 1 3 3
-
- c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot
- c800 0 0 2 &mpc5200_pic 1 2 3
- c800 0 0 3 &mpc5200_pic 1 3 3
- c800 0 0 4 &mpc5200_pic 0 0 3>;
- clock-frequency = <0>; // From boot loader
- interrupts = <2 8 0 2 9 0 2 a 0>;
- interrupt-parent = <&mpc5200_pic>;
- bus-range = <0 0>;
- ranges = <42000000 0 80000000 80000000 0 20000000
- 02000000 0 a0000000 a0000000 0 10000000
- 01000000 0 00000000 b0000000 0 01000000>;
+ // 16-bit flash device at LocalPlus Bus CS0
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0 0 01000000>;
+ bank-width = <2>;
+ device-width = <2>;
+ #size-cells = <1>;
+ #address-cells = <1>;
+ };
};
};
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
index c86464f..d2dc278 100644
--- a/arch/powerpc/boot/dts/tqm5200.dts
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -127,10 +127,25 @@
ethernet@3000 {
device_type = "network";
compatible = "fsl,mpc5200-fec";
- reg = <3000 800>;
+ reg = <3000 400>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <2 5 0>;
interrupt-parent = <&mpc5200_pic>;
+ phy-handle = <&phy0>;
+ };
+
+ mdio@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
+ reg = <3000 400>; // fec range, since we need to setup fec interrupts
+ interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co.
+ interrupt-parent = <&mpc5200_pic>;
+
+ phy0:ethernet-phy@0 {
+ device_type = "ethernet-phy";
+ reg = <0>;
+ };
};
ata@3a00 {
@@ -141,11 +156,19 @@
};
i2c@3d40 {
+ #address-cells = <1>;
+ #size-cells = <0>;
compatible = "fsl,mpc5200-i2c","fsl-i2c";
reg = <3d40 40>;
interrupts = <2 10 0>;
interrupt-parent = <&mpc5200_pic>;
fsl5200-clocking;
+
+ rtc@68 {
+ device_type = "rtc";
+ compatible = "dallas,ds1307";
+ reg = <68>;
+ };
};
sram@8000 {
@@ -154,6 +177,23 @@
};
};
+ lpb {
+ model = "fsl,lpb";
+ compatible = "fsl,lpb";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0 0 fc000000 02000000>;
+
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0 0 02000000>;
+ bank-width = <4>;
+ device-width = <2>;
+ #size-cells = <1>;
+ #address-cells = <1>;
+ };
+ };
+
pci@f0000d00 {
#interrupt-cells = <1>;
#size-cells = <2>;
^ permalink raw reply related
* Re: How to use MMC-over-SPI on MPC8313E
From: Bobby Skinner @ 2008-03-26 18:36 UTC (permalink / raw)
To: linuxppc-dev; +Cc: vvaghasia
Hi,
I am also trying to get MMC over SPI working on the 8313E dev board.
Could I trouble you to send me whatever you have in the way of
drivers, instructions or documentation. I am sorry to bother you, but
I saw your message here: http://ozlabs.org/pipermail/linuxppc-dev/2007-September/042119.html
and it looks like you guys may have already solved the problem that
I am having.
Thanks in advance,
Bobby
^ permalink raw reply
* Re: [PATCH] [POWERPC] CPM1: implement GPIO LIB API
From: Scott Wood @ 2008-03-26 18:04 UTC (permalink / raw)
To: Jochen Friedrich; +Cc: linuxppc-dev list, linux-kernel
In-Reply-To: <47EA8C1C.4090604@scram.de>
Jochen Friedrich wrote:
> Hi Scott,
>
>>> diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
>>> index 7fd224c..e12cbf0 100644
>>> --- a/arch/powerpc/platforms/8xx/Kconfig
>>> +++ b/arch/powerpc/platforms/8xx/Kconfig
>>> @@ -4,6 +4,8 @@ config FADS
>>> config CPM1
>>> bool
>>> select CPM
>>> + select GENERIC_GPIO
>>> + select GPIO_LIB
>> Shouldn't this depend on the user enabling GPIO support? Some 8xx
>> boards are very memory-constrained, so we don't want to be making the
>> kernel even bigger than it already is unless it's actually needed.
>
> Are you more comfortable with this?
Sure.
-Scott
^ permalink raw reply
* Re: [PATCH] [POWERPC] CPM1: implement GPIO LIB API
From: Jochen Friedrich @ 2008-03-26 17:47 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev list, linux-kernel
In-Reply-To: <47E93350.6090806@freescale.com>
Hi Scott,
>> diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
>> index 7fd224c..e12cbf0 100644
>> --- a/arch/powerpc/platforms/8xx/Kconfig
>> +++ b/arch/powerpc/platforms/8xx/Kconfig
>> @@ -4,6 +4,8 @@ config FADS
>> config CPM1
>> bool
>> select CPM
>> + select GENERIC_GPIO
>> + select GPIO_LIB
>
> Shouldn't this depend on the user enabling GPIO support? Some 8xx
> boards are very memory-constrained, so we don't want to be making the
> kernel even bigger than it already is unless it's actually needed.
Are you more comfortable with this?
Implement GPIO LIB API on CPM1 Freescale SoC.
Signed-off-by: Jochen Friedrich <jochen@scram.de>
---
arch/powerpc/platforms/8xx/Kconfig | 10 ++
arch/powerpc/sysdev/cpm1.c | 246 +++++++++++++++++++++++++++++++++++-
2 files changed, 255 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
index 7fd224c..9d17425 100644
--- a/arch/powerpc/platforms/8xx/Kconfig
+++ b/arch/powerpc/platforms/8xx/Kconfig
@@ -109,6 +109,16 @@ config 8xx_COPYBACK
If in doubt, say Y here.
+config 8xx_GPIO
+ bool "GPIO API Support"
+ select GENERIC_GPIO
+ select HAVE_GPIO_LIB
+ help
+ Saying Y here will cause the ports on an MPC8xx processor to be used
+ with the GPIO API. If you say N here, the kernel needs less memory.
+
+ If in doubt, say Y here.
+
config 8xx_CPU6
bool "CPU6 Silicon Errata (860 Pre Rev. C)"
help
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index df8bd2b..6c97f3f 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -30,6 +30,7 @@
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/module.h>
+#include <linux/spinlock.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/8xx_immap.h>
@@ -42,6 +43,11 @@
#include <asm/fs_pd.h>
+#ifdef CONFIG_8xx_GPIO
+#include <linux/of_gpio.h>
+#include <asm/gpio.h>
+#endif
+
#define CPM_MAP_SIZE (0x4000)
#ifndef CONFIG_PPC_CPM_NEW_BINDING
@@ -403,7 +409,7 @@ struct cpm_ioport16 {
};
struct cpm_ioport32 {
- __be32 dir, par, sor;
+ __be32 dir, par, sor, dat;
};
static void cpm1_set_pin32(int port, int pin, int flags)
@@ -610,3 +616,241 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
return 0;
}
+
+/*
+ * GPIO LIB API implementation
+ */
+#ifdef CONFIG_8xx_GPIO
+
+struct cpm1_gpio16_chip {
+ struct of_mm_gpio_chip mm_gc;
+ spinlock_t lock;
+
+ /* shadowed data register to clear/set bits safely */
+ u16 cpdata;
+};
+
+static inline struct cpm1_gpio16_chip *
+to_cpm1_gpio16_chip(struct of_mm_gpio_chip *mm_gc)
+{
+ return container_of(mm_gc, struct cpm1_gpio16_chip, mm_gc);
+}
+
+static void cpm1_gpio16_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+ struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc);
+ struct cpm_ioport16 __iomem *iop = mm_gc->regs;
+
+ cpm1_gc->cpdata = in_be16(&iop->dat);
+}
+
+static int cpm1_gpio16_get(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm_ioport16 __iomem *iop = mm_gc->regs;
+ u16 pin_mask;
+
+ pin_mask = 1 << (15 - gpio);
+
+ return !!(in_be16(&iop->dat) & pin_mask);
+}
+
+static void cpm1_gpio16_set(struct gpio_chip *gc, unsigned int gpio, int value)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm1_gpio16_chip *cpm1_gc = to_cpm1_gpio16_chip(mm_gc);
+ struct cpm_ioport16 __iomem *iop = mm_gc->regs;
+ unsigned long flags;
+ u16 pin_mask = 1 << (15 - gpio);
+
+ spin_lock_irqsave(&cpm1_gc->lock, flags);
+
+ if (value)
+ cpm1_gc->cpdata |= pin_mask;
+ else
+ cpm1_gc->cpdata &= ~pin_mask;
+
+ out_be16(&iop->dat, cpm1_gc->cpdata);
+
+ spin_unlock_irqrestore(&cpm1_gc->lock, flags);
+}
+
+static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm_ioport16 __iomem *iop = mm_gc->regs;
+ u16 pin_mask;
+
+ pin_mask = 1 << (15 - gpio);
+
+ setbits16(&iop->dir, pin_mask);
+
+ cpm1_gpio16_set(gc, gpio, val);
+
+ return 0;
+}
+
+static int cpm1_gpio16_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm_ioport16 __iomem *iop = mm_gc->regs;
+ u16 pin_mask;
+
+ pin_mask = 1 << (15 - gpio);
+
+ clrbits16(&iop->dir, pin_mask);
+
+ return 0;
+}
+
+int cpm1_gpiochip_add16(struct device_node *np)
+{
+ struct cpm1_gpio16_chip *cpm1_gc;
+ struct of_mm_gpio_chip *mm_gc;
+ struct of_gpio_chip *of_gc;
+ struct gpio_chip *gc;
+
+ cpm1_gc = kzalloc(sizeof(*cpm1_gc), GFP_KERNEL);
+ if (!cpm1_gc)
+ return -ENOMEM;
+
+ spin_lock_init(&cpm1_gc->lock);
+
+ mm_gc = &cpm1_gc->mm_gc;
+ of_gc = &mm_gc->of_gc;
+ gc = &of_gc->gc;
+
+ mm_gc->save_regs = cpm1_gpio16_save_regs;
+ of_gc->gpio_cells = 1;
+ gc->ngpio = 16;
+ gc->direction_input = cpm1_gpio16_dir_in;
+ gc->direction_output = cpm1_gpio16_dir_out;
+ gc->get = cpm1_gpio16_get;
+ gc->set = cpm1_gpio16_set;
+
+ return of_mm_gpiochip_add(np, mm_gc);
+}
+
+struct cpm1_gpio32_chip {
+ struct of_mm_gpio_chip mm_gc;
+ spinlock_t lock;
+
+ /* shadowed data register to clear/set bits safely */
+ u32 cpdata;
+};
+
+static inline struct cpm1_gpio32_chip *
+to_cpm1_gpio32_chip(struct of_mm_gpio_chip *mm_gc)
+{
+ return container_of(mm_gc, struct cpm1_gpio32_chip, mm_gc);
+}
+
+static void cpm1_gpio32_save_regs(struct of_mm_gpio_chip *mm_gc)
+{
+ struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc);
+ struct cpm_ioport32 __iomem *iop = mm_gc->regs;
+
+ cpm1_gc->cpdata = in_be32(&iop->dat);
+}
+
+static int cpm1_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm_ioport32 __iomem *iop = mm_gc->regs;
+ u32 pin_mask;
+
+ pin_mask = 1 << (31 - gpio);
+
+ return !!(in_be32(&iop->dat) & pin_mask);
+}
+
+static void cpm1_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm1_gpio32_chip *cpm1_gc = to_cpm1_gpio32_chip(mm_gc);
+ struct cpm_ioport32 __iomem *iop = mm_gc->regs;
+ unsigned long flags;
+ u32 pin_mask = 1 << (31 - gpio);
+
+ spin_lock_irqsave(&cpm1_gc->lock, flags);
+
+ if (value)
+ cpm1_gc->cpdata |= pin_mask;
+ else
+ cpm1_gc->cpdata &= ~pin_mask;
+
+ out_be32(&iop->dat, cpm1_gc->cpdata);
+
+ spin_unlock_irqrestore(&cpm1_gc->lock, flags);
+}
+
+static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm_ioport32 __iomem *iop = mm_gc->regs;
+ u32 pin_mask;
+
+ pin_mask = 1 << (31 - gpio);
+
+ setbits32(&iop->dir, pin_mask);
+
+ cpm1_gpio32_set(gc, gpio, val);
+
+ return 0;
+}
+
+static int cpm1_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm_ioport32 __iomem *iop = mm_gc->regs;
+ u32 pin_mask;
+
+ pin_mask = 1 << (31 - gpio);
+
+ clrbits32(&iop->dir, pin_mask);
+
+ return 0;
+}
+
+int cpm1_gpiochip_add32(struct device_node *np)
+{
+ struct cpm1_gpio32_chip *cpm1_gc;
+ struct of_mm_gpio_chip *mm_gc;
+ struct of_gpio_chip *of_gc;
+ struct gpio_chip *gc;
+
+ cpm1_gc = kzalloc(sizeof(*cpm1_gc), GFP_KERNEL);
+ if (!cpm1_gc)
+ return -ENOMEM;
+
+ spin_lock_init(&cpm1_gc->lock);
+
+ mm_gc = &cpm1_gc->mm_gc;
+ of_gc = &mm_gc->of_gc;
+ gc = &of_gc->gc;
+
+ mm_gc->save_regs = cpm1_gpio32_save_regs;
+ of_gc->gpio_cells = 1;
+ gc->ngpio = 32;
+ gc->direction_input = cpm1_gpio32_dir_in;
+ gc->direction_output = cpm1_gpio32_dir_out;
+ gc->get = cpm1_gpio32_get;
+ gc->set = cpm1_gpio32_set;
+
+ return of_mm_gpiochip_add(np, mm_gc);
+}
+
+static int cpm_init_par_io(void)
+{
+ struct device_node *np;
+
+ for_each_compatible_node(np, NULL, "fsl,cpm1-pario-bank16")
+ cpm1_gpiochip_add16(np);
+
+ for_each_compatible_node(np, NULL, "fsl,cpm1-pario-bank32")
+ cpm1_gpiochip_add32(np);
+ return 0;
+}
+arch_initcall(cpm_init_par_io);
+
+#endif /* CONFIG_8xx_GPIO */
--
1.5.4.4
^ permalink raw reply related
* Hell
From: Stefan Eletzhofer @ 2008-03-26 17:22 UTC (permalink / raw)
To: Linuxppc-embedded@ozlabs.org
--
Stefan Eletzhofer
www.eletztrick.de
^ permalink raw reply
* Xilin Temac Timer ?
From: khollan @ 2008-03-26 17:02 UTC (permalink / raw)
To: linuxppc-embedded
Hi
What is the purpose of stopping the timer in the ioctl call to read a PHY
register? This is the code:
case SIOCGMIIREG: /* Read GMII PHY register. */
case SIOCDEVPRIVATE + 1: /* for binary compat, remove in 2.5 */
if (data->phy_id > 31 || data->reg_num > 31)
return -ENXIO;
/* Stop the PHY timer to prevent reentrancy. */
spin_lock_irqsave(&XTE_spinlock, flags);
del_timer_sync(&lp->phy_timer);
ret = XTemac_PhyRead(&lp->Emac, data->phy_id,
data->reg_num, &data->val_out);
/* Start the PHY timer up again. */
lp->phy_timer.expires = jiffies + 2 * HZ;
add_timer(&lp->phy_timer);
spin_unlock_irqrestore(&XTE_spinlock, flags);
if (ret != XST_SUCCESS) {
printk(KERN_ERR
"%s: XTemac: could not read from PHY, error=%d.\n",
dev->name, ret);
return -EBUSY;
}
return 0;
I ask because I have an application that needs to read a Phy register before
the timer has started to see if a link is present. This causes a kernel bug
when trying to run the del_timer_sync function because there is not a
running timer. I would like to know if it is safe to remove the timer del
and add but keep the spin lock.
Thanks for your help
Kevin
--
View this message in context: http://www.nabble.com/Xilin-Temac-Timer---tp16306218p16306218.html
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* Re: [PATCHv2 2/3] ep8248e: Reference SMC parameter RAM base in the device tree.
From: Scott Wood @ 2008-03-26 16:59 UTC (permalink / raw)
To: Laurent Pinchart; +Cc: linuxppc-dev
In-Reply-To: <200803261220.43039.laurentp@cse-semaphore.com>
Laurent Pinchart wrote:
> @@ -138,7 +137,7 @@
> device_type = "serial";
> compatible = "fsl,mpc8248-smc-uart",
> "fsl,cpm2-smc-uart";
> - reg = <0x11a80 0x20 0x1100 0x40>;
> + reg = <0x11a80 0x20 0x87fc 2>;
> interrupts = <4 8>;
> interrupt-parent = <&PIC>;
> fsl,cpm-brg = <7>;
This breaks the bootwrapper console.
-Scott
^ permalink raw reply
* Re: Missing patch for MPC5200B register definitions?
From: Matt Sealey @ 2008-03-26 16:48 UTC (permalink / raw)
To: ppc-dev
In-Reply-To: <47EA7687.5000102@genesi-usa.com>
Oh yes, I forgot.. also, the new MPC5121E stuff includes a lot of unions and
defines to make using both PSC formats easier.
Since the MPC5200 and MPC5200B PSC structures are different (CCR size), can the
original suggestion (in that thread) to support both with a union and some
defines to make supporting both CCR sizes, be implemented, or do we still think
that MPC5200 (not B) is not worth supporting?
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
Matt Sealey wrote:
> I've just been looking into the MPC5200B AC97 driver breakage with the
> latest Git kernel, and found the following patch;
>
> http://ozlabs.org/pipermail/linuxppc-dev/2007-May/035952.html
>
> Is not in the latest tree. As such anything which uses the new MPC5200B
> registers (especially important on AC97 and probably not used otherwise)
> has not or was not applied.
>
> Since the latest kernel source from git actually includes the MPC5121E
> differences, I assume this is a regression?
>
> How do we go about fixing this?
>
^ permalink raw reply
* Re: ppc platform for AMCC-440EPx - ELDK to the rescue
From: Scott Wood @ 2008-03-26 16:26 UTC (permalink / raw)
To: Steve Heflin; +Cc: linuxppc-embedded
In-Reply-To: <20080326130837.762DBDE2FB@ozlabs.org>
Steve Heflin wrote:
> After that, I was able to see that it was the "setup_hose" function
> called from /arch/ppc/platforms/4xx/sequoia.c that caused my board to
> hang. This Sequoia spinoff board has the PCI Host Bridge disabled which
> I didn't realize until that point.
>
> Looking back at the powerpc platform, I don't see how to disable the
> Host Bridge initialization without disabling the entire PCI bus. This
> board does have 2 devices hooked on the PCI bus, just no need for a Host
> Bridge.
And how do you propose to talk to said PCI devices without configuring
the host bridge?
> Also, I fail to see what the DTS virtualization layer of the hardware
> buys us.
Maintainability. Ease of porting to new hardware.
> When debugging, it's so much harder to use than the ppc
> platform's straight forward and standard methodologies. I can't
> understand to goal to eliminate the ppc platform,
Are you volunteering to maintain it, including the rest of us not having
to care when we change something in common code that breaks it?
> especially given the
> fact that DENX's ELDK is still using it with Linux 2.6.24.2 !!
Take that up with Denx.
-Scott
^ permalink raw reply
* Missing patch for MPC5200B register definitions?
From: Matt Sealey @ 2008-03-26 16:15 UTC (permalink / raw)
To: ppc-dev
I've just been looking into the MPC5200B AC97 driver breakage with the
latest Git kernel, and found the following patch;
http://ozlabs.org/pipermail/linuxppc-dev/2007-May/035952.html
Is not in the latest tree. As such anything which uses the new MPC5200B
registers (especially important on AC97 and probably not used otherwise)
has not or was not applied.
Since the latest kernel source from git actually includes the MPC5121E
differences, I assume this is a regression?
How do we go about fixing this?
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
^ permalink raw reply
* [PATCH] [POWERPC] 85xx: Cleanup TLB initialization
From: Kumar Gala @ 2008-03-26 16:07 UTC (permalink / raw)
To: linuxppc-dev
* Determine the RPN we are running the kernel at runtime rather
than using compile time constant for initial TLB
* Cleanup adjust_total_lowmem() to respect memstart_addr and
be a bit more clear on variables that are sizes vs addresses.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/kernel/head_fsl_booke.S | 34 ++++++++++++++++++++++++------
arch/powerpc/mm/fsl_booke_mmu.c | 37 ++++++++++++++-------------------
2 files changed, 43 insertions(+), 28 deletions(-)
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index d9cc2c2..3b69b54 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -68,7 +68,9 @@ _ENTRY(_start);
mr r29,r5
mr r28,r6
mr r27,r7
+ li r25,0 /* phys kernel start (low) */
li r24,0 /* CPU number */
+ li r23,0 /* phys kernel start (high) */
/* We try to not make any assumptions about how the boot loader
* setup or used the TLBs. We invalidate all mappings from the
@@ -167,7 +169,28 @@ skpinv: addi r6,r6,1 /* Increment */
mtspr SPRN_MAS0,r7
tlbre
- /* Just modify the entry ID, EPN and RPN for the temp mapping */
+ /* grab and fixup the RPN */
+ mfspr r6,SPRN_MAS1 /* extract MAS1[SIZE] */
+ rlwinm r6,r6,25,27,30
+ li r8,-1
+ addi r6,r6,10
+ slw r6,r8,r6 /* convert to mask */
+
+ bl 1f /* Find our address */
+1: mflr r7
+
+ mfspr r8,SPRN_MAS3
+#ifdef CONFIG_PHYS_64BIT
+ mfspr r23,SPRN_MAS7
+#endif
+ and r8,r6,r8
+ subfic r9,r6,-4096
+ and r9,r9,r7
+
+ or r25,r8,r9
+ ori r8,r25,(MAS3_SX|MAS3_SW|MAS3_SR)
+
+ /* Just modify the entry ID and EPN for the temp mapping */
lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
mtspr SPRN_MAS0,r7
@@ -177,12 +200,10 @@ skpinv: addi r6,r6,1 /* Increment */
ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l
mtspr SPRN_MAS1,r6
mfspr r6,SPRN_MAS2
- lis r7,PHYSICAL_START@h
+ li r7,0 /* temp EPN = 0 */
rlwimi r7,r6,0,20,31
mtspr SPRN_MAS2,r7
- mfspr r6,SPRN_MAS3
- rlwimi r7,r6,0,20,31
- mtspr SPRN_MAS3,r7
+ mtspr SPRN_MAS3,r8
tlbwe
xori r6,r4,1
@@ -232,8 +253,7 @@ skpinv: addi r6,r6,1 /* Increment */
ori r6,r6,PAGE_OFFSET@l
rlwimi r6,r7,0,20,31
mtspr SPRN_MAS2,r6
- li r7,(MAS3_SX|MAS3_SW|MAS3_SR)
- mtspr SPRN_MAS3,r7
+ mtspr SPRN_MAS3,r8
tlbwe
/* 7. Jump to KERNELBASE mapping */
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index 3dd0c81..59f6649 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -49,7 +49,6 @@
#include <asm/mmu.h>
#include <asm/uaccess.h>
#include <asm/smp.h>
-#include <asm/bootx.h>
#include <asm/machdep.h>
#include <asm/setup.h>
@@ -59,7 +58,6 @@ extern void loadcam_entry(unsigned int index);
unsigned int tlbcam_index;
unsigned int num_tlbcam_entries;
static unsigned long __cam0, __cam1, __cam2;
-#define MAX_LOW_MEM CONFIG_LOWMEM_SIZE
#define NUM_TLBCAMS (16)
@@ -195,35 +193,32 @@ unsigned long __init mmu_mapin_ram(void)
void __init
adjust_total_lowmem(void)
{
- unsigned long max_low_mem = MAX_LOW_MEM;
- unsigned long cam_max = 0x10000000;
- unsigned long ram;
+ phys_addr_t max_lowmem_size = __max_low_memory;
+ phys_addr_t cam_max_size = 0x10000000;
+ phys_addr_t ram;
- /* adjust CAM size to max_low_mem */
- if (max_low_mem < cam_max)
- cam_max = max_low_mem;
+ /* adjust CAM size to max_lowmem_size */
+ if (max_lowmem_size < cam_max_size)
+ cam_max_size = max_lowmem_size;
- /* adjust lowmem size to max_low_mem */
- if (max_low_mem < total_lowmem)
- ram = max_low_mem;
- else
- ram = total_lowmem;
+ /* adjust lowmem size to max_lowmem_size */
+ ram = min(max_lowmem_size, total_lowmem);
/* Calculate CAM values */
__cam0 = 1UL << 2 * (__ilog2(ram) / 2);
- if (__cam0 > cam_max)
- __cam0 = cam_max;
+ if (__cam0 > cam_max_size)
+ __cam0 = cam_max_size;
ram -= __cam0;
if (ram) {
__cam1 = 1UL << 2 * (__ilog2(ram) / 2);
- if (__cam1 > cam_max)
- __cam1 = cam_max;
+ if (__cam1 > cam_max_size)
+ __cam1 = cam_max_size;
ram -= __cam1;
}
if (ram) {
__cam2 = 1UL << 2 * (__ilog2(ram) / 2);
- if (__cam2 > cam_max)
- __cam2 = cam_max;
+ if (__cam2 > cam_max_size)
+ __cam2 = cam_max_size;
ram -= __cam2;
}
@@ -231,6 +226,6 @@ adjust_total_lowmem(void)
" CAM2=%ldMb residual: %ldMb\n",
__cam0 >> 20, __cam1 >> 20, __cam2 >> 20,
(total_lowmem - __cam0 - __cam1 - __cam2) >> 20);
- __max_low_memory = max_low_mem = __cam0 + __cam1 + __cam2;
- __initial_memory_limit = __max_low_memory;
+ __max_low_memory = __cam0 + __cam1 + __cam2;
+ __initial_memory_limit = memstart_addr + __max_low_memory;
}
--
1.5.4.1
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