* Re: [PATCH 2/2] [POWERPC] UCC nodes cleanup
From: Timur Tabi @ 2008-04-11 17:08 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev, Jeff Garzik, linux-serial, netdev
In-Reply-To: <20080411160654.GA25506@polina.dev.rtsoft.ru>
Anton Vorontsov wrote:
> From: Anton Vorontsov <avorontsov@ru.mvista.com>
> Subject: [POWERPC] UCC nodes cleanup
>
> - get rid of `model = "UCC"' in the ucc nodes
> It isn't used anywhere, so remove it. If we'll ever need something
> like this, we'll use compatible property instead.
> - replace last occurrences of device-id with cell-index.
> Drivers are modified for backward compatibility's sake.
>
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Timur Tabi <timur@freescale.com>
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH 2/2] [POWERPC] UCC nodes cleanup
From: Timur Tabi @ 2008-04-11 17:08 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev, Jeff Garzik, linux-serial, netdev
In-Reply-To: <20080411170657.GA15270@polina.dev.rtsoft.ru>
Anton Vorontsov wrote:
>> Do we want the first UCC to have a cell-index of 1? Maybe we should fix this
>> off-by-one error once and for all, and number all UCCs from 0?
>
> Isn't documentation numbers UCC from 1?
Yes.
> Then I believe we should stick
> with it for device tree, since off by one is Linux implementation details.
Fair enough.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH 2/2] [POWERPC] UCC nodes cleanup
From: Anton Vorontsov @ 2008-04-11 17:06 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, Jeff Garzik, linux-serial, netdev
In-Reply-To: <47FF9665.7020403@freescale.com>
On Fri, Apr 11, 2008 at 11:48:37AM -0500, Timur Tabi wrote:
> Anton Vorontsov wrote:
> > On Fri, Apr 11, 2008 at 09:13:36AM -0500, Kumar Gala wrote:
> >> On Mar 11, 2008, at 12:10 PM, Anton Vorontsov wrote:
> >>> - get rid of `model = "UCC"' in the ucc nodes
> >>> It isn't used anywhere, so remove it. If we'll ever need something
> >>> like this, we'll use compatible property instead.
> >>> - replace cell-index and device-id properties by fsl,ucc.
> >>>
> >>> Drivers are modified for backward compatibility's sake.
> >> I'd prefer we use cell-index and not introduce "fsl,ucc". I'm ok with
> >> dropping device-id and model (its implied in the compatiable).
> >
> > Ok. Here it is. netdev and linux-serial Cc'ed.
>
> Do we want the first UCC to have a cell-index of 1? Maybe we should fix this
> off-by-one error once and for all, and number all UCCs from 0?
Isn't documentation numbers UCC from 1? Then I believe we should stick
with it for device tree, since off by one is Linux implementation details.
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH 2/8] [POWERPC] fsl_lbc: implement few routines to manage FSL UPMs
From: Anton Vorontsov @ 2008-04-11 17:03 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <47FF8F56.50803@freescale.com>
On Fri, Apr 11, 2008 at 11:18:30AM -0500, Scott Wood wrote:
> Anton Vorontsov wrote:
>> On Fri, Apr 11, 2008 at 09:09:57AM -0500, Kumar Gala wrote:
>>> On Mar 11, 2008, at 12:24 PM, Anton Vorontsov wrote:
>>>> These will be used by the FSL UPM NAND driver.
>>> can this be a bit more descriptive. What exactly are these functions
>>> trying to accomplish.
>>
>> Yeah, sorry about that. Here is updated patch, with a bit more descriptive
>> comment, and highly kernel-doc'ed functions.
>>
>>>> +int fsl_upm_find(u32 base, struct fsl_upm *upm)
>>> what is base?
>>
>> Address base, as in LBC Base address register. Fixed down below.
>
> Should it be phys_addr_t?
Well, today I don't see much sense in this other than for documentation
purposes, this code is 32bit centric anyway. But ok, let's do it.
>> +/**
>> + * fsl_upm_find - find pre-programmed UPM via base address
>> + * @addr_base: base address of the memory bank controlled by the UPM
>> + * @upm: pointer to the allocated fsl_upm structure
>> + *
>> + * This function walks UPMs comparing "Base address" field of the BR registers
>> + * with the supplied addr_base argument. When bases are match, this function
>> + * fills fsl_upm structure so you can use it with the rest of UPM API. On
>> + * success this function returns 0, otherwise it returns appropriate errno
>> + * value.
>> + */
>
> The FCM driver does something very similar; could we name this something
> more generic such as fsl_lbc_find?
Ok. Updated patch follows.
Thanks!
- - - -
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Subject: [POWERPC] fsl_lbc: implement few UPM routines
Freescale UPM can be used to adjust localbus timings or to generate
orbitrary, pre-programmed "patterns" on the external Localbus signals.
This patch implements few routines so drivers could work with UPMs in
safe and generic manner.
So far there is just one user of these routines: Freescale UPM NAND
driver.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/Kconfig | 5 ++
arch/powerpc/sysdev/Makefile | 1 +
arch/powerpc/sysdev/fsl_lbc.c | 129 +++++++++++++++++++++++++++++++++++++++++
include/asm-powerpc/fsl_lbc.h | 88 ++++++++++++++++++++++++++++
4 files changed, 223 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/sysdev/fsl_lbc.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index ef12db0..9c68592 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -491,6 +491,11 @@ config FSL_PCI
bool
select PPC_INDIRECT_PCI
+config FSL_LBC
+ bool
+ help
+ Freescale Localbus support
+
# Yes MCA RS/6000s exist but Linux-PPC does not currently support any
config MCA
bool
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 15f3e85..62b6ef0 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_U3_DART) += dart_iommu.o
obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCI) += fsl_pci.o
+obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
obj-$(CONFIG_RAPIDIO) += fsl_rio.o
obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c
new file mode 100644
index 0000000..422c8fa
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_lbc.c
@@ -0,0 +1,129 @@
+/*
+ * Freescale LBC and UPM routines.
+ *
+ * Copyright (c) 2007-2008 MontaVista Software, Inc.
+ *
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <asm/fsl_lbc.h>
+
+spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock);
+
+struct fsl_lbc_regs __iomem *fsl_lbc_regs;
+EXPORT_SYMBOL(fsl_lbc_regs);
+
+static char __initdata *compat_lbc[] = {
+ "fsl,pq2-localbus",
+ "fsl,pq2pro-localbus",
+ "fsl,pq3-localbus",
+ "fsl,elbc",
+};
+
+static int __init fsl_lbc_init(void)
+{
+ struct device_node *lbus;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(compat_lbc); i++) {
+ lbus = of_find_compatible_node(NULL, NULL, compat_lbc[i]);
+ if (lbus)
+ goto found;
+ }
+ return -ENODEV;
+
+found:
+ fsl_lbc_regs = of_iomap(lbus, 0);
+ of_node_put(lbus);
+ if (!fsl_lbc_regs)
+ return -ENOMEM;
+ return 0;
+}
+arch_initcall(fsl_lbc_init);
+
+/**
+ * fsl_lbc_find - find Localbus bank
+ * @addr_base: base address of the memory bank
+ *
+ * This function walks LBC banks comparing "Base address" field of the BR
+ * registers with the supplied addr_base argument. When bases match this
+ * function returns bank number (starting with 0), otherwise it returns
+ * appropriate errno value.
+ */
+int fsl_lbc_find(phys_addr_t addr_base)
+{
+ int i;
+
+ if (!fsl_lbc_regs)
+ return -ENODEV;
+
+ for (i = 0; i < ARRAY_SIZE(fsl_lbc_regs->bank); i++) {
+ __be32 br = in_be32(&fsl_lbc_regs->bank[i].br);
+ __be32 or = in_be32(&fsl_lbc_regs->bank[i].or);
+
+ if (br & BR_V && (br & or & BR_BA) == addr_base)
+ return i;
+ }
+
+ return -ENOENT;
+}
+EXPORT_SYMBOL(fsl_lbc_find);
+
+/**
+ * fsl_upm_find - find pre-programmed UPM via base address
+ * @addr_base: base address of the memory bank controlled by the UPM
+ * @upm: pointer to the allocated fsl_upm structure
+ *
+ * This function fills fsl_upm structure so you can use it with the rest of
+ * UPM API. On success this function returns 0, otherwise it returns
+ * appropriate errno value.
+ */
+int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm)
+{
+ int bank;
+ __be32 br;
+
+ bank = fsl_lbc_find(addr_base);
+ if (bank < 0)
+ return bank;
+
+ br = in_be32(&fsl_lbc_regs->bank[bank].br);
+
+ switch (br & BR_MSEL) {
+ case BR_MS_UPMA:
+ upm->mxmr = &fsl_lbc_regs->mamr;
+ break;
+ case BR_MS_UPMB:
+ upm->mxmr = &fsl_lbc_regs->mbmr;
+ break;
+ case BR_MS_UPMC:
+ upm->mxmr = &fsl_lbc_regs->mcmr;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ switch (br & BR_PS) {
+ case BR_PS_8:
+ upm->width = 8;
+ break;
+ case BR_PS_16:
+ upm->width = 16;
+ break;
+ case BR_PS_32:
+ upm->width = 32;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(fsl_upm_find);
diff --git a/include/asm-powerpc/fsl_lbc.h b/include/asm-powerpc/fsl_lbc.h
index 13a3c28..303f548 100644
--- a/include/asm-powerpc/fsl_lbc.h
+++ b/include/asm-powerpc/fsl_lbc.h
@@ -24,6 +24,8 @@
#define __ASM_FSL_LBC_H
#include <linux/types.h>
+#include <linux/spinlock.h>
+#include <asm/io.h>
struct fsl_lbc_bank {
__be32 br; /**< Base Register */
@@ -98,6 +100,11 @@ struct fsl_lbc_regs {
__be32 mar; /**< UPM Address Register */
u8 res1[0x4];
__be32 mamr; /**< UPMA Mode Register */
+#define MxMR_OP_NO (0 << 28) /**< normal operation */
+#define MxMR_OP_WA (1 << 28) /**< write array */
+#define MxMR_OP_RA (2 << 28) /**< read array */
+#define MxMR_OP_RP (3 << 28) /**< run pattern */
+#define MxMR_MAD 0x3f /**< machine address */
__be32 mbmr; /**< UPMB Mode Register */
__be32 mcmr; /**< UPMC Mode Register */
u8 res2[0x8];
@@ -220,4 +227,85 @@ struct fsl_lbc_regs {
u8 res8[0xF00];
};
+extern struct fsl_lbc_regs __iomem *fsl_lbc_regs;
+extern spinlock_t fsl_lbc_lock;
+
+/*
+ * FSL UPM routines
+ */
+struct fsl_upm {
+ __be32 __iomem *mxmr;
+ int width;
+};
+
+extern int fsl_lbc_find(phys_addr_t addr_base);
+extern int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm);
+
+/**
+ * fsl_upm_start_pattern - start UPM patterns execution
+ * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
+ * @pat_offset: UPM pattern offset for the command to be executed
+ *
+ * This routine programmes UPM so the next memory access that hits an UPM
+ * will trigger pattern execution, starting at pat_offset.
+ */
+static inline void fsl_upm_start_pattern(struct fsl_upm *upm, u8 pat_offset)
+{
+ clrsetbits_be32(upm->mxmr, MxMR_MAD, MxMR_OP_RP | pat_offset);
+}
+
+/**
+ * fsl_upm_end_pattern - end UPM patterns execution
+ * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
+ *
+ * This routine reverts UPM to normal operation mode.
+ */
+static inline void fsl_upm_end_pattern(struct fsl_upm *upm)
+{
+ clrbits32(upm->mxmr, MxMR_OP_RP);
+
+ while (in_be32(upm->mxmr) & MxMR_OP_RP)
+ cpu_relax();
+}
+
+/**
+ * fsl_upm_run_pattern - actually run an UPM pattern
+ * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
+ * @io_base: remapped pointer to where memory access should happen
+ * @mar: MAR register content during pattern execution
+ *
+ * This function triggers dummy write to the memory specified by the io_base,
+ * thus UPM pattern actually executed. Note that mar usage depends on the
+ * pre-programmed AMX bits in the UPM RAM.
+ */
+static inline int fsl_upm_run_pattern(struct fsl_upm *upm,
+ void __iomem *io_base, u32 mar)
+{
+ int ret = 0;
+ unsigned long flags;
+
+ spin_lock_irqsave(&fsl_lbc_lock, flags);
+
+ out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width));
+
+ switch (upm->width) {
+ case 8:
+ out_8(io_base, 0x0);
+ break;
+ case 16:
+ out_be16(io_base, 0x0);
+ break;
+ case 32:
+ out_be32(io_base, 0x0);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ spin_unlock_irqrestore(&fsl_lbc_lock, flags);
+
+ return ret;
+}
+
#endif /* __ASM_FSL_LBC_H */
--
1.5.4.5
^ permalink raw reply related
* [PATCH] 86xx: mark functions static, other minor cleanups
From: Paul Gortmaker @ 2008-04-11 16:59 UTC (permalink / raw)
To: linuxppc-dev; +Cc: sfr, Paul Gortmaker
Cleanups as suggested by Stephen Rothwell and Dale Farnsworth, which
incudes: mark a bunch of functions static; add vendor prefix to the
compat node check for uniqueness, add in missing of_node_put(), delete
unused DBG macros.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
arch/powerpc/boot/dts/mpc8641_hpcn.dts | 2 +-
arch/powerpc/boot/dts/sbc8641d.dts | 2 +-
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 4 ++--
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 8 ++++----
arch/powerpc/platforms/86xx/sbc8641d.c | 17 +++++------------
5 files changed, 13 insertions(+), 20 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 79385bc..d5c2da4 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -13,7 +13,7 @@
/ {
model = "MPC8641HPCN";
- compatible = "mpc86xx";
+ compatible = "fsl,mpc86xx";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index 27b5a3d..33dcf6e 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -17,7 +17,7 @@
/ {
model = "SBC8641D";
- compatible = "mpc86xx";
+ compatible = "wrs,sbc8641";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 0b07485..18b8ebe 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -52,7 +52,7 @@ static int __init mpc8610_declare_of_platform_devices(void)
}
machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
-void __init
+static void __init
mpc86xx_hpcd_init_irq(void)
{
struct mpic *mpic1;
@@ -200,7 +200,7 @@ static int __init mpc86xx_hpcd_probe(void)
return 0;
}
-long __init
+static long __init
mpc86xx_time_init(void)
{
unsigned int temp;
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index cfbe8c5..600bbf3 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -55,7 +55,7 @@ static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
}
#endif /* CONFIG_PCI */
-void __init
+static void __init
mpc86xx_hpcn_init_irq(void)
{
struct mpic *mpic1;
@@ -162,7 +162,7 @@ mpc86xx_hpcn_setup_arch(void)
}
-void
+static void
mpc86xx_hpcn_show_cpuinfo(struct seq_file *m)
{
struct device_node *root;
@@ -190,13 +190,13 @@ static int __init mpc86xx_hpcn_probe(void)
{
unsigned long root = of_get_flat_dt_root();
- if (of_flat_dt_is_compatible(root, "mpc86xx"))
+ if (of_flat_dt_is_compatible(root, "fsl,mpc86xx"))
return 1; /* Looks good */
return 0;
}
-long __init
+static long __init
mpc86xx_time_init(void)
{
unsigned int temp;
diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c
index c7516be..0863cca 100644
--- a/arch/powerpc/platforms/86xx/sbc8641d.c
+++ b/arch/powerpc/platforms/86xx/sbc8641d.c
@@ -37,15 +37,7 @@
#include "mpc86xx.h"
-#undef DEBUG
-
-#ifdef DEBUG
-#define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0)
-#else
-#define DBG(fmt...) do { } while(0)
-#endif
-
-void __init
+static void __init
sbc8641_init_irq(void)
{
struct mpic *mpic1;
@@ -62,6 +54,7 @@ sbc8641_init_irq(void)
mpic1 = mpic_alloc(np, res.start,
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
0, 256, " MPIC ");
+ of_node_put(np);
BUG_ON(mpic1 == NULL);
mpic_init(mpic1);
@@ -90,7 +83,7 @@ sbc8641_setup_arch(void)
}
-void
+static void
sbc8641_show_cpuinfo(struct seq_file *m)
{
struct device_node *root;
@@ -118,13 +111,13 @@ static int __init sbc8641_probe(void)
{
unsigned long root = of_get_flat_dt_root();
- if (of_flat_dt_is_compatible(root, "mpc86xx"))
+ if (of_flat_dt_is_compatible(root, "wrs,sbc8641"))
return 1; /* Looks good */
return 0;
}
-long __init
+static long __init
mpc86xx_time_init(void)
{
unsigned int temp;
--
1.5.4.3
^ permalink raw reply related
* Re: [PATCH 2/2] [POWERPC] UCC nodes cleanup
From: Timur Tabi @ 2008-04-11 16:48 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev, Jeff Garzik, linux-serial, netdev
In-Reply-To: <20080411160654.GA25506@polina.dev.rtsoft.ru>
Anton Vorontsov wrote:
> On Fri, Apr 11, 2008 at 09:13:36AM -0500, Kumar Gala wrote:
>> On Mar 11, 2008, at 12:10 PM, Anton Vorontsov wrote:
>>> - get rid of `model = "UCC"' in the ucc nodes
>>> It isn't used anywhere, so remove it. If we'll ever need something
>>> like this, we'll use compatible property instead.
>>> - replace cell-index and device-id properties by fsl,ucc.
>>>
>>> Drivers are modified for backward compatibility's sake.
>> I'd prefer we use cell-index and not introduce "fsl,ucc". I'm ok with
>> dropping device-id and model (its implied in the compatiable).
>
> Ok. Here it is. netdev and linux-serial Cc'ed.
Do we want the first UCC to have a cell-index of 1? Maybe we should fix this
off-by-one error once and for all, and number all UCCs from 0?
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH 2/8] [POWERPC] fsl_lbc: implement few routines to manage FSL UPMs
From: Scott Wood @ 2008-04-11 16:18 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev
In-Reply-To: <20080411161311.GA28067@polina.dev.rtsoft.ru>
Anton Vorontsov wrote:
> On Fri, Apr 11, 2008 at 09:09:57AM -0500, Kumar Gala wrote:
>> On Mar 11, 2008, at 12:24 PM, Anton Vorontsov wrote:
>>> These will be used by the FSL UPM NAND driver.
>> can this be a bit more descriptive. What exactly are these functions
>> trying to accomplish.
>
> Yeah, sorry about that. Here is updated patch, with a bit more descriptive
> comment, and highly kernel-doc'ed functions.
>
>>> +int fsl_upm_find(u32 base, struct fsl_upm *upm)
>> what is base?
>
> Address base, as in LBC Base address register. Fixed down below.
Should it be phys_addr_t?
> +/**
> + * fsl_upm_find - find pre-programmed UPM via base address
> + * @addr_base: base address of the memory bank controlled by the UPM
> + * @upm: pointer to the allocated fsl_upm structure
> + *
> + * This function walks UPMs comparing "Base address" field of the BR registers
> + * with the supplied addr_base argument. When bases are match, this function
> + * fills fsl_upm structure so you can use it with the rest of UPM API. On
> + * success this function returns 0, otherwise it returns appropriate errno
> + * value.
> + */
The FCM driver does something very similar; could we name this something
more generic such as fsl_lbc_find?
-Scott
^ permalink raw reply
* Re: [PATCH 2/8] [POWERPC] fsl_lbc: implement few routines to manage FSL UPMs
From: Anton Vorontsov @ 2008-04-11 16:13 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <EE642BFC-4262-44E8-BD48-E76E5418C276@kernel.crashing.org>
On Fri, Apr 11, 2008 at 09:09:57AM -0500, Kumar Gala wrote:
>
> On Mar 11, 2008, at 12:24 PM, Anton Vorontsov wrote:
>> These will be used by the FSL UPM NAND driver.
>
> can this be a bit more descriptive. What exactly are these functions
> trying to accomplish.
Yeah, sorry about that. Here is updated patch, with a bit more descriptive
comment, and highly kernel-doc'ed functions.
>> +int fsl_upm_find(u32 base, struct fsl_upm *upm)
>
> what is base?
Address base, as in LBC Base address register. Fixed down below.
Thanks for looking into this.
- - - -
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Subject: [POWERPC] fsl_lbc: implement few UPM routines
Freescale UPM can be used to adjust localbus timings or to generate
orbitrary, pre-programmed "patterns" on the external Localbus signals.
This patch implements few routines so drivers could work with UPMs in
safe and generic manner.
So far there is just one user of these routines: Freescale UPM NAND
driver.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/Kconfig | 5 ++
arch/powerpc/sysdev/Makefile | 1 +
arch/powerpc/sysdev/fsl_lbc.c | 111 +++++++++++++++++++++++++++++++++++++++++
include/asm-powerpc/fsl_lbc.h | 87 ++++++++++++++++++++++++++++++++
4 files changed, 204 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/sysdev/fsl_lbc.c
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index ef12db0..9c68592 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -491,6 +491,11 @@ config FSL_PCI
bool
select PPC_INDIRECT_PCI
+config FSL_LBC
+ bool
+ help
+ Freescale Localbus support
+
# Yes MCA RS/6000s exist but Linux-PPC does not currently support any
config MCA
bool
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 15f3e85..62b6ef0 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_U3_DART) += dart_iommu.o
obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCI) += fsl_pci.o
+obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
obj-$(CONFIG_RAPIDIO) += fsl_rio.o
obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c
new file mode 100644
index 0000000..147e4e0
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_lbc.c
@@ -0,0 +1,111 @@
+/*
+ * Freescale LBC and UPM routines.
+ *
+ * Copyright (c) 2007-2008 MontaVista Software, Inc.
+ *
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <asm/fsl_lbc.h>
+
+spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock);
+
+struct fsl_lbc_regs __iomem *fsl_lbc_regs;
+EXPORT_SYMBOL(fsl_lbc_regs);
+
+static char __initdata *compat_lbc[] = {
+ "fsl,pq2-localbus",
+ "fsl,pq2pro-localbus",
+ "fsl,pq3-localbus",
+ "fsl,elbc",
+};
+
+static int __init fsl_lbc_init(void)
+{
+ struct device_node *lbus;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(compat_lbc); i++) {
+ lbus = of_find_compatible_node(NULL, NULL, compat_lbc[i]);
+ if (lbus)
+ goto found;
+ }
+ return -ENODEV;
+
+found:
+ fsl_lbc_regs = of_iomap(lbus, 0);
+ of_node_put(lbus);
+ if (!fsl_lbc_regs)
+ return -ENOMEM;
+ return 0;
+}
+arch_initcall(fsl_lbc_init);
+
+/**
+ * fsl_upm_find - find pre-programmed UPM via base address
+ * @addr_base: base address of the memory bank controlled by the UPM
+ * @upm: pointer to the allocated fsl_upm structure
+ *
+ * This function walks UPMs comparing "Base address" field of the BR registers
+ * with the supplied addr_base argument. When bases are match, this function
+ * fills fsl_upm structure so you can use it with the rest of UPM API. On
+ * success this function returns 0, otherwise it returns appropriate errno
+ * value.
+ */
+int fsl_upm_find(u32 addr_base, struct fsl_upm *upm)
+{
+ int i;
+ __be32 br;
+ __be32 or;
+
+ if (!fsl_lbc_regs)
+ return -ENODEV;
+
+ for (i = 0; i < ARRAY_SIZE(fsl_lbc_regs->bank); i++) {
+ br = in_be32(&fsl_lbc_regs->bank[i].br);
+ or = in_be32(&fsl_lbc_regs->bank[i].or);
+
+ if (br & BR_V && (br & or & BR_BA) == addr_base)
+ goto found;
+ }
+
+ return -ENOENT;
+found:
+ switch (br & BR_MSEL) {
+ case BR_MS_UPMA:
+ upm->mxmr = &fsl_lbc_regs->mamr;
+ break;
+ case BR_MS_UPMB:
+ upm->mxmr = &fsl_lbc_regs->mbmr;
+ break;
+ case BR_MS_UPMC:
+ upm->mxmr = &fsl_lbc_regs->mcmr;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ switch (br & BR_PS) {
+ case BR_PS_8:
+ upm->width = 8;
+ break;
+ case BR_PS_16:
+ upm->width = 16;
+ break;
+ case BR_PS_32:
+ upm->width = 32;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(fsl_upm_find);
diff --git a/include/asm-powerpc/fsl_lbc.h b/include/asm-powerpc/fsl_lbc.h
index 13a3c28..960f781 100644
--- a/include/asm-powerpc/fsl_lbc.h
+++ b/include/asm-powerpc/fsl_lbc.h
@@ -24,6 +24,8 @@
#define __ASM_FSL_LBC_H
#include <linux/types.h>
+#include <linux/spinlock.h>
+#include <asm/io.h>
struct fsl_lbc_bank {
__be32 br; /**< Base Register */
@@ -98,6 +100,11 @@ struct fsl_lbc_regs {
__be32 mar; /**< UPM Address Register */
u8 res1[0x4];
__be32 mamr; /**< UPMA Mode Register */
+#define MxMR_OP_NO (0 << 28) /**< normal operation */
+#define MxMR_OP_WA (1 << 28) /**< write array */
+#define MxMR_OP_RA (2 << 28) /**< read array */
+#define MxMR_OP_RP (3 << 28) /**< run pattern */
+#define MxMR_MAD 0x3f /**< machine address */
__be32 mbmr; /**< UPMB Mode Register */
__be32 mcmr; /**< UPMC Mode Register */
u8 res2[0x8];
@@ -220,4 +227,84 @@ struct fsl_lbc_regs {
u8 res8[0xF00];
};
+extern struct fsl_lbc_regs __iomem *fsl_lbc_regs;
+extern spinlock_t fsl_lbc_lock;
+
+/*
+ * FSL UPM routines
+ */
+struct fsl_upm {
+ __be32 __iomem *mxmr;
+ int width;
+};
+
+extern int fsl_upm_find(u32 addr_base, struct fsl_upm *upm);
+
+/**
+ * fsl_upm_start_pattern - start UPM patterns execution
+ * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
+ * @pat_offset: UPM pattern offset for the command to be executed
+ *
+ * This routine programmes UPM so the next memory access that hits an UPM
+ * will trigger pattern execution, starting at pat_offset.
+ */
+static inline void fsl_upm_start_pattern(struct fsl_upm *upm, u8 pat_offset)
+{
+ clrsetbits_be32(upm->mxmr, MxMR_MAD, MxMR_OP_RP | pat_offset);
+}
+
+/**
+ * fsl_upm_end_pattern - end UPM patterns execution
+ * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
+ *
+ * This routine reverts UPM to normal operation mode.
+ */
+static inline void fsl_upm_end_pattern(struct fsl_upm *upm)
+{
+ clrbits32(upm->mxmr, MxMR_OP_RP);
+
+ while (in_be32(upm->mxmr) & MxMR_OP_RP)
+ cpu_relax();
+}
+
+/**
+ * fsl_upm_run_pattern - actually run an UPM pattern
+ * @upm: pointer to the fsl_upm structure obtained via fsl_upm_find
+ * @io_base: remapped pointer to where memory access should happen
+ * @mar: MAR register content during pattern execution
+ *
+ * This function triggers dummy write to the memory specified by the io_base,
+ * thus UPM pattern actually executed. Note that mar usage depends on the
+ * pre-programmed AMX bits in the UPM RAM.
+ */
+static inline int fsl_upm_run_pattern(struct fsl_upm *upm,
+ void __iomem *io_base, u32 mar)
+{
+ int ret = 0;
+ unsigned long flags;
+
+ spin_lock_irqsave(&fsl_lbc_lock, flags);
+
+ out_be32(&fsl_lbc_regs->mar, mar << (32 - upm->width));
+
+ switch (upm->width) {
+ case 8:
+ out_8(io_base, 0x0);
+ break;
+ case 16:
+ out_be16(io_base, 0x0);
+ break;
+ case 32:
+ out_be32(io_base, 0x0);
+ break;
+ default:
+ ret = -EINVAL;
+ break;
+ }
+
+ spin_unlock_irqrestore(&fsl_lbc_lock, flags);
+
+ return ret;
+}
+
#endif /* __ASM_FSL_LBC_H */
--
1.5.4.5
^ permalink raw reply related
* Re: [PATCH 2/2] [POWERPC] UCC nodes cleanup
From: Anton Vorontsov @ 2008-04-11 16:06 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Jeff Garzik, linux-serial, netdev
In-Reply-To: <82E8E38A-C159-4C23-BDE8-086D4429F366@kernel.crashing.org>
On Fri, Apr 11, 2008 at 09:13:36AM -0500, Kumar Gala wrote:
>
> On Mar 11, 2008, at 12:10 PM, Anton Vorontsov wrote:
>> - get rid of `model = "UCC"' in the ucc nodes
>> It isn't used anywhere, so remove it. If we'll ever need something
>> like this, we'll use compatible property instead.
>> - replace cell-index and device-id properties by fsl,ucc.
>>
>> Drivers are modified for backward compatibility's sake.
>
> I'd prefer we use cell-index and not introduce "fsl,ucc". I'm ok with
> dropping device-id and model (its implied in the compatiable).
Ok. Here it is. netdev and linux-serial Cc'ed.
- - - -
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Subject: [POWERPC] UCC nodes cleanup
- get rid of `model = "UCC"' in the ucc nodes
It isn't used anywhere, so remove it. If we'll ever need something
like this, we'll use compatible property instead.
- replace last occurrences of device-id with cell-index.
Drivers are modified for backward compatibility's sake.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
Documentation/powerpc/booting-without-of.txt | 6 ++----
arch/powerpc/boot/dts/mpc832x_mds.dts | 7 +------
arch/powerpc/boot/dts/mpc832x_rdb.dts | 4 ----
arch/powerpc/boot/dts/mpc836x_mds.dts | 4 ----
arch/powerpc/boot/dts/mpc8568mds.dts | 4 ----
drivers/net/ucc_geth.c | 8 +++++++-
drivers/net/ucc_geth_mii.c | 11 ++++++++---
drivers/serial/ucc_uart.c | 16 ++++++++++++----
8 files changed, 30 insertions(+), 30 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index be41a5c..f0a99aa 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1619,8 +1619,7 @@ platforms are moved over to use the flattened-device-tree model.
- device_type : should be "network", "hldc", "uart", "transparent"
"bisync", "atm", or "serial".
- compatible : could be "ucc_geth" or "fsl_atm" and so on.
- - model : should be "UCC".
- - device-id : the ucc number(1-8), corresponding to UCCx in UM.
+ - cell-index : the ucc number(1-8), corresponding to UCCx in UM.
- reg : Offset and length of the register set for the device
- interrupts : <a b> where a is the interrupt number and b is a
field that represents an encoding of the sense and level
@@ -1677,8 +1676,7 @@ platforms are moved over to use the flattened-device-tree model.
ucc@2000 {
device_type = "network";
compatible = "ucc_geth";
- model = "UCC";
- device-id = <1>;
+ cell-index = <1>;
reg = <2000 200>;
interrupts = <a0 0>;
interrupt-parent = <700>;
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 9bb4083..539e02f 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -255,9 +255,7 @@
enet0: ucc@2200 {
device_type = "network";
compatible = "ucc_geth";
- model = "UCC";
cell-index = <3>;
- device-id = <3>;
reg = <0x2200 0x200>;
interrupts = <34>;
interrupt-parent = <&qeic>;
@@ -271,9 +269,7 @@
enet1: ucc@3200 {
device_type = "network";
compatible = "ucc_geth";
- model = "UCC";
cell-index = <4>;
- device-id = <4>;
reg = <0x3200 0x200>;
interrupts = <35>;
interrupt-parent = <&qeic>;
@@ -287,8 +283,7 @@
ucc@2400 {
device_type = "serial";
compatible = "ucc_uart";
- model = "UCC";
- device-id = <5>; /* The UCC number, 1-7*/
+ cell-index = <5>; /* The UCC number, 1-7*/
port-number = <0>; /* Which ttyQEx device */
soft-uart; /* We need Soft-UART */
reg = <0x2400 0x200>;
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 94f93d2..179c81c 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -208,9 +208,7 @@
enet0: ucc@3000 {
device_type = "network";
compatible = "ucc_geth";
- model = "UCC";
cell-index = <2>;
- device-id = <2>;
reg = <0x3000 0x200>;
interrupts = <33>;
interrupt-parent = <&qeic>;
@@ -224,9 +222,7 @@
enet1: ucc@2200 {
device_type = "network";
compatible = "ucc_geth";
- model = "UCC";
cell-index = <3>;
- device-id = <3>;
reg = <0x2200 0x200>;
interrupts = <34>;
interrupt-parent = <&qeic>;
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 55f03e8..8160ff2 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -257,9 +257,7 @@
enet0: ucc@2000 {
device_type = "network";
compatible = "ucc_geth";
- model = "UCC";
cell-index = <1>;
- device-id = <1>;
reg = <0x2000 0x200>;
interrupts = <32>;
interrupt-parent = <&qeic>;
@@ -274,9 +272,7 @@
enet1: ucc@3000 {
device_type = "network";
compatible = "ucc_geth";
- model = "UCC";
cell-index = <2>;
- device-id = <2>;
reg = <0x3000 0x200>;
interrupts = <33>;
interrupt-parent = <&qeic>;
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 97bc048..df4b5e8 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -324,9 +324,7 @@
enet2: ucc@2000 {
device_type = "network";
compatible = "ucc_geth";
- model = "UCC";
cell-index = <1>;
- device-id = <1>;
reg = <2000 200>;
interrupts = <20>;
interrupt-parent = <&qeic>;
@@ -341,9 +339,7 @@
enet3: ucc@3000 {
device_type = "network";
compatible = "ucc_geth";
- model = "UCC";
cell-index = <2>;
- device-id = <2>;
reg = <3000 200>;
interrupts = <21>;
interrupt-parent = <&qeic>;
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index fba0811..3a68b94 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -3852,7 +3852,13 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
ugeth_vdbg("%s: IN", __FUNCTION__);
- prop = of_get_property(np, "device-id", NULL);
+ prop = of_get_property(np, "cell-index", NULL);
+ if (!prop) {
+ prop = of_get_property(np, "device-id", NULL);
+ if (!prop)
+ return -ENODEV;
+ }
+
ucc_num = *prop - 1;
if ((ucc_num < 0) || (ucc_num > 7))
return -ENODEV;
diff --git a/drivers/net/ucc_geth_mii.c b/drivers/net/ucc_geth_mii.c
index c69e654..8a48ddb 100644
--- a/drivers/net/ucc_geth_mii.c
+++ b/drivers/net/ucc_geth_mii.c
@@ -203,9 +203,14 @@ static int uec_mdio_probe(struct of_device *ofdev, const struct of_device_id *ma
if ((res.start >= tempres.start) &&
(res.end <= tempres.end)) {
/* set this UCC to be the MII master */
- const u32 *id = of_get_property(tempnp, "device-id", NULL);
- if (id == NULL)
- goto bus_register_fail;
+ const u32 *id;
+
+ id = of_get_property(tempnp, "cell-index", NULL);
+ if (!id) {
+ id = of_get_property(tempnp, "device-id", NULL);
+ if (!id)
+ goto bus_register_fail;
+ }
ucc_set_qe_mux_mii_mng(*id - 1);
diff --git a/drivers/serial/ucc_uart.c b/drivers/serial/ucc_uart.c
index e0994f0..5e4310c 100644
--- a/drivers/serial/ucc_uart.c
+++ b/drivers/serial/ucc_uart.c
@@ -1270,10 +1270,18 @@ static int ucc_uart_probe(struct of_device *ofdev,
/* Get the UCC number (device ID) */
/* UCCs are numbered 1-7 */
- iprop = of_get_property(np, "device-id", NULL);
- if (!iprop || (*iprop < 1) || (*iprop > UCC_MAX_NUM)) {
- dev_err(&ofdev->dev,
- "missing or invalid UCC specified in device tree\n");
+ iprop = of_get_property(np, "cell-index", NULL);
+ if (!iprop) {
+ iprop = of_get_property(np, "device-id", NULL);
+ if (!iprop) {
+ dev_err(&ofdev->dev, "UCC is unspecified in "
+ "device tree\n");
+ return -EINVAL;
+ }
+ }
+
+ if ((*iprop < 1) || (*iprop > UCC_MAX_NUM)) {
+ dev_err(&ofdev->dev, "no support for UCC%u\n", *iprop);
kfree(qe_port);
return -ENODEV;
}
--
1.5.4.5
^ permalink raw reply related
* Re: zImage.embedded
From: Grant Likely @ 2008-04-11 16:04 UTC (permalink / raw)
To: Guillaume Dargaud; +Cc: linuxppc-dev
In-Reply-To: <016801c89beb$fbff6de0$ad289e86@LPSC0173W>
On Fri, Apr 11, 2008 at 9:51 AM, Guillaume Dargaud
<dargaud@lpsc.in2p3.fr> wrote:
>
> >
> > > is the file zImage.elf my proper network image ?
> > >
> >
> > What bootloader is on your board? zImage.elf *might* be the proper
> > image. If you're using u-boot, then you want to build a uImage
> > instead.
> >
>
> I... ahem... what would you recommand for a ML405 ?
> Builroot gives to options of U-Boot or Yaboot. Haven't tried either yet.
> Will do on tuesday.
>
> I don't know if Xilinx has another solution (I remember seeing some boot
> function in the API, usable from a standalone elf file).
zImage.elf is what you want. If you *do* get u-boot building on your
board, then you'll want a uImage; but zImage.elf will work for you
now.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH] CPM: Always use new binding.
From: Kumar Gala @ 2008-04-11 15:58 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20080411144620.GA2534@loki.buserror.net>
On Apr 11, 2008, at 9:46 AM, Scott Wood wrote:
> On Thu, Apr 10, 2008 at 06:44:24PM -0500, Kumar Gala wrote:
>>
>> On Apr 10, 2008, at 3:45 PM, Scott Wood wrote:
>>> The kconfig entry can go away once arch/ppc and references to the
>>> config in
>>> drivers are removed.
>>
>> just to be clear. arch/powerpc will always just use the new
>> binding and
>> arch/ppc uses the old (or has the option)?
>
> Yes, CONFIG_PPC_NEW_BINDING is effectively an alias for
> CONFIG_PPC_MERGE
> after this patch (but I figure there's no point changing the drivers
> to use
> the latter, just to make another change in a couple months when arch/
> ppc
> dies).
Ok (just wanted to make sure I was clear) and agreed on not wanting to
change the drivers.
- k
^ permalink raw reply
* Re: zImage.embedded
From: Guillaume Dargaud @ 2008-04-11 15:51 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <fa686aa40804110655x48120e84tde01a52d8bb39a3@mail.gmail.com>
>> is the file zImage.elf my proper network image ?
>
> What bootloader is on your board? zImage.elf *might* be the proper
> image. If you're using u-boot, then you want to build a uImage
> instead.
I... ahem... what would you recommand for a ML405 ?
Builroot gives to options of U-Boot or Yaboot. Haven't tried either yet.
Will do on tuesday.
I don't know if Xilinx has another solution (I remember seeing some boot
function in the API, usable from a standalone elf file).
--
Guillaume Dargaud
http://www.gdargaud.net/
^ permalink raw reply
* Re: [PATCH v2.6.26] gianfar: Determine TBIPA value dynamically
From: Paul Gortmaker @ 2008-04-11 15:49 UTC (permalink / raw)
To: Andy Fleming; +Cc: netdev, linuxppc-dev
In-Reply-To: <1207870471-3601-1-git-send-email-afleming@freescale.com>
In message: [PATCH v2.6.26] gianfar: Determine TBIPA value dynamically
on 10/04/2008 Andy Fleming wrote:
> TBIPA needs to be set to a value (on connected MDIO buses) that doesn't
> conflict with PHYs on the bus. By hardcoding it to 0x1f, we were preventing
> boards with PHYs at 0x1f from working properly. Instead, scan the bus when
> it comes up, and find an address that doesn't have a PHY on it. The TBI PHY
> configuration code then trusts that the value in TBIPA is either safe, or
> doesn't matter (ie - it's not an active bus with other PHYs).
>
> Signed-off-by: Andy Fleming <afleming@freescale.com>
> ---
>
> I think this should go in, but I'd like to see some testing first. I don't
> have hardware which is affected by this. I've only confirmed that it doesn't
> break current hardware.
I've tested on a board with the primary PHY at 0x1f, and it seems OK.
I'f I'm understanding this correctly, you are explicitly setting TBIPA
to zero, doing a bus walk but excluding zero, and then assigning the
found free address, which re-opens zero to be used by a real PHY.
I've made some changes to what you'd sent out, those being:
-changed the "if (i < 0) return -EBUSY to "i == 0"
-remove the now unused TBIPA_VALUE define
-remove the prototypes from gianfar.c now that you've
added them into gianfar.h
-factor out the code to read the PHY ID so we don't have
it duplicated in two places.
Thanks,
Paul.
------
>From 51389f8ca0ed0f45dcb1038069d07bdd32a55c14 Mon Sep 17 00:00:00 2001
From: Paul Gortmaker <paul.gortmaker@windriver.com>
Date: Fri, 11 Apr 2008 11:21:32 -0400
Subject: [PATCH] phylib: factor out get_phy_id from within get_phy_device
We were already doing what amounts to a get_phy_id from within
get_phy_device, and rather than duplicate this for the TBIPA
probing, we might as well just factor it out and make it available
instead.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
drivers/net/phy/phy_device.c | 38 +++++++++++++++++++++++++++++---------
include/linux/phy.h | 1 +
2 files changed, 30 insertions(+), 9 deletions(-)
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index f4c4fd8..8b1121b 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -86,35 +86,55 @@ struct phy_device* phy_device_create(struct mii_bus *bus, int addr, int phy_id)
EXPORT_SYMBOL(phy_device_create);
/**
- * get_phy_device - reads the specified PHY device and returns its @phy_device struct
+ * get_phy_id - reads the specified addr for its ID.
* @bus: the target MII bus
* @addr: PHY address on the MII bus
+ * @phy_id: where to store the ID retrieved.
*
* Description: Reads the ID registers of the PHY at @addr on the
- * @bus, then allocates and returns the phy_device to represent it.
+ * @bus, stores it in @phy_id and returns zero on success.
*/
-struct phy_device * get_phy_device(struct mii_bus *bus, int addr)
+int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id)
{
int phy_reg;
- u32 phy_id;
- struct phy_device *dev = NULL;
/* Grab the bits from PHYIR1, and put them
* in the upper half */
phy_reg = bus->read(bus, addr, MII_PHYSID1);
if (phy_reg < 0)
- return ERR_PTR(phy_reg);
+ return -EIO;
- phy_id = (phy_reg & 0xffff) << 16;
+ *phy_id = (phy_reg & 0xffff) << 16;
/* Grab the bits from PHYIR2, and put them in the lower half */
phy_reg = bus->read(bus, addr, MII_PHYSID2);
if (phy_reg < 0)
- return ERR_PTR(phy_reg);
+ return -EIO;
+
+ *phy_id |= (phy_reg & 0xffff);
+
+ return 0;
+}
+
+/**
+ * get_phy_device - reads the specified PHY device and returns its @phy_device struct
+ * @bus: the target MII bus
+ * @addr: PHY address on the MII bus
+ *
+ * Description: Reads the ID registers of the PHY at @addr on the
+ * @bus, then allocates and returns the phy_device to represent it.
+ */
+struct phy_device * get_phy_device(struct mii_bus *bus, int addr)
+{
+ struct phy_device *dev = NULL;
+ u32 phy_id;
+ int r;
- phy_id |= (phy_reg & 0xffff);
+ r = get_phy_id(bus, addr, &phy_id);
+ if (r)
+ return ERR_PTR(r);
/* If the phy_id is all Fs, there is no device there */
if (0xffffffff == phy_id)
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 5e43ae7..e794c4d 100644
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -361,6 +361,7 @@ struct phy_driver {
int phy_read(struct phy_device *phydev, u16 regnum);
int phy_write(struct phy_device *phydev, u16 regnum, u16 val);
+int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id);
struct phy_device* get_phy_device(struct mii_bus *bus, int addr);
int phy_clear_interrupt(struct phy_device *phydev);
int phy_config_interrupt(struct phy_device *phydev, u32 interrupts);
--
1.5.4.3
>From 87b3a8137049e23b75454a6bf2b37d24622afdfa Mon Sep 17 00:00:00 2001
From: Paul Gortmaker <paul.gortmaker@windriver.com>
Date: Fri, 11 Apr 2008 11:35:37 -0400
Subject: [PATCH] gianfar: Determine TBIPA value dynamically
TBIPA needs to be set to a value (on connected MDIO buses) that doesn't
conflict with PHYs on the bus. By hardcoding it to 0x1f, we were preventing
boards with PHYs at 0x1f from working properly. Instead, scan the bus when
it comes up, and find an address that doesn't have a PHY on it. The TBI PHY
configuration code then trusts that the value in TBIPA is either safe, or
doesn't matter (ie - it's not an active bus with other PHYs).
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
drivers/net/gianfar.c | 27 ++++++++++++++-------------
drivers/net/gianfar.h | 1 -
drivers/net/gianfar_mii.c | 38 +++++++++++++++++++++++++++++++++-----
drivers/net/gianfar_mii.h | 3 +++
4 files changed, 50 insertions(+), 19 deletions(-)
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 718cf77..b30809b 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -130,8 +130,6 @@ static void free_skb_resources(struct gfar_private *priv);
static void gfar_set_multi(struct net_device *dev);
static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr);
static void gfar_configure_serdes(struct net_device *dev);
-extern int gfar_local_mdio_write(struct gfar_mii __iomem *regs, int mii_id, int regnum, u16 value);
-extern int gfar_local_mdio_read(struct gfar_mii __iomem *regs, int mii_id, int regnum);
#ifdef CONFIG_GFAR_NAPI
static int gfar_poll(struct napi_struct *napi, int budget);
#endif
@@ -476,24 +474,30 @@ static int init_phy(struct net_device *dev)
return 0;
}
+/*
+ * Initialize TBI PHY interface for communicating with the
+ * SERDES lynx PHY on the chip. We communicate with this PHY
+ * through the MDIO bus on each controller, treating it as a
+ * "normal" PHY at the address found in the TBIPA register. We assume
+ * that the TBIPA register is valid. Either the MDIO bus code will set
+ * it to a value that doesn't conflict with other PHYs on the bus, or the
+ * value doesn't matter, as there are no other PHYs on the bus.
+ */
static void gfar_configure_serdes(struct net_device *dev)
{
struct gfar_private *priv = netdev_priv(dev);
struct gfar_mii __iomem *regs =
(void __iomem *)&priv->regs->gfar_mii_regs;
+ int tbipa = gfar_read(&priv->regs->tbipa);
- /* Initialise TBI i/f to communicate with serdes (lynx phy) */
+ /* Single clk mode, mii mode off(for serdes communication) */
+ gfar_local_mdio_write(regs, tbipa, MII_TBICON, TBICON_CLK_SELECT);
- /* Single clk mode, mii mode off(for aerdes communication) */
- gfar_local_mdio_write(regs, TBIPA_VALUE, MII_TBICON, TBICON_CLK_SELECT);
-
- /* Supported pause and full-duplex, no half-duplex */
- gfar_local_mdio_write(regs, TBIPA_VALUE, MII_ADVERTISE,
+ gfar_local_mdio_write(regs, tbipa, MII_ADVERTISE,
ADVERTISE_1000XFULL | ADVERTISE_1000XPAUSE |
ADVERTISE_1000XPSE_ASYM);
- /* ANEG enable, restart ANEG, full duplex mode, speed[1] set */
- gfar_local_mdio_write(regs, TBIPA_VALUE, MII_BMCR, BMCR_ANENABLE |
+ gfar_local_mdio_write(regs, tbipa, MII_BMCR, BMCR_ANENABLE |
BMCR_ANRESTART | BMCR_FULLDPLX | BMCR_SPEED1000);
}
@@ -540,9 +544,6 @@ static void init_registers(struct net_device *dev)
/* Initialize the Minimum Frame Length Register */
gfar_write(&priv->regs->minflr, MINFLR_INIT_SETTINGS);
-
- /* Assign the TBI an address which won't conflict with the PHYs */
- gfar_write(&priv->regs->tbipa, TBIPA_VALUE);
}
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
index 46cd773..771aa5e 100644
--- a/drivers/net/gianfar.h
+++ b/drivers/net/gianfar.h
@@ -130,7 +130,6 @@ extern const char gfar_driver_version[];
#define DEFAULT_RXCOUNT 16
#define DEFAULT_RXTIME 4
-#define TBIPA_VALUE 0x1f
#define MIIMCFG_INIT_VALUE 0x00000007
#define MIIMCFG_RESET 0x80000000
#define MIIMIND_BUSY 0x00000001
diff --git a/drivers/net/gianfar_mii.c b/drivers/net/gianfar_mii.c
index 2432762..4f23e60 100644
--- a/drivers/net/gianfar_mii.c
+++ b/drivers/net/gianfar_mii.c
@@ -78,7 +78,6 @@ int gfar_local_mdio_write(struct gfar_mii __iomem *regs, int mii_id,
* same as system mdio bus, used for controlling the external PHYs, for eg.
*/
int gfar_local_mdio_read(struct gfar_mii __iomem *regs, int mii_id, int regnum)
-
{
u16 value;
@@ -122,7 +121,7 @@ int gfar_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
}
/* Reset the MIIM registers, and wait for the bus to free */
-int gfar_mdio_reset(struct mii_bus *bus)
+static int gfar_mdio_reset(struct mii_bus *bus)
{
struct gfar_mii __iomem *regs = (void __iomem *)bus->priv;
unsigned int timeout = PHY_INIT_TIMEOUT;
@@ -152,14 +151,15 @@ int gfar_mdio_reset(struct mii_bus *bus)
}
-int gfar_mdio_probe(struct device *dev)
+static int gfar_mdio_probe(struct device *dev)
{
struct platform_device *pdev = to_platform_device(dev);
struct gianfar_mdio_data *pdata;
struct gfar_mii __iomem *regs;
+ struct gfar __iomem *enet_regs;
struct mii_bus *new_bus;
struct resource *r;
- int err = 0;
+ int i, err = 0;
if (NULL == dev)
return -EINVAL;
@@ -199,6 +199,34 @@ int gfar_mdio_probe(struct device *dev)
new_bus->dev = dev;
dev_set_drvdata(dev, new_bus);
+ /*
+ * This is mildly evil, but so is our hardware for doing this.
+ * Also, we have to cast back to struct gfar_mii because of
+ * definition weirdness done in gianfar.h.
+ */
+ enet_regs = (struct gfar __iomem *)
+ ((char *)regs - offsetof(struct gfar, gfar_mii_regs));
+
+ /* Scan the bus, looking for an empty spot for TBIPA */
+ gfar_write(&enet_regs->tbipa, 0);
+ for (i = PHY_MAX_ADDR; i > 0; i--) {
+ u32 phy_id;
+ int r;
+
+ r = get_phy_id(new_bus, i, &phy_id);
+ if (r)
+ return r;
+
+ if (phy_id == 0xffffffff)
+ break;
+ }
+
+ /* The bus is full. We don't support using 31 PHYs, sorry */
+ if (i == 0)
+ return -EBUSY;
+
+ gfar_write(&enet_regs->tbipa, i);
+
err = mdiobus_register(new_bus);
if (0 != err) {
@@ -218,7 +246,7 @@ reg_map_fail:
}
-int gfar_mdio_remove(struct device *dev)
+static int gfar_mdio_remove(struct device *dev)
{
struct mii_bus *bus = dev_get_drvdata(dev);
diff --git a/drivers/net/gianfar_mii.h b/drivers/net/gianfar_mii.h
index b373091..2af28b1 100644
--- a/drivers/net/gianfar_mii.h
+++ b/drivers/net/gianfar_mii.h
@@ -41,6 +41,9 @@ struct gfar_mii {
int gfar_mdio_read(struct mii_bus *bus, int mii_id, int regnum);
int gfar_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
+int gfar_local_mdio_write(struct gfar_mii __iomem *regs, int mii_id,
+ int regnum, u16 value);
+int gfar_local_mdio_read(struct gfar_mii __iomem *regs, int mii_id, int regnum);
int __init gfar_mdio_init(void);
void gfar_mdio_exit(void);
#endif /* GIANFAR_PHY_H */
--
1.5.4.3
^ permalink raw reply related
* Re: Flash on LocalBus @ MPC8343
From: Scott Wood @ 2008-04-11 15:38 UTC (permalink / raw)
To: Andre Schwarz; +Cc: linux-ppc list
In-Reply-To: <47FF802B.5020708@matrix-vision.de>
On Fri, Apr 11, 2008 at 05:13:47PM +0200, Andre Schwarz wrote:
> To me it looks like there's a problem regarding the local bus in general.
>
> Am I missing a "compatible" or anything else ? "reg" or "ranges" ?
Do you have an of_bus_ids[] entry that covers the localbus?
-Scott
^ permalink raw reply
* Re: [PATCH v2.6.26] gianfar: Determine TBIPA value dynamically
From: Scott Wood @ 2008-04-11 15:31 UTC (permalink / raw)
To: Andy Fleming; +Cc: linuxppc-dev, netdev, paul.gortmaker
In-Reply-To: <1207870471-3601-1-git-send-email-afleming@freescale.com>
On Thu, Apr 10, 2008 at 06:34:31PM -0500, Andy Fleming wrote:
>
> + /*
> + * This is mildly evil, but so is our hardware for doing this.
> + * Also, we have to cast back to struct gfar_mii because of
> + * definition weirdness done in gianfar.h.
> + */
> + enet_regs = (struct gfar __iomem *)
> + ((char *)regs - offsetof(struct gfar, gfar_mii_regs));
Can we use to_container() here?
-Scott
^ permalink raw reply
* Re: Flash on LocalBus @ MPC8343
From: Laurent Pinchart @ 2008-04-11 15:20 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Andre Schwarz
In-Reply-To: <47FF802B.5020708@matrix-vision.de>
[-- Attachment #1: Type: text/plain, Size: 1707 bytes --]
On Friday 11 April 2008 17:13, Andre Schwarz wrote:
> Hi all,
>
> I've been trying hard to make the mtd-partitions available via device
> tree on my MPC8343 local bus.
> No success so far ...
>
> Everything works fine on my MPC5200B based system - flash layout
> definition is quite simple ....
>
> To me it looks like there's a problem regarding the local bus in general.
>
> Am I missing a "compatible" or anything else ? "reg" or "ranges" ?
>
> The other boards use static map files or provide partition over command
> line args .... so suitable dts available.
>
> Flash is 8MB size in 16-Bit configuration and should reside on
> 0xFF800000 at cs0.
>
>
> Any hints ?
>
>
> regards,
> Andre Schwarz
> Matrix Vision
>
>
> dts syntax :
>
> <snip>
>
> localbus@e0005000 {
> #address-cells = <2>;
> #size-cells = <1>;
> compatible = "fsl,mpc8343-localbus", "fsl,pq2pro-localbus";
>
> ranges = <0x0 0x0 0xff800000 0x00800000>;
>
> flash@0,0 {
> compatible = "amd,s29gl64", "cfi-flash";
> reg = <0 0 800000>;
reg should be <0 0 0x800000>.
> #address-cells = <1>;
> #size-cells = <1>;
> bank-width = <2>;
> device-width = <2>;
>
> ppcboot_env@0 {
> reg = <0x0 0x2000>;
> };
--
Laurent Pinchart
CSE Semaphore Belgium
Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium
T +32 (2) 387 42 59
F +32 (2) 387 42 75
[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* Flash on LocalBus @ MPC8343
From: Andre Schwarz @ 2008-04-11 15:13 UTC (permalink / raw)
To: linux-ppc list
Hi all,
I've been trying hard to make the mtd-partitions available via device
tree on my MPC8343 local bus.
No success so far ...
Everything works fine on my MPC5200B based system - flash layout
definition is quite simple ....
To me it looks like there's a problem regarding the local bus in general.
Am I missing a "compatible" or anything else ? "reg" or "ranges" ?
The other boards use static map files or provide partition over command
line args .... so suitable dts available.
Flash is 8MB size in 16-Bit configuration and should reside on
0xFF800000 at cs0.
Any hints ?
regards,
Andre Schwarz
Matrix Vision
dts syntax :
<snip>
localbus@e0005000 {
#address-cells = <2>;
#size-cells = <1>;
compatible = "fsl,mpc8343-localbus", "fsl,pq2pro-localbus";
ranges = <0x0 0x0 0xff800000 0x00800000>;
flash@0,0 {
compatible = "amd,s29gl64", "cfi-flash";
reg = <0 0 800000>;
#address-cells = <1>;
#size-cells = <1>;
bank-width = <2>;
device-width = <2>;
ppcboot_env@0 {
reg = <0x0 0x2000>;
};
<snip>
MATRIX VISION GmbH, Talstraße 16, DE-71570 Oppenweiler - Registergericht: Amtsgericht Stuttgart, HRB 271090
Geschäftsführer: Gerhard Thullner, Werner Armingeon, Uwe Furtner
^ permalink raw reply
* Re: [PATCH7/7] [POWERPC] Add i2c pins to dts and board setup
From: Scott Wood @ 2008-04-11 15:02 UTC (permalink / raw)
To: Jochen Friedrich
Cc: Kernel, Linux, linuxppc-dev list, Jean Delvare, Linux I2C
In-Reply-To: <47FF71B1.9070907@scram.de>
Jochen Friedrich wrote:
> diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
> index 7285ca1..7273996 100644
> --- a/arch/powerpc/boot/dts/mpc8272ads.dts
> +++ b/arch/powerpc/boot/dts/mpc8272ads.dts
> @@ -215,6 +215,16 @@
> linux,network-index = <1>;
> fsl,cpm-command = <16200300>;
> };
> +
> + i2c@11860 {
> + compatible = "fsl,mpc8248-i2c",
mpc8272-i2c
-Scott
^ permalink raw reply
* Re: State of the MPC5200 PSC AC97 driver
From: Marian Balakowicz @ 2008-04-11 14:53 UTC (permalink / raw)
To: Grant Likely; +Cc: Sven Luther, spitzauer_77, linuxppc-dev
In-Reply-To: <fa686aa40804110650h2a215290h5269ce74ff6e33c5@mail.gmail.com>
Grant Likely wrote:
> On Fri, Apr 11, 2008 at 3:23 AM, Marian Balakowicz <m8@semihalf.com> wrote:
>> All,
>>
>> Thanks for the input and comments.
>>
>> I am also having a look at the I2S driver. There were attempts some
>> time ago and I found few pieces of code floating on net but couldn't
>> find anything cleaned up. Did anyone tried to put the results of those
>> attempts together?
>
> I'm actually working on the I2S driver now and I'll probably have
> something to post about a month from now. This is funded development,
> so I'll actually have lots of time to spend on it when I get back from
> ELC.
Nice, I'll most probably work on it quite soon as well. It would be
good to coordinate efforts, will ping you when I am about to start.
Cheers,
m.
^ permalink raw reply
* Re: [PATCH] CPM: Always use new binding.
From: Scott Wood @ 2008-04-11 14:46 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <E26DEDA5-96A7-40C1-A06A-5D8503453715@kernel.crashing.org>
On Thu, Apr 10, 2008 at 06:44:24PM -0500, Kumar Gala wrote:
>
> On Apr 10, 2008, at 3:45 PM, Scott Wood wrote:
>> The kconfig entry can go away once arch/ppc and references to the
>> config in
>> drivers are removed.
>
> just to be clear. arch/powerpc will always just use the new binding and
> arch/ppc uses the old (or has the option)?
Yes, CONFIG_PPC_NEW_BINDING is effectively an alias for CONFIG_PPC_MERGE
after this patch (but I figure there's no point changing the drivers to use
the latter, just to make another change in a couple months when arch/ppc
dies).
-Scott
^ permalink raw reply
* Re: [PATCH 1/2] OF helpers for the GPIO API
From: Grant Likely @ 2008-04-11 14:28 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev, Paul Mackerras, David Miller
In-Reply-To: <20080411130645.GB12655@polina.dev.rtsoft.ru>
On Fri, Apr 11, 2008 at 7:06 AM, Anton Vorontsov
<avorontsov@ru.mvista.com> wrote:
> This patch implements various helpers to support OF bindings for
> the GPIO LIB API.
>
> Previously this was PowerPC specific, but it seems this code
> isn't arch-dependent anyhow, so let's place it into of/.
>
> SPARC will not see this addition yet, real hardware seem to not use
> GPIOs at all. But this might change:
>
> http://www.leox.org/docs/faq_MLleon.html
>
> "16-bit I/O port" sounds promising. :-)
>
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Looks pretty sane to me. Only nitpick; the documentation should be part of this
patch, not the next one; but I have no complaints if they both get
picked up at the same time.
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH 2/2] [POWERPC] UCC nodes cleanup
From: Timur Tabi @ 2008-04-11 14:26 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev
In-Reply-To: <82E8E38A-C159-4C23-BDE8-086D4429F366@kernel.crashing.org>
Kumar Gala wrote:
> I'd prefer we use cell-index and not introduce "fsl,ucc".
Yeah, me too. cell-index is the right property for the UCC number.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH 1/2] ibm_newemac: PowerPC 440GX EMAC PHY clock workaround
From: Josh Boyer @ 2008-04-11 14:24 UTC (permalink / raw)
To: Jeff Garzik; +Cc: linuxppc-dev, netdev
In-Reply-To: <47EDA6F1.9080206@garzik.org>
On Fri, 28 Mar 2008 22:18:25 -0400
Jeff Garzik <jeff@garzik.org> wrote:
> Valentine Barshak wrote:
> > The PowerPC 440GX Taishan board fails to reset EMAC3 (reset timeout error)
> > if there's no link. Because of that it fails to find PHY chip. The older ibm_emac
> > driver had a workaround for that: the EMAC_CLK_INTERNAL/EMAC_CLK_EXTERNAL macros,
> > which toggle the Ethernet Clock Select bit in the SDR0_MFR register. This patch
> > does the same for "ibm,emac-440gx" compatible chips. The workaround forces
> > clock on -all- EMACs, so we select clock under global emac_phy_map_lock.
> >
> > Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
> > ---
> > drivers/net/ibm_newemac/core.c | 16 +++++++++++++++-
> > drivers/net/ibm_newemac/core.h | 8 ++++++--
> > 2 files changed, 21 insertions(+), 3 deletions(-)
>
> is this for 2.6.25-rc?
Jeff, can I get an ack from you on this patch, and patch 2 in this
set? They depend on a patch in my tree and I'd like to include them in
my next push to Paul for 2.6.26.
josh
^ permalink raw reply
* Re: [PATCH 2/2] [POWERPC] Implement support for the GPIO LIB API
From: Grant Likely @ 2008-04-11 14:16 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev, Paul Mackerras, David Miller
In-Reply-To: <20080411130636.GA12655@polina.dev.rtsoft.ru>
On Fri, Apr 11, 2008 at 7:06 AM, Anton Vorontsov
<avorontsov@ru.mvista.com> wrote:
> This patch implements support for the GPIO LIB API. Two calls
> unimplemented though: irq_to_gpio and gpio_to_irq.
>
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
I like it
Acked-by: Grant Likely <grant.likely@secretlab.ca>
> ---
> Documentation/powerpc/booting-without-of.txt | 52 ++++++++++++++++++++++++
> arch/powerpc/Kconfig | 5 ++
> include/asm-powerpc/gpio.h | 56 ++++++++++++++++++++++++++
> 3 files changed, 113 insertions(+), 0 deletions(-)
> create mode 100644 include/asm-powerpc/gpio.h
>
> diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
> index b506245..e9e0c2f 100644
> --- a/Documentation/powerpc/booting-without-of.txt
> +++ b/Documentation/powerpc/booting-without-of.txt
> @@ -66,6 +66,10 @@ Table of Contents
> 3) OpenPIC Interrupt Controllers
> 4) ISA Interrupt Controllers
>
> + VIII - Specifying GPIO information for devices
> + 1) gpios property
> + 2) gpio-controller nodes
> +
> Appendix A - Sample SOC node for MPC8540
>
>
> @@ -2925,6 +2929,54 @@ encodings listed below:
> 2 = high to low edge sensitive type enabled
> 3 = low to high edge sensitive type enabled
>
> +VIII - Specifying GPIO information for devices
> +==============================================
> +
> +1) gpios property
> +-----------------
> +
> +Nodes that makes use of GPIOs should define them using `gpios' property,
> +format of which is: <&gpio-controller1-phandle gpio1-specifier
> + &gpio-controller2-phandle gpio2-specifier
> + 0 /* holes are permitted, means no GPIO 3 */
> + &gpio-controller4-phandle gpio4-specifier
> + ...>;
> +
> +Note that gpio-specifier length is controller dependent.
> +
> +gpio-specifier may encode: bank, pin position inside the bank,
> +whether pin is open-drain and whether pin is logically inverted.
> +
> +Example of the node using GPIOs:
> +
> + node {
> + gpios = <&qe_pio_e 18 0>;
> + };
> +
> +In this example gpio-specifier is "18 0" and encodes GPIO pin number,
> +and empty GPIO flags as accepted by the "qe_pio_e" gpio-controller.
> +
> +2) gpio-controller nodes
> +------------------------
> +
> +Every GPIO controller node must have #gpio-cells property defined,
> +this information will be used to translate gpio-specifiers.
> +
> +Example of two SOC GPIO banks defined as gpio-controller nodes:
> +
> + qe_pio_a: gpio-controller@1400 {
> + #gpio-cells = <2>;
> + compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank";
> + reg = <0x1400 0x18>;
> + gpio-controller;
> + };
> +
> + qe_pio_e: gpio-controller@1460 {
> + #gpio-cells = <2>;
> + compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";
> + reg = <0x1460 0x18>;
> + gpio-controller;
> + };
>
> Appendix A - Sample SOC node for MPC8540
> ========================================
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 0b27cbd..f328509 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -81,6 +81,11 @@ config GENERIC_FIND_NEXT_BIT
> bool
> default y
>
> +config GENERIC_GPIO
> + bool
> + help
> + Generic GPIO API support
> +
> config ARCH_NO_VIRT_TO_BUS
> def_bool PPC64
>
> diff --git a/include/asm-powerpc/gpio.h b/include/asm-powerpc/gpio.h
> new file mode 100644
> index 0000000..77ad3a8
> --- /dev/null
> +++ b/include/asm-powerpc/gpio.h
> @@ -0,0 +1,56 @@
> +/*
> + * Generic GPIO API implementation for PowerPC.
> + *
> + * Copyright (c) 2007-2008 MontaVista Software, Inc.
> + *
> + * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + */
> +
> +#ifndef __ASM_POWERPC_GPIO_H
> +#define __ASM_POWERPC_GPIO_H
> +
> +#include <linux/errno.h>
> +#include <asm-generic/gpio.h>
> +
> +#ifdef CONFIG_HAVE_GPIO_LIB
> +
> +/*
> + * We don't (yet) implement inlined/rapid versions for on-chip gpios.
> + * Just call gpiolib.
> + */
> +static inline int gpio_get_value(unsigned int gpio)
> +{
> + return __gpio_get_value(gpio);
> +}
> +
> +static inline void gpio_set_value(unsigned int gpio, int value)
> +{
> + __gpio_set_value(gpio, value);
> +}
> +
> +static inline int gpio_cansleep(unsigned int gpio)
> +{
> + return __gpio_cansleep(gpio);
> +}
> +
> +/*
> + * Not implemented, yet.
> + */
> +static inline int gpio_to_irq(unsigned int gpio)
> +{
> + return -ENOSYS;
> +}
> +
> +static inline int irq_to_gpio(unsigned int irq)
> +{
> + return -EINVAL;
> +}
> +
> +#endif /* CONFIG_HAVE_GPIO_LIB */
> +
> +#endif /* __ASM_POWERPC_GPIO_H */
> --
> 1.5.4.5
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH 2/2] [POWERPC] UCC nodes cleanup
From: Kumar Gala @ 2008-04-11 14:13 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev
In-Reply-To: <20080311171045.GB4684@localhost.localdomain>
On Mar 11, 2008, at 12:10 PM, Anton Vorontsov wrote:
> - get rid of `model = "UCC"' in the ucc nodes
> It isn't used anywhere, so remove it. If we'll ever need something
> like this, we'll use compatible property instead.
> - replace cell-index and device-id properties by fsl,ucc.
>
> Drivers are modified for backward compatibility's sake.
I'd prefer we use cell-index and not introduce "fsl,ucc". I'm ok with
dropping device-id and model (its implied in the compatiable).
- k
^ permalink raw reply
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