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* Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
From: Scott Wood @ 2008-04-16 18:44 UTC (permalink / raw)
  To: Anton Vorontsov; +Cc: linuxppc-dev
In-Reply-To: <20080416183904.GA23512@polina.dev.rtsoft.ru>

On Wed, Apr 16, 2008 at 10:39:04PM +0400, Anton Vorontsov wrote:
> +/**
> + * gtm_reset_utimer16 - reset 16 bits timer
> + * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
> + * @usec:	timer interval in microseconds
> + * @free_run:	free run flag
> + *
> + * This function (re)sets GTM timer so it counts up to the interval value and
> + * fires the interrupt when the value is reached. If free_run flag was set,
> + * timer will also reset itself upon reference value, otherwise it continues to
> + * increment.
> + */
> +int gtm_reset_utimer16(struct gtm_timer *tmr, u16 usec, bool free_run)

A maximal timeout of ~65 ms is a little low...  For use as a wakeup from
sleep mode, I'd like to be able to request timeouts as large as the
hardware allows.

-Scott

^ permalink raw reply

* Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
From: Anton Vorontsov @ 2008-04-16 18:39 UTC (permalink / raw)
  To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <47E02A8C.2080705@freescale.com>

On Tue, Mar 18, 2008 at 03:48:12PM -0500, Scott Wood wrote:
[...]
> How about:
>
> struct gtm_timer *gtm_get_specific_timer(struct gtm *gtm, int timer,
>                                          int width);
>
> ...with np->data used by the caller to figure out which gtm pointer to  
> pass in.

Thanks for the comments, I've tried to address them all.

Updated patch below (not for applying, still waiting for further
comments, if any).

- - - -
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Subject: [POWERPC] sysdev,qe_lib: implement FSL GTM support

GTM stands for General-purpose Timers Module and able to generate
timer{1,2,3,4} interrupts.

There are several limitations in this support:
1. Cascaded (32 bit) timers unimplemented (1-2, 3-4).
   This is straightforward to implement when needed, two timers should
   be marked as "requested" and configured as appropriate.
2. Super-cascaded (64 bit) timers unimplemented (1-2-3-4).
   This is also straightforward to implement when needed, all timers
   should be marked as "requested" and configured as appropriate.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
 Documentation/powerpc/booting-without-of.txt |   32 +++-
 arch/powerpc/Kconfig                         |    5 +
 arch/powerpc/sysdev/Makefile                 |    1 +
 arch/powerpc/sysdev/fsl_gtm.c                |  322 ++++++++++++++++++++++++++
 include/asm-powerpc/fsl_gtm.h                |  106 +++++++++
 5 files changed, 465 insertions(+), 1 deletions(-)
 create mode 100644 arch/powerpc/sysdev/fsl_gtm.c
 create mode 100644 include/asm-powerpc/fsl_gtm.h

diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index f19fe9f..ee14ecd 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -57,7 +57,8 @@ Table of Contents
       n) 4xx/Axon EMAC ethernet nodes
       o) Xilinx IP cores
       p) Freescale Synchronous Serial Interface
-	  q) USB EHCI controllers
+      q) USB EHCI controllers
+      r) Freescale General-purpose Timers Module
 
   VII - Specifying interrupt information for devices
     1) interrupts property
@@ -2795,6 +2796,35 @@ platforms are moved over to use the flattened-device-tree model.
 		   big-endian;
 	   };
 
+    r) Freescale General-purpose Timers Module
+
+    Required properties:
+      - compatible : should be "fsl,gtm" ("fsl,qe-gtm" in addition for QE
+                     GTMs).
+      - reg : should contain gtm registers location and length (0x40).
+      - interrupts : should contain four interrupts.
+      - interrupt-parent : interrupt source phandle.
+      - clock-frequency : specifies the frequency driving the timer.
+
+    Example:
+
+    timer@500 {
+    	compatible = "fsl,gtm";
+    	reg = <0x500 0x40>;
+    	interrupts = <90 8 78 8 84 8 72 8>;
+    	interrupt-parent = <&ipic>;
+    	/* filled by u-boot */
+    	clock-frequency = <0>;
+    };
+
+    timer@440 {
+    	compatible = "fsl,qe-gtm", "fsl,gtm";
+    	reg = <0x440 0x40>;
+    	interrupts = <12 13 14 15>;
+    	interrupt-parent = <&qeic>;
+    	/* filled by u-boot */
+    	clock-frequency = <0>;
+    };
 
    More devices will be defined as this spec matures.
 
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 00c5e79..dd30ea4 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -520,6 +520,11 @@ config FSL_LBC
 	help
 	  Freescale Localbus support
 
+config FSL_GTM
+	bool
+	help
+	  Freescale General-purpose Timers support
+
 # Yes MCA RS/6000s exist but Linux-PPC does not currently support any
 config MCA
 	bool
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 42b44a1..3974412 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_MMIO_NVRAM)	+= mmio_nvram.o
 obj-$(CONFIG_FSL_SOC)		+= fsl_soc.o
 obj-$(CONFIG_FSL_PCI)		+= fsl_pci.o
 obj-$(CONFIG_FSL_LBC)		+= fsl_lbc.o
+obj-$(CONFIG_FSL_GTM)		+= fsl_gtm.o
 obj-$(CONFIG_RAPIDIO)		+= fsl_rio.o
 obj-$(CONFIG_TSI108_BRIDGE)	+= tsi108_pci.o tsi108_dev.o
 obj-$(CONFIG_QUICC_ENGINE)	+= qe_lib/
diff --git a/arch/powerpc/sysdev/fsl_gtm.c b/arch/powerpc/sysdev/fsl_gtm.c
new file mode 100644
index 0000000..6d86983
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_gtm.c
@@ -0,0 +1,322 @@
+/*
+ * Freescale General-purpose Timers Module
+ *
+ * Copyright (c) Freescale Semicondutor, Inc. 2006.
+ *               Shlomi Gridish <gridish@freescale.com>
+ *               Jerry Huang <Chang-Ming.Huang@freescale.com>
+ * Copyright (c) MontaVista Software, Inc. 2008.
+ *               Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/spinlock.h>
+#include <asm/fsl_gtm.h>
+
+/**
+ * gtm_get_timer - request GTM timer to use it with the rest of GTM API
+ * @width:	timer width (only 16 bits wide timers implemented so far)
+ *
+ * This function reserves GTM timer for later use. It returns gtm_timer
+ * structure to use with the rest of GTM API, you should use timer->irq
+ * to manage timer interrupt.
+ */
+struct gtm_timer *gtm_get_timer(int width)
+{
+	struct device_node *np;
+	struct gtm *gtm = NULL;
+	int i;
+
+	if (width != 16)
+		return ERR_PTR(-ENOSYS);
+
+	for_each_compatible_node(np, NULL, "fsl,gtm") {
+		if (!np->data) {
+			WARN_ON(1);
+			continue;
+		}
+		gtm = np->data;
+
+		spin_lock_irq(&gtm->lock);
+
+		for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
+			if (!gtm->timers[i].requested) {
+				gtm->timers[i].requested = true;
+				spin_unlock_irq(&gtm->lock);
+				of_node_put(np);
+				return &gtm->timers[i];
+			}
+		}
+
+		spin_unlock_irq(&gtm->lock);
+	}
+
+	if (gtm)
+		return ERR_PTR(-EBUSY);
+	return ERR_PTR(-ENODEV);
+}
+EXPORT_SYMBOL(gtm_get_timer);
+
+/**
+ * gtm_get_specific_timer - request specific GTM timer
+ * @gtm:	specific GTM, pass here GTM's device_node->data
+ * @timer:	specific timer number, Timer1 is 0.
+ * @width:	timer width (only 16 bits wide timers implemented so far)
+ *
+ * This function reserves GTM timer for later use. It returns gtm_timer
+ * structure to use with the rest of GTM API, you should use timer->irq
+ * to manage timer interrupt.
+ */
+struct gtm_timer *gtm_get_specific_timer(struct gtm *gtm, int timer, int width)
+{
+	struct gtm_timer *ret = ERR_PTR(-EBUSY);
+
+	if (width != 16)
+		return ERR_PTR(-ENOSYS);
+
+	spin_lock_irq(&gtm->lock);
+
+	if (gtm->timers[timer].requested)
+		goto out;
+
+	ret = &gtm->timers[timer];
+	ret->requested = true;
+
+out:
+	spin_unlock_irq(&gtm->lock);
+	return ret;
+}
+EXPORT_SYMBOL(gtm_get_specific_timer);
+
+/**
+ * gtm_put_timer - release GTM timer
+ * @width:	timer width (only 16 bits wide timers implemented so far)
+ *
+ * This function releases GTM timer so others may request it.
+ */
+void gtm_put_timer(struct gtm_timer *tmr)
+{
+	spin_lock_irq(&tmr->gtm->lock);
+
+	tmr->requested = false;
+
+	spin_unlock_irq(&tmr->gtm->lock);
+}
+EXPORT_SYMBOL(gtm_put_timer);
+
+/*
+ * This is back-end for the exported functions, it's used to reset single
+ * timer in reference mode.
+ */
+static int gtm_reset_ref_timer16(struct gtm_timer *tmr, int frequency,
+				 int reference_value, bool free_run)
+{
+	struct gtm *gtm = tmr->gtm;
+	int num = tmr - &gtm->timers[0];
+	unsigned int prescaler;
+	u8 iclk = GTMDR_ICLK_ICLK;
+	u8 psr;
+	u8 sps;
+	unsigned long flags;
+
+	prescaler = gtm->clock / frequency;
+	/*
+	 * We have two 8 bit prescalers -- primary and secondary (psr, sps),
+	 * plus "slow go" mode (clk / 16). So, total prescale value is
+	 * 16 * (psr + 1) * (sps + 1).
+	 */
+	if (prescaler > 256 * 256 * 16)
+		return -EINVAL;
+
+	if (prescaler > 256 * 256) {
+		iclk = GTMDR_ICLK_SLGO;
+		prescaler /= 16;
+	}
+
+	if (prescaler > 256) {
+		psr = 256 - 1;
+		sps = prescaler / 256 - 1;
+	} else {
+		psr = prescaler - 1;
+		sps = 1 - 1;
+	}
+
+	spin_lock_irqsave(&gtm->lock, flags);
+
+	/*
+	 * Properly reset timers: stop, reset, set up prescalers, reference
+	 * value and clear event register.
+	 */
+	clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)),
+				 GTCFR_STP(num) | GTCFR_RST(num));
+
+	setbits8(tmr->gtcfr, GTCFR_STP(num));
+
+	out_be16(tmr->gtpsr, psr);
+	clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) |
+			GTMDR_ORI | (free_run ? GTMDR_FFR : 0));
+	out_be16(tmr->gtcnr, 0);
+	out_be16(tmr->gtrfr, reference_value);
+	out_be16(tmr->gtevr, 0xFFFF);
+
+	/* Let it be. */
+	clrbits8(tmr->gtcfr, GTCFR_STP(num));
+
+	spin_unlock_irqrestore(&gtm->lock, flags);
+
+	return 0;
+}
+
+/**
+ * gtm_reset_utimer16 - reset 16 bits timer
+ * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
+ * @usec:	timer interval in microseconds
+ * @free_run:	free run flag
+ *
+ * This function (re)sets GTM timer so it counts up to the interval value and
+ * fires the interrupt when the value is reached. If free_run flag was set,
+ * timer will also reset itself upon reference value, otherwise it continues to
+ * increment.
+ */
+int gtm_reset_utimer16(struct gtm_timer *tmr, u16 usec, bool free_run)
+{
+	/* quite obvious, frequency which is enough for µSec precision */
+	const int freq = 1000000;
+
+	/*
+	 * We can lower the frequency (and probably power consumption) by
+	 * dividing both frequency and usec by 2 until there is no remainder.
+	 * But we won't bother with this unless savings are measured, so just
+	 * run the timer as is.
+	 */
+
+	return gtm_reset_ref_timer16(tmr, freq, usec, free_run);
+}
+EXPORT_SYMBOL(gtm_reset_utimer16);
+
+/**
+ * gtm_stop_timer16 - stop single timer
+ * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
+ *
+ * This function simply stops the GTM timer.
+ */
+void gtm_stop_timer16(struct gtm_timer *tmr)
+{
+	struct gtm *gtm = tmr->gtm;
+	int num = tmr - &gtm->timers[0];
+	unsigned long flags;
+
+	spin_lock_irqsave(&gtm->lock, flags);
+
+	setbits8(tmr->gtcfr, GTCFR_STP(num));
+	out_be16(tmr->gtevr, 0xFFFF);
+
+	spin_unlock_irqrestore(&gtm->lock, flags);
+}
+EXPORT_SYMBOL(gtm_stop_timer16);
+
+static void __init gtm_set_shortcuts(struct gtm_timer *timers,
+				     struct gtm_timers_regs __iomem *regs)
+{
+	/*
+	 * Yeah, I don't like this either, but timers' registers a bit messed,
+	 * so we have to provide shortcuts to write timer independent code.
+	 * Alternative option is to create gt*() accessors, but that will be
+	 * even uglier and cryptic.
+	 */
+	timers[0].gtcfr = &regs->gtcfr1;
+	timers[0].gtmdr = &regs->gtmdr1;
+	timers[0].gtpsr = &regs->gtpsr1;
+	timers[0].gtcnr = &regs->gtcnr1;
+	timers[0].gtrfr = &regs->gtrfr1;
+	timers[0].gtevr = &regs->gtevr1;
+
+	timers[1].gtcfr = &regs->gtcfr1;
+	timers[1].gtmdr = &regs->gtmdr2;
+	timers[1].gtpsr = &regs->gtpsr2;
+	timers[1].gtcnr = &regs->gtcnr2;
+	timers[1].gtrfr = &regs->gtrfr2;
+	timers[1].gtevr = &regs->gtevr2;
+
+	timers[2].gtcfr = &regs->gtcfr2;
+	timers[2].gtmdr = &regs->gtmdr3;
+	timers[2].gtpsr = &regs->gtpsr3;
+	timers[2].gtcnr = &regs->gtcnr3;
+	timers[2].gtrfr = &regs->gtrfr3;
+	timers[2].gtevr = &regs->gtevr3;
+
+	timers[3].gtcfr = &regs->gtcfr2;
+	timers[3].gtmdr = &regs->gtmdr4;
+	timers[3].gtpsr = &regs->gtpsr4;
+	timers[3].gtcnr = &regs->gtcnr4;
+	timers[3].gtrfr = &regs->gtrfr4;
+	timers[3].gtevr = &regs->gtevr4;
+}
+
+static int __init gtm_init(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "fsl,gtm") {
+		int i;
+		struct gtm *gtm;
+		const u32 *clock;
+		int size;
+
+		gtm = kzalloc(sizeof(*gtm), GFP_KERNEL);
+		if (!gtm) {
+			pr_err("%s: unable to allocate memory\n",
+				np->full_name);
+			continue;
+		}
+
+		spin_lock_init(&gtm->lock);
+
+		clock = of_get_property(np, "clock-frequency", &size);
+		if (!clock || size != sizeof(*clock)) {
+			pr_err("%s: no clock-frequency\n", np->full_name);
+			goto err;
+		}
+		gtm->clock = *clock;
+
+		for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
+			int ret;
+			struct resource irq;
+
+			ret = of_irq_to_resource(np, i, &irq);
+			if (ret == NO_IRQ) {
+				pr_err("%s: not enough interrupts specified\n",
+				       np->full_name);
+				goto err;
+			}
+			gtm->timers[i].irq = irq.start;
+			gtm->timers[i].gtm = gtm;
+		}
+
+		gtm->regs = of_iomap(np, 0);
+		if (!gtm->regs) {
+			pr_err("%s: unable to iomap registers\n",
+			       np->full_name);
+			goto err;
+		}
+
+		gtm_set_shortcuts(gtm->timers, gtm->regs);
+
+		/* We don't want to lose the node and its ->data */
+		of_node_get(np);
+		np->data = gtm;
+
+		continue;
+err:
+		kfree(gtm);
+	}
+	return 0;
+}
+arch_initcall(gtm_init);
diff --git a/include/asm-powerpc/fsl_gtm.h b/include/asm-powerpc/fsl_gtm.h
new file mode 100644
index 0000000..46c02e7
--- /dev/null
+++ b/include/asm-powerpc/fsl_gtm.h
@@ -0,0 +1,106 @@
+/*
+ * Freescale General-purpose Timers Module
+ *
+ * Copyright (c) Freescale Semicondutor, Inc. 2006.
+ *               Shlomi Gridish <gridish@freescale.com>
+ *               Jerry Huang <Chang-Ming.Huang@freescale.com>
+ * Copyright (c) MontaVista Software, Inc. 2008.
+ *               Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __ASM_FSL_GTM_H
+#define __ASM_FSL_GTM_H
+
+#include <linux/types.h>
+#include <linux/spinlock.h>
+#include <linux/io.h>
+
+#define GTCFR_STP(x)		((x) & 1 ? 1 << 5 : 1 << 1)
+#define GTCFR_RST(x)		((x) & 1 ? 1 << 4 : 1 << 0)
+
+#define GTMDR_ICLK_MASK		(3 << 1)
+#define GTMDR_ICLK_ICAS		(0 << 1)
+#define GTMDR_ICLK_ICLK		(1 << 1)
+#define GTMDR_ICLK_SLGO		(2 << 1)
+#define GTMDR_FFR		(1 << 3)
+#define GTMDR_ORI		(1 << 4)
+#define GTMDR_SPS(x)		((x) << 8)
+
+struct gtm_timers_regs {
+	u8	gtcfr1;		/* Timer 1, Timer 2 global config register */
+	u8	res0[0x3];
+	u8	gtcfr2;		/* Timer 3, timer 4 global config register */
+	u8	res1[0xB];
+	__be16	gtmdr1;		/* Timer 1 mode register */
+	__be16	gtmdr2;		/* Timer 2 mode register */
+	__be16	gtrfr1;		/* Timer 1 reference register */
+	__be16	gtrfr2;		/* Timer 2 reference register */
+	__be16	gtcpr1;		/* Timer 1 capture register */
+	__be16	gtcpr2;		/* Timer 2 capture register */
+	__be16	gtcnr1;		/* Timer 1 counter */
+	__be16	gtcnr2;		/* Timer 2 counter */
+	__be16	gtmdr3;		/* Timer 3 mode register */
+	__be16	gtmdr4;		/* Timer 4 mode register */
+	__be16	gtrfr3;		/* Timer 3 reference register */
+	__be16	gtrfr4;		/* Timer 4 reference register */
+	__be16	gtcpr3;		/* Timer 3 capture register */
+	__be16	gtcpr4;		/* Timer 4 capture register */
+	__be16	gtcnr3;		/* Timer 3 counter */
+	__be16	gtcnr4;		/* Timer 4 counter */
+	__be16	gtevr1;		/* Timer 1 event register */
+	__be16	gtevr2;		/* Timer 2 event register */
+	__be16	gtevr3;		/* Timer 3 event register */
+	__be16	gtevr4;		/* Timer 4 event register */
+	__be16	gtpsr1;		/* Timer 1 prescale register */
+	__be16	gtpsr2;		/* Timer 2 prescale register */
+	__be16	gtpsr3;		/* Timer 3 prescale register */
+	__be16	gtpsr4;		/* Timer 4 prescale register */
+	u8 res2[0x40];
+} __attribute__ ((packed));
+
+struct gtm_timer {
+	unsigned int irq;
+
+	struct gtm *gtm;
+	bool requested;
+	u8 __iomem *gtcfr;
+	__be16 __iomem *gtmdr;
+	__be16 __iomem *gtpsr;
+	__be16 __iomem *gtcnr;
+	__be16 __iomem *gtrfr;
+	__be16 __iomem *gtevr;
+};
+
+struct gtm {
+	unsigned int clock;
+	struct gtm_timers_regs __iomem *regs;
+	struct gtm_timer timers[4];
+	spinlock_t lock;
+};
+
+extern struct gtm_timer *gtm_get_timer(int width);
+extern struct gtm_timer *gtm_get_specific_timer(struct gtm *gtm, int timer,
+						int width);
+extern void gtm_put_timer(struct gtm_timer *tmr);
+extern int gtm_reset_utimer16(struct gtm_timer *tmr, u16 usec, bool free_run);
+extern void gtm_stop_timer16(struct gtm_timer *tmr);
+
+/**
+ * gtm_ack_timer16 - acknowledge timer event (free-run timers only)
+ * @tmr:	pointer to the gtm_timer structure obtained from gtm_get_timer
+ * @events:	events mask to ack
+ *
+ * Thus function used to acknowledge timer interrupt event, use it inside the
+ * interrupt handler.
+ */
+static inline void gtm_ack_timer16(struct gtm_timer *tmr, u16 events)
+{
+	out_be16(tmr->gtevr, events);
+}
+
+#endif /* __ASM_FSL_GTM_H */
-- 
1.5.5

^ permalink raw reply related

* [PATCH v2][POWERPC] qe_lib and ucc_geth: switch to the cpm_muram implementation
From: Anton Vorontsov @ 2008-04-16 18:22 UTC (permalink / raw)
  To: Kumar Gala; +Cc: Scott Wood, linuxppc-dev, Jeff Garzik, Timur Tabi, netdev
In-Reply-To: <20080414181810.GA1038@polina.dev.rtsoft.ru>

This is very trivial patch. We're transitioning to the cpm_muram_*
calls. That's it.

Less trivial changes:
- BD_SC_* defines were defined in the cpm.h and qe.h, so to avoid redefines
  we remove BD_SC from the qe.h and use cpm.h along with cpm_muram_*
  prototypes;
- qe_muram_dump was unused and thus removed;
- added some code to the cpm_common.c to support legacy QE bindings
  (data-only node name).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---

Oops, this small hunk wormed into the other patch in my series:

>--- a/arch/powerpc/sysdev/cpm_common.c
>+++ b/arch/powerpc/sysdev/cpm_common.c
>@@ -195,7 +195,7 @@ EXPORT_SYMBOL(cpm_muram_addr);
>
> unsigned long cpm_muram_offset(void __iomem *addr)
> {
>-       return addr - muram_vbase;
>+       return addr - (void __iomem *)muram_vbase;
> }
> EXPORT_SYMBOL(cpm_muram_offset);

Without it compile will break:

arch/powerpc/sysdev/cpm_common.c: In function ‘cpm_muram_offset’:
arch/powerpc/sysdev/cpm_common.c:198: error: invalid operands to binary -

Fixed patch down below.

 arch/powerpc/sysdev/Makefile          |    1 +
 arch/powerpc/sysdev/cpm_common.c      |   16 +++++-
 arch/powerpc/sysdev/qe_lib/qe.c       |   96 +--------------------------------
 arch/powerpc/sysdev/qe_lib/ucc_fast.c |    8 ++--
 arch/powerpc/sysdev/qe_lib/ucc_slow.c |   18 +++---
 drivers/net/ucc_geth.c                |   96 ++++++++++++++++----------------
 include/asm-powerpc/cpm.h             |    1 +
 include/asm-powerpc/qe.h              |   29 +----------
 8 files changed, 79 insertions(+), 186 deletions(-)

diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 6d386d0..42b44a1 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -40,6 +40,7 @@ endif
 ifeq ($(ARCH),powerpc)
 obj-$(CONFIG_CPM)		+= cpm_common.o
 obj-$(CONFIG_CPM2)		+= cpm2.o cpm2_pic.o
+obj-$(CONFIG_QUICC_ENGINE)	+= cpm_common.o
 obj-$(CONFIG_PPC_DCR)		+= dcr.o
 obj-$(CONFIG_8xx)		+= mpc8xx_pic.o cpm1.o
 obj-$(CONFIG_UCODE_PATCH)	+= micropatch.o
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index cb7df2d..9b75d16 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -85,9 +85,13 @@ int __init cpm_muram_init(void)
 
 	np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data");
 	if (!np) {
-		printk(KERN_ERR "Cannot find CPM muram data node");
-		ret = -ENODEV;
-		goto out;
+		/* try legacy bindings */
+		np = of_find_node_by_name(NULL, "data-only");
+		if (!np) {
+			printk(KERN_ERR "Cannot find CPM muram data node");
+			ret = -ENODEV;
+			goto out;
+		}
 	}
 
 	muram_pbase = of_translate_address(np, zero);
@@ -189,6 +193,12 @@ void __iomem *cpm_muram_addr(unsigned long offset)
 }
 EXPORT_SYMBOL(cpm_muram_addr);
 
+unsigned long cpm_muram_offset(void __iomem *addr)
+{
+	return addr - (void __iomem *)muram_vbase;
+}
+EXPORT_SYMBOL(cpm_muram_offset);
+
 /**
  * cpm_muram_dma - turn a muram virtual address into a DMA address
  * @offset: virtual address from cpm_muram_addr() to convert
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index cff550e..4b48094 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -35,7 +35,6 @@
 #include <asm/rheap.h>
 
 static void qe_snums_init(void);
-static void qe_muram_init(void);
 static int qe_sdma_init(void);
 
 static DEFINE_SPINLOCK(qe_lock);
@@ -99,7 +98,7 @@ void qe_reset(void)
 		     QE_CR_PROTOCOL_UNSPECIFIED, 0);
 
 	/* Reclaim the MURAM memory for our use. */
-	qe_muram_init();
+	cpm_muram_init();
 
 	if (qe_sdma_init())
 		panic("sdma init failed!");
@@ -314,7 +313,7 @@ static int qe_sdma_init(void)
 
 	/* allocate 2 internal temporary buffers (512 bytes size each) for
 	 * the SDMA */
- 	sdma_buf_offset = qe_muram_alloc(512 * 2, 4096);
+	sdma_buf_offset = cpm_muram_alloc(512 * 2, 4096);
 	if (IS_ERR_VALUE(sdma_buf_offset))
 		return -ENOMEM;
 
@@ -325,97 +324,6 @@ static int qe_sdma_init(void)
 	return 0;
 }
 
-/*
- * muram_alloc / muram_free bits.
- */
-static DEFINE_SPINLOCK(qe_muram_lock);
-
-/* 16 blocks should be enough to satisfy all requests
- * until the memory subsystem goes up... */
-static rh_block_t qe_boot_muram_rh_block[16];
-static rh_info_t qe_muram_info;
-
-static void qe_muram_init(void)
-{
-	struct device_node *np;
-	const u32 *address;
-	u64 size;
-	unsigned int flags;
-
-	/* initialize the info header */
-	rh_init(&qe_muram_info, 1,
-		sizeof(qe_boot_muram_rh_block) /
-		sizeof(qe_boot_muram_rh_block[0]), qe_boot_muram_rh_block);
-
-	/* Attach the usable muram area */
-	/* XXX: This is a subset of the available muram. It
-	 * varies with the processor and the microcode patches activated.
-	 */
-	np = of_find_compatible_node(NULL, NULL, "fsl,qe-muram-data");
-	if (!np) {
-		np = of_find_node_by_name(NULL, "data-only");
-		if (!np) {
-			WARN_ON(1);
-			return;
-		}
-	}
-
-	address = of_get_address(np, 0, &size, &flags);
-	WARN_ON(!address);
-
-	of_node_put(np);
-	if (address)
-		rh_attach_region(&qe_muram_info, *address, (int)size);
-}
-
-/* This function returns an index into the MURAM area.
- */
-unsigned long qe_muram_alloc(int size, int align)
-{
-	unsigned long start;
-	unsigned long flags;
-
-	spin_lock_irqsave(&qe_muram_lock, flags);
-	start = rh_alloc_align(&qe_muram_info, size, align, "QE");
-	spin_unlock_irqrestore(&qe_muram_lock, flags);
-
-	return start;
-}
-EXPORT_SYMBOL(qe_muram_alloc);
-
-int qe_muram_free(unsigned long offset)
-{
-	int ret;
-	unsigned long flags;
-
-	spin_lock_irqsave(&qe_muram_lock, flags);
-	ret = rh_free(&qe_muram_info, offset);
-	spin_unlock_irqrestore(&qe_muram_lock, flags);
-
-	return ret;
-}
-EXPORT_SYMBOL(qe_muram_free);
-
-/* not sure if this is ever needed */
-unsigned long qe_muram_alloc_fixed(unsigned long offset, int size)
-{
-	unsigned long start;
-	unsigned long flags;
-
-	spin_lock_irqsave(&qe_muram_lock, flags);
-	start = rh_alloc_fixed(&qe_muram_info, offset, size, "commproc");
-	spin_unlock_irqrestore(&qe_muram_lock, flags);
-
-	return start;
-}
-EXPORT_SYMBOL(qe_muram_alloc_fixed);
-
-void qe_muram_dump(void)
-{
-	rh_dump(&qe_muram_info);
-}
-EXPORT_SYMBOL(qe_muram_dump);
-
 /* The maximum number of RISCs we support */
 #define MAX_QE_RISC     2
 
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_fast.c b/arch/powerpc/sysdev/qe_lib/ucc_fast.c
index bcf88e6..559678d 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc_fast.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc_fast.c
@@ -267,7 +267,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
 
 	/* Allocate memory for Tx Virtual Fifo */
 	uccf->ucc_fast_tx_virtual_fifo_base_offset =
-	    qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
+	    cpm_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
 	if (IS_ERR_VALUE(uccf->ucc_fast_tx_virtual_fifo_base_offset)) {
 		printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO\n",
 			__func__);
@@ -278,7 +278,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
 
 	/* Allocate memory for Rx Virtual Fifo */
 	uccf->ucc_fast_rx_virtual_fifo_base_offset =
-		qe_muram_alloc(uf_info->urfs +
+		cpm_muram_alloc(uf_info->urfs +
 			   UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR,
 			   UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
 	if (IS_ERR_VALUE(uccf->ucc_fast_rx_virtual_fifo_base_offset)) {
@@ -350,10 +350,10 @@ void ucc_fast_free(struct ucc_fast_private * uccf)
 		return;
 
 	if (uccf->ucc_fast_tx_virtual_fifo_base_offset)
-		qe_muram_free(uccf->ucc_fast_tx_virtual_fifo_base_offset);
+		cpm_muram_free(uccf->ucc_fast_tx_virtual_fifo_base_offset);
 
 	if (uccf->ucc_fast_rx_virtual_fifo_base_offset)
-		qe_muram_free(uccf->ucc_fast_rx_virtual_fifo_base_offset);
+		cpm_muram_free(uccf->ucc_fast_rx_virtual_fifo_base_offset);
 
 	kfree(uccf);
 }
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_slow.c b/arch/powerpc/sysdev/qe_lib/ucc_slow.c
index a578bc7..49e6949 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc_slow.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc_slow.c
@@ -187,7 +187,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
 
 	/* Get PRAM base */
 	uccs->us_pram_offset =
-		qe_muram_alloc(UCC_SLOW_PRAM_SIZE, ALIGNMENT_OF_UCC_SLOW_PRAM);
+		cpm_muram_alloc(UCC_SLOW_PRAM_SIZE, ALIGNMENT_OF_UCC_SLOW_PRAM);
 	if (IS_ERR_VALUE(uccs->us_pram_offset)) {
 		printk(KERN_ERR "%s: cannot allocate MURAM for PRAM", __func__);
 		ucc_slow_free(uccs);
@@ -197,7 +197,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
 	qe_issue_cmd(QE_ASSIGN_PAGE_TO_DEVICE, id, us_info->protocol,
 		     uccs->us_pram_offset);
 
-	uccs->us_pram = qe_muram_addr(uccs->us_pram_offset);
+	uccs->us_pram = cpm_muram_addr(uccs->us_pram_offset);
 
 	/* Set UCC to slow type */
 	ret = ucc_set_type(us_info->ucc_num, UCC_SPEED_TYPE_SLOW);
@@ -213,7 +213,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
 
 	/* Allocate BDs. */
 	uccs->rx_base_offset =
-		qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd),
+		cpm_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd),
 				QE_ALIGNMENT_OF_BD);
 	if (IS_ERR_VALUE(uccs->rx_base_offset)) {
 		printk(KERN_ERR "%s: cannot allocate %u RX BDs\n", __func__,
@@ -224,7 +224,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
 	}
 
 	uccs->tx_base_offset =
-		qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd),
+		cpm_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd),
 			QE_ALIGNMENT_OF_BD);
 	if (IS_ERR_VALUE(uccs->tx_base_offset)) {
 		printk(KERN_ERR "%s: cannot allocate TX BDs", __func__);
@@ -234,7 +234,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
 	}
 
 	/* Init Tx bds */
-	bd = uccs->confBd = uccs->tx_bd = qe_muram_addr(uccs->tx_base_offset);
+	bd = uccs->confBd = uccs->tx_bd = cpm_muram_addr(uccs->tx_base_offset);
 	for (i = 0; i < us_info->tx_bd_ring_len - 1; i++) {
 		/* clear bd buffer */
 		out_be32(&bd->buf, 0);
@@ -247,7 +247,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
 	out_be32((u32 *) bd, cpu_to_be32(T_W));
 
 	/* Init Rx bds */
-	bd = uccs->rx_bd = qe_muram_addr(uccs->rx_base_offset);
+	bd = uccs->rx_bd = cpm_muram_addr(uccs->rx_base_offset);
 	for (i = 0; i < us_info->rx_bd_ring_len - 1; i++) {
 		/* set bd status and length */
 		out_be32((u32*)bd, 0);
@@ -362,13 +362,13 @@ void ucc_slow_free(struct ucc_slow_private * uccs)
 		return;
 
 	if (uccs->rx_base_offset)
-		qe_muram_free(uccs->rx_base_offset);
+		cpm_muram_free(uccs->rx_base_offset);
 
 	if (uccs->tx_base_offset)
-		qe_muram_free(uccs->tx_base_offset);
+		cpm_muram_free(uccs->tx_base_offset);
 
 	if (uccs->us_pram) {
-		qe_muram_free(uccs->us_pram_offset);
+		cpm_muram_free(uccs->us_pram_offset);
 		uccs->us_pram = NULL;
 	}
 
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index ed84182..ba30a25 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -299,7 +299,7 @@ static int fill_init_enet_entries(struct ucc_geth_private *ugeth,
 			init_enet_offset = 0;
 		else {
 			init_enet_offset =
-			    qe_muram_alloc(thread_size, thread_alignment);
+			    cpm_muram_alloc(thread_size, thread_alignment);
 			if (IS_ERR_VALUE(init_enet_offset)) {
 				if (netif_msg_ifup(ugeth))
 					ugeth_err("fill_init_enet_entries: Can not allocate DPRAM memory.");
@@ -338,7 +338,7 @@ static int return_init_enet_entries(struct ucc_geth_private *ugeth,
 				init_enet_offset =
 				    (in_be32(p_start) &
 				     ENET_INIT_PARAM_PTR_MASK);
-				qe_muram_free(init_enet_offset);
+				cpm_muram_free(init_enet_offset);
 			}
 			*(p_start++) = 0;	/* Just for cosmetics */
 		}
@@ -375,8 +375,8 @@ static int dump_init_enet_entries(struct ucc_geth_private *ugeth,
 				ugeth_info("Init enet entry %d:", i);
 				ugeth_info("Base address: 0x%08x",
 					   (u32)
-					   qe_muram_addr(init_enet_offset));
-				mem_disp(qe_muram_addr(init_enet_offset),
+					   cpm_muram_addr(init_enet_offset));
+				mem_disp(cpm_muram_addr(init_enet_offset),
 					 thread_size);
 			}
 			p_start++;
@@ -1085,11 +1085,11 @@ static void dump_regs(struct ucc_geth_private *ugeth)
 			ugeth_info("ucode RX Prefetched BDs:");
 			ugeth_info("Base address: 0x%08x",
 				   (u32)
-				   qe_muram_addr(in_be32
+				   cpm_muram_addr(in_be32
 						 (&ugeth->p_rx_bd_qs_tbl[i].
 						  bdbaseptr)));
 			mem_disp((u8 *)
-				 qe_muram_addr(in_be32
+				 cpm_muram_addr(in_be32
 					       (&ugeth->p_rx_bd_qs_tbl[i].
 						bdbaseptr)),
 				 sizeof(struct ucc_geth_rx_prefetched_bds));
@@ -2090,47 +2090,47 @@ static void ucc_geth_memclean(struct ucc_geth_private *ugeth)
 	}
 
 	if (ugeth->p_thread_data_tx) {
-		qe_muram_free(ugeth->thread_dat_tx_offset);
+		cpm_muram_free(ugeth->thread_dat_tx_offset);
 		ugeth->p_thread_data_tx = NULL;
 	}
 	if (ugeth->p_thread_data_rx) {
-		qe_muram_free(ugeth->thread_dat_rx_offset);
+		cpm_muram_free(ugeth->thread_dat_rx_offset);
 		ugeth->p_thread_data_rx = NULL;
 	}
 	if (ugeth->p_exf_glbl_param) {
-		qe_muram_free(ugeth->exf_glbl_param_offset);
+		cpm_muram_free(ugeth->exf_glbl_param_offset);
 		ugeth->p_exf_glbl_param = NULL;
 	}
 	if (ugeth->p_rx_glbl_pram) {
-		qe_muram_free(ugeth->rx_glbl_pram_offset);
+		cpm_muram_free(ugeth->rx_glbl_pram_offset);
 		ugeth->p_rx_glbl_pram = NULL;
 	}
 	if (ugeth->p_tx_glbl_pram) {
-		qe_muram_free(ugeth->tx_glbl_pram_offset);
+		cpm_muram_free(ugeth->tx_glbl_pram_offset);
 		ugeth->p_tx_glbl_pram = NULL;
 	}
 	if (ugeth->p_send_q_mem_reg) {
-		qe_muram_free(ugeth->send_q_mem_reg_offset);
+		cpm_muram_free(ugeth->send_q_mem_reg_offset);
 		ugeth->p_send_q_mem_reg = NULL;
 	}
 	if (ugeth->p_scheduler) {
-		qe_muram_free(ugeth->scheduler_offset);
+		cpm_muram_free(ugeth->scheduler_offset);
 		ugeth->p_scheduler = NULL;
 	}
 	if (ugeth->p_tx_fw_statistics_pram) {
-		qe_muram_free(ugeth->tx_fw_statistics_pram_offset);
+		cpm_muram_free(ugeth->tx_fw_statistics_pram_offset);
 		ugeth->p_tx_fw_statistics_pram = NULL;
 	}
 	if (ugeth->p_rx_fw_statistics_pram) {
-		qe_muram_free(ugeth->rx_fw_statistics_pram_offset);
+		cpm_muram_free(ugeth->rx_fw_statistics_pram_offset);
 		ugeth->p_rx_fw_statistics_pram = NULL;
 	}
 	if (ugeth->p_rx_irq_coalescing_tbl) {
-		qe_muram_free(ugeth->rx_irq_coalescing_tbl_offset);
+		cpm_muram_free(ugeth->rx_irq_coalescing_tbl_offset);
 		ugeth->p_rx_irq_coalescing_tbl = NULL;
 	}
 	if (ugeth->p_rx_bd_qs_tbl) {
-		qe_muram_free(ugeth->rx_bd_qs_tbl_offset);
+		cpm_muram_free(ugeth->rx_bd_qs_tbl_offset);
 		ugeth->p_rx_bd_qs_tbl = NULL;
 	}
 	if (ugeth->p_init_enet_param_shadow) {
@@ -2171,7 +2171,7 @@ static void ucc_geth_memclean(struct ucc_geth_private *ugeth)
 				kfree((void *)ugeth->tx_bd_ring_offset[i]);
 			else if (ugeth->ug_info->uf_info.bd_mem_part ==
 				 MEM_PART_MURAM)
-				qe_muram_free(ugeth->tx_bd_ring_offset[i]);
+				cpm_muram_free(ugeth->tx_bd_ring_offset[i]);
 			ugeth->p_tx_bd_ring[i] = NULL;
 		}
 	}
@@ -2201,7 +2201,7 @@ static void ucc_geth_memclean(struct ucc_geth_private *ugeth)
 				kfree((void *)ugeth->rx_bd_ring_offset[i]);
 			else if (ugeth->ug_info->uf_info.bd_mem_part ==
 				 MEM_PART_MURAM)
-				qe_muram_free(ugeth->rx_bd_ring_offset[i]);
+				cpm_muram_free(ugeth->rx_bd_ring_offset[i]);
 			ugeth->p_rx_bd_ring[i] = NULL;
 		}
 	}
@@ -2610,11 +2610,11 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 					align) & ~(align - 1));
 		} else if (uf_info->bd_mem_part == MEM_PART_MURAM) {
 			ugeth->tx_bd_ring_offset[j] =
-			    qe_muram_alloc(length,
+			    cpm_muram_alloc(length,
 					   UCC_GETH_TX_BD_RING_ALIGNMENT);
 			if (!IS_ERR_VALUE(ugeth->tx_bd_ring_offset[j]))
 				ugeth->p_tx_bd_ring[j] =
-				    (u8 *) qe_muram_addr(ugeth->
+				    (u8 *) cpm_muram_addr(ugeth->
 							 tx_bd_ring_offset[j]);
 		}
 		if (!ugeth->p_tx_bd_ring[j]) {
@@ -2646,11 +2646,11 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 					align) & ~(align - 1));
 		} else if (uf_info->bd_mem_part == MEM_PART_MURAM) {
 			ugeth->rx_bd_ring_offset[j] =
-			    qe_muram_alloc(length,
+			    cpm_muram_alloc(length,
 					   UCC_GETH_RX_BD_RING_ALIGNMENT);
 			if (!IS_ERR_VALUE(ugeth->rx_bd_ring_offset[j]))
 				ugeth->p_rx_bd_ring[j] =
-				    (u8 *) qe_muram_addr(ugeth->
+				    (u8 *) cpm_muram_addr(ugeth->
 							 rx_bd_ring_offset[j]);
 		}
 		if (!ugeth->p_rx_bd_ring[j]) {
@@ -2733,7 +2733,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	/* Tx global PRAM */
 	/* Allocate global tx parameter RAM page */
 	ugeth->tx_glbl_pram_offset =
-	    qe_muram_alloc(sizeof(struct ucc_geth_tx_global_pram),
+	    cpm_muram_alloc(sizeof(struct ucc_geth_tx_global_pram),
 			   UCC_GETH_TX_GLOBAL_PRAM_ALIGNMENT);
 	if (IS_ERR_VALUE(ugeth->tx_glbl_pram_offset)) {
 		if (netif_msg_ifup(ugeth))
@@ -2744,7 +2744,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 		return -ENOMEM;
 	}
 	ugeth->p_tx_glbl_pram =
-	    (struct ucc_geth_tx_global_pram *) qe_muram_addr(ugeth->
+	    (struct ucc_geth_tx_global_pram *) cpm_muram_addr(ugeth->
 							tx_glbl_pram_offset);
 	/* Zero out p_tx_glbl_pram */
 	memset(ugeth->p_tx_glbl_pram, 0, sizeof(struct ucc_geth_tx_global_pram));
@@ -2754,7 +2754,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	/* TQPTR */
 	/* Size varies with number of Tx threads */
 	ugeth->thread_dat_tx_offset =
-	    qe_muram_alloc(numThreadsTxNumerical *
+	    cpm_muram_alloc(numThreadsTxNumerical *
 			   sizeof(struct ucc_geth_thread_data_tx) +
 			   32 * (numThreadsTxNumerical == 1),
 			   UCC_GETH_THREAD_DATA_ALIGNMENT);
@@ -2768,7 +2768,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	}
 
 	ugeth->p_thread_data_tx =
-	    (struct ucc_geth_thread_data_tx *) qe_muram_addr(ugeth->
+	    (struct ucc_geth_thread_data_tx *) cpm_muram_addr(ugeth->
 							thread_dat_tx_offset);
 	out_be32(&ugeth->p_tx_glbl_pram->tqptr, ugeth->thread_dat_tx_offset);
 
@@ -2784,7 +2784,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	/* SQPTR */
 	/* Size varies with number of Tx queues */
 	ugeth->send_q_mem_reg_offset =
-	    qe_muram_alloc(ug_info->numQueuesTx *
+	    cpm_muram_alloc(ug_info->numQueuesTx *
 			   sizeof(struct ucc_geth_send_queue_qd),
 			   UCC_GETH_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT);
 	if (IS_ERR_VALUE(ugeth->send_q_mem_reg_offset)) {
@@ -2797,7 +2797,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	}
 
 	ugeth->p_send_q_mem_reg =
-	    (struct ucc_geth_send_queue_mem_region *) qe_muram_addr(ugeth->
+	    (struct ucc_geth_send_queue_mem_region *) cpm_muram_addr(ugeth->
 			send_q_mem_reg_offset);
 	out_be32(&ugeth->p_tx_glbl_pram->sqptr, ugeth->send_q_mem_reg_offset);
 
@@ -2829,7 +2829,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	if (ug_info->numQueuesTx > 1) {
 	/* scheduler exists only if more than 1 tx queue */
 		ugeth->scheduler_offset =
-		    qe_muram_alloc(sizeof(struct ucc_geth_scheduler),
+		    cpm_muram_alloc(sizeof(struct ucc_geth_scheduler),
 				   UCC_GETH_SCHEDULER_ALIGNMENT);
 		if (IS_ERR_VALUE(ugeth->scheduler_offset)) {
 			if (netif_msg_ifup(ugeth))
@@ -2841,7 +2841,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 		}
 
 		ugeth->p_scheduler =
-		    (struct ucc_geth_scheduler *) qe_muram_addr(ugeth->
+		    (struct ucc_geth_scheduler *) cpm_muram_addr(ugeth->
 							   scheduler_offset);
 		out_be32(&ugeth->p_tx_glbl_pram->schedulerbasepointer,
 			 ugeth->scheduler_offset);
@@ -2877,7 +2877,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	if (ug_info->
 	    statisticsMode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_TX) {
 		ugeth->tx_fw_statistics_pram_offset =
-		    qe_muram_alloc(sizeof
+		    cpm_muram_alloc(sizeof
 				   (struct ucc_geth_tx_firmware_statistics_pram),
 				   UCC_GETH_TX_STATISTICS_ALIGNMENT);
 		if (IS_ERR_VALUE(ugeth->tx_fw_statistics_pram_offset)) {
@@ -2891,7 +2891,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 		}
 		ugeth->p_tx_fw_statistics_pram =
 		    (struct ucc_geth_tx_firmware_statistics_pram *)
-		    qe_muram_addr(ugeth->tx_fw_statistics_pram_offset);
+		    cpm_muram_addr(ugeth->tx_fw_statistics_pram_offset);
 		/* Zero out p_tx_fw_statistics_pram */
 		memset(ugeth->p_tx_fw_statistics_pram,
 		       0, sizeof(struct ucc_geth_tx_firmware_statistics_pram));
@@ -2919,7 +2919,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	/* Rx global PRAM */
 	/* Allocate global rx parameter RAM page */
 	ugeth->rx_glbl_pram_offset =
-	    qe_muram_alloc(sizeof(struct ucc_geth_rx_global_pram),
+	    cpm_muram_alloc(sizeof(struct ucc_geth_rx_global_pram),
 			   UCC_GETH_RX_GLOBAL_PRAM_ALIGNMENT);
 	if (IS_ERR_VALUE(ugeth->rx_glbl_pram_offset)) {
 		if (netif_msg_ifup(ugeth))
@@ -2930,7 +2930,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 		return -ENOMEM;
 	}
 	ugeth->p_rx_glbl_pram =
-	    (struct ucc_geth_rx_global_pram *) qe_muram_addr(ugeth->
+	    (struct ucc_geth_rx_global_pram *) cpm_muram_addr(ugeth->
 							rx_glbl_pram_offset);
 	/* Zero out p_rx_glbl_pram */
 	memset(ugeth->p_rx_glbl_pram, 0, sizeof(struct ucc_geth_rx_global_pram));
@@ -2940,7 +2940,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	/* RQPTR */
 	/* Size varies with number of Rx threads */
 	ugeth->thread_dat_rx_offset =
-	    qe_muram_alloc(numThreadsRxNumerical *
+	    cpm_muram_alloc(numThreadsRxNumerical *
 			   sizeof(struct ucc_geth_thread_data_rx),
 			   UCC_GETH_THREAD_DATA_ALIGNMENT);
 	if (IS_ERR_VALUE(ugeth->thread_dat_rx_offset)) {
@@ -2953,7 +2953,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	}
 
 	ugeth->p_thread_data_rx =
-	    (struct ucc_geth_thread_data_rx *) qe_muram_addr(ugeth->
+	    (struct ucc_geth_thread_data_rx *) cpm_muram_addr(ugeth->
 							thread_dat_rx_offset);
 	out_be32(&ugeth->p_rx_glbl_pram->rqptr, ugeth->thread_dat_rx_offset);
 
@@ -2964,7 +2964,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	if (ug_info->
 	    statisticsMode & UCC_GETH_STATISTICS_GATHERING_MODE_FIRMWARE_RX) {
 		ugeth->rx_fw_statistics_pram_offset =
-		    qe_muram_alloc(sizeof
+		    cpm_muram_alloc(sizeof
 				   (struct ucc_geth_rx_firmware_statistics_pram),
 				   UCC_GETH_RX_STATISTICS_ALIGNMENT);
 		if (IS_ERR_VALUE(ugeth->rx_fw_statistics_pram_offset)) {
@@ -2977,7 +2977,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 		}
 		ugeth->p_rx_fw_statistics_pram =
 		    (struct ucc_geth_rx_firmware_statistics_pram *)
-		    qe_muram_addr(ugeth->rx_fw_statistics_pram_offset);
+		    cpm_muram_addr(ugeth->rx_fw_statistics_pram_offset);
 		/* Zero out p_rx_fw_statistics_pram */
 		memset(ugeth->p_rx_fw_statistics_pram, 0,
 		       sizeof(struct ucc_geth_rx_firmware_statistics_pram));
@@ -2987,7 +2987,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 
 	/* Size varies with number of Rx queues */
 	ugeth->rx_irq_coalescing_tbl_offset =
-	    qe_muram_alloc(ug_info->numQueuesRx *
+	    cpm_muram_alloc(ug_info->numQueuesRx *
 			   sizeof(struct ucc_geth_rx_interrupt_coalescing_entry)
 			   + 4, UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT);
 	if (IS_ERR_VALUE(ugeth->rx_irq_coalescing_tbl_offset)) {
@@ -3001,7 +3001,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 
 	ugeth->p_rx_irq_coalescing_tbl =
 	    (struct ucc_geth_rx_interrupt_coalescing_table *)
-	    qe_muram_addr(ugeth->rx_irq_coalescing_tbl_offset);
+	    cpm_muram_addr(ugeth->rx_irq_coalescing_tbl_offset);
 	out_be32(&ugeth->p_rx_glbl_pram->intcoalescingptr,
 		 ugeth->rx_irq_coalescing_tbl_offset);
 
@@ -3055,7 +3055,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	/* RBDQPTR */
 	/* Size varies with number of Rx queues */
 	ugeth->rx_bd_qs_tbl_offset =
-	    qe_muram_alloc(ug_info->numQueuesRx *
+	    cpm_muram_alloc(ug_info->numQueuesRx *
 			   (sizeof(struct ucc_geth_rx_bd_queues_entry) +
 			    sizeof(struct ucc_geth_rx_prefetched_bds)),
 			   UCC_GETH_RX_BD_QUEUES_ALIGNMENT);
@@ -3069,7 +3069,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	}
 
 	ugeth->p_rx_bd_qs_tbl =
-	    (struct ucc_geth_rx_bd_queues_entry *) qe_muram_addr(ugeth->
+	    (struct ucc_geth_rx_bd_queues_entry *) cpm_muram_addr(ugeth->
 				    rx_bd_qs_tbl_offset);
 	out_be32(&ugeth->p_rx_glbl_pram->rbdqptr, ugeth->rx_bd_qs_tbl_offset);
 	/* Zero out p_rx_bd_qs_tbl */
@@ -3148,7 +3148,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 		/* Allocate memory for extended filtering Mode Global
 		Parameters */
 		ugeth->exf_glbl_param_offset =
-		    qe_muram_alloc(sizeof(struct ucc_geth_exf_global_pram),
+		    cpm_muram_alloc(sizeof(struct ucc_geth_exf_global_pram),
 		UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT);
 		if (IS_ERR_VALUE(ugeth->exf_glbl_param_offset)) {
 			if (netif_msg_ifup(ugeth))
@@ -3160,7 +3160,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 		}
 
 		ugeth->p_exf_glbl_param =
-		    (struct ucc_geth_exf_global_pram *) qe_muram_addr(ugeth->
+		    (struct ucc_geth_exf_global_pram *) cpm_muram_addr(ugeth->
 				 exf_glbl_param_offset);
 		out_be32(&ugeth->p_rx_glbl_pram->exfGlobalParam,
 			 ugeth->exf_glbl_param_offset);
@@ -3297,7 +3297,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 	}
 
 	/* Allocate InitEnet command parameter structure */
-	init_enet_pram_offset = qe_muram_alloc(sizeof(struct ucc_geth_init_pram), 4);
+	init_enet_pram_offset = cpm_muram_alloc(sizeof(struct ucc_geth_init_pram), 4);
 	if (IS_ERR_VALUE(init_enet_pram_offset)) {
 		if (netif_msg_ifup(ugeth))
 			ugeth_err
@@ -3307,7 +3307,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 		return -ENOMEM;
 	}
 	p_init_enet_pram =
-	    (struct ucc_geth_init_pram *) qe_muram_addr(init_enet_pram_offset);
+	    (struct ucc_geth_init_pram *) cpm_muram_addr(init_enet_pram_offset);
 
 	/* Copy shadow InitEnet command parameter structure into PRAM */
 	p_init_enet_pram->resinit1 = ugeth->p_init_enet_param_shadow->resinit1;
@@ -3336,7 +3336,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
 		     init_enet_pram_offset);
 
 	/* Free InitEnet command parameter */
-	qe_muram_free(init_enet_pram_offset);
+	cpm_muram_free(init_enet_pram_offset);
 
 	return 0;
 }
diff --git a/include/asm-powerpc/cpm.h b/include/asm-powerpc/cpm.h
index ede38ff..63a5533 100644
--- a/include/asm-powerpc/cpm.h
+++ b/include/asm-powerpc/cpm.h
@@ -96,6 +96,7 @@ unsigned long cpm_muram_alloc(unsigned long size, unsigned long align);
 int cpm_muram_free(unsigned long offset);
 unsigned long cpm_muram_alloc_fixed(unsigned long offset, unsigned long size);
 void __iomem *cpm_muram_addr(unsigned long offset);
+unsigned long cpm_muram_offset(void __iomem *addr);
 dma_addr_t cpm_muram_dma(void __iomem *addr);
 int cpm_command(u32 command, u8 opcode);
 
diff --git a/include/asm-powerpc/qe.h b/include/asm-powerpc/qe.h
index c3be6e2..54864dd 100644
--- a/include/asm-powerpc/qe.h
+++ b/include/asm-powerpc/qe.h
@@ -16,6 +16,7 @@
 #define _ASM_POWERPC_QE_H
 #ifdef __KERNEL__
 
+#include <asm/cpm.h>
 #include <asm/immap_qe.h>
 
 #define QE_NUM_OF_SNUM	28
@@ -89,20 +90,6 @@ unsigned int qe_get_brg_clk(void);
 int qe_setbrg(enum qe_clock brg, unsigned int rate, unsigned int multiplier);
 int qe_get_snum(void);
 void qe_put_snum(u8 snum);
-unsigned long qe_muram_alloc(int size, int align);
-int qe_muram_free(unsigned long offset);
-unsigned long qe_muram_alloc_fixed(unsigned long offset, int size);
-void qe_muram_dump(void);
-
-static inline void __iomem *qe_muram_addr(unsigned long offset)
-{
-	return (void __iomem *)&qe_immr->muram[offset];
-}
-
-static inline unsigned long qe_muram_offset(void __iomem *addr)
-{
-	return addr - (void __iomem *)qe_immr->muram;
-}
 
 /* Structure that defines QE firmware binary files.
  *
@@ -166,20 +153,6 @@ struct qe_bd {
 #define BD_STATUS_MASK	0xffff0000
 #define BD_LENGTH_MASK	0x0000ffff
 
-#define BD_SC_EMPTY	0x8000	/* Receive is empty */
-#define BD_SC_READY	0x8000	/* Transmit is ready */
-#define BD_SC_WRAP	0x2000	/* Last buffer descriptor */
-#define BD_SC_INTRPT	0x1000	/* Interrupt on change */
-#define BD_SC_LAST	0x0800	/* Last buffer in frame */
-#define BD_SC_CM	0x0200	/* Continous mode */
-#define BD_SC_ID	0x0100	/* Rec'd too many idles */
-#define BD_SC_P		0x0100	/* xmt preamble */
-#define BD_SC_BR	0x0020	/* Break received */
-#define BD_SC_FR	0x0010	/* Framing error */
-#define BD_SC_PR	0x0008	/* Parity error */
-#define BD_SC_OV	0x0002	/* Overrun */
-#define BD_SC_CD	0x0001	/* ?? */
-
 /* Alignment */
 #define QE_INTR_TABLE_ALIGN	16	/* ??? */
 #define QE_ALIGNMENT_OF_BD	8
-- 
1.5.5

^ permalink raw reply related

* [PATCH 1/2] 86xx: mark functions static, other minor cleanups
From: Paul Gortmaker @ 2008-04-16 17:53 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <80CCBF8C-FE21-4DD7-B1CF-0647D31655D9@kernel.crashing.org>

Cleanups as suggested by Stephen Rothwell and Dale Farnsworth, which
incudes marking a bunch of functions static and add a vendor prefix to
the compat node check for uniqueness.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
 arch/powerpc/boot/dts/mpc8641_hpcn.dts     |    2 +-
 arch/powerpc/platforms/86xx/mpc8610_hpcd.c |    4 ++--
 arch/powerpc/platforms/86xx/mpc86xx_hpcn.c |    8 ++++----
 3 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 79385bc..7f9b999 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -13,7 +13,7 @@
 
 / {
 	model = "MPC8641HPCN";
-	compatible = "mpc86xx";
+	compatible = "fsl,mpc8641hpcn";
 	#address-cells = <1>;
 	#size-cells = <1>;
 
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 0b07485..18b8ebe 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -52,7 +52,7 @@ static int __init mpc8610_declare_of_platform_devices(void)
 }
 machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
 
-void __init
+static void __init
 mpc86xx_hpcd_init_irq(void)
 {
 	struct mpic *mpic1;
@@ -200,7 +200,7 @@ static int __init mpc86xx_hpcd_probe(void)
 	return 0;
 }
 
-long __init
+static long __init
 mpc86xx_time_init(void)
 {
 	unsigned int temp;
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index cfbe8c5..0764032 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -55,7 +55,7 @@ static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
 }
 #endif	/* CONFIG_PCI */
 
-void __init
+static void __init
 mpc86xx_hpcn_init_irq(void)
 {
 	struct mpic *mpic1;
@@ -162,7 +162,7 @@ mpc86xx_hpcn_setup_arch(void)
 }
 
 
-void
+static void
 mpc86xx_hpcn_show_cpuinfo(struct seq_file *m)
 {
 	struct device_node *root;
@@ -190,13 +190,13 @@ static int __init mpc86xx_hpcn_probe(void)
 {
 	unsigned long root = of_get_flat_dt_root();
 
-	if (of_flat_dt_is_compatible(root, "mpc86xx"))
+	if (of_flat_dt_is_compatible(root, "fsl,mpc8641hpcn"))
 		return 1;	/* Looks good */
 
 	return 0;
 }
 
-long __init
+static long __init
 mpc86xx_time_init(void)
 {
 	unsigned int temp;
-- 
1.5.4.3

^ permalink raw reply related

* [PATCH 2/2] mpc86xx_hpcn: Temporarily accept old dts node identifier.
From: Paul Gortmaker @ 2008-04-16 17:53 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: Paul Gortmaker
In-Reply-To: <ebd47a82600724a6a80f7fd6efacab22e778858d.1208364243.git.paul.gortmaker@windriver.com>

As suggested by Timur Tabi, we match on the old compat node ID for one
version and warn accordingly.  If we don't do this, we plunge people who
try to use an old DTB into silent boot death with no clear indication of
what the problem is.

This patch should be removed at the beginning of the 2.6.27 dev cycle.
It is only meant to ease the transition in the short term.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
---
 arch/powerpc/platforms/86xx/mpc86xx_hpcn.c |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 0764032..f947f55 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -193,6 +193,12 @@ static int __init mpc86xx_hpcn_probe(void)
 	if (of_flat_dt_is_compatible(root, "fsl,mpc8641hpcn"))
 		return 1;	/* Looks good */
 
+	/* Be nice and don't give silent boot death.  Delete this in 2.6.27 */
+	if (of_flat_dt_is_compatible(root, "mpc86xx")) {
+		pr_warning("WARNING: your dts/dtb is old. You must update before the next kernel release\n");
+		return 1;
+	}
+
 	return 0;
 }
 
-- 
1.5.4.3

^ permalink raw reply related

* Re: [RFC fs_enet: Convert MII bitbang driver to use GPIO lib
From: Laurent Pinchart @ 2008-04-16 16:09 UTC (permalink / raw)
  To: avorontsov; +Cc: linuxppc-dev, netdev
In-Reply-To: <20080416160540.GB442@polina.dev.rtsoft.ru>

[-- Attachment #1: Type: text/plain, Size: 1090 bytes --]

On Wednesday 16 April 2008 18:05, Anton Vorontsov wrote:
> On Wed, Apr 16, 2008 at 04:40:42PM +0200, Laurent Pinchart wrote:
> > This patch converts the MII bitband driver to use GPIO lib for GPIO
> > access. The driver can now handle MDC and MDIO on different GPIO banks.
> > 
> > The patch depends on Anton Vorontsov GPIO lib support scheduled for
> > 2.6.26. It is by no means complete, I just would like to get some feedback
> > on the approach. I'll resubmit it when the CPM2 GPIO support patches will
> > be available in the powerpc git tree.
> 
> Cool! By the way, maybe it is worth splitting it into completely separate
> driver, e.g. net/mdio_gpio.c?

Splitting it into a completely separate driver makes sense.

> Plus, keep in mind that somebody will eventually want this cool stuff with
> platform_device bindings in addition. :-) 

I'm sure that person will be happy to implement platform_device bindings :-)

-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]

^ permalink raw reply

* Re: [RFC fs_enet: Convert MII bitbang driver to use GPIO lib
From: Anton Vorontsov @ 2008-04-16 16:05 UTC (permalink / raw)
  To: Laurent Pinchart; +Cc: linuxppc-dev, netdev
In-Reply-To: <200804161640.42693.laurentp@cse-semaphore.com>

On Wed, Apr 16, 2008 at 04:40:42PM +0200, Laurent Pinchart wrote:
> This patch converts the MII bitband driver to use GPIO lib for GPIO access.
> The driver can now handle MDC and MDIO on different GPIO banks.
> 
> The patch depends on Anton Vorontsov GPIO lib support scheduled for 2.6.26.
> It is by no means complete, I just would like to get some feedback on the
> approach. I'll resubmit it when the CPM2 GPIO support patches will be
> available in the powerpc git tree.

Cool! By the way, maybe it is worth splitting it into completely separate
driver, e.g. net/mdio_gpio.c? Plus, keep in mind that somebody will
eventually want this cool stuff with platform_device bindings in addition. :-)

-- 
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2

^ permalink raw reply

* [RFC fs_enet: Convert MII bitbang driver to use GPIO lib
From: Laurent Pinchart @ 2008-04-16 14:40 UTC (permalink / raw)
  To: linuxppc-dev, netdev

This patch converts the MII bitband driver to use GPIO lib for GPIO access.
The driver can now handle MDC and MDIO on different GPIO banks.

The patch depends on Anton Vorontsov GPIO lib support scheduled for 2.6.26.
It is by no means complete, I just would like to get some feedback on the
approach. I'll resubmit it when the CPM2 GPIO support patches will be
available in the powerpc git tree.

---
 Documentation/powerpc/booting-without-of.txt |   10 +-
 arch/powerpc/boot/dts/mpc8272ads.dts         |   16 ++-
 arch/powerpc/boot/dts/pq2fads.dts            |   16 ++-
 drivers/net/fs_enet/fs_enet-main.c           |   10 +-
 drivers/net/fs_enet/mii-bitbang.c            |  177 ++++++++++++++------------
 5 files changed, 127 insertions(+), 102 deletions(-)

diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 012f231..6f16c2d 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2030,21 +2030,19 @@ platforms are moved over to use the flattened-device-tree model.
    fsl,cpm2-mdio-bitbang (reg is port C registers)
 
    Properties for fsl,cpm2-mdio-bitbang:
-   fsl,mdio-pin : pin of port C controlling mdio data
-   fsl,mdc-pin : pin of port C controlling mdio clock
+   gpios : GPIOs controlling mdio clock and mdio data (in that order).
 
    Example:
 
-	mdio@10d40 {
+	mdio {
 		device_type = "mdio";
 		compatible = "fsl,mpc8272ads-mdio-bitbang",
 		             "fsl,mpc8272-mdio-bitbang",
 		             "fsl,cpm2-mdio-bitbang";
-		reg = <10d40 14>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-		fsl,mdio-pin = <12>;
-		fsl,mdc-pin = <13>;
+		gpios = <&cpm_pio_c 13 0
+			 &cpm_pio_c 12 0>;
 	};
 
    v) Baud Rate Generators
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 7285ca1..bfe359f 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -164,16 +164,24 @@
 				fsl,cpm-command = <0ce00000>;
 			};
 
-			mdio@10d40 {
+			cpm_pio_c: gpio_controller@10d40 {
+				compatible = "fsl,cpm2-pario-bank-c",
+					     "fsl,cpm2-pario-bank";
+				reg = <0x10d40 0x18>;
+				#gpio-cells = <2>;
+				gpio-controller;
+			};
+
+			mdio {
 				device_type = "mdio";
 				compatible = "fsl,mpc8272ads-mdio-bitbang",
 				             "fsl,mpc8272-mdio-bitbang",
 				             "fsl,cpm2-mdio-bitbang";
-				reg = <10d40 14>;
 				#address-cells = <1>;
 				#size-cells = <0>;
-				fsl,mdio-pin = <12>;
-				fsl,mdc-pin = <13>;
+				gpios = <&cpm_pio_c 13 0	/* MDC */
+					 &cpm_pio_c 12 0	/* MDIO */
+					>;
 
 				PHY0: ethernet-phy@0 {
 					interrupt-parent = <&PIC>;
diff --git a/arch/powerpc/boot/dts/pq2fads.dts b/arch/powerpc/boot/dts/pq2fads.dts
index 2d56492..5c32d42 100644
--- a/arch/powerpc/boot/dts/pq2fads.dts
+++ b/arch/powerpc/boot/dts/pq2fads.dts
@@ -187,16 +187,24 @@
 				local-mac-address = [00 e0 0c 00 79 01];
 			};
 
-			mdio@10d40 {
+			cpm_pio_c: gpio_controller@10d40 {
+				compatible = "fsl,cpm2-pario-bank-c",
+					     "fsl,cpm2-pario-bank";
+				reg = <0x10d40 0x18>;
+				#gpio-cells = <2>;
+				gpio-controller;
+			};
+
+			mdio {
 				device_type = "mdio";
 				compatible = "fsl,pq2fads-mdio-bitbang",
 				             "fsl,mpc8280-mdio-bitbang",
 				             "fsl,cpm2-mdio-bitbang";
 				#address-cells = <1>;
 				#size-cells = <0>;
-				reg = <10d40 14>;
-				fsl,mdio-pin = <9>;
-				fsl,mdc-pin = <a>;
+				gpios = <&cpm_pio_c a 0		/* MDC */
+					 &cpm_pio_c 9 0		/* MDIO */
+					>;
 
 				PHY0: ethernet-phy@0 {
 					interrupt-parent = <&PIC>;
diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index 940e204..90df285 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -43,6 +43,7 @@
 #include <asm/uaccess.h>
 
 #ifdef CONFIG_PPC_CPM_NEW_BINDING
+#include <linux/of_gpio.h>
 #include <asm/of_platform.h>
 #endif
 
@@ -1172,8 +1173,7 @@ static int __devinit find_phy(struct device_node *np,
                               struct fs_platform_info *fpi)
 {
 	struct device_node *phynode, *mdionode;
-	struct resource res;
-	int ret = 0, len;
+	int ret = 0, len, gpio;
 	const u32 *data;
 
 	data  = of_get_property(np, "fixed-link", NULL);
@@ -1194,15 +1194,15 @@ static int __devinit find_phy(struct device_node *np,
 	if (!mdionode)
 		goto out_put_phy;
 
-	ret = of_address_to_resource(mdionode, 0, &res);
-	if (ret)
+	gpio = of_get_gpio(mdionode, 0);
+	if (gpio < 0)
 		goto out_put_mdio;
 
 	data = of_get_property(phynode, "reg", &len);
 	if (!data || len != 4)
 		goto out_put_mdio;
 
-	snprintf(fpi->bus_id, 16, PHY_ID_FMT, res.start, *data);
+	snprintf(fpi->bus_id, 16, PHY_ID_FMT, gpio, *data);
 
 out_put_mdio:
 	of_node_put(mdionode);
diff --git a/drivers/net/fs_enet/mii-bitbang.c b/drivers/net/fs_enet/mii-bitbang.c
index ef351f2..9ccbbc8 100644
--- a/drivers/net/fs_enet/mii-bitbang.c
+++ b/drivers/net/fs_enet/mii-bitbang.c
@@ -29,78 +29,38 @@
 
 #include "fs_enet.h"
 
+#ifdef CONFIG_PPC_CPM_NEW_BINDING
 struct bb_info {
 	struct mdiobb_ctrl ctrl;
-	__be32 __iomem *mdc_dat;
-	__be32 __iomem *mdio_dir;
-	__be32 __iomem *mdio_dat;
-	u32 mdio_msk;
-	u32 mdc_msk;
+	int mdc, mdio;
 };
 
-/* FIXME: If any other users of GPIO crop up, then these will have to
- * have some sort of global synchronization to avoid races with other
- * pins on the same port.  The ideal solution would probably be to
- * bind the ports to a GPIO driver, and have this be a client of it.
- */
-static inline void bb_set(u32 __iomem *p, u32 m)
-{
-	out_be32(p, in_be32(p) | m);
-}
-
-static inline void bb_clr(u32 __iomem *p, u32 m)
-{
-	out_be32(p, in_be32(p) & ~m);
-}
-
-static inline int bb_read(u32 __iomem *p, u32 m)
-{
-	return (in_be32(p) & m) != 0;
-}
-
 static inline void mdio_dir(struct mdiobb_ctrl *ctrl, int dir)
 {
 	struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl);
 
 	if (dir)
-		bb_set(bitbang->mdio_dir, bitbang->mdio_msk);
+		gpio_direction_output(bitbang->mdio, 1);
 	else
-		bb_clr(bitbang->mdio_dir, bitbang->mdio_msk);
-
-	/* Read back to flush the write. */
-	in_be32(bitbang->mdio_dir);
+		gpio_direction_input(bitbang->mdio);
 }
 
 static inline int mdio_read(struct mdiobb_ctrl *ctrl)
 {
 	struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl);
-	return bb_read(bitbang->mdio_dat, bitbang->mdio_msk);
+	return gpio_get_value(bitbang->mdio);
 }
 
 static inline void mdio(struct mdiobb_ctrl *ctrl, int what)
 {
 	struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl);
-
-	if (what)
-		bb_set(bitbang->mdio_dat, bitbang->mdio_msk);
-	else
-		bb_clr(bitbang->mdio_dat, bitbang->mdio_msk);
-
-	/* Read back to flush the write. */
-	in_be32(bitbang->mdio_dat);
+	gpio_set_value(bitbang->mdio, what);
 }
 
 static inline void mdc(struct mdiobb_ctrl *ctrl, int what)
 {
 	struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl);
-
-	if (what)
-		bb_set(bitbang->mdc_dat, bitbang->mdc_msk);
-	else
-		bb_clr(bitbang->mdc_dat, bitbang->mdc_msk);
-
-	/* Read back to flush the write. */
-	in_be32(bitbang->mdc_dat);
+	gpio_set_value(bitbang->mdc, what);
 }
 
 static struct mdiobb_ops bb_ops = {
@@ -111,46 +71,18 @@ static struct mdiobb_ops bb_ops = {
 	.get_mdio_data = mdio_read,
 };
 
-#ifdef CONFIG_PPC_CPM_NEW_BINDING
 static int __devinit fs_mii_bitbang_init(struct mii_bus *bus,
                                          struct device_node *np)
 {
-	struct resource res;
-	const u32 *data;
-	int mdio_pin, mdc_pin, len;
 	struct bb_info *bitbang = bus->priv;
 
-	int ret = of_address_to_resource(np, 0, &res);
-	if (ret)
-		return ret;
-
-	if (res.end - res.start < 13)
-		return -ENODEV;
-
-	/* This should really encode the pin number as well, but all
-	 * we get is an int, and the odds of multiple bitbang mdio buses
-	 * is low enough that it's not worth going too crazy.
-	 */
-	bus->id = res.start;
+	bitbang->mdc = of_get_gpio(np, 0);
+	bitbang->mdio = of_get_gpio(np, 1);
 
-	data = of_get_property(np, "fsl,mdio-pin", &len);
-	if (!data || len != 4)
+	if (bitbang->mdc < 0 || bitbang->mdio < 0)
 		return -ENODEV;
-	mdio_pin = *data;
-
-	data = of_get_property(np, "fsl,mdc-pin", &len);
-	if (!data || len != 4)
-		return -ENODEV;
-	mdc_pin = *data;
-
-	bitbang->mdio_dir = ioremap(res.start, res.end - res.start + 1);
-	if (!bitbang->mdio_dir)
-		return -ENOMEM;
-
-	bitbang->mdio_dat = bitbang->mdio_dir + 4;
-	bitbang->mdio_msk = 1 << (31 - mdio_pin);
-	bitbang->mdc_msk = 1 << (31 - mdc_pin);
 
+	bus->id = bitbang->mdc;
 	return 0;
 }
 
@@ -199,7 +131,7 @@ static int __devinit fs_enet_mdio_probe(struct of_device *ofdev,
 	new_bus->phy_mask = ~0;
 	new_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
 	if (!new_bus->irq)
-		goto out_unmap_regs;
+		goto out_free_bus;
 
 	for (i = 0; i < PHY_MAX_ADDR; i++)
 		new_bus->irq[i] = -1;
@@ -220,8 +152,6 @@ static int __devinit fs_enet_mdio_probe(struct of_device *ofdev,
 out_free_irqs:
 	dev_set_drvdata(&ofdev->dev, NULL);
 	kfree(new_bus->irq);
-out_unmap_regs:
-	iounmap(bitbang->mdio_dir);
 out_free_bus:
 	kfree(new_bus);
 out_free_priv:
@@ -239,7 +169,6 @@ static int fs_enet_mdio_remove(struct of_device *ofdev)
 	free_mdio_bitbang(bus);
 	dev_set_drvdata(&ofdev->dev, NULL);
 	kfree(bus->irq);
-	iounmap(bitbang->mdio_dir);
 	kfree(bitbang);
 	kfree(bus);
 
@@ -273,6 +202,88 @@ static void fs_enet_mdio_bb_exit(void)
 module_init(fs_enet_mdio_bb_init);
 module_exit(fs_enet_mdio_bb_exit);
 #else
+struct bb_info {
+	struct mdiobb_ctrl ctrl;
+	__be32 __iomem *mdc_dat;
+	__be32 __iomem *mdio_dir;
+	__be32 __iomem *mdio_dat;
+	u32 mdio_msk;
+	u32 mdc_msk;
+};
+
+/* FIXME: If any other users of GPIO crop up, then these will have to
+ * have some sort of global synchronization to avoid races with other
+ * pins on the same port.  The ideal solution would probably be to
+ * bind the ports to a GPIO driver, and have this be a client of it.
+ */
+static inline void bb_set(u32 __iomem *p, u32 m)
+{
+	out_be32(p, in_be32(p) | m);
+}
+
+static inline void bb_clr(u32 __iomem *p, u32 m)
+{
+	out_be32(p, in_be32(p) & ~m);
+}
+
+static inline int bb_read(u32 __iomem *p, u32 m)
+{
+	return (in_be32(p) & m) != 0;
+}
+
+static inline void mdio_dir(struct mdiobb_ctrl *ctrl, int dir)
+{
+	struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl);
+
+	if (dir)
+		bb_set(bitbang->mdio_dir, bitbang->mdio_msk);
+	else
+		bb_clr(bitbang->mdio_dir, bitbang->mdio_msk);
+
+	/* Read back to flush the write. */
+	in_be32(bitbang->mdio_dir);
+}
+
+static inline int mdio_read(struct mdiobb_ctrl *ctrl)
+{
+	struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl);
+	return bb_read(bitbang->mdio_dat, bitbang->mdio_msk);
+}
+
+static inline void mdio(struct mdiobb_ctrl *ctrl, int what)
+{
+	struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl);
+
+	if (what)
+		bb_set(bitbang->mdio_dat, bitbang->mdio_msk);
+	else
+		bb_clr(bitbang->mdio_dat, bitbang->mdio_msk);
+
+	/* Read back to flush the write. */
+	in_be32(bitbang->mdio_dat);
+}
+
+static inline void mdc(struct mdiobb_ctrl *ctrl, int what)
+{
+	struct bb_info *bitbang = container_of(ctrl, struct bb_info, ctrl);
+
+	if (what)
+		bb_set(bitbang->mdc_dat, bitbang->mdc_msk);
+	else
+		bb_clr(bitbang->mdc_dat, bitbang->mdc_msk);
+
+	/* Read back to flush the write. */
+	in_be32(bitbang->mdc_dat);
+}
+
+static struct mdiobb_ops bb_ops = {
+	.owner = THIS_MODULE,
+	.set_mdc = mdc,
+	.set_mdio_dir = mdio_dir,
+	.set_mdio_data = mdio,
+	.get_mdio_data = mdio_read,
+};
+
 static int __devinit fs_mii_bitbang_init(struct bb_info *bitbang,
                                          struct fs_mii_bb_platform_info *fmpi)
 {
-- 
1.5.0


-- 
Laurent Pinchart
CSE Semaphore Belgium

Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium

T +32 (2) 387 42 59
F +32 (2) 387 42 75

^ permalink raw reply related

* EP852
From: nikam_research @ 2008-04-16 13:59 UTC (permalink / raw)
  To: linuxppc-dev

[-- Attachment #1: Type: text/html, Size: 1150 bytes --]

^ permalink raw reply

* Re: Please pull 'for-2.6.26' branch of 4xx tree
From: Josh Boyer @ 2008-04-16 14:02 UTC (permalink / raw)
  To: benh; +Cc: linuxppc-dev, paulus
In-Reply-To: <1208354567.6958.289.camel@pasglop>

On Thu, 17 Apr 2008 00:02:47 +1000
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:

> 
> On Wed, 2008-04-16 at 08:43 -0500, Josh Boyer wrote:
> > 
> > For a final solution, we're going to have to come up with a more
> > clever
> > way of doing the clocking stuff in ibm_newemac.  The SDRs are board
> > specific and completely outside of EMAC/MAL itself.  So doing a
> > dcr_map
> 
> Not board specific... chip specific.

Yes, right.  Sorry.

> > on it becomes a bit more difficult, since there really isn't an SDR
> > node in the device tree at the moment.
> 
> That is why I tried hard to avoid the bloody workarounds...
> unfortunatly, the HW is crap enough that we have no real choice here.

Right.

josh

^ permalink raw reply

* Re: Please pull 'for-2.6.26' branch of 4xx tree
From: Benjamin Herrenschmidt @ 2008-04-16 14:02 UTC (permalink / raw)
  To: Josh Boyer; +Cc: linuxppc-dev, paulus
In-Reply-To: <20080416084349.3c9997f1@zod.rchland.ibm.com>


On Wed, 2008-04-16 at 08:43 -0500, Josh Boyer wrote:
> 
> For a final solution, we're going to have to come up with a more
> clever
> way of doing the clocking stuff in ibm_newemac.  The SDRs are board
> specific and completely outside of EMAC/MAL itself.  So doing a
> dcr_map

Not board specific... chip specific.

> on it becomes a bit more difficult, since there really isn't an SDR
> node in the device tree at the moment.

That is why I tried hard to avoid the bloody workarounds...
unfortunatly, the HW is crap enough that we have no real choice here.

Ben.
 

^ permalink raw reply

* Re: [PATCH] fsl_soc: Factor fsl_get_sys_freq() out of the wdt and spi inits.
From: Anton Vorontsov @ 2008-04-16 14:02 UTC (permalink / raw)
  To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <48051FBA.1000801@freescale.com>

On Tue, Apr 15, 2008 at 04:35:54PM -0500, Scott Wood wrote:
> Anton Vorontsov wrote:
>>> +u32 fsl_get_sys_freq(void)
>>> +{
>>> +	struct device_node *soc;
>>> +	const u32 *prop;
>>> +	int size;
>>> +
>>> +	if (sysfreq != -1)
>>> +		return sysfreq;
>>> +
>>> +	soc = of_find_node_by_type(NULL, "soc");
>>> +	if (!soc)
>>> +		return -1;
>>
>> Um.. can we finally decide on compatible for the soc nodes,
>> and add there compatible matching from the start?
>
> This is just a code reorganization; any change in what we match on  
> should be a separate patch.

Yes, it makes sense of course. Just wanted to get rid of the device_type
asap, because I'm going to submit mpc836x_rdk board, and I'd preferred to
submit it w/o device_type = "soc"... Oh well, ok.. later.

-- 
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2

^ permalink raw reply

* Re: More patches pushed to powerpc.git master and powerpc-next branches
From: Josh Boyer @ 2008-04-16 13:57 UTC (permalink / raw)
  To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <18437.62522.276473.12143@cargo.ozlabs.ibm.com>

On Wed, 16 Apr 2008 22:42:34 +1000
Paul Mackerras <paulus@samba.org> wrote:

> I wrote:
> 
> > The following commits are now in the master and powerpc-next branches
> > in the powerpc.git tree.  This includes commits pulled from Josh
> > Boyer's and Olof Johansson's trees.
> 
> Because of a problem caused by a couple of commits in Josh Boyer's
> tree, I have forced the master and powerpc-next branches back to where
> they were until an hour or so ago.  Hopefully no-one has done a pull
> in that time; if anyone has then they will need to do a git pull -f
> when I eventually push the commits out (since they will have different
> IDs).

My "next" and "for-2.6.26" branches are reset and the offending patches
have been dropped.  My apologies for all the trouble.

josh

^ permalink raw reply

* Re: More patches pushed to powerpc.git master and powerpc-next branches
From: Josh Boyer @ 2008-04-16 13:52 UTC (permalink / raw)
  To: benh; +Cc: Stephen Rothwell, Paul, Mackerras, linuxppc-dev
In-Reply-To: <1208350168.6958.281.camel@pasglop>

On Wed, 16 Apr 2008 22:49:28 +1000
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:

> 
> On Wed, 2008-04-16 at 22:45 +1000, Stephen Rothwell wrote:
> > On Wed, 16 Apr 2008 22:32:46 +1000 Paul Mackerras <paulus@samba.org> wrote:
> > >
> > >       [POWERPC] ibm_newemac: PowerPC 440GX EMAC PHY clock workaround
> > >       [POWERPC] ibm_newemac: PowerPC 440EP/440GR EMAC PHY clock workaround
> > 
> > So close :-)
> 
> The workaround for those is actually subtely different :-0

He meant that they're broken.  See the other threads.

josh

^ permalink raw reply

* Re: Please pull 'for-2.6.26' branch of 4xx tree
From: Josh Boyer @ 2008-04-16 13:43 UTC (permalink / raw)
  To: benh; +Cc: linuxppc-dev, paulus
In-Reply-To: <1208350247.6958.283.camel@pasglop>

On Wed, 16 Apr 2008 22:50:47 +1000
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:

> 
> On Wed, 2008-04-16 at 07:31 -0500, Josh Boyer wrote:
> > On Wed, 16 Apr 2008 07:27:58 -0500
> > Josh Boyer <jwboyer@linux.vnet.ibm.com> wrote:
> > 
> > > On Tue, 15 Apr 2008 10:27:04 -0500
> > > Josh Boyer <jwboyer@linux.vnet.ibm.com> wrote:
> > > 
> > > > Valentine Barshak (2):
> > > >       [POWERPC] ibm_newemac: PowerPC 440GX EMAC PHY clock workaround
> > > >       [POWERPC] ibm_newemac: PowerPC 440EP/440GR EMAC PHY clock workaround
> > > 
> > > These two commits have been dropped from the branch.  They cause the
> > > allyesconfig build for powerpc to fail because CONFIG_PPC_DCR_MMIO
> > > doesn't understand the dcri_clrset macro.
> > 
> > Crap.  Looks like you already pulled the tree.  We need to either
> > revert those two commits, or essentially define dcri_clrset to a do {}
> > while(0) in include/asm-powerpc/dcr-mmio.h so things build.
> 
> Why ? It should do the right thing, not nop ...

"... so things build."  Relax Ben.  That isn't a final solution.

I'd rather just do an outright revert of the commits for now.

For a final solution, we're going to have to come up with a more clever
way of doing the clocking stuff in ibm_newemac.  The SDRs are board
specific and completely outside of EMAC/MAL itself.  So doing a dcr_map
on it becomes a bit more difficult, since there really isn't an SDR
node in the device tree at the moment.

josh

^ permalink raw reply

* Re: linux-next: 4xx build failure
From: Josh Boyer @ 2008-04-16 13:36 UTC (permalink / raw)
  To: benh; +Cc: Stephen Rothwell, linux-next, ppc-dev
In-Reply-To: <1208350282.6958.285.camel@pasglop>

On Wed, 16 Apr 2008 22:51:22 +1000
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:

> 
> > Grr.  Yes, that's probably the right solution for now.  I had forgotten
> > about Axon.
> > 
> > Sorry for the trouble.  I'll revert those commits locally and repush.
> 
> MMIO is not only Axon.. .some Xilinx stuff too. We should have a proper

Yes.  But Axon is the only one in-tree that uses it at the moment.

> implementation of the dcri stuff for MMIO.

Yes, of course.  Though neither you or I thought of that when we acked
the patch :).

josh

^ permalink raw reply

* Re: [PATCH v2.6.26 0/2] Dynamic TBIPA for gianfar
From: Kumar Gala @ 2008-04-16 13:31 UTC (permalink / raw)
  To: Paul Gortmaker; +Cc: linuxppc-dev@ozlabs.org list, Paul Mackerras, netdev
In-Reply-To: <4805FBD2.6010101@windriver.com>


On Apr 16, 2008, at 8:14 AM, Paul Gortmaker wrote:
> Kumar Gala wrote:
>>
>> On Apr 15, 2008, at 8:57 PM, Paul Gortmaker wrote:
>>> On Tue, Apr 15, 2008 at 8:25 PM, Paul Mackerras <paulus@samba.org>  
>>> wrote:
>>>> Paul Gortmaker writes:
>>>>
>>>>> This is the resend of the two patches as per Andy's request for  
>>>>> v2.6.26
>>>>> that allow boards with a PHY at the end of the bus to function,  
>>>>> by having
>>>>> the TBIPA set dynamically.  The 1st patch factors out some of  
>>>>> the PHY
>>>>> probe code so it can be recycled by the TBIPA probe, and the  
>>>>> second patch
>>>>> implements the dynamic probe itself.
>>>>
>>>> I notice that these two patches only touch drivers/net and
>>>> include/linux.  If you want these to go upstream into Linus'  
>>>> tree, you
>>>> will need to send them to Jeff Garzik and the netdev list.  Posting
>>>> them to the linuxppc-dev list is fine for getting them reviewed but
>>>> isn't a path to upstream.
>>>
>>> Yep, they have already been sent to Jeff/netdev earlier today as  
>>> well.
>>> I'd inadvertently left them off the CC but Andy reminded me already.
>>>
>>> Thanks,
>>> Paul.
>>
>> these should get an Ack by Andy before going in to any tree.
>
> Andy has already done that, so I think we should be good to go.
>
> http://ozlabs.org/pipermail/linuxppc-dev/2008-April/054572.html

Cool.  I'm guessing these will go via jeff's tree for 2.6.26?

- k

^ permalink raw reply

* [PATCH] [POWERPC] Remove unused machine call outs
From: Kumar Gala @ 2008-04-16 13:19 UTC (permalink / raw)
  To: Paul Mackerras; +Cc: linuxppc-dev

When we moved to arch/powerpc we actively tried to avoid using the
ppc_md.setup_io_mappings().  Currently no board ports use it so lets
remove it to avoid any new boards using it.

Also, remove early_serial_map() since we don't even have a call out for
it in arch/powerpc.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 arch/powerpc/mm/init_32.c     |    2 --
 include/asm-powerpc/machdep.h |    3 ---
 2 files changed, 0 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 0c66a9f..5316cbc 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -184,8 +184,6 @@ void __init MMU_init(void)
 	/* Map in I/O resources */
 	if (ppc_md.progress)
 		ppc_md.progress("MMU:setio", 0x302);
-	if (ppc_md.setup_io_mappings)
-		ppc_md.setup_io_mappings();

 	/* Initialize the context management stuff */
 	mmu_context_init();
diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h
index b95386a..54ed64d 100644
--- a/include/asm-powerpc/machdep.h
+++ b/include/asm-powerpc/machdep.h
@@ -198,9 +198,6 @@ struct machdep_calls {
 	   May be NULL. */
 	void		(*init)(void);

-	void		(*setup_io_mappings)(void);
-
-	void		(*early_serial_map)(void);
 	void		(*kgdb_map_scc)(void);

 	/*
-- 
1.5.4.1

^ permalink raw reply related

* RE: XLlTemac  soft lockup BUG
From: Hugo Villeneuve @ 2008-04-16 13:19 UTC (permalink / raw)
  To: linuxppc-embedded
In-Reply-To: <16711066.post@talk.nabble.com>

linuxppc-embedded-bounces+hugo.villeneuve=3Dlyrtech.com@ozlabs.org =
wrote:
> Hi all,
>=20
> I am trying to switch my design from the PLB Temac to the local link
> temac, and i have a problem when trying to run ifconfig in my init
> script.  It gives me a BUG: soft lockup - CPU#0 stuck for 11s!
> [ifconfig:208] Here is the rest of the dump, thanks for your help in
> advance. [  233.114960] eth0: XLlTemac: Options: 0x3fa  =20
>=20
> [  233.118449] eth0: XLlTemac: allocating interrupt 8 for fifo mode.
>=20
> [  237.135029] eth0: XLlTemac: We renegotiated the speed to: 100
>=20
> [  237.150339] eth0: XLlTemac: speed set to 100Mb/s
>=20
> [  244.792140] BUG: soft lockup - CPU#0 stuck for 11s! [ifconfig:204]

Hi,
we had a similar error message, which was caused by us selecting the =
wrong PHY type in the kernel configuration menu (latest =
linux-2.6-xlnx-git tree). In fact, we had to modify the lltemac driver =
to support our PHY (BCM5466). Once we did that, the error message went =
away.

Hugo V.


Hugo Villeneuve
Hardware developer | Concepteur mat=E9riel
Lyrtech
Phone/T=E9l. : (1) (418) 877-4644 #2395
Toll-free/Sans frais - Canada & USA : (1) (888) 922-4644 #2395
Fax/T=E9l=E9c. : (1) (418) 877-7710
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^ permalink raw reply

* Re: [PATCH v2.6.26 0/2] Dynamic TBIPA for gianfar
From: Paul Gortmaker @ 2008-04-16 13:14 UTC (permalink / raw)
  To: Kumar Gala; +Cc: linuxppc-dev@ozlabs.org list, Paul Mackerras, netdev
In-Reply-To: <6C6E8854-3F7A-4661-A5F3-B7CA8676A11A@kernel.crashing.org>

Kumar Gala wrote:
>
> On Apr 15, 2008, at 8:57 PM, Paul Gortmaker wrote:
>> On Tue, Apr 15, 2008 at 8:25 PM, Paul Mackerras <paulus@samba.org> 
>> wrote:
>>> Paul Gortmaker writes:
>>>
>>>> This is the resend of the two patches as per Andy's request for 
>>>> v2.6.26
>>>> that allow boards with a PHY at the end of the bus to function, by 
>>>> having
>>>> the TBIPA set dynamically.  The 1st patch factors out some of the PHY
>>>> probe code so it can be recycled by the TBIPA probe, and the second 
>>>> patch
>>>> implements the dynamic probe itself.
>>>
>>> I notice that these two patches only touch drivers/net and
>>> include/linux.  If you want these to go upstream into Linus' tree, you
>>> will need to send them to Jeff Garzik and the netdev list.  Posting
>>> them to the linuxppc-dev list is fine for getting them reviewed but
>>> isn't a path to upstream.
>>
>> Yep, they have already been sent to Jeff/netdev earlier today as well.
>> I'd inadvertently left them off the CC but Andy reminded me already.
>>
>> Thanks,
>> Paul.
>
> these should get an Ack by Andy before going in to any tree.

Andy has already done that, so I think we should be good to go.

http://ozlabs.org/pipermail/linuxppc-dev/2008-April/054572.html

Paul.

>
> - k

^ permalink raw reply

* Re: linux-next: 4xx build failure
From: Benjamin Herrenschmidt @ 2008-04-16 12:51 UTC (permalink / raw)
  To: Josh Boyer; +Cc: Stephen Rothwell, linux-next, ppc-dev
In-Reply-To: <20080416072453.59858204@zod.rchland.ibm.com>


> Grr.  Yes, that's probably the right solution for now.  I had forgotten
> about Axon.
> 
> Sorry for the trouble.  I'll revert those commits locally and repush.

MMIO is not only Axon.. .some Xilinx stuff too. We should have a proper
implementation of the dcri stuff for MMIO.

Ben.

^ permalink raw reply

* Re: Please pull 'for-2.6.26' branch of 4xx tree
From: Benjamin Herrenschmidt @ 2008-04-16 12:50 UTC (permalink / raw)
  To: Josh Boyer; +Cc: linuxppc-dev, paulus
In-Reply-To: <20080416073139.7f56e72c@zod.rchland.ibm.com>


On Wed, 2008-04-16 at 07:31 -0500, Josh Boyer wrote:
> On Wed, 16 Apr 2008 07:27:58 -0500
> Josh Boyer <jwboyer@linux.vnet.ibm.com> wrote:
> 
> > On Tue, 15 Apr 2008 10:27:04 -0500
> > Josh Boyer <jwboyer@linux.vnet.ibm.com> wrote:
> > 
> > > Valentine Barshak (2):
> > >       [POWERPC] ibm_newemac: PowerPC 440GX EMAC PHY clock workaround
> > >       [POWERPC] ibm_newemac: PowerPC 440EP/440GR EMAC PHY clock workaround
> > 
> > These two commits have been dropped from the branch.  They cause the
> > allyesconfig build for powerpc to fail because CONFIG_PPC_DCR_MMIO
> > doesn't understand the dcri_clrset macro.
> 
> Crap.  Looks like you already pulled the tree.  We need to either
> revert those two commits, or essentially define dcri_clrset to a do {}
> while(0) in include/asm-powerpc/dcr-mmio.h so things build.

Why ? It should do the right thing, not nop ...

Ben.

^ permalink raw reply

* Re: More patches pushed to powerpc.git master and powerpc-next branches
From: Benjamin Herrenschmidt @ 2008-04-16 12:49 UTC (permalink / raw)
  To: Stephen Rothwell; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <20080416224510.85e9dace.sfr@canb.auug.org.au>


On Wed, 2008-04-16 at 22:45 +1000, Stephen Rothwell wrote:
> On Wed, 16 Apr 2008 22:32:46 +1000 Paul Mackerras <paulus@samba.org> wrote:
> >
> >       [POWERPC] ibm_newemac: PowerPC 440GX EMAC PHY clock workaround
> >       [POWERPC] ibm_newemac: PowerPC 440EP/440GR EMAC PHY clock workaround
> 
> So close :-)

The workaround for those is actually subtely different :-0

Ben.

^ permalink raw reply

* Re: More patches pushed to powerpc.git master and powerpc-next branches
From: Stephen Rothwell @ 2008-04-16 12:45 UTC (permalink / raw)
  To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <18437.61934.495516.351438@cargo.ozlabs.ibm.com>

[-- Attachment #1: Type: text/plain, Size: 355 bytes --]

On Wed, 16 Apr 2008 22:32:46 +1000 Paul Mackerras <paulus@samba.org> wrote:
>
>       [POWERPC] ibm_newemac: PowerPC 440GX EMAC PHY clock workaround
>       [POWERPC] ibm_newemac: PowerPC 440EP/440GR EMAC PHY clock workaround

So close :-)

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/

[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]

^ permalink raw reply

* Re: More patches pushed to powerpc.git master and powerpc-next branches
From: Paul Mackerras @ 2008-04-16 12:42 UTC (permalink / raw)
  To: linuxppc-dev
In-Reply-To: <18437.61934.495516.351438@cargo.ozlabs.ibm.com>

I wrote:

> The following commits are now in the master and powerpc-next branches
> in the powerpc.git tree.  This includes commits pulled from Josh
> Boyer's and Olof Johansson's trees.

Because of a problem caused by a couple of commits in Josh Boyer's
tree, I have forced the master and powerpc-next branches back to where
they were until an hour or so ago.  Hopefully no-one has done a pull
in that time; if anyone has then they will need to do a git pull -f
when I eventually push the commits out (since they will have different
IDs).

Paul.

^ permalink raw reply

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