* [PATCH] rtc-pcf8563: Add device ids table
From: Laurent Pinchart @ 2008-04-17 15:02 UTC (permalink / raw)
To: a.zummo; +Cc: linuxppc-dev
Hi,
here's a patch against 2.6.25-rc8-mm2 that adds support for device tree names
to the rtc-pcf8563 driver.
Is the new-style driver conversion patch in 2.6.25-rc8-mm2 scheduled for
2.6.26 ?
--
This patch adds support for device tree names via the i2c mod alias mechanism
to the rtc-pcf8563 driver.
Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com>
---
drivers/rtc/rtc-pcf8563.c | 8 ++++++++
1 files changed, 8 insertions(+), 0 deletions(-)
diff --git a/drivers/rtc/rtc-pcf8563.c b/drivers/rtc/rtc-pcf8563.c
index a1e2f39..9667a3f 100644
--- a/drivers/rtc/rtc-pcf8563.c
+++ b/drivers/rtc/rtc-pcf8563.c
@@ -299,12 +299,20 @@ static int pcf8563_remove(struct i2c_client *client)
return 0;
}
+static struct i2c_device_id pcf8563_id[] = {
+ { "pcf8563", 0 },
+ { "rtc8564", 0 },
+ {},
+};
+MODULE_DEVICE_TABLE(i2c, pcf8563_id);
+
static struct i2c_driver pcf8563_driver = {
.driver = {
.name = "rtc-pcf8563",
},
.probe = pcf8563_probe,
.remove = pcf8563_remove,
+ .id_table = pcf8563_id,
};
static int __init pcf8563_init(void)
--
1.5.0
--
Laurent Pinchart
CSE Semaphore Belgium
Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium
T +32 (2) 387 42 59
F +32 (2) 387 42 75
^ permalink raw reply related
* Re: [PATCH 2/2] mpc86xx_hpcn: Temporarily accept old dts node identifier.
From: Kumar Gala @ 2008-04-17 14:57 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: linuxppc-dev
In-Reply-To: <a267e81e741560d8715ca4422179dcfe2ec467c6.1208364243.git.paul.gortmaker@windriver.com>
On Apr 16, 2008, at 12:53 PM, Paul Gortmaker wrote:
> As suggested by Timur Tabi, we match on the old compat node ID for one
> version and warn accordingly. If we don't do this, we plunge people
> who
> try to use an old DTB into silent boot death with no clear
> indication of
> what the problem is.
>
> This patch should be removed at the beginning of the 2.6.27 dev cycle.
> It is only meant to ease the transition in the short term.
>
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
> arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 6 ++++++
> 1 files changed, 6 insertions(+), 0 deletions(-)
applied.
- k
^ permalink raw reply
* Re: [PATCH for 2.6.26] Fix the size of qe muram for MPC8568E
From: Kumar Gala @ 2008-04-17 14:57 UTC (permalink / raw)
To: Haiying Wang; +Cc: linuxppc-dev
In-Reply-To: <1208436962.2963.5.camel@r54964-12.am.freescale.net>
On Apr 17, 2008, at 7:56 AM, Haiying Wang wrote:
> MPC8568E has 64K byte MURAM, so the size should be 0x10000, not
> 0xc000 in dts.
>
> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
> ---
> arch/powerpc/boot/dts/mpc8568mds.dts | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
applied.
- k
^ permalink raw reply
* Re: [PATCH 1/2] 86xx: mark functions static, other minor cleanups
From: Kumar Gala @ 2008-04-17 14:57 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: linuxppc-dev
In-Reply-To: <ebd47a82600724a6a80f7fd6efacab22e778858d.1208364243.git.paul.gortmaker@windriver.com>
On Apr 16, 2008, at 12:53 PM, Paul Gortmaker wrote:
> Cleanups as suggested by Stephen Rothwell and Dale Farnsworth, which
> incudes marking a bunch of functions static and add a vendor prefix to
> the compat node check for uniqueness.
>
> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> ---
> arch/powerpc/boot/dts/mpc8641_hpcn.dts | 2 +-
> arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 4 ++--
> arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 8 ++++----
> 3 files changed, 7 insertions(+), 7 deletions(-)
applied.
- k
^ permalink raw reply
* Re: [PATCH] Make rheap safe for spinlocks
From: Kumar Gala @ 2008-04-17 14:57 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, paulus
In-Reply-To: <12081878182664-git-send-email-timur@freescale.com>
On Apr 14, 2008, at 10:43 AM, Timur Tabi wrote:
> The rheap allocation function, rh_alloc, could call kmalloc with
> GFP_KERNEL.
> This can sleep, which means you couldn't hold a spinlock while
> called rh_alloc.
> Change all kmalloc calls to use GFP_ATOMIC so that it won't sleep.
> This is
> safe because only small blocks are allocated.
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
>
> This patch is for 2.6.26.
>
> arch/powerpc/lib/rheap.c | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
applied.
- k
^ permalink raw reply
* Re: [PATCH] [POWERPC] mpc8315: fix USB UTMI Host setup
From: Kumar Gala @ 2008-04-17 14:56 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev
In-Reply-To: <20080409135925.GA6905@polina.dev.rtsoft.ru>
On Apr 9, 2008, at 8:59 AM, Anton Vorontsov wrote:
> Currently USB Host isn't functional on the MPC8315E boards, for two
> reasons as described below.
>
> MPC8315 Reference Manual says:
> "The USB DR unit must have the same clock ratio as the encryption core
> unit, unless one of them has its clock disabled."
>
> The encryption core also drives I2C clock, so it is enabled and is
> equal
> to 01. That means USBDRCM should be 01 here.
>
> Plus, according to MPC8315E-RDB schematics, USB unit consumes CLK_IN
> clock from the 24.00MHz oscillator, which means we must adjust REFSEL
> bits as well.
>
> p.s.
> Idially we should rework whole 83xx/usb.c code, in two steps:
> 1. Move SCCR code to the U-Boot;
> 2. Implement fsl,usb-clock property in the device tree, so usb.c could
> decide what clock exactly to use on per-board basis.
>
> Though, today we're not in a hurry since there is just one 8315e board
> out there.
>
> Cc: Kumar Gala <galak@kernel.crashing.org>
> Cc: Kim Phillips <kim.phillips@freescale.com>
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> ---
applied.
^ permalink raw reply
* Re: RFC: MPC5200 PSC AC97 driver
From: Matt Sealey @ 2008-04-17 14:54 UTC (permalink / raw)
To: Juergen Beisert; +Cc: linuxppc-dev
In-Reply-To: <200804171641.33986.jbe@pengutronix.de>
Juergen Beisert wrote:
> On Thursday 17 April 2008 16:23, Matt Sealey wrote:
>> Hooray! :)
>>
>> Does it work, though, with your board?
>>
>>> - u16 ccr; /* PSC + 0x20 */
>>> - u8 reserved7[14];
>>> + u32 ccr; /* PSC + 0x20 */
>>> + u32 ac97_slots; /* PSC + 0x24 */
>> I think it should be left noted here that the CCR size changed from
>> 16 bits to 32 bits from 5200 to 5200B in order to reduce confusion.
>> You may have read the manual but that does not mean that an extra
>> small comment would not be appreciated by a lot of people (after
>> all who would want to write code for a legacy 5200 device, write
>> to psc->ccr and wonder why it explodes?)
>
> Hmm, my board runs an MPC5200B. How can we solve this u16 versus u32 issue for
> both CPUs?
Use a union like the rest of the bits of the PSC/FIFO structures which
differ per-chip or per-functionality, I'd say.
You can't solve this with the device tree.. you literally have to write
to the right place, which is dictated to you by the chip you run (which
is determined from the device tree) but actually writing to that place
can't be done by writing a 16-bit value into the ccr location (since it
will write into the low-order 16-bits of the 32-bit ccr, which is not
actually the CCR register on 5200).
If running a 5200 or 5200B has been determined, then the driver can then
mangle it's CCR setting code to match. The PSC UART driver already has
a small workaround for this although I am not sure it is the cleanest
method in the world..
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
^ permalink raw reply
* [PATCH] [POWERPC] fsl: Convert dts to v1 syntax
From: Kumar Gala @ 2008-04-17 14:47 UTC (permalink / raw)
To: linuxppc-dev
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
In my powerpc-next tree. posting for review.
arch/powerpc/boot/dts/ep88xc.dts | 73 +++++++++---------
arch/powerpc/boot/dts/kuroboxHD.dts | 83 +++++++++++----------
arch/powerpc/boot/dts/kuroboxHG.dts | 83 +++++++++++----------
arch/powerpc/boot/dts/mpc7448hpc2.dts | 97 ++++++++++++------------
arch/powerpc/boot/dts/mpc8272ads.dts | 132 +++++++++++++++++----------------
arch/powerpc/boot/dts/mpc866ads.dts | 58 ++++++++-------
arch/powerpc/boot/dts/mpc885ads.dts | 77 ++++++++++----------
arch/powerpc/boot/dts/pq2fads.dts | 126 ++++++++++++++++---------------
8 files changed, 372 insertions(+), 357 deletions(-)
diff --git a/arch/powerpc/boot/dts/ep88xc.dts b/arch/powerpc/boot/dts/ep88xc.dts
index 02705f2..ae57d62 100644
--- a/arch/powerpc/boot/dts/ep88xc.dts
+++ b/arch/powerpc/boot/dts/ep88xc.dts
@@ -2,7 +2,7 @@
* EP88xC Device Tree Source
*
* Copyright 2006 MontaVista Software, Inc.
- * Copyright 2007 Freescale Semiconductor, Inc.
+ * Copyright 2007,2008 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -10,6 +10,7 @@
* option) any later version.
*/
+/dts-v1/;
/ {
model = "EP88xC";
@@ -23,44 +24,44 @@
PowerPC,885@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <d#16>;
- i-cache-line-size = <d#16>;
- d-cache-size = <d#8192>;
- i-cache-size = <d#8192>;
+ reg = <0x0>;
+ d-cache-line-size = <16>;
+ i-cache-line-size = <16>;
+ d-cache-size = <8192>;
+ i-cache-size = <8192>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
- interrupts = <f 2>; // decrementer interrupt
+ interrupts = <15 2>; // decrementer interrupt
interrupt-parent = <&PIC>;
};
};
memory {
device_type = "memory";
- reg = <0 0>;
+ reg = <0x0 0x0>;
};
localbus@fa200100 {
compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus";
#address-cells = <2>;
#size-cells = <1>;
- reg = <fa200100 40>;
+ reg = <0xfa200100 0x40>;
ranges = <
- 0 0 fc000000 04000000
- 3 0 fa000000 01000000
+ 0x0 0x0 0xfc000000 0x4000000
+ 0x3 0x0 0xfa000000 0x1000000
>;
flash@0,2000000 {
compatible = "cfi-flash";
- reg = <0 2000000 2000000>;
+ reg = <0x0 0x2000000 0x2000000>;
bank-width = <4>;
device-width = <2>;
};
board-control@3,400000 {
- reg = <3 400000 10>;
+ reg = <0x3 0x400000 0x10>;
compatible = "fsl,ep88xc-bcsr";
};
};
@@ -70,25 +71,25 @@
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 fa200000 00004000>;
+ ranges = <0x0 0xfa200000 0x4000>;
bus-frequency = <0>;
// Temporary -- will go away once kernel uses ranges for get_immrbase().
- reg = <fa200000 4000>;
+ reg = <0xfa200000 0x4000>;
mdio@e00 {
compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio";
- reg = <e00 188>;
+ reg = <0xe00 0x188>;
#address-cells = <1>;
#size-cells = <0>;
PHY0: ethernet-phy@0 {
- reg = <0>;
+ reg = <0x0>;
device_type = "ethernet-phy";
};
PHY1: ethernet-phy@1 {
- reg = <1>;
+ reg = <0x1>;
device_type = "ethernet-phy";
};
};
@@ -97,7 +98,7 @@
device_type = "network";
compatible = "fsl,mpc885-fec-enet",
"fsl,pq1-fec-enet";
- reg = <e00 188>;
+ reg = <0xe00 0x188>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <3 1>;
interrupt-parent = <&PIC>;
@@ -109,7 +110,7 @@
device_type = "network";
compatible = "fsl,mpc885-fec-enet",
"fsl,pq1-fec-enet";
- reg = <1e00 188>;
+ reg = <0x1e00 0x188>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <7 1>;
interrupt-parent = <&PIC>;
@@ -120,7 +121,7 @@
PIC: interrupt-controller@0 {
interrupt-controller;
#interrupt-cells = <2>;
- reg = <0 24>;
+ reg = <0x0 0x24>;
compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
};
@@ -130,29 +131,29 @@
#size-cells = <2>;
compatible = "fsl,pq-pcmcia";
device_type = "pcmcia";
- reg = <80 80>;
+ reg = <0x80 0x80>;
interrupt-parent = <&PIC>;
- interrupts = <d 1>;
+ interrupts = <13 1>;
};
cpm@9c0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc885-cpm", "fsl,cpm1";
- command-proc = <9c0>;
+ command-proc = <0x9c0>;
interrupts = <0>; // cpm error interrupt
interrupt-parent = <&CPM_PIC>;
- reg = <9c0 40>;
+ reg = <0x9c0 0x40>;
ranges;
muram@2000 {
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0 2000 2000>;
+ ranges = <0x0 0x2000 0x2000>;
data@0 {
compatible = "fsl,cpm-muram-data";
- reg = <0 1c00>;
+ reg = <0x0 0x1c00>;
};
};
@@ -160,7 +161,7 @@
compatible = "fsl,mpc885-brg",
"fsl,cpm1-brg",
"fsl,cpm-brg";
- reg = <9f0 10>;
+ reg = <0x9f0 0x10>;
};
CPM_PIC: interrupt-controller@930 {
@@ -168,7 +169,7 @@
#interrupt-cells = <1>;
interrupts = <5 2 0 2>;
interrupt-parent = <&PIC>;
- reg = <930 20>;
+ reg = <0x930 0x20>;
compatible = "fsl,mpc885-cpm-pic",
"fsl,cpm1-pic";
};
@@ -178,11 +179,11 @@
device_type = "serial";
compatible = "fsl,mpc885-smc-uart",
"fsl,cpm1-smc-uart";
- reg = <a80 10 3e80 40>;
+ reg = <0xa80 0x10 0x3e80 0x40>;
interrupts = <4>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-brg = <1>;
- fsl,cpm-command = <0090>;
+ fsl,cpm-command = <0x90>;
linux,planetcore-label = "SMC1";
};
@@ -191,11 +192,11 @@
device_type = "serial";
compatible = "fsl,mpc885-scc-uart",
"fsl,cpm1-scc-uart";
- reg = <a20 20 3d00 80>;
- interrupts = <1d>;
+ reg = <0xa20 0x20 0x3d00 0x80>;
+ interrupts = <29>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-brg = <2>;
- fsl,cpm-command = <0040>;
+ fsl,cpm-command = <0x40>;
linux,planetcore-label = "SCC2";
};
@@ -204,9 +205,9 @@
#size-cells = <0>;
compatible = "fsl,mpc885-usb",
"fsl,cpm1-usb";
- reg = <a00 18 1c00 80>;
+ reg = <0xa00 0x18 0x1c00 0x80>;
interrupt-parent = <&CPM_PIC>;
- interrupts = <1e>;
+ interrupts = <30>;
fsl,cpm-command = <0000>;
};
};
diff --git a/arch/powerpc/boot/dts/kuroboxHD.dts b/arch/powerpc/boot/dts/kuroboxHD.dts
index 4469588..2e5a1a1 100644
--- a/arch/powerpc/boot/dts/kuroboxHD.dts
+++ b/arch/powerpc/boot/dts/kuroboxHD.dts
@@ -7,6 +7,7 @@
* Based on sandpoint.dts
*
* 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
+ * Copyright 2008 Freescale Semiconductor, Inc.
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
@@ -17,6 +18,8 @@ XXXX add flash parts, rtc, ??
*/
+/dts-v1/;
+
/ {
model = "KuroboxHD";
compatible = "linkstation";
@@ -35,19 +38,19 @@ XXXX add flash parts, rtc, ??
PowerPC,603e { /* Really 8241 */
device_type = "cpu";
- reg = <0>;
- clock-frequency = <bebc200>; /* Fixed by bootloader */
- timebase-frequency = <1743000>; /* Fixed by bootloader */
+ reg = <0x0>;
+ clock-frequency = <200000000>; /* Fixed by bootloader */
+ timebase-frequency = <24391680>; /* Fixed by bootloader */
bus-frequency = <0>; /* Fixed by bootloader */
/* Following required by dtc but not used */
- i-cache-size = <4000>;
- d-cache-size = <4000>;
+ i-cache-size = <0x4000>;
+ d-cache-size = <0x4000>;
};
};
memory {
device_type = "memory";
- reg = <00000000 04000000>;
+ reg = <0x0 0x4000000>;
};
soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
@@ -56,26 +59,26 @@ XXXX add flash parts, rtc, ??
device_type = "soc";
compatible = "mpc10x";
store-gathering = <0>; /* 0 == off, !0 == on */
- reg = <80000000 00100000>;
- ranges = <80000000 80000000 70000000 /* pci mem space */
- fc000000 fc000000 00100000 /* EUMB */
- fe000000 fe000000 00c00000 /* pci i/o space */
- fec00000 fec00000 00300000 /* pci cfg regs */
- fef00000 fef00000 00100000>; /* pci iack */
+ reg = <0x80000000 0x100000>;
+ ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
+ 0xfc000000 0xfc000000 0x100000 /* EUMB */
+ 0xfe000000 0xfe000000 0xc00000 /* pci i/o space */
+ 0xfec00000 0xfec00000 0x300000 /* pci cfg regs */
+ 0xfef00000 0xfef00000 0x100000>; /* pci iack */
i2c@80003000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <80003000 1000>;
+ reg = <0x80003000 0x1000>;
interrupts = <5 2>;
interrupt-parent = <&mpic>;
rtc@32 {
device_type = "rtc";
compatible = "ricoh,rs5c372a";
- reg = <32>;
+ reg = <0x32>;
};
};
@@ -83,9 +86,9 @@ XXXX add flash parts, rtc, ??
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <80004500 8>;
- clock-frequency = <5d08d88>;
- current-speed = <2580>;
+ reg = <0x80004500 0x8>;
+ clock-frequency = <97553800>;
+ current-speed = <9600>;
interrupts = <9 0>;
interrupt-parent = <&mpic>;
};
@@ -94,10 +97,10 @@ XXXX add flash parts, rtc, ??
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <80004600 8>;
- clock-frequency = <5d08d88>;
- current-speed = <e100>;
- interrupts = <a 0>;
+ reg = <0x80004600 0x8>;
+ clock-frequency = <97553800>;
+ current-speed = <57600>;
+ interrupts = <10 0>;
interrupt-parent = <&mpic>;
};
@@ -107,7 +110,7 @@ XXXX add flash parts, rtc, ??
device_type = "open-pic";
compatible = "chrp,open-pic";
interrupt-controller;
- reg = <80040000 40000>;
+ reg = <0x80040000 0x40000>;
};
pci0: pci@fec00000 {
@@ -116,29 +119,29 @@ XXXX add flash parts, rtc, ??
#interrupt-cells = <1>;
device_type = "pci";
compatible = "mpc10x-pci";
- reg = <fec00000 400000>;
- ranges = <01000000 0 0 fe000000 0 00c00000
- 02000000 0 80000000 80000000 0 70000000>;
- bus-range = <0 ff>;
- clock-frequency = <7f28155>;
+ reg = <0xfec00000 0x400000>;
+ ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000
+ 0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
+ bus-range = <0 255>;
+ clock-frequency = <133333333>;
interrupt-parent = <&mpic>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 11 - IRQ0 ETH */
- 5800 0 0 1 &mpic 0 1
- 5800 0 0 2 &mpic 1 1
- 5800 0 0 3 &mpic 2 1
- 5800 0 0 4 &mpic 3 1
+ 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
+ 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
+ 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
+ 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
/* IDSEL 12 - IRQ1 IDE0 */
- 6000 0 0 1 &mpic 1 1
- 6000 0 0 2 &mpic 2 1
- 6000 0 0 3 &mpic 3 1
- 6000 0 0 4 &mpic 0 1
+ 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
+ 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
+ 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
+ 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
/* IDSEL 14 - IRQ3 USB2.0 */
- 7000 0 0 1 &mpic 3 1
- 7000 0 0 2 &mpic 3 1
- 7000 0 0 3 &mpic 3 1
- 7000 0 0 4 &mpic 3 1
+ 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
+ 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
+ 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
+ 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
>;
};
};
diff --git a/arch/powerpc/boot/dts/kuroboxHG.dts b/arch/powerpc/boot/dts/kuroboxHG.dts
index 8443c85..e4916e6 100644
--- a/arch/powerpc/boot/dts/kuroboxHG.dts
+++ b/arch/powerpc/boot/dts/kuroboxHG.dts
@@ -7,6 +7,7 @@
* Based on sandpoint.dts
*
* 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
+ * Copyright 2008 Freescale Semiconductor, Inc.
*
* This file is licensed under
* the terms of the GNU General Public License version 2. This program
@@ -17,6 +18,8 @@ XXXX add flash parts, rtc, ??
*/
+/dts-v1/;
+
/ {
model = "KuroboxHG";
compatible = "linkstation";
@@ -35,19 +38,19 @@ XXXX add flash parts, rtc, ??
PowerPC,603e { /* Really 8241 */
device_type = "cpu";
- reg = <0>;
- clock-frequency = <fdad680>; /* Fixed by bootloader */
- timebase-frequency = <1F04000>; /* Fixed by bootloader */
+ reg = <0x0>;
+ clock-frequency = <266000000>; /* Fixed by bootloader */
+ timebase-frequency = <32522240>; /* Fixed by bootloader */
bus-frequency = <0>; /* Fixed by bootloader */
/* Following required by dtc but not used */
- i-cache-size = <4000>;
- d-cache-size = <4000>;
+ i-cache-size = <0x4000>;
+ d-cache-size = <0x4000>;
};
};
memory {
device_type = "memory";
- reg = <00000000 08000000>;
+ reg = <0x0 0x8000000>;
};
soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
@@ -56,26 +59,26 @@ XXXX add flash parts, rtc, ??
device_type = "soc";
compatible = "mpc10x";
store-gathering = <0>; /* 0 == off, !0 == on */
- reg = <80000000 00100000>;
- ranges = <80000000 80000000 70000000 /* pci mem space */
- fc000000 fc000000 00100000 /* EUMB */
- fe000000 fe000000 00c00000 /* pci i/o space */
- fec00000 fec00000 00300000 /* pci cfg regs */
- fef00000 fef00000 00100000>; /* pci iack */
+ reg = <0x80000000 0x100000>;
+ ranges = <0x80000000 0x80000000 0x70000000 /* pci mem space */
+ 0xfc000000 0xfc000000 0x100000 /* EUMB */
+ 0xfe000000 0xfe000000 0xc00000 /* pci i/o space */
+ 0xfec00000 0xfec00000 0x300000 /* pci cfg regs */
+ 0xfef00000 0xfef00000 0x100000>; /* pci iack */
i2c@80003000 {
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
compatible = "fsl-i2c";
- reg = <80003000 1000>;
+ reg = <0x80003000 0x1000>;
interrupts = <5 2>;
interrupt-parent = <&mpic>;
rtc@32 {
device_type = "rtc";
compatible = "ricoh,rs5c372a";
- reg = <32>;
+ reg = <0x32>;
};
};
@@ -83,9 +86,9 @@ XXXX add flash parts, rtc, ??
cell-index = <0>;
device_type = "serial";
compatible = "ns16550";
- reg = <80004500 8>;
- clock-frequency = <7c044a8>;
- current-speed = <2580>;
+ reg = <0x80004500 0x8>;
+ clock-frequency = <130041000>;
+ current-speed = <9600>;
interrupts = <9 0>;
interrupt-parent = <&mpic>;
};
@@ -94,10 +97,10 @@ XXXX add flash parts, rtc, ??
cell-index = <1>;
device_type = "serial";
compatible = "ns16550";
- reg = <80004600 8>;
- clock-frequency = <7c044a8>;
- current-speed = <e100>;
- interrupts = <a 0>;
+ reg = <0x80004600 0x8>;
+ clock-frequency = <130041000>;
+ current-speed = <57600>;
+ interrupts = <10 0>;
interrupt-parent = <&mpic>;
};
@@ -107,7 +110,7 @@ XXXX add flash parts, rtc, ??
device_type = "open-pic";
compatible = "chrp,open-pic";
interrupt-controller;
- reg = <80040000 40000>;
+ reg = <0x80040000 0x40000>;
};
pci0: pci@fec00000 {
@@ -116,29 +119,29 @@ XXXX add flash parts, rtc, ??
#interrupt-cells = <1>;
device_type = "pci";
compatible = "mpc10x-pci";
- reg = <fec00000 400000>;
- ranges = <01000000 0 0 fe000000 0 00c00000
- 02000000 0 80000000 80000000 0 70000000>;
- bus-range = <0 ff>;
- clock-frequency = <7f28155>;
+ reg = <0xfec00000 0x400000>;
+ ranges = <0x1000000 0x0 0x0 0xfe000000 0x0 0xc00000
+ 0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
+ bus-range = <0 255>;
+ clock-frequency = <133333333>;
interrupt-parent = <&mpic>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 11 - IRQ0 ETH */
- 5800 0 0 1 &mpic 0 1
- 5800 0 0 2 &mpic 1 1
- 5800 0 0 3 &mpic 2 1
- 5800 0 0 4 &mpic 3 1
+ 0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
+ 0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
+ 0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
+ 0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
/* IDSEL 12 - IRQ1 IDE0 */
- 6000 0 0 1 &mpic 1 1
- 6000 0 0 2 &mpic 2 1
- 6000 0 0 3 &mpic 3 1
- 6000 0 0 4 &mpic 0 1
+ 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
+ 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
+ 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
+ 0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
/* IDSEL 14 - IRQ3 USB2.0 */
- 7000 0 0 1 &mpic 3 1
- 7000 0 0 2 &mpic 3 1
- 7000 0 0 3 &mpic 3 1
- 7000 0 0 4 &mpic 3 1
+ 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
+ 0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
+ 0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
+ 0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
>;
};
};
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts
index 8fb5423..4936349 100644
--- a/arch/powerpc/boot/dts/mpc7448hpc2.dts
+++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts
@@ -1,7 +1,7 @@
/*
* MPC7448HPC2 (Taiga) board Device Tree Source
*
- * Copyright 2006 Freescale Semiconductor Inc.
+ * Copyright 2006, 2008 Freescale Semiconductor Inc.
* 2006 Roy Zang <Roy Zang at freescale.com>.
*
* This program is free software; you can redistribute it and/or modify it
@@ -10,6 +10,7 @@
* option) any later version.
*/
+/dts-v1/;
/ {
model = "mpc7448hpc2";
@@ -23,11 +24,11 @@
PowerPC,7448@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <20>; // 32 bytes
- i-cache-line-size = <20>; // 32 bytes
- d-cache-size = <8000>; // L1, 32K bytes
- i-cache-size = <8000>; // L1, 32K bytes
+ reg = <0x0>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K bytes
+ i-cache-size = <0x8000>; // L1, 32K bytes
timebase-frequency = <0>; // 33 MHz, from uboot
clock-frequency = <0>; // From U-Boot
bus-frequency = <0>; // From U-Boot
@@ -36,7 +37,7 @@
memory {
device_type = "memory";
- reg = <00000000 20000000 // DDR2 512M at 0
+ reg = <0x0 0x20000000 // DDR2 512M at 0
>;
};
@@ -44,14 +45,14 @@
#address-cells = <1>;
#size-cells = <1>;
device_type = "tsi-bridge";
- ranges = <00000000 c0000000 00010000>;
- reg = <c0000000 00010000>;
+ ranges = <0x0 0xc0000000 0x10000>;
+ reg = <0xc0000000 0x10000>;
bus-frequency = <0>;
i2c@7000 {
interrupt-parent = <&mpic>;
- interrupts = <E 0>;
- reg = <7000 400>;
+ interrupts = <14 0>;
+ reg = <0x7000 0x400>;
device_type = "i2c";
compatible = "tsi108-i2c";
};
@@ -59,20 +60,20 @@
MDIO: mdio@6000 {
device_type = "mdio";
compatible = "tsi108-mdio";
- reg = <6000 50>;
+ reg = <0x6000 0x50>;
#address-cells = <1>;
#size-cells = <0>;
phy8: ethernet-phy@8 {
interrupt-parent = <&mpic>;
interrupts = <2 1>;
- reg = <8>;
+ reg = <0x8>;
};
phy9: ethernet-phy@9 {
interrupt-parent = <&mpic>;
interrupts = <2 1>;
- reg = <9>;
+ reg = <0x9>;
};
};
@@ -82,9 +83,9 @@
#size-cells = <0>;
device_type = "network";
compatible = "tsi108-ethernet";
- reg = <6000 200>;
+ reg = <0x6000 0x200>;
address = [ 00 06 D2 00 00 01 ];
- interrupts = <10 2>;
+ interrupts = <16 2>;
interrupt-parent = <&mpic>;
mdio-handle = <&MDIO>;
phy-handle = <&phy8>;
@@ -96,9 +97,9 @@
#size-cells = <0>;
device_type = "network";
compatible = "tsi108-ethernet";
- reg = <6400 200>;
+ reg = <0x6400 0x200>;
address = [ 00 06 D2 00 00 02 ];
- interrupts = <11 2>;
+ interrupts = <17 2>;
interrupt-parent = <&mpic>;
mdio-handle = <&MDIO>;
phy-handle = <&phy9>;
@@ -107,18 +108,18 @@
serial@7808 {
device_type = "serial";
compatible = "ns16550";
- reg = <7808 200>;
- clock-frequency = <3f6b5a00>;
- interrupts = <c 0>;
+ reg = <0x7808 0x200>;
+ clock-frequency = <1064000000>;
+ interrupts = <12 0>;
interrupt-parent = <&mpic>;
};
serial@7c08 {
device_type = "serial";
compatible = "ns16550";
- reg = <7c08 200>;
- clock-frequency = <3f6b5a00>;
- interrupts = <d 0>;
+ reg = <0x7c08 0x200>;
+ clock-frequency = <1064000000>;
+ interrupts = <13 0>;
interrupt-parent = <&mpic>;
};
@@ -127,7 +128,7 @@
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
- reg = <7400 400>;
+ reg = <0x7400 0x400>;
compatible = "chrp,open-pic";
device_type = "open-pic";
big-endian;
@@ -138,39 +139,39 @@
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- reg = <1000 1000>;
+ reg = <0x1000 0x1000>;
bus-range = <0 0>;
- ranges = <02000000 0 e0000000 e0000000 0 1A000000
- 01000000 0 00000000 fa000000 0 00010000>;
- clock-frequency = <7f28154>;
+ ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000
+ 0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>;
+ clock-frequency = <133333332>;
interrupt-parent = <&mpic>;
- interrupts = <17 2>;
- interrupt-map-mask = <f800 0 0 7>;
+ interrupts = <23 2>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x11 */
- 0800 0 0 1 &RT0 24 0
- 0800 0 0 2 &RT0 25 0
- 0800 0 0 3 &RT0 26 0
- 0800 0 0 4 &RT0 27 0
+ 0x800 0x0 0x0 0x1 &RT0 0x24 0x0
+ 0x800 0x0 0x0 0x2 &RT0 0x25 0x0
+ 0x800 0x0 0x0 0x3 &RT0 0x26 0x0
+ 0x800 0x0 0x0 0x4 &RT0 0x27 0x0
/* IDSEL 0x12 */
- 1000 0 0 1 &RT0 25 0
- 1000 0 0 2 &RT0 26 0
- 1000 0 0 3 &RT0 27 0
- 1000 0 0 4 &RT0 24 0
+ 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
+ 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
+ 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
+ 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
/* IDSEL 0x13 */
- 1800 0 0 1 &RT0 26 0
- 1800 0 0 2 &RT0 27 0
- 1800 0 0 3 &RT0 24 0
- 1800 0 0 4 &RT0 25 0
+ 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
+ 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
+ 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
+ 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
/* IDSEL 0x14 */
- 2000 0 0 1 &RT0 27 0
- 2000 0 0 2 &RT0 24 0
- 2000 0 0 3 &RT0 25 0
- 2000 0 0 4 &RT0 26 0
+ 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
+ 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
+ 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
+ 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
>;
RT0: router@1180 {
@@ -180,7 +181,7 @@
#address-cells = <0>;
#interrupt-cells = <2>;
big-endian;
- interrupts = <17 2>;
+ interrupts = <23 2>;
interrupt-parent = <&mpic>;
};
};
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 7285ca1..46e2da3 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -1,7 +1,7 @@
/*
* MPC8272 ADS Device Tree Source
*
- * Copyright 2005 Freescale Semiconductor Inc.
+ * Copyright 2005,2008 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -9,6 +9,8 @@
* option) any later version.
*/
+/dts-v1/;
+
/ {
model = "MPC8272ADS";
compatible = "fsl,mpc8272ads";
@@ -21,11 +23,11 @@
PowerPC,8272@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <d#32>;
- i-cache-line-size = <d#32>;
- d-cache-size = <d#16384>;
- i-cache-size = <d#16384>;
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <16384>;
+ i-cache-size = <16384>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
@@ -34,7 +36,7 @@
memory {
device_type = "memory";
- reg = <0 0>;
+ reg = <0x0 0x0>;
};
localbus@f0010100 {
@@ -42,21 +44,21 @@
"fsl,pq2-localbus";
#address-cells = <2>;
#size-cells = <1>;
- reg = <f0010100 40>;
+ reg = <0xf0010100 0x40>;
- ranges = <0 0 fe000000 02000000
- 1 0 f4500000 00008000
- 3 0 f8200000 00008000>;
+ ranges = <0x0 0x0 0xfe000000 0x2000000
+ 0x1 0x0 0xf4500000 0x8000
+ 0x3 0x0 0xf8200000 0x8000>;
flash@0,0 {
compatible = "jedec-flash";
- reg = <0 0 2000000>;
+ reg = <0x0 0x0 0x2000000>;
bank-width = <4>;
device-width = <1>;
};
board-control@1,0 {
- reg = <1 0 20>;
+ reg = <0x1 0x0 0x20>;
compatible = "fsl,mpc8272ads-bcsr";
};
@@ -65,46 +67,46 @@
"fsl,pq2ads-pci-pic";
#interrupt-cells = <1>;
interrupt-controller;
- reg = <3 0 8>;
+ reg = <0x3 0x0 0x8>;
interrupt-parent = <&PIC>;
- interrupts = <14 8>;
+ interrupts = <20 8>;
};
};
pci@f0010800 {
device_type = "pci";
- reg = <f0010800 10c f00101ac 8 f00101c4 8>;
+ reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
compatible = "fsl,mpc8272-pci", "fsl,pq2-pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- clock-frequency = <d#66666666>;
- interrupt-map-mask = <f800 0 0 7>;
+ clock-frequency = <66666666>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x16 */
- b000 0 0 1 &PCI_PIC 0
- b000 0 0 2 &PCI_PIC 1
- b000 0 0 3 &PCI_PIC 2
- b000 0 0 4 &PCI_PIC 3
+ 0xb000 0x0 0x0 0x1 &PCI_PIC 0
+ 0xb000 0x0 0x0 0x2 &PCI_PIC 1
+ 0xb000 0x0 0x0 0x3 &PCI_PIC 2
+ 0xb000 0x0 0x0 0x4 &PCI_PIC 3
/* IDSEL 0x17 */
- b800 0 0 1 &PCI_PIC 4
- b800 0 0 2 &PCI_PIC 5
- b800 0 0 3 &PCI_PIC 6
- b800 0 0 4 &PCI_PIC 7
+ 0xb800 0x0 0x0 0x1 &PCI_PIC 4
+ 0xb800 0x0 0x0 0x2 &PCI_PIC 5
+ 0xb800 0x0 0x0 0x3 &PCI_PIC 6
+ 0xb800 0x0 0x0 0x4 &PCI_PIC 7
/* IDSEL 0x18 */
- c000 0 0 1 &PCI_PIC 8
- c000 0 0 2 &PCI_PIC 9
- c000 0 0 3 &PCI_PIC a
- c000 0 0 4 &PCI_PIC b>;
+ 0xc000 0x0 0x0 0x1 &PCI_PIC 8
+ 0xc000 0x0 0x0 0x2 &PCI_PIC 9
+ 0xc000 0x0 0x0 0x3 &PCI_PIC 10
+ 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
interrupt-parent = <&PIC>;
- interrupts = <12 8>;
- ranges = <42000000 0 80000000 80000000 0 20000000
- 02000000 0 a0000000 a0000000 0 20000000
- 01000000 0 00000000 f6000000 0 02000000>;
+ interrupts = <18 8>;
+ ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
+ 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
};
soc@f0000000 {
@@ -112,26 +114,26 @@
#size-cells = <1>;
device_type = "soc";
compatible = "fsl,mpc8272", "fsl,pq2-soc";
- ranges = <00000000 f0000000 00053000>;
+ ranges = <0x0 0xf0000000 0x53000>;
// Temporary -- will go away once kernel uses ranges for get_immrbase().
- reg = <f0000000 00053000>;
+ reg = <0xf0000000 0x53000>;
cpm@119c0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc8272-cpm", "fsl,cpm2";
- reg = <119c0 30>;
+ reg = <0x119c0 0x30>;
ranges;
muram@0 {
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0 0 10000>;
+ ranges = <0x0 0x0 0x10000>;
data@0 {
compatible = "fsl,cpm-muram-data";
- reg = <0 2000 9800 800>;
+ reg = <0x0 0x2000 0x9800 0x800>;
};
};
@@ -139,29 +141,29 @@
compatible = "fsl,mpc8272-brg",
"fsl,cpm2-brg",
"fsl,cpm-brg";
- reg = <119f0 10 115f0 10>;
+ reg = <0x119f0 0x10 0x115f0 0x10>;
};
serial@11a00 {
device_type = "serial";
compatible = "fsl,mpc8272-scc-uart",
"fsl,cpm2-scc-uart";
- reg = <11a00 20 8000 100>;
- interrupts = <28 8>;
+ reg = <0x11a00 0x20 0x8000 0x100>;
+ interrupts = <40 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <1>;
- fsl,cpm-command = <00800000>;
+ fsl,cpm-command = <0x800000>;
};
serial@11a60 {
device_type = "serial";
compatible = "fsl,mpc8272-scc-uart",
"fsl,cpm2-scc-uart";
- reg = <11a60 20 8300 100>;
- interrupts = <2b 8>;
+ reg = <0x11a60 0x20 0x8300 0x100>;
+ interrupts = <43 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <4>;
- fsl,cpm-command = <0ce00000>;
+ fsl,cpm-command = <0xce00000>;
};
mdio@10d40 {
@@ -169,23 +171,23 @@
compatible = "fsl,mpc8272ads-mdio-bitbang",
"fsl,mpc8272-mdio-bitbang",
"fsl,cpm2-mdio-bitbang";
- reg = <10d40 14>;
+ reg = <0x10d40 0x14>;
#address-cells = <1>;
#size-cells = <0>;
- fsl,mdio-pin = <12>;
- fsl,mdc-pin = <13>;
+ fsl,mdio-pin = <18>;
+ fsl,mdc-pin = <19>;
PHY0: ethernet-phy@0 {
interrupt-parent = <&PIC>;
- interrupts = <17 8>;
- reg = <0>;
+ interrupts = <23 8>;
+ reg = <0x0>;
device_type = "ethernet-phy";
};
PHY1: ethernet-phy@1 {
interrupt-parent = <&PIC>;
- interrupts = <17 8>;
- reg = <3>;
+ interrupts = <23 8>;
+ reg = <0x3>;
device_type = "ethernet-phy";
};
};
@@ -194,33 +196,33 @@
device_type = "network";
compatible = "fsl,mpc8272-fcc-enet",
"fsl,cpm2-fcc-enet";
- reg = <11300 20 8400 100 11390 1>;
+ reg = <0x11300 0x20 0x8400 0x100 0x11390 0x1>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <20 8>;
+ interrupts = <32 8>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY0>;
linux,network-index = <0>;
- fsl,cpm-command = <12000300>;
+ fsl,cpm-command = <0x12000300>;
};
ethernet@11320 {
device_type = "network";
compatible = "fsl,mpc8272-fcc-enet",
"fsl,cpm2-fcc-enet";
- reg = <11320 20 8500 100 113b0 1>;
+ reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <21 8>;
+ interrupts = <33 8>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY1>;
linux,network-index = <1>;
- fsl,cpm-command = <16200300>;
+ fsl,cpm-command = <0x16200300>;
};
};
PIC: interrupt-controller@10c00 {
#interrupt-cells = <2>;
interrupt-controller;
- reg = <10c00 80>;
+ reg = <0x10c00 0x80>;
compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
};
@@ -232,14 +234,14 @@
"fsl,talitos-sec2",
"fsl,talitos",
"talitos";
- reg = <30000 10000>;
- interrupts = <b 8>;
+ reg = <0x30000 0x10000>;
+ interrupts = <11 8>;
interrupt-parent = <&PIC>;
num-channels = <4>;
- channel-fifo-len = <18>;
- exec-units-mask = <0000007e>;
+ channel-fifo-len = <24>;
+ exec-units-mask = <0x7e>;
/* desc mask is for rev1.x, we need runtime fixup for >=2.x */
- descriptor-types-mask = <01010ebf>;
+ descriptor-types-mask = <0x1010ebf>;
};
};
diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index daf9433..765e43c 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -2,6 +2,7 @@
* MPC866 ADS Device Tree Source
*
* Copyright 2006 MontaVista Software, Inc.
+ * Copyright 2008 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -9,6 +10,7 @@
* option) any later version.
*/
+/dts-v1/;
/ {
model = "MPC866ADS";
@@ -22,37 +24,37 @@
PowerPC,866@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <10>; // 16 bytes
- i-cache-line-size = <10>; // 16 bytes
- d-cache-size = <2000>; // L1, 8K
- i-cache-size = <4000>; // L1, 16K
+ reg = <0x0>;
+ d-cache-line-size = <16>; // 16 bytes
+ i-cache-line-size = <16>; // 16 bytes
+ d-cache-size = <0x2000>; // L1, 8K
+ i-cache-size = <0x4000>; // L1, 16K
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
- interrupts = <f 2>; // decrementer interrupt
+ interrupts = <15 2>; // decrementer interrupt
interrupt-parent = <&PIC>;
};
};
memory {
device_type = "memory";
- reg = <00000000 800000>;
+ reg = <0x0 0x800000>;
};
localbus@ff000100 {
compatible = "fsl,mpc866-localbus", "fsl,pq1-localbus";
#address-cells = <2>;
#size-cells = <1>;
- reg = <ff000100 40>;
+ reg = <0xff000100 0x40>;
ranges = <
- 1 0 ff080000 00008000
- 5 0 ff0a0000 00008000
+ 0x1 0x0 0xff080000 0x8000
+ 0x5 0x0 0xff0a0000 0x8000
>;
board-control@1,0 {
- reg = <1 0 20 5 300 4>;
+ reg = <0x1 0x0 0x20 0x5 0x300 0x4>;
compatible = "fsl,mpc866ads-bcsr";
};
};
@@ -61,17 +63,17 @@
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 ff000000 00100000>;
- reg = <ff000000 00000200>;
+ ranges = <0x0 0xff000000 0x100000>;
+ reg = <0xff000000 0x200>;
bus-frequency = <0>;
mdio@e00 {
compatible = "fsl,mpc866-fec-mdio", "fsl,pq1-fec-mdio";
- reg = <e00 188>;
+ reg = <0xe00 0x188>;
#address-cells = <1>;
#size-cells = <0>;
PHY: ethernet-phy@f {
- reg = <f>;
+ reg = <0xf>;
device_type = "ethernet-phy";
};
};
@@ -80,7 +82,7 @@
device_type = "network";
compatible = "fsl,mpc866-fec-enet",
"fsl,pq1-fec-enet";
- reg = <e00 188>;
+ reg = <0xe00 0x188>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <3 1>;
interrupt-parent = <&PIC>;
@@ -91,7 +93,7 @@
PIC: pic@0 {
interrupt-controller;
#interrupt-cells = <2>;
- reg = <0 24>;
+ reg = <0x0 0x24>;
compatible = "fsl,mpc866-pic", "fsl,pq1-pic";
};
@@ -100,7 +102,7 @@
#size-cells = <1>;
compatible = "fsl,mpc866-cpm", "fsl,cpm1";
ranges;
- reg = <9c0 40>;
+ reg = <0x9c0 0x40>;
brg-frequency = <0>;
interrupts = <0 2>; // cpm error interrupt
interrupt-parent = <&CPM_PIC>;
@@ -108,11 +110,11 @@
muram@2000 {
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0 2000 2000>;
+ ranges = <0x0 0x2000 0x2000>;
data@0 {
compatible = "fsl,cpm-muram-data";
- reg = <0 1c00>;
+ reg = <0x0 0x1c00>;
};
};
@@ -120,7 +122,7 @@
compatible = "fsl,mpc866-brg",
"fsl,cpm1-brg",
"fsl,cpm-brg";
- reg = <9f0 10>;
+ reg = <0x9f0 0x10>;
clock-frequency = <0>;
};
@@ -130,7 +132,7 @@
#interrupt-cells = <1>;
interrupts = <5 2 0 2>;
interrupt-parent = <&PIC>;
- reg = <930 20>;
+ reg = <0x930 0x20>;
compatible = "fsl,mpc866-cpm-pic",
"fsl,cpm1-pic";
};
@@ -140,31 +142,31 @@
device_type = "serial";
compatible = "fsl,mpc866-smc-uart",
"fsl,cpm1-smc-uart";
- reg = <a80 10 3e80 40>;
+ reg = <0xa80 0x10 0x3e80 0x40>;
interrupts = <4>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-brg = <1>;
- fsl,cpm-command = <0090>;
+ fsl,cpm-command = <0x90>;
};
serial@a90 {
device_type = "serial";
compatible = "fsl,mpc866-smc-uart",
"fsl,cpm1-smc-uart";
- reg = <a90 10 3f80 40>;
+ reg = <0xa90 0x10 0x3f80 0x40>;
interrupts = <3>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-brg = <2>;
- fsl,cpm-command = <00d0>;
+ fsl,cpm-command = <0xd0>;
};
ethernet@a00 {
device_type = "network";
compatible = "fsl,mpc866-scc-enet",
"fsl,cpm1-scc-enet";
- reg = <a00 18 3c00 100>;
+ reg = <0xa00 0x18 0x3c00 0x100>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <1e>;
+ interrupts = <30>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-command = <0000>;
linux,network-index = <1>;
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index d84a012..9895043 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -2,7 +2,7 @@
* MPC885 ADS Device Tree Source
*
* Copyright 2006 MontaVista Software, Inc.
- * Copyright 2007 Freescale Semiconductor, Inc.
+ * Copyright 2007,2008 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -10,6 +10,7 @@
* option) any later version.
*/
+/dts-v1/;
/ {
model = "MPC885ADS";
@@ -23,45 +24,45 @@
PowerPC,885@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <d#16>;
- i-cache-line-size = <d#16>;
- d-cache-size = <d#8192>;
- i-cache-size = <d#8192>;
+ reg = <0x0>;
+ d-cache-line-size = <16>;
+ i-cache-line-size = <16>;
+ d-cache-size = <8192>;
+ i-cache-size = <8192>;
timebase-frequency = <0>;
bus-frequency = <0>;
clock-frequency = <0>;
- interrupts = <f 2>; // decrementer interrupt
+ interrupts = <15 2>; // decrementer interrupt
interrupt-parent = <&PIC>;
};
};
memory {
device_type = "memory";
- reg = <0 0>;
+ reg = <0x0 0x0>;
};
localbus@ff000100 {
compatible = "fsl,mpc885-localbus", "fsl,pq1-localbus";
#address-cells = <2>;
#size-cells = <1>;
- reg = <ff000100 40>;
+ reg = <0xff000100 0x40>;
ranges = <
- 0 0 fe000000 00800000
- 1 0 ff080000 00008000
- 5 0 ff0a0000 00008000
+ 0x0 0x0 0xfe000000 0x800000
+ 0x1 0x0 0xff080000 0x8000
+ 0x5 0x0 0xff0a0000 0x8000
>;
flash@0,0 {
compatible = "jedec-flash";
- reg = <0 0 800000>;
+ reg = <0x0 0x0 0x800000>;
bank-width = <4>;
device-width = <1>;
};
board-control@1,0 {
- reg = <1 0 20 5 300 4>;
+ reg = <0x1 0x0 0x20 0x5 0x300 0x4>;
compatible = "fsl,mpc885ads-bcsr";
};
};
@@ -71,30 +72,30 @@
#address-cells = <1>;
#size-cells = <1>;
device_type = "soc";
- ranges = <0 ff000000 00004000>;
+ ranges = <0x0 0xff000000 0x4000>;
bus-frequency = <0>;
// Temporary -- will go away once kernel uses ranges for get_immrbase().
- reg = <ff000000 4000>;
+ reg = <0xff000000 0x4000>;
mdio@e00 {
compatible = "fsl,mpc885-fec-mdio", "fsl,pq1-fec-mdio";
- reg = <e00 188>;
+ reg = <0xe00 0x188>;
#address-cells = <1>;
#size-cells = <0>;
PHY0: ethernet-phy@0 {
- reg = <0>;
+ reg = <0x0>;
device_type = "ethernet-phy";
};
PHY1: ethernet-phy@1 {
- reg = <1>;
+ reg = <0x1>;
device_type = "ethernet-phy";
};
PHY2: ethernet-phy@2 {
- reg = <2>;
+ reg = <0x2>;
device_type = "ethernet-phy";
};
};
@@ -103,7 +104,7 @@
device_type = "network";
compatible = "fsl,mpc885-fec-enet",
"fsl,pq1-fec-enet";
- reg = <e00 188>;
+ reg = <0xe00 0x188>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <3 1>;
interrupt-parent = <&PIC>;
@@ -115,7 +116,7 @@
device_type = "network";
compatible = "fsl,mpc885-fec-enet",
"fsl,pq1-fec-enet";
- reg = <1e00 188>;
+ reg = <0x1e00 0x188>;
local-mac-address = [ 00 00 00 00 00 00 ];
interrupts = <7 1>;
interrupt-parent = <&PIC>;
@@ -126,7 +127,7 @@
PIC: interrupt-controller@0 {
interrupt-controller;
#interrupt-cells = <2>;
- reg = <0 24>;
+ reg = <0x0 0x24>;
compatible = "fsl,mpc885-pic", "fsl,pq1-pic";
};
@@ -136,29 +137,29 @@
#size-cells = <2>;
compatible = "fsl,pq-pcmcia";
device_type = "pcmcia";
- reg = <80 80>;
+ reg = <0x80 0x80>;
interrupt-parent = <&PIC>;
- interrupts = <d 1>;
+ interrupts = <13 1>;
};
cpm@9c0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,mpc885-cpm", "fsl,cpm1";
- command-proc = <9c0>;
+ command-proc = <0x9c0>;
interrupts = <0>; // cpm error interrupt
interrupt-parent = <&CPM_PIC>;
- reg = <9c0 40>;
+ reg = <0x9c0 0x40>;
ranges;
muram@2000 {
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0 2000 2000>;
+ ranges = <0x0 0x2000 0x2000>;
data@0 {
compatible = "fsl,cpm-muram-data";
- reg = <0 1c00>;
+ reg = <0x0 0x1c00>;
};
};
@@ -167,7 +168,7 @@
"fsl,cpm1-brg",
"fsl,cpm-brg";
clock-frequency = <0>;
- reg = <9f0 10>;
+ reg = <0x9f0 0x10>;
};
CPM_PIC: interrupt-controller@930 {
@@ -175,7 +176,7 @@
#interrupt-cells = <1>;
interrupts = <5 2 0 2>;
interrupt-parent = <&PIC>;
- reg = <930 20>;
+ reg = <0x930 0x20>;
compatible = "fsl,mpc885-cpm-pic",
"fsl,cpm1-pic";
};
@@ -184,34 +185,34 @@
device_type = "serial";
compatible = "fsl,mpc885-smc-uart",
"fsl,cpm1-smc-uart";
- reg = <a80 10 3e80 40>;
+ reg = <0xa80 0x10 0x3e80 0x40>;
interrupts = <4>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-brg = <1>;
- fsl,cpm-command = <0090>;
+ fsl,cpm-command = <0x90>;
};
serial@a90 {
device_type = "serial";
compatible = "fsl,mpc885-smc-uart",
"fsl,cpm1-smc-uart";
- reg = <a90 10 3f80 40>;
+ reg = <0xa90 0x10 0x3f80 0x40>;
interrupts = <3>;
interrupt-parent = <&CPM_PIC>;
fsl,cpm-brg = <2>;
- fsl,cpm-command = <00d0>;
+ fsl,cpm-command = <0xd0>;
};
ethernet@a40 {
device_type = "network";
compatible = "fsl,mpc885-scc-enet",
"fsl,cpm1-scc-enet";
- reg = <a40 18 3e00 100>;
+ reg = <0xa40 0x18 0x3e00 0x100>;
local-mac-address = [ 00 00 00 00 00 00 ];
- interrupts = <1c>;
+ interrupts = <28>;
interrupt-parent = <&CPM_PIC>;
phy-handle = <&PHY2>;
- fsl,cpm-command = <0080>;
+ fsl,cpm-command = <0x80>;
linux,network-index = <2>;
};
};
diff --git a/arch/powerpc/boot/dts/pq2fads.dts b/arch/powerpc/boot/dts/pq2fads.dts
index 2d56492..b2d6109 100644
--- a/arch/powerpc/boot/dts/pq2fads.dts
+++ b/arch/powerpc/boot/dts/pq2fads.dts
@@ -1,7 +1,7 @@
/*
* Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
*
- * Copyright 2007 Freescale Semiconductor Inc.
+ * Copyright 2007,2008 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -9,6 +9,8 @@
* option) any later version.
*/
+/dts-v1/;
+
/ {
model = "pq2fads";
compatible = "fsl,pq2fads";
@@ -21,11 +23,11 @@
cpu@0 {
device_type = "cpu";
- reg = <0>;
- d-cache-line-size = <d#32>;
- i-cache-line-size = <d#32>;
- d-cache-size = <d#16384>;
- i-cache-size = <d#16384>;
+ reg = <0x0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <16384>;
+ i-cache-size = <16384>;
timebase-frequency = <0>;
clock-frequency = <0>;
};
@@ -33,7 +35,7 @@
memory {
device_type = "memory";
- reg = <0 0>;
+ reg = <0x0 0x0>;
};
localbus@f0010100 {
@@ -41,67 +43,67 @@
"fsl,pq2-localbus";
#address-cells = <2>;
#size-cells = <1>;
- reg = <f0010100 60>;
+ reg = <0xf0010100 0x60>;
- ranges = <0 0 fe000000 00800000
- 1 0 f4500000 00008000
- 8 0 f8200000 00008000>;
+ ranges = <0x0 0x0 0xfe000000 0x800000
+ 0x1 0x0 0xf4500000 0x8000
+ 0x8 0x0 0xf8200000 0x8000>;
flash@0,0 {
compatible = "jedec-flash";
- reg = <0 0 800000>;
+ reg = <0x0 0x0 0x800000>;
bank-width = <4>;
device-width = <1>;
};
bcsr@1,0 {
- reg = <1 0 20>;
+ reg = <0x1 0x0 0x20>;
compatible = "fsl,pq2fads-bcsr";
};
PCI_PIC: pic@8,0 {
#interrupt-cells = <1>;
interrupt-controller;
- reg = <8 0 8>;
+ reg = <0x8 0x0 0x8>;
compatible = "fsl,pq2ads-pci-pic";
interrupt-parent = <&PIC>;
- interrupts = <18 8>;
+ interrupts = <24 8>;
};
};
pci@f0010800 {
device_type = "pci";
- reg = <f0010800 10c f00101ac 8 f00101c4 8>;
+ reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
- clock-frequency = <d#66000000>;
- interrupt-map-mask = <f800 0 0 7>;
+ clock-frequency = <66000000>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
/* IDSEL 0x16 */
- b000 0 0 1 &PCI_PIC 0
- b000 0 0 2 &PCI_PIC 1
- b000 0 0 3 &PCI_PIC 2
- b000 0 0 4 &PCI_PIC 3
+ 0xb000 0x0 0x0 0x1 &PCI_PIC 0
+ 0xb000 0x0 0x0 0x2 &PCI_PIC 1
+ 0xb000 0x0 0x0 0x3 &PCI_PIC 2
+ 0xb000 0x0 0x0 0x4 &PCI_PIC 3
/* IDSEL 0x17 */
- b800 0 0 1 &PCI_PIC 4
- b800 0 0 2 &PCI_PIC 5
- b800 0 0 3 &PCI_PIC 6
- b800 0 0 4 &PCI_PIC 7
+ 0xb800 0x0 0x0 0x1 &PCI_PIC 4
+ 0xb800 0x0 0x0 0x2 &PCI_PIC 5
+ 0xb800 0x0 0x0 0x3 &PCI_PIC 6
+ 0xb800 0x0 0x0 0x4 &PCI_PIC 7
/* IDSEL 0x18 */
- c000 0 0 1 &PCI_PIC 8
- c000 0 0 2 &PCI_PIC 9
- c000 0 0 3 &PCI_PIC a
- c000 0 0 4 &PCI_PIC b>;
+ 0xc000 0x0 0x0 0x1 &PCI_PIC 8
+ 0xc000 0x0 0x0 0x2 &PCI_PIC 9
+ 0xc000 0x0 0x0 0x3 &PCI_PIC 10
+ 0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
interrupt-parent = <&PIC>;
- interrupts = <12 8>;
- ranges = <42000000 0 80000000 80000000 0 20000000
- 02000000 0 a0000000 a0000000 0 20000000
- 01000000 0 00000000 f6000000 0 02000000>;
+ interrupts = <18 8>;
+ ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
+ 0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
};
soc@f0000000 {
@@ -109,27 +111,27 @@
#size-cells = <1>;
device_type = "soc";
compatible = "fsl,mpc8280", "fsl,pq2-soc";
- ranges = <00000000 f0000000 00053000>;
+ ranges = <0x0 0xf0000000 0x53000>;
// Temporary -- will go away once kernel uses ranges for get_immrbase().
- reg = <f0000000 00053000>;
+ reg = <0xf0000000 0x53000>;
cpm@119c0 {
#address-cells = <1>;
#size-cells = <1>;
#interrupt-cells = <2>;
compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
- reg = <119c0 30>;
+ reg = <0x119c0 0x30>;
ranges;
muram@0 {
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0 0 10000>;
+ ranges = <0x0 0x0 0x10000>;
data@0 {
compatible = "fsl,cpm-muram-data";
- reg = <0 2000 9800 800>;
+ reg = <0x0 0x2000 0x9800 0x800>;
};
};
@@ -137,53 +139,53 @@
compatible = "fsl,mpc8280-brg",
"fsl,cpm2-brg",
"fsl,cpm-brg";
- reg = <119f0 10 115f0 10>;
+ reg = <0x119f0 0x10 0x115f0 0x10>;
};
serial@11a00 {
device_type = "serial";
compatible = "fsl,mpc8280-scc-uart",
"fsl,cpm2-scc-uart";
- reg = <11a00 20 8000 100>;
- interrupts = <28 8>;
+ reg = <0x11a00 0x20 0x8000 0x100>;
+ interrupts = <40 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <1>;
- fsl,cpm-command = <00800000>;
+ fsl,cpm-command = <0x800000>;
};
serial@11a20 {
device_type = "serial";
compatible = "fsl,mpc8280-scc-uart",
"fsl,cpm2-scc-uart";
- reg = <11a20 20 8100 100>;
- interrupts = <29 8>;
+ reg = <0x11a20 0x20 0x8100 0x100>;
+ interrupts = <41 8>;
interrupt-parent = <&PIC>;
fsl,cpm-brg = <2>;
- fsl,cpm-command = <04a00000>;
+ fsl,cpm-command = <0x4a00000>;
};
ethernet@11320 {
device_type = "network";
compatible = "fsl,mpc8280-fcc-enet",
"fsl,cpm2-fcc-enet";
- reg = <11320 20 8500 100 113b0 1>;
- interrupts = <21 8>;
+ reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
+ interrupts = <33 8>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY0>;
linux,network-index = <0>;
- fsl,cpm-command = <16200300>;
+ fsl,cpm-command = <0x16200300>;
};
ethernet@11340 {
device_type = "network";
compatible = "fsl,mpc8280-fcc-enet",
"fsl,cpm2-fcc-enet";
- reg = <11340 20 8600 100 113d0 1>;
- interrupts = <22 8>;
+ reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>;
+ interrupts = <34 8>;
interrupt-parent = <&PIC>;
phy-handle = <&PHY1>;
linux,network-index = <1>;
- fsl,cpm-command = <1a400300>;
+ fsl,cpm-command = <0x1a400300>;
local-mac-address = [00 e0 0c 00 79 01];
};
@@ -194,21 +196,21 @@
"fsl,cpm2-mdio-bitbang";
#address-cells = <1>;
#size-cells = <0>;
- reg = <10d40 14>;
+ reg = <0x10d40 0x14>;
fsl,mdio-pin = <9>;
- fsl,mdc-pin = <a>;
+ fsl,mdc-pin = <10>;
PHY0: ethernet-phy@0 {
interrupt-parent = <&PIC>;
- interrupts = <19 2>;
- reg = <0>;
+ interrupts = <25 2>;
+ reg = <0x0>;
device_type = "ethernet-phy";
};
PHY1: ethernet-phy@1 {
interrupt-parent = <&PIC>;
- interrupts = <19 2>;
- reg = <3>;
+ interrupts = <25 2>;
+ reg = <0x3>;
device_type = "ethernet-phy";
};
};
@@ -218,17 +220,17 @@
#size-cells = <0>;
compatible = "fsl,mpc8280-usb",
"fsl,cpm2-usb";
- reg = <11b60 18 8b00 100>;
+ reg = <0x11b60 0x18 0x8b00 0x100>;
interrupt-parent = <&PIC>;
- interrupts = <b 8>;
- fsl,cpm-command = <2e600000>;
+ interrupts = <11 8>;
+ fsl,cpm-command = <0x2e600000>;
};
};
PIC: interrupt-controller@10c00 {
#interrupt-cells = <2>;
interrupt-controller;
- reg = <10c00 80>;
+ reg = <0x10c00 0x80>;
compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
};
--
1.5.4.1
^ permalink raw reply related
* Re: RFC: MPC5200 PSC AC97 driver
From: Juergen Beisert @ 2008-04-17 14:41 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <48075D4B.7030501@genesi-usa.com>
On Thursday 17 April 2008 16:23, Matt Sealey wrote:
> Hooray! :)
>
> Does it work, though, with your board?
>
> > - u16 ccr; /* PSC + 0x20 */
> > - u8 reserved7[14];
> > + u32 ccr; /* PSC + 0x20 */
> > + u32 ac97_slots; /* PSC + 0x24 */
>
> I think it should be left noted here that the CCR size changed from
> 16 bits to 32 bits from 5200 to 5200B in order to reduce confusion.
> You may have read the manual but that does not mean that an extra
> small comment would not be appreciated by a lot of people (after
> all who would want to write code for a legacy 5200 device, write
> to psc->ccr and wonder why it explodes?)
Hmm, my board runs an MPC5200B. How can we solve this u16 versus u32 issue =
for=20
both CPUs?
In the oftree one need somthing like that:
// PSC1 is ac97
ac97@2000 {
device_type =3D "sound";
compatible =3D "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
cell-index =3D <0>; // or <1> if it is PSC2! Very important!
reg =3D <2000 100>;
interrupts =3D <2 2 0>;
interrupt-parent =3D <&mpc5200_pic>;
};
Don't know if it uses the current correct content.
Juergen
=2D-=20
Dipl.-Ing. Juergen Beisert | http://www.pengutronix.de
=C2=A0Pengutronix - Linux Solutions for Science and Industry
=C2=A0 Handelsregister: Amtsgericht Hildesheim, HRA 2686
=C2=A0 =C2=A0 =C2=A0 Vertretung Sued/Muenchen, Germany
Phone: +49-8766-939 228 | Fax: +49-5121-206917-9
^ permalink raw reply
* Re: [PATCH v2][POWERPC] qe_lib and ucc_geth: switch to the cpm_muram implementation
From: Timur Tabi @ 2008-04-17 14:32 UTC (permalink / raw)
To: Scott Wood; +Cc: netdev, linuxppc-dev, Jeff Garzik
In-Reply-To: <20080417141043.GA21793@ld0162-tx32.am.freescale.net>
Scott Wood wrote:
> And then change it again when marketing decides that CPM4 will be called
> something other than QE2? :-P
I agree with Scott. The QE is really just CPM3.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
From: Laurent Pinchart @ 2008-04-17 14:23 UTC (permalink / raw)
To: linuxppc-dev, avorontsov; +Cc: Scott Wood
In-Reply-To: <20080416183904.GA23512@polina.dev.rtsoft.ru>
[-- Attachment #1: Type: text/plain, Size: 3745 bytes --]
On Wednesday 16 April 2008 20:39, Anton Vorontsov wrote:
> On Tue, Mar 18, 2008 at 03:48:12PM -0500, Scott Wood wrote:
> [...]
> > How about:
> >
> > struct gtm_timer *gtm_get_specific_timer(struct gtm *gtm, int timer,
> > int width);
> >
> > ...with np->data used by the caller to figure out which gtm pointer to
> > pass in.
>
> Thanks for the comments, I've tried to address them all.
>
> Updated patch below (not for applying, still waiting for further
> comments, if any).
>
> - - - -
> From: Anton Vorontsov <avorontsov@ru.mvista.com>
> Subject: [POWERPC] sysdev,qe_lib: implement FSL GTM support
>
> GTM stands for General-purpose Timers Module and able to generate
> timer{1,2,3,4} interrupts.
>
> There are several limitations in this support:
> 1. Cascaded (32 bit) timers unimplemented (1-2, 3-4).
> This is straightforward to implement when needed, two timers should
> be marked as "requested" and configured as appropriate.
> 2. Super-cascaded (64 bit) timers unimplemented (1-2-3-4).
> This is also straightforward to implement when needed, all timers
> should be marked as "requested" and configured as appropriate.
>
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> ---
> Documentation/powerpc/booting-without-of.txt | 32 +++-
> arch/powerpc/Kconfig | 5 +
> arch/powerpc/sysdev/Makefile | 1 +
> arch/powerpc/sysdev/fsl_gtm.c | 322 ++++++++++++++++++++++++++
> include/asm-powerpc/fsl_gtm.h | 106 +++++++++
> 5 files changed, 465 insertions(+), 1 deletions(-)
> create mode 100644 arch/powerpc/sysdev/fsl_gtm.c
> create mode 100644 include/asm-powerpc/fsl_gtm.h
[snip]
> +/*
> + * This is back-end for the exported functions, it's used to reset single
> + * timer in reference mode.
> + */
> +static int gtm_reset_ref_timer16(struct gtm_timer *tmr, int frequency,
> + int reference_value, bool free_run)
> +{
> + struct gtm *gtm = tmr->gtm;
> + int num = tmr - >m->timers[0];
> + unsigned int prescaler;
> + u8 iclk = GTMDR_ICLK_ICLK;
> + u8 psr;
> + u8 sps;
> + unsigned long flags;
> +
> + prescaler = gtm->clock / frequency;
> + /*
> + * We have two 8 bit prescalers -- primary and secondary (psr, sps),
> + * plus "slow go" mode (clk / 16). So, total prescale value is
> + * 16 * (psr + 1) * (sps + 1).
> + */
> + if (prescaler > 256 * 256 * 16)
> + return -EINVAL;
> +
> + if (prescaler > 256 * 256) {
> + iclk = GTMDR_ICLK_SLGO;
> + prescaler /= 16;
> + }
> +
> + if (prescaler > 256) {
> + psr = 256 - 1;
> + sps = prescaler / 256 - 1;
> + } else {
> + psr = prescaler - 1;
> + sps = 1 - 1;
> + }
Don't forget that the CPM2 doesn't support the primary prescaler.
> + spin_lock_irqsave(>m->lock, flags);
> +
> + /*
> + * Properly reset timers: stop, reset, set up prescalers, reference
> + * value and clear event register.
> + */
> + clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)),
> + GTCFR_STP(num) | GTCFR_RST(num));
> +
> + setbits8(tmr->gtcfr, GTCFR_STP(num));
> +
> + out_be16(tmr->gtpsr, psr);
> + clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) |
> + GTMDR_ORI | (free_run ? GTMDR_FFR : 0));
> + out_be16(tmr->gtcnr, 0);
> + out_be16(tmr->gtrfr, reference_value);
> + out_be16(tmr->gtevr, 0xFFFF);
> +
> + /* Let it be. */
> + clrbits8(tmr->gtcfr, GTCFR_STP(num));
> +
> + spin_unlock_irqrestore(>m->lock, flags);
> +
> + return 0;
> +}
--
Laurent Pinchart
CSE Semaphore Belgium
Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium
T +32 (2) 387 42 59
F +32 (2) 387 42 75
[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* Re: RFC: MPC5200 PSC AC97 driver
From: Matt Sealey @ 2008-04-17 14:23 UTC (permalink / raw)
To: Juergen Beisert; +Cc: linuxppc-dev
In-Reply-To: <200804171619.56615.jbe@pengutronix.de>
Juergen Beisert wrote:
> Hi,
Hooray! :)
Does it work, though, with your board?
> - u16 ccr; /* PSC + 0x20 */
> - u8 reserved7[14];
> + u32 ccr; /* PSC + 0x20 */
> + u32 ac97_slots; /* PSC + 0x24 */
I think it should be left noted here that the CCR size changed from
16 bits to 32 bits from 5200 to 5200B in order to reduce confusion.
You may have read the manual but that does not mean that an extra
small comment would not be appreciated by a lot of people (after
all who would want to write code for a legacy 5200 device, write
to psc->ccr and wonder why it explodes?)
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
^ permalink raw reply
* RFC: MPC5200 PSC AC97 driver
From: Juergen Beisert @ 2008-04-17 14:19 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <200804161324.15887.jbe@pengutronix.de>
Hi,
if someone is interested: Here the full patch to get sound support for
MPC5200b and a current 2.6.25 kernel.
Index: sound/ppc/Kconfig
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
=2D-- sound/ppc/Kconfig.orig 2008-04-17 15:33:27.000000000 +0200
+++ sound/ppc/Kconfig 2008-04-17 15:38:03.000000000 +0200
@@ -53,3 +53,19 @@ config SND_PS3_DEFAULT_START_DELAY
depends on SND_PS3
default "2000"
endmenu
+
+
+# ALSA ppc drivers
+
+menu "ALSA PPC devices"
+ depends on SND!=3Dn && PPC
+
+config SND_PPC_MPC52xx_AC97
+ tristate "Freescale MPC52xx AC97 interface support"
+ depends on SND && PPC_MPC52xx
+ select SND_AC97_CODEC
+ help
+ Say Y or M if you want to support any AC97 codec attached to
+ the Freescqle MPC52xx AC97 interface.
+
+endmenu
Index: sound/ppc/Makefile
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
=2D-- sound/ppc/Makefile.orig 2008-04-17 15:33:27.000000000 +0200
+++ sound/ppc/Makefile 2008-04-17 15:38:03.000000000 +0200
@@ -4,7 +4,9 @@
#
=20
snd-powermac-objs :=3D powermac.o pmac.o awacs.o burgundy.o daca.o tumbler=
=2Eo keywest.o beep.o
+snd-mpc52xx-ac97-objs :=3D mpc52xx_ac97.o
=20
# Toplevel Module Dependency
obj-$(CONFIG_SND_POWERMAC) +=3D snd-powermac.o
obj-$(CONFIG_SND_PS3) +=3D snd_ps3.o
+obj-$(CONFIG_SND_PPC_MPC52xx_AC97) +=3D snd-mpc52xx-ac97.o
Index: sound/ppc/mpc52xx_ac97.c
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
=2D-- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ sound/ppc/mpc52xx_ac97.c 2008-04-17 16:13:46.000000000 +0200
@@ -0,0 +1,807 @@
+/*
+ * Driver for the PSC of the Freescale MPC52xx configured as AC97 interface
+ *
+ *
+ * Copyright (C) 2006 Sylvain Munaut <tnt@246tNt.com>
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/spinlock.h>
+
+#include <sound/core.h>
+#include <sound/initval.h>
+#include <sound/pcm.h>
+#include <sound/pcm_params.h>
+#include <sound/ac97_codec.h>
+
+#include <asm/of_platform.h>
+#include <linux/dma-mapping.h>
+#include <asm/mpc52xx_psc.h>
+
+#include <sysdev/bestcomm/bestcomm.h>
+#include <sysdev/bestcomm/gen_bd.h>
+
+
+#define DRV_NAME "mpc52xx-psc-ac97"
+
+
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+/* Structs / Defines =
*/
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+
+/* Private structure */
+struct mpc52xx_ac97_priv {
+ struct device *dev;
+ resource_size_t mem_start;
+ resource_size_t mem_len;
+ int irq;
+ struct mpc52xx_psc __iomem *psc;
+ struct mpc52xx_psc_fifo __iomem *fifo;
+
+ struct bcom_task *tsk_tx;
+ spinlock_t dma_lock;
+
+ struct snd_card *card;
+ struct snd_pcm *pcm;
+ struct snd_ac97 *ac97;
+
+ struct snd_pcm_substream *substream_playback;
+
+ int period_byte_size;
+ u32 period_start, period_end, period_next_p;
+};
+
+/* Register bit definition (AC97 mode specific) */
+#define PSC_AC97_SLOT_BIT(n) (1<<(12-n))
+#define PSC_AC97_SLOTS_XMIT_SHIFT 16
+#define PSC_AC97_SLOTS_RECV_SHIFT 0
+
+/* Bestcomm options */
+#define AC97_TX_NUM_BD 32
+#define AC97_RX_NUM_BD 32
+
+static int mpc52xx_ac97_tx_fill(struct mpc52xx_ac97_priv *priv)
+{
+ struct snd_pcm_runtime *rt;
+
+ u32 dma_data_ptr;
+
+ rt =3D priv->substream_playback->runtime;
+
+ dma_data_ptr =3D virt_to_phys(rt->dma_area);
+
+ priv->period_byte_size =3D frames_to_bytes(rt, rt->period_size);
+ priv->period_start =3D dma_data_ptr;
+ priv->period_end =3D dma_data_ptr + priv->period_byte_size * rt->periods;
+ priv->period_next_p =3D dma_data_ptr;
+
+ spin_lock(&priv->dma_lock);
+ while (!bcom_queue_full(priv->tsk_tx)) {
+ struct bcom_gen_bd *bd;
+
+ /* Submit a new one */
+ bd =3D (struct bcom_gen_bd *) bcom_prepare_next_buffer(priv->tsk_tx);
+ bd->status =3D priv->period_byte_size;
+ bd->buf_pa =3D priv->period_next_p;
+ bcom_submit_next_buffer(priv->tsk_tx, NULL);
+
+ /* Next pointer */
+ priv->period_next_p +=3D priv->period_byte_size;
+ if (priv->period_next_p >=3D priv->period_end)
+ priv->period_next_p =3D priv->period_start;
+ }
+ spin_unlock(&priv->dma_lock);
+
+ return 0;
+}
+
+
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+/* ISR routine =
*/
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+
+static irqreturn_t mpc52xx_ac97_tx_irq(int irq, void *dev_id)
+{
+ struct mpc52xx_ac97_priv *priv =3D dev_id;
+ struct snd_pcm_runtime *rt;
+ struct bcom_gen_bd *bd;
+
+ rt =3D priv->substream_playback->runtime;
+
+ if (!bcom_buffer_done(priv->tsk_tx)) {
+ dev_dbg(priv->dev, "tx mismatch? Check correct output PSC\n");
+ bcom_disable(priv->tsk_tx);
+ }
+
+ spin_lock(&priv->dma_lock);
+ while (bcom_buffer_done(priv->tsk_tx)) {
+ /* Get the buffer back */
+ bcom_retrieve_buffer(priv->tsk_tx, NULL, NULL);
+
+ /* Submit a new one */
+ bd =3D (struct bcom_gen_bd *) bcom_prepare_next_buffer(priv->tsk_tx);
+ bd->status =3D priv->period_byte_size;
+ bd->buf_pa =3D priv->period_next_p;
+ bcom_submit_next_buffer(priv->tsk_tx, NULL);
+ bcom_enable(priv->tsk_tx);
+
+ /* Next pointer */
+ priv->period_next_p +=3D priv->period_byte_size;
+ if (priv->period_next_p >=3D priv->period_end)
+ priv->period_next_p =3D priv->period_start;
+ }
+ spin_unlock(&priv->dma_lock);
+
+ snd_pcm_period_elapsed(priv->substream_playback);
+
+ return IRQ_HANDLED;
+}
+
+
+static irqreturn_t mpc52xx_ac97_irq(int irq, void *dev_id)
+{
+ struct mpc52xx_ac97_priv *priv =3D dev_id;
+
+ static int icnt =3D 0;
+
+#if 1
+ /* Anti Crash during dev ;) */
+ if ((icnt++) > 5000)
+ out_be16(&priv->psc->mpc52xx_psc_imr, 0);
+#endif
+
+ /* Print statuts */
+ dev_dbg(priv->dev, "isr: %04x", in_be16(&priv->psc->mpc52xx_psc_imr));
+ out_8(&priv->psc->command,MPC52xx_PSC_RST_ERR_STAT);
+
+ return IRQ_HANDLED;
+}
+
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+/* PCM interface =
*/
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+
+/* HW desc */
+
+static struct snd_pcm_hardware mpc52xx_ac97_hw =3D {
+ .info =3D SNDRV_PCM_INFO_INTERLEAVED |
+ SNDRV_PCM_INFO_MMAP |
+ SNDRV_PCM_INFO_MMAP_VALID,
+ .formats =3D SNDRV_PCM_FMTBIT_S32_BE,
+ .rates =3D SNDRV_PCM_RATE_8000_48000,
+ .rate_min =3D 8000,
+ .rate_max =3D 48000,
+ .channels_min =3D 1,
+ .channels_max =3D 2, /* Support for more ? */
+ .buffer_bytes_max =3D 1024*1024,
+ .period_bytes_min =3D 512,
+ .period_bytes_max =3D 16*1024,
+ .periods_min =3D 8,
+ .periods_max =3D 1024,
+ .fifo_size =3D 512,
+};
+
+
+/* Playback */
+
+static int mpc52xx_ac97_playback_open(struct snd_pcm_substream *substream)
+{
+ struct mpc52xx_ac97_priv *priv =3D substream->pcm->private_data;
+
+ dev_dbg(priv->dev, "mpc52xx_ac97_playback_open(%p)\n", substream);
+
+ substream->runtime->hw =3D mpc52xx_ac97_hw;
+
+ priv->substream_playback =3D substream;
+
+ return 0; /* FIXME */
+}
+
+static int mpc52xx_ac97_playback_close(struct snd_pcm_substream *substream)
+{
+ struct mpc52xx_ac97_priv *priv =3D substream->pcm->private_data;
+ dev_dbg(priv->dev, "mpc52xx_ac97_playback_close(%p)\n", substream);
+ priv->substream_playback =3D NULL;
+ return 0; /* FIXME */
+}
+
+static int mpc52xx_ac97_playback_prepare(struct snd_pcm_substream *substre=
am)
+{
+ struct mpc52xx_ac97_priv *priv =3D substream->pcm->private_data;
+
+ dev_dbg(priv->dev, "mpc52xx_ac97_playback_prepare(%p)\n", substream);
+
+ /* FIXME, need a spinlock to protect access */
+ if (substream->runtime->channels =3D=3D 1)
+ out_be32(&priv->psc->ac97_slots, 0x01000000);
+ else
+ out_be32(&priv->psc->ac97_slots, 0x03000000);
+
+ snd_ac97_set_rate(priv->ac97, AC97_PCM_FRONT_DAC_RATE,
+ substream->runtime->rate);
+
+ return 0; /* FIXME */
+}
+
+
+/* Capture */
+
+static int mpc52xx_ac97_capture_open(struct snd_pcm_substream *substream)
+{
+/* struct mpc52xx_ac97_priv *priv =3D substream->pcm->private_data; */
+ return 0; /* FIXME */
+}
+
+static int mpc52xx_ac97_capture_close(struct snd_pcm_substream *substream)
+{
+/* struct mpc52xx_ac97_priv *priv =3D substream->pcm->private_data; */
+ return 0; /* FIXME */
+}
+
+static int
+mpc52xx_ac97_capture_prepare(struct snd_pcm_substream *substream)
+{
+/* struct mpc52xx_ac97_priv *priv =3D substream->pcm->private_data; */
+ return 0; /* FIXME */
+}
+
+
+/* Common */
+
+static int mpc52xx_ac97_hw_params(struct snd_pcm_substream *substream,
+ struct snd_pcm_hw_params *params)
+{
+ struct mpc52xx_ac97_priv *priv =3D substream->pcm->private_data;
+ int rv;
+
+ dev_dbg(priv->dev, "mpc52xx_ac97_hw_params(%p)\n", substream);
+
+ rv =3D snd_pcm_lib_malloc_pages(substream,
+ params_buffer_bytes(params));
+ if (rv < 0) {
+ printk(KERN_ERR "hw params failes\n"); /* FIXME */
+ return rv;
+ }
+
+ dev_dbg(priv->dev, "%d %d %d\n", params_buffer_bytes(params),
+ params_period_bytes(params), params_periods(params));
+
+ return 0;
+}
+
+static int mpc52xx_ac97_hw_free(struct snd_pcm_substream *substream)
+{
+ struct mpc52xx_ac97_priv *priv =3D substream->pcm->private_data;
+
+ dev_dbg(priv->dev, "mpc52xx_ac97_hw_free(%p)\n", substream);
+
+ return snd_pcm_lib_free_pages(substream);
+}
+
+static int mpc52xx_ac97_trigger(struct snd_pcm_substream *substream, int c=
md)
+{
+ struct mpc52xx_ac97_priv *priv =3D substream->pcm->private_data;
+ int rv =3D 0;
+
+ dev_dbg(priv->dev, "mpc52xx_ac97_trigger(%p,%d)\n", substream, cmd);
+
+ switch (cmd) {
+ case SNDRV_PCM_TRIGGER_START:
+ /* Enable TX taks */
+ bcom_gen_bd_tx_reset(priv->tsk_tx);
+ mpc52xx_ac97_tx_fill(priv);
+ bcom_enable(priv->tsk_tx);
+/*
+ out_be16(&priv->psc->mpc52xx_psc_imr, 0x0800); // 0x0100
+ out_be16(&priv->psc->mpc52xx_psc_imr, 0x0100); // 0x0100
+*/
+ /* FIXME: Shouldn't we check for overrun too ? */
+ /* also, shouldn't we just activate TX here ? */
+
+ break;
+
+ case SNDRV_PCM_TRIGGER_STOP:
+ /* Disable TX task */
+ bcom_disable(priv->tsk_tx);
+ out_be16(&priv->psc->mpc52xx_psc_imr, 0x0000); // 0x0100
+
+ break;
+
+ default:
+ rv =3D -EINVAL;
+ }
+
+ /* FIXME */
+ return rv;
+}
+
+static snd_pcm_uframes_t mpc52xx_ac97_pointer(struct snd_pcm_substream *su=
bstream)
+{
+ struct snd_pcm_runtime *runtime =3D substream->runtime;
+ struct mpc52xx_ac97_priv *priv =3D substream->pcm->private_data;
+ u32 count;
+
+ count =3D priv->tsk_tx->bd[priv->tsk_tx->outdex].data[0] - priv->period_s=
tart;
+
+ return bytes_to_frames(runtime, count);
+}
+
+
+/* Ops */
+
+static struct snd_pcm_ops mpc52xx_ac97_playback_ops =3D {
+ .open =3D mpc52xx_ac97_playback_open,
+ .close =3D mpc52xx_ac97_playback_close,
+ .ioctl =3D snd_pcm_lib_ioctl,
+ .hw_params =3D mpc52xx_ac97_hw_params,
+ .hw_free =3D mpc52xx_ac97_hw_free,
+ .prepare =3D mpc52xx_ac97_playback_prepare,
+ .trigger =3D mpc52xx_ac97_trigger,
+ .pointer =3D mpc52xx_ac97_pointer,
+};
+
+static struct snd_pcm_ops mpc52xx_ac97_capture_ops =3D {
+ .open =3D mpc52xx_ac97_capture_open,
+ .close =3D mpc52xx_ac97_capture_close,
+ .ioctl =3D snd_pcm_lib_ioctl,
+ .hw_params =3D mpc52xx_ac97_hw_params,
+ .hw_free =3D mpc52xx_ac97_hw_free,
+ .prepare =3D mpc52xx_ac97_capture_prepare,
+ .trigger =3D mpc52xx_ac97_trigger,
+ .pointer =3D mpc52xx_ac97_pointer,
+};
+
+
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+/* AC97 Bus interface =
*/
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+
+static unsigned short mpc52xx_ac97_bus_read(struct snd_ac97 *ac97,
+ unsigned short reg)
+{
+ struct mpc52xx_ac97_priv *priv =3D ac97->private_data;
+ int timeout;
+ unsigned int val;
+
+ /* Wait for it to be ready */
+ timeout =3D 1000;
+ while ((--timeout) && (in_be16(&priv->psc->mpc52xx_psc_status) &
+ MPC52xx_PSC_SR_CMDSEND) )
+ udelay(10);
+
+ if (!timeout) {
+ printk(KERN_ERR DRV_NAME ": timeout on ac97 bus (rdy)\n");
+ return 0xffff;
+ }
+
+ /* Do the read */
+ out_be32(&priv->psc->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
+
+ /* Wait for the answer */
+ timeout =3D 1000;
+ while ((--timeout) && !(in_be16(&priv->psc->mpc52xx_psc_status) &
+ MPC52xx_PSC_SR_DATA_VAL) )
+ udelay(10);
+
+ if (!timeout) {
+ printk(KERN_ERR DRV_NAME ": timeout on ac97 read (val)\n");
+ return 0xffff;
+ }
+
+ /* Get the data */
+ val =3D in_be32(&priv->psc->ac97_data);
+ if ( ((val>>24) & 0x7f) !=3D reg ) {
+ printk(KERN_ERR DRV_NAME ": reg echo error on ac97 read\n");
+ return 0xffff;
+ }
+ val =3D (val >> 8) & 0xffff;
+
+ return (unsigned short) val;
+}
+
+static void mpc52xx_ac97_bus_write(struct snd_ac97 *ac97,
+ unsigned short reg, unsigned short val)
+{
+ struct mpc52xx_ac97_priv *priv =3D ac97->private_data;
+ int timeout;
+
+ /* Wait for it to be ready */
+ timeout =3D 1000;
+ while ((--timeout) && (in_be16(&priv->psc->mpc52xx_psc_status) &
+ MPC52xx_PSC_SR_CMDSEND) )
+ udelay(10);
+
+ if (!timeout) {
+ printk(KERN_ERR DRV_NAME ": timeout on ac97 write\n");
+ return;
+ }
+
+ /* Write data */
+ out_be32(&priv->psc->ac97_cmd, ((reg & 0x7f) << 24) | (val << 8));
+}
+
+static void mpc52xx_ac97_bus_reset(struct snd_ac97 *ac97)
+{
+ struct mpc52xx_ac97_priv *priv =3D ac97->private_data;
+
+ dev_dbg(priv->dev, "ac97 codec reset\n");
+
+ /* Do a cold reset */
+ /*
+ * Note: This could interfere with some external AC97 mixers, as it
+ * could switch them into test mode, when SYNC or SDATA_OUT are not
+ * low while RES is low!
+ */
+ out_8(&priv->psc->op1, 0x02);
+ udelay(10);
+ out_8(&priv->psc->op0, 0x02);
+ udelay(50);
+
+ /* PSC recover from cold reset (cfr user manual, not sure if useful) */
+ out_be32(&priv->psc->sicr, in_be32(&priv->psc->sicr));
+}
+
+
+static struct snd_ac97_bus_ops mpc52xx_ac97_bus_ops =3D {
+ .read =3D mpc52xx_ac97_bus_read,
+ .write =3D mpc52xx_ac97_bus_write,
+ .reset =3D mpc52xx_ac97_bus_reset,
+};
+
+
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+/* Sound driver setup =
*/
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+
+static int mpc52xx_ac97_setup_pcm(struct mpc52xx_ac97_priv *priv)
+{
+ int rv;
+
+ rv =3D snd_pcm_new(priv->card, DRV_NAME "-pcm", 0, 1, 1, &priv->pcm);
+ if (rv) {
+ dev_dbg(priv->dev, "%s: snd_pcm_new failed\n", DRV_NAME);
+ return rv;
+ }
+
+ rv =3D snd_pcm_lib_preallocate_pages_for_all(priv->pcm,
+ SNDRV_DMA_TYPE_CONTINUOUS, snd_dma_continuous_data(GFP_KERNEL),
+ 128*1024, 128*1024);
+ if (rv) {
+ dev_dbg(priv->dev,
+ "%s: snd_pcm_lib_preallocate_pages_for_all failed\n",
+ DRV_NAME);
+ return rv;
+ }
+
+ snd_pcm_set_ops(priv->pcm, SNDRV_PCM_STREAM_PLAYBACK,
+ &mpc52xx_ac97_playback_ops);
+ snd_pcm_set_ops(priv->pcm, SNDRV_PCM_STREAM_CAPTURE,
+ &mpc52xx_ac97_capture_ops);
+
+ priv->pcm->private_data =3D priv;
+ priv->pcm->info_flags =3D 0;
+
+ strcpy(priv->pcm->name, "Freescale MPC52xx PSC-AC97 PCM");
+
+ return 0;
+}
+
+static int mpc52xx_ac97_setup_mixer(struct mpc52xx_ac97_priv *priv)
+{
+ struct snd_ac97_bus *ac97_bus;
+ struct snd_ac97_template ac97_template;
+ int rv;
+
+ rv =3D snd_ac97_bus(priv->card, 0, &mpc52xx_ac97_bus_ops, NULL, &ac97_bus=
);
+ if (rv) {
+ printk(KERN_ERR DRV_NAME ": snd_ac97_bus failed\n");
+ return rv;
+ }
+
+ memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
+ ac97_template.private_data =3D priv;
+
+ rv =3D snd_ac97_mixer(ac97_bus, &ac97_template, &priv->ac97);
+ if (rv) {
+ printk(KERN_ERR DRV_NAME ": snd_ac97_mixer failed\n");
+ return rv;
+ }
+
+ return 0;
+}
+
+static int mpc52xx_ac97_hwinit(struct mpc52xx_ac97_priv *priv)
+{
+ /* Reset everything first by safety */
+ out_8(&priv->psc->command,MPC52xx_PSC_RST_RX);
+ out_8(&priv->psc->command,MPC52xx_PSC_RST_TX);
+ out_8(&priv->psc->command,MPC52xx_PSC_RST_ERR_STAT);
+
+ /* Do a cold reset of codec */
+ /*
+ * Note: This could interfere with some external AC97 mixers, as it
+ * could switch them into test mode, when SYNC or SDATA_OUT are not
+ * low while RES is low!
+ */
+ out_8(&priv->psc->op1, 0x02);
+ udelay(10);
+ out_8(&priv->psc->op0, 0x02);
+ udelay(50);
+
+ /* Configure AC97 enhanced mode */
+ out_be32(&priv->psc->sicr, 0x03010000);
+
+ /* No slots active */
+ out_be32(&priv->psc->ac97_slots, 0x00000000);
+
+ /* No IRQ */
+ out_be16(&priv->psc->mpc52xx_psc_imr, 0x0000);
+
+ /* FIFO levels */
+ out_8(&priv->fifo->rfcntl, 0x07);
+ out_8(&priv->fifo->tfcntl, 0x07);
+ out_be16(&priv->fifo->rfalarm, 0x80);
+ out_be16(&priv->fifo->tfalarm, 0x80);
+
+ /* Go */
+ out_8(&priv->psc->command,MPC52xx_PSC_TX_ENABLE);
+ out_8(&priv->psc->command,MPC52xx_PSC_RX_ENABLE);
+
+ return 0;
+}
+
+static int mpc52xx_ac97_hwshutdown(struct mpc52xx_ac97_priv *priv)
+{
+ /* No IRQ */
+ out_be16(&priv->psc->mpc52xx_psc_imr, 0x0000);
+
+ /* Disable TB & RX */
+ out_8(&priv->psc->command,MPC52xx_PSC_RST_RX);
+ out_8(&priv->psc->command,MPC52xx_PSC_RST_TX);
+
+ /* FIXME : Reset or put codec in low power ? */
+
+ return 0;
+}
+
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+/* OF Platform Driver =
*/
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+
+static int __devinit
+mpc52xx_ac97_probe(struct of_device *op, const struct of_device_id *match)
+{
+ struct device_node *dn =3D op->node;
+ struct mpc52xx_ac97_priv *priv;
+ struct snd_card *card;
+ struct resource res;
+ int tx_initiator;
+ int rv;
+ const unsigned int *devno;
+
+ dev_dbg(&op->dev, "probing MPC52xx PSC AC97 driver\n");
+
+ /* Get card structure */
+ rv =3D -ENOMEM;
+ card =3D snd_card_new(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
+ THIS_MODULE, sizeof(struct mpc52xx_ac97_priv));
+ if (!card)
+ goto err_early;
+
+ priv =3D card->private_data;
+
+ /* Init our private structure */
+ priv->card =3D card;
+ priv->dev =3D &op->dev;
+
+ /* Get resources (mem,irq,...) */
+ rv =3D of_address_to_resource(dn, 0, &res);
+ if (rv)
+ goto err_early;
+
+ priv->mem_start =3D res.start;
+ priv->mem_len =3D res.end - res.start + 1;
+
+ if (!request_mem_region(priv->mem_start, priv->mem_len, DRV_NAME)) {
+ dev_err(&op->dev, "%s: request_mem_region failed\n", DRV_NAME);
+ rv =3D -EBUSY;
+ goto err_early;
+ }
+
+ priv->psc =3D ioremap(priv->mem_start, priv->mem_len);
+ if (!priv->psc) {
+ dev_err(&op->dev, "%s: ioremap failed\n", DRV_NAME);
+ rv =3D -ENOMEM;
+ goto err_iomap;
+ }
+ /* the fifo starts right after psc ends */
+ priv->fifo =3D (struct mpc52xx_psc_fifo*)&priv->psc[1]; /* FIXME */
+
+ priv->irq =3D irq_of_parse_and_map(dn, 0);
+ if (priv->irq =3D=3D NO_IRQ) {
+ dev_err(&op->dev, "%s: irq_of_parse_and_map failed\n",
+ DRV_NAME);
+ rv =3D -EBUSY;
+ goto err_irqmap;
+ }
+
+ /* Setup Bestcomm tasks */
+ spin_lock_init(&priv->dma_lock);
+
+ /*
+ * PSC1 or PSC2 can be configured for AC97 usage. Select the right
+ * channel, to let the BCOMM unit does its job correctly.
+ */
+ devno =3D of_get_property(dn, "cell-index", NULL);
+ switch (*devno) {
+ case 0: /* PSC1 */
+ tx_initiator =3D 14;
+ break;
+ case 1: /* PSC2 */
+ tx_initiator =3D 12;
+ break;
+ default:
+ dev_dbg(priv->dev, "Unknown PSC unit for AC97 usage!\n");
+ rv =3D -ENODEV;
+ goto err_irq;
+ }
+
+ priv->tsk_tx =3D bcom_gen_bd_tx_init(AC97_TX_NUM_BD,
+ priv->mem_start + sizeof(struct mpc52xx_psc) +
+ offsetof(struct mpc52xx_psc_fifo, tfdata),
+ tx_initiator,
+ 2); /* ipr : FIXME */
+ if (!priv->tsk_tx) {
+ dev_err(&op->dev, "%s: bcom_gen_bd_tx_init failed\n",
+ DRV_NAME);
+ rv =3D -ENOMEM;
+ goto err_bcomm;
+ }
+
+ /* Low level HW Init */
+ mpc52xx_ac97_hwinit(priv);
+
+ /* Request IRQ now that we're 'stable' */
+ rv =3D request_irq(priv->irq, mpc52xx_ac97_irq, 0, DRV_NAME, priv);
+ if (rv < 0) {
+ dev_err(&op->dev, "%s: request_irq failed\n", DRV_NAME);
+ goto err_irqreq;
+ }
+
+ rv =3D request_irq(bcom_get_task_irq(priv->tsk_tx),
+ mpc52xx_ac97_tx_irq, 0, DRV_NAME "_tx", priv);
+ if (rv < 0) {
+ dev_err(&op->dev, "%s: request_irq failed\n", DRV_NAME);
+ goto err_txirqreq;
+ }
+
+ /* Prepare sound stuff */
+ rv =3D mpc52xx_ac97_setup_mixer(priv);
+ if (rv)
+ goto err_late;
+
+ rv =3D mpc52xx_ac97_setup_pcm(priv);
+ if (rv)
+ goto err_late;
+
+ /* Finally register the card */
+ snprintf(card->shortname, sizeof(card->shortname), DRV_NAME);
+ snprintf(card->longname, sizeof(card->longname),
+ "Freescale MPC52xx PSC-AC97 (%s)", card->mixername);
+
+ rv =3D snd_card_register(card);
+ if (rv) {
+ dev_err(&op->dev, "%s: snd_card_register failed\n", DRV_NAME);
+ goto err_late;
+ }
+
+ dev_set_drvdata(&op->dev, priv);
+
+ return 0;
+
+err_late:
+ free_irq(bcom_get_task_irq(priv->tsk_tx), priv);
+err_txirqreq:
+ free_irq(priv->irq, priv);
+err_irqreq:
+ bcom_gen_bd_tx_release(priv->tsk_tx);
+err_bcomm:
+ mpc52xx_ac97_hwshutdown(priv);
+err_irq:
+ irq_dispose_mapping(priv->irq);
+err_irqmap:
+ iounmap(priv->psc);
+err_iomap:
+ release_mem_region(priv->mem_start, priv->mem_len);
+err_early:
+ if (card)
+ snd_card_free(card);
+ return rv;
+}
+
+static int mpc52xx_ac97_remove(struct of_device *op)
+{
+ struct mpc52xx_ac97_priv *priv;
+
+ dev_dbg(&op->dev, "removing MPC52xx PSC AC97 driver\n");
+
+ priv =3D dev_get_drvdata(&op->dev);
+ if (priv) {
+ /* Sound subsys shutdown */
+ snd_card_free(priv->card);
+
+ /* Low level HW shutdown */
+ mpc52xx_ac97_hwshutdown(priv);
+
+ /* Release bestcomm tasks */
+ free_irq(bcom_get_task_irq(priv->tsk_tx), priv);
+ bcom_gen_bd_tx_release(priv->tsk_tx);
+
+ /* Release resources */
+ iounmap(priv->psc);
+ free_irq(priv->irq, priv);
+ irq_dispose_mapping(priv->irq);
+ release_mem_region(priv->mem_start, priv->mem_len);
+ }
+
+ dev_set_drvdata(&op->dev, NULL);
+
+ return 0;
+}
+
+
+static struct of_device_id mpc52xx_ac97_of_match[] =3D {
+ {
+ .type =3D "sound",
+ .compatible =3D "mpc5200b-psc-ac97", /* B only for now */
+ },
+};
+
+static struct of_platform_driver mpc52xx_ac97_of_driver =3D {
+ .owner =3D THIS_MODULE,
+ .name =3D DRV_NAME,
+ .match_table =3D mpc52xx_ac97_of_match,
+ .probe =3D mpc52xx_ac97_probe,
+ .remove =3D mpc52xx_ac97_remove,
+ .driver =3D {
+ .name =3D DRV_NAME,
+ },
+};
+
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+/* Module =
*/
+/* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */
+
+static int __init mpc52xx_ac97_init(void)
+{
+ int rv;
+
+ printk(KERN_INFO "Sound: MPC52xx PSC AC97 driver\n");
+
+ rv =3D of_register_platform_driver(&mpc52xx_ac97_of_driver);
+ if (rv) {
+ printk(KERN_ERR DRV_NAME ": "
+ "of_register_platform_driver failed (%i)\n", rv);
+ return rv;
+ }
+
+ return 0;
+}
+
+static void __exit mpc52xx_ac97_exit(void)
+{
+ of_unregister_platform_driver(&mpc52xx_ac97_of_driver);
+}
+
+module_init(mpc52xx_ac97_init);
+module_exit(mpc52xx_ac97_exit);
+
+MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
+MODULE_DESCRIPTION(DRV_NAME ": Freescale MPC52xx PSC AC97 driver");
+MODULE_LICENSE("GPL");
+
Index: include/asm-powerpc/mpc52xx_psc.h
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
=2D-- include/asm-powerpc/mpc52xx_psc.h.orig 2008-04-17 16:12:09.000000000 =
+0200
+++ include/asm-powerpc/mpc52xx_psc.h 2008-04-17 16:13:38.000000000 +0200
@@ -28,6 +28,10 @@
#define MPC52xx_PSC_MAXNUM 6
=20
/* Programmable Serial Controller (PSC) status register bits */
+#define MPC52xx_PSC_SR_UNEX_RX 0x0001
+#define MPC52xx_PSC_SR_DATA_VAL 0x0002
+#define MPC52xx_PSC_SR_DATA_OVR 0x0004
+#define MPC52xx_PSC_SR_CMDSEND 0x0008
#define MPC52xx_PSC_SR_CDE 0x0080
#define MPC52xx_PSC_SR_RXRDY 0x0100
#define MPC52xx_PSC_SR_RXFULL 0x0200
@@ -132,8 +136,10 @@ struct mpc52xx_psc {
u8 reserved5[3];
u8 ctlr; /* PSC + 0x1c */
u8 reserved6[3];
=2D u16 ccr; /* PSC + 0x20 */
=2D u8 reserved7[14];
+ u32 ccr; /* PSC + 0x20 */
+ u32 ac97_slots; /* PSC + 0x24 */
+ u32 ac97_cmd; /* PSC + 0x28 */
+ u32 ac97_data; /* PSC + 0x2c */
u8 ivr; /* PSC + 0x30 */
u8 reserved8[3];
u8 ip; /* PSC + 0x34 */
Regards,
Juergen
=2D-=20
Dipl.-Ing. Juergen Beisert | http://www.pengutronix.de
=A0Pengutronix - Linux Solutions for Science and Industry
=A0 Handelsregister: Amtsgericht Hildesheim, HRA 2686
=A0 =A0 =A0 Vertretung Sued/Muenchen, Germany
Phone: +49-8766-939 228 | Fax: +49-5121-206917-9
^ permalink raw reply
* Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
From: Scott Wood @ 2008-04-17 14:19 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev
In-Reply-To: <20080417125235.GA32480@polina.dev.rtsoft.ru>
On Thu, Apr 17, 2008 at 04:52:35PM +0400, Anton Vorontsov wrote:
> Heh. Scott, think about it. You have single 16bit timer with variable
> frequency. To use it, you'd better know what exactly precision you need.
Why? I know the timeout I need.
> Then you limited to u16 for the interval for this chosen precision.
>
> Yes, you can implement this:
>
> #define MAX_PRESCALER (256 * 256 * 16)
>
> int gtm_reset_weird_behaving_utimer16(struct gtm_timer *tmr,
> unsigned long long usec,
> bool free_run)
> {
> int freq = 1000000;
> int min_hz2 = (tmr->gtm->freq / MAX_PRESCALER) << 1;
>
> while (!(freq & 1) && !(usec & 1) && freq >= min_hz2) {
> freq >>= 1;
> usec >>= 1;
> }
>
> if (usec > 0xffff)
> return -EINVAL;
>
> return gtm_reset_ref_timer16(tmr, freq, (u16)usec, free_run);
> }
Try something like this:
int gtm_reset_sane_behaving_timer(struct gtm_timer *tmr,
u64 usec, bool free_run)
{
int freq = 1000000;
int min_hz2 = (tmr->gtm->freq / MAX_PRESCALER) << 1;
while (usec > 0xffff && freq >= min_hz2) {
freq >>= 1;
usec >>= 1;
}
if (usec > 0xffff)
return -EINVAL;
return gtm_reset_ref_timer16(tmr, freq, usec, free_run);
}
It could be made faster using cntlzw.
-Scott
^ permalink raw reply
* Re: [PATCH v2][POWERPC] qe_lib and ucc_geth: switch to the cpm_muram implementation
From: Scott Wood @ 2008-04-17 14:10 UTC (permalink / raw)
To: Li Yang; +Cc: netdev, linuxppc-dev, Jeff Garzik, Tabi Timur
In-Reply-To: <989B956029373F45A0B8AF02970818900200750D@zch01exm26.fsl.freescale.net>
On Wed, Apr 16, 2008 at 08:38:19PM -0700, Li Yang wrote:
> It is a good thing to unify the CPM dpram operation and QE muram
> operation. But I'm having concerns about the naming as CPM is an
> obsolete block. Can we change to use the new name QE instead?
And then change it again when marketing decides that CPM4 will be called
something other than QE2? :-P
-Scott
^ permalink raw reply
* Re: [kvm-devel] [PATCH 4 of 4] [KVM POWERPC] PowerPC 440 KVM implementation
From: Christian Ehrhardt @ 2008-04-17 14:00 UTC (permalink / raw)
To: Avi Kivity; +Cc: kvm-ppc-devel, linuxppc-dev, Hollis Blanchard, kvm-devel
In-Reply-To: <4807324F.70202@qumranet.com>
[-- Attachment #1: Type: text/plain, Size: 2137 bytes --]
Avi Kivity wrote:
> Avi Kivity wrote:
>> Hollis Blanchard wrote:
>>> +config KVM
>>> + tristate "Kernel-based Virtual Machine (KVM) support"
>>> + depends on EXPERIMENTAL
>>> + select PREEMPT_NOTIFIERS
>>> + select ANON_INODES
>>> + ---help---
>>> + Support hosting virtualized guest machines. You will also
>>> + need to select one or more of the processor modules below.
>>> +
>>> + This module provides access to the hardware capabilities through
>>> + a character device node named /dev/kvm.
>>> +
>>> + To compile this as a module, choose M here: the module
>>> + will be called kvm.
>>> +
>>> + If unsure, say N.
>>
>> In my ignorance, I set KVM=m on a non-44x build, which then failed.
>> This needs either to depend on 44x, or to be fixed to compile.
>
> Setting 44x, I get
>> AS [M] arch/powerpc/kvm/booke_interrupts.o
>> arch/powerpc/kvm/booke_interrupts.S: Assembler messages:
>> arch/powerpc/kvm/booke_interrupts.S:351: Error: unsupported relocation
>> against VCPU_HOST_TLB
>> arch/powerpc/kvm/booke_interrupts.S:352: Error: unsupported relocation
>> against VCPU_SHADOW_TLB
Afaik we just don't support building kvm as module atm. So a simple and fast solution would be to change the Kconfig options from tristate to bool.
Additionally we still have some cross references between the code build on the two used symbols (KVM&KVM_BOOKE_HOST) which means that we need to ensure that if KVM if configured for powerpc we also select exactly one host implementation. To do so I changed the second option to a choice field which eventually has always selected one suboption.
To ensure that the only existent suboption we have atm can be selected we need the smallest commonality as dependency at the KVM config option which atm put "depends 44x" there.
We can change that once we support modules and/or separate selections.
A patch for that is attached, but I would like to wait for Hollis comments on that before you apply that.
> So further Kconfig restrictions are needed, or perhaps a patch. .config
> attached.
>
>
[...]
--
Grüsse / regards,
Christian Ehrhardt
IBM Linux Technology Center, Open Virtualization
[-- Attachment #2: fix_kvmppc_nomodule_build.diff --]
[-- Type: text/x-patch, Size: 959 bytes --]
--- arch/powerpc/kvm/Kconfig.save 2008-04-17 15:21:54.000000000 +0200
+++ arch/powerpc/kvm/Kconfig 2008-04-17 15:58:52.000000000 +0200
@@ -15,8 +15,8 @@
if VIRTUALIZATION
config KVM
- tristate "Kernel-based Virtual Machine (KVM) support"
- depends on EXPERIMENTAL
+ bool "Kernel-based Virtual Machine (KVM) support"
+ depends on EXPERIMENTAL && 44x
select PREEMPT_NOTIFIERS
select ANON_INODES
---help---
@@ -31,13 +31,22 @@
If unsure, say N.
+choice
+ prompt "KVM host PowerPC processor support"
+ depends on KVM && 44x
+ default KVM_BOOKE_HOST
+ help
+ This option sets the Kind of PowerPC processor to virtualize.
+
config KVM_BOOKE_HOST
- tristate "KVM host support for Book E PowerPC processors"
+ bool "Book E"
depends on KVM && 44x
---help---
Provides host support for KVM on Book E PowerPC processors. Currently
this works on 440 processors only.
+endchoice
+
source drivers/virtio/Kconfig
endif # VIRTUALIZATION
^ permalink raw reply
* [PATCH v6] [POWERPC] 85xx: Add support for relocatble kernel (and booting at non-zero)
From: Kumar Gala @ 2008-04-17 13:41 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
Added support to allow an 85xx kernel to be run from a non-zero physical
address (useful for cooperative asymmetric multiprocessing situations) and
kdump. The support can either be at compile time or runtime
(CONFIG_RELOCATABLE).
If CONFIG_RELOCATABLE is set, than CONFIG_PHYSICAL_START has no meaning.
However, It is will always be used to set the LOAD program header physical
address field in the resulting ELF image.
Currently we are limited to running at a physical address that is module
256M. This is due to how we map TLBs to cover lowmem and should be fixed
up to allow 64M or maybe even 16M alignment in the future. Its considered
an error to try and run a kernel at a non-aligned physical address.
All the magic for this support is accomplished by proper initializating
of the kernel memory subsystem properly and ARCH_PFN_OFFSET.
The use of ARCH_PFN_OFFSET only effects normal memory and not IO mappings.
ioremap uses map_page and isn't effected by ARCH_PFN_OFFSET.
/dev/mem continued to allow access to any physical address in the system
regardless of how CONFIG_PHYSICAL_START is set.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
Updated commit message to include details from email discussion.
Paul, let me know what else we need to do to get this into your tree.
- k
arch/powerpc/Kconfig | 69 ++++++++++++++++++++++++++++++++-
arch/powerpc/kernel/head_fsl_booke.S | 11 +++++
arch/powerpc/kernel/prom.c | 4 ++
arch/powerpc/kernel/setup_64.c | 2 +-
arch/powerpc/mm/fsl_booke_mmu.c | 2 +-
arch/powerpc/mm/init_32.c | 5 ++-
arch/powerpc/mm/init_64.c | 3 +-
arch/powerpc/mm/mem.c | 5 +-
include/asm-powerpc/kdump.h | 5 --
include/asm-powerpc/page.h | 45 ++++++++++++++++++----
include/asm-powerpc/page_32.h | 6 +++
11 files changed, 135 insertions(+), 22 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index d1fe425..e3acccd 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -638,21 +638,76 @@ config LOWMEM_SIZE
hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL
default "0x30000000"
+config RELOCATABLE
+ bool "Build a relocatable kernel (EXPERIMENTAL)"
+ depends on EXPERIMENTAL && ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE
+ help
+ This builds a kernel image that is capable of running at the
+ location the kernel is loaded at (some alignment restrictions may
+ exist).
+
+ One use is for the kexec on panic case where the recovery kernel
+ must live at a different physical address than the primary
+ kernel.
+
+ Note: If CONFIG_RELOCATABLE=y, then the kernel runs from the address
+ it has been loaded at and the compile time physical addresses
+ CONFIG_PHYSICAL_START is ignored. However CONFIG_PHYSICAL_START
+ setting can still be useful to bootwrappers that need to know the
+ load location of the kernel (eg. u-boot/mkimage).
+
+config PAGE_OFFSET_BOOL
+ bool "Set custom page offset address"
+ depends on ADVANCED_OPTIONS
+ help
+ This option allows you to set the kernel virtual address at which
+ the kernel will map low memory. This can be useful in optimizing
+ the virtual memory layout of the system.
+
+ Say N here unless you know what you are doing.
+
+config PAGE_OFFSET
+ hex "Virtual address of memory base" if PAGE_OFFSET_BOOL
+ default "0xc0000000"
+
config KERNEL_START_BOOL
bool "Set custom kernel base address"
depends on ADVANCED_OPTIONS
help
This option allows you to set the kernel virtual address at which
- the kernel will map low memory (the kernel image will be linked at
- this address). This can be useful in optimizing the virtual memory
- layout of the system.
+ the kernel will be loaded. Normally this should match PAGE_OFFSET
+ however there are times (like kdump) that one might not want them
+ to be the same.
Say N here unless you know what you are doing.
config KERNEL_START
hex "Virtual address of kernel base" if KERNEL_START_BOOL
+ default PAGE_OFFSET if PAGE_OFFSET_BOOL
+ default "0xc2000000" if CRASH_DUMP
default "0xc0000000"
+config PHYSICAL_START_BOOL
+ bool "Set physical address where the kernel is loaded"
+ depends on ADVANCED_OPTIONS && FLATMEM && FSL_BOOKE
+ help
+ This gives the physical address where the kernel is loaded.
+
+ Say N here unless you know what you are doing.
+
+config PHYSICAL_START
+ hex "Physical address where the kernel is loaded" if PHYSICAL_START_BOOL
+ default "0x02000000" if PPC_STD_MMU && CRASH_DUMP
+ default "0x00000000"
+
+config PHYSICAL_ALIGN
+ hex
+ default "0x10000000" if FSL_BOOKE
+ help
+ This value puts the alignment restrictions on physical address
+ where kernel is loaded and run from. Kernel is compiled for an
+ address which meets above alignment restriction.
+
config TASK_SIZE_BOOL
bool "Set custom user task size"
depends on ADVANCED_OPTIONS
@@ -699,9 +754,17 @@ config PIN_TLB
endmenu
if PPC64
+config PAGE_OFFSET
+ hex
+ default "0xc000000000000000"
config KERNEL_START
hex
+ default "0xc000000002000000" if CRASH_DUMP
default "0xc000000000000000"
+config PHYSICAL_START
+ hex
+ default "0x02000000" if CRASH_DUMP
+ default "0x00000000"
endif
source "net/Kconfig"
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 9f40b3e..4d0336b 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -368,6 +368,17 @@ skpinv: addi r6,r6,1 /* Increment */
bl early_init
+#ifdef CONFIG_RELOCATABLE
+ lis r3,kernstart_addr@ha
+ la r3,kernstart_addr@l(r3)
+#ifdef CONFIG_PHYS_64BIT
+ stw r23,0(r3)
+ stw r25,4(r3)
+#else
+ stw r25,0(r3)
+#endif
+#endif
+
mfspr r3,SPRN_TLB1CFG
andi. r3,r3,0xfff
lis r4,num_tlbcam_entries@ha
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 8a9359a..39232d9 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -53,6 +53,7 @@
#include <asm/pci-bridge.h>
#include <asm/phyp_dump.h>
#include <asm/kexec.h>
+#include <mm/mmu_decl.h>
#ifdef DEBUG
#define DBG(fmt...) printk(KERN_ERR fmt)
@@ -978,7 +979,10 @@ static int __init early_init_dt_scan_memory(unsigned long node,
}
#endif
lmb_add(base, size);
+
+ memstart_addr = min((u64)memstart_addr, base);
}
+
return 0;
}
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 0205d40..9087e7a 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -431,7 +431,7 @@ void __init setup_system(void)
printk("htab_address = 0x%p\n", htab_address);
printk("htab_hash_mask = 0x%lx\n", htab_hash_mask);
#if PHYSICAL_START > 0
- printk("physical_start = 0x%x\n", PHYSICAL_START);
+ printk("physical_start = 0x%lx\n", PHYSICAL_START);
#endif
printk("-----------------------------------------------------\n");
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index ada249b..ce10e2b 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -202,7 +202,7 @@ adjust_total_lowmem(void)
cam_max_size = max_lowmem_size;
/* adjust lowmem size to max_lowmem_size */
- ram = min(max_lowmem_size, total_lowmem);
+ ram = min(max_lowmem_size, (phys_addr_t)total_lowmem);
/* Calculate CAM values */
__cam0 = 1UL << 2 * (__ilog2(ram) / 2);
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 47325f2..578750e 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -59,7 +59,10 @@ DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
unsigned long total_memory;
unsigned long total_lowmem;
-phys_addr_t memstart_addr;
+phys_addr_t memstart_addr = (phys_addr_t)~0ull;
+EXPORT_SYMBOL(memstart_addr);
+phys_addr_t kernstart_addr;
+EXPORT_SYMBOL(kernstart_addr);
phys_addr_t lowmem_end_addr;
int boot_mapsize;
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 9ea65d9..3be70ec 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -75,7 +75,8 @@
/* max amount of RAM to use */
unsigned long __max_memory;
-phys_addr_t memstart_addr;
+phys_addr_t memstart_addr = ~0;
+phys_addr_t kernstart_addr;
void free_initmem(void)
{
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 16def4d..0062e6b 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -216,7 +216,7 @@ void __init do_init_bootmem(void)
unsigned long total_pages;
int boot_mapsize;
- max_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT;
+ max_low_pfn = max_pfn = lmb_end_of_DRAM() >> PAGE_SHIFT;
total_pages = (lmb_end_of_DRAM() - memstart_addr) >> PAGE_SHIFT;
#ifdef CONFIG_HIGHMEM
total_pages = total_lowmem >> PAGE_SHIFT;
@@ -232,7 +232,8 @@ void __init do_init_bootmem(void)
start = lmb_alloc(bootmap_pages << PAGE_SHIFT, PAGE_SIZE);
- boot_mapsize = init_bootmem(start >> PAGE_SHIFT, total_pages);
+ min_low_pfn = MEMORY_START >> PAGE_SHIFT;
+ boot_mapsize = init_bootmem_node(NODE_DATA(0), start >> PAGE_SHIFT, min_low_pfn, max_low_pfn);
/* Add active regions with valid PFNs */
for (i = 0; i < lmb.memory.cnt; i++) {
diff --git a/include/asm-powerpc/kdump.h b/include/asm-powerpc/kdump.h
index 10e8eb1..f6c93c7 100644
--- a/include/asm-powerpc/kdump.h
+++ b/include/asm-powerpc/kdump.h
@@ -11,16 +11,11 @@
#ifdef CONFIG_CRASH_DUMP
-#define PHYSICAL_START KDUMP_KERNELBASE
#define KDUMP_TRAMPOLINE_START 0x0100
#define KDUMP_TRAMPOLINE_END 0x3000
#define KDUMP_MIN_TCE_ENTRIES 2048
-#else /* !CONFIG_CRASH_DUMP */
-
-#define PHYSICAL_START 0x0
-
#endif /* CONFIG_CRASH_DUMP */
#ifndef __ASSEMBLY__
diff --git a/include/asm-powerpc/page.h b/include/asm-powerpc/page.h
index 6c85060..cffdf0e 100644
--- a/include/asm-powerpc/page.h
+++ b/include/asm-powerpc/page.h
@@ -12,6 +12,7 @@
#include <asm/asm-compat.h>
#include <asm/kdump.h>
+#include <asm/types.h>
/*
* On PPC32 page size is 4K. For PPC64 we support either 4K or 64K software
@@ -42,8 +43,23 @@
*
* The kdump dump kernel is one example where KERNELBASE != PAGE_OFFSET.
*
- * To get a physical address from a virtual one you subtract PAGE_OFFSET,
- * _not_ KERNELBASE.
+ * PAGE_OFFSET is the virtual address of the start of lowmem.
+ *
+ * PHYSICAL_START is the physical address of the start of the kernel.
+ *
+ * MEMORY_START is the physical address of the start of lowmem.
+ *
+ * KERNELBASE, PAGE_OFFSET, and PHYSICAL_START are all configurable on
+ * ppc32 and based on how they are set we determine MEMORY_START.
+ *
+ * For the linear mapping the following equation should be true:
+ * KERNELBASE - PAGE_OFFSET = PHYSICAL_START - MEMORY_START
+ *
+ * Also, KERNELBASE >= PAGE_OFFSET and PHYSICAL_START >= MEMORY_START
+ *
+ * There are two was to determine a physical address from a virtual one:
+ * va = pa + PAGE_OFFSET - MEMORY_START
+ * va = pa + KERNELBASE - PHYSICAL_START
*
* If you want to know something's offset from the start of the kernel you
* should subtract KERNELBASE.
@@ -51,20 +67,33 @@
* If you want to test if something's a kernel address, use is_kernel_addr().
*/
-#define PAGE_OFFSET ASM_CONST(CONFIG_KERNEL_START)
-#define KERNELBASE (PAGE_OFFSET + PHYSICAL_START)
-#define LOAD_OFFSET PAGE_OFFSET
+#define KERNELBASE ASM_CONST(CONFIG_KERNEL_START)
+#define PAGE_OFFSET ASM_CONST(CONFIG_PAGE_OFFSET)
+#define LOAD_OFFSET ASM_CONST((CONFIG_KERNEL_START-CONFIG_PHYSICAL_START))
+
+#if defined(CONFIG_RELOCATABLE) && defined(CONFIG_FLATMEM)
+#ifndef __ASSEMBLY__
+extern phys_addr_t memstart_addr;
+extern phys_addr_t kernstart_addr;
+#endif
+#define PHYSICAL_START kernstart_addr
+#define MEMORY_START memstart_addr
+#else
+#define PHYSICAL_START ASM_CONST(CONFIG_PHYSICAL_START)
+#define MEMORY_START (PHYSICAL_START + PAGE_OFFSET - KERNELBASE)
+#endif
#ifdef CONFIG_FLATMEM
-#define pfn_valid(pfn) ((pfn) < max_mapnr)
+#define ARCH_PFN_OFFSET (MEMORY_START >> PAGE_SHIFT)
+#define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < (ARCH_PFN_OFFSET + max_mapnr))
#endif
#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
-#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET))
-#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET)
+#define __va(x) ((void *)((unsigned long)(x) - PHYSICAL_START + KERNELBASE))
+#define __pa(x) ((unsigned long)(x) + PHYSICAL_START - KERNELBASE)
/*
* Unfortunately the PLT is in the BSS in the PPC32 ELF ABI,
diff --git a/include/asm-powerpc/page_32.h b/include/asm-powerpc/page_32.h
index 51f8134..ebfae53 100644
--- a/include/asm-powerpc/page_32.h
+++ b/include/asm-powerpc/page_32.h
@@ -1,6 +1,12 @@
#ifndef _ASM_POWERPC_PAGE_32_H
#define _ASM_POWERPC_PAGE_32_H
+#if defined(CONFIG_PHYSICAL_ALIGN) && (CONFIG_PHYSICAL_START != 0)
+#if (CONFIG_PHYSICAL_START % CONFIG_PHYSICAL_ALIGN) != 0
+#error "CONFIG_PHYSICAL_START must be a multiple of CONFIG_PHYSICAL_ALIGN"
+#endif
+#endif
+
#define VM_DATA_DEFAULT_FLAGS VM_DATA_DEFAULT_FLAGS32
#ifdef CONFIG_NOT_COHERENT_CACHE
--
1.5.4.1
^ permalink raw reply related
* Re: [PATCH v2][POWERPC] qe_lib and ucc_geth: switch to the cpm_muram implementation
From: Kumar Gala @ 2008-04-17 13:26 UTC (permalink / raw)
To: Li Yang; +Cc: netdev, linuxppc-dev, Wood Scott, Jeff Garzik, Tabi Timur
In-Reply-To: <989B956029373F45A0B8AF02970818900200750D@zch01exm26.fsl.freescale.net>
On Apr 16, 2008, at 10:38 PM, Li Yang wrote:
>> -----Original Message-----
>> From: linuxppc-dev-bounces+leoli=freescale.com@ozlabs.org
>> [mailto:linuxppc-dev-bounces+leoli=freescale.com@ozlabs.org]
>> On Behalf Of Anton Vorontsov
>> Sent: Thursday, April 17, 2008 2:22 AM
>> To: Kumar Gala
>> Cc: Wood Scott; linuxppc-dev@ozlabs.org; Jeff Garzik; Tabi
>> Timur; netdev@vger.kernel.org
>> Subject: [PATCH v2][POWERPC] qe_lib and ucc_geth: switch to
>> the cpm_muramimplementation
>>
>> This is very trivial patch. We're transitioning to the
>> cpm_muram_* calls. That's it.
>
> Hi Anoton,
>
> It is a good thing to unify the CPM dpram operation and QE muram
> operation. But I'm having concerns about the naming as CPM is an
> obsolete block. Can we change to use the new name QE instead?
or at least provide both names by a simple:
#define qe_muram_addr cpm_muram_addr
- k
^ permalink raw reply
* Re: USB on MPC8641D
From: Kumar Gala @ 2008-04-17 13:20 UTC (permalink / raw)
To: John Marc; +Cc: linuxppc-dev
In-Reply-To: <624875.78682.qm@web46013.mail.sp1.yahoo.com>
On Apr 17, 2008, at 3:36 AM, John Marc wrote:
> Hi
> I Have the kernel patches , but no one for the USB.
> The changes for the USB are integrated in the Kernel.
> I am currently looking into the linux BSP for usb
> changes , but unfortunately don't find any major
> chages.
>
> MPC8641 board have one EHCI controller and 3 OHCI
> conroller.
>
> As I am also new to USB , it would be great help, if
> someone give me any idea about the changes in new
> MPC8641 BSP ?
>
> Does freescale fix the PCI Express issue , that makes
> USB works.
>
> I have lots of hope with this forum :-)
>
>
> With Regards
> John
This forum is about the open source kernel and not BSPs kernels from
Freescale or any other provider.
Have you tried a 2.6.24 or 2.6.25 open source kernel for the 8641 and
see if it works w/regards to USB. If not we can help try and figure
out why not.
There have been a number of fixes made to PCIe support on 8641 that
are in the 2.6.24 kernel, I'm guessing some of those might address
whatever issue you're seeing with USB.
- k
^ permalink raw reply
* [PATCH for 2.6.26] Fix the size of qe muram for MPC8568E
From: Haiying Wang @ 2008-04-17 12:56 UTC (permalink / raw)
To: linuxppc-dev
MPC8568E has 64K byte MURAM, so the size should be 0x10000, not 0xc000 in dts.
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
---
arch/powerpc/boot/dts/mpc8568mds.dts | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index c47d69e..a025a8e 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -291,12 +291,12 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,qe-muram", "fsl,cpm-muram";
- ranges = <0x0 0x10000 0xc000>;
+ ranges = <0x0 0x10000 0x10000>;
data-only@0 {
compatible = "fsl,qe-muram-data",
"fsl,cpm-muram-data";
- reg = <0x0 0xc000>;
+ reg = <0x0 0x10000>;
};
};
--
1.5.3.rc3.13.g7ab3
^ permalink raw reply related
* Re: [PATCH 6/8] [POWERPC] sysdev,qe_lib: implement FSL GTM support
From: Anton Vorontsov @ 2008-04-17 12:52 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20080416215821.GA15566@ld0162-tx32.am.freescale.net>
On Wed, Apr 16, 2008 at 04:58:21PM -0500, Scott Wood wrote:
> On Thu, Apr 17, 2008 at 01:00:42AM +0400, Anton Vorontsov wrote:
> > On Wed, Apr 16, 2008 at 01:44:42PM -0500, Scott Wood wrote:
> > > A maximal timeout of ~65 ms is a little low... For use as a wakeup from
> > > sleep mode, I'd like to be able to request timeouts as large as the
> > > hardware allows.
> >
> > That is about precision. You just need to implement gtm_reset_stimer()
> > is you want precision with a seconds, this will run a timer at 1 Hz.
>
> Enh. I'm not crazy about having to call separately named functions,
> rather than have the timer code set the reference clock to the highest
> precision that has the needed range.
Heh. Scott, think about it. You have single 16bit timer with variable
frequency. To use it, you'd better know what exactly precision you need.
Then you limited to u16 for the interval for this chosen precision.
Yes, you can implement this:
#define MAX_PRESCALER (256 * 256 * 16)
int gtm_reset_weird_behaving_utimer16(struct gtm_timer *tmr,
unsigned long long usec,
bool free_run)
{
int freq = 1000000;
int min_hz2 = (tmr->gtm->freq / MAX_PRESCALER) << 1;
while (!(freq & 1) && !(usec & 1) && freq >= min_hz2) {
freq >>= 1;
usec >>= 1;
}
if (usec > 0xffff)
return -EINVAL;
return gtm_reset_ref_timer16(tmr, freq, (u16)usec, free_run);
}
This function (depending on clock-frequency) will work for 1001 usecs,
but will return -EINVAL for 1000001 usecs, thought it will work for
1000000 usecs, and for 333000000 it will work too, but will again
return -EINVAL for 333000010 usecs. I hope this pattern is obvious.
This is really weird behaving, isn't it?
Oh, and later you can drop the 16 suffix and implement the dynamically
chosen cascading, depending if usec argument fits into single/double/quad
timer.
Though, I don't need all this stuff in the FHCI irq handlers, I do know
the precision I want. Like the most of kernel code does.
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH] powerpc: Implement GPIO LIB API on CPM2 Freescale SoC.
From: Jochen Friedrich @ 2008-04-17 12:48 UTC (permalink / raw)
To: Laurent Pinchart; +Cc: linuxppc-dev@ozlabs.org list
In-Reply-To: <200804171408.46533.laurentp@cse-semaphore.com>
Hi Laurent,
> Any preference for common function names ? cpm2_gpio32* might be too
> CPM2-specific for cpm_common.c. cpm_gpio32* is a bit too generic as it
> doesn't support port E on the CPM1.
I would keep the cpm2 name. I'll just add a comment to cpm1.c that
fsl,cpm1-pario-bank32e uses cpm2 layout.
Thanks,
Jochen
^ permalink raw reply
* Re: [PATCH] powerpc: Implement GPIO LIB API on CPM2 Freescale SoC.
From: Jochen Friedrich @ 2008-04-17 12:46 UTC (permalink / raw)
To: Laurent Pinchart; +Cc: linuxppc-dev@ozlabs.org list
In-Reply-To: <200804171408.46533.laurentp@cse-semaphore.com>
Hi Laurent,
> BTW, what's the purpose of the shadow data register in the CPM GPIO chip
> structure ? As the set operation is protected by a spinlock, the only use I
> can think of is to prevent changing bits in the PDAT register for pins
> configured as inputs. Is that correct ? If so this should be clearly
> documented in the code.
It's for pins configured as open drain. See the discussion in:
http://ozlabs.org/pipermail/linuxppc-dev/2008-January/050826.html
Thanks,
Jochen
^ permalink raw reply
* Re: [EFIKA] Really, don't pretend to be CHRP
From: Matt Sealey @ 2008-04-17 12:28 UTC (permalink / raw)
To: David Woodhouse; +Cc: linuxppc-dev, paulus
In-Reply-To: <1208105558.3026.137.camel@pmac.infradead.org>
I thought we were using efika.forth for this in Fedora.
Why don't we just roll all those fixes into prom_efika.c or something
and make it a huge, unwieldy file nice and *seperate* from prom_init.c?
:)
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
David Woodhouse wrote:
> Fedora 9 works on Efika without the separate 'device-tree supplement',
> thanks to the kernel's own fixups. With one exception -- because 'CHRP'
> still appears on the 'machine:' line in /proc/cpuinfo, the installer
> misdetects the platform and misconfigures yaboot, putting it into a PReP
> boot partition instead of in the /boot filesystem where the Efika's
> firmware could find it.
>
> The kernel's fixups for Efika already correct one instance of 'chrp', in
> the 'device_type' property. This fixes it in the 'CODEGEN,description'
> property too, since that's what's exposed to userspace in /proc/cpuinfo.
>
> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
>
> diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
> index 5ab4c84..723422e 100644
> --- a/arch/powerpc/kernel/prom_init.c
> +++ b/arch/powerpc/kernel/prom_init.c
> @@ -2240,6 +2240,14 @@ static void __init fixup_device_tree_efika(void)
> if (rv != PROM_ERROR && (strcmp(prop, "chrp") == 0))
> prom_setprop(node, "/", "device_type", "efika", sizeof("efika"));
>
> + /* CODEGEN,description is exposed in /proc/cpuinfo so
> + fix that too */
> + rv = prom_getprop(node, "CODEGEN,description", prop, sizeof(prop));
> + if (rv != PROM_ERROR && (strstr(prop, "CHRP")))
> + prom_setprop(node, "/", "CODEGEN,description",
> + "Efika 5200B PowerPC System",
> + sizeof("Efika 5200B PowerPC System"));
> +
> /* Fixup bestcomm interrupts property */
> node = call_prom("finddevice", 1, 1, ADDR("/builtin/bestcomm"));
> if (PHANDLE_VALID(node)) {
>
>
>
^ permalink raw reply
* Re: [PATCH] powerpc: Implement GPIO LIB API on CPM2 Freescale SoC.
From: Laurent Pinchart @ 2008-04-17 12:08 UTC (permalink / raw)
To: Jochen Friedrich; +Cc: linuxppc-dev@ozlabs.org list
In-Reply-To: <480732C9.9080800@scram.de>
[-- Attachment #1: Type: text/plain, Size: 1314 bytes --]
On Thursday 17 April 2008 13:21, Jochen Friedrich wrote:
> Hi Laurent,
>
> >> http://patchwork.ozlabs.org/linuxppc/patch?id=16282
> >
> > The link doesn't seem to be related.
>
> http://patchwork.ozlabs.org/linuxppc/patch?id=17490 is the correct one.
Thanks.
> > I'll rework the patch to move CPM2 GPIO support to cpm_common.c. Have you
> > thought about a proper name for the compatible property ?
>
> I would leave cpm_init_par_io() in cpm2.c and just move the other parts.
> - for cpm2, the property fsl,cpm2-pario-bank is correct.
> - for cpm1, i'm thinking of something like fsl,cpm1-pario-bank32b and
fsl,cpm1-pario-bank32e.
Any preference for common function names ? cpm2_gpio32* might be too
CPM2-specific for cpm_common.c. cpm_gpio32* is a bit too generic as it
doesn't support port E on the CPM1.
BTW, what's the purpose of the shadow data register in the CPM GPIO chip
structure ? As the set operation is protected by a spinlock, the only use I
can think of is to prevent changing bits in the PDAT register for pins
configured as inputs. Is that correct ? If so this should be clearly
documented in the code.
--
Laurent Pinchart
CSE Semaphore Belgium
Chaussee de Bruxelles, 732A
B-1410 Waterloo
Belgium
T +32 (2) 387 42 59
F +32 (2) 387 42 75
[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]
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