* Re: [PATCH] [POWERPC] i2c: fix build breakage introduced by OF helpers
From: David Miller @ 2008-04-19 4:09 UTC (permalink / raw)
To: paulus; +Cc: sfr, linux-kernel, linuxppc-dev, i2c, scottwood, khali
In-Reply-To: <18441.28496.84724.411784@cargo.ozlabs.ibm.com>
From: Paul Mackerras <paulus@samba.org>
Date: Sat, 19 Apr 2008 14:04:32 +1000
> Jochen Friedrich writes:
>
> > Fix build breakage introduced in commit
> > "[POWERPC] i2c: OF helpers for the i2c API".
> > If i2c-core is compiled as module, the helper needs to be
> > compiled as module, as well. Rename i2c.c to of_i2c.c to
> > avoid name space conflict.
>
> Actually, since only powerpc has irq_of_parse_and_map, I'm now
> inclined to think that drivers/of/i2c.c should live under arch/powerpc
> for now, or at the least its option should depend on PPC_OF.
I specifically asked for this to not be PPC only so that I
can make use of this infrastructure on sparc64 for I2C devices.
It's OK if this breaks the sparc64 allmodconfig build, I'll take
care of this once it's merged in.
Please merge the PPC tree to Linus soon, so that I can merge
in my sparc64 NUMA bits which depend upon the LMB changesets
in the PPC tree.
Thanks.
^ permalink raw reply
* RE: XPS_LL_TEMAC works correctly?
From: Mohammad Sadegh Sadri @ 2008-04-19 5:06 UTC (permalink / raw)
To: Rick Moleres, Rami WEHBI, linuxppc-embedded
In-Reply-To: <20080414154236.64322C88074@mail166-sin.bigfish.com>
I solved the problem,=20
As i said,=20
problem was : kernel could easily mount the root file system on NFS and beg=
in init , but after that every thing stopped and there was no more progress=
.=20
My problem was with the kernel command line parameters :=20
console=3DttyUL0 console=3Dtty0 root=3D/dev/nfs.......
the second console parameter was the source of the problem, when init is ex=
ecuted, the second parameter caused no more messages to be written on the s=
creen.
I tested using both LL_TEMAC 1.00a and 1.00b , both work well.=20
thanks.
________________________________
> Subject: RE: XPS_LL_TEMAC works correctly?
> Date: Mon, 14 Apr 2008 09:42:33 -0600
> From: Rick.Moleres@xilinx.com
> To: mamsadegh@hotmail.com; rwehbi@wirecom-tech.com; linuxppc-embedded@ozl=
abs.org
>=20
>=20
> There are a couple of bugs in the v1.00b version of xps_ll_temac (one in =
checksum offload, one in multicast address reception). You should try drop=
ping back to v1.00a of the core and give that a try, or if you have EDK 10.=
1 you can move to v1.01a of the core.
>=20
>=20
>=20
> -Rick
>=20
>=20
>=20
> ________________________________
>=20
> From: linuxppc-embedded-bounces+moleres=3Dxilinx.com@ozlabs.org [mailto:l=
inuxppc-embedded-bounces+moleres=3Dxilinx.com@ozlabs.org] On Behalf Of Moha=
mmad Sadegh Sadri
> Sent: Monday, April 14, 2008 3:10 AM
> To: Rami WEHBI; linuxppc-embedded@ozlabs.org
> Subject: RE: XPS_LL_TEMAC works correctly?
>=20
>=20
>=20
> Rami,
>=20
> Thanks for reply,
>=20
> But if u study the kernel log I posted carefully, you can simply see that=
Kernel has mounted the root file system,
> Look at this line in my prev post : VFS: Mounted root (nfs filesystem). t=
hen init has began and after that nothing more happens.
>=20
> the NFS is working correctly and the folder can be mounted easily from ot=
her computers. I personally think that the problem can be with NFS or the r=
oot file system of ELDK.
>=20
> I have done the same things with older versions of EDK using PLB_TEMAC an=
d every thing has worked correctly.
>=20
>=20
> ________________________________
>=20
> Subject: RE: XPS_LL_TEMAC works correctly?
> Date: Mon, 14 Apr 2008 10:31:31 +0200
> From: rwehbi@wirecom-tech.com
> To: mamsadegh@hotmail.com
>=20
> Hi,
>=20
>=20
>=20
> I would suggest that you verify that your system file is already mounted =
on the host PC (where your server NFS is installed), and that the /etc/expo=
rts file (configuration file of the nfs server) permit to your board to mou=
nt the system file.
>=20
>=20
>=20
> example of an /etc/exports file:
>=20
>=20
>=20
> /opt/ml403/rootfs
>=20
> 192.168.206.223/24(rw,no_root_squash,sync,subtree_check)
>=20
>=20
>=20
> where the ip addresse is that of nfs client, and the path indicates where=
I mounted the system file.
>=20
>=20
>=20
> Good luck,
>=20
>=20
>=20
> Rami
>=20
>=20
>=20
> ________________________________
>=20
> De : linuxppc-embedded-bounces+rami.wehbi=3Dwirecom-tech.com@ozlabs.org [=
mailto:linuxppc-embedded-bounces+rami.wehbi=3Dwirecom-tech.com@ozlabs.org] =
De la part de Mohammad Sadegh Sadri
> Envoy=E9 : lundi 14 avril 2008 10:16
> =C0 : linuxppc-embedded@ozlabs.org
> Objet : XPS_LL_TEMAC works correctly?
>=20
> Hi all,
>=20
> Using:
> EDK 9.2.02,
> Xilinx Linux 2.6.24-rc8-xlnx
> XPS_LL_TEMAC version 1.00.b
>=20
> I bring up the Linux kernel on ML403 -Rev04 board,
> LL_TEMAC buffer size 128kbits, and set to use SG DMA
>=20
> I encounter the following messages when the kernel wants to mount the roo=
t file system, as one can see the kernel has mounter the nfs root file syst=
em and init is initiated, but after that a Link carrier lost happens and it=
stops working.
>=20
> is this behavior natural? ( the PC has attansic gigabit ethernet port wit=
h kernel 2.6.24.4 running, nfs works very well in other tests)
>=20
> thanks
>=20
> .............
> eth0: XLlTemac: speed set to 1000Mb/s
> eth0: XLlTemac: Send Threshold =3D 24, Receive Threshold =3D 4
> eth0: XLlTemac: Send Wait bound =3D 254, Receive Wait bound =3D 254
> IP-Config: Complete:
> device=3Deth0, addr=3D10.10.10.11, mask=3D255.255.255.0, gw=3D10.10=
.10.10,
> host=3D10.10.10.11, domain=3D, nis-domain=3D(none),
> bootserver=3D10.10.10.10, rootserver=3D10.10.10.10, rootpath=3D
> Looking up port of RPC 100003/2 on 10.10.10.10
> Looking up port of RPC 100005/1 on 10.10.10.10
> VFS: Mounted root (nfs filesystem).
> Freeing unused kernel memory: 88k init
> eth0: XLlTemac: PHY Link carrier lost.
> eth0: XLlTemac: speed set to 1000Mb/s
> eth0: XLlTemac: PHY Link carrier restored.
> ( KERNEL STOPS WORKING HERE!!!!!!!!)
>=20
>=20
>=20
> ________________________________
>=20
> Sign in today. When you sign in to Windows Live Messenger you could win $=
1000 a day until May 12th. Learn more at SignInAndWIN.ca
>=20
>=20
>=20
> ________________________________
>=20
> Sign in now! Windows Live Messenger is giving you a chance to win $1000 a=
day until May 12th Check out SignInAndWIN.ca today!
_________________________________________________________________
Find hidden words, unscramble celebrity names, or try the ultimate crosswor=
d puzzle with Live Search Games. Play now!
http://g.msn.ca/ca55/212=
^ permalink raw reply
* Re: [PATCH] [POWERPC] i2c: fix build breakage introduced by OF helpers
From: Paul Mackerras @ 2008-04-19 5:22 UTC (permalink / raw)
To: David Miller; +Cc: sfr, linux-kernel, linuxppc-dev, i2c, scottwood, khali
In-Reply-To: <20080418.210933.01471700.davem@davemloft.net>
David Miller writes:
> From: Paul Mackerras <paulus@samba.org>
> Date: Sat, 19 Apr 2008 14:04:32 +1000
>
> > Jochen Friedrich writes:
> >
> > > Fix build breakage introduced in commit
> > > "[POWERPC] i2c: OF helpers for the i2c API".
> > > If i2c-core is compiled as module, the helper needs to be
> > > compiled as module, as well. Rename i2c.c to of_i2c.c to
> > > avoid name space conflict.
> >
> > Actually, since only powerpc has irq_of_parse_and_map, I'm now
> > inclined to think that drivers/of/i2c.c should live under arch/powerpc
> > for now, or at the least its option should depend on PPC_OF.
>
> I specifically asked for this to not be PPC only so that I
> can make use of this infrastructure on sparc64 for I2C devices.
OK.
> It's OK if this breaks the sparc64 allmodconfig build, I'll take
> care of this once it's merged in.
It breaks the sparc32 allmodconfig build, which seems to be a
concern. How do you suggest we fix that?
> Please merge the PPC tree to Linus soon, so that I can merge
> in my sparc64 NUMA bits which depend upon the LMB changesets
> in the PPC tree.
Sure, it's just this sparc32 breakage which is holding me up.
Paul.
^ permalink raw reply
* Re: [PATCH 4/5] [POWERPC] QE: implement support for the GPIO LIB API
From: David Brownell @ 2008-04-19 5:49 UTC (permalink / raw)
To: Anton Vorontsov, Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <20080418190959.GD4407@polina.dev.rtsoft.ru>
On Friday 18 April 2008, Anton Vorontsov wrote:
> On Thu, Apr 17, 2008 at 09:21:40PM -0500, Kumar Gala wrote:
> > On Apr 17, 2008, at 5:41 PM, Anton Vorontsov wrote:
> >>
> >> No problem. Would you prefer this to go under drivers/gpio/ ?
> >
> > Yes that would be better. We actively worked on pull drivers out of
> > arch/ppc back in the day.
I'm not sure I see the problem here. This is precisely
the kind of *non-driver* code that normally (i.e. for
all other Linux platforms I've looked at) *belongs* in
the arch code ... what's the objection to doing it the
same way other platforms do?
And for that matter, why make it optional, via Kconfig,
instead of always configuring it in, along with the GPIO
interrupt support? A quick glance at one of the MPC83xx
chips suggested that QE port IRQ capabilities would be
very chip specific, so I'd expect that GPIO IRQ support
wouldn't naturally move out of the arch tree.
- Dave
> Hi David,
>
> Do we need your Ack to go this through powerpc tree, and if so, could
> you provide one?
>
> Thanks.
>
> Documentation/powerpc/booting-without-of.txt | 34 ++++---
> arch/powerpc/platforms/Kconfig | 2 +
> drivers/gpio/Kconfig | 9 ++
> drivers/gpio/Makefile | 1 +
> drivers/gpio/qe.c | 147 ++++++++++++++++++++++++++
> 5 files changed, 180 insertions(+), 13 deletions(-)
> create mode 100644 drivers/gpio/qe.c
^ permalink raw reply
* Re: [PATCH] [POWERPC] i2c: fix build breakage introduced by OF helpers
From: David Miller @ 2008-04-19 6:11 UTC (permalink / raw)
To: paulus; +Cc: sfr, linux-kernel, linuxppc-dev, i2c, scottwood, khali
In-Reply-To: <18441.33181.511355.338428@cargo.ozlabs.ibm.com>
From: Paul Mackerras <paulus@samba.org>
Date: Sat, 19 Apr 2008 15:22:37 +1000
> David Miller writes:
> > From: Paul Mackerras <paulus@samba.org>
> > Date: Sat, 19 Apr 2008 14:04:32 +1000
> >
> > It's OK if this breaks the sparc64 allmodconfig build, I'll take
> > care of this once it's merged in.
>
> It breaks the sparc32 allmodconfig build, which seems to be a
> concern. How do you suggest we fix that?
I'll fix both sparc64 and sparc32 builds when I merge my sparc
tree in.
^ permalink raw reply
* Re: [PATCH] [POWERPC] i2c: fix build breakage introduced by OF helpers
From: Jean Delvare @ 2008-04-19 9:09 UTC (permalink / raw)
To: David Miller; +Cc: sfr, linux-kernel, linuxppc-dev, paulus, i2c, scottwood
In-Reply-To: <20080418.231128.97404791.davem@davemloft.net>
On Fri, 18 Apr 2008 23:11:28 -0700 (PDT), David Miller wrote:
> From: Paul Mackerras <paulus@samba.org>
> Date: Sat, 19 Apr 2008 15:22:37 +1000
>
> > David Miller writes:
> > > From: Paul Mackerras <paulus@samba.org>
> > > Date: Sat, 19 Apr 2008 14:04:32 +1000
> > >
> > > It's OK if this breaks the sparc64 allmodconfig build, I'll take
> > > care of this once it's merged in.
> >
> > It breaks the sparc32 allmodconfig build, which seems to be a
> > concern. How do you suggest we fix that?
>
> I'll fix both sparc64 and sparc32 builds when I merge my sparc
> tree in.
Guys, you're doing things the wrong way around. Breaking things to fix
them later is not OK, it's a pain for testers and also when bisecting
the kernel. Everything should still work after merging the powerpc
tree. Dave, if you need to loosen the dependency, you should do it
yourself _after_ having changed whatever needs to be in the sparc32 and
sparc64 trees so that loosening the dependency doesn't break anything.
As far as I can see it's only a matter of changing one line in a
Kconfig file, that's not exactly difficult to do it in the right order.
Thanks,
--
Jean Delvare
^ permalink raw reply
* Re: [PATCH] [POWERPC] i2c: fix build breakage introduced by OF helpers
From: David Miller @ 2008-04-19 9:12 UTC (permalink / raw)
To: khali; +Cc: sfr, linux-kernel, linuxppc-dev, paulus, i2c, scottwood
In-Reply-To: <20080419110934.672648e6@hyperion.delvare>
From: Jean Delvare <khali@linux-fr.org>
Date: Sat, 19 Apr 2008 11:09:34 +0200
> Guys, you're doing things the wrong way around. Breaking things to fix
> them later is not OK, it's a pain for testers and also when bisecting
> the kernel. Everything should still work after merging the powerpc
> tree. Dave, if you need to loosen the dependency, you should do it
> yourself _after_ having changed whatever needs to be in the sparc32 and
> sparc64 trees so that loosening the dependency doesn't break anything.
> As far as I can see it's only a matter of changing one line in a
> Kconfig file, that's not exactly difficult to do it in the right order.
Fair enough.
At least don't move this stuff under arch/powerpc as paulus originally
had suggested.
^ permalink raw reply
* Re: [RFC/POWERPC] mpc5200: remove "mpc5200b-*" from compatible lists in dts files
From: Segher Boessenkool @ 2008-04-19 9:23 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, m8
In-Reply-To: <20080418161218.12738.25844.stgit@trillian.secretlab.ca>
> The mpc5200b is a bug fix of the mpc5200 with a few incompatible
> changes.
> By rights, the current dts trees are the most "correct", but in
> practical
> purposes there is no value in the 5200b devices having 2 compatible
> entries for each internal peripheral node. Freescale has done a good
> job
> of documenting exactly where the incompatibilities lie, so it restrict
> the extra compatible properties to devices with *documented* changes.
And what happens when later an "undocumented change" is found? The
device tree should always list the exact version of device used, even
if all clients (i.e., the Linux kernel) only use the less-specific
"compatible" value; that way, if a need to distinguish arises later
(e.g., a model-specific bug workaround), a client can detect the exact
model of device without needing a new device tree (that the client in
general has no control over).
> Removing the extra 'b' fields makes the device trees smaller
That's nice in general, but it hardly overrides more serious concerns.
Segher
^ permalink raw reply
* [PATCH] [POWERPC] 4xx: Add NOR FLASH entries to Canyonlands and Glacier dts
From: Stefan Roese @ 2008-04-19 9:57 UTC (permalink / raw)
To: linuxppc-dev
This patch adds default NOR entries to the AMCC Canyonlands (460EX)
and Glacier (460GT) dts files.
Signed-off-by: Stefan Roese <sr@denx.de>
---
arch/powerpc/boot/dts/canyonlands.dts | 37 +++++++++++++++++++++++++++++++++
arch/powerpc/boot/dts/glacier.dts | 37 +++++++++++++++++++++++++++++++++
2 files changed, 74 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 6f3d38a..3963412 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -142,8 +142,45 @@
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
+ /* ranges property is supplied by U-Boot */
interrupts = <6 4>;
interrupt-parent = <&UIC1>;
+
+ nor_flash@0,0 {
+ compatible = "amd,s29gl512n", "cfi-flash";
+ bank-width = <2>;
+ reg = <0 000000 4000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "kernel";
+ reg = <0 1e0000>;
+ };
+ partition@1e0000 {
+ label = "dtb";
+ reg = <1e0000 20000>;
+ };
+ partition@200000 {
+ label = "ramdisk";
+ reg = <200000 1400000>;
+ };
+ partition@1600000 {
+ label = "jffs2";
+ reg = <1600000 400000>;
+ };
+ partition@1a00000 {
+ label = "user";
+ reg = <1a00000 2560000>;
+ };
+ partition@3f60000 {
+ label = "env";
+ reg = <3f60000 40000>;
+ };
+ partition@3fa0000 {
+ label = "u-boot";
+ reg = <3fa0000 60000>;
+ };
+ };
};
UART0: serial@ef600300 {
diff --git a/arch/powerpc/boot/dts/glacier.dts b/arch/powerpc/boot/dts/glacier.dts
index 958a5ca..0f2fc07 100644
--- a/arch/powerpc/boot/dts/glacier.dts
+++ b/arch/powerpc/boot/dts/glacier.dts
@@ -145,8 +145,45 @@
#address-cells = <2>;
#size-cells = <1>;
clock-frequency = <0>; /* Filled in by U-Boot */
+ /* ranges property is supplied by U-Boot */
interrupts = <6 4>;
interrupt-parent = <&UIC1>;
+
+ nor_flash@0,0 {
+ compatible = "amd,s29gl512n", "cfi-flash";
+ bank-width = <2>;
+ reg = <0 000000 4000000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ partition@0 {
+ label = "kernel";
+ reg = <0 1e0000>;
+ };
+ partition@1e0000 {
+ label = "dtb";
+ reg = <1e0000 20000>;
+ };
+ partition@200000 {
+ label = "ramdisk";
+ reg = <200000 1400000>;
+ };
+ partition@1600000 {
+ label = "jffs2";
+ reg = <1600000 400000>;
+ };
+ partition@1a00000 {
+ label = "user";
+ reg = <1a00000 2560000>;
+ };
+ partition@3f60000 {
+ label = "env";
+ reg = <3f60000 40000>;
+ };
+ partition@3fa0000 {
+ label = "u-boot";
+ reg = <3fa0000 60000>;
+ };
+ };
};
UART0: serial@ef600300 {
--
1.5.5
^ permalink raw reply related
* [PATCH] [POWERPC] 4xx: Fix 460GT support to not enable FPU
From: Stefan Roese @ 2008-04-19 9:57 UTC (permalink / raw)
To: linuxppc-dev
The AMCC 460GT doesn't have an FPU so let's not enable support for it.
Signed-off-by: Stefan Roese <sr@denx.de>
---
arch/powerpc/kernel/cpu_setup_44x.S | 1 -
arch/powerpc/kernel/cputable.c | 4 +---
2 files changed, 1 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S
index 5465e8d..e3623e3 100644
--- a/arch/powerpc/kernel/cpu_setup_44x.S
+++ b/arch/powerpc/kernel/cpu_setup_44x.S
@@ -33,7 +33,6 @@ _GLOBAL(__setup_cpu_440grx)
mtlr r4
blr
_GLOBAL(__setup_cpu_460ex)
-_GLOBAL(__setup_cpu_460gt)
b __init_fpu_44x
_GLOBAL(__setup_cpu_440gx)
_GLOBAL(__setup_cpu_440spe)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 26ffb44..36080d4 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -37,7 +37,6 @@ extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
-extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
@@ -1416,10 +1415,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
.pvr_value = 0x13020000,
.cpu_name = "460GT",
.cpu_features = CPU_FTRS_44X,
- .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+ .cpu_user_features = COMMON_USER_BOOKE,
.icache_bsize = 32,
.dcache_bsize = 32,
- .cpu_setup = __setup_cpu_460gt,
.machine_check = machine_check_440A,
.platform = "ppc440",
},
--
1.5.5
^ permalink raw reply related
* Re: [PATCH] [POWERPC] Port fixmap from x86 and use for kmap_atomic
From: Gerhard Pircher @ 2008-04-19 11:07 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <Pine.LNX.4.64.0804172156390.32124@blarg.am.freescale.net>
-------- Original-Nachricht --------
> Datum: Thu, 17 Apr 2008 21:57:05 -0500 (CDT)
> Von: Kumar Gala <galak@kernel.crashing.org>
> An: Paul Mackerras <paulus@samba.org>
> CC: linuxppc-dev@ozlabs.org
> Betreff: [PATCH] [POWERPC] Port fixmap from x86 and use for kmap_atomic
> The fixmap code from x86 allows us to have compile time virtual addresses
> that we change the physical addresses of at run time.
...
> +/*
> + * Here we define all the compile-time 'special' virtual
> + * addresses. The point is to have a constant address at
> + * compile time, but to set the physical address only
> + * in the boot process. We allocate these special addresses
> + * from the end of virtual memory (0xfffff000) backwards.
> + * Also this lets us do fail-safe vmalloc(), we
> + * can guarantee that these special addresses and
> + * vmalloc()-ed addresses never overlap.
I don't understand how highmem works, but I'm just interested to know, if
this implementation could conflict somehow with the non coherent DMA
implementation in dma-noncoherent.c (which uses address space from
0xff100000 to 0xff300000 for DMA memory).
On the other side could dma-noncoherent.c benefit from fixmaps so that it
isn't necessary to configure a start address for DMA allocations?
Thanks!
best regards,
Gerhard
--
Psst! Geheimtipp: Online Games kostenlos spielen bei den GMX Free Games!
http://games.entertainment.gmx.net/de/entertainment/games/free
^ permalink raw reply
* Re: [PATCH] [POWERPC] i2c: fix build breakage introduced by OF helpers
From: Paul Mackerras @ 2008-04-19 11:45 UTC (permalink / raw)
To: Jean Delvare
Cc: sfr, linux-kernel, linuxppc-dev, i2c, scottwood, David Miller
In-Reply-To: <20080419110934.672648e6@hyperion.delvare>
Jean Delvare writes:
> Guys, you're doing things the wrong way around. Breaking things to fix
> them later is not OK, it's a pain for testers and also when bisecting
> the kernel. Everything should still work after merging the powerpc
> tree. Dave, if you need to loosen the dependency, you should do it
> yourself _after_ having changed whatever needs to be in the sparc32 and
> sparc64 trees so that loosening the dependency doesn't break anything.
> As far as I can see it's only a matter of changing one line in a
> Kconfig file, that's not exactly difficult to do it in the right order.
You're right. I'll put in a dependency on PPC_OF for now and Dave can
take it out once sparc32/64 have irq_of_parse_and_map etc.
Paul.
^ permalink raw reply
* Re: RFC: MPC5200 PSC AC97 driver
From: Matt Sealey @ 2008-04-19 12:02 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <fa686aa40804181553q622b3c1fi7a302712abe79be1@mail.gmail.com>
Grant Likely wrote:
> On Fri, Apr 18, 2008 at 12:11 PM, Matt Sealey <matt@genesi-usa.com> wrote:
>> Juergen Beisert wrote:
> BTW, is anyone trying to shepherd this driver into the ALSA tree? Its
> out of my area of expertise and responsibility, so I haven't been
> pursuing it.
We (well, I) were going to try but we got some oopses; from one thing or another,
but with Juergen's fixes and cell-index in place, now it plays audio.
Now it can be pushed to ALSA on that basis, but I'm still trying to get my
head around where we need to throw patches and if it goes into ALSA Drivers
first or the kernel or both? It's kind of convoluted compared to the ease
of just CC'ing netdev or linux-ide..
If you want to push it, please do, but also I guess it'll need to be bundled
with the cell-index patch for the fixups (we couldn't get it to make the
property for some odd reason) or a change to using addresses in the driver
for PSC selection (Juergen's original patch did this anyway)
--
Matt Sealey <matt@genesi-usa.com>
Genesi, Manager, Developer Relations
^ permalink raw reply
* Re: Patches added to powerpc.git master and powerpc-next branches
From: Paul Mackerras @ 2008-04-19 12:18 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <9CE9EFA8-A303-49C9-B9A2-F62D42F927B7@kernel.crashing.org>
Kumar Gala writes:
> [POWERPC] 85xx: Add support for relocatble kernel (and booting at non-
> zero)
Should be OK to go though probably not in the first batch. I want to
look through it carefully again since it's touching code that is
common to a lot of platforms. The patch description looks reasonable
as to what it explains but the english could use a touch-up here or
there (e.g. "a physical address that is module 256M" doesn't actually
mean anything; "a physical address that is 0 modulo 256M" would be
correct).
> [POWERPC] Port fixmap from x86 and use for kmap_atomic
Once again I want to go through it carefully and understand how it all
works, and in particular understand things like the way it ensures
that the base address for the kmap region is aligned to a 4M boundary
so all the kmap ptes are in a single page (assuming it does :).
Paul.
^ permalink raw reply
* Re: [PATCH] [POWERPC] mpc5200: Switch mpc5200 dts files to dts-v1 format
From: Robert Schwebel @ 2008-04-19 13:36 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, Sascha Hauer, m8, Wolfram Sang
In-Reply-To: <20080418160812.11897.5654.stgit@trillian.secretlab.ca>
On Fri, Apr 18, 2008 at 09:10:04AM -0700, Grant Likely wrote:
> Update dts files to current format
Is it somehow possible that this device tree stuff is *not* changed over
and over again and break everything out there? When people have not even
agreed on basic things like decimal vs. hex numbers, the whole idea
should be developed out-of-tree, then stabilize and *then* be submitted
to the Linux mainline.
Is it also really necessary to change like "gpt" vs. "timer" and "pic"
vs. "interrupt-controller" all the time? If you compare the last
mainline kernels, each one got a fundamental change in the naming, each
time breaking anyone who doesn't have his stuff in the mainline yet.
Sorry, but this is simply annoying, and the whole "the only thing we
have to do is to define it once and be done then" is crap.
Robert
--
Dipl.-Ing. Robert Schwebel | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
Handelsregister: Amtsgericht Hildesheim, HRA 2686
Hannoversche Str. 2, 31134 Hildesheim, Germany
Phone: +49-5121-206917-0 | Fax: +49-5121-206917-9
^ permalink raw reply
* Re: [PATCH 1/2] [v3][POWERPC] refactor dcr code
From: Josh Boyer @ 2008-04-19 14:35 UTC (permalink / raw)
To: Stephen Neuendorffer; +Cc: linuxppc-dev
In-Reply-To: <20080418215513.ACA0C17F007A@mail131-dub.bigfish.com>
On Fri, 18 Apr 2008 14:55:03 -0700
Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> wrote:
> Previously, dcr support was configured at compile time to either using
> MMIO or native dcr instructions. Although this works for most
> platforms, it fails on FPGA platforms:
>
> 1) Systems may include more than one dcr bus.
> 2) Systems may be native dcr capable and still use memory mapped dcr interface.
>
> This patch provides runtime support based on the device trees for the
> case where CONFIG_PPC_DCR_MMIO and CONFIG_PPC_DCR_NATIVE are both
> selected. Previously, this was a poorly defined configuration, which
> happened to provide NATIVE support. The runtime selection is made
> based on the dcr controller having a 'dcr-access-method' attribute
> in the device tree. If only one of the above options is selected,
> then the code uses #defines to select only the used code in order to
> avoid introducing overhead in existing usage.
>
> Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Hi Stephen,
Sorry for the late review. See some comments below. Mostly minor
stuff and I think the general direction here is good.
> diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c
> index 437e48d..d3de0ff 100644
> --- a/arch/powerpc/sysdev/dcr.c
> +++ b/arch/powerpc/sysdev/dcr.c
> @@ -23,6 +23,68 @@
> #include <asm/prom.h>
> #include <asm/dcr.h>
>
> +#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)
> +
> +bool dcr_map_ok_generic(dcr_host_t host)
> +{
> + if (host.type == INVALID)
> + return 0;
> + else if (host.type == NATIVE)
> + return dcr_map_ok_native(host.host.native);
> + else
> + return dcr_map_ok_mmio(host.host.mmio);
> +}
> +EXPORT_SYMBOL_GPL(dcr_map_ok_generic);
> +
> +dcr_host_t dcr_map_generic(struct device_node *dev,
> + unsigned int dcr_n,
> + unsigned int dcr_c)
> +{
> + dcr_host_t host;
> + const char *prop = of_get_property(dev, "dcr-access-method", NULL);
> +
> + if (!strcmp(prop, "native")) {
> + host.type = NATIVE;
> + host.host.native = dcr_map_native(dev, dcr_n, dcr_c);
> + } else if (!strcmp(prop, "mmio")) {
> + host.type = MMIO;
> + host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c);
> + } else
> + host.type = INVALID;
> +
> + return host;
> +}
> +EXPORT_SYMBOL_GPL(dcr_map_generic);
> +
> +void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c)
> +{
> + if (host.type == NATIVE)
> + dcr_unmap_native(host.host.native, dcr_c);
> + else
> + dcr_unmap_mmio(host.host.mmio, dcr_c);
What happens if host.type == INVALID? Same question for the other
accessors in dcr_*_generic.
<snip>
> diff --git a/include/asm-powerpc/dcr-generic.h b/include/asm-powerpc/dcr-generic.h
> new file mode 100644
> index 0000000..0ee74fb
> --- /dev/null
> +++ b/include/asm-powerpc/dcr-generic.h
> @@ -0,0 +1,49 @@
<snip>
> +enum host_type_t {MMIO, NATIVE, INVALID};
Should these be DCR_HOST_MMIO, DCR_HOST_NATIVE, DCR_HOST_INVALID?
I worry about the generic nature of the names.
josh
^ permalink raw reply
* Re: [PATCH 04/15] [PPC] minor irq handler cleanups
From: Kumar Gala @ 2008-04-19 14:57 UTC (permalink / raw)
To: Jeff Garzik; +Cc: Andrew Morton, LKML, linuxppc-dev
In-Reply-To: <633e3f1106fd888b93a0f18c73449fd86054cc05.1208559659.git.jgarzik@redhat.com>
On Apr 18, 2008, at 6:22 PM, Jeff Garzik wrote:
> - whitespace cleanups
>
> - remove pointless prototype (uses always follow func implementation)
>
> - 'irq' argument is often used purely as a local variable. rename
> argument to 'dummy' and define 'irq' as local to make this plain.
>
> - remove pointless casts from void*
>
> This change's main purpose is to prepare for the patchset in
> jgarzik/misc-2.6.git#irq-remove, that explores removal of the
> never-used 'irq' argument in each interrupt handler.
>
> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
arch/ppc is pretty much left for dead at this point. I'm guessing we
will end up removing it 2.6.27 if we follow through with our plans of
killing it this summer.
Acked-by: Kumar Gala <galak@kernel.crashing.org>
- k
^ permalink raw reply
* [PATCH] [PPC] 4xx: Fix arch/ppc 440 builds
From: Josh Boyer @ 2008-04-19 15:26 UTC (permalink / raw)
To: linuxppc-dev
Commit d04ceb3fc294ea2c4f538a04343f3a473953a3b0 moved phys_addr_t definitions
to include/asm-powerpc/types.h. However, arch/ppc 440 builds had a duplicate
definition in include/asm-ppc/mmu.h that caused the build to fail.
This removes the duplicate definition in arch/ppc.
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
---
include/asm-ppc/mmu.h | 2 --
1 file changed, 2 deletions(-)
--- linux-2.6.orig/include/asm-ppc/mmu.h
+++ linux-2.6/include/asm-ppc/mmu.h
@@ -15,10 +15,8 @@
* physical need a larger than native word size type. -Matt
*/
#ifndef CONFIG_PHYS_64BIT
-typedef unsigned long phys_addr_t;
#define PHYS_FMT "%.8lx"
#else
-typedef unsigned long long phys_addr_t;
extern phys_addr_t fixup_bigphys_addr(phys_addr_t, phys_addr_t);
#define PHYS_FMT "%16Lx"
#endif
^ permalink raw reply
* removal of arch/ppc in 2.6.27?
From: Kumar Gala @ 2008-04-19 15:30 UTC (permalink / raw)
To: linuxppc-dev@ozlabs.org list; +Cc: LinuxPPC-Embedded
This is intended as a reminder that we plan on getting rid of arch/ppc
this summer. I'm guessing based on kernel release times that will be
2.6.27. That would mean 2.6.26 will be the last kernel to support
arch/ppc.
If people have boards that like ported over please let us know and
work with us to port this over to arch/powerpc.
Here is a list based on arch/ppc/platforms. Its not intended to be
complete but a general idea of what's left in arch/ppc.
PPC_PREP e6xx
PQ2ADS 82xx in arch/powerpc?
TQM8260 82xx
CPCI690 e6xx/mv64x60
EV64260 e6xx/mv64x60
CHESTNUT e6xx/mv64x60
LOPEC e6xx
KATANA e6xx/mv64x60
HDPU e6xx/mv64x60
MVME5100 e6xx
PAL4 e6xx
POWERPMC250 e6xx
PPLUS e6xx
PRPMC750 e6xx
PRPMC800 e6xx
RADSTONE_PPC7D e6xx
SANDPOINT e6xx
SBC82xx 82xx
SPRUCE e6xx
LITE5200 52xx
EV64360 e6xx/mv64x60
MPC86XADS 8xx in arch/powerpc
MPC885ADS 8xx in arch/powerpc
ADS8272 82xx in arch/powerpc
4xx:
BAMBOO 44x in arch/powerpc
CPCI405 40x
EBONY 44x in arch/powerpc
EP405 40x in arch/powerpc
BUBINGA 40x
LUAN 44x
YUCCA 44x
OCOTEA 44x
REDWOOD_5 40x
REDWOOD_6 40x
SYCAMORE 40x
TAISHAN 44x in arch/powerpc
WALNUT 40x in arch/powerpc
XILINX_ML300 40x
XILINX_ML403 40x
- k
^ permalink raw reply
* Re: [PATCH] [PPC] 4xx: Fix arch/ppc 440 builds
From: Josh Boyer @ 2008-04-19 15:30 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1208618775.6654.12.camel@vader.jdub.homelinux.org>
On Sat, 2008-04-19 at 10:26 -0500, Josh Boyer wrote:
> Commit d04ceb3fc294ea2c4f538a04343f3a473953a3b0 moved phys_addr_t definitions
> to include/asm-powerpc/types.h. However, arch/ppc 440 builds had a duplicate
> definition in include/asm-ppc/mmu.h that caused the build to fail.
>
> This removes the duplicate definition in arch/ppc.
>
> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
Ignore this. The patch is correct but the subject is misleading because
there is another commit that breaks arch/ppc builds for 440.
I'll resend once I fix that as well. I hate arch/ppc.
josh
^ permalink raw reply
* Re: [PATCH] [POWERPC] mpc5200: Switch mpc5200 dts files to dts-v1 format
From: Grant Likely @ 2008-04-19 15:55 UTC (permalink / raw)
To: Robert Schwebel; +Cc: linuxppc-dev, Sascha Hauer, m8, Wolfram Sang
In-Reply-To: <20080419133658.GJ13814@pengutronix.de>
On Sat, Apr 19, 2008 at 7:36 AM, Robert Schwebel
<r.schwebel@pengutronix.de> wrote:
> On Fri, Apr 18, 2008 at 09:10:04AM -0700, Grant Likely wrote:
> > Update dts files to current format
>
> Is it somehow possible that this device tree stuff is *not* changed over
> and over again and break everything out there? When people have not even
> agreed on basic things like decimal vs. hex numbers, the whole idea
> should be developed out-of-tree, then stabilize and *then* be submitted
> to the Linux mainline.
>
> Is it also really necessary to change like "gpt" vs. "timer" and "pic"
> vs. "interrupt-controller" all the time? If you compare the last
> mainline kernels, each one got a fundamental change in the naming, each
> time breaking anyone who doesn't have his stuff in the mainline yet.
>
> Sorry, but this is simply annoying, and the whole "the only thing we
> have to do is to define it once and be done then" is crap.
Changing to dts-v1 does *not* break old stuff. It is just a source
format change.
Neither does the RFC patch for removing the fsl,mpc5200b- compatible strings.
I have no intention of breaking older device trees.
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* [PATCH] [PPC] Remove mpc8272 ads board from arch/ppc
From: Kumar Gala @ 2008-04-19 15:52 UTC (permalink / raw)
To: linuxppc-dev
We have a board port in arch/powerpc so we dont need this one anymore.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
Will push via git tree. Removed defconfig diff to shorten patch.
arch/ppc/8260_io/fcc_enet.c | 19 +-
arch/ppc/Kconfig | 19 +-
arch/ppc/configs/ads8272_defconfig | 930 ---------------------------------
arch/ppc/platforms/Makefile | 2 -
arch/ppc/platforms/mpc8272ads_setup.c | 367 -------------
arch/ppc/platforms/pq2ads.c | 53 --
arch/ppc/platforms/pq2ads.h | 94 ----
arch/ppc/platforms/pq2ads_pd.h | 32 --
arch/ppc/syslib/m8260_setup.c | 6 -
arch/ppc/syslib/m82xx_pci.c | 38 --
include/asm-ppc/mpc8260.h | 4 -
11 files changed, 2 insertions(+), 1562 deletions(-)
delete mode 100644 arch/ppc/configs/ads8272_defconfig
delete mode 100644 arch/ppc/platforms/mpc8272ads_setup.c
delete mode 100644 arch/ppc/platforms/pq2ads.c
delete mode 100644 arch/ppc/platforms/pq2ads.h
delete mode 100644 arch/ppc/platforms/pq2ads_pd.h
diff --git a/arch/ppc/8260_io/fcc_enet.c b/arch/ppc/8260_io/fcc_enet.c
index bcc3aa9..d38b57e 100644
--- a/arch/ppc/8260_io/fcc_enet.c
+++ b/arch/ppc/8260_io/fcc_enet.c
@@ -165,9 +165,6 @@ static int fcc_enet_set_mac_address(struct net_device *dev, void *addr);
#ifdef CONFIG_SBC82xx
#define F1_RXCLK 9
#define F1_TXCLK 10
-#elif defined(CONFIG_ADS8272)
-#define F1_RXCLK 11
-#define F1_TXCLK 10
#else
#define F1_RXCLK 12
#define F1_TXCLK 11
@@ -175,13 +172,8 @@ static int fcc_enet_set_mac_address(struct net_device *dev, void *addr);
/* FCC2 Clock Source Configuration. There are board specific.
Can only choose from CLK13-16 */
-#ifdef CONFIG_ADS8272
-#define F2_RXCLK 15
-#define F2_TXCLK 16
-#else
#define F2_RXCLK 13
#define F2_TXCLK 14
-#endif
/* FCC3 Clock Source Configuration. There are board specific.
Can only choose from CLK13-16 */
@@ -289,10 +281,7 @@ static int fcc_enet_set_mac_address(struct net_device *dev, void *addr);
/* TQM8260 has MDIO and MDCK on PC30 and PC31 respectively */
#define PC_MDIO ((uint)0x00000002)
#define PC_MDCK ((uint)0x00000001)
-#elif defined(CONFIG_ADS8272)
-#define PC_MDIO ((uint)0x00002000)
-#define PC_MDCK ((uint)0x00001000)
-#elif defined(CONFIG_EST8260) || defined(CONFIG_ADS8260) || defined(CONFIG_PQ2FADS)
+#elif defined(CONFIG_EST8260) || defined(CONFIG_ADS8260)
#define PC_MDIO ((uint)0x00400000)
#define PC_MDCK ((uint)0x00200000)
#else
@@ -2118,11 +2107,6 @@ init_fcc_startup(fcc_info_t *fip, struct net_device *dev)
printk("Can't get FCC IRQ %d\n", fip->fc_interrupt);
#ifdef PHY_INTERRUPT
-#ifdef CONFIG_ADS8272
- if (request_irq(PHY_INTERRUPT, mii_link_interrupt, IRQF_SHARED,
- "mii", dev) < 0)
- printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT);
-#else
/* Make IRQn edge triggered. This does not work if PHY_INTERRUPT is
* on Port C.
*/
@@ -2132,7 +2116,6 @@ init_fcc_startup(fcc_info_t *fip, struct net_device *dev)
if (request_irq(PHY_INTERRUPT, mii_link_interrupt, 0,
"mii", dev) < 0)
printk(KERN_CRIT "Can't get MII IRQ %d\n", PHY_INTERRUPT);
-#endif
#endif /* PHY_INTERRUPT */
/* Set GFMR to enable Ethernet operating mode.
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index abc877f..3fc45e2 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -666,9 +666,6 @@ config TQM8260
End of Life: not yet :-)
URL: <http://www.denx.de/PDF/TQM82xx_SPEC_Rev005.pdf>
-config ADS8272
- bool "ADS8272"
-
config PQ2FADS
bool "Freescale-PQ2FADS"
help
@@ -698,11 +695,6 @@ config EV64360
platform.
endchoice
-config PQ2ADS
- bool
- depends on ADS8272
- default y
-
config TQM8xxL
bool
depends on 8xx && (TQM823L || TQM850L || FPS850L || TQM855L || TQM860L)
@@ -725,15 +717,6 @@ config 8260
this option means that you wish to build a kernel for a machine with
an 8260 class CPU.
-config 8272
- bool
- depends on 6xx
- default y if ADS8272
- select 8260
- help
- The MPC8272 CPM has a different internal dpram setup than other CPM2
- devices
-
config CPM1
bool
depends on 8xx
@@ -1069,7 +1052,7 @@ config PCI_8260
config 8260_PCI9
bool "Enable workaround for MPC826x erratum PCI 9"
- depends on PCI_8260 && !ADS8272
+ depends on PCI_8260
default y
choice
diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile
index 40f53fb..ef74a7b 100644
--- a/arch/ppc/platforms/Makefile
+++ b/arch/ppc/platforms/Makefile
@@ -4,7 +4,6 @@
obj-$(CONFIG_PPC_PREP) += prep_pci.o prep_setup.o
obj-$(CONFIG_PREP_RESIDUAL) += residual.o
-obj-$(CONFIG_PQ2ADS) += pq2ads.o
obj-$(CONFIG_TQM8260) += tqm8260_setup.o
obj-$(CONFIG_CPCI690) += cpci690.o
obj-$(CONFIG_EV64260) += ev64260.o
@@ -26,4 +25,3 @@ obj-$(CONFIG_LITE5200) += lite5200.o
obj-$(CONFIG_EV64360) += ev64360.o
obj-$(CONFIG_MPC86XADS) += mpc866ads_setup.o
obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o
-obj-$(CONFIG_ADS8272) += mpc8272ads_setup.o
diff --git a/arch/ppc/platforms/mpc8272ads_setup.c b/arch/ppc/platforms/mpc8272ads_setup.c
deleted file mode 100644
index 47f4b38..0000000
--- a/arch/ppc/platforms/mpc8272ads_setup.c
+++ /dev/null
@@ -1,367 +0,0 @@
-/*
- * arch/ppc/platforms/mpc8272ads_setup.c
- *
- * MPC82xx Board-specific PlatformDevice descriptions
- *
- * 2005 (c) MontaVista Software, Inc.
- * Vitaly Bordug <vbordug@ru.mvista.com>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/device.h>
-#include <linux/ioport.h>
-#include <linux/fs_enet_pd.h>
-#include <linux/platform_device.h>
-#include <linux/phy.h>
-
-#include <asm/io.h>
-#include <asm/mpc8260.h>
-#include <asm/cpm2.h>
-#include <asm/immap_cpm2.h>
-#include <asm/irq.h>
-#include <asm/ppc_sys.h>
-#include <asm/ppcboot.h>
-#include <linux/fs_uart_pd.h>
-
-#include "pq2ads_pd.h"
-
-static void init_fcc1_ioports(struct fs_platform_info*);
-static void init_fcc2_ioports(struct fs_platform_info*);
-static void init_scc1_uart_ioports(struct fs_uart_platform_info*);
-static void init_scc4_uart_ioports(struct fs_uart_platform_info*);
-
-static struct fs_uart_platform_info mpc8272_uart_pdata[] = {
- [fsid_scc1_uart] = {
- .init_ioports = init_scc1_uart_ioports,
- .fs_no = fsid_scc1_uart,
- .brg = 1,
- .tx_num_fifo = 4,
- .tx_buf_size = 32,
- .rx_num_fifo = 4,
- .rx_buf_size = 32,
- },
- [fsid_scc4_uart] = {
- .init_ioports = init_scc4_uart_ioports,
- .fs_no = fsid_scc4_uart,
- .brg = 4,
- .tx_num_fifo = 4,
- .tx_buf_size = 32,
- .rx_num_fifo = 4,
- .rx_buf_size = 32,
- },
-};
-
-static struct fs_mii_bb_platform_info m82xx_mii_bb_pdata = {
- .mdio_dat.bit = 18,
- .mdio_dir.bit = 18,
- .mdc_dat.bit = 19,
- .delay = 1,
-};
-
-static struct fs_platform_info mpc82xx_enet_pdata[] = {
- [fsid_fcc1] = {
- .fs_no = fsid_fcc1,
- .cp_page = CPM_CR_FCC1_PAGE,
- .cp_block = CPM_CR_FCC1_SBLOCK,
-
- .clk_trx = (PC_F1RXCLK | PC_F1TXCLK),
- .clk_route = CMX1_CLK_ROUTE,
- .clk_mask = CMX1_CLK_MASK,
- .init_ioports = init_fcc1_ioports,
-
- .mem_offset = FCC1_MEM_OFFSET,
-
- .rx_ring = 32,
- .tx_ring = 32,
- .rx_copybreak = 240,
- .use_napi = 0,
- .napi_weight = 17,
- .bus_id = "0:00",
- },
- [fsid_fcc2] = {
- .fs_no = fsid_fcc2,
- .cp_page = CPM_CR_FCC2_PAGE,
- .cp_block = CPM_CR_FCC2_SBLOCK,
- .clk_trx = (PC_F2RXCLK | PC_F2TXCLK),
- .clk_route = CMX2_CLK_ROUTE,
- .clk_mask = CMX2_CLK_MASK,
- .init_ioports = init_fcc2_ioports,
-
- .mem_offset = FCC2_MEM_OFFSET,
-
- .rx_ring = 32,
- .tx_ring = 32,
- .rx_copybreak = 240,
- .use_napi = 0,
- .napi_weight = 17,
- .bus_id = "0:03",
- },
-};
-
-static void init_fcc1_ioports(struct fs_platform_info* pdata)
-{
- struct io_port *io;
- u32 tempval;
- cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
- u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
-
- io = &immap->im_ioport;
-
- /* Enable the PHY */
- clrbits32(bcsr, BCSR1_FETHIEN);
- setbits32(bcsr, BCSR1_FETH_RST);
-
- /* FCC1 pins are on port A/C. */
- /* Configure port A and C pins for FCC1 Ethernet. */
-
- tempval = in_be32(&io->iop_pdira);
- tempval &= ~PA1_DIRA0;
- tempval |= PA1_DIRA1;
- out_be32(&io->iop_pdira, tempval);
-
- tempval = in_be32(&io->iop_psora);
- tempval &= ~PA1_PSORA0;
- tempval |= PA1_PSORA1;
- out_be32(&io->iop_psora, tempval);
-
- setbits32(&io->iop_ppara,PA1_DIRA0 | PA1_DIRA1);
-
- /* Alter clocks */
- tempval = PC_F1TXCLK|PC_F1RXCLK;
-
- clrbits32(&io->iop_psorc, tempval);
- clrbits32(&io->iop_pdirc, tempval);
- setbits32(&io->iop_pparc, tempval);
-
- clrbits32(&immap->im_cpmux.cmx_fcr, CMX1_CLK_MASK);
- setbits32(&immap->im_cpmux.cmx_fcr, CMX1_CLK_ROUTE);
- iounmap(bcsr);
- iounmap(immap);
-}
-
-static void init_fcc2_ioports(struct fs_platform_info* pdata)
-{
- cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
- u32 *bcsr = ioremap(BCSR_ADDR+12, sizeof(u32));
-
- struct io_port *io;
- u32 tempval;
-
- immap = cpm2_immr;
-
- io = &immap->im_ioport;
-
- /* Enable the PHY */
- clrbits32(bcsr, BCSR3_FETHIEN2);
- setbits32(bcsr, BCSR3_FETH2_RST);
-
- /* FCC2 are port B/C. */
- /* Configure port A and C pins for FCC2 Ethernet. */
-
- tempval = in_be32(&io->iop_pdirb);
- tempval &= ~PB2_DIRB0;
- tempval |= PB2_DIRB1;
- out_be32(&io->iop_pdirb, tempval);
-
- tempval = in_be32(&io->iop_psorb);
- tempval &= ~PB2_PSORB0;
- tempval |= PB2_PSORB1;
- out_be32(&io->iop_psorb, tempval);
-
- setbits32(&io->iop_pparb,PB2_DIRB0 | PB2_DIRB1);
-
- tempval = PC_F2RXCLK|PC_F2TXCLK;
-
- /* Alter clocks */
- clrbits32(&io->iop_psorc,tempval);
- clrbits32(&io->iop_pdirc,tempval);
- setbits32(&io->iop_pparc,tempval);
-
- clrbits32(&immap->im_cpmux.cmx_fcr, CMX2_CLK_MASK);
- setbits32(&immap->im_cpmux.cmx_fcr, CMX2_CLK_ROUTE);
-
- iounmap(bcsr);
- iounmap(immap);
-}
-
-
-static void __init mpc8272ads_fixup_enet_pdata(struct platform_device *pdev,
- int idx)
-{
- bd_t* bi = (void*)__res;
- int fs_no = fsid_fcc1+pdev->id-1;
-
- if(fs_no >= ARRAY_SIZE(mpc82xx_enet_pdata)) {
- return;
- }
-
- mpc82xx_enet_pdata[fs_no].dpram_offset=
- (u32)cpm2_immr->im_dprambase;
- mpc82xx_enet_pdata[fs_no].fcc_regs_c =
- (u32)cpm2_immr->im_fcc_c;
- memcpy(&mpc82xx_enet_pdata[fs_no].macaddr,bi->bi_enetaddr,6);
-
- /* prevent dup mac */
- if(fs_no == fsid_fcc2)
- mpc82xx_enet_pdata[fs_no].macaddr[5] ^= 1;
-
- pdev->dev.platform_data = &mpc82xx_enet_pdata[fs_no];
-}
-
-static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev,
- int idx)
-{
- bd_t *bd = (bd_t *) __res;
- struct fs_uart_platform_info *pinfo;
- int num = ARRAY_SIZE(mpc8272_uart_pdata);
- int id = fs_uart_id_scc2fsid(idx);
-
- /* no need to alter anything if console */
- if ((id < num) && (!pdev->dev.platform_data)) {
- pinfo = &mpc8272_uart_pdata[id];
- pinfo->uart_clk = bd->bi_intfreq;
- pdev->dev.platform_data = pinfo;
- }
-}
-
-static void init_scc1_uart_ioports(struct fs_uart_platform_info* pdata)
-{
- cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
-
- /* SCC1 is only on port D */
- setbits32(&immap->im_ioport.iop_ppard,0x00000003);
- clrbits32(&immap->im_ioport.iop_psord,0x00000001);
- setbits32(&immap->im_ioport.iop_psord,0x00000002);
- clrbits32(&immap->im_ioport.iop_pdird,0x00000001);
- setbits32(&immap->im_ioport.iop_pdird,0x00000002);
-
- /* Wire BRG1 to SCC1 */
- clrbits32(&immap->im_cpmux.cmx_scr,0x00ffffff);
-
- iounmap(immap);
-}
-
-static void init_scc4_uart_ioports(struct fs_uart_platform_info* pdata)
-{
- cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
-
- setbits32(&immap->im_ioport.iop_ppard,0x00000600);
- clrbits32(&immap->im_ioport.iop_psord,0x00000600);
- clrbits32(&immap->im_ioport.iop_pdird,0x00000200);
- setbits32(&immap->im_ioport.iop_pdird,0x00000400);
-
- /* Wire BRG4 to SCC4 */
- clrbits32(&immap->im_cpmux.cmx_scr,0x000000ff);
- setbits32(&immap->im_cpmux.cmx_scr,0x0000001b);
-
- iounmap(immap);
-}
-
-static void __init mpc8272ads_fixup_mdio_pdata(struct platform_device *pdev,
- int idx)
-{
- m82xx_mii_bb_pdata.irq[0] = PHY_INTERRUPT;
- m82xx_mii_bb_pdata.irq[1] = PHY_POLL;
- m82xx_mii_bb_pdata.irq[2] = PHY_POLL;
- m82xx_mii_bb_pdata.irq[3] = PHY_INTERRUPT;
- m82xx_mii_bb_pdata.irq[31] = PHY_POLL;
-
-
- m82xx_mii_bb_pdata.mdio_dat.offset =
- (u32)&cpm2_immr->im_ioport.iop_pdatc;
-
- m82xx_mii_bb_pdata.mdio_dir.offset =
- (u32)&cpm2_immr->im_ioport.iop_pdirc;
-
- m82xx_mii_bb_pdata.mdc_dat.offset =
- (u32)&cpm2_immr->im_ioport.iop_pdatc;
-
-
- pdev->dev.platform_data = &m82xx_mii_bb_pdata;
-}
-
-static int mpc8272ads_platform_notify(struct device *dev)
-{
- static const struct platform_notify_dev_map dev_map[] = {
- {
- .bus_id = "fsl-cpm-fcc",
- .rtn = mpc8272ads_fixup_enet_pdata,
- },
- {
- .bus_id = "fsl-cpm-scc:uart",
- .rtn = mpc8272ads_fixup_uart_pdata,
- },
- {
- .bus_id = "fsl-bb-mdio",
- .rtn = mpc8272ads_fixup_mdio_pdata,
- },
- {
- .bus_id = NULL
- }
- };
- platform_notify_map(dev_map,dev);
-
- return 0;
-
-}
-
-int __init mpc8272ads_init(void)
-{
- printk(KERN_NOTICE "mpc8272ads: Init\n");
-
- platform_notify = mpc8272ads_platform_notify;
-
- ppc_sys_device_initfunc();
-
- ppc_sys_device_disable_all();
- ppc_sys_device_enable(MPC82xx_CPM_FCC1);
- ppc_sys_device_enable(MPC82xx_CPM_FCC2);
-
- /* to be ready for console, let's attach pdata here */
-#ifdef CONFIG_SERIAL_CPM_SCC1
- ppc_sys_device_setfunc(MPC82xx_CPM_SCC1, PPC_SYS_FUNC_UART);
- ppc_sys_device_enable(MPC82xx_CPM_SCC1);
-
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC4
- ppc_sys_device_setfunc(MPC82xx_CPM_SCC4, PPC_SYS_FUNC_UART);
- ppc_sys_device_enable(MPC82xx_CPM_SCC4);
-#endif
-
- ppc_sys_device_enable(MPC82xx_MDIO_BB);
-
- return 0;
-}
-
-/*
- To prevent confusion, console selection is gross:
- by 0 assumed SCC1 and by 1 assumed SCC4
- */
-struct platform_device* early_uart_get_pdev(int index)
-{
- bd_t *bd = (bd_t *) __res;
- struct fs_uart_platform_info *pinfo;
-
- struct platform_device* pdev = NULL;
- if(index) { /*assume SCC4 here*/
- pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC4];
- pinfo = &mpc8272_uart_pdata[fsid_scc4_uart];
- } else { /*over SCC1*/
- pdev = &ppc_sys_platform_devices[MPC82xx_CPM_SCC1];
- pinfo = &mpc8272_uart_pdata[fsid_scc1_uart];
- }
-
- pinfo->uart_clk = bd->bi_intfreq;
- pdev->dev.platform_data = pinfo;
- ppc_sys_fixup_mem_resource(pdev, CPM_MAP_ADDR);
- return NULL;
-}
-
-arch_initcall(mpc8272ads_init);
diff --git a/arch/ppc/platforms/pq2ads.c b/arch/ppc/platforms/pq2ads.c
deleted file mode 100644
index 7fc2e02..0000000
--- a/arch/ppc/platforms/pq2ads.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * PQ2ADS platform support
- *
- * Author: Kumar Gala <galak@kernel.crashing.org>
- * Derived from: est8260_setup.c by Allen Curtis
- *
- * Copyright 2004 Freescale Semiconductor, Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/init.h>
-
-#include <asm/io.h>
-#include <asm/mpc8260.h>
-#include <asm/cpm2.h>
-#include <asm/immap_cpm2.h>
-
-void __init
-m82xx_board_setup(void)
-{
- cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
- u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
-
- /* Enable the 2nd UART port */
- clrbits32(bcsr, BCSR1_RS232_EN2);
-
-#ifdef CONFIG_SERIAL_CPM_SCC1
- clrbits32((u32*)&immap->im_scc[0].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
- clrbits32((u32*)&immap->im_scc[0].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC2
- clrbits32((u32*)&immap->im_scc[1].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
- clrbits32((u32*)&immap->im_scc[1].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC3
- clrbits32((u32*)&immap->im_scc[2].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
- clrbits32((u32*)&immap->im_scc[2].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SCC4
- clrbits32((u32*)&immap->im_scc[3].scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
- clrbits32((u32*)&immap->im_scc[3].scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
-#endif
-
- iounmap(bcsr);
- iounmap(immap);
-}
diff --git a/arch/ppc/platforms/pq2ads.h b/arch/ppc/platforms/pq2ads.h
deleted file mode 100644
index 2b287f4..0000000
--- a/arch/ppc/platforms/pq2ads.h
+++ /dev/null
@@ -1,94 +0,0 @@
-/*
- * A collection of structures, addresses, and values associated with
- * the Motorola MPC8260ADS/MPC8266ADS-PCI boards.
- * Copied from the RPX-Classic and SBS8260 stuff.
- *
- * Copyright (c) 2001 Dan Malek (dan@mvista.com)
- */
-#ifdef __KERNEL__
-#ifndef __MACH_ADS8260_DEFS
-#define __MACH_ADS8260_DEFS
-
-
-#include <asm/ppcboot.h>
-
-#if defined(CONFIG_ADS8272)
-#define BOARD_CHIP_NAME "8272"
-#endif
-
-/* Memory map is configured by the PROM startup.
- * We just map a few things we need. The CSR is actually 4 byte-wide
- * registers that can be accessed as 8-, 16-, or 32-bit values.
- */
-#define CPM_MAP_ADDR ((uint)0xf0000000)
-#define BCSR_ADDR ((uint)0xf4500000)
-#define BCSR_SIZE ((uint)(32 * 1024))
-
-#define BOOTROM_RESTART_ADDR ((uint)0xff000104)
-
-/* For our show_cpuinfo hooks. */
-#define CPUINFO_VENDOR "Motorola"
-#define CPUINFO_MACHINE "PQ2 ADS PowerPC"
-
-/* The ADS8260 has 16, 32-bit wide control/status registers, accessed
- * only on word boundaries.
- * Not all are used (yet), or are interesting to us (yet).
- */
-
-/* Things of interest in the CSR.
-*/
-#define BCSR0_LED0 ((uint)0x02000000) /* 0 == on */
-#define BCSR0_LED1 ((uint)0x01000000) /* 0 == on */
-#define BCSR1_FETHIEN ((uint)0x08000000) /* 0 == enable */
-#define BCSR1_FETH_RST ((uint)0x04000000) /* 0 == reset */
-#define BCSR1_RS232_EN1 ((uint)0x02000000) /* 0 == enable */
-#define BCSR1_RS232_EN2 ((uint)0x01000000) /* 0 == enable */
-#define BCSR3_FETHIEN2 ((uint)0x10000000) /* 0 == enable */
-#define BCSR3_FETH2_RST ((uint)0x80000000) /* 0 == reset */
-
-#define PHY_INTERRUPT SIU_INT_IRQ7
-
-#ifdef CONFIG_PCI
-/* PCI interrupt controller */
-#define PCI_INT_STAT_REG 0xF8200000
-#define PCI_INT_MASK_REG 0xF8200004
-#define PIRQA (NR_CPM_INTS + 0)
-#define PIRQB (NR_CPM_INTS + 1)
-#define PIRQC (NR_CPM_INTS + 2)
-#define PIRQD (NR_CPM_INTS + 3)
-
-/*
- * PCI memory map definitions for MPC8266ADS-PCI.
- *
- * processor view
- * local address PCI address target
- * 0x80000000-0x9FFFFFFF 0x80000000-0x9FFFFFFF PCI mem with prefetch
- * 0xA0000000-0xBFFFFFFF 0xA0000000-0xBFFFFFFF PCI mem w/o prefetch
- * 0xF4000000-0xF7FFFFFF 0x00000000-0x03FFFFFF PCI IO
- *
- * PCI master view
- * local address PCI address target
- * 0x00000000-0x1FFFFFFF 0x00000000-0x1FFFFFFF MPC8266 local memory
- */
-
-/* All the other PCI memory map definitions reside at syslib/m82xx_pci.h
- Here we should redefine what is unique for this board */
-#define M82xx_PCI_SLAVE_MEM_LOCAL 0x00000000 /* Local base */
-#define M82xx_PCI_SLAVE_MEM_BUS 0x00000000 /* PCI base */
-#define M82xx_PCI_SLAVE_MEM_SIZE 0x10000000 /* 256 Mb */
-
-#define M82xx_PCI_SLAVE_SEC_WND_SIZE ~(0x40000000 - 1U) /* 2 x 512Mb */
-#define M82xx_PCI_SLAVE_SEC_WND_BASE 0x80000000 /* PCI Memory base */
-
-#if defined(CONFIG_ADS8272)
-#define PCI_INT_TO_SIU SIU_INT_IRQ2
-#elif defined(CONFIG_PQ2FADS)
-#define PCI_INT_TO_SIU SIU_INT_IRQ6
-#else
-#warning PCI Bridge will be without interrupts support
-#endif
-
-#endif /* CONFIG_PCI */
-
-#endif /* __MACH_ADS8260_DEFS */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/pq2ads_pd.h b/arch/ppc/platforms/pq2ads_pd.h
deleted file mode 100644
index 672483d..0000000
--- a/arch/ppc/platforms/pq2ads_pd.h
+++ /dev/null
@@ -1,32 +0,0 @@
-#ifndef __PQ2ADS_PD_H
-#define __PQ2ADS_PD_H
-/*
- * arch/ppc/platforms/82xx/pq2ads_pd.h
- *
- * Some defines for MPC82xx board-specific PlatformDevice descriptions
- *
- * 2005 (c) MontaVista Software, Inc.
- * Vitaly Bordug <vbordug@ru.mvista.com>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-/* FCC1 Clock Source Configuration. These can be redefined in the board specific file.
- Can only choose from CLK9-12 */
-
-#define F1_RXCLK 11
-#define F1_TXCLK 10
-
-/* FCC2 Clock Source Configuration. These can be redefined in the board specific file.
- Can only choose from CLK13-16 */
-#define F2_RXCLK 15
-#define F2_TXCLK 16
-
-/* FCC3 Clock Source Configuration. These can be redefined in the board specific file.
- Can only choose from CLK13-16 */
-#define F3_RXCLK 13
-#define F3_TXCLK 14
-
-#endif
diff --git a/arch/ppc/syslib/m8260_setup.c b/arch/ppc/syslib/m8260_setup.c
index 46588fa..b405837 100644
--- a/arch/ppc/syslib/m8260_setup.c
+++ b/arch/ppc/syslib/m8260_setup.c
@@ -175,12 +175,6 @@ m8260_init_IRQ(void)
* in case the boot rom changed something on us.
*/
cpm2_immr->im_intctl.ic_siprr = 0x05309770;
-
-#if defined(CONFIG_PCI) && (defined(CONFIG_ADS8272) || defined(CONFIG_PQ2FADS))
- /* Initialize stuff for the 82xx CPLD IC and install demux */
- pq2pci_init_irq();
-#endif
-
}
/*
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c
index fe860d5..657a1c2 100644
--- a/arch/ppc/syslib/m82xx_pci.c
+++ b/arch/ppc/syslib/m82xx_pci.c
@@ -150,14 +150,6 @@ pq2pci_init_irq(void)
{
int irq;
volatile cpm2_map_t *immap = cpm2_immr;
-#if defined CONFIG_ADS8272
- /* configure chip select for PCI interrupt controller */
- immap->im_memctl.memc_br3 = PCI_INT_STAT_REG | 0x00001801;
- immap->im_memctl.memc_or3 = 0xffff8010;
-#elif defined CONFIG_PQ2FADS
- immap->im_memctl.memc_br8 = PCI_INT_STAT_REG | 0x00001801;
- immap->im_memctl.memc_or8 = 0xffff8010;
-#endif
for (irq = NR_CPM_INTS; irq < NR_CPM_INTS + 4; irq++)
irq_desc[irq].chip = &pq2pci_ic;
@@ -222,26 +214,6 @@ pq2ads_setup_pci(struct pci_controller *hose)
immap->im_memctl.memc_pcibr1 = M82xx_PCI_SEC_WND_BASE | PCIBR_ENABLE;
#endif
-#if defined CONFIG_ADS8272
- immap->im_siu_conf.siu_82xx.sc_siumcr =
- (immap->im_siu_conf.siu_82xx.sc_siumcr &
- ~(SIUMCR_BBD | SIUMCR_ESE | SIUMCR_PBSE |
- SIUMCR_CDIS | SIUMCR_DPPC11 | SIUMCR_L2CPC11 |
- SIUMCR_LBPC11 | SIUMCR_APPC11 |
- SIUMCR_CS10PC11 | SIUMCR_BCTLC11 | SIUMCR_MMR11)) |
- SIUMCR_DPPC11 | SIUMCR_L2CPC01 | SIUMCR_LBPC00 |
- SIUMCR_APPC10 | SIUMCR_CS10PC00 |
- SIUMCR_BCTLC00 | SIUMCR_MMR11 ;
-
-#elif defined CONFIG_PQ2FADS
- /*
- * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]),
- * and local bus for PCI (SIUMCR [LBPC]).
- */
- immap->im_siu_conf.siu_82xx.sc_siumcr = (immap->im_siu_conf.siu_82xx.sc_siumcr &
- ~(SIUMCR_L2CPC11 | SIUMCR_LBPC11 | SIUMCR_CS10PC11 | SIUMCR_APPC11) |
- SIUMCR_BBD | SIUMCR_LBPC01 | SIUMCR_DPPC11 | SIUMCR_APPC10);
-#endif
/* Enable PCI */
immap->im_pci.pci_gcr = cpu_to_le32(PCIGCR_PCI_BUS_EN);
@@ -284,12 +256,6 @@ pq2ads_setup_pci(struct pci_controller *hose)
immap->im_pci.pci_pibar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_BUS >> PITA_ADDR_SHIFT);
immap->im_pci.pci_pitar0 = cpu_to_le32(M82xx_PCI_SLAVE_MEM_LOCAL>> PITA_ADDR_SHIFT);
-#if defined CONFIG_ADS8272
- /* PCI int highest prio */
- immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x01236745;
-#elif defined CONFIG_PQ2FADS
- immap->im_siu_conf.siu_82xx.sc_ppc_alrh = 0x03124567;
-#endif
/* park bus on PCI */
immap->im_siu_conf.siu_82xx.sc_ppc_acr = PPC_ACR_BUS_PARK_PCI;
@@ -320,10 +286,6 @@ void __init pq2_find_bridges(void)
hose->bus_offset = 0;
hose->last_busno = 0xff;
-#ifdef CONFIG_ADS8272
- hose->set_cfg_type = 1;
-#endif
-
setup_m8260_indirect_pci(hose,
(unsigned long)&cpm2_immr->im_pci.pci_cfg_addr,
(unsigned long)&cpm2_immr->im_pci.pci_cfg_data);
diff --git a/include/asm-ppc/mpc8260.h b/include/asm-ppc/mpc8260.h
index 23579d4..402ba15 100644
--- a/include/asm-ppc/mpc8260.h
+++ b/include/asm-ppc/mpc8260.h
@@ -35,10 +35,6 @@
#include <platforms/tqm8260.h>
#endif
-#if defined(CONFIG_PQ2ADS) || defined (CONFIG_PQ2FADS)
-#include <platforms/pq2ads.h>
-#endif
-
#ifdef CONFIG_PCI_8260
#include <syslib/m82xx_pci.h>
#endif
--
1.5.4.1
^ permalink raw reply related
* [PATCH] [PPC] Remove mpc885ads and mpc86x ads boards from arch/ppc
From: Kumar Gala @ 2008-04-19 15:53 UTC (permalink / raw)
To: linuxppc-dev
We have a board port in arch/powerpc so we dont need this one anymore.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
Will push via git tree. Removed defconfig diff to shorten patch.
arch/ppc/8xx_io/enet.c | 23 --
arch/ppc/Kconfig | 63 ----
arch/ppc/configs/mpc86x_ads_defconfig | 633 ---------------------------------
arch/ppc/configs/mpc885ads_defconfig | 622 --------------------------------
arch/ppc/platforms/Makefile | 2 -
arch/ppc/platforms/fads.h | 25 --
arch/ppc/platforms/mpc885ads.h | 93 -----
arch/ppc/platforms/mpc885ads_setup.c | 476 -------------------------
arch/ppc/syslib/m8xx_setup.c | 10 -
include/asm-ppc/mpc8xx.h | 4 -
10 files changed, 0 insertions(+), 1951 deletions(-)
delete mode 100644 arch/ppc/configs/mpc86x_ads_defconfig
delete mode 100644 arch/ppc/configs/mpc885ads_defconfig
delete mode 100644 arch/ppc/platforms/mpc885ads.h
delete mode 100644 arch/ppc/platforms/mpc885ads_setup.c
diff --git a/arch/ppc/8xx_io/enet.c b/arch/ppc/8xx_io/enet.c
index c6d047a..5899aea 100644
--- a/arch/ppc/8xx_io/enet.c
+++ b/arch/ppc/8xx_io/enet.c
@@ -946,29 +946,6 @@ static int __init scc_enet_init(void)
*((volatile uint *)BCSR1) &= ~BCSR1_ETHEN;
#endif
-#ifdef CONFIG_MPC885ADS
-
- /* Deassert PHY reset and enable the PHY.
- */
- {
- volatile uint __iomem *bcsr = ioremap(BCSR_ADDR, BCSR_SIZE);
- uint tmp;
-
- tmp = in_be32(bcsr + 1 /* BCSR1 */);
- tmp |= BCSR1_ETHEN;
- out_be32(bcsr + 1, tmp);
- tmp = in_be32(bcsr + 4 /* BCSR4 */);
- tmp |= BCSR4_ETH10_RST;
- out_be32(bcsr + 4, tmp);
- iounmap(bcsr);
- }
-
- /* On MPC885ADS SCC ethernet PHY defaults to the full duplex mode
- * upon reset. SCC is set to half duplex by default. So this
- * inconsistency should be better fixed by the software.
- */
-#endif
-
dev->base_addr = (unsigned long)ep;
#if 0
dev->name = "CPM_ENET";
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 3fc45e2..0f1863e 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -372,22 +372,6 @@ config MPC8XXFADS
bool "FADS"
select FADS
-config MPC86XADS
- bool "MPC86XADS"
- help
- MPC86x Application Development System by Freescale Semiconductor.
- The MPC86xADS is meant to serve as a platform for s/w and h/w
- development around the MPC86X processor families.
- select FADS
-
-config MPC885ADS
- bool "MPC885ADS"
- help
- Freescale Semiconductor MPC885 Application Development System (ADS).
- Also known as DUET.
- The MPC885ADS is meant to serve as a platform for s/w and h/w
- development around the MPC885 processor family.
-
config TQM823L
bool "TQM823L"
help
@@ -479,53 +463,6 @@ config WINCEPT
endchoice
-menu "Freescale Ethernet driver platform-specific options"
- depends on FS_ENET
-
- config MPC8xx_SECOND_ETH
- bool "Second Ethernet channel"
- depends on (MPC885ADS || MPC86XADS)
- default y
- help
- This enables support for second Ethernet on MPC885ADS and MPC86xADS boards.
- The latter will use SCC1, for 885ADS you can select it below.
-
- choice
- prompt "Second Ethernet channel"
- depends on MPC8xx_SECOND_ETH
- default MPC8xx_SECOND_ETH_FEC2
-
- config MPC8xx_SECOND_ETH_FEC2
- bool "FEC2"
- depends on MPC885ADS
- help
- Enable FEC2 to serve as 2-nd Ethernet channel. Note that SMC2
- (often 2-nd UART) will not work if this is enabled.
-
- config MPC8xx_SECOND_ETH_SCC1
- bool "SCC1"
- depends on MPC86XADS
- select MPC8xx_SCC_ENET_FIXED
- help
- Enable SCC1 to serve as 2-nd Ethernet channel. Note that SMC1
- (often 1-nd UART) will not work if this is enabled.
-
- config MPC8xx_SECOND_ETH_SCC3
- bool "SCC3"
- depends on MPC885ADS
- help
- Enable SCC3 to serve as 2-nd Ethernet channel. Note that SMC1
- (often 1-nd UART) will not work if this is enabled.
-
- endchoice
-
- config MPC8xx_SCC_ENET_FIXED
- depends on MPC8xx_SECOND_ETH_SCC
- default n
- bool "Use fixed MII-less mode for SCC Ethernet"
-
-endmenu
-
choice
prompt "Machine Type"
depends on 6xx
diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile
index ef74a7b..6260231 100644
--- a/arch/ppc/platforms/Makefile
+++ b/arch/ppc/platforms/Makefile
@@ -23,5 +23,3 @@ obj-$(CONFIG_SBC82xx) += sbc82xx.o
obj-$(CONFIG_SPRUCE) += spruce.o
obj-$(CONFIG_LITE5200) += lite5200.o
obj-$(CONFIG_EV64360) += ev64360.o
-obj-$(CONFIG_MPC86XADS) += mpc866ads_setup.o
-obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o
diff --git a/arch/ppc/platforms/fads.h b/arch/ppc/platforms/fads.h
index 2f9f0f6..5219366 100644
--- a/arch/ppc/platforms/fads.h
+++ b/arch/ppc/platforms/fads.h
@@ -22,29 +22,6 @@
#include <asm/ppcboot.h>
-#if defined(CONFIG_MPC86XADS)
-
-#define BOARD_CHIP_NAME "MPC86X"
-
-/* U-Boot maps BCSR to 0xff080000 */
-#define BCSR_ADDR ((uint)0xff080000)
-
-/* MPC86XADS has one more CPLD and an additional BCSR.
- */
-#define CFG_PHYDEV_ADDR ((uint)0xff0a0000)
-#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300))
-
-#define BCSR5_T1_RST 0x10
-#define BCSR5_ATM155_RST 0x08
-#define BCSR5_ATM25_RST 0x04
-#define BCSR5_MII1_EN 0x02
-#define BCSR5_MII1_RST 0x01
-
-/* There is no PHY link change interrupt */
-#define PHY_INTERRUPT (-1)
-
-#else /* FADS */
-
/* Memory map is configured by the PROM startup.
* I tried to follow the FADS manual, although the startup PROM
* dictates this and we simply have to move some of the physical
@@ -55,8 +32,6 @@
/* PHY link change interrupt */
#define PHY_INTERRUPT SIU_IRQ2
-#endif /* CONFIG_MPC86XADS */
-
#define BCSR_SIZE ((uint)(64 * 1024))
#define BCSR0 ((uint)(BCSR_ADDR + 0x00))
#define BCSR1 ((uint)(BCSR_ADDR + 0x04))
diff --git a/arch/ppc/platforms/mpc885ads.h b/arch/ppc/platforms/mpc885ads.h
deleted file mode 100644
index d3bbbb3..0000000
--- a/arch/ppc/platforms/mpc885ads.h
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * A collection of structures, addresses, and values associated with
- * the Freescale MPC885ADS board.
- * Copied from the FADS stuff.
- *
- * Author: MontaVista Software, Inc.
- * source@mvista.com
- *
- * 2005 (c) MontaVista Software, Inc. This file is licensed under the
- * terms of the GNU General Public License version 2. This program is licensed
- * "as is" without any warranty of any kind, whether express or implied.
- */
-
-#ifdef __KERNEL__
-#ifndef __ASM_MPC885ADS_H__
-#define __ASM_MPC885ADS_H__
-
-
-#include <asm/ppcboot.h>
-
-/* U-Boot maps BCSR to 0xff080000 */
-#define BCSR_ADDR ((uint)0xff080000)
-#define BCSR_SIZE ((uint)32)
-#define BCSR0 ((uint)(BCSR_ADDR + 0x00))
-#define BCSR1 ((uint)(BCSR_ADDR + 0x04))
-#define BCSR2 ((uint)(BCSR_ADDR + 0x08))
-#define BCSR3 ((uint)(BCSR_ADDR + 0x0c))
-#define BCSR4 ((uint)(BCSR_ADDR + 0x10))
-
-#define CFG_PHYDEV_ADDR ((uint)0xff0a0000)
-#define BCSR5 ((uint)(CFG_PHYDEV_ADDR + 0x300))
-
-#define IMAP_ADDR ((uint)0xff000000)
-#define IMAP_SIZE ((uint)(64 * 1024))
-
-#define PCMCIA_MEM_ADDR ((uint)0xff020000)
-#define PCMCIA_MEM_SIZE ((uint)(64 * 1024))
-
-/* Bits of interest in the BCSRs.
- */
-#define BCSR1_ETHEN ((uint)0x20000000)
-#define BCSR1_IRDAEN ((uint)0x10000000)
-#define BCSR1_RS232EN_1 ((uint)0x01000000)
-#define BCSR1_PCCEN ((uint)0x00800000)
-#define BCSR1_PCCVCC0 ((uint)0x00400000)
-#define BCSR1_PCCVPP0 ((uint)0x00200000)
-#define BCSR1_PCCVPP1 ((uint)0x00100000)
-#define BCSR1_PCCVPP_MASK (BCSR1_PCCVPP0 | BCSR1_PCCVPP1)
-#define BCSR1_RS232EN_2 ((uint)0x00040000)
-#define BCSR1_PCCVCC1 ((uint)0x00010000)
-#define BCSR1_PCCVCC_MASK (BCSR1_PCCVCC0 | BCSR1_PCCVCC1)
-
-#define BCSR4_ETH10_RST ((uint)0x80000000) /* 10Base-T PHY reset*/
-#define BCSR4_USB_LO_SPD ((uint)0x04000000)
-#define BCSR4_USB_VCC ((uint)0x02000000)
-#define BCSR4_USB_FULL_SPD ((uint)0x00040000)
-#define BCSR4_USB_EN ((uint)0x00020000)
-
-#define BCSR5_MII2_EN 0x40
-#define BCSR5_MII2_RST 0x20
-#define BCSR5_T1_RST 0x10
-#define BCSR5_ATM155_RST 0x08
-#define BCSR5_ATM25_RST 0x04
-#define BCSR5_MII1_EN 0x02
-#define BCSR5_MII1_RST 0x01
-
-/* Interrupt level assignments */
-#define PHY_INTERRUPT SIU_IRQ7 /* PHY link change interrupt */
-#define SIU_INT_FEC1 SIU_LEVEL1 /* FEC1 interrupt */
-#define SIU_INT_FEC2 SIU_LEVEL3 /* FEC2 interrupt */
-#define FEC_INTERRUPT SIU_INT_FEC1 /* FEC interrupt */
-
-/* We don't use the 8259 */
-#define NR_8259_INTS 0
-
-/* CPM Ethernet through SCC3 */
-#define PA_ENET_RXD ((ushort)0x0040)
-#define PA_ENET_TXD ((ushort)0x0080)
-#define PE_ENET_TCLK ((uint)0x00004000)
-#define PE_ENET_RCLK ((uint)0x00008000)
-#define PE_ENET_TENA ((uint)0x00000010)
-#define PC_ENET_CLSN ((ushort)0x0400)
-#define PC_ENET_RENA ((ushort)0x0800)
-
-/* Control bits in the SICR to route TCLK (CLK5) and RCLK (CLK6) to
- * SCC3. Also, make sure GR3 (bit 8) and SC3 (bit 9) are zero */
-#define SICR_ENET_MASK ((uint)0x00ff0000)
-#define SICR_ENET_CLKRT ((uint)0x002c0000)
-
-#define BOARD_CHIP_NAME "MPC885"
-
-#endif /* __ASM_MPC885ADS_H__ */
-#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/mpc885ads_setup.c b/arch/ppc/platforms/mpc885ads_setup.c
deleted file mode 100644
index ba06cc0..0000000
--- a/arch/ppc/platforms/mpc885ads_setup.c
+++ /dev/null
@@ -1,476 +0,0 @@
-/*arch/ppc/platforms/mpc885ads_setup.c
- *
- * Platform setup for the Freescale mpc885ads board
- *
- * Vitaly Bordug <vbordug@ru.mvista.com>
- *
- * Copyright 2005 MontaVista Software Inc.
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/param.h>
-#include <linux/string.h>
-#include <linux/ioport.h>
-#include <linux/device.h>
-
-#include <linux/fs_enet_pd.h>
-#include <linux/fs_uart_pd.h>
-#include <linux/mii.h>
-
-#include <asm/delay.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/page.h>
-#include <asm/processor.h>
-#include <asm/system.h>
-#include <asm/time.h>
-#include <asm/ppcboot.h>
-#include <asm/8xx_immap.h>
-#include <asm/cpm1.h>
-#include <asm/ppc_sys.h>
-
-extern unsigned char __res[];
-static void setup_smc1_ioports(struct fs_uart_platform_info*);
-static void setup_smc2_ioports(struct fs_uart_platform_info*);
-
-static struct fs_mii_fec_platform_info mpc8xx_mdio_fec_pdata;
-static void setup_fec1_ioports(struct fs_platform_info*);
-static void setup_fec2_ioports(struct fs_platform_info*);
-static void setup_scc3_ioports(struct fs_platform_info*);
-
-static struct fs_uart_platform_info mpc885_uart_pdata[] = {
- [fsid_smc1_uart] = {
- .brg = 1,
- .fs_no = fsid_smc1_uart,
- .init_ioports = setup_smc1_ioports,
- .tx_num_fifo = 4,
- .tx_buf_size = 32,
- .rx_num_fifo = 4,
- .rx_buf_size = 32,
- },
- [fsid_smc2_uart] = {
- .brg = 2,
- .fs_no = fsid_smc2_uart,
- .init_ioports = setup_smc2_ioports,
- .tx_num_fifo = 4,
- .tx_buf_size = 32,
- .rx_num_fifo = 4,
- .rx_buf_size = 32,
- },
-};
-
-static struct fs_platform_info mpc8xx_enet_pdata[] = {
- [fsid_fec1] = {
- .rx_ring = 128,
- .tx_ring = 16,
- .rx_copybreak = 240,
-
- .use_napi = 1,
- .napi_weight = 17,
-
- .init_ioports = setup_fec1_ioports,
-
- .bus_id = "0:00",
- .has_phy = 1,
- },
- [fsid_fec2] = {
- .rx_ring = 128,
- .tx_ring = 16,
- .rx_copybreak = 240,
-
- .use_napi = 1,
- .napi_weight = 17,
-
- .init_ioports = setup_fec2_ioports,
-
- .bus_id = "0:01",
- .has_phy = 1,
- },
- [fsid_scc3] = {
- .rx_ring = 64,
- .tx_ring = 8,
- .rx_copybreak = 240,
-
- .use_napi = 1,
- .napi_weight = 17,
-
- .init_ioports = setup_scc3_ioports,
-#ifdef CONFIG_FIXED_MII_10_FDX
- .bus_id = "fixed@100:1",
-#else
- .bus_id = "0:02",
- #endif
- },
-};
-
-void __init board_init(void)
-{
- cpm8xx_t *cp = cpmp;
- unsigned int *bcsr_io;
-
-#ifdef CONFIG_FS_ENET
- immap_t *immap = (immap_t *) IMAP_ADDR;
-#endif
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR\n");
- return;
- }
-#ifdef CONFIG_SERIAL_CPM_SMC1
- cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
- clrbits32(bcsr_io, BCSR1_RS232EN_1);
- cp->cp_smc[0].smc_smcm |= (SMCM_RX | SMCM_TX);
- cp->cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
-#else
- setbits32(bcsr_io,BCSR1_RS232EN_1);
- cp->cp_smc[0].smc_smcmr = 0;
- cp->cp_smc[0].smc_smce = 0;
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SMC2
- cp->cp_simode &= ~(0xe0000000 >> 1);
- cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
- clrbits32(bcsr_io,BCSR1_RS232EN_2);
- cp->cp_smc[1].smc_smcm |= (SMCM_RX | SMCM_TX);
- cp->cp_smc[1].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
-#else
- setbits32(bcsr_io,BCSR1_RS232EN_2);
- cp->cp_smc[1].smc_smcmr = 0;
- cp->cp_smc[1].smc_smce = 0;
-#endif
- iounmap(bcsr_io);
-
-#ifdef CONFIG_FS_ENET
- /* use MDC for MII (common) */
- setbits16(&immap->im_ioport.iop_pdpar, 0x0080);
- clrbits16(&immap->im_ioport.iop_pddir, 0x0080);
- bcsr_io = ioremap(BCSR5, sizeof(unsigned long));
- clrbits32(bcsr_io,BCSR5_MII1_EN);
- clrbits32(bcsr_io,BCSR5_MII1_RST);
-#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2
- clrbits32(bcsr_io,BCSR5_MII2_EN);
- clrbits32(bcsr_io,BCSR5_MII2_RST);
-#endif
- iounmap(bcsr_io);
-#endif
-}
-
-static void setup_fec1_ioports(struct fs_platform_info* pdata)
-{
- immap_t *immap = (immap_t *) IMAP_ADDR;
-
- /* configure FEC1 pins */
- setbits16(&immap->im_ioport.iop_papar, 0xf830);
- setbits16(&immap->im_ioport.iop_padir, 0x0830);
- clrbits16(&immap->im_ioport.iop_padir, 0xf000);
- setbits32(&immap->im_cpm.cp_pbpar, 0x00001001);
-
- clrbits32(&immap->im_cpm.cp_pbdir, 0x00001001);
- setbits16(&immap->im_ioport.iop_pcpar, 0x000c);
- clrbits16(&immap->im_ioport.iop_pcdir, 0x000c);
- setbits32(&immap->im_cpm.cp_pepar, 0x00000003);
-
- setbits32(&immap->im_cpm.cp_pedir, 0x00000003);
- clrbits32(&immap->im_cpm.cp_peso, 0x00000003);
- clrbits32(&immap->im_cpm.cp_cptr, 0x00000100);
-}
-
-static void setup_fec2_ioports(struct fs_platform_info* pdata)
-{
- immap_t *immap = (immap_t *) IMAP_ADDR;
-
- /* configure FEC2 pins */
- setbits32(&immap->im_cpm.cp_pepar, 0x0003fffc);
- setbits32(&immap->im_cpm.cp_pedir, 0x0003fffc);
- clrbits32(&immap->im_cpm.cp_peso, 0x000087fc);
- setbits32(&immap->im_cpm.cp_peso, 0x00037800);
- clrbits32(&immap->im_cpm.cp_cptr, 0x00000080);
-}
-
-static void setup_scc3_ioports(struct fs_platform_info* pdata)
-{
- immap_t *immap = (immap_t *) IMAP_ADDR;
- unsigned *bcsr_io;
-
- bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR\n");
- return;
- }
-
- /* Enable the PHY.
- */
- clrbits32(bcsr_io+4, BCSR4_ETH10_RST);
- udelay(1000);
- setbits32(bcsr_io+4, BCSR4_ETH10_RST);
- /* Configure port A pins for Txd and Rxd.
- */
- setbits16(&immap->im_ioport.iop_papar, PA_ENET_RXD | PA_ENET_TXD);
- clrbits16(&immap->im_ioport.iop_padir, PA_ENET_RXD | PA_ENET_TXD);
-
- /* Configure port C pins to enable CLSN and RENA.
- */
- clrbits16(&immap->im_ioport.iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
- clrbits16(&immap->im_ioport.iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
- setbits16(&immap->im_ioport.iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
-
- /* Configure port E for TCLK and RCLK.
- */
- setbits32(&immap->im_cpm.cp_pepar, PE_ENET_TCLK | PE_ENET_RCLK);
- clrbits32(&immap->im_cpm.cp_pepar, PE_ENET_TENA);
- clrbits32(&immap->im_cpm.cp_pedir,
- PE_ENET_TCLK | PE_ENET_RCLK | PE_ENET_TENA);
- clrbits32(&immap->im_cpm.cp_peso, PE_ENET_TCLK | PE_ENET_RCLK);
- setbits32(&immap->im_cpm.cp_peso, PE_ENET_TENA);
-
- /* Configure Serial Interface clock routing.
- * First, clear all SCC bits to zero, then set the ones we want.
- */
- clrbits32(&immap->im_cpm.cp_sicr, SICR_ENET_MASK);
- setbits32(&immap->im_cpm.cp_sicr, SICR_ENET_CLKRT);
-
- /* Disable Rx and Tx. SMC1 sshould be stopped if SCC3 eternet are used.
- */
- immap->im_cpm.cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
- /* On the MPC885ADS SCC ethernet PHY is initialized in the full duplex mode
- * by H/W setting after reset. SCC ethernet controller support only half duplex.
- * This discrepancy of modes causes a lot of carrier lost errors.
- */
-
- /* In the original SCC enet driver the following code is placed at
- the end of the initialization */
- setbits32(&immap->im_cpm.cp_pepar, PE_ENET_TENA);
- clrbits32(&immap->im_cpm.cp_pedir, PE_ENET_TENA);
- setbits32(&immap->im_cpm.cp_peso, PE_ENET_TENA);
-
- setbits32(bcsr_io+4, BCSR1_ETHEN);
- iounmap(bcsr_io);
-}
-
-static int mac_count = 0;
-
-static void mpc885ads_fixup_enet_pdata(struct platform_device *pdev, int fs_no)
-{
- struct fs_platform_info *fpi;
- bd_t *bd = (bd_t *) __res;
- char *e;
- int i;
-
- if(fs_no >= ARRAY_SIZE(mpc8xx_enet_pdata)) {
- printk(KERN_ERR"No network-suitable #%d device on bus", fs_no);
- return;
- }
-
- fpi = &mpc8xx_enet_pdata[fs_no];
-
- switch (fs_no) {
- case fsid_fec1:
- fpi->init_ioports = &setup_fec1_ioports;
- break;
- case fsid_fec2:
- fpi->init_ioports = &setup_fec2_ioports;
- break;
- case fsid_scc3:
- fpi->init_ioports = &setup_scc3_ioports;
- break;
- default:
- printk(KERN_WARNING "Device %s is not supported!\n", pdev->name);
- return;
- }
-
- pdev->dev.platform_data = fpi;
- fpi->fs_no = fs_no;
-
- e = (unsigned char *)&bd->bi_enetaddr;
- for (i = 0; i < 6; i++)
- fpi->macaddr[i] = *e++;
-
- fpi->macaddr[5] += mac_count++;
-
-}
-
-static void mpc885ads_fixup_fec_enet_pdata(struct platform_device *pdev,
- int idx)
-{
- /* This is for FEC devices only */
- if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec")))
- return;
- mpc885ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1);
-}
-
-static void __init mpc885ads_fixup_scc_enet_pdata(struct platform_device *pdev,
- int idx)
-{
- /* This is for SCC devices only */
- if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc")))
- return;
-
- mpc885ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
-}
-
-static void setup_smc1_ioports(struct fs_uart_platform_info* pdata)
-{
- immap_t *immap = (immap_t *) IMAP_ADDR;
- unsigned *bcsr_io;
- unsigned int iobits = 0x000000c0;
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR1\n");
- return;
- }
- clrbits32(bcsr_io,BCSR1_RS232EN_1);
- iounmap(bcsr_io);
-
- setbits32(&immap->im_cpm.cp_pbpar, iobits);
- clrbits32(&immap->im_cpm.cp_pbdir, iobits);
- clrbits16(&immap->im_cpm.cp_pbodr, iobits);
-}
-
-static void setup_smc2_ioports(struct fs_uart_platform_info* pdata)
-{
- immap_t *immap = (immap_t *) IMAP_ADDR;
- unsigned *bcsr_io;
- unsigned int iobits = 0x00000c00;
-
- bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
-
- if (bcsr_io == NULL) {
- printk(KERN_CRIT "Could not remap BCSR1\n");
- return;
- }
- clrbits32(bcsr_io,BCSR1_RS232EN_2);
- iounmap(bcsr_io);
-
-#ifndef CONFIG_SERIAL_CPM_ALT_SMC2
- setbits32(&immap->im_cpm.cp_pbpar, iobits);
- clrbits32(&immap->im_cpm.cp_pbdir, iobits);
- clrbits16(&immap->im_cpm.cp_pbodr, iobits);
-#else
- setbits16(&immap->im_ioport.iop_papar, iobits);
- clrbits16(&immap->im_ioport.iop_padir, iobits);
- clrbits16(&immap->im_ioport.iop_paodr, iobits);
-#endif
-}
-
-static void __init mpc885ads_fixup_uart_pdata(struct platform_device *pdev,
- int idx)
-{
- bd_t *bd = (bd_t *) __res;
- struct fs_uart_platform_info *pinfo;
- int num = ARRAY_SIZE(mpc885_uart_pdata);
-
- int id = fs_uart_id_smc2fsid(idx);
-
- /* no need to alter anything if console */
- if ((id < num) && (!pdev->dev.platform_data)) {
- pinfo = &mpc885_uart_pdata[id];
- pinfo->uart_clk = bd->bi_intfreq;
- pdev->dev.platform_data = pinfo;
- }
-}
-
-
-static int mpc885ads_platform_notify(struct device *dev)
-{
-
- static const struct platform_notify_dev_map dev_map[] = {
- {
- .bus_id = "fsl-cpm-fec",
- .rtn = mpc885ads_fixup_fec_enet_pdata,
- },
- {
- .bus_id = "fsl-cpm-scc",
- .rtn = mpc885ads_fixup_scc_enet_pdata,
- },
- {
- .bus_id = "fsl-cpm-smc:uart",
- .rtn = mpc885ads_fixup_uart_pdata
- },
- {
- .bus_id = NULL
- }
- };
-
- platform_notify_map(dev_map,dev);
-
- return 0;
-}
-
-int __init mpc885ads_init(void)
-{
- struct fs_mii_fec_platform_info* fmpi;
- bd_t *bd = (bd_t *) __res;
-
- printk(KERN_NOTICE "mpc885ads: Init\n");
-
- platform_notify = mpc885ads_platform_notify;
-
- ppc_sys_device_initfunc();
- ppc_sys_device_disable_all();
-
- ppc_sys_device_enable(MPC8xx_CPM_FEC1);
-
- ppc_sys_device_enable(MPC8xx_MDIO_FEC);
- fmpi = ppc_sys_platform_devices[MPC8xx_MDIO_FEC].dev.platform_data =
- &mpc8xx_mdio_fec_pdata;
-
- fmpi->mii_speed = ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1;
-
- /* No PHY interrupt line here */
- fmpi->irq[0xf] = SIU_IRQ7;
-
-#ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3
- ppc_sys_device_enable(MPC8xx_CPM_SCC3);
-
-#endif
-#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2
- ppc_sys_device_enable(MPC8xx_CPM_FEC2);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SMC1
- ppc_sys_device_enable(MPC8xx_CPM_SMC1);
- ppc_sys_device_setfunc(MPC8xx_CPM_SMC1, PPC_SYS_FUNC_UART);
-#endif
-
-#ifdef CONFIG_SERIAL_CPM_SMC2
- ppc_sys_device_enable(MPC8xx_CPM_SMC2);
- ppc_sys_device_setfunc(MPC8xx_CPM_SMC2, PPC_SYS_FUNC_UART);
-#endif
- return 0;
-}
-
-arch_initcall(mpc885ads_init);
-
-/*
- To prevent confusion, console selection is gross:
- by 0 assumed SMC1 and by 1 assumed SMC2
- */
-struct platform_device* early_uart_get_pdev(int index)
-{
- bd_t *bd = (bd_t *) __res;
- struct fs_uart_platform_info *pinfo;
-
- struct platform_device* pdev = NULL;
- if(index) { /*assume SMC2 here*/
- pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC2];
- pinfo = &mpc885_uart_pdata[1];
- } else { /*over SMC1*/
- pdev = &ppc_sys_platform_devices[MPC8xx_CPM_SMC1];
- pinfo = &mpc885_uart_pdata[0];
- }
-
- pinfo->uart_clk = bd->bi_intfreq;
- pdev->dev.platform_data = pinfo;
- ppc_sys_fixup_mem_resource(pdev, IMAP_ADDR);
- return NULL;
-}
-
diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c
index 9caf850..dcd08d4 100644
--- a/arch/ppc/syslib/m8xx_setup.c
+++ b/arch/ppc/syslib/m8xx_setup.c
@@ -143,16 +143,6 @@ m8xx_setup_arch(void)
#endif
#endif
-#if defined (CONFIG_MPC86XADS) || defined (CONFIG_MPC885ADS)
-#if defined(CONFIG_MTD_PHYSMAP)
- physmap_configure(binfo->bi_flashstart, binfo->bi_flashsize,
- MPC8xxADS_BANK_WIDTH, NULL);
-#ifdef CONFIG_MTD_PARTITIONS
- physmap_set_partitions(mpc8xxads_partitions, mpc8xxads_part_num);
-#endif /* CONFIG_MTD_PARTITIONS */
-#endif /* CONFIG_MTD_PHYSMAP */
-#endif
-
board_init();
}
diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h
index d3a2f2f..b9e3060 100644
--- a/include/asm-ppc/mpc8xx.h
+++ b/include/asm-ppc/mpc8xx.h
@@ -63,10 +63,6 @@
#include <platforms/lantec.h>
#endif
-#if defined(CONFIG_MPC885ADS)
-#include <platforms/mpc885ads.h>
-#endif
-
/* Currently, all 8xx boards that support a processor to PCI/ISA bridge
* use the same memory map.
*/
--
1.5.4.1
^ permalink raw reply related
* Re: RFC: MPC5200 PSC AC97 driver
From: Grant Likely @ 2008-04-19 15:59 UTC (permalink / raw)
To: Matt Sealey; +Cc: linuxppc-dev
In-Reply-To: <4809DF54.2080609@genesi-usa.com>
On Sat, Apr 19, 2008 at 6:02 AM, Matt Sealey <matt@genesi-usa.com> wrote:
>
> Grant Likely wrote:
>
> >
> > On Fri, Apr 18, 2008 at 12:11 PM, Matt Sealey <matt@genesi-usa.com> wrote:
> >
> > > Juergen Beisert wrote:
> > >
> >
> > BTW, is anyone trying to shepherd this driver into the ALSA tree? Its
> > out of my area of expertise and responsibility, so I haven't been
> > pursuing it.
> >
>
> We (well, I) were going to try but we got some oopses; from one thing or
> another,
> but with Juergen's fixes and cell-index in place, now it plays audio.
>
> Now it can be pushed to ALSA on that basis, but I'm still trying to get my
> head around where we need to throw patches and if it goes into ALSA Drivers
> first or the kernel or both? It's kind of convoluted compared to the ease
> of just CC'ing netdev or linux-ide..
>
> If you want to push it, please do, but also I guess it'll need to be
> bundled
> with the cell-index patch for the fixups (we couldn't get it to make the
> property for some odd reason) or a change to using addresses in the driver
> for PSC selection (Juergen's original patch did this anyway)
I can pick up the cell-index patch, but I won't pick up the ALSA
stuff; that's not my tree. Post the driver patch to the alsa list
(but still cc linuxppc and me). The driver needs to go into ALSA
drivers first. The kernel is updated from there.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: RFC: MPC5200 PSC AC97 driver
From: Grant Likely @ 2008-04-19 16:03 UTC (permalink / raw)
To: Peter Czanik; +Cc: linuxppc-dev
In-Reply-To: <4808C1BE.1050607@fang.fa.gau.hu>
On Fri, Apr 18, 2008 at 9:43 AM, Peter Czanik <pczanik@fang.fa.gau.hu> wrote:
> Hello,
>
> factory:/usr/src/linux-2.6.25 # diff -u
> arch/powerpc/kernel/prom_init.c.orig arch/powerpc/kernel/prom_init.c
> --- arch/powerpc/kernel/prom_init.c.orig 2008-04-18
> 13:55:07.000000000 +0200
> +++ arch/powerpc/kernel/prom_init.c 2008-04-18 16:26:51.000000000 +0200
> @@ -2212,6 +2212,7 @@
>
> static void __init fixup_device_tree_efika(void)
> {
> + int sound_ci = 1;
> int sound_irq[3] = { 2, 2, 0 };
> int bcomm_irq[3*16] = { 3,0,0, 3,1,0, 3,2,0, 3,3,0,
> 3,4,0, 3,5,0, 3,6,0, 3,7,0,
> @@ -2257,6 +2258,8 @@
> rv = prom_getprop(node, "interrupts", prop, sizeof(prop));
> if (rv == PROM_ERROR) {
> prom_printf("Adding sound interrupts property\n");
> + prom_setprop(node, "/builtin/sound", "cell-index",
> + &sound_ci, sizeof(int));
> prom_setprop(node, "/builtin/sound", "interrupts",
> sound_irq, sizeof(sound_irq));
> }
This probably isn't the ideal solution; but I've got no objection to
bringing it in as a work around until someone can make the driver
cleaner.
However, this change needs to be more robust. It must first check if
the cell-index property already exists before trying to create it
(just like how adding the interrupts property works).
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox