* Re: SecretLab 2.6.24 with USB
From: Peter Korsgaard @ 2008-04-24 18:25 UTC (permalink / raw)
To: Aaron Sells; +Cc: sam.d.karp, linuxppc-embedded
In-Reply-To: <4810AF87.80602@zin-tech.com>
>>>>> "Aaron" == Aaron Sells <aaron.sells@zin-tech.com> writes:
Hi,
Aaron> I generate the xparameters_ml403.h file using Xilinx's EDK base system
Aaron> builder wizard. However, the wizard does not automatically enable the
Aaron> Cypress device to be interrupt driven. I have manually done this as
Aaron> described in the attached patch.
Aaron> The resulting xparameters_ml403.h has the following defines:
Aaron> sellsa@SS-SBIR-Ubuntu:~/spacesuit/linux-2.6-xlnx$ cat
Aaron> arch/ppc/platforms/4xx/xparameters/xparameters_ml403.h | grep USB
Aaron> /* Definitions for peripheral CYPRESS_USB */
Aaron> #define XPAR_CYPRESS_USB_PRH0_BASEADDR 0x80800000
Aaron> #define XPAR_CYPRESS_USB_PRH0_HIGHADDR 0x8080FFFF
Aaron> #define XPAR_SYSTEM_USB_INT_PIN_MASK 0X000001
Aaron> #define XPAR_XPS_INTC_0_SYSTEM_USB_INT_PIN_INTR 0
Ok.
Aaron> When I boot the Xilinx ML403 board up, I get the following:
Aaron> [ 9.256329] ------------[ cut here ]------------
Aaron> [ 9.260000] Badness at drivers/usb/c67x00/c67x00-ll-hpi.c:244
Aaron> [ 9.260000] NIP: c01b5d6c LR: c01b5d60 CTR: c00170f4
Aaron> [ 9.260000] REGS: c3c19d70 TRAP: 0700 Not tainted
Aaron> (2.6.24-rc8-xlnx-dirty)
Aaron> [ 9.260000] MSR: 00029030 <EE,ME,IR,DR> CR: 24000082 XER: 20000073
Aaron> [ 9.260000] TASK = c3c178a0[1] 'swapper' THREAD: c3c18000
Aaron> [ 9.260000] GPR00: 00000001 c3c19e20 c3c178a0 00000000 c032f518
Aaron> c0372730 27b38fa6 00000001
Aaron> [ 9.260000] GPR08: 00000000 00200200 c3d2b164 c3d2b164 24000082
Aaron> ffffcd64 c02d4c5c c02d4c6c
Aaron> [ 9.260000] GPR16: c02d4c90 c02d4c98 c02d4ca8 c02d4cd4 c02d4ce8
Aaron> 00000000 c02d7114 c0370e78
Aaron> [ 9.260000] GPR24: c0360000 c02d4c54 c0330724 00000000 c3d2b148
Aaron> 00000000 c3d2b140 c0330708
Aaron> [ 9.260000] NIP [c01b5d6c] c67x00_ll_reset+0x48/0x88
Aaron> [ 9.260000] LR [c01b5d60] c67x00_ll_reset+0x3c/0x88
Aaron> [ 9.260000] Call Trace:
Aaron> [ 9.260000] [c3c19e20] [c01b5d60] c67x00_ll_reset+0x3c/0x88 (unreliable)
This is an interrupt timeout. It seems like the interrupt isn't
correctly connected.
Aaron> Sam, since you have this working, any help would be greatly
Aaron> appreciated. What else do I need to do in order to get USB host
Aaron> working on this board?
That should be about it.
Aaron> +/*
Aaron> + * Cypress USB C67x00 shortcut macro for single instance
Aaron> + */
Aaron> +#define XPAR_C67x00_USB(num) { \
Aaron> + .name = "c67x00", \
Aaron> + .id = num, \
Aaron> + .num_resources = 2, \
Aaron> + .resource = (struct resource[]) { \
Aaron> + { \
Aaron> + .start = XPAR_CYPRESS_USB_PRH0_BASEADDR, \
Aaron> + .end = XPAR_CYPRESS_USB_PRH0_BASEADDR + 0xf, \
Aaron> + .flags = IORESOURCE_MEM, \
Aaron> + }, \
Aaron> + { \
Aaron> + .start = XPAR_XPS_INTC_0_SYSTEM_USB_INT_PIN_INTR, \
Aaron> + .end = XPAR_XPS_INTC_0_SYSTEM_USB_INT_PIN_INTR, \
Aaron> + .flags = IORESOURCE_IRQ, \
Aaron> + }, \
Aaron> + }, \
I guess you need to add a few "num" to those defines to make it work
with multiple devices.
--
Bye, Peter Korsgaard
^ permalink raw reply
* Re: [PATCH] [POWERPC] bootwrapper: fix build error on virtex405-head.S
From: Josh Boyer @ 2008-04-24 18:38 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, paulus
In-Reply-To: <20080424173246.17691.73308.stgit@trillian.secretlab.ca>
On Thu, 2008-04-24 at 11:33 -0600, Grant Likely wrote:
> From: Grant Likely <grant.likely@secretlab.ca>
>
> virtex405-head.S is an assembler file, not a C file; therefore BOOTAFLAGS
> is the correct place to set the needed -mcpu=405 flag.
>
> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Applied, pushed to 4xx/next and 4xx/for-2.6.26, and included in my pull
request.
josh
^ permalink raw reply
* Re: [PATCH] add gpiolib support for mpc5200
From: Grant Likely @ 2008-04-24 18:45 UTC (permalink / raw)
To: Sascha Hauer; +Cc: linuxppc-dev
In-Reply-To: <20080424153659.GJ6692@pengutronix.de>
On Thu, Apr 24, 2008 at 9:36 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> Hi all,
>
> Feel free to comment on this.
>
> Sascha
>
>
> This patch adds gpiolib support for mpc5200 SOCs. I'm not sure
> whether it's a good idea to make this optional via kconfig.
> The gpt devices only support a single gpio. In the current of_gpio
> implementation each chip consumes 32 GPIOs which leads to huge
> gaps.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Looks pretty good. You've saved me the need to go write a driver
myself. Comments below, but I'll pull it into my tree and give it a
spin.
I don't see any mechanism for setting the open drain state of the pin.
That will either need to be done by platform code or encoded into the
device tree. Does the OF gpio infrastructure provide any callback to
the driver when something requests the pin? That would seem to be the
ideal place to set the open drain state.
You'll also need to document the format of the gpio pin specifier for
these devices (ie. first cell is GPIO number, second cell is ????).
As for the wide spans caused by gpt gpios, it is probably okay for
now, but we can rework it to do something clever (like have a single
registration for all gpt gpios) at a later date.
Cheers,
g.
>
> ---
> arch/powerpc/platforms/52xx/Kconfig | 6
> arch/powerpc/platforms/52xx/Makefile | 2
> arch/powerpc/platforms/52xx/mpc52xx_gpio.c | 408 +++++++++++++++++++++++++++++
> 3 files changed, 416 insertions(+)
>
> Index: arch/powerpc/platforms/52xx/mpc52xx_gpio.c
> ===================================================================
> --- /dev/null
> +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
> @@ -0,0 +1,408 @@
> +/*
> + * MPC52xx gpio driver
> + *
> + * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2
> + * as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
> + */
> +
> +#include <linux/of.h>
> +#include <linux/kernel.h>
> +#include <linux/of_gpio.h>
> +#include <linux/io.h>
> +#include <asm/of_platform.h>
> +#include <asm/prom.h>
> +#include <asm/gpio.h>
> +#include <asm/mpc52xx.h>
> +#include <sysdev/fsl_soc.h>
> +
> +static DEFINE_SPINLOCK(gpio_lock);
> +
> +/*
> + * GPIO LIB API implementation for wakeup GPIOs.
> + *
> + * There's a maximum of 8 wakeup GPIOs. Which of these are available
> + * for use depends on your board setup.
> + *
> + * 0 -> GPIO_WKUP_7
> + * 1 -> GPIO_WKUP_6
> + * 2 -> PSC6_1
> + * 3 -> PSC6_0
> + * 4 -> ETH_17
> + * 5 -> PSC3_9
> + * 6 -> PSC2_4
> + * 7 -> PSC1_4
> + *
> + */
> +static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
> + unsigned int ret;
> +
> + ret = (in_8(®s->wkup_ival) >> (7 - gpio)) & 1;
> +
> + pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);
dev_dbg maybe?
> +
> + return ret;
> +}
> +
> +static void mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&gpio_lock, flags);
> +
> + tmp = in_8(®s->wkup_dvo);
> + if (val)
> + tmp |= 1 << (7 - gpio);
> + else
> + tmp &= ~(1 << (7 - gpio));
> + out_8(®s->wkup_dvo, tmp);
Rather than read/modify/write of the device register; the function
would probably be faster (one fewer barrier) if you used a shadow
register of the pin state and the critical region would be
shorter/simpler. Also, while this device doesn't have the side
effects associated with shared input/output register, it might still
be good form to use a shadow register just for the sake of clarity.
> +
> + spin_unlock_irqrestore(&gpio_lock, flags);
> +
> + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> +}
> +
> +static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio_wkup *regs = mm_gc->regs;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&gpio_lock, flags);
> +
> + tmp = in_8(®s->wkup_ddr);
> + tmp &= ~(1 << (7 - gpio));
> + out_8(®s->wkup_ddr, tmp);
> +
> + spin_unlock_irqrestore(&gpio_lock, flags);
> +
> + return 0;
> +}
> +
> +static int mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio_wkup *regs = mm_gc->regs;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + /* First set initial value */
> + mpc52xx_wkup_gpio_set(gc, gpio, val);
> +
> + spin_lock_irqsave(&gpio_lock, flags);
> +
> + /* Then set direction */
> + tmp = in_8(®s->wkup_ddr);
> + tmp |= 1 << (7 - gpio);
> + out_8(®s->wkup_ddr, tmp);
> +
> + /* Finally enable the pin */
> + tmp = in_8(®s->wkup_gpioe);
> + tmp |= 1 << (7 - gpio);
> + out_8(®s->wkup_gpioe, tmp);
Do you want/need the cost of enabling the pin every time dir_out is
called? Can it be done when the pin is requested instead? Or by the
board firmware/platform code? Some drivers (for example the i2c
bitbang driver for the clock signal; see i2c-gpio.c) change the state
by changing the direction of the pin.
> +
> + spin_unlock_irqrestore(&gpio_lock, flags);
> +
> + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> +
> + return 0;
> +}
> +
> +static int __devinit mpc52xx_wkup_gpiochip_probe(struct of_device *ofdev,
> + const struct of_device_id *match)
> +{
> + struct of_mm_gpio_chip *mmchip;
> + struct of_gpio_chip *chip;
> +
> + mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL);
> + if (!mmchip)
> + return -ENOMEM;
> +
> + chip = &mmchip->of_gc;
> +
> + chip->gpio_cells = 2;
> + chip->gc.ngpio = 8;
> + chip->gc.direction_input = mpc52xx_wkup_gpio_dir_in;
> + chip->gc.direction_output = mpc52xx_wkup_gpio_dir_out;
> + chip->gc.get = mpc52xx_wkup_gpio_get;
> + chip->gc.set = mpc52xx_wkup_gpio_set;
> +
> + return of_mm_gpiochip_add(ofdev->node, mmchip);
> +}
> +
> +static int mpc52xx_gpiochip_remove(struct of_device *ofdev)
> +{
> + return -EBUSY;
> +}
> +
> +static struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
> + {
> + .compatible = "fsl,mpc5200-gpio-wkup",
> + },
> + {}
> +};
> +
> +static struct of_platform_driver mpc52xx_wkup_gpiochip_driver = {
> + .name = "gpio_wkup",
> + .match_table = mpc52xx_wkup_gpiochip_match,
> + .probe = mpc52xx_wkup_gpiochip_probe,
> + .remove = mpc52xx_gpiochip_remove,
> +};
> +
> +/*
> + * GPIO LIB API implementation for simple GPIOs
> + *
> + * There's a maximum of 32 simple GPIOs. Which of these are available
> + * for use depends on your board setup.
> + * The numbering reflects the bit numbering in the port registers:
> + *
> + * 0..1 > reserved
> + * 2..3 > IRDA
> + * 4..7 > ETHR
> + * 8..11 > reserved
> + * 12..15 > USB
> + * 16..17 > reserved
> + * 18..23 > PSC3
> + * 24..27 > PSC2
> + * 28..31 > PSC1
> + */
> +static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
> + unsigned int ret;
> +
> + ret = (in_be32(®s->simple_ival) >> (31 - gpio)) & 1;
> +
> + return ret;
> +}
> +
> +static void mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&gpio_lock, flags);
> +
> + tmp = in_be32(®s->simple_dvo);
> + if (val)
> + tmp |= 1 << (31 - gpio);
> + else
> + tmp &= ~(1 << (31 - gpio));
> + out_be32(®s->simple_dvo, tmp);
> +
> + spin_unlock_irqrestore(&gpio_lock, flags);
> +
> + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> +}
> +
> +static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio *regs = mm_gc->regs;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&gpio_lock, flags);
> +
> + tmp = in_be32(®s->simple_ddr);
> + tmp &= ~(1 << (31 - gpio));
> + out_be32(®s->simple_ddr, tmp);
> +
> + spin_unlock_irqrestore(&gpio_lock, flags);
> +
> + return 0;
> +}
> +
> +static int mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio *regs = mm_gc->regs;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + /* First set initial value */
> + mpc52xx_simple_gpio_set(gc, gpio, val);
> +
> + spin_lock_irqsave(&gpio_lock, flags);
> +
> + /* Then set direction */
> + tmp = in_be32(®s->simple_ddr);
> + tmp |= 1 << (31 - gpio);
> + out_be32(®s->simple_ddr, tmp);
> +
> + /* Finally enable the pin */
> + tmp = in_be32(®s->simple_gpioe);
> + tmp |= 1 << (31 - gpio);
> + out_be32(®s->simple_gpioe, tmp);
ditto here
> +
> + spin_unlock_irqrestore(&gpio_lock, flags);
> +
> + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> +
> + return 0;
> +}
> +
> +static int __devinit mpc52xx_simple_gpiochip_probe(struct of_device *ofdev,
> + const struct of_device_id *match)
> +{
> + struct of_mm_gpio_chip *mmchip;
> + struct of_gpio_chip *chip;
> +
> + mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL);
> + if (!mmchip)
> + return -ENOMEM;
> +
> + chip = &mmchip->of_gc;
> +
> + chip->gpio_cells = 2;
> + chip->gc.ngpio = 32;
> + chip->gc.direction_input = mpc52xx_simple_gpio_dir_in;
> + chip->gc.direction_output = mpc52xx_simple_gpio_dir_out;
> + chip->gc.get = mpc52xx_simple_gpio_get;
> + chip->gc.set = mpc52xx_simple_gpio_set;
> +
> + return of_mm_gpiochip_add(ofdev->node, mmchip);
> +}
> +
> +static struct of_device_id mpc52xx_simple_gpiochip_match[] = {
> + {
> + .compatible = "fsl,mpc5200-gpio",
> + },
> + {}
> +};
> +
> +static struct of_platform_driver mpc52xx_simple_gpiochip_driver = {
> + .name = "gpio",
> + .match_table = mpc52xx_simple_gpiochip_match,
> + .probe = mpc52xx_simple_gpiochip_probe,
> + .remove = mpc52xx_gpiochip_remove,
> +};
> +
> +/*
> + * GPIO LIB API implementation for gpt GPIOs.
> + *
> + * Each gpt only has a single GPIO.
> + */
> +static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
> + unsigned int ret;
> +
> + return (in_be32(®s->status) & (1 << (31 - 23))) ? 1 : 0;
> +
> + return ret;
> +}
> +
> +static void mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
> +
> + if (val)
> + out_be32(®s->mode, 0x34);
> + else
> + out_be32(®s->mode, 0x24);
> +
> + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> +}
> +
> +static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpt *regs = mm_gc->regs;
> +
> + out_be32(®s->mode, 0x04);
> +
> + return 0;
> +}
> +
> +static int mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + mpc52xx_gpt_gpio_set(gc, gpio, val);
> + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> +
> + return 0;
> +}
> +
> +static int __devinit mpc52xx_gpt_gpiochip_probe(struct of_device *ofdev,
> + const struct of_device_id *match)
> +{
> + struct of_mm_gpio_chip *mmchip;
> + struct of_gpio_chip *chip;
> +
> + mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL);
> + if (!mmchip)
> + return -ENOMEM;
> +
> + chip = &mmchip->of_gc;
> +
> + chip->gpio_cells = 2;
> + chip->gc.ngpio = 1;
> + chip->gc.direction_input = mpc52xx_gpt_gpio_dir_in;
> + chip->gc.direction_output = mpc52xx_gpt_gpio_dir_out;
> + chip->gc.get = mpc52xx_gpt_gpio_get;
> + chip->gc.set = mpc52xx_gpt_gpio_set;
> +
> + return of_mm_gpiochip_add(ofdev->node, mmchip);
> +}
> +
> +static struct of_device_id mpc52xx_gpt_gpiochip_match[] = {
> + {
> + .compatible = "fsl,mpc5200-gpt-gpio",
> + },
> + {}
> +};
> +
> +static struct of_platform_driver mpc52xx_gpt_gpiochip_driver = {
> + .name = "gpio_gpt",
> + .match_table = mpc52xx_gpt_gpiochip_match,
> + .probe = mpc52xx_gpt_gpiochip_probe,
> + .remove = mpc52xx_gpiochip_remove,
> +};
> +
> +static int __init mpc52xx_gpio_init(void)
> +{
> + if (of_register_platform_driver(&mpc52xx_wkup_gpiochip_driver))
> + printk(KERN_ERR "Unable to register wakeup GPIO driver\n");
> +
> + if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver))
> + printk(KERN_ERR "Unable to register simple GPIO driver\n");
> +
> + if (of_register_platform_driver(&mpc52xx_gpt_gpiochip_driver))
> + printk(KERN_ERR "Unable to register gpt GPIO driver\n");
> +
> + return 0;
> +}
> +
> +
> +/* Make sure we get initialised before anyone else tries to use us */
> +subsys_initcall(mpc52xx_gpio_init);
> +
> +/* No exit call at the moment as we cannot unregister of gpio chips */
> +
> +MODULE_DESCRIPTION("Freescale MPC52xx gpio driver");
> +MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
> +MODULE_LICENSE("GPL v2");
> +
> Index: arch/powerpc/platforms/52xx/Kconfig
> ===================================================================
> --- a/arch/powerpc/platforms/52xx/Kconfig.orig
> +++ b/arch/powerpc/platforms/52xx/Kconfig
> @@ -44,3 +44,9 @@ config PPC_MPC5200_BUGFIX
>
> It is safe to say 'Y' here
>
> +config PPC_MPC5200_GPIO
> + bool "MPC5200 GPIO support"
> + depends on PPC_MPC52xx
> + select HAVE_GPIO_LIB
> + help
> + Enable gpiolib support for mpc5200 based boards
> Index: arch/powerpc/platforms/52xx/Makefile
> ===================================================================
> --- a/arch/powerpc/platforms/52xx/Makefile.orig
> +++ b/arch/powerpc/platforms/52xx/Makefile
> @@ -14,3 +14,5 @@ obj-$(CONFIG_PM) += mpc52xx_sleep.o mpc
> ifeq ($(CONFIG_PPC_LITE5200),y)
> obj-$(CONFIG_PM) += lite5200_sleep.o lite5200_pm.o
> endif
> +
> +obj-$(CONFIG_PPC_MPC5200_GPIO) += mpc52xx_gpio.o
> \ No newline at end of file
>
> --
> Pengutronix e.K. - Linux Solutions for Science and Industry
> -----------------------------------------------------------
> Kontakt-Informationen finden Sie im Header dieser Mail oder
> auf der Webseite -> http://www.pengutronix.de/impressum/ <-
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH] add gpiolib support for mpc5200
From: Grant Likely @ 2008-04-24 19:11 UTC (permalink / raw)
To: Sascha Hauer; +Cc: linuxppc-dev
In-Reply-To: <20080424153659.GJ6692@pengutronix.de>
On Thu, Apr 24, 2008 at 9:36 AM, Sascha Hauer <s.hauer@pengutronix.de> wrote:
> Hi all,
>
> Feel free to comment on this.
>
> Sascha
>
>
> This patch adds gpiolib support for mpc5200 SOCs. I'm not sure
> whether it's a good idea to make this optional via kconfig.
> The gpt devices only support a single gpio. In the current of_gpio
> implementation each chip consumes 32 GPIOs which leads to huge
> gaps.
>
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Looks pretty good. You've saved me the need to go write a driver
myself. Comments below, but I'll pull it into my tree and give it a
spin.
I don't see any mechanism for setting the open drain state of the pin.
That will either need to be done by platform code or encoded into the
device tree. Does the OF gpio infrastructure provide any callback to
the driver when something requests the pin? That would seem to be the
ideal place to set the open drain state.
You'll also need to document the format of the gpio pin specifier for
these devices (ie. first cell is GPIO number, second cell is ????).
As for the wide spans caused by gpt gpios, it is probably okay for
now, but we can rework it to do something clever (like have a single
registration for all gpt gpios) at a later date.
Cheers,
g.
>
> ---
> arch/powerpc/platforms/52xx/Kconfig | 6
> arch/powerpc/platforms/52xx/Makefile | 2
> arch/powerpc/platforms/52xx/mpc52xx_gpio.c | 408 +++++++++++++++++++++++++++++
> 3 files changed, 416 insertions(+)
>
> Index: arch/powerpc/platforms/52xx/mpc52xx_gpio.c
> ===================================================================
> --- /dev/null
> +++ b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
> @@ -0,0 +1,408 @@
> +/*
> + * MPC52xx gpio driver
> + *
> + * Copyright (c) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2
> + * as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
> + */
> +
> +#include <linux/of.h>
> +#include <linux/kernel.h>
> +#include <linux/of_gpio.h>
> +#include <linux/io.h>
> +#include <asm/of_platform.h>
> +#include <asm/prom.h>
> +#include <asm/gpio.h>
> +#include <asm/mpc52xx.h>
> +#include <sysdev/fsl_soc.h>
> +
> +static DEFINE_SPINLOCK(gpio_lock);
> +
> +/*
> + * GPIO LIB API implementation for wakeup GPIOs.
> + *
> + * There's a maximum of 8 wakeup GPIOs. Which of these are available
> + * for use depends on your board setup.
> + *
> + * 0 -> GPIO_WKUP_7
> + * 1 -> GPIO_WKUP_6
> + * 2 -> PSC6_1
> + * 3 -> PSC6_0
> + * 4 -> ETH_17
> + * 5 -> PSC3_9
> + * 6 -> PSC2_4
> + * 7 -> PSC1_4
> + *
> + */
> +static int mpc52xx_wkup_gpio_get(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
> + unsigned int ret;
> +
> + ret = (in_8(®s->wkup_ival) >> (7 - gpio)) & 1;
> +
> + pr_debug("%s: gpio: %d ret: %d\n", __func__, gpio, ret);
dev_dbg maybe?
> +
> + return ret;
> +}
> +
> +static void mpc52xx_wkup_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio_wkup __iomem *regs = mm_gc->regs;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&gpio_lock, flags);
> +
> + tmp = in_8(®s->wkup_dvo);
> + if (val)
> + tmp |= 1 << (7 - gpio);
> + else
> + tmp &= ~(1 << (7 - gpio));
> + out_8(®s->wkup_dvo, tmp);
Rather than read/modify/write of the device register; the function
would probably be faster (one fewer barrier) if you used a shadow
register of the pin state and the critical region would be
shorter/simpler. Also, while this device doesn't have the side
effects associated with shared input/output register, it might still
be good form to use a shadow register just for the sake of clarity.
> +
> + spin_unlock_irqrestore(&gpio_lock, flags);
> +
> + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> +}
> +
> +static int mpc52xx_wkup_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio_wkup *regs = mm_gc->regs;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&gpio_lock, flags);
> +
> + tmp = in_8(®s->wkup_ddr);
> + tmp &= ~(1 << (7 - gpio));
> + out_8(®s->wkup_ddr, tmp);
> +
> + spin_unlock_irqrestore(&gpio_lock, flags);
> +
> + return 0;
> +}
> +
> +static int mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio_wkup *regs = mm_gc->regs;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + /* First set initial value */
> + mpc52xx_wkup_gpio_set(gc, gpio, val);
> +
> + spin_lock_irqsave(&gpio_lock, flags);
> +
> + /* Then set direction */
> + tmp = in_8(®s->wkup_ddr);
> + tmp |= 1 << (7 - gpio);
> + out_8(®s->wkup_ddr, tmp);
> +
> + /* Finally enable the pin */
> + tmp = in_8(®s->wkup_gpioe);
> + tmp |= 1 << (7 - gpio);
> + out_8(®s->wkup_gpioe, tmp);
Do you want/need the cost of enabling the pin every time dir_out is
called? Can it be done when the pin is requested instead? Or by the
board firmware/platform code? Some drivers (for example the i2c
bitbang driver for the clock signal; see i2c-gpio.c) change the state
by changing the direction of the pin.
> +
> + spin_unlock_irqrestore(&gpio_lock, flags);
> +
> + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> +
> + return 0;
> +}
> +
> +static int __devinit mpc52xx_wkup_gpiochip_probe(struct of_device *ofdev,
> + const struct of_device_id *match)
> +{
> + struct of_mm_gpio_chip *mmchip;
> + struct of_gpio_chip *chip;
> +
> + mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL);
> + if (!mmchip)
> + return -ENOMEM;
> +
> + chip = &mmchip->of_gc;
> +
> + chip->gpio_cells = 2;
> + chip->gc.ngpio = 8;
> + chip->gc.direction_input = mpc52xx_wkup_gpio_dir_in;
> + chip->gc.direction_output = mpc52xx_wkup_gpio_dir_out;
> + chip->gc.get = mpc52xx_wkup_gpio_get;
> + chip->gc.set = mpc52xx_wkup_gpio_set;
> +
> + return of_mm_gpiochip_add(ofdev->node, mmchip);
> +}
> +
> +static int mpc52xx_gpiochip_remove(struct of_device *ofdev)
> +{
> + return -EBUSY;
> +}
> +
> +static struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
> + {
> + .compatible = "fsl,mpc5200-gpio-wkup",
> + },
> + {}
> +};
> +
> +static struct of_platform_driver mpc52xx_wkup_gpiochip_driver = {
> + .name = "gpio_wkup",
> + .match_table = mpc52xx_wkup_gpiochip_match,
> + .probe = mpc52xx_wkup_gpiochip_probe,
> + .remove = mpc52xx_gpiochip_remove,
> +};
> +
> +/*
> + * GPIO LIB API implementation for simple GPIOs
> + *
> + * There's a maximum of 32 simple GPIOs. Which of these are available
> + * for use depends on your board setup.
> + * The numbering reflects the bit numbering in the port registers:
> + *
> + * 0..1 > reserved
> + * 2..3 > IRDA
> + * 4..7 > ETHR
> + * 8..11 > reserved
> + * 12..15 > USB
> + * 16..17 > reserved
> + * 18..23 > PSC3
> + * 24..27 > PSC2
> + * 28..31 > PSC1
> + */
> +static int mpc52xx_simple_gpio_get(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
> + unsigned int ret;
> +
> + ret = (in_be32(®s->simple_ival) >> (31 - gpio)) & 1;
> +
> + return ret;
> +}
> +
> +static void mpc52xx_simple_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio __iomem *regs = mm_gc->regs;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&gpio_lock, flags);
> +
> + tmp = in_be32(®s->simple_dvo);
> + if (val)
> + tmp |= 1 << (31 - gpio);
> + else
> + tmp &= ~(1 << (31 - gpio));
> + out_be32(®s->simple_dvo, tmp);
> +
> + spin_unlock_irqrestore(&gpio_lock, flags);
> +
> + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> +}
> +
> +static int mpc52xx_simple_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio *regs = mm_gc->regs;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&gpio_lock, flags);
> +
> + tmp = in_be32(®s->simple_ddr);
> + tmp &= ~(1 << (31 - gpio));
> + out_be32(®s->simple_ddr, tmp);
> +
> + spin_unlock_irqrestore(&gpio_lock, flags);
> +
> + return 0;
> +}
> +
> +static int mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpio *regs = mm_gc->regs;
> + unsigned int tmp;
> + unsigned long flags;
> +
> + /* First set initial value */
> + mpc52xx_simple_gpio_set(gc, gpio, val);
> +
> + spin_lock_irqsave(&gpio_lock, flags);
> +
> + /* Then set direction */
> + tmp = in_be32(®s->simple_ddr);
> + tmp |= 1 << (31 - gpio);
> + out_be32(®s->simple_ddr, tmp);
> +
> + /* Finally enable the pin */
> + tmp = in_be32(®s->simple_gpioe);
> + tmp |= 1 << (31 - gpio);
> + out_be32(®s->simple_gpioe, tmp);
ditto here
> +
> + spin_unlock_irqrestore(&gpio_lock, flags);
> +
> + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> +
> + return 0;
> +}
> +
> +static int __devinit mpc52xx_simple_gpiochip_probe(struct of_device *ofdev,
> + const struct of_device_id *match)
> +{
> + struct of_mm_gpio_chip *mmchip;
> + struct of_gpio_chip *chip;
> +
> + mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL);
> + if (!mmchip)
> + return -ENOMEM;
> +
> + chip = &mmchip->of_gc;
> +
> + chip->gpio_cells = 2;
> + chip->gc.ngpio = 32;
> + chip->gc.direction_input = mpc52xx_simple_gpio_dir_in;
> + chip->gc.direction_output = mpc52xx_simple_gpio_dir_out;
> + chip->gc.get = mpc52xx_simple_gpio_get;
> + chip->gc.set = mpc52xx_simple_gpio_set;
> +
> + return of_mm_gpiochip_add(ofdev->node, mmchip);
> +}
> +
> +static struct of_device_id mpc52xx_simple_gpiochip_match[] = {
> + {
> + .compatible = "fsl,mpc5200-gpio",
> + },
> + {}
> +};
> +
> +static struct of_platform_driver mpc52xx_simple_gpiochip_driver = {
> + .name = "gpio",
> + .match_table = mpc52xx_simple_gpiochip_match,
> + .probe = mpc52xx_simple_gpiochip_probe,
> + .remove = mpc52xx_gpiochip_remove,
> +};
> +
> +/*
> + * GPIO LIB API implementation for gpt GPIOs.
> + *
> + * Each gpt only has a single GPIO.
> + */
> +static int mpc52xx_gpt_gpio_get(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
> + unsigned int ret;
> +
> + return (in_be32(®s->status) & (1 << (31 - 23))) ? 1 : 0;
> +
> + return ret;
> +}
> +
> +static void mpc52xx_gpt_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpt __iomem *regs = mm_gc->regs;
> +
> + if (val)
> + out_be32(®s->mode, 0x34);
> + else
> + out_be32(®s->mode, 0x24);
> +
> + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> +}
> +
> +static int mpc52xx_gpt_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
> +{
> + struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
> + struct mpc52xx_gpt *regs = mm_gc->regs;
> +
> + out_be32(®s->mode, 0x04);
> +
> + return 0;
> +}
> +
> +static int mpc52xx_gpt_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
> +{
> + mpc52xx_gpt_gpio_set(gc, gpio, val);
> + pr_debug("%s: gpio: %d val: %d\n", __func__, gpio, val);
> +
> + return 0;
> +}
> +
> +static int __devinit mpc52xx_gpt_gpiochip_probe(struct of_device *ofdev,
> + const struct of_device_id *match)
> +{
> + struct of_mm_gpio_chip *mmchip;
> + struct of_gpio_chip *chip;
> +
> + mmchip = kzalloc(sizeof(*mmchip), GFP_KERNEL);
> + if (!mmchip)
> + return -ENOMEM;
> +
> + chip = &mmchip->of_gc;
> +
> + chip->gpio_cells = 2;
> + chip->gc.ngpio = 1;
> + chip->gc.direction_input = mpc52xx_gpt_gpio_dir_in;
> + chip->gc.direction_output = mpc52xx_gpt_gpio_dir_out;
> + chip->gc.get = mpc52xx_gpt_gpio_get;
> + chip->gc.set = mpc52xx_gpt_gpio_set;
> +
> + return of_mm_gpiochip_add(ofdev->node, mmchip);
> +}
> +
> +static struct of_device_id mpc52xx_gpt_gpiochip_match[] = {
> + {
> + .compatible = "fsl,mpc5200-gpt-gpio",
> + },
> + {}
> +};
> +
> +static struct of_platform_driver mpc52xx_gpt_gpiochip_driver = {
> + .name = "gpio_gpt",
> + .match_table = mpc52xx_gpt_gpiochip_match,
> + .probe = mpc52xx_gpt_gpiochip_probe,
> + .remove = mpc52xx_gpiochip_remove,
> +};
> +
> +static int __init mpc52xx_gpio_init(void)
> +{
> + if (of_register_platform_driver(&mpc52xx_wkup_gpiochip_driver))
> + printk(KERN_ERR "Unable to register wakeup GPIO driver\n");
> +
> + if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver))
> + printk(KERN_ERR "Unable to register simple GPIO driver\n");
> +
> + if (of_register_platform_driver(&mpc52xx_gpt_gpiochip_driver))
> + printk(KERN_ERR "Unable to register gpt GPIO driver\n");
> +
> + return 0;
> +}
> +
> +
> +/* Make sure we get initialised before anyone else tries to use us */
> +subsys_initcall(mpc52xx_gpio_init);
> +
> +/* No exit call at the moment as we cannot unregister of gpio chips */
> +
> +MODULE_DESCRIPTION("Freescale MPC52xx gpio driver");
> +MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
> +MODULE_LICENSE("GPL v2");
> +
> Index: arch/powerpc/platforms/52xx/Kconfig
> ===================================================================
> --- a/arch/powerpc/platforms/52xx/Kconfig.orig
> +++ b/arch/powerpc/platforms/52xx/Kconfig
> @@ -44,3 +44,9 @@ config PPC_MPC5200_BUGFIX
>
> It is safe to say 'Y' here
>
> +config PPC_MPC5200_GPIO
> + bool "MPC5200 GPIO support"
> + depends on PPC_MPC52xx
> + select HAVE_GPIO_LIB
> + help
> + Enable gpiolib support for mpc5200 based boards
> Index: arch/powerpc/platforms/52xx/Makefile
> ===================================================================
> --- a/arch/powerpc/platforms/52xx/Makefile.orig
> +++ b/arch/powerpc/platforms/52xx/Makefile
> @@ -14,3 +14,5 @@ obj-$(CONFIG_PM) += mpc52xx_sleep.o mpc
> ifeq ($(CONFIG_PPC_LITE5200),y)
> obj-$(CONFIG_PM) += lite5200_sleep.o lite5200_pm.o
> endif
> +
> +obj-$(CONFIG_PPC_MPC5200_GPIO) += mpc52xx_gpio.o
> \ No newline at end of file
>
> --
> Pengutronix e.K. - Linux Solutions for Science and Industry
> -----------------------------------------------------------
> Kontakt-Informationen finden Sie im Header dieser Mail oder
> auf der Webseite -> http://www.pengutronix.de/impressum/ <-
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [Cbe-oss-dev] [PATCH] Reworked Cell OProfile: SPU mutex lock fix
From: Maynard Johnson @ 2008-04-24 19:46 UTC (permalink / raw)
To: Carl Love
Cc: linuxppc-dev, oprofile-list, cbe-oss-dev, Arnd Bergmann,
linux-kernel
In-Reply-To: <1208965811.6444.91.camel@carll-linux-desktop>
Carl Love wrote:
> This is a reworked patch to fix the SPU data storage. Currently, the
> SPU escape sequences and program counter data is being added directly
> into the kernel buffer without holding the buffer_mutex lock. This
> patch changes how the data is stored. A new function,
> oprofile_add_value, is added into the oprofile driver to allow adding
> generic data to the per cpu buffers. This enables a series of calls
> to the oprofile_add_value to enter the needed SPU escape sequences
> and SPU program data into the kernel buffer via the per cpu buffers
> without any additional processing. The oprofile_add_value function is
> generic so it could be used by other architecures as well provided
> the needed postprocessing was added to opreport.
>
> Finally, this patch backs out the changes previously added to the
> oprofile generic code for handling the architecture specific
> ops.sync_start and ops.sync_stop that allowed the architecture
> to skip the per CPU buffer creation.
>
Looks good except for the few minor things noted below . . .
-Maynard
> Signed-off-by: Carl Love <carll@us.ibm.com>
>
> Index: Cell_kernel_4_15_2008/arch/powerpc/oprofile/cell/pr_util.h
> ===================================================================
> --- Cell_kernel_4_15_2008.orig/arch/powerpc/oprofile/cell/pr_util.h
> +++ Cell_kernel_4_15_2008/arch/powerpc/oprofile/cell/pr_util.h
> @@ -20,11 +20,6 @@
> #include <asm/cell-regs.h>
> #include <asm/spu.h>
>
> -/* Defines used for sync_start */
> -#define SKIP_GENERIC_SYNC 0
> -#define SYNC_START_ERROR -1
> -#define DO_GENERIC_SYNC 1
> -
> struct spu_overlay_info { /* map of sections within an SPU overlay */
> unsigned int vma; /* SPU virtual memory address from elf */
> unsigned int size; /* size of section from elf */
> @@ -85,7 +80,7 @@ void stop_spu_profiling(void);
> int spu_sync_start(void);
>
> /* remove the hooks */
> -int spu_sync_stop(void);
> +void spu_sync_stop(void);
>
> /* Record SPU program counter samples to the oprofile event buffer. */
> void spu_sync_buffer(int spu_num, unsigned int *samples,
> Index: Cell_kernel_4_15_2008/arch/powerpc/oprofile/cell/spu_task_sync.c
> ===================================================================
> --- Cell_kernel_4_15_2008.orig/arch/powerpc/oprofile/cell/spu_task_sync.c
> +++ Cell_kernel_4_15_2008/arch/powerpc/oprofile/cell/spu_task_sync.c
> @@ -31,11 +31,13 @@
>
> #define RELEASE_ALL 9999
>
> -static DEFINE_SPINLOCK(buffer_lock);
> +static DEFINE_SPINLOCK(add_value_lock);
> static DEFINE_SPINLOCK(cache_lock);
> static int num_spu_nodes;
> +int per_cpu_buffers_exist=0;
>
The per_cpu_buffers_exist variable is not used for anything useful -- a
vestige of something done earlier, I think.
> int spu_prof_num_nodes;
> int last_guard_val[MAX_NUMNODES * 8];
> +static int spu_ctx_sw_seen[MAX_NUMNODES * 8];
>
[snip]
> int spu_sync_start(void)
> {
> int k;
> - int ret = SKIP_GENERIC_SYNC;
> + int ret = 0;
> int register_ret;
> - unsigned long flags = 0;
> + int cpu;
>
> spu_prof_num_nodes = number_of_online_nodes();
> num_spu_nodes = spu_prof_num_nodes * 8;
>
> - spin_lock_irqsave(&buffer_lock, flags);
> - add_event_entry(ESCAPE_CODE);
> - add_event_entry(SPU_PROFILING_CODE);
> - add_event_entry(num_spu_nodes);
> - spin_unlock_irqrestore(&buffer_lock, flags);
> + /* At this point, the CPU buffers have been generated so
>
Suggest you change "generated" to "allocated" for clarity.
> + * writes to the per CPU buffers can occur. Need to
> + * set the flag that the buffers exist before registering for
> + * the SPU context switches or the routine to process the
> + * context switches will not write context switch information.
> + */
> + per_cpu_buffers_exist = 1;
>
delete
> +
> + /* The SPU_PROFILING_CODE escape sequence must proceed
> + * the SPU context switch info.
> + */
> + for_each_online_cpu(cpu) {
> + oprofile_add_value(ESCAPE_CODE, cpu);
> + oprofile_add_value(SPU_PROFILING_CODE, cpu);
> + oprofile_add_value((unsigned long int)
> + num_spu_nodes, cpu);
> + }
>
> /* Register for SPU events */
> register_ret = spu_switch_event_register(&spu_active);
> if (register_ret) {
> - ret = SYNC_START_ERROR;
> + /* Stop the profile_spus() function from trying
> + * to store samples into the per CPU buffer. The
> + * buffer will not be there.
> + */
> + per_cpu_buffers_exist = 0;
>
delete
> + ret = -1;
> goto out;
> }
>
> - for (k = 0; k < (MAX_NUMNODES * 8); k++)
> + for (k = 0; k < (MAX_NUMNODES * 8); k++) {
> last_guard_val[k] = 0;
> + spu_ctx_sw_seen[k] = 0;
> + }
> pr_debug("spu_sync_start -- running.\n");
> out:
> return ret;
> +
> }
>
> /* Record SPU program counter samples to the oprofile event buffer. */
> @@ -432,7 +460,7 @@ void spu_sync_buffer(int spu_num, unsign
>
> map = c_info->map;
> the_spu = c_info->the_spu;
> - spin_lock(&buffer_lock);
> + spin_lock(&add_value_lock);
> for (i = 0; i < num_samples; i++) {
> unsigned int sample = *(samples+i);
> int grd_val = 0;
> @@ -452,15 +480,22 @@ void spu_sync_buffer(int spu_num, unsign
> break;
> }
>
> - add_event_entry(file_offset | spu_num_shifted);
>
In our initial Cell SPU oprofile support submission to the kernel, we
had added a prototype for add_event_entry to include/linux/oprofile.h .
Now that this patch has replaced all uses of add_event_entry with the
new oprofile_add_value function, we should remove the add_event_entry
prototype from the header file -- especially since we were
misusing/abusing it anyway (not grabbing the buffer_mutex before calling).
> + /* We must ensure that the SPU context switch has been written
> + * out before samples for the SPU. Otherwise, the SPU context
> + * information is not available and the postprocessing of the
> + * SPU PC will fail with no available anonymous map information.
> + */
> + if (spu_ctx_sw_seen[spu_num])
> + oprofile_add_value((file_offset | spu_num_shifted),
> + (spu_num >> 2));
>
Carl, you and I had discussed earlier in a phone call how the above use
of oprofile_add_value results in the CPU buffer space being used up
twice as fast as normal (because of the implementation of
oprofile_add_value writing a special ESCAPE code followed by the actual
data). Do we need to do something (either in userspace or kernel
driver) to increase CPU buffer size? Maybe on Cell BE, the default CPU
buffer size should be doubled, but I don't think that could easily be
done in the kernel driver. Probably easier to add in the userspace tools.
> }
> - spin_unlock(&buffer_lock);
> + spin_unlock(&add_value_lock);
> out:
> spin_unlock_irqrestore(&cache_lock, flags);
> }
>
>
> -int spu_sync_stop(void)
> +void spu_sync_stop(void)
> {
> unsigned long flags = 0;
> int ret = spu_switch_event_unregister(&spu_active);
>
The variable 'ret' isn't needed anymore. Maybe add a comment that we're
intentionally ignoring return values from spu_switch_event_unregister
and release_cached_info since we want/need generic sync_stop to run even
if spu_sync_stop has a problem.
> @@ -475,8 +510,9 @@ int spu_sync_stop(void)
> ret = release_cached_info(RELEASE_ALL);
> spin_unlock_irqrestore(&cache_lock, flags);
> out:
> + per_cpu_buffers_exist = 0;
>
delete
> pr_debug("spu_sync_stop -- done.\n");
> - return ret;
> + return;
> }
>
>
> Index: Cell_kernel_4_15_2008/arch/powerpc/oprofile/op_model_cell.c
> ===================================================================
> --- Cell_kernel_4_15_2008.orig/arch/powerpc/oprofile/op_model_cell.c
> +++ Cell_kernel_4_15_2008/arch/powerpc/oprofile/op_model_cell.c
> @@ -1191,15 +1191,15 @@ static int cell_sync_start(void)
> if (spu_cycle_reset)
> return spu_sync_start();
> else
> - return DO_GENERIC_SYNC;
> + return 0;
> }
>
> -static int cell_sync_stop(void)
> +static void cell_sync_stop(void)
> {
> if (spu_cycle_reset)
> - return spu_sync_stop();
> - else
> - return 1;
> + spu_sync_stop();
> +
> + return;
> }
>
> struct op_powerpc_model op_model_cell = {
> Index: Cell_kernel_4_15_2008/drivers/oprofile/buffer_sync.c
> ===================================================================
> --- Cell_kernel_4_15_2008.orig/drivers/oprofile/buffer_sync.c
> +++ Cell_kernel_4_15_2008/drivers/oprofile/buffer_sync.c
> @@ -521,6 +521,20 @@ void sync_buffer(int cpu)
> } else if (s->event == CPU_TRACE_BEGIN) {
> state = sb_bt_start;
> add_trace_begin();
> + } else if (s->event == VALUE_HEADER_ID) {
> + /* The next event contains a value
> + * to enter directly into the event buffer.
> + */
> + increment_tail(cpu_buf);
> + i++; /* one less entry in buffer to process */
> +
> + s = &cpu_buf->buffer[cpu_buf->tail_pos];
> +
> + if (is_code(s->eip))
>
This check seems sort of superfluous to me, but if you really want to
keep it, make it an 'if (unlikely()) ' type of check.
> + add_event_entry(s->event);
> + else
> + printk("KERN_ERR Oprofile per CPU" \
> + "buffer sequence error.\n");
> } else {
> struct mm_struct * oldmm = mm;
>
> Index: Cell_kernel_4_15_2008/drivers/oprofile/cpu_buffer.c
> ===================================================================
> --- Cell_kernel_4_15_2008.orig/drivers/oprofile/cpu_buffer.c
> +++ Cell_kernel_4_15_2008/drivers/oprofile/cpu_buffer.c
> @@ -224,6 +224,35 @@ static void oprofile_end_trace(struct op
> cpu_buf->tracing = 0;
> }
>
> +/*
> + * Add a value to the per CPU buffer. The value is passed from the per CPU
> + * buffer to the kernel buffer with no additional processing. The assumption
> + * is any processing of the value will be done in the postprocessor. This
> + * function should only be used for special architecture specific data.
> + * Currently only used by the CELL processor.
> + *
> + * The first enty in the per cpu buffer consists of the escape code and
>
"entry"
> + * the VALUE_HEADER_ID value. The next entry consists of an escape code
> + * with the value to store. The syn_buffer routine takes the value from
> + * the second entry and put it into the kernel buffer.
> + */
> +void oprofile_add_value(unsigned long value, int cpu) {
> + struct oprofile_cpu_buffer * cpu_buf = &cpu_buffer[cpu];
> +
> + /* Enter a sequence of two evnets. The first event says the
>
"events"
> + * next event contains a value that is to be put directly into the
> + * event buffer.
> + */
> +
> + if (nr_available_slots(cpu_buf) < 3) {
> + cpu_buf->sample_lost_overflow++;
> + return;
> + }
> +
> + add_sample(cpu_buf, ESCAPE_CODE, VALUE_HEADER_ID);
> + add_sample(cpu_buf, ESCAPE_CODE, value);
> +}
> +
> void oprofile_add_ext_sample(unsigned long pc, struct pt_regs * const regs,
> unsigned long event, int is_kernel)
> {
> Index: Cell_kernel_4_15_2008/drivers/oprofile/cpu_buffer.h
> ===================================================================
> --- Cell_kernel_4_15_2008.orig/drivers/oprofile/cpu_buffer.h
> +++ Cell_kernel_4_15_2008/drivers/oprofile/cpu_buffer.h
> @@ -54,5 +54,6 @@ void cpu_buffer_reset(struct oprofile_cp
> /* transient events for the CPU buffer -> event buffer */
> #define CPU_IS_KERNEL 1
> #define CPU_TRACE_BEGIN 2
> +#define VALUE_HEADER_ID 3
>
> #endif /* OPROFILE_CPU_BUFFER_H */
> Index: Cell_kernel_4_15_2008/drivers/oprofile/oprof.c
> ===================================================================
> --- Cell_kernel_4_15_2008.orig/drivers/oprofile/oprof.c
> +++ Cell_kernel_4_15_2008/drivers/oprofile/oprof.c
> @@ -53,24 +53,13 @@ int oprofile_setup(void)
> * us missing task deaths and eventually oopsing
> * when trying to process the event buffer.
> */
> - if (oprofile_ops.sync_start) {
> - int sync_ret = oprofile_ops.sync_start();
> - switch (sync_ret) {
> - case 0:
> - goto post_sync;
> - case 1:
> - goto do_generic;
> - case -1:
> - goto out3;
> - default:
> - goto out3;
> - }
> - }
> -do_generic:
> + if (oprofile_ops.sync_start
> + && ((err = oprofile_ops.sync_start())))
> + goto out2;
> +
> if ((err = sync_start()))
> goto out3;
>
> -post_sync:
> is_setup = 1;
> mutex_unlock(&start_mutex);
> return 0;
> @@ -133,20 +122,9 @@ out:
> void oprofile_shutdown(void)
> {
> mutex_lock(&start_mutex);
> - if (oprofile_ops.sync_stop) {
> - int sync_ret = oprofile_ops.sync_stop();
> - switch (sync_ret) {
> - case 0:
> - goto post_sync;
> - case 1:
> - goto do_generic;
> - default:
> - goto post_sync;
> - }
> - }
> -do_generic:
> + if (oprofile_ops.sync_stop)
> + oprofile_ops.sync_stop();
> sync_stop();
> -post_sync:
> if (oprofile_ops.shutdown)
> oprofile_ops.shutdown();
> is_setup = 0;
> Index: Cell_kernel_4_15_2008/include/linux/oprofile.h
> ===================================================================
> --- Cell_kernel_4_15_2008.orig/include/linux/oprofile.h
> +++ Cell_kernel_4_15_2008/include/linux/oprofile.h
>
As mentioned above, the add_event_entry prototype should be removed from
this header file.
> @@ -56,12 +56,10 @@ struct oprofile_operations {
> /* Stop delivering interrupts. */
> void (*stop)(void);
> /* Arch-specific buffer sync functions.
> - * Return value = 0: Success
> - * Return value = -1: Failure
> - * Return value = 1: Run generic sync function
> + * Sync start: Return 0 for Success, -1 for Failure
> */
> int (*sync_start)(void);
> - int (*sync_stop)(void);
> + void (*sync_stop)(void);
>
> /* Initiate a stack backtrace. Optional. */
> void (*backtrace)(struct pt_regs * const regs, unsigned int depth);
> @@ -106,6 +104,17 @@ void oprofile_add_sample(struct pt_regs
> void oprofile_add_ext_sample(unsigned long pc, struct pt_regs * const regs,
> unsigned long event, int is_kernel);
>
> +/*
> + * Add a value to the per CPU buffer. The value is passed from the per CPU
> + * buffer to the kernel buffer with no additional processing. The assumption
> + * is any processing of the value will be done in the postprocessor. This
> + * function should only be used for special architecture specific data.
> + * Currently only used by the CELL processor.
> + *
> + * This function does not perform a backtrace.
> + */
> +void oprofile_add_value(unsigned long value, int cpu);
> +
> /* Use this instead when the PC value is not from the regs. Doesn't
> * backtrace. */
> void oprofile_add_pc(unsigned long pc, int is_kernel, unsigned long event);
> Index: Cell_kernel_4_15_2008/include/asm-powerpc/oprofile_impl.h
> ===================================================================
> --- Cell_kernel_4_15_2008.orig/include/asm-powerpc/oprofile_impl.h
> +++ Cell_kernel_4_15_2008/include/asm-powerpc/oprofile_impl.h
> @@ -48,7 +48,7 @@ struct op_powerpc_model {
> void (*stop) (void);
> void (*global_stop) (void);
> int (*sync_start)(void);
> - int (*sync_stop)(void);
> + void (*sync_stop)(void);
> void (*handle_interrupt) (struct pt_regs *,
> struct op_counter_config *);
> int num_counters;
>
>
>
> -------------------------------------------------------------------------
> This SF.net email is sponsored by the 2008 JavaOne(SM) Conference
> Don't miss this year's exciting event. There's still time to save $100.
> Use priority code J8TL2D2.
> http://ad.doubleclick.net/clk;198757673;13503038;p?http://java.sun.com/javaone
> _______________________________________________
> oprofile-list mailing list
> oprofile-list@lists.sourceforge.net
> https://lists.sourceforge.net/lists/listinfo/oprofile-list
>
^ permalink raw reply
* sysfs cpu entry
From: Kevin Diggs @ 2008-04-24 22:05 UTC (permalink / raw)
To: linuxppc-dev
Hi,
Can someone suggest where to add the code for a cpu
(/sys/devices/system/cpu/cpu0) entry in sysfs?
The 2.6.24 release has a sysfs.c file but it only seems to be used for
64-bit? Anyone know why? What kind of planetary disasters will I create
if I allow it to be used in 32-bit as well?
kevin
P.S.: On an unrelated note, anyone know where to start looking for
problems in pmac_zilog. My 8600 modem which worked fine in 2.4 is now
essentially useless. Some problem with handshaking, I think.
^ permalink raw reply
* Re: [PATCH] [POWERPC] spufs: add .gitignore for spu_save_dump.h & spu_restore_dump.h
From: Jeremy Kerr @ 2008-04-24 22:26 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <Pine.LNX.4.64.0804241136310.22265@blarg.am.freescale.net>
Kumar,
> --- /dev/null
> +++ b/arch/powerpc/platforms/cell/spufs/.gitignore
> @@ -0,0 +1,2 @@
> +spu_save_dump.h
> +spu_restore_dump.h
nak - these still need to be tracked (and distributed with the tree), as
we want to be able to build the kernel without spu-gcc.
Jeremy
^ permalink raw reply
* [git pull] Please pull powerpc.git master branch
From: Paul Mackerras @ 2008-04-25 0:19 UTC (permalink / raw)
To: torvalds; +Cc: linuxppc-dev, akpm, linux-kernel
Linus,
Please do:
git pull \
git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc.git master
to get another powerpc update. There are fixes for various problems
that have arisen plus a few patchsets that were not quite ready to go
when I sent the last pull request but now are.
Note that there are some generic changes to include/linux/sched.h and
init/main.c. They are from a set of 3 patches from Ben H that Andrew
Morton acked and asked us to push through the powerpc tree.
Thanks,
Paul.
Documentation/powerpc/booting-without-of.txt | 11
MAINTAINERS | 25 +
arch/powerpc/Kconfig | 83 ++
arch/powerpc/boot/.gitignore | 1
arch/powerpc/boot/Makefile | 2
arch/powerpc/boot/dts/canyonlands.dts | 37 +
arch/powerpc/boot/dts/glacier.dts | 37 +
arch/powerpc/boot/ns16550.c | 5
arch/powerpc/kernel/Makefile | 9
arch/powerpc/kernel/asm-offsets.c | 11
arch/powerpc/kernel/cpu_setup_44x.S | 1
arch/powerpc/kernel/cpu_setup_6xx.S | 8
arch/powerpc/kernel/cputable.c | 4
arch/powerpc/kernel/head_fsl_booke.S | 11
arch/powerpc/kernel/misc_32.S | 6
arch/powerpc/kernel/misc_64.S | 20 -
arch/powerpc/kernel/of_platform.c | 2
arch/powerpc/kernel/paca.c | 87 +-
arch/powerpc/kernel/ppc32.h | 2
arch/powerpc/kernel/process.c | 31 +
arch/powerpc/kernel/prom.c | 4
arch/powerpc/kernel/prom_init_check.sh | 58 +
arch/powerpc/kernel/ptrace32.c | 27 -
arch/powerpc/kernel/setup_64.c | 5
arch/powerpc/kernel/stacktrace.c | 1
arch/powerpc/kernel/udbg.c | 4
arch/powerpc/mm/fsl_booke_mmu.c | 2
arch/powerpc/mm/hash_low_32.S | 4
arch/powerpc/mm/init_32.c | 13
arch/powerpc/mm/init_64.c | 3
arch/powerpc/mm/mem.c | 37 +
arch/powerpc/mm/numa.c | 1
arch/powerpc/mm/pgtable_32.c | 23 +
arch/powerpc/platforms/Kconfig | 1
arch/powerpc/platforms/Kconfig.cputype | 4
arch/powerpc/platforms/Makefile | 1
arch/powerpc/platforms/cell/Kconfig | 13
arch/powerpc/platforms/cell/Makefile | 20 -
arch/powerpc/platforms/cell/axon_msi.c | 6
arch/powerpc/platforms/cell/beat.c | 2
arch/powerpc/platforms/cell/beat.h | 0
arch/powerpc/platforms/cell/beat_htab.c | 0
arch/powerpc/platforms/cell/beat_hvCall.S | 0
arch/powerpc/platforms/cell/beat_interrupt.c | 2
arch/powerpc/platforms/cell/beat_interrupt.h | 0
arch/powerpc/platforms/cell/beat_iommu.c | 0
arch/powerpc/platforms/cell/beat_smp.c | 2
arch/powerpc/platforms/cell/beat_spu_priv1.c | 0
arch/powerpc/platforms/cell/beat_syscall.h | 0
arch/powerpc/platforms/cell/beat_udbg.c | 0
arch/powerpc/platforms/cell/beat_wrapper.h | 0
arch/powerpc/platforms/cell/celleb_pci.c | 50 +
arch/powerpc/platforms/cell/celleb_pci.h | 19
arch/powerpc/platforms/cell/celleb_scc.h | 87 ++
arch/powerpc/platforms/cell/celleb_scc_epci.c | 77 --
arch/powerpc/platforms/cell/celleb_scc_pciex.c | 547 ++++++++++++++
arch/powerpc/platforms/cell/celleb_scc_sio.c | 0
arch/powerpc/platforms/cell/celleb_scc_uhc.c | 2
arch/powerpc/platforms/cell/celleb_setup.c | 12
arch/powerpc/platforms/cell/io-workarounds.c | 358 +++------
arch/powerpc/platforms/cell/io-workarounds.h | 49 +
arch/powerpc/platforms/cell/setup.c | 43 +
arch/powerpc/platforms/cell/spider-pci.c | 184 +++++
arch/powerpc/platforms/celleb/Kconfig | 12
arch/powerpc/platforms/celleb/Makefile | 9
arch/powerpc/platforms/celleb/io-workarounds.c | 280 -------
arch/powerpc/platforms/iseries/exception.S | 27 +
arch/powerpc/platforms/ps3/os-area.c | 1
arch/powerpc/platforms/pseries/Kconfig | 5
arch/powerpc/platforms/pseries/Makefile | 4
arch/powerpc/platforms/pseries/eeh.c | 1
arch/powerpc/platforms/pseries/eeh_cache.c | 1
arch/powerpc/platforms/pseries/firmware.c | 10
arch/powerpc/platforms/pseries/iommu.c | 39 -
arch/powerpc/platforms/pseries/lpar.c | 36 -
arch/powerpc/platforms/pseries/ras.c | 4
arch/powerpc/platforms/pseries/rtasd.c | 14
arch/powerpc/platforms/pseries/scanlog.c | 23 -
arch/powerpc/platforms/pseries/setup.c | 17
arch/powerpc/platforms/pseries/smp.c | 11
arch/powerpc/platforms/pseries/xics.c | 1
arch/powerpc/sysdev/mv64x60_dev.c | 52 +
arch/powerpc/sysdev/mv64x60_udbg.c | 2
arch/ppc/8260_io/fcc_enet.c | 19
arch/ppc/8xx_io/enet.c | 23 -
arch/ppc/Kconfig | 82 --
arch/ppc/configs/ads8272_defconfig | 930 ------------------------
arch/ppc/configs/mpc86x_ads_defconfig | 633 ----------------
arch/ppc/configs/mpc885ads_defconfig | 622 ----------------
arch/ppc/kernel/ppc_ksyms.c | 1
arch/ppc/lib/string.S | 14
arch/ppc/platforms/Makefile | 4
arch/ppc/platforms/fads.h | 25 -
arch/ppc/platforms/mpc8272ads_setup.c | 367 ---------
arch/ppc/platforms/mpc885ads.h | 93 --
arch/ppc/platforms/mpc885ads_setup.c | 476 ------------
arch/ppc/platforms/pq2ads.c | 53 -
arch/ppc/platforms/pq2ads.h | 94 --
arch/ppc/platforms/pq2ads_pd.h | 32 -
arch/ppc/syslib/m8260_setup.c | 6
arch/ppc/syslib/m82xx_pci.c | 38 -
arch/ppc/syslib/m8xx_setup.c | 10
drivers/char/xilinx_hwicap/xilinx_hwicap.c | 2
drivers/macintosh/windfarm_pm112.c | 3
drivers/macintosh/windfarm_pm81.c | 4
drivers/macintosh/windfarm_pm91.c | 3
drivers/net/Kconfig | 1
drivers/of/of_i2c.c | 3
drivers/serial/of_serial.c | 14
include/asm-powerpc/fixmap.h | 106 +++
include/asm-powerpc/highmem.h | 41 +
include/asm-powerpc/io-defs.h | 101 +--
include/asm-powerpc/io.h | 8
include/asm-powerpc/kdump.h | 5
include/asm-powerpc/paca.h | 1
include/asm-powerpc/page.h | 45 +
include/asm-powerpc/page_32.h | 6
include/asm-powerpc/thread_info.h | 8
include/asm-ppc/mmu.h | 2
include/asm-ppc/mpc8260.h | 4
include/asm-ppc/mpc8xx.h | 4
include/linux/sched.h | 2
init/main.c | 7
123 files changed, 1923 insertions(+), 4572 deletions(-)
create mode 100644 arch/powerpc/kernel/prom_init_check.sh
rename arch/powerpc/platforms/{celleb/beat.c => cell/beat.c} (99%)
rename arch/powerpc/platforms/{celleb/beat.h => cell/beat.h} (100%)
rename arch/powerpc/platforms/{celleb/htab.c => cell/beat_htab.c} (100%)
rename arch/powerpc/platforms/{celleb/hvCall.S => cell/beat_hvCall.S} (100%)
rename arch/powerpc/platforms/{celleb/interrupt.c => cell/beat_interrupt.c} (99%)
rename arch/powerpc/platforms/{celleb/interrupt.h => cell/beat_interrupt.h} (100%)
rename arch/powerpc/platforms/{celleb/iommu.c => cell/beat_iommu.c} (100%)
rename arch/powerpc/platforms/{celleb/smp.c => cell/beat_smp.c} (99%)
rename arch/powerpc/platforms/{celleb/spu_priv1.c => cell/beat_spu_priv1.c} (100%)
rename arch/powerpc/platforms/{celleb/beat_syscall.h => cell/beat_syscall.h} (100%)
rename arch/powerpc/platforms/{celleb/udbg_beat.c => cell/beat_udbg.c} (100%)
rename arch/powerpc/platforms/{celleb/beat_wrapper.h => cell/beat_wrapper.h} (100%)
rename arch/powerpc/platforms/{celleb/pci.c => cell/celleb_pci.c} (93%)
rename arch/powerpc/platforms/{celleb/pci.h => cell/celleb_pci.h} (73%)
rename arch/powerpc/platforms/{celleb/scc.h => cell/celleb_scc.h} (68%)
rename arch/powerpc/platforms/{celleb/scc_epci.c => cell/celleb_scc_epci.c} (86%)
create mode 100644 arch/powerpc/platforms/cell/celleb_scc_pciex.c
rename arch/powerpc/platforms/{celleb/scc_sio.c => cell/celleb_scc_sio.c} (100%)
rename arch/powerpc/platforms/{celleb/scc_uhc.c => cell/celleb_scc_uhc.c} (99%)
rename arch/powerpc/platforms/{celleb/setup.c => cell/celleb_setup.c} (97%)
create mode 100644 arch/powerpc/platforms/cell/io-workarounds.h
create mode 100644 arch/powerpc/platforms/cell/spider-pci.c
delete mode 100644 arch/powerpc/platforms/celleb/Kconfig
delete mode 100644 arch/powerpc/platforms/celleb/Makefile
delete mode 100644 arch/powerpc/platforms/celleb/io-workarounds.c
delete mode 100644 arch/ppc/configs/ads8272_defconfig
delete mode 100644 arch/ppc/configs/mpc86x_ads_defconfig
delete mode 100644 arch/ppc/configs/mpc885ads_defconfig
delete mode 100644 arch/ppc/platforms/mpc8272ads_setup.c
delete mode 100644 arch/ppc/platforms/mpc885ads.h
delete mode 100644 arch/ppc/platforms/mpc885ads_setup.c
delete mode 100644 arch/ppc/platforms/pq2ads.c
delete mode 100644 arch/ppc/platforms/pq2ads.h
delete mode 100644 arch/ppc/platforms/pq2ads_pd.h
create mode 100644 include/asm-powerpc/fixmap.h
Adrian Bunk (2):
[POWERPC] drivers/of/of_i2c.c: Add MODULE_LICENSE
[POWERPC] char/xilinx_hwicap/ section fix
Benjamin Herrenschmidt (3):
[POWERPC] Add thread_info_cache_init() weak hook
[POWERPC] Fix kernel stack allocation alignment
[POWERPC] Use __weak macro for smp_setup_processor_id
Christoph Hellwig (1):
[POWERPC] Fix new warnings arising from stacktrace patch
Geoff Levand (1):
[POWERPC] PS3: Fix gelic net module dependency
Grant Likely (1):
[POWERPC] bootwrapper: fix build error on virtex405-head.S
Ishizaki Kou (9):
[POWERPC] cell: Generalize io-workarounds code
[POWERPC] celleb: Consolidate io-workarounds code
[POWERPC] celleb: Move the files for celleb base support
[POWERPC] celleb: Move the SCC related code for celleb
[POWERPC] celleb: Move files for Beat hvcall interfaces
[POWERPC] celleb: Move files for Beat mmu and iommu
[POWERPC] celleb: Move a file for SPU on Beat
[POWERPC] celleb: Move miscellaneous files for Beat
[POWERPC] celleb: Add support for PCI Express
John Linn (2):
[POWERPC] Xilinx: boot support for Xilinx uart 16550.
[POWERPC] Xilinx: of_serial support for Xilinx uart 16550.
Josh Boyer (2):
[POWERPC] 4xx: Fix duplicate phys_addr_t definition
[POWERPC] Add strncmp to arch/ppc
Kay Sievers (1):
[POWERPC] macintosh/windfarm: Fix platform driver hotplug/coldplug
Kumar Gala (9):
[PPC] Remove mpc8272 ads board from arch/ppc
[PPC] Remove mpc885ads and mpc86x ads boards from arch/ppc
[POWERPC] ppc32: Fix errata for 603 CPUs
[POWERPC] 85xx: Add support for relocatable kernel (and booting at non-zero)
[POWERPC] Port fixmap from x86 and use for kmap_atomic
[POWERPC] Clean up access to thread_info in assembly
[POWERPC] Cleanup asm-offsets.c
[POWERPC] Clean up misc_64.S
[POWERPC] Add zImage.iseries to arch/powerpc/boot/.gitignore
Michael Ellerman (9):
[POWERPC] Add include of linux/of.h to numa.c
[POWERPC] Add include of linux/of.h to os-area.c
[POWERPC] Discourage people from fiddling with kernel data from prom_init
[POWERPC] Use of_get_next_parent() in platforms/cell/axon_msi.c
[POWERPC] Set udbg_console index to 0
[POWERPC] Mark udbg console as CON_ANYTIME, ie. callable early in boot
[POWERPC] Register udbg console early on pseries LPAR
[POWERPC] Convert from DBG() to pr_debug() in platforms/pseries/
[POWERPC] Add CONFIG_PPC_PSERIES_DEBUG to enable debugging for platforms/pseries
Paul Mackerras (1):
Revert "[POWERPC] Add compat handler for PTRACE_GETSIGINFO"
Remi Machet (3):
[POWERPC] Use default values if necessary in mv64x60 I2C initialization
[POWERPC] Initialize all mv64x60 devices even if one fails
[POWERPC] Fix mv64x60 early console code to use cell-index property
Stefan Roese (2):
[POWERPC] 4xx: Add NOR FLASH entries to Canyonlands and Glacier dts
[POWERPC] 4xx: Fix 460GT support to not enable FPU
Timur Tabi (1):
[POWERPC] Add Timur Tabi to the MAINTAINERS file
Tony Breeds (2):
[POWERPC] Make iSeries spin on __secondary_hold_spinloop, like pSeries
[POWERPC] Raise the upper limit of NR_CPUS and move the pacas into the BSS
^ permalink raw reply
* Re: [PATCH] [POWERPC] spufs: add .gitignore for spu_save_dump.h & spu_restore_dump.h
From: Kumar Gala @ 2008-04-25 0:47 UTC (permalink / raw)
To: Jeremy Kerr; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <200804250826.12128.jk@ozlabs.org>
On Apr 24, 2008, at 5:26 PM, Jeremy Kerr wrote:
> Kumar,
>
>> --- /dev/null
>> +++ b/arch/powerpc/platforms/cell/spufs/.gitignore
>> @@ -0,0 +1,2 @@
>> +spu_save_dump.h
>> +spu_restore_dump.h
>
> nak - these still need to be tracked (and distributed with the
> tree), as
> we want to be able to build the kernel without spu-gcc.
So they should be added to the tree?
- k
^ permalink raw reply
* Re: [PATCH] [POWERPC] spufs: add .gitignore for spu_save_dump.h & spu_restore_dump.h
From: Jeremy Kerr @ 2008-04-25 0:55 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <EB183C40-A46E-4899-9BFF-A6D79C641AE4@kernel.crashing.org>
Kumar,
Ah, I was mistaking them for the .h_shipped files. Nevermind me, your
patch is fine. Applied to my spufs tree.
Cheers,
Jeremy
^ permalink raw reply
* Re: mpc5200b custom board upstreamable?
From: Benjamin Herrenschmidt @ 2008-04-25 0:58 UTC (permalink / raw)
To: Sascha Hauer; +Cc: Scott Wood, linuxppc-dev
In-Reply-To: <20080424162813.GL6692@pengutronix.de>
On Thu, 2008-04-24 at 18:28 +0200, Sascha Hauer wrote:
>
> At the moment my compatible entry looks like this:
>
> compatible = "phytec,pcm030","generic-mpc52xx";
>
> What I think would be nice is that "phytec,pcm030" support is used
> when available and "generic-mpc52xx" as a fallback. We do not have any
> platform specific hacks at the moment, but we may have later. Having
> "phytec,pcm030" in the simple machine would prevent us from doing so.
No, please avoid that 'generic' stuff for now, for all the good reasons
Grant gave. It might be nice but we aren't there yet. It's trivial to
add phytec,pcm030 to the list we support and use that for now.
If you do a rev tomorrow that is still compatible and in fact is very
close to the pcm030 programmatically and call it pcm035, then you could
do something like
compatible = "phytec,pcm035", "phytec,pcm030".
But don't toy with "generic" things, they sound like good ideas but they
ultimately come back and bite us.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] [POWERPC] spufs: add .gitignore for spu_save_dump.h & spu_restore_dump.h
From: Kumar Gala @ 2008-04-25 2:32 UTC (permalink / raw)
To: Jeremy Kerr; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <200804251055.27909.jk@ozlabs.org>
On Apr 24, 2008, at 7:55 PM, Jeremy Kerr wrote:
> Kumar,
>
> Ah, I was mistaking them for the .h_shipped files. Nevermind me, your
> patch is fine. Applied to my spufs tree.
ok. thanks.
- k
^ permalink raw reply
* Re: ppc-linux still not booting on my virtexII board
From: yanlong wang @ 2008-04-25 3:18 UTC (permalink / raw)
To: linuxppc-embedded@ozlabs.org
[-- Attachment #1: Type: text/plain, Size: 510 bytes --]
Hi , guys , i meet the same problem as yours . when it into the
early_init(), the system was hang up . I see your solution , but i don't
known it clearly . Can you tell me detailly ??? Why it happened and the
solution .
Waiting for your reply , thank you :)
Hi,
>* (...)arch/ppc/boot/simple/embed_config.c
*
Oops, I skipped that code because my bootloader executes the uncompressed
kernel image (loaded at 0x00000000) without doing that stuff in the first
place. All right ;)
Thanks again,
Patrick
[-- Attachment #2: Type: text/html, Size: 639 bytes --]
^ permalink raw reply
* sysfs cpu entry
From: Kevin Diggs @ 2008-04-25 4:08 UTC (permalink / raw)
To: linuxppc-dev
Hi,
Can someone suggest where to add the code for a cpu
(/sys/devices/system/cpu/cpu0) entry in sysfs?
The 2.6.24 release has a sysfs.c file but it only seems to be used for
64-bit? Anyone know why? What kind of planetary disasters will I create
if I allow it to be used in 32-bit as well?
kevin
P.S.: On an unrelated note, anyone know where to start looking for
problems in pmac_zilog. My 8600 modem which worked fine in 2.4 is now
essentially useless. Some problem with handshaking, I think.
^ permalink raw reply
* Re: sysfs cpu entry
From: Kumar Gala @ 2008-04-25 3:36 UTC (permalink / raw)
To: Kevin Diggs; +Cc: linuxppc-dev
In-Reply-To: <4811593B.8080508@hypersurf.com>
On Apr 24, 2008, at 11:08 PM, Kevin Diggs wrote:
> Hi,
>
> Can someone suggest where to add the code for a cpu
> (/sys/devices/system/cpu/cpu0) entry in sysfs?
>
> The 2.6.24 release has a sysfs.c file but it only seems to be used
> for 64-bit? Anyone know why? What kind of planetary disasters will I
> create if I allow it to be used in 32-bit as well?
>
> kevin
There's no huge harm just make sure that you fixup things to only
expose registers that exist on a 32-bit part.
What 32-bit chip are you looking to enable this for?
- k
^ permalink raw reply
* [PATCH] Change the default link address for pSeries zImage kernels.
From: Tony Breeds @ 2008-04-25 5:39 UTC (permalink / raw)
To: Paul Mackerras, LinuxPPC-dev
Currently we set the start of the .text section to be 4Mb for pSeries.
In situations where the zImage is > 8Mb we'll fail to boot (due to
overlapping with OF). Move .text in a pSeries zImage from 4MB to 64MB
(well past OF).
Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
---
- Compile tested for *_defconfig with only pSeries chaning it's link
address.
- Boot tested on POWER6
arch/powerpc/boot/wrapper | 14 ++++++++++++--
arch/powerpc/boot/zImage.coff.lds.S | 1 -
arch/powerpc/boot/zImage.lds.S | 1 -
3 files changed, 12 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index d6c96d9..b5dfc1f 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -138,14 +138,20 @@ objflags=-S
tmp=$tmpdir/zImage.$$.o
ksection=.kernel:vmlinux.strip
isection=.kernel:initrd
+link_address='0x400000'
case "$platform" in
-pmac|pseries|chrp)
+pseries)
+ platformo=$object/of.o
+ link_address='0x4000000'
+ ;;
+pmac|chrp)
platformo=$object/of.o
;;
coff)
platformo=$object/of.o
lds=$object/zImage.coff.lds
+ link_address='0x500000'
;;
miboot|uboot)
# miboot and U-boot want just the bare bits, not an ELF binary
@@ -190,6 +196,7 @@ ps3)
objflags="-O binary --set-section-flags=.bss=contents,alloc,load,data"
ksection=.kernel:vmlinux.bin
isection=.kernel:initrd
+ link_address=''
;;
ep88xc|ep405|ep8248e)
platformo="$object/fixed-head.o $object/$platform.o"
@@ -268,7 +275,10 @@ if [ -n "$dtb" ]; then
fi
if [ "$platform" != "miboot" ]; then
- ${CROSS}ld -m elf32ppc -T $lds -o "$ofile" \
+ if [ -n "$link_address" ] ; then
+ text_start="-Ttext $link_address"
+ fi
+ ${CROSS}ld -m elf32ppc -T $lds $text_start -o "$ofile" \
$platformo $tmp $object/wrapper.a
rm $tmp
fi
diff --git a/arch/powerpc/boot/zImage.coff.lds.S b/arch/powerpc/boot/zImage.coff.lds.S
index fe87a90..856dc78 100644
--- a/arch/powerpc/boot/zImage.coff.lds.S
+++ b/arch/powerpc/boot/zImage.coff.lds.S
@@ -3,7 +3,6 @@ ENTRY(_zimage_start_opd)
EXTERN(_zimage_start_opd)
SECTIONS
{
- . = (5*1024*1024);
_start = .;
.text :
{
diff --git a/arch/powerpc/boot/zImage.lds.S b/arch/powerpc/boot/zImage.lds.S
index f6e380f..0962d62 100644
--- a/arch/powerpc/boot/zImage.lds.S
+++ b/arch/powerpc/boot/zImage.lds.S
@@ -3,7 +3,6 @@ ENTRY(_zimage_start)
EXTERN(_zimage_start)
SECTIONS
{
- . = (4*1024*1024);
_start = .;
.text :
{
--
1.5.5.1
Yours Tony
linux.conf.au http://www.marchsouth.org/
Jan 19 - 24 2009 The Australian Linux Technical Conference!
^ permalink raw reply related
* bringing up latest kernel on EP8248E problems....
From: gforgcc @ 2008-04-25 5:49 UTC (permalink / raw)
To: linuxppc-embedded
Hi geeks,
i am trying to bring up the latest kernel on EP8248 target,
i am using U-boot-1.3.2 and linux-2.6.25-rc8,
I had some problems when i tried to build the u-boot source ( first i did
""make ep8248_config"" and then ""make"") it was giving undefined reference
related to ft_board_setup() function so i altered the U-boot-1.3.2 source
code... i added the below code to the following file board/ep8248/ep8248.c
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
and also added the below lines to the file include/configs/ep8248.h by
looking into the corresponding .dts file in the kernel source....
/* pass open firmware flat tree */
#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
#define OF_CPU "PowerPC,8248@0"
#define OF_SOC "soc@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
#define OF_STDOUT_PATH "/soc@f0000000/serial@11a80"
Now afte doing the above 2 alterations i was able to build the u-boot-1.3.2
source for ep8248e....
then i created the uImage with the latest kernel source linux-2.6.25-rc8 and
put that uImage to the target...also i created the ep8248e.dtb from the dtc
(DEVICE TREE COMPILER) and put that to the target and passed this as an
argument to the bootm
I also cross checked in the U-boot environment for the fdt command ... it
was present
Finally when it hanged I started debugging using BDI2000.which helped me to
know atleast what is going wrong, i have added some printk's in the kernel
source but still i am not able to find where and what exactly is going
wrong, The first statement it is printing in the log buffer is
""Using Embedded Planet EP8248E machine description"" and thats it the next
message is
Unable to handle kernel paging request for data at address 0xbfff0000
Faulting instruction address:0xc0012070 (This nearest address to this
address in System.map file is cacheable_memzero)
and tracing like this i came to know that in the file
arch/powerpc/mm/ppc_mmu_32.c , here in the function __init MMU_init_hw() and
in the line n_hpteg = total_memory / (PAGE_SIZE * 8); probably it is getting
problem because when i tried to print the variable total_memory it is
printing zero !!! :( :( so probably i am thinking it is not able to find
some memory for Hash table :(
Please share your knowledge and skills to solve this problem..
thanks... :)
--
View this message in context: http://www.nabble.com/bringing-up-latest-kernel-on-EP8248E-problems....-tp16890712p16890712.html
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* Re: [PATCH 1/6] ibm_newemac: Fix problem with jumbo frame support and EMAC V4.patch
From: Jeff Garzik @ 2008-04-25 6:01 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: netdev, linuxppc-dev
In-Reply-To: <20080422004758.1A823DE19B@ozlabs.org>
Benjamin Herrenschmidt wrote:
> From: Stefan Roese <sr@denx.de>
>
> This fixes the jumbo frame support on EMAC V4 systems. Now the correct
> bit is set depending on the EMAC version configured.
>
> Tested on Kilauea (405EX) and Canyonlands (460EX).
>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>
> ---
> drivers/net/ibm_newemac/core.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c
> index 0789802..486901f 100644
> --- a/drivers/net/ibm_newemac/core.c
> +++ b/drivers/net/ibm_newemac/core.c
> @@ -524,7 +524,10 @@ static int emac_configure(struct emac_instance *dev)
> rx_size = dev->rx_fifo_size_gige;
>
> if (dev->ndev->mtu > ETH_DATA_LEN) {
> - mr1 |= EMAC_MR1_JPSM;
> + if (emac_has_feature(dev, EMAC_FTR_EMAC4))
> + mr1 |= EMAC4_MR1_JPSM;
> + else
> + mr1 |= EMAC_MR1_JPSM;
> dev->stop_timeout = STOP_TIMEOUT_1000_JUMBO;
> } else
> dev->stop_timeout = STOP_TIMEOUT_1000;
applied 1-6
^ permalink raw reply
* Re: [PATCH] ibm_newemac: Increase MDIO timeouts
From: Jeff Garzik @ 2008-04-25 6:04 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: super.firetwister, netdev, linuxppc-dev
In-Reply-To: <20080423051832.63BF7DDF65@ozlabs.org>
Benjamin Herrenschmidt wrote:
> This patch doubles the MDIO timeouts in EMAC as there are field
> cases where they are two short to communicate with some PHYs.
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
applied
^ permalink raw reply
* Re: [PATCH] Change the default link address for pSeries zImage kernels.
From: Benjamin Herrenschmidt @ 2008-04-25 6:12 UTC (permalink / raw)
To: Tony Breeds; +Cc: LinuxPPC-dev, Paul Mackerras
In-Reply-To: <20080425053941.GT20457@bakeyournoodle.com>
On Fri, 2008-04-25 at 15:39 +1000, Tony Breeds wrote:
> Currently we set the start of the .text section to be 4Mb for pSeries.
> In situations where the zImage is > 8Mb we'll fail to boot (due to
> overlapping with OF). Move .text in a pSeries zImage from 4MB to 64MB
> (well past OF).
>
> Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
> ---
> - Compile tested for *_defconfig with only pSeries chaning it's link
> address.
> - Boot tested on POWER6
Considering how bad OF can be on some machines, I'd like this to be
boot-tested on a wider range of machines. Also, it might depend on the
OF real-base setting as well...
At least, we should be able to test at ozlabs on cell blades, POWER4
bare metal (ie "SMP mode"), POWER5 and POWER5+.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH v2] [POWERPC] 4xx: Add endpoint support to 4xx PCIe driver
From: Benjamin Herrenschmidt @ 2008-04-25 6:24 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <1208789670-28909-1-git-send-email-sr@denx.de>
On Mon, 2008-04-21 at 16:54 +0200, Stefan Roese wrote:
> This patch adds basic endpoint support to the 4xx PCIe driver.
>
> This is done by checking the device_type property of the PCIe
> device node ("pci" for root-complex and "pci-endpoint" for endpoint
> configuration).
>
> Note: Currently we map a fixed 64MByte window to PLB address 0 (SDRAM).
> This should probably be configurable via a dts property.
>
> Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
Paul, I forgot to send that ack a while ago, this is .26 material, been
around for some time.
Cheers,
Ben.
^ permalink raw reply
* Re: missing current-speed property prevents autoconsole on pegasos
From: Olaf Hering @ 2008-04-25 7:18 UTC (permalink / raw)
To: Matt Sealey; +Cc: linuxppc-dev
In-Reply-To: <4810AA6B.9010102@genesi-usa.com>
On Thu, Apr 24, Matt Sealey wrote:
> Why not just have users who wish to use console serial port autodetection
> add 3 lines to their nvramrc?
The point of autodetection is that no userinteraction is required.
I guess the serial driver does not probe the configured hardware port
speed anymore (if it ever did that).
^ permalink raw reply
* Re: [PATCH] powerpc copy_siginfo_from_user32
From: Christoph Hellwig @ 2008-04-25 7:22 UTC (permalink / raw)
To: Roland McGrath; +Cc: linuxppc-dev, Paul Mackerras, Anton Blanchard
In-Reply-To: <20080419221924.424EF27037C@magilla.localdomain>
On Sat, Apr 19, 2008 at 03:19:24PM -0700, Roland McGrath wrote:
> Hi. I posted this before, but I don't see it in any of your powerpc.git
> trees. Can you push this upstream ASAP? It would make life easier for me
> trying to merge some more generic changes (that would break powerpc builds
> without this going in first).
Any chance you could re-submit the patch to switch powerpc to the
generic PTRACE_GETSIGINFO using this aswell?
^ permalink raw reply
* Re: [RFC][WIP][PATCH] Add IRQSTACKS to ppc32
From: Christoph Hellwig @ 2008-04-25 7:23 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <Pine.LNX.4.64.0804240034160.23185@blarg.am.freescale.net>
On Thu, Apr 24, 2008 at 12:37:50AM -0500, Kumar Gala wrote:
> config IRQSTACKS
> bool "Use separate kernel stacks when processing interrupts"
> - depends on PPC64
Why do we have this as a user-selectable option? It should be on by
default on 32 or 64bit.
^ permalink raw reply
* Re: ML405 failed reboot
From: Guillaume Dargaud @ 2008-04-25 8:16 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <07c101c8a5e6$13670980$ad289e86@LPSC0173W>
I'm posting a little more info 'cause no-one took the bait:
# tail -f /tmp/messages &
# reboot
The system is going down NOW!
Sending SIGTERM to all processes
Requesting system reboot
[ 2021.926957] Restarting system.
[ 2021.9[ 2021.931063] Kernel stack overflow in process c7c52c10,
r1=c01fc25b
[ 2021.935935] NIP: c7503dc8 LR: 00000001 CTR: 00000000
[ 2021.940871] REGS: c7503d40 TRAP: c000b3b8 Not tainted
(2.6.24-rc8-xlnx)
[ 2021.947679] MSR: fee1dead <EE,PR,ME,IR> CR: c01d0000 XER: 00000000
[ 2021.953996] TASK = c7c52c10[261] 'init' THREAD: c7502000
[ 2021.959084] GPR00: 00001001 c01fc25b 00000012 c7503d72 c7503db0 c0017020
00000000 000007e5
[ 2021.967376] GPR08: 3c343e5b 20323032 312e3932 38373530 5d2000d0 c0017020
00000000 000007e5
[ 2021.975669] GPR16: 3c303e5b 20323032 312e3932 36393537 5d2000b0 00000000
00000000 0000004d
[ 2021.983963] GPR24: 00000000 fee1dead 28121969 00000000 c7503df0 c00170a8
02002222 c7503df8
[ 2021.992430] NIP [c7503dc8] 0xc7503dc8
[ 2021.996059] LR [00000001] 0x1
[ 2021.998997] Call Trace:
[ 2022.001423] Kernel panic - not syncing: kernel stack overflow
[ 2022.007142] Rebooting in 180 seconds..
[ 2201.477426] Code: 30001
[ 2201.477437] Addr: c01e5f28
[ 2201.484367] Oops: Exception in kernel mode, sig: 4 [#1]
[ 2201.489548] NIP: c01e5f28 LR: 000001d6 CTR: 00000000
[ 2201.494480] REGS: c01e5ea0 TRAP: c000b3b8 Not tainted
(2.6.24-rc8-xlnx)
[ 2201.501293] MSR: 20323032 <FP,ME,IR,DR> CR: 000001d6 XER: d07870f8
[ 2201.507609] TASK = c7c52c10[261] 'init' THREAD: c7502000
[ 2201.512698] GPR00: c01e5eb0 c01fc25b c01b1634 c01e5f18 c01e5f10 c0017020
00000012 000019e7
[ 2201.520990] GPR08: c01e5ee0 c0016820 00000030 00021030 c01e5ee0 c01fc271
00000012 c01e5f02
[ 2201.529284] GPR16: c01e5f40 c0017020 00000000 000007e6 3c303e5b 20323032
322e3030 0000004d
[ 2201.537578] GPR24: 0002bf20 00000001 28121969 00000000 c01e5f50 c00170a8
02000000 c01e5f58
[ 2201.546044] NIP [c01e5f28] 0xc01e5f28
[ 2201.549673] LR [000001d6] 0x1d6
[ 2201.552783] Call Trace:
[ 2201.555202] Instruction dump:
[ 2201.558142] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX
[ 2201.565826] XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
XXXXXXXX XXXXXXXX
And now it's truly well hung.
Problem with init ? The wait reboot is compiled ? The reset vector ?
--
Guillaume Dargaud
http://www.gdargaud.net/
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